Method of forming self-aligned thin film transistor
Номер патента: CA2228037A1
Опубликовано: 13-02-1997
Автор(ы): James F. Farrell
Принадлежит: Individual
Опубликовано: 13-02-1997
Автор(ы): James F. Farrell
Принадлежит: Individual
Реферат: During the formation of a self-aligned thin film transistor (50), the semiconductor material channel layer (58) on the gate insulating layer (56) has a passivation shield (PS) applied to it aligned with the gate electrode (54). The channel layer is then exposed to a reagent selected to yield a chemical reaction with the portions of the channel layer (58) not covered by the passivation shield (PS) causing removal of a component of the semiconductor material thereby to change the electical properties of those portions of the channel layer. In this manner, doped source and drain regions (60, 62) can be formed on opposite sides of the channel having edges that extend to the edges of the gate electrode avoiding any overlap therebetween and reducing the parasitic capacitance of the thin film transistor (50).
Method of forming self-aligned split-gate memory cell array with metal gates and logic devices
Номер патента: US09721958B2. Автор: FENG Zhou,Chun-Ming Chen,Nhan Do,Jeng-Wei Yang,Man-Tang Wu,Xian Liu,Chien-Sheng Su. Владелец: Silicon Storage Technology Inc. Дата публикации: 2017-08-01.