Integrated complementary MOS transistor logic circuit - has four pairs of MOS transistors connected to provide three stable states of circuit
Номер патента: FR2352449A1
Опубликовано: 16-12-1977
Автор(ы): Andre Charles Choserot, Marie-Helene Comte, Pierre Girard
Принадлежит: Laboratoire Central de Telecommunications SA
Опубликовано: 16-12-1977
Автор(ы): Andre Charles Choserot, Marie-Helene Comte, Pierre Girard
Принадлежит: Laboratoire Central de Telecommunications SA
Реферат: The three stable states logic circuit has an activation input and an output which can either have a high or low impedance, the output impedance depending upon the state of the activation input. The logic circuit has a pair of first complementary transistors connected in series between earth and a positive supply voltage. The gate and the source of each of the first transistors are connected via two transistors of the same type. The gate of the first transistor is connected to a control input via third transistor of the same type as the first. The gates of one of the second transistors and one of the third transistors are connected directly to the activation input. The gates of the other second transistor and the other third transistor is connected to the activation input via an invertor circuit. the inverter circuit is such that the state of the activation input permits setting of the output of the high impedance device whatever the logic state of the control input.
Three-state complementary MOS integrated circuit
Номер патента: US4804867A. Автор: Yukio Miyazaki,Takenori Okitaka. Владелец: Mitsubishi Electric Corp. Дата публикации: 1989-02-14.