Method of making apparatus for computing multiple sum of products
Опубликовано: 10-07-2013
Автор(ы): Theo Alan Drane
Принадлежит: Imagination Technologies Ltd
Реферат: A hardware circuit component for executing multiple sum-of-products operations is manufactured as follows. A set of multiplexed sum-of-products functions of a plurality of operands (a, b, c,... ), any one of which functions can be selected in dependence upon a select value (sel) by multiplex operations, is received. The sum-of-products functions are then rearranged in a particular manner. The rearranged set of sum-of-products functions is merged into a single merged sum-of-products function containing one or more multiplexing operations. From this a layout design can be generated, and a hardware circuit component such as an integrated circuit manufactured from the layout design. The step of re-arranging the multiple sum-of-products functions comprises aligning the elements of the set of sum-of-products functions in such a manner that the amount of multiplexing in the single merged sum-of-products function is less than in the input set of sum-of-products functions. Additionally, negative terms in the sum-of-products functions are selectively negated so that particular products are always positive.
Method of making apparatus for computing multiple sum of products
Номер патента: US20120059501A1. Автор: Theo Alan Drane. Владелец: Individual. Дата публикации: 2012-03-08.