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FAN-OUT SEMICONDUCTOR PACKAGE

Номер патента: US20200091054A1. Автор: JEONG Sung Won, KIM Da Hee, KO Young Gwan. Владелец: SAMSUNG ELECTRONICS CO., LTD,. Дата публикации: 19-03-2020.
A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip. 1. A semiconductor package comprising:a semiconductor chip having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface;an encapsulant covering at least a portion of the inactive surface of the semiconductor chip;a connection member disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads of the semiconductor chip; anda conductive layer embedded in the encapsulant such that at least a portion of one surface of the conductive layer faces the inactive surface of the semiconductor chip,wherein the conductive layer has a thickness greater than that of the redistribution layer of the connection member.2. The semiconductor package of claim 1 , wherein the conductive layer includes at least one plane shape pattern.3. The semiconductor package of claim 1 , further comprising a conductive structure disposed above the connection member claim 1 , and disposed adjacent to the semiconductor chip.4. The semiconductor package of claim 3 , wherein at least a portion of the conductive structure is covered by an insulating material.5. The ...

ELECTRONIC APPARATUS

Номер патента: US20200109508A1. Автор: KANG Jeonghoon, KWAK Eunkyeong, OH Minhwan. Владелец: SAMSUNG ELECTRONICS CO., LTD,. Дата публикации: 09-04-2020.
An electronic apparatus includes a main body including a nut portion; a plurality of level-adjustable foots placed at a lower side of the main body, configured to support the main body, adjustable in height to level the main body, and including a bolt portion inserted in and screw-coupled to the nut portion; and an elastic member configured to elastically press one of the bolt portion and the main body toward the main body or the level-adjustable foot to make a first thread of the bolt portion and a second thread of the nut portion corresponding to the first thread be in contact with each other. 1. An electronic apparatus comprising:a main body comprising a nut portion having a screw coupling thread;a level-adjustable foot at a lower side of the main body, configured to support the main body, adjustable in height to level the main body, and comprising a bolt portion having a screw coupling thread and being screw-coupled to the nut portion via engagement of the screw coupling thread of the nut portion and the screw coupling thread of the bolt portion; andan elastic member configured to generate a repulsive force in response to the bolt portion being screw-coupled to the nut portion, to thereby increase contact between the screw coupling thread of the bolt portion and the screw coupling thread of the nut portion.2. The electronic apparatus according to claim 1 , whereinthe nut portion is provided on a bottom side of the main body,the electronic apparatus further comprises a support plate configured to be in contact with an end portion of the bolt portion, andthe elastic member is configured to generate the repulsive force in response to the support plate contacting the bolt portion.3. The electronic apparatus according to claim 2 , wherein the elastic member comprises a first end coupled to the support plate claim 2 , and a second end coupled to the nut portion.4. The electronic apparatus according to claim 2 , wherein the elastic member comprises a first end coupled ...

RECONFIGURABLE PROCESSOR AND OPERATION METHOD THEREFOR

Номер патента: US20170317679A1. Автор: KIM Suk-Jin, KWON Ki-Seok, LEE SEUNG-WON, PARK Young-hwan, SUH Dong-kwan. Владелец: SAMSUNG ELECTRONICS CO., LTD,. Дата публикации: 02-11-2017.
Provided are a reconfigurable processor and a method of operating the same, the reconfigurable processor including: a configurable memory configured to receive a task execution instruction from a control processor; and a plurality of reconfigurable arrays, each configured to receive configuration information from the configurable memory, wherein each of the plurality of reconfigurable arrays simultaneously executes a task based on the configuration information. 1. A reconfigurable processor comprising:a configurable memory configured to receive a task execution instruction from a control processor; anda plurality of reconfigurable arrays, each configured to receive configuration information from the configurable memory based on the received instruction,wherein each of the plurality of reconfigurable arrays simultaneously executes a task, based on the configuration information, by using a plurality of function units included in each of the plurality of reconfigurable arrays.2. The reconfigurable processor of claim 1 , wherein the control processor comprises a plurality of controllers claim 1 , andthe reconfigurable processor further comprises a start synchronizer configured to determine whether the configurable memory has received all of a plurality of task execution instructions respectively from the plurality of controllers.3. The reconfigurable processor of claim 2 , wherein if the configurable memory has received all of the plurality of task execution instructions as a result of the determination claim 2 , the configuration information is transmitted to each of the plurality of reconfigurable arrays.4. The reconfigurable processor of claim 1 , further comprising an array synchronizer configured to stop transmitting the configuration information to each of the plurality of reconfigurable arrays until all of the plurality of reconfigurable arrays acquire specific data claim 1 , when each of the plurality of reconfigurable arrays accesses an external shared data ...

SYSTEM-ON-CHIP INCLUDING LOW-DROPOUT REGULATOR

Номер патента: US20220404853A1. Автор: Kim Sangho, Kim Seki, Lee Byeongbae, Lee Dongha, Lee Hyongmin, LEE Sungyong, LEE Yongjin. Владелец: SAMSUNG ELECTRONICS CO., LTD,. Дата публикации: 22-12-2022.
A system-on-chip according to an embodiment includes a core including a header switch circuit configured to transmit a power supply voltage applied to a first power rail as a supply voltage to a second power rail and a logic circuit configured to operate based on the supply voltage from the second power rail, and a low-dropout (LDO) regulator configured to regulate a magnitude of first current output to the second power rail based on a change in the supply voltage, wherein the LDO regulator is further configured to control on/off of a plurality of first header switches included in the header switch circuit based on an amount of the change in the supply voltage. 1. A system-on-chip comprising: a header switch circuit configured to transmit a power supply voltage, applied to a first power rail, as a supply voltage to a second power rail; and', 'a logic circuit configured to operate based on the supply voltage received from the second power rail; and, 'a core comprisinga low-dropout (LDO) regulator configured to regulate a magnitude of a first current output to the second power rail based on a change in the supply voltage,wherein the LDO regulator is further configured to control on/off states of a plurality of first header switches included in the header switch circuit based on an amount of the change in the supply voltage.2. The system-on-chip of claim 1 , wherein the LDO regulator is further configured to detect the change in the supply voltage at least one point of the first power rail.3. The system-on-chip of claim 1 , wherein the LDO regulator is further configured to maintain previous power-on/off states of the plurality of first header switches claim 1 , based on the amount of the change in the supply voltage being within a first threshold range.4. The system-on-chip of claim 1 , wherein the LDO regulator is further configured to change a power-on/off state of at least one of the plurality of first header switches claim 1 , when the amount of the change in the ...

Apparatus and method for processing data in high speed downlink packet access (hsdpa) communication system

Номер патента: WO2005062550A1. Автор: Jin-Young Oh, Kang-Gyu Lee, Sang-Hoon Chae, Sung-Wook Park. Владелец: SAMSUNG ELECTRONICS CO., LTD,. Дата публикации: 07-07-2005.
Disclosed is a process for processing an MAC-hs PDU in an HSDPA communication system, includes an HS-DSCH decoder for decoding the PDU at intervals of a first period and storing the PDU in a first memory; a second memory for storing a control table containing position and number information of the PDU, and performing a reordering queue operation on the basis of the position and number information; an HSDPA controller for reading the PDU storing the read PDU in the second memory, monitoring the second memory during a second period, updating the number of PDUs stored in the second memory, and transmitting an interrupt signal to a reordering queue distributor at intervals of the second period; and a reordering queue distributor for reading the position and number information upon receiving the interrupt signal from the HSDPA controller, and transmitting the PDU to an upper layer
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