Малошумящий генератор, управляемый напряжением с высоким перекрытием по частоте

Предлагаемый малошумящий генератор с высоким перекрытием по частоте относится к радиотехнике, и может быть использован при двойном перекрытии по частоте в синтезаторе частот (СЧ) с системой фазовой автоподстройки частоты (ФАПЧ) с последующим двоичным делителем частоты для неограниченного расширения диапазона непрерывной сетки частот.Технический результат – снижение уровня фазовых шумов в спектре выходного сигнала генератора, за счет разделения цепей управляющего напряжения и напряжения источников питания транзистора.Для этого в генераторе за счет подключения точки соединения второго варикапа (VD2) и катушки индуктивности L к общей шине достигается разделение цепей управляющего напряжения и цепей питания биполярного транзистора VT, что исключает прямое влияние шумов источников питания генератора на уровень шума и приводит к дополнительному снижению уровня шума генератора. 2 ил.

GERÄUSCHARMER SPANNUNGSGESTEUERTER MIKROWELLENOSCILLATOR DER ZWEITEN GENERATION

System und Verfahren für einen spannungsgesteuerten Oszillator

Gemäß einer Ausführungsform umfasst ein spannungsgesteuerter Oszillator (VCO) einen VCO-Kern, der eine Vielzahl von Transistoren und eine Varaktorschaltung aufweist, die ein mit Emitteranschlüssen des VCO-Kerns gekoppeltes erstes Ende und ein mit einem Abstimmanschluss gekoppeltes zweites Ende aufweist. Die Varaktorschaltung umfasst eine Kapazität, die mit steigender am Abstimmanschluss angelegter Spannung in Bezug auf die Emitteranschlüsse des VCO-Kerns steigt.

ANORDNUNG ZUM ERZEUGEN VON WAEHLSIGNALEN

DIFFERENZOSZILLATOR

Oszillator

ELECTRICAL OSCILLATING CIRCUIT

... 1410055 Transistor oscillator circuits REDAC SOFTWARE Ltd 29 May 1973 [17 June 1972] 28468/72 Addition to 1391783 Heading H3T An oscillator comprises an amplifier with shunt and also series capacitive feedback, in which the phase shift caused by the feedback circuits cancels out at one frequency, and an overall feedback path which maintains oscillations. The frequency-selective amplifier comprising Darlington pair of transistors 5, 6 with shunt negative feedback over capacitor 10 shunted by resistor 12 and series negative feedback provided by capacitor 14 shunted by resistor 16, is provided with overall positive feedback via amplifier 20 and feedback resistors 32, 34. The transistor 20 is biased to a small current level and operates in class A for small signal amplitudes: for larger ones it operates in class B and limits the amplitude of oscillation.

Oscillator circuits

A stable sine wave oscillator circuit comprising two pairs of cross-coupled bipolar transistors in cascode, the collector electrodes of the transistors of each pair being interconnected by way of respective capacitors. Output signals in phase quadrature may be obtained from across these two capacitors.

Improvements in phase shift oscillators

... 1,100,744. Measuring temperature electrically; resistance measurement. BISSETTBERMAN CORPORATION. Aug. 17, 1965, No. 35271/65. Headings G1N and G1U. [Also in Divisions G3 and H3] A sensitive transducer (measuring e.g. temperature or pressure) is included in one bridge in the regenerative loop of a phase-shift oscillator (see Division H3) to provide a variable-amplitude constant-phase signal which is combined vectorially with the output of a second bridge which provides a constant-amplitude signal of constant phasedifference from the first signal; variations in the resistance of the transducer thus alter the frequency of oscillation. In Fig. 2 a thermistor or platinum thermometer 180 is in the first bridge 174, and may be used for measuring the temperature of sea water. A variable resistor 192 is adjusted so that the bridge 174 is balanced at one end of the range to be measured, e.g. 0‹C. The second bridge 194 has reactive components 212, 216 (one of which may be omitted) to provide a constant ...

Voltage controlled oscillator

Voltage controlled oscillator

A voltage controlled oscillator with a substantially linear voltage/frequency characteristic employs in the resonant circuit of the oscillator, a variable capacitance (21 - 22 line only) related to the mutual conductance, gm, of an associated amplifier and to a control voltage VS1 or current applied to the amplifier. Flow of RF current through terminal 22 may be avoided by using a balanced arrangement (Figs. 3A, 3B). In the figure, a variable capacitance is produced by the C, R, transistor combination and is linearly related to the voltage VS1. ...

Tunable ring oscillator

A tunable ring oscillator having a one or more delay circuits having a coarse tuning circuitry and a fine tuning circuitry. The coarse tuning circuitry is used to set one of a minimum time delay or a maximum time delay as function of a coarse tuning input. The fine tuning circuitry is used to adjust between the minimum time delay and the maximum time delay as a function of a fine tuning input.

An oscillator with improved frequency stability

Oscillator having input (In) and output (Out) terminals comprising a first signal delay circuit 120 having a first voltage response characteristic and associated first propagation delay, and a second signal delay circuit 106 having a second voltage response inversely correlated to first voltage response characteristic, and coupled to the first delay circuit 102 to provide an associated second propagation delay. The first and second propagation delays are temporarily matched to generate an oscillating signal at a predetermined frequency. The first signal delay circuit may comprise at least two series coupled inverters, (104a,b) each coupled to a first/second supply voltage (Vdd, Vss), and form a part of a ring oscillator. The second signal delay circuit may comprise at least one RC (resistor/capacitor) network. The oscillator may further include a buffer stage 104f. The inverters may be optimised for a predetermined voltage supply range. The first/second voltage (supply) characteristic may ...

Improvements in or relating to tuned circuits employing transistors

... 1,119,708. Transistor amplifying and oscillating circuits; remote control of radio receivers. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 15 Oct., 1965 [15 Oct., 1964; 13 Feb., 1965], No. 43799/65. Headings H3Q and H3T. An R.C. coupled transistor circuit which can be adjusted to act as either a high Q circuit or alternatively as an oscillator comprises a first transistor T 1 with its collector connected to the base of a second transistor T 2 . A phase-shifting feedback loop is provided between a further electrode of the second transistor and one of the first transistor, e.g. the network C, R 1 , R 2 connected between the emitters; the arrangement is characterized in that the collector circuit of the first transistor T 1 includes at least two semi-conductor diodes D 1 , D 2 connected in series and arranged in the same direction of conduction as transistor T 1 . The collector circuit also comprises phase-shifting elements, e.g. capacitor C 5 such as to cause a phase-shift equal to but ...

VOLTAGE CONTROLLED OSCILLATOR

Strip material dispensing device

... 1,148,232. Tape dispensers. MINNESOTA MINING & MFG. CO. 22 April, 1966 [23 April, 1965 (2)], No. 17806/66. Heading A4G. A tape dispenser has pushes 14, Fig. 1, dispensing measured tape lengths according to indications on an adjustable range of lengths indicator 190, pushes 16 giving lengths determined by dials 22 and a random length push 18. The pushes, indicator and dials set a resistance matrix in device 30, Fig. 3, whereby a pre-charge is placed via a linear current generator 294 on condenser 280 (Fig. 6A, not shown) in a control circuit 32 and, via transistorised circuitry, pulses a flip-flop 38 into an unstable condition and, via a load circuit containing a rectifier transistor which becomes conductive (490, Fig. 6B, not shown) allows an A.C. source 144 to energize solenoid 92 which depresses lever 56 about pivot 64 so that pressure roll 70 presses the tape 50 on to drive roll 80, cutter 72 is raised and a micro-switch 106 operated allowing A.C. source 118 to drive motor 112 which ...

Stabilised Oscillator

... 1,163,293. Automatic voltage control. AUTOMATIC TIMING & CONTROLS Inc. Sept. 29, 1966 [Jan. 7, 1966], No. 43601 / 66. Heading G3R. An oscillator with a regulated output comprises: - input terminals 93, 95; an output terminal 94; output transistors 77, 83 associated with an oscillation -sustaining positive feedback network including a Wien bridge 65, 91, 63, 85; a circuit including a terminal 5 connected to a reference voltage source, transistors 7, 8, 9 and 21, capacitors 13, 17 and resistors 15, 19 for producing an error signal in dependence upon variations in the amplitude of the oscillator output; and a D. C. negative feedback circuit including a potentiometer 53, a resistor 49, and an optional temperaturecompensating thermistor 47, this circuit being connected to the base of a transistor 43, which base also receives an A. C. negative feedback signal by way of a resistor 41 and capacitor 39 to the emitter of which is applied the said error signal. The arrangement is such that the unijunction ...

Signal translating circuits using field-effect transistors

... 1,074,577. Circuits using insulated-gate fieldeffect transistors. RADIO CORPORATION OF AMERICA. Dec. 11, 1963 [Dec. 17, 1962], No. 49020/63. Heading H3T. In a circuit in which an insulated-gate fieldeffect transistor is employed as an amplifier, oscillator or mixer, signals are applied both to the gate electrode and to a terminal connected to the substrate upon which the source and drain electrodes are formed. If the substrate is reverse biased with respect to both the source and drain electrodes, the substrate input has a high impedance and functions similarly to the gate electrode. Thus by con. necting the substrate and gate electrodes together, either directly, Fig. 6 (not shown), or through a capacitor, Fig. 8 (not shown), the maximtan value of the transconductance and its dependance upon bias voltages can be increased. If the substrate is forwardly biased with respect to the source electrode and reversed biased with respect to the drain electrode the device functions as a bipolar ( ...

FREQUENCY MODULATOR

... 1,223,077. Frequency modulated transistor oscillators. STANDARD TELEPHONES & CABLES Ltd. 28 Aug., 1969, No. 42814/69. Headings H3R and H3T. A modulated oscillator comprises an odd number of transistors T1, T2, T3 connected in a ring and means T4, T5 for varying the transit time of the transistors T1, T2, T3 to vary the frequency of oscillation of the ring. The fundamental frequency of the ring may be adjusted by a variable capacitor C1. Alternatively, the capacitor C1 may be replaced by a variable inductor.

CONTROLLABLE ELECTRIC OSCILLATOR

... 1,270,564. Transistor oscillators. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 29 Aug., 1969 [2 Sept., 1968], No. 43159/69. Heading H3T. [Also in Division G3] A sinewave oscillator whose frequency may be varied by variation of one variable impedance comprises a first #/2 phase shift network R10, C10, Fig. 8, an amplifier 58, a phase inverter 60 and a second #/2 phase shift network R12, C12 one element of which is variable. Alternatively the phase inverter may comprise a transformer, Fig. 4 (not shown), an amplifier 51, Fig. 7 (not shown), with the phase shift network (R9, C9) connected between its input and output or as shown in Fig. 9, an amplifier 79 with a differential input. In this arrangement, the second phase shift network R15, C15 is in the amplifier input circuit with one electrode of the capacitor earthed. Oscillation amplitude is stabilized by a control device, 67 or 81, in which the oscillator output is rectified, smoothed and compared with a reference voltage derived from ...

OSCILLATOR MIXER CIRCUIT.

Fm modulator

SINUSOIDAL OSCILLATOR WITH ELECTRONICALLY VARIABLE FREQUENCY

A sinusoidal oscillator includes a transistor amplifier and a feedback circuit. The transistor emitter circuit includes an inductor in parallel with a series-connected capacitor and variable resistance for electronically varying the frequency of oscillation by altering the phase angle of the amplifier circuit phase shift. The variable resistance can be constituted by a variable resistor or by diodes supplied with a controlled current.

ADJUSTABLE FREQUENCY OSCILLATOR

AN OSCILLATOR CIRCUIT WITH TUNEABLE SIGNAL DELAY MEANS

The invention discloses an oscillator circuit (100, 200, 300, 400), comprising an oscillating element (110, 210, 310, 410) and output means (115, 215, 315, 415) for outputting an oscillation frequency from the oscillating circuit. The circuit further comprises a signal delay means (120, 220, 320, 420) which is arranged in series with the oscillating element and feeds the output signal back to the oscillating element. The delay means is (120, 220, 320, 420) tuneable with respect to the delay it provides. The oscillating element can be an amplifier or a VCO, and the delay means can be a Delay Locked Loop or a tuneable delay line, depending on the embodiment of the invention.

Vorrichtung zum Detektieren von Unregelmässigkeiten in Fäden

RC-Sinusoszillator veränderlicher Frequenz

PROCEDE ET OSCILLATEUR POUR ENGENDRER DES OSCILLATIONS ELECTRIQUES DANS UN MONTAGE EN BOUCLE FERMEE.

Circuit oscillateur

Circuit oscillateur générateur d'impulsions

Ringoszillator

Oscillator with switched reactive elements

ADJUSTABLE FREQUENCY OSCILLATOR

Paramétron made up in a balanced circuit

Variable generator of frequency

Time measurement clocks or watches - uses determined freq. periodic signal generator and D.C. supply source

BASED ELECTRONIC OSCILLATOR MOS TRANSISTORS

OSCILLATOR ORDERS IN TENSION HAS MULTIPHASE REALIGNEE AND BUCKLES HAS PHASE ASSERVIEASSOCIEE

Un oscillateur commandé en phase multiphase réaligné (MRVCO) obtient un réalignement de phase basé sur l'injection de charge dans les étages de VCO avec la quantité d'injection proportionnelle à l'erreur de phase instantanée entre l'horloge de sortie de VCO et une horloge de référence. Le MRVCO peut être incorporé dans la mise en oeuvre d'une boucle commandée en phase multiphase réalignée (MRPLL). Un détecteur de phase séparé, ainsi qu'une pompe de charge de réalignement spécifique, peut être prévu dans la PLL pour commander le VCO. Le VCO présente un bruit de modulation de phase inférieur, de sorte que la PLL présente une très grande largeur de bande équivalente.

Generator high frequency comprising a semiconductor with several electrodes

Temperature compensated LC oscillator

Uppstartning av oscillator

Circuit for automatically detecting off-chip, crystal or on-chip, RC oscillator option

A self-configurable clock circuit which automatically detects at power up whether an off-chip crystal oscillator is connected to an integrated circuit including the self-configurable clock circuit, and following such detection generates a system clock signal and a power on reset signal to be used by other circuitry included in the integrated circuit. If the off-chip crystal oscillator is connected to the integrated circuit, then the self-configurable clock circuit provides the system clock signal from a first signal generated from the off-chip crystal oscillator. On the other hand, if the off-chip crystal oscillator is not connected to the integrated circuit, then the self-configurable clock circuit provides the system clock signal from a second signal generated from an on-chip RC oscillator circuit.

Oscillator mixer circuit with reaction-tree coupling

An oscillator and mixer circuit of an integrated UHF/VHF modulator circuit includes a single active oscillator circuit to be connected to frequency-determining passive circuits for UHF and multichannel VHF operation, a single mixer part mixing an oscillator signal from the active oscillator circuit with a useful signal, and a reaction-free coupling connected between the single active oscillator circuit and the single mixer part.

Voltage controlled oscillator having frequency and amplitude controlling loops

A voltage controlled oscillator that completely eliminates the need for any externally mounted coil and capacitor includes a first loop and a second loop. The first loop provides band-limiting of an output signal of an amplifier through a bandpass filter to provide oscillation at a frequency of a resonant point of the bandpass filter, and the second loop controls the oscillation amplitude, so that a lowpass filter output with a 90 DEG phase is extracted from the first loop, while a bandpass filter output with a 0 DEG phase is extracted from the second loop. The voltage controlled oscillator may be used in an automatic fine tuning circuit for television.

Multi-phase voltage controlled oscillator (VCO) with common mode control

A voltage controlled oscillator ("VCO") circuit capable of generating signals with reduced jitter and/or low-phase noise is provided. One embodiment provides a plurality of cascaded VCO cells, where each VCO cell can include a source coupled differential pair, a bias transistor connected to the differential pair for biasing the differential pair, a resistive load pair connected to the differential pair, and a voltage controlled capacitor pair or varactor pair connected to the differential pair. The varactors provide control over the frequency of the oscillations produced by the VCO circuit in combination with a control voltage. A phase frequency detector combined with a charge pump and loop filter provide the control voltage.

Oscillation circuit

An oscillation circuit includes first and second constant current circuits, first and second switch circuits, first and second MOS transistors, and an output port. The first constant current circuit is connected to one port of a capacitor. The first MOS transistor has a gate and a drain connected to the second constant current circuit and a source connected to another port of the capacitor. The second MOS transistor has a gate connected to the gate of the first MOS transistor, and a drain connected to the one port of the capacitor. The second switch circuit is connected between a source of the second MOS transistor and a second power supply terminal. The output port outputs a signal based on a voltage of the one port. Turn-on and turn-off of the first and second switch circuits are controlled by the signal of the output port and an inverted signal.

Semiconductor integrated circuit device

A semiconductor integrated circuit device includes a first terminal arranged to accept an external input of an analog input signal, an amplifier configured to amplify the analog input signal to generate an amplified signal, a logic unit configured to generate a digital output signal that is in accordance with the amplified signal, and a second terminal arranged to externally output an analog output signal that is in accordance with the amplified signal. The first terminal is disposed at a first side of a package, and the second terminal is disposed at a second side which is different from the first side.

LOCAL OSCILLATOR BUFFER

A local oscillator buffer circuit comprises a complementary common-source stage comprising a first p-channel transistor (MCSP) and a first n-channel transistor (MCSN), arranged such that their respective gate terminals are connected together at a first input node, and their respective drain terminals of each of is connected together at a buffer output node. A complementary source-follower stage comprises a second p-channel transistor (MSFP) and a second n-channel transistor (MSFN), arranged such that their respective gate terminals are connected together at a second input node, and their respective source terminals are connected together at the buffer output node.

RC-ГЕНЕРАТОР

Изобретение относится к радиотехнике и может быть использовано в качестве источника синусоидальных колебаний, в том числе в интегральных схемах. Техническим результатом предлагаемого RC-генератора является повышение максимальной частоты формируемых синусоидальных колебаний и уменьшение уровня нелинейных искажений выходного сигнала. RC-генератор содержит первые и вторые зажимы, первый, второй и третий транзисторы, первый и второй резисторы, первый и второй источники тока, с целью формирования синусоидальных колебаний введены первый, второй и третий конденсаторы и третий резистор. При этом уменьшение уровня нелинейных искажений генерируемых колебаний обеспечивается высокой добротностью колебательного контура Q, зависящей только от коэффициентов передачи токов базы первого и второго транзисторов, и правильным выбором параметров первого и второго источников тока и сопротивления третьего резистора. Частота колебаний устанавливается выбором сопротивлений первого и второго резисторов и емкостей ...

Leakage insensitive oscillator circuit

ELECTRICAL CIRCUIT

... 1336503 Photo-resistor circuit W REINERS VERWALTUNGS GmbH 13 Jan 1971 1574/71 Heading G1A The effect of ambient light on a silicon photodetector on which the measuring signal is developed by modulated light is compensated for by shunting the detector with a low value resistor of an R C oscillator network which by incorporating a feedback loop presents an effective open circuit to alternating currents. The invention is applied to monitoring thread thicknesses in textile machines. The photo-cell may be connected in parallel with the resistor in the middle of a three-stage R. C. network of the oscillator. The resistor may comprise R. C. stages of an operational amplifier having both +oe and -oe feedback, the former being lower than the latter. A pair of smaller photo-cells may be used to reduce effective internal capacity.

Integrated oscillator circuits

Oscillator, pll circuit, receiver and transmitter

An oscillator, a PLL circuit, a receiver and a transmitter that allow the circuit scale to be reduced and that are suitable for integration. The electrostatic capacities of variable capacitance circuits (230,230A) are made variable, thereby varying the oscillation frequency of a voltage controlled oscillator (21). The variable capacitance circuit (230) comprises a plurality of variable capacitance elements (60-64) the electrostatic capacities of which can be continuously varied by use of a control signal; a plurality of capacitors (50-54) which are associated with the respective variable capacitance elements and the electrostatic capacities of which are fixed; and a plurality of switches (71-74,81-84) that individually switch combination circuits, each of which comprises one of the plurality of variable capacitance elements (60-64) and a respective associated one of the plurality of capacitors (50-54), for selective connections.

METHOD AND DEVICE FOR GENERATING ELECTRICAL OSCILLATIONS

... 1392876 Transistor oscillators ELECTRONIQUE MARCEL DASSAULT 2 June 1972 [9 June 1971] 25978/72 Heading H3T In an oscillator, the phase shift in a closed feedback loop including a pair of interconnected transistors T 1 , T 2 ; T 1 1, T 2 1 is caused to be 2# at a frequency higher than the cut-off frequencies of the transistors. An adjustable D.C. current source S may be coupled to the loop for determining the frequency at which the phase shift becomes 2#. In the symmetrical arrangement shown using a pair of oscillators high frequency voltages of opposite phases cancel out over portions 19, 191 and hence no high frequency voltage is present on supply line 18. In the embodiment of Fig. 1 (not shown), a single stage using the transistors T 1 , T 2 with their associated elements alone is used. The oscillator may be formed as an integrated circuit.

Variable frequency generator

... 1,032,085. Transistor oscillator circuits. UNITED STATES STEEL CORPORATION. Jan. 26, 1965 [Feb. 3, 1964], No. 3421/65. Heading H3T. A variable frequency transistor multivibrator has its cross-coupling capacitors shunted by ganged resistors so that the oscillation frequency may be varied and has means for switching in alternative pairs of couplings to change the range of frequency adjustment. As shown, the coupling capacitors are each shunted by two variable resistors, one for normal changes of frequency and one for correcting errors due to circuit changes.

INTEGRATED FREQUENCY SELECTIVE DEMODULATION CIRCUIT

... 1470068 FM demodulators; AGC and muting Circuits SIGNETICS CORP 10 Dec 1974 [17 Dec 1973] 53382/74 Headings H3A and H3T An integrated FM demodulator comprises a fixed frequency oscillator 29, a first mixer 27 connected to receive an incoming FM signal as well as the oscillator 29 output to produce an FM difference signal, a phase lock loop detector coupled to the mixer 27 output and including a second mixer 33, a voltage controlled oscillator 37, and a filter 36; an audio amplifier 30 for providing the demodulated output, the mixer 27 and a part of the loop detector being formed on a semi-conductive substrate. The demodulator may form a part of a receiver (Fig. 1, not shown) including a further mixer in which the incoming RF signal is down converted and then applied via a limiting amplifier 26 and a bandpass filter to the first mixer 27. The receiver may also include an AGC detector 39 for applying squelch signals to the audio amplifier 30 and AGC signals to the limiting amplifier 26, and ...

VOLTAGE-CONTROLLED LC-OSCILLATOR WITH PHASE INTERPOLATION

Oscillator

Oscillator

A phase lock loop with error consistency detector

ARRANGEMENT FOR GENERATING SIGNALS FOR SELECTION

CALIBRATION OSCILLATORS FOR NOISE REDUCTION SYSTEMS

TEMPERATURE COMPENSATING CIRCUIT FOR USE WITH A CRYSTAL OSCILLATOR

A temperature compensating circuit for use with a crystal oscillator has a first DC voltage generating circuit with a linear functional temperature characteristic, a second DC voltage generating circuit with a quadratic functional temperature characteristic and a circuit for multiplying the first DC voltage and the second DC voltage so as to produce a DC voltage with a cubic functional characteristics. In this case, the DC voltage with the cubic functional characteristic is supplied to an oscillator circuit so as to compensate for variations in frequency of the crystal oscillator by temperature over wide range thereof.

OSCILLATOR CIRCUIT

ELECTRONIC REMOTE CONTROL TRANSMITTER

A CMOS MICROWAVE MULTIPHASE VOLTAGE CONTROLLED OSCILLATOR

A phase lock loop with idle mode of operation during vertical blanking

Generating fittings of electrical signals

Transistor oscillator

Oscillator

Methods of use of transistors

Sound signalling hooter, in particular for motor vehicle

OSCILLATEUR DE RADAR DE DETECTION DE MOUVEMENT, STABILISE PAR RAPPORT A LA TEMPERATURE

L'OSCILLATEUR EST FORME DE DEUX INDUCTANCES S, S MONTEES RESPECTIVEMENT DANS L'EMETTEUR ET LA BASE D'UN TRANSISTOR HYPERFREQUENCE T DONT LE COLLECTEUR EST RELIE A LA BORNE POSITIVE GENERALE PAR L'INTERMEDIAIRE D'UNE PREMIERE RESISTANCE R, LA PREMIERE S DE CES INDUCTANCES ETANT RELIEE A LA MASSE PAR L'INTERMEDIAIRE D'UNE RESISTANCE VARIABLE P, TANDIS QUE L'AUTRE S EST RELIEE, D'UNE PART, A LA MASSE PAR L'INTERMEDIAIRE D'UNE SECONDE RESISTANCE R, ET, D'AUTRE PART, A LA BORNE POSITIVE PAR L'INTERMEDIAIRE D'UNE TROISIEME RESISTANCE R. LA JONCTION BASE-EMETTEUR D'UN SECOND TRANSISTOR HYPERFREQUENCE T EST MONTEE EN SERIE AVEC LA SECONDE RESISTANCE R ET UNE DIODE D EST MONTEE DANS LE PONT FORME PAR LA PREMIERE ET TROISIEME RESISTANCE.

Improvements with the periodic generators of tensions to semiconductor elements

'Alpha' rhythm A.C. generator - gives sinusoidal adjustable voltage from 0 to 4 volts at freq. 5 to 18 hertz

ADJUSTABLE FREQUENCY OSCILLATOR

직렬-공진 오실레이터

... 오실레이터 회로(100)는 제1 전압 레일(14)과 제1 구동 노드(12) 사이에 직렬로 커플링되는 유도성 엘리먼트(L) 및 용량성 엘리먼트(C)를 포함하는 제1 탱크 회로(T1)를 포함한다. 피드백 스테이지(F)는 제1 탱크 회로(T1)의 제1 탱크 출력(13)에 그리고 제1 구동 노드(12)에 커플링된다. 피드백 스테이지(F)는, 제1 탱크 출력(13)에 존재하는 제1 오실레이팅 탱크 전압에 응답하여, 유도성 엘리먼트(L)와 용량성 엘리먼트(C)에 흐르는 제1 오실레이팅 탱크 전류와 동상인 제1 오실레이팅 구동 전압을 제1 구동 노드(12)에서 생성하고, 그에 따라서 오실레이터(100)가 유도성 엘리먼트(L)와 용량성 엘리먼트(C)의 직렬 공진 모드에서 발진하게 하도록 배열된다.

Delay circuit, oscillator circuit and semiconductor device

AN OSCILLATOR CIRCUIT WITH TUNEABLE SIGNAL DELAY MEANS

The invention discloses an oscillator circuit (100, 200, 300, 400), comprising an oscillating element (110, 210, 310, 410) and output means (115, 215, 315, 415) for outputting an oscillation frequency from the oscillating circuit. The circuit further comprises a signal delay means (120, 220, 320, 420) which is arranged in series with the oscillating element and feeds the output signal back to the oscillating element. The delay means is (120, 220, 320, 420) tuneable with respect to the delay it provides. The oscillating element can be an amplifier or a VCO, and the delay means can be a Delay Locked Loop or a tuneable delay line, depending on the embodiment of the invention.

Embedded voltage controlled oscillator with minimum sensitivity to process and supply

The present invention provides a voltage controlled oscillator with improved noise immunity and minimized variation due to manufacturing process, power supply and operating temperature changes. The voltage controlled oscillator consists of fully differential connected ring oscillator that includes a plurality of differentially connected delay elements. The ring oscillator responds to a control current signal for controlling the frequency of oscillation. A voltage to current converter converts the input tuning voltage to an output current for the controlling of the ring oscillator. The delay element consists of two source coupled P-channel transistors connected to a current source. The drains of the P-channel transistors are each connected to a voltage controlled impedance that changes the delay characteristics of the delay element in response to the input tuning voltage. A voltage reference generator provides the reference voltage necessary to determine the amplitude out of the delay element ...

Circuit arrangement for the generation of a low-frequency alternating current for electro-therapy

ПОСЛЕДОВАТЕЛЬНЫЙ РЕЗОНАНСНЫЙ ГЕНЕРАТОР

Изобретение относится к различным вариантам выполнения цепи генератора. Технический результат заключается в расширении арсенала средств того же назначения. Цепь (100) генератора содержит первую цепь (T1) колебательного контура, содержащую индуктивный элемент (L) и емкостной элемент (C), подключенные последовательно между первой шиной (14) напряжения и первым узлом (12) возбуждения. Каскад (F) обратной связи подключен к первому выходу (13) колебательного контура первой цепи (T1) колебательного контура и к первому узлу (12) возбуждения. Каскад (F) обратной связи выполнен с возможностью генерировать в соответствии с первым осциллирующим напряжением на колебательном контуре, присутствующим на первом выходе (13) колебательного контура, первое осциллирующее напряжение возбуждения на первом узле (12) возбуждения, синфазное с первым осциллирующим током колебательного контура, текущим в индуктивном элементе (L) и емкостном элементе (C), что вынуждает генератор (100) совершать колебания в режиме ...

Синтезатор с коммутируемой полосой пропускания кольца фазовой автоподстройки частоты

Устройство относится к радиотехнике и может быть использовано в современных радиоприемных и радиопередающих устройствах аппаратуры радиосвязи. Технический результат – повышение быстродействия синтезатора при перестройке частоты выходного сигнала при сохранении фазовой стабильности, а также снижение энергопотребления и упрощение устройства. Такой результат обеспечивается за счет того, что в схему коммутации (10) синтезатора введен четвертый ключ (Кл4), управляемый вывод которого соединен с управляемым выводом третьего ключа (Кл3) и со вторым выходом широкополосного фильтра нижних частот (ШФНЧ) (8), в котором вывод первого резистора (R1) подсоединен к первому выходу ШФНЧ, а вывод второго конденсатора (С1) – к общей шине. Кроме того, вывод четвертого ключа соединен со вторым выходом узкополосного фильтра нижних частот (УФНЧ), в котором вывод второго резистора (R2) соединен с первым выходом УФНЧ, а вывод четвертого конденсатора (С4) – с общей шиной; управляемый вывод третьего ключа (Кл3) соединен ...

Генератор многофазной системы ЭДС с управляемой начальной фазой

Изобретение относится к средствам генерирования многофазной системы эдс на основе использования импульсной техники. Технический результат заключается в обеспечении возможности дискретно управлять начальной фазой колебаний для синхронизации работы устройства с внешней сетью, с согласованием частот колебаний, амплитудных значений напряжений фаз, начальных фаз колебаний подключаемого устройства и сети. Устройство позволяет изменять начальные фазы напряжений фаз устройства дискретно с шагомгде n - количество временных интервалов на периоде синусоидальных колебаний Т. На каждом временном интервале TI=Т/n синусоидальные напряжения фаз для каждого дискретного значения начальной фазы аппроксимируются импульсами напряжений требуемой величины, поступающими от источников постоянного напряжения блока питания. Блок коммутации содержит ряд коммутационных плат 1…k, где k - число учитываемых начальных фаз, не превышающее значение (n-1). В рабочем состоянии только одна из плат блока коммутации является ...

Синтезатор с коммутируемой полосой пропускания кольца фазовой автоподстройки частоты

Изобретение относится к радиотехнике и может быть использовано в современных радиоприемных и радиопередающих устройствах аппаратуры радиосвязи. Технический результат - повышение быстродействия синтезатора при перестройке частоты выходного сигнала при сохранении фазовой стабильности, а также снижение энергопотребления устройства. Для этого в схему коммутации введен второй повторитель напряжения, выход которого соединен с управляемым выводом второго ключа, при этом неинвертирующий вход второго повторителя напряжения соединен со вторым выводом широкополосного фильтра нижних частот (ШФНЧ). Инвертирующий вход второго повторителя напряжения соединен с его выходом; точка соединения первого конденсатора и первого резистора соединена с общей шиной, а второй вывод узкополосного фильтра нижних частот (УФНЧ) соединен с выводом второго ключа. 2 ил.

Elektrisch steuerbare Oszillatorschaltung und eine damit ausgerüstete, elektrisch steuerbare Filterschaltung.

OSZILLATOR

SCHALTUNGSANORDNUNG ZUR TEMPERATURKOMPENSATION BEI EINEM QUARZOSZILLATOR

Oszillator mit grossem Bereich.

Voltage controlled oscillator using negative - resistive feedback

A voltage controlled oscillator (VCO) including a negative feedback circuit 12 operates in response to a negative feedback signal generated during active transistor region operation of transistors in transconductance amplifying stages 10 and 11. As a result, harmonic distortion and problems of noise and unstable frequency oscillation are obviated or significantly reduced. The VCO includes first and second variable transconductance (gm) amplifying stages whose non-inverting (+) and inverting (-) terminal are respectively grounded and a first condenser circuit connected between an output terminal of the first transconductance amplifying stage and a non-inverting (+) terminal of the second transconductance (gm) amplifying stage. 12 is a negative-resistive circuit. ...

Multi-phase realigned voltage-controlled oscillator and phase-locked loop incorporating the same

Improvements relating to oscillators incorporating transistors

... 893,810. Frequency modulation; frequency shift signalling; transistor oscillator circuits. ASSOCIATED ELECTRICAL INDUSTRIES Ltd. Feb. 2, 1961 [Feb. 17, 1960], No. 5649/60. Classes 40(5) and 40(6). A transistor phase shift oscillator comprises two transistors T1, T2 with opposite phase shift networks N1, N2 connected between collector and emitter of each and the output of each network connected to the base of the other transistor. Further, a modulation path including a transformer TR is connected between the emitter circuits, and the transformer secondary may be connected to a symmetrical transistor T3 so that depending on whether T3 is fully conductive or not the modulation path is effective or not to shift the oscillator frequency in accordance with D.C. telegraph signals of opposite polarity appplied to T3, the latter otherwise being only partially conductive due to the oscillator frequency. The main feedback, due to the D.C. path through resistor R14, is such that D.C. stabilization ...

ALKYL- AND ALKENYL-SUBSTITUTED CYCLOBUTYL-ETHANOL

... 1334074 Substituted cyclobutyl ethanol and intermediates therefor ZOECON CORP 20 Oct 1970 [22 Oct 1969] 49747/70 Heading C2C The invention comprises cis-2-(11-methyl-21- isopropenyl-cyclobutyl) ethanol. It may be obtained by (1) reducing cis-2-(11-methyl-21- isopropenyl-cyclobutyl)acetic acidorits(C 1 -C 6 ) alkyl ester with a reducing agent such as an aluminium hydride or an alkyl- or alkoxyaluminium hydride; or (2) reacting cis-2-(11- methyl - 21 - acetyl cyclobutyl) - ethanol with a phosphorane of the formula (R) 3 P = CH 2 (A), wherein R is aryl, aralkyl, cycloalkyl or dialkylamino. Examples are given for the preparation of the compound. Cis - 2 - (11 - methyl - 21 - isopropenyl - cyclobutyl) acetic acid or its (C 1 -C 6 ) alkyl ester may be obtained by halogenating 6-methylbicyclo (4,2,0) octan-2-one to give 3-halo-6-methylbicyclo (4,2,0) octan-2-one, said halo being Cl or Br, dehydrohalogenating this compound ...

SWITCHING CONFIGURATION FOR THE PRODUCTION OF A LOW-FREQUENCY ALTERNATING CURRENT FOR THE ELECTRICAL THERAPY.

OSCILLATOR

A phase lock loop with idle mode of operation during vertical blanking

Low noise oscillators

An oscillator having: (A) a transistor for producing an oscillating output signal at an output electrode of the transistor. The oscillator includes; (B) a bias circuit for producing a bias signal for the transistor, said bias circuit including an amplifier coupled to the output electrode of the transistor; and (C) a circuit coupled between an output of the amplifier and a control electrode of the transistor, for isolating the bias signal provided by the amplifier from the oscillating signal; and (D) a resonator circuit having an input coupled to an output electrode of the transistor and an output coupled to a control electrode of the transistor.

System and Method for a Voltage Controlled Oscillator

In accordance with an embodiment, a voltage controlled oscillator (VCO) includes a VCO core having a plurality of transistors and a varactor circuit that has a first end coupled to emitter terminals of the VCO core and a second end coupled to a tuning terminal. The varactor circuit includes a capacitance that increases with increasing voltage applied to the tuning terminal with respect to the emitter terminals of the VCO core.

RELAXATION OSCILLATOR WITH CURRENT AND VOLTAGE OFFSET CANCELLATION

A relaxation oscillator reduces temperature sensitivity and phase noise at low offset frequency by periodically swapping a first current and a second current so that after the first current has been input to a first pair of circuits and the second current has been input to a second pair of circuits, the second current is input to the first pair of circuits and the first current is input to the second pair of circuits. 1. Circuitry for a relaxation oscillator , comprising:a current swapping circuit having a first output and a second output, the current swapping circuit for sourcing a first current from the first output and a second current from the second output in response to a first logic state of a first switching signal and a second logic state of a second switching signal, and sourcing the first current from the second output and the second current from the first output in response to a second logic state of the first switching signal and a first logic state of the second switching signal; anda first current leg coupled to the first output of the current swapping circuit, the first current leg for receiving the first current when sourced from the first output and generating a first leg voltage from the first current in response to a first logic state of a third switching signal and a second logic state of a fourth switching signal, and receiving the second current when sourced from the first output and generating a second leg voltage from the second current in response to the first logic state of the third switching signal and the second logic state of the fourth switching signal.2. The relaxation oscillator circuitry of and further comprising a second current leg coupled to the second output of the current swapping circuit claim 1 , the second current leg for receiving the second current when sourced from the second output and generating a third leg voltage from the second current in response to a second logic state of the third switching signal and a first ...

OSCILLATOR CIRCUIT

An oscillator circuit includes an oscillator having a source node and a sink node, the oscillator being configured to generate a pulse signal having an output voltage that corresponds to a charging or discharging operation of a capacitor, a first bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a first bias current to the oscillator, the first bias current being adjustable, and a second bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a second bias current to the oscillator, the second bias current being adjustable. The first bias current and the second bias current are used to tune a frequency range of the oscillator. 1. An oscillator circuit , comprising:an oscillator having a source node and a sink node, the oscillator being configured to generate a pulse signal having an output voltage that corresponds to a charging or discharging operation of a capacitor;a first bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a first bias current to the oscillator, the first bias current being adjustable; anda second bias current generating circuit coupled to the source and the sink nodes of the oscillator and configured to supply a second bias current to the oscillator, the second bias current being adjustable,wherein the first bias current and the second bias current are used to tune a frequency range of the oscillator.2. The oscillator circuit of claim 1 , wherein the charging or discharging operation of the capacitor is performed through a current path formed by a sourcing current and a sinking current claim 1 , the sourcing current being supplied to the oscillator through the source node claim 1 , the sinking current sinking from the oscillator through the sink node claim 1 , andwherein each of the sourcing current and the sinking current is determined by a current sum of ...

RADIO FREQUENCY (RF) TRANSCEIVER AND OPERATING METHOD THEREOF

A radio frequency (RF) transceiver includes a first oscillator configured to generate a first oscillation frequency associated with an RF signal, a second oscillator configured to generate a second oscillation frequency associated with a clock frequency, a counter configured to generate a counter output signal using the first oscillation frequency and the second oscillation frequency, and a comparer configured to generate a digital output signal associated with the RF signal by comparing an output value of the counter output signal to a reference value. 1. A radio frequency (RF) transceiver comprising:a first oscillator configured to generate a first oscillation frequency associated with an RF signal;a second oscillator configured to generate a second oscillation frequency associated with a clock frequency;a counter configured to generate a counter output signal using the first oscillation frequency and the second oscillation frequency; anda comparer configured to generate a digital output signal associated with the RF signal by comparing an output value of the counter output signal to a reference value.2. The RF transceiver of claim 1 , wherein the counter output signal is associated with a ratio of the first oscillation frequency to the second oscillation frequency.3. The RF transceiver of claim 1 , wherein the first oscillator comprises:an antenna configured to receive the RF signal;a negative R-generator electrically connected to the antenna; anda capacitor bank connected in parallel with the antenna and the negative R-generator.4. The RF transceiver of claim 1 , further comprising:a quenching wave generator configured to generate a quenching signal that controls a negative R-generator of the first oscillator using the second oscillation frequency.5. The RF transceiver of claim 4 , further comprising:an auto gain calibration controller configured to disable the quenching wave generator and the negative R-generator in response to an input power of the RF signal ...

OSCILLATOR CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

Controllability of an oscillator circuit is improved. The oscillator circuit has inverters in odd-numbered stages. A circuit is electrically connected to a power supply node of the inverters to which a high power supply potential is input. The circuit includes a first transistor, a second transistor, and a capacitor. The first transistor includes an oxide semiconductor in its channel. A holding circuit including the first transistor and the capacitor has a function of holding an analog potential that is input from the outside. The potential held by the holding circuit is input to a gate of the second transistor. A power supply potential is supplied to the inverters through the second transistor, so that the delay time of the inverter can be controlled by the potential of the gate of the second transistor. 1. An oscillator circuit comprising:first- to n-th-stage first circuits (n is an odd number); anda second circuit,wherein each of the first to n-th-stage first circuits includes a first input node, a first output node, an inverter, and a third circuit,wherein the first output node of the first circuit in an i-th stage (i is an integer greater than or equal to 1 and less than or equal to (n−1)) is electrically connected to the first input node of the first circuit in a next stage,wherein the output node of the first circuit in the n-th stage is electrically connected to the input node of the first circuit in the first stage,wherein an input node of the inverter is electrically connected to the first input node,wherein an output node of the inverter is electrically connected to the first output node,wherein the inverter includes a first power supply node and a second power supply node,wherein the third circuit includes a second input node, a second output node, a third node, a first transistor, a second transistor, and a first capacitor,wherein the second output node is electrically connected to the first power supply node,wherein a first potential is input to the ...

Voltage-controlled oscillator, pll circuit, and cdr device

Provided is a voltage-controlled oscillator capable of suppressing performance deterioration due to a leak current of a variable capacitive element. Each of the first capacitive circuit and the second capacitive circuit includes a variable capacitive element, a capacitive element, a detection circuit, and a compensation circuit. The variable capacitive element is provided between nodes. A capacitance value of variable capacitive element depends on a voltage value between the nodes. The detection circuit applies a bias voltage value to the second node, and detects an amount of leak current flowing through the variable capacitive element. The compensation circuit causes a current for compensating for the leak current of the variable capacitive element to flow through the first node on the basis of a detection result of the detection circuit.

RC OSCILLATING CIRCUIT

The disclosure discloses an RC oscillating circuit. A first end of a capacitor is grounded, a second end of the capacitor is connected to a charging path, a discharging path and a comparator, A first input end of a comparator is connected to first reference voltage. An output end of the comparator outputs a first output signal and is connected to a control end of the discharging path. The first reference voltage provides the flipped voltage of the comparator The first output signal forms an output clock signal. A first regulating circuit is configured to regulate the magnitude of the charging current and realize coarse frequency tuning. A second regulating circuit is configured to regulate the magnitude of the first reference voltage and realize fine frequency tuning. The disclosure has the advantages of low power consumption, fast start, high precision and wide tuning range. 1. An RC oscillating circuit , wherein the RC oscillating circuit comprises:a capacitor, a first end of the capacitor being grounded;a charging path, an output end of the charging path being connected to a second end of the capacitor, and the charging path providing charging current for the capacitor;a discharging path, a first end of the discharging path being grounded, and a second end of the discharging path being connected to the second end of the capacitor;a comparator, a first input end of the comparator being connected to first reference voltage, and a second input end of the comparator being connected to capacitor charging voltage output by the second end of the capacitor, whereinan output end of the comparator outputs a first output signal;the first output signal is connected to a control end of the discharging path, and the discharging path is switched on and off under the control of the first output signal;the first reference voltage provides the flipped voltage of the comparator, and when the capacitor charging voltage is less than the flipped voltage, the first output signal ...

Oscillator

An oscillator includes first, second, and third current sources, a resistor having first and second terminals, first and second capacitors each having first and second terminals, a switch circuit through which each of the current sources is connectable to the first terminal of one of the resistor and the two capacitors to supply current thereto, a comparator, and switch controller configured to generate control signals for the switch circuit and an oscillation output signal for each of multiple periods based on an output signal from the comparator. During one of the periods, the switch circuit is controlled to connect the first current source to the first terminal of the first capacitor, the second current source to the first terminal of the resistor, the first terminal of the resistor to a first input of the comparator, and the first terminal of the first capacitor to a second input of the comparator.

CURRENT MIRROR WITH DEPLETION MODE MOS AND EMBEDDED NOISE FILTER

A current mirror with depletion mode MOS devices, and an embedded noise filter, operable with low supply voltage to provide a low-noise mirror current. The current mirror includes depletion-mode MOS transistors M and M configured as a current mirror, including a reference_current leg including M that receives an input reference current, and a mirror_current leg including M controlled by M to mirror the reference current as an output mirror current. An embedded noise filter (such as a low-pass RC filter) is coupled to M and M and configured to suppress noise in the input reference current from mirroring to the output mirror current. The embedded noise filter can be a low-pass RC coupled between the MM (low leakage) gates. Use of depletion-mode MOS devices with near-zero VT offers sufficient head-room for cascoding at low supply voltage to improve accuracy. 1. A current mirror circuit , comprising{'b': 1', '2, 'claim-text': [{'b': '1', 'a reference_current leg including M that receives an input reference current, and'}, {'b': 2', '1, 'a mirror_current leg including M, controlled by M to mirror the reference current as an output mirror current; and'}], 'depletion-mode MOS transistors M and M configured as a current mirror, including'}{'b': 1', '2, 'an embedded filter circuit coupled to M and M, and configured to suppress noise in the input reference current from mirroring to the output mirror current.'}212. The circuit of claim 1 , wherein the embedded noise filter circuit is connected to the gates of M and M.3. The circuit of claim 2 , wherein the embedded filter circuit comprises a low-pass RC filter circuit.412. The circuit of claim 1 , wherein M and M are either NMOS or PMOS transistors.5. The circuit of claim 1 , further comprising{'b': '2', 'cascode circuitry coupled to M, and referenced to a voltage corresponding to the input reference current;'}the cascode circuitry configured to adjust the output mirror current.6. The circuit of claim 1 , wherein the output ...

OSCILLATOR CIRCUIT AND METHOD OF PROVIDING TEMPERATURE COMPENSATION THEREFOR

An oscillator circuit comprising at least a first component arranged to be statically calibrated to calibrate the oscillator circuit to achieve a symmetrical frequency/temperature profile for the oscillator circuit. The oscillator circuit further comprises at least one further component arranged to be dynamically calibrated to enable an oscillating frequency of the oscillator circuit to be dynamically adjusted, and at least one temperature compensation component arranged to receive at least one temperature indication for the oscillator circuit and to dynamically adjust the at least one further component based at least partly on the at least one received temperature indication. In some examples, the at least one temperature compensation component is arranged to dynamically adjust the at least one further component based on a standardized temperature compensation scheme. 1. An oscillator circuit comprising:at least a first component arranged to be statically calibrated to calibrate the oscillator circuit to achieve a symmetrical frequency/temperature profile for the oscillator circuit, wherein the at least the first component is statically calibrated in response to an adjustment of the at least the first component made during production of the oscillator circuit;at least one further component arranged to be dynamically calibrated to enable an oscillating frequency of the oscillator circuit to be dynamically adjusted; andat least one temperature compensation component arranged to receive at least one temperature indication for the oscillator circuit and to dynamically adjust the at least one further component based at least partly on the at least one received temperature indication.2. The oscillator circuit of claim 1 , wherein the at least one temperature compensation component is arranged to dynamically adjust the at least one further component based on a standardized temperature compensation scheme.3. The oscillator circuit of claim 1 , wherein the at least first ...

SWITCHED-CAPACITOR RC OSCILLATOR

An RC oscillator includes a first capacitive element and a second capacitive element and a comparator having a first input, a second input, and an output for outputting an oscillating signal. The oscillator further includes an integrator having a first input, a second input coupled to a reference voltage source, and an output coupled to the second input of the comparator. The oscillator further includes a switch circuit configured to provide a voltage of the first capacitive element to the first input of the comparator in a cycle and a voltage of the second capacitive element to the first input of the comparator in a subsequent cycle. The integrator is configured to sample and to hold the voltage of the second capacitive element continuously in the cycle. 1. A resistance capacitance (RC) oscillator , comprising:a first capacitive element and a second capacitive element;a comparator having a first input, a second input, and an output for outputting an oscillating signal;an integrator having a first input, a second input coupled to a reference voltage source, and an output coupled to the second input of the comparator; anda switch circuit configured to provide a voltage of the first capacitive element to the first input of the comparator in a cycle and a voltage of the second capacitive element to the first input of the comparator in a subsequent cycle,wherein the integrator is configured to sample and to hold the voltage of the second capacitive element continuously in the cycle.2. The RC oscillator of claim 1 , wherein the comparator is configured to compare the voltage of the first capacitive element with the output of the integrator to generate a first pulse of the oscillating signal in the cycle claim 1 , and to compare the voltage of the second capacitive element with the output of the integrator to generate a second pulse of the oscillating signal in the subsequent cycle claim 1 , andthe switch circuit is further configured to provide the voltage of the second ...

Oscillator

An oscillator comprising an RC oscillator and a bandgap reference source, wherein the bandgap reference source provides a reference current for the RC oscillator, and a temperature coefficient of the reference current is adjustable. Since the oscillation frequency of the RC oscillator has less dependency on a power supply, a clock source having a relatively precise frequency thus can be obtained; and based on the RC oscillator, the bandgap reference source having a temperature compensation function is added, the reference current generated by the bandgap reference source with an adjustable temperature coefficient is used for temperature coefficient compensation to the inherent temperature coefficient of the oscillation frequency of the RC oscillator, thereby reducing the effect of the temperature on the oscillator, so that the output frequency of the oscillator does not change with the temperature as far as possible, which improves the oscillation frequency precision of the oscillator. 1. An oscillator , comprising an RC oscillator and a bandgap reference source , wherein:the bandgap reference source provides a reference current for the RC oscillator; anda temperature coefficient of the reference current output by the bandgap reference source is adjustable.2. The oscillator according to claim 1 , wherein:the RC oscillator and the bandgap reference source are on the same substrate.3. The oscillator according to claim 1 , wherein:the temperature coefficient of the reference current output by the bandgap reference source is opposite to a temperature coefficient of an oscillation frequency output by the RC oscillator.4. The oscillator according to claim 1 , wherein:both the RC oscillator and the bandgap reference source are semiconductor devices manufactured by mean of a CMOS process.5. The oscillator according to claim 1 , wherein:the bandgap reference source comprises an operational amplifier, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, ...

Circuit Device, Oscillator, Real-Time Clock Device, Electronic Device, And Vehicle

A circuit device includes an oscillation circuit and a processing circuit. The oscillation circuit includes a variable capacitance circuit configured by a capacitor array and oscillates at an oscillation frequency corresponding to the capacitance value of the variable capacitance circuit. First temperature data and second temperature data subsequent to the first temperature data are input to the processing circuit as temperature data. In the period between the start of the capacitance control based on the first temperature data and the start of the capacitance control based on the second temperature data, the processing circuit switches the first capacitance control data corresponding to the first temperature data and the second capacitance control data different from the first capacitance control data in a time-division manner to be output to the variable capacitance circuit. 1. A circuit device comprising:an oscillation circuit that includes a variable capacitance circuit configured by a capacitor array and oscillates at an oscillation frequency corresponding to a capacitance value of the variable capacitance circuit; anda processing circuit to which temperature data obtained by A/D converting a temperature detection voltage from a temperature sensor is input and that performs capacitance control on the variable capacitance circuit based on the temperature data, whereinthe processing circuit receives first temperature data as the temperature data and second temperature data subsequent to the first temperature data and switches first capacitance control data corresponding to the first temperature data and second capacitance control data different from the first capacitance control data in a time-division manner in a period between a start of capacitance control based on the first temperature data and a start of capacitance control based on the second temperature data to be output to the variable capacitance circuit.2. The circuit device according to claim 1 , ...

INTEGRATED CIRCUIT COMPRISING A FREQUENCY DEPENDENT CIRCUIT, WIRELESS DEVICE AND METHOD OF ADJUSTING A FREQUENCY

An integrated circuit comprises a frequency dependent circuit comprising an input node, an output node and a main bank of selectable first capacitive elements that affect a frequency characteristic of the frequency dependent circuit. The frequency dependent circuit further comprises at least one shunt bank of selectable second capacitive elements located between ground and one of the input node or the output node, wherein at least one selectable second capacitive element switched out of the frequency dependent circuit is based on a number of the selectable first capacitive elements that are switched into the frequency dependent circuit. 1. An integrated circuit for a wireless device , the integrated circuit comprising a frequency dependent circuit comprising:an input node;an output node;a main bank of selectable first capacitive elements that affect a frequency characteristic of the frequency dependent circuit,at least one shunt bank of selectable second capacitive elements located between ground and one of the input node or the output node,a controller operable to selectively enable or disable at least one selectable second capacitive element as a function of a number of the selectable first capacitive elements that are switched into the frequency dependent circuit.2. The integrated circuit of claim 1 , wherein the selectable second capacitive element(s) enabled or disabled are a function of a parasitic capacitance effect due to the number of the selectable first capacitive elements that are switched into the frequency dependent circuit.3. The integrated circuit of claim 1 , wherein the at least one shunt bank of selectable second capacitive elements comprises a first shunt bank of selectable second capacitive elements located between ground and the input node and a second shunt bank of selectable second capacitive elements located between ground and the output node.4. The integrated circuit of claim 3 , wherein the controller is arranged to switch out ...

CLASS-E POWER OSCILLATOR

A class-E power oscillator (PO) is disclosed. The class-E PO includes a first inductor, a switch, a first capacitor, a resonant circuit, and a feedback network. The first inductor is coupled in series to a first power supply. The switch is connected between the first inductor and a primary common node. The first capacitor is connected between the first inductor and the primary common node. The resonant circuit includes a second inductor, a second capacitor, and a resistor. The second inductor is connected between the first inductor and the primary common node. The second capacitor is connected between the first inductor and the primary common node, and is coupled in series to the second inductor. The resistor is connected between the first inductor and the primary common node, and is coupled in series to the second inductor. The feedback network is connected between the switch and a feedback node. The feedback node is located between the second inductor and the second capacitor. The feedback network is configured to periodically turn the switch on and off based on a resonance frequency of the resonant circuit. 1. A class-E power oscillator (PO) , comprising:a first inductor coupled in series to a first power supply;a switch connected between the first inductor and a primary common node, the primary common node connected to one of a second power supply or ground;a first capacitor connected between the first inductor and the primary common node; a second inductor connected between the first inductor and the primary common node;', 'a second capacitor connected between the first inductor and the primary common node, the second capacitor coupled in series to the second inductor; and', 'a resistor connected between the first inductor and the primary common node, the resistor coupled to one of the second inductor and the second capacitor; and, 'a resonant circuit comprisinga feedback network connected between the switch and a feedback node located between the second ...

Methods and Apparatus for a Low Power Relaxation Oscillator

In a described example, an apparatus includes: a capacitor coupled to receive a current at a first terminal and having a second terminal coupled to ground; a first comparator coupled to a voltage at the first terminal of the capacitor and to a first reference voltage; a second comparator coupled to the voltage at the first terminal of the capacitor and to a second reference voltage that is different from the first reference voltage, and having an enable input coupled to the output of the first comparator; a discharge circuit coupled to the capacitor and enabled by the output of the second comparator; and a toggle circuit coupled to the output of the second comparator. Methods are disclosed. 1. An apparatus , comprising:a capacitor coupled to receive a current at a first terminal and having a second terminal coupled to ground;a first comparator coupled to a voltage at the first terminal of the capacitor and to a first reference voltage;a second comparator coupled to the voltage at the first terminal of the capacitor and to a second reference voltage different from the first reference voltage, and having an enable input coupled to an output of the first comparator, and having an output;a discharge circuit coupled to the capacitor and enabled by the output of the second comparator; anda toggle circuit coupled to the output of the second comparator, and outputting a periodic signal.2. The apparatus of in which the first comparator is a low power comparator with a first delay time claim 1 , and the second comparator is a high power comparator with a second delay time that is shorter than the first delay time.3. The apparatus of claim 1 , and further including:a current reference source; anda first current mirror coupled to the current reference source and to the first terminal of the capacitor, configured to charge the capacitor with a current equal to the current reference source.4. The apparatus of and further including:a second current mirror coupled to the current ...

Semiconductor integrated circuit device

A semiconductor integrated circuit device includes a first terminal arranged to accept an external input of an analog input signal, an amplifier configured to amplify the analog input signal to generate an amplified signal, a logic unit configured to generate a digital output signal that is in accordance with the amplified signal, and a second terminal arranged to externally output an analog output signal that is in accordance with the amplified signal. The first terminal is disposed at a first side of a package, and the second terminal is disposed at a second side which is different from the first side.

LOW TEMPERATURE COEFFICIENT CLOCK SIGNAL GENERATOR

A relaxation oscillator for generating a low temperature coefficient (LTC) clock signal includes a reference voltage generator and an oscillator. The reference voltage generator generates an LTC current and a bandgap reference voltage. The reference voltage generator includes positive temperature coefficient (PTC) resistors to compensate for the effects of temperature variations. The oscillator receives the LTC current and the bandgap reference voltage, and generates a clock signal. In another embodiment, the reference voltage generator generates a charge current that varies with temperature. The oscillator receives the charge current and generates first and second output signals. Set and reset comparators include PTC resistors that determine the gains of the set and reset comparators. The PTC resistors compensate for variation in the first and second output signals due to the temperature variations by varying the gains of the set and reset comparators. 1. A relaxation oscillator circuit for generating a low temperature coefficient (LTC) clock signal , comprising:a first transistor having a source terminal connected to a supply voltage, and a drain terminal that outputs a first LTC current;a first current path comprising first and second series connected resistors, wherein the first resistor has a first terminal that is connected to the drain terminal of the first transistor to receive a first proportional-to-absolute-temperature (PTAT) current, wherein a bandgap voltage is output at a first node formed by a connection of the first terminal of the first resistor and the drain terminal of the first transistor, and wherein a first voltage is output at a second node formed by a connection of a second terminal of the first resistor and a first terminal of the second resistor;a second current path comprising a third resistor, wherein the third resistor has a first terminal connected to the drain terminal of the first transistor to receive a second PTAT current;a second ...

PHASED ARRAY MODULAR HIGH-FREQUENCY SOURCE

Embodiments described herein include a modular high-frequency emission source comprising a plurality of high-frequency emission modules and a phase controller. In an embodiment, each high-frequency emission module comprises an oscillator module, an amplification module, and an applicator. In an embodiment, each oscillator module comprises a voltage control circuit and a voltage controlled oscillator. In an embodiment, each amplification module is coupled to an oscillator module, in an embodiment, each applicator is coupled to an amplification module. In an embodiment, the phase controller is communicatively coupled to each oscillator module. 1. A modular high-frequency emission source , comprising: an oscillator module;', 'an amplification module; and', 'an applicator; and, 'a plurality of high-frequency emission modules, wherein each high-frequency emission module comprisesa phase controller communicatively coupled to each oscillator module.2. The modular high-frequency emission source of claim 1 , wherein the applicator of each high-frequency emission module is part of a phased array.3. The modular high-frequency emission source of claim 2 , wherein the phase controller controls a phase relationship of electromagnetic radiation generated by the oscillator modules in order to form an electromagnetic radiation pattern emitted by the phased array.4. The modular high-frequency emission source of claim 3 , wherein the electromagnetic radiation pattern is a static pattern.5. The modular high-frequency emission source of claim 3 , wherein the electromagnetic radiation pattern is a dynamic pattern.6. The modular high-frequency emission source of claim 1 , wherein the high-frequency is a microwave frequency.7. The modular high-frequency emission source of claim 1 , wherein the high-frequency is 0.1 MHz to 300 GHz.8. A modular high-frequency emission source claim 1 , comprising: an oscillator module;', 'an amplification module; and, 'a plurality of high-frequency emission ...

RC OSCILLATOR

An oscillator includes an oscillating circuit having an input and an output configured to oscillate between a first state and a second state. The oscillating circuit includes a resistor-capacitor circuit configured to bias the oscillating circuit input towards a target voltage. The oscillating circuit is configured to transition the oscillating circuit output from the first state to the second state in response to the oscillating circuit input reaching a threshold voltage before it reaches the target voltage. Another oscillator includes an oscillating circuit having an input and an output configured to oscillate between the first state and the second state. The oscillating circuit is configured to transition the oscillating circuit output from the first state to the second state in response to the oscillating circuit input reaching a threshold voltage. A starting circuit is configured to set the oscillating circuit input to the threshold voltage to start the oscillating circuit. 1. An oscillator , comprising:an oscillating circuit having an input and an output configured to oscillate between a first state and a second state, wherein the oscillating circuit comprises a resistor-capacitor circuit configured to bias the oscillating circuit input towards a target voltage, andwherein the oscillating circuit is configured to transition the oscillating circuit output from the first state to the second state in response to the oscillating circuit input reaching a threshold voltage before the oscillating circuit input reaches the target voltage.2. The oscillator of claim 1 , further comprising a starting circuit configured to set the oscillating circuit input at the threshold voltage in a standby mode.3. The oscillator of claim 2 , wherein the starting circuit is configured to set the oscillating circuit input at the threshold voltage in the standby mode by operating with the oscillating circuit claim 2 , which functions as a voltage divider.4. The oscillator of claim 2 , ...

FEEDBACK COMPENSATED OSCILLATOR

An oscillator produces an oscillator output signal usable as a clock signal, otherwise as a frequency reference on an integrated circuit. The oscillator includes an RC network with a voltage-controlled element, such as a voltage-controlled resistor, voltage-controlled capacitor or a combination including a voltage-controlled resistor and voltage-controlled capacitor. Also, a tunable element having an adjustable resistance determined by a first static parameter is included in the RC network. The oscillator also includes a feedback circuit which can include a frequency-to-voltage converter. The feedback circuit generates a control signal for the voltage-controlled element. The feedback circuit includes a feedback reference circuit having a reference output determined by a second static parameter, and a loop amplifier responsive to the reference output and the oscillator output signal. 1. A clock circuit , comprising:an oscillator that produces an oscillator output signal, the oscillator including an RC network with a voltage-controlled element, and a tunable element having an adjustable resistance based on a first static parameter; anda feedback circuit coupled to the oscillator, which generates a control signal for the voltage-controlled element, the feedback circuit including a feedback reference circuit having a stabilized reference output, and a loop amplifier responsive to the reference output and the oscillator output signal.2. The clock circuit of claim 1 , including nonvolatile memory connected to the tunable element storing the first static parameter.3. The clock circuit of claim 1 , wherein the feedback reference circuit generates the stabilized reference output at a voltage level based on a second static parameter claim 1 , and including nonvolatile memory connected to the feedback reference circuit storing the second static parameter.4. The clock circuit of claim 3 , including a non-volatile memory array on a same integrated circuit with the oscillator ...

RELAXATION OSCILLATOR CIRCUIT WITH PROCESS VARIATION COMPENSATION

An oscillator includes a charging circuit to charge and discharge a capacitive node, and a detector having a trigger point, and an input node operatively coupled to the capacitive node. The detector can comprise an inverter generating a detector output as a function of the trigger point and a voltage on the capacitive node, including means for reducing variation in the trigger point as a consequence of process variation a control circuit to alternately enable the charging circuit to charge the capacitive node and to discharge the capacitive node in response to changes in the detector output, and to provide an oscillator output signal. 1. An oscillator , comprising:a charging circuit to charge and discharge a capacitive node;a detector having a trigger point, and an input node operatively coupled to the capacitive node, generating a detector output as a function of the trigger point and a voltage on the capacitive node, including means for reducing variation in the trigger point as a consequence of process variation; anda control circuit to alternately enable the charging circuit to charge the capacitive node and to discharge the capacitive node in response to changes in the detector output, and to provide an oscillator output signal.2. The oscillator of claim 1 , wherein the means for reducing variation comprises a circuit that opposes changes in the detector output during a part of a transition of an input voltage on the input node of the detector.3. The oscillator of claim 1 , wherein the detector comprises an inverter including a circuit to provide pull down current on the detector output in response to a transition of an input voltage on the input node above the trigger point claim 1 , and the means for reducing variation in the trigger point comprises a circuit to provide current to enhance the pull down current during a first part of the transition and to oppose the pull down current during a second part of the transition.4. The oscillator of claim 3 , wherein ...

CLOCK SIGNAL GENERATING CIRCUIT

A clock signal generating circuit includes: an oscillator having a trimming function of arbitrarily adjusting an oscillation frequency of a first clock signal generated by the oscillator depending on trimming data; and a trimming data modulation part configured to dynamically change a reference trimming data for adjusting the oscillation frequency of the first clock signal to generate modulation trimming data, and output the modulation trimming data, as the trimming data, to the oscillator. 1. A clock signal generating circuit , comprising:an oscillator configured to have a trimming function of arbitrarily adjusting an oscillation frequency of a first clock signal generated by the oscillator depending on trimming data; anda trimming data modulation part configured to dynamically change a reference trimming data for adjusting the oscillation frequency of the first clock signal to generate modulation trimming data, and output the modulation trimming data, as the trimming data, to the oscillator.2. The circuit of claim 1 , further comprising a counter configured to count the number of pulses of the first clock signal to output a counter value claim 1 ,wherein the trimming data modulation part is configured to switch a data value of the modulation trimming data at a frequency change timing based on the counter value.3. The circuit of claim 1 , further comprising:a second oscillator configured to generate a second clock signal having a fixed oscillation frequency; anda counter configured to count the number of pulses of the second clock signal to output a counter value,wherein the trimming data modulation part is configured to switch a data value of the modulation trimming data at a frequency change timing based on the counter value.4. The circuit of claim 3 , wherein the second oscillator is configured to have a trimming function for arbitrarily adjusting an oscillation frequency of the second clock signal generated by the second oscillator itself claim 3 , depending on ...

OSCILLATING SIGNAL GENERATOR CIRCUIT

An oscillating signal generator circuit includes an oscillator circuit, a feedback circuit, and a voltage regulator circuit. The oscillator circuit is configured to generate a first and second oscillating signal at a first and second output terminal according to a first reference voltage. The first and second oscillating signals are a differential pair of signals. The oscillator circuit includes a common mode sensing circuit coupled between the first and second output terminals. The common mode sensing circuit is configured to sense a common mode component of the first and second oscillating signals so as to generate a sense voltage. The feedback circuit, coupled to the common mode sensing circuit, is configured to generate a feedback voltage according to the sense voltage. The voltage regulator circuit is coupled to the oscillator circuit and the feedback circuit, and configured to regulate a supply voltage so as to generate the first reference voltage. 1. An oscillating signal generator circuit , comprising:an oscillator circuit, having a first output terminal and a second output terminal, and configured to generate a first oscillating signal and a second oscillating signal respectively at the first output terminal and the second output terminal according to a first reference voltage, the first oscillating signal and the second oscillating signal being a differential pair of signals, wherein the oscillator circuit includes a common mode sensing circuit coupled between the first output terminal and the second output terminal, and the common mode sensing circuit is configured to sense a common mode component of the first oscillating signal and the second oscillating signal so as to generate a sense voltage;a feedback circuit, coupled to the common mode sensing circuit and configured to generate a feedback voltage according to the sense voltage; anda voltage regulator circuit, coupled to the oscillator circuit and the feedback circuit, and configured to regulate a ...

RC OSCILLATOR

A method includes using a current source to provide a charging current to a capacitor of a resistor-capacitor (RC) tank of an RC oscillator. The method includes using a resistor of the current source as a resistor for the RC tank. 1. A method comprising:using a current source to provide a charging current to a capacitor of a resistor-capacitor (RC) tank of an RC oscillator;using a resistor of the current source as a resistor for the RC tank; andcommunicating the charging current to the capacitor using a charging path, wherein using the charging path comprises communicating the charging current to the capacitor using an amplifier and using the amplifier to amplify the voltage to generate a signal to turn on a discharge path to discharge the capacitor.2. The method of claim 1 , further comprising using a resistance of the resistor to regulate the charging current.3. The method of claim 1 , wherein using the resistor comprises:providing a first transistor having a controlled current path in series with the resistor;providing a second transistor having a controlled current path in series with the capacitor; andcoupling control terminals of the first and second transistors together.4. The method of claim 3 , wherein the coupling comprises:providing a transistor having a current control path in series with the resistor; andcoupling a control terminal of the transistor to a node of the current source.5. The method of claim 1 , further comprising:using the RC oscillator to in a clock system for an electronic device to provide a relatively low frequency clock signal to change a state of an analog component of the electronic device and using a clock source of the clock system other than the RC oscillator to provide a relatively high frequency clock signal to change a state of a digital component of the electronic device.6. (canceled)7. The method of claim 1 , further comprising activating a transistor to discharge the capacitor.8. The method of claim 1 , wherein using the ...

DELAY CIRCUIT, OSCILLATION CIRCUIT, AND SEMICONDUCTOR DEVICE

Provided is a voltage regulator which consumes low power and uses an NMOS transistor as an output transistor. A delay circuit includes, between a constant current circuit and a capacitor, a depletion type NMOS transistor having a gate and a back gate each connected to a ground terminal, the constant current circuit including a depletion type NMOS transistor and a resistor connected between each of a gate and a back gate of the depletion type NMOS transistor and a source thereof. 1. A delay circuit , comprising:a first NMOS transistor including a source connected to a ground terminal, and a gate to which an input signal is input;a capacitor connected between a drain of the first NMOS transistor and the ground terminal;a constant current circuit configured to cause a current to flow through the capacitor;a first inverter including an input connected to an output terminal of the constant current circuit;a second inverter including an input connected to an output terminal of the first inverter;a first depletion type NMOS transistor including a gate and a back gate each connected to the ground terminal, and a source connected to the drain of the first NMOS transistor;a second NMOS transistor including a source connected to the ground terminal, a drain connected to the output terminal of the constant current circuit, and a gate to which the input signal is input;a third NMOS transistor including a gate connected to the output terminal of the first inverter, a source and a back gate each connected to a drain of the first depletion type NMOS transistor, and a drain connected to the output terminal of the constant current circuit; anda fourth NMOS transistor including a source connected to the ground terminal, a gate connected to an output terminal of the second inverter, and a drain connected to the drain of the first NMOS transistor, a second depletion type NMOS transistor; and', 'a resistor connected between each of a gate and a back gate of the second depletion type NMOS ...

APPARATUSES AND METHODS FOR PROVIDING OSCILLATION SIGNALS

Apparatuses and methods are disclosed for oscillators that are substantially insensitive to supply voltage variations. In one such example apparatus, a capacitance circuit is configured to be charged and discharged. Charging and discharging circuits are coupled to the capacitance circuit and configured to charge and discharge, respectively, the capacitance circuit by charging and discharging currents responsive to charge and discharge signals. A control circuit is coupled to the charging circuit and the discharging circuit, and is configured to provide the charge and discharge signals responsive to a voltage of the capacitance circuit, and is further configured to provide an oscillation signal responsive to the voltage of the capacitance circuit. The charging current, the discharging current, or both the charging and discharging currents are proportional to a difference between a first reference voltage and a second reference voltage. 1. An apparatus comprising:a capacitance circuit;a charging circuit configured to charge the capacitance circuit by a charging current;a discharging circuit configured to discharge the capacitance circuit by a discharging current;a reference circuit configured to pass a reference current through a current path and provide a first reference voltage from a first circuit node on the current path, and wherein at least one of the charging current or the discharging current is generated based on the reference current;a first comparator configured to provide a first control signal by comparing a voltage of the capacitance circuit with the first reference voltage; anda logic circuit configured to provide an oscillation signal in response to the first control signal.2. The apparatus as claimed in claim 1 , wherein the other of the charging current and the discharging current is provided irrespective of the reference current.3. The apparatus as claimed in claim 2 , wherein the other of the charging current and the discharging current is greater ...

An oscillator with improved frequency stability

There is provided an oscillator, having an input terminal (In) and an output terminal (Out), comprising a first signal delay circuit ( 104 a - d ), having a first voltage response characteristic, configured to provide a predetermined first propagation delay; a second signal delay circuit ( 104 e, 108, 110 ), having a second voltage response characteristic that is inversely correlated to said first voltage response characteristic, operatively coupled with said first signal delay circuit and configured to provide a predetermined second propagation delay, and wherein said predetermined first propagation delay and said predetermined second propagation delay are temporally matched, so as to generate an oscillating output signal (Out) of a predetermined frequency.

VOLTAGE-CONTROLLED OSCILLATOR WITH MASK-SELECTABLE PERFORMANCE

An apparatus having a substrate with an inductor, a first die and a second die is disclosed. The first die may be (i) mounted on the substrate, (ii) configured to vary a frequency of a signal in the inductor, and (iii) fabricated with multiple first masks. The second die may be (i) mounted on the substrate, (ii) configured to excite the signal, and (iii) fabricated with multiple second masks. A particular one of the first masks generally has several designs that customize the first die to several configurations respectively. A particular one of the second masks may have several designs that customize the second die to several configurations respectively. The first die, the second die and the inductor may form a voltage-controlled oscillator. A selected first design and a selected second design generally establish multiple performances of the voltage-controlled oscillator. 1. An apparatus comprising:a substrate having an inductor;a first die (i) mounted on said substrate, (ii) configured to vary a frequency of a signal in said inductor, and (iii) fabricated with a plurality of first masks; anda second die (i) mounted on said substrate, (ii) configured to excite said signal, and (iii) fabricated with a plurality of second masks, wherein (a) a particular one of said first masks has a plurality of first designs that customize said first die to a plurality of first configurations respectively, (b) a particular one of said second masks has a plurality of second designs that customize said second die to a plurality of second configurations respectively, (c) said first die, said second die and said inductor form a voltage-controlled oscillator, and (d) a selected one of said first designs and a selected one of said second designs establish a plurality of performances of said voltage-controlled oscillator.2. The apparatus according to claim 1 , wherein (i) said substrate has a plurality of third masks claim 1 , and (ii) a particular one of said third masks has a plurality of ...

APPARATUSES AND METHODS FOR TEMPERATURE INDEPENDENT OSCILLATORS

Apparatuses and methods for temperature independent oscillator circuits are disclosed herein. An example apparatus may include a pulse generator circuit configured to provide a periodic pulse based on the charging and discharging and discharging of a capacitor and further based on a reference voltage. The pulse generator circuit may include a capacitor coupled between a first reference voltage and a first node, wherein the capacitor is configured to be charged and discharged through the node in response to the periodic pulse, a resistor and a diode coupled in series between a second node and a second reference voltage, and a comparator coupled to the first and second nodes and configured to provide the periodic pulse based on voltages on the first and second nodes, wherein a period of the periodic pulse is based at least on the resistor and the a current. 1. An apparatus , comprising: the capacitor coupled to a first node, wherein the capacitor is configured to be charged and discharged through the first node in response to the periodic pulse;', 'a resistor and a diode coupled to a second node; and', 'a comparator coupled to the first and second nodes and configured to provide the periodic pulse based at least on the resistor and a current., 'a pulse generator circuit configured to provide a periodic pulse based on charging and discharging of a capacitor, the pulse generator circuit comprising2. The apparatus of claim 1 , wherein a voltage of the first node is time-varying and a voltage of the second node is constant.3. The apparatus of claim 1 , further comprising:a flip-flop coupled to an output of the comparator.4. The apparatus of claim 3 , wherein the flip-flop is configured to provide an oscillating signal in response to the periodic pulse claim 3 , andwherein a period of the oscillating signal is based on a period of the periodic pulse.5. The apparatus of claim 1 , wherein the pulse generator circuit is further configured to provide the periodic pulse based ...

SCALABLE TERAHERTZ PHASED ARRAY AND METHOD

A device and method for terahertz signal generation are disclosed. Oscillators are arranged in a two-dimensional array, each oscillator connected to a corresponding antenna. Each oscillator is unidirectional connected to its adjacent oscillators by a phase shifter. A method for generating a steerable terahertz signal utilizes an array of oscillators connected by corresponding phase shifters. A terahertz signal having a fundamental frequency is generated using the array. The phase shift of one or more of the phase shifters is varied in order to vary the fundamental frequency and/or steer the signal generated by the array. 1. A device for terahertz signal generation , comprising:a plurality of oscillators arranged in a two-dimensional array, each oscillator having an input, an antenna line, and an output, and wherein each oscillator has a fundamental frequency that is substantially the same as the other oscillators;a plurality of antennae, each antenna being connected to the antenna line of a corresponding oscillator of the plurality of oscillators; anda plurality of unidirectional phase shifters, each phase shifter connected between adjacent oscillators of the plurality of oscillators from the output of an oscillator to the input of an adjacent oscillator;wherein each oscillator is connected to each adjacent oscillator in the array by at least one phase shifter, the input of each oscillator being connected to an equivalent number of phase shifters as the corresponding output, and the input of each oscillator being connected to an equivalent number of phase shifters as each input of the other oscillators of the plurality of oscillators.2. The device of claim 1 , wherein each oscillator is a cross-coupled pair of transistors.3. The device of claim 2 , wherein the coupled pair includes a first transistor and a second transistor claim 2 , and wherein:a first transmission line connects a gate of the first transistor to a drain of the second transistor;a second ...

Dual-Mode Oscillator and Multi-Phase Oscillator

A dual-mode oscillator and a multi-phase oscillator includes a mode switching circuit to switch between two operating modes and obtain oscillation signals having two different bands. The dual-mode oscillator also includes two transformer-coupled oscillators and a step-up transformer in the transformer-coupled oscillators where the step-up transformer multiplies a drain voltage swing of a first MOS transistor and then injects a voltage signal to a gate of a second MOS transistor to obtain a larger gate voltage swing without increasing a supply voltage of the oscillator. The dual-mode oscillators are connected through multi-phase coupled circuits to form a Mobius loop.

Oscillation device, scanning-type scanner device, information terminal, phase-shift amount adjustment device, and phase-shift amount adjustment method

An oscillation device includes an oscillator, an oscillation detection unit that detects oscillation of the oscillator and outputs an oscillation detection signal, and a drive unit that generates a drive signal in keeping with the oscillation detection signal and outputs the drive signal to the oscillator. The drive unit includes a phase shift unit that shifts the phase to provide the drive signal as positive feedback to the oscillator. The phase shift unit includes a disturbance generating unit that outputs the periodic signal, a fluctuation unit that causes the amount of phase shift to fluctuate based on the periodic signal, a drive amplitude detection unit that detects the amplitude of the drive signal and outputs a drive amplitude signal, a product detection unit that outputs a detection signal after performing product detection on the drive amplitude signal based on the periodic signal, and an adjustment unit that adjusts the phase-shift amount based on the detection signal.

RC Oscillator That Uses Thermometer Codes to Select a Sub-Array and Binary Codes to Select Capacitors or Resistors Within a Sub-Array for Linear and Monotonic Tuning

An RC oscillator has a variable capacitor that sets the output frequency. The variable capacitor has m binary-weighted switched capacitor arrays, and each binary-weighted switched capacitor array has binary-weighted capacitors. p binary bits are decoded into an m-bit thermometer code that selects one of the m binary-weighted switched capacitor arrays to use n binary bits to switch its binary-weighted capacitors. Other binary-weighted switched capacitor arrays have all their capacitors switched on, or all their capacitors switched off by the thermometer code. The smallest or unit capacitance of each binary-weighted switched capacitor array is adjusted to compensate for the non-linear reciprocal relationship of frequency being proportional to 1/RC. The unit capacitance is increased for each successive binary-weighted switched capacitor array to reset to the ideal linear relationship of the (p,n)-bit code to frequency. 1. A compensating oscillator comprising:a summing node that is charged using a resistance;a comparison buffer that toggles an output when the summing node crosses a target;a variable capacitor coupled to connect a variable capacitance to the summing node, the variable capacitance selectable using a code word having an upper m bits and a lower n bits;wherein the upper m bits comprise a thermometer code, and wherein the lower n bits comprise a binary code;a discharge device, receiving the output, for discharging the summing node in response to the output;wherein the variable capacitor comprises:a plurality of binary-weighted switched capacitor arrays, wherein each binary-weighted switched capacitor array in the plurality of binary-weighted switched capacitor array is selected by a bit in the thermometer code of the upper m bits;wherein each binary-weighted switched capacitor array in the plurality of binary-weighted switched capacitor arrays comprises:a plurality switched capacitors having capacitances that are binary multiples of a unit capacitance of a ...

SEMICONDUCTOR DEVICE

A semiconductor device is formed by sealing, with a resin, a semiconductor chip (CP) having an oscillation circuit utilizing a reference resistor. The oscillation circuit generates a reference current by utilizing the reference resistor, a voltage is generated in accordance with this reference current and an oscillation frequency of the oscillation unit, and the oscillation unit oscillates at a frequency in accordance with the generated voltage. The reference resistor is formed of a plurality of resistors, which extend in a first (Y) direction orthogonal to a first side, inside a first region (RG, RG, RG, and RG) surrounded by the first side (S, S, S, and S) of a main surface of the semiconductor chip (CP), a first line (, and ) connecting between one end of the first side and the center (CT) of the main surface of the semiconductor chip, and a second line (, and ) connecting between the other end of the first side and the center of the main surface of the semiconductor chip. 118-. (canceled)19. A semiconductor device provided with a semiconductor chip sealed with a resin ,wherein the semiconductor chip has an oscillation circuit, a voltage-current converting unit which converts a voltage into a current by utilizing a reference resistor;', 'a voltage generating unit which generates a voltage in accordance with an input current from the voltage-current converting unit and an oscillation frequency of an oscillation unit; and', 'the oscillation unit which oscillates at a frequency in accordance with an input voltage from the voltage generating unit,, 'the oscillation circuit hasin the voltage-current converting unit, a reference current is generated by applying a reference voltage to the reference resistor, and a current in accordance with the reference current is inputted to the voltage generating unit as the input current,in a main surface of the semiconductor chip, the reference resistor is formed of a plurality of resistors connected in series inside a first region ...

CLOCK SIGNAL GENERATION CIRCUIT, DETECTION DEVICE, SENSOR, ELECTRONIC APPARATUS, AND MOVING OBJECT

A clock signal generation circuit includes a CR oscillator circuit having a capacitor, a resistor, and an amplifier circuit, and a voltage generation circuit adapted to generate a power supply voltage, and then supply the CR oscillator circuit with the power supply voltage VDOS. An oscillation frequency of the CR oscillator circuit in a case in which a power supply voltage VDDL is a fixed voltage has a positive temperature characteristic. The voltage generation circuit generates the power supply voltage VDOS having a negative temperature characteristic based on a work function difference between transistors, and then supplies the power supply voltage VDOS as a power of the amplifier circuit of the CR oscillator circuit. 1. A clock signal generation circuit comprising:a CR oscillator circuit including a capacitor, a resistor, and an amplifier circuit; anda voltage generation circuit adapted to generate a power supply voltage, and supply the CR oscillator circuit with the power supply voltage,wherein an oscillation frequency of the CR oscillator circuit in a case in which the power supply voltage is a fixed voltage has a positive temperature characteristic, andthe voltage generation circuit generates the power supply voltage having a negative temperature characteristic based on a work function difference between transistors, and supplies the power supply voltage as a power for the amplifier circuit of the CR oscillator circuit.2. The clock signal generation circuit according to claim 1 , wherein a plurality of resistor elements and a reference resistor element connected in series to each other,', 'a plurality of fuse elements disposed corresponding respectively to the resistor elements in parallel to the corresponding resistor elements, and', 'a trimming auxiliary switch disposed in parallel to the reference resistor element, set to an OFF state in a first measurement mode of an oscillation frequency before cutting the fuse element, and set to an ON state in a second ...

FILM BULK ACOUSTIC RESONATOR OSCILLATORS AND GAS SENSING SYSTEMS USING THE SAME

A resonator oscillator that may be included in a gas sensing system may include an oscillator that may be electrically connected to an external resonator through a conductive line. The oscillator may generate an oscillating signal having a frequency corresponding to a resonance frequency of the external resonator in an oscillating path. A spurious resonance removal circuit on the oscillating path may remove spurious resonance caused by the conductive line from the oscillating path. A gas sensing system may include the oscillator, a resonator that includes a sensor configured to sense a gas, and a frequency counting logic that receives the oscillating signal and a reference clock signal, performs a counting operation on the oscillating signal according to a logic state of the reference clock signal to generate a counted value, and generate a gas sensing output indicating a sensed gas based on the counted value. 1. An oscillator electrically connected to an external resonator through a conductive line , the oscillator comprising:a first cross-coupled amplifier including a first transistor having a gate connected to a first output terminal of the oscillator and a second transistor having a gate connected to a second output terminal of the oscillator, the first cross-coupled amplifier configured to establish an oscillating path; anda spurious resonance removal circuit including at least one circuit device on the oscillating path in the first cross-coupled amplifier, the spurious resonance removal circuit configured to remove spurious resonance caused by the conductive line.2. The oscillator of claim 1 , wherein claim 1 ,the oscillating path includes a first oscillating path between the gate of the first transistor and the first output terminal, andthe spurious resonance removal circuit includes a first resistor between the gate of the first transistor and the first output terminal.3. The oscillator of claim 2 , wherein the spurious resonance removal circuit further ...

POWER AND SIGNAL-TO-NOISE RATIO REGULATION IN A VCO-ADC

A voltage-controlled oscillator analog-to-digital converter (VCO-ADC) includes a first source follower coupled between a first input terminal and a first internal node; a first VCO having an input coupled to a second internal node; a first variable resistor coupled between the first internal node and the second internal node; and a digital signal processing component coupled between an output of the first VCO and a output terminal. 1. A voltage-controlled oscillator analog-to-digital converter (VCO-ADC) comprising:a first source follower coupled between a first input terminal and a first internal node;a first VCO having an input coupled to a second internal node;a first variable resistor coupled between the first internal node and the second internal node; anda digital signal processing component coupled between an output of the first VCO and a output terminal.2. The VCO-ADC of further comprising:a second source follower coupled between a second input terminal and a third internal node;a second VCO having an input coupled to a fourth internal node and an output coupled to the digital signal processing component; anda second variable resistor coupled between the third internal node and the fourth internal node.3. The VCO-ADC of claim 1 , wherein the first source follower comprises an NMOS source follower.4. The VCO-ADC of claim 1 , wherein the first source follower comprises a PMOS source follower.5. The VCO-ADC of claim 1 , wherein the first variable resistor comprises a plurality of switchable resistor components each having a control signal input.6. The VCO-ADC of claim 1 , wherein the digital signal processing component comprises a counter.7. A voltage-controlled oscillator (VCO) circuit comprising:a source follower;a variable resistor having a control signal input; anda VCO,wherein a current path of the VCO, a current path of the variable resistor, and a current path of the source follower are in series communication.8. The VCO circuit of claim 7 , wherein the ...

MULTIPLE ADJACENT SLICEWISE LAYOUT OF VOLTAGE-CONTROLLED OSCILLATOR

Methods and systems are described for generating multiple phases of a local clock at a controllable variable frequency, using loop-connected strings of active circuit elements. A specific embodiment incorporates a loop of four active circuit elements, each element providing true and complement outputs that are cross-coupled to maintain a fixed phase relationship, and feed-forward connections at each loop node to facilitate high frequency operation. A particular physical layout is described that maximizes operating frequency and minimizes clock pertubations caused by unbalanced or asymmetric signal paths and parasitic node capacitances. 1. An apparatus comprising:a plurality of voltage controlled oscillator (VCO) stages laterally arranged along a first dimension wherein each VCO stage is configured to provide a respective VCO phase and is arranged next to a corresponding complementary VCO stage that is configured to provide an opposite VCO phase, each VCO stage comprising inverters having groups of PMOS, NMOS, and capacitive coupling circuit components grouped by circuit component type along a second dimension, the groups of PMOS and NMOS circuit components separated by an interconnection grid and the capacitive coupling circuit components arranged adjacently to the group of PMOS circuit components;the interconnection grid located between the groups of PMOS and NMOS circuit components, and comprising inter-segment connections between circuit components of different VCO stages and intra-segment connections between circuit components within each VCO stage.2. The apparatus of claim 1 , wherein each VCO stage comprises a primary path inverter claim 1 , a cross-coupled inverter claim 1 , and a buffer inverter.3. The apparatus of claim 1 , wherein the cross-coupled inverter is 0.4× a size of the primary path inverter.4. The apparatus of claim 2 , wherein the VCO output of each VCO stage is AC-coupled to the PMOS circuit component of the buffer inverter via the capacitive ...

SELF-BIASING INTEGRATED OSCILLATOR WITHOUT BANDGAP REFERENCE

An integrated oscillator has an R-S flipflop; a first and second capacitor; a current source transistor; first and second current-steering transistors, each having a source coupled to the current source transistor, with drains coupled to the first and second capacitor respectively. The first current-steering transistor has gate coupled to a first output of the R-S flipflop, and the second current-steering transistor has gate coupled to a second output of the R-S flipflop. The oscillator has a first sense inverter having input from the first capacitor and powered by a feedback circuit adapted to sense voltages on the first and second capacitor; and a second sense inverter having input from the second capacitor and powered by the feedback circuit. The R-S flipflop has a first input coupled to an output of the first sense inverter and a second input coupled to an output of the second sense inverter. 1. An integrated oscillator comprising:an R-S flipflop;a first and a second capacitor;a first current source transistor having a drain and a gate;a first and a second current-steering transistor, each having a source coupled to the drain of the first current source transistor, a drain of the first current-steering transistor coupled to the first capacitor, and a drain of the second current-steering transistor coupled to the second capacitor, the first current-steering transistor having a gate coupled to a first output of the R-S flipflop, and the second current-steering transistor having a gate coupled to a second output of the R-S flipflop;a first sense inverter having input coupled to the first capacitor, the first sense inverter being powered by a feedback circuit adapted to sense voltages on the first and second capacitor; anda second sense inverter having input coupled to the second capacitor and powered by the feedback circuit;wherein the R-S flipflop has a first input coupled to an output of the first sense inverter and a second input coupled to an output of the ...

SYSTEMS AND METHODS OF LOW POWER CLOCKING FOR SLEEP MODE RADIOS

Systems and methods of low power docking of sleep mode radios are disclosed herein. In an example embodiment, a crystal oscillator is purposefully mistuned to achieve lower power consumption, and then synchronized using a high frequency crystal oscillator. In an alternative embodiment, the input offset voltages of the comparator in an RC oscillator are cancelled, which allows low power operation and high accuracy performance when tuned to the high frequency crystal. A lower power comparator may be used with higher input offset voltages but still achieve higher accuracy. The RC circuit is switched back and forth on opposite phases of the output, cancelling the offset voltage on the inputs of the comparator. 120-. (canceled)21. A communications apparatus , comprising:a real time unit configured for tracking real time based on a first clock;application circuitry that executes a communications application based on a second clock during an operational mode, said application circuitry configured to enter a sleep mode for a period of real time measured by said real time unit during said sleep mode;a high-accuracy oscillator configured to provide said second clock at a frequency that is higher than a frequency of said first clock;a low-power low-accuracy oscillator (LPLAO) configured to receive a load capacitance less than would be required for said LPLAO to operate at a frequency specified for said first clock, said LPLAO purposely mistuned to provide said first clock using less power but with less accuracy than if correctly tuned; anda calibration unit configured for comparing said first clock with said second clock, and adjusting said tracking in accordance with a digital adjustment amount determined by said comparing.22. The apparatus of claim 21 , wherein said comparing occurs at regular intervals.2328-. (canceled)29. The apparatus of claim 21 , wherein said real time unit and said application circuitry and said high-accuracy oscillator and said calibration unit are ...

RESISTANCE CORRECTION CIRCUIT, RESISTANCE CORRECTION METHOD, AND SEMICONDUCTOR DEVICE

Disclosed is a semiconductor device that suppresses stress-induced resistance value changes. The semiconductor device includes a resistance correction circuit. The resistance correction circuit includes a first resistor whose stress-resistance value relationship is a first relationship, a second resistor whose stress-resistance value relationship is a second relationship, and a correction section that controls the resistance value of a correction target resistor. The correction section detects the difference between the resistance value of the first resistor and the resistance value of the second resistor and corrects, in accordance with the result of detection, the resistance value of the correction target resistor. 111-. (canceled)12. A semiconductor device comprising:an oscillator circuit generating a clock signal; andcircuit blocks operating based on the clock signal, a first resistor whose stress-resistance value relationship is a first relationship;', 'a second resistor whose stress-resistance value relationship is a second relationship;', 'a correction target resistor; and', 'a correction section that controls the resistance value of the correction target resistor,, 'wherein the oscillator circuit comprises a resistance correction circuit includingwherein the correction section detects the difference between the resistance value of the first resistor and the resistance value of the second resistor and corrects, in accordance with the result of detection, the resistance value of the correction target resistor, and the resistance value of the correction target resistor, andwherein the clock signal has a frequency corresponding to the resistance value of the correction target resistor.13. The semiconductor device according to claim 12 , wherein the circuit blocks includes a CPU and a RAM.14. The semiconductor device according to claim 13 , wherein the first relationship and the second relationship differ from each other claim 13 , and the stress-resistance value ...

OSCILLATOR AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

An oscillator may include first to N-th delay signal generation units, each of which delays and inverts an input signal thereof. Each of the first to N-th delay signal generation units includes an inverter suitable for driving a first node with a low level voltage when a voltage of an input node thereof is higher than a first reference voltage, and driving the first node with a high level voltage when the voltage of the input node thereof is lower than the first reference in voltage; a RC delay unit electrically coupled between the first node and a second node, and suitable for to delaying a signal of the first node and outputting the delayed signal of the first node to the second node; and a buffer suitable for outputting a high level signal when a voltage of the second node is higher than a second reference voltage, and outputting a low level signal when the voltage of the second node is lower than the second reference voltage. 1. An oscillator comprising first to N-th delay signal generation units (N being an odd number) , each of which delays and inverts an input signal thereof ,wherein each of the first to N-th delay signal generation units comprises:an inverter suitable for driving a first node with a low level voltage when a voltage of an input node thereof is higher than a first reference voltage, and driving the first node with a high level voltage when the voltage of the input node thereof is lower than the first reference voltage;a RC delay unit electrically coupled between the first node and a second node, and suitable for delaying a signal of the first node and outputting the delayed signal of the first node to the second node; anda buffer suitable for outputting a high level signal when a voltage of the second node is higher than a second reference voltage, and outputting a low level signal when the voltage of the second node is lower than the second reference voltage, wherein the buffer is coupled to the RC delay unit in series.2. The oscillator of ...

CIRCUIT DEVICE, OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT

A circuit device includes an A/D converter that converts a temperature detection voltage from a temperature sensor unit to temperature detection data, and a digital signal processing circuit that executes a temperature compensation process based on the temperature detection data. The A/D converter, in an activation period, may execute a first A/D conversion process to obtain an initial value of the temperature detection data, and in a normal operation period, may execute a second A/D conversion process based on the initial value to obtain the temperature detection data. 1. A circuit device comprising:an A/D converter configured to convert a temperature detection voltage from a temperature sensor unit to a temperature detection data by way of a first A/D conversion process or a second A/D conversion process, wherein the second A/D conversion process is different from the first A/D conversion process; anda digital signal processing circuit configured to execute a temperature compensation process based on the temperature detection data, wherein:during an activation period, the A/D converter is configured to execute the first A/D conversion process and determines an initial value of the temperature detection data, andduring a normal operation period subsequent to the activation period, the A/D converter is configured to execute the second A/D conversion process and determines a subsequent temperature detection data based on the initial value.2. The circuit device according to claim 1 , wherein:in executing the second A/D conversion process, the A/D converter is configured to change a second temperature detection data with respect to a first temperature detection data by a value equal to or less than k×LSB, further whereinthe first temperature detection data is a temperature detection data at a first output timing,the second temperature detection data is a temperature detection data at a second output timing following the first output timing,k is an integer that is less ...

CIRCUIT DEVICE, OSCILLATOR, ELECTRONIC APPARATUS, AND MOVING OBJECT

A circuit device includes a D/A converter, a comparator that compares a temperature detection voltage from a temperature sensor unit with a D/A conversion voltage from the D/A converter, and a processing circuit that executes a determination process based on a comparison result from the comparator, and obtains temperature detection data as a result of A/D conversion of the temperature detection voltage, in which, the processing circuit determines the temperature detection data so that a change in the temperature detection data at a second output timing following a first output timing with respect to the temperature detection data at the first output timing is equal to or less than k×LSB. 1. A circuit device comprising:a D/A converter;a comparator configured to compare a temperature detection voltage from a temperature sensor with a D/A conversion voltage from the D/A converter; anda processing circuit configured to execute a determination process on the basis of a comparison result from the comparator, and configured to obtain temperature detection data as a result of A/D conversion of the temperature detection voltage based on the determination process,wherein, in a case where the minimum resolution of data in A/D conversion is indicated by LSB, the temperature detection data at a first output timing is set as first temperature detection data, and the temperature detection data at a second output timing following the first output timing is set as second temperature detection data, the processing circuit obtains the temperature detection data so that a change in the second temperature detection data with respect to the first temperature detection data is equal to or less than k×LSB (where k is an integer satisfying k Подробнее

APPARATUSES AND METHODS FOR TEMPERATURE INDEPENDENT OSCILLATORS

Apparatuses and methods for temperature independent oscillator circuits are disclosed herein. An example apparatus may include a pulse generator circuit configured to provide a periodic pulse based on the charging and discharging of a capacitor and further based on a reference voltage. The pulse generator circuit may include a capacitor coupled between a first reference voltage and a first node, wherein the capacitor is configured to be charged and discharged through the node in response to the periodic pulse, a resistor and a diode coupled in series between a second node and a second reference voltage, and a comparator coupled to the first and second nodes and configured to provide the periodic pulse based on voltages on the first and second nodes, wherein a period of the periodic pulse is based at least on the resistor and the a current. 1. An apparatus , comprising: the capacitor coupled between the first reference voltage and a first node, wherein the capacitor is configured to be charged and discharged through the first node in response to the periodic pulse;', 'a resistor and a diode coupled in series between a second node and the second reference voltage; and', 'a comparator coupled to the first and second nodes and configured to provide the periodic pulse based on voltages on the first and second nodes, wherein a period of the periodic pulse is based at least on the resistor and a current., 'a pulse generator circuit configured to provide a periodic pulse based on the charging and discharging of a capacitor and further based on first and second reference voltages, the pulse generator comprising2. The apparatus of claim 1 , further comprising:a flip-flop coupled to an output of the comparator and configured to provide an oscillating signal in response to the periodic pulse, wherein a period of the oscillating signal is based on a period of the periodic pulse.3. The apparatus of claim 1 , wherein the pulse generator circuit further comprises a current source ...

SCALABLE TERAHERTZ PHASED ARRAY AND METHOD

A device and method for terahertz signal generation are disclosed. Oscillators are arranged in a two-dimensional array, each oscillator connected to a corresponding antenna. Each oscillator is unidirectional connected to its adjacent oscillators by a phase shifter. A method for generating a steerable terahertz signal utilizes an array of oscillators connected by corresponding phase shifters. A terahertz signal having a fundamental frequency is generated using the array. The phase shift of one or more of the phase shifters is varied in order to vary the fundamental frequency and/or steer the signal generated by the array. 1. A device for terahertz signal generation , comprising:a plurality of oscillators arranged in a two-dimensional array, each oscillator having an input, an antenna line, and an output, and wherein each oscillator has a fundamental frequency that is substantially the same as the other oscillators;a plurality of antennae, each antenna being connected to the antenna line of a corresponding oscillator of the plurality of oscillators; anda plurality of unidirectional phase shifters, each phase shifter connected between adjacent oscillators of the plurality of oscillators from the output of an oscillator to the input of an adjacent oscillator;wherein each oscillator is connected to each adjacent oscillator in the array by at least one phase shifter, the input of each oscillator being connected to an equivalent number of phase shifters as the corresponding output, and the input of each oscillator being connected to an equivalent number of phase shifters as each input of the other oscillators of the plurality of oscillators.2. The device of claim 1 , wherein each oscillator is a cross-coupled pair of transistors.3. The device of claim 2 , wherein the coupled pair includes a first transistor and a second transistor claim 2 , and wherein:a first transmission line connects a gate of the first transistor to a drain of the second transistor;a second ...

Variable capacitor circuit and digitally-controlled oscillator including the same

A variable capacitor circuit includes a capacitor block including a first varactor element comprising a first transistor having a first size, a second varactor element comprising a second transistor having a second size different from the first size, a first terminal commonly connected to a source and a drain of the first transistor, a second terminal commonly connected to a source and a drain of the second transistor, and an RC circuit connected to a gate of the first transistor and a gate of the second transistor.

PIEZORESISTIVE SELF-OSCILLATOR

Embodiments may relate to a piezoresistive oscillator. The oscillator may include a fin field-effect transistor (FinFET) with a source electrode, a drain electrode, and a gate electrode. The oscillator may further include an electrical coupling coupled with the FinFET, wherein the electrical coupling electrically couples the gate electrode to the source electrode or the drain electrode. Other embodiments may be described or claimed. 1. A piezoresistive oscillator comprising:a fin field-effect transistor (FinFET) that includes a source electrode, a drain electrode, and a gate electrode; andan electrical coupling coupled with the FinFET, wherein the electrical coupling electrically couples the gate electrode to the source electrode or the drain electrode.2. The piezoresistive oscillator of claim 1 , wherein the gate electrode is coupled with an input voltage of the piezoresistive oscillator.3. The piezoresistive oscillator of claim 1 , wherein the FinFET includes:a channel that physically and electrically couples the source electrode and the drain electrode; anda gate portion that is physically and electrically coupled to the gate electrode, wherein the gate portion is physically coupled to the channel on at least two sides of the channel.4. The piezoresistive oscillator of claim 1 , further comprising a load resistance electrically coupled with the electrical coupling.5. The piezoresistive oscillator of claim 4 , wherein the load resistance is a resistor or a transistor with a fixed gate bias.6. The piezoresistive oscillator of claim 1 , wherein the electrical coupling is to electrically couple the gate electrode to the source electrode or the drain electrode based on whether a change of conductance of the channel per unit tensile strain (P) is positive or negative.7. The piezoresistive oscillator of claim 6 , wherein the electrical coupling electrically couples the gate electrode to the source electrode if Pis negative.8. The piezoresistive oscillator of claim 6 , ...

LOW FREQUENCY PRECISION OSCILLATOR

A technique includes using a first oscillator to clock operations of a radio of an integrated circuit (IC). The technique includes intermittently using the first oscillator to frequency tune a second oscillator of the IC. 1. A method comprising:using a first oscillator to clock operations of a radio of an integrated circuit (IC); andintermittently using the first oscillator to frequency tune a second oscillator of the IC, wherein intermittently using the first oscillator to frequency tune the second oscillator comprises intermittently adjusting changing a dithering applied to an oscillation frequency of an oscillator core of the second oscillator.25.-. (canceled)6. The method of claim 1 , further comprising applying the dithering to the oscillation frequency using a sigma delta modulator.7. The method of claim 1 , further comprising:using the oscillator core to provide a ramping signal cycling between an upper threshold and a lower threshold at the oscillation frequency of the oscillator core; anddithering the upper and lower thresholds,wherein intermittently changing the dithering applied to the oscillation frequency comprises intermittently adjusting the dithering of the upper and lower thresholds.8. The method of claim 1 , wherein:the oscillator core comprises a resistor-capacitor (RC) relaxation circuit; andintermittently changing the dithering applied to the oscillator core comprises intermittently adjusting dithering applied to a resistance or a capacitance of the relaxation circuit.9. The method of claim 1 , wherein intermittently using the first oscillator to frequency tune the second oscillator comprises:triggering tuning of the clock signal provided by the second oscillator in response to a timer event, powering up of the radio or a detected temperature change.10. An apparatus comprising:a first oscillator to provide a first clock signal;a second oscillator to provide a second clock signal, wherein the second oscillator comprises an oscillator core; and a ...

Oscillator, Electronic Device, and Moving Object

An oscillator includes: an oscillation stage circuit that is connected between a first electrode and a second electrode of a resonator and performs an oscillation operation; a variable capacitance element that is connected to the first or second electrode of the resonator and adjusts an oscillation frequency; a bandgap reference circuit that generates a reference voltage having magnitude, which changes depending on the temperature, by using a resistor inserted in a current path through which a current having magnitude, which changes depending on the temperature flows; and a bias current generating circuit that generates a bias current of the oscillation stage circuit based on the reference voltage, and that, thereby, reduces a change in the oscillation frequency due to the temperature dependence of the impedance of the resonator or the temperature dependence of the sensitivity of the variable capacitance element. 1. An oscillator comprising:an oscillation stage circuit that is connected between a first electrode and a second electrode of a resonator and performs an oscillation operation;a variable capacitance element that is connected to the first or second electrode of the resonator and adjusts an oscillation frequency;a bandgap reference circuit that generates a reference voltage having magnitude, which changes depending on the temperature, by using a resistor inserted in a current path through which a current having magnitude, which changes depending on the temperature, flows; anda bias current generating circuit that generates a bias current of the oscillation stage circuit based on the reference voltage, and that, thereby, reduces a change in the oscillation frequency due to the temperature dependence of the impedance of the resonator or the temperature dependence of the sensitivity of the variable capacitance element.2. The oscillator according to claim 1 ,wherein the bandgap reference circuit has a first current path to which a first resistor, a second ...

OSCILLATOR WITH FREQUENCY CONTROL LOOP

Circuitry for providing an oscillating output signal. The circuitry comprises a transconductance circuit having a first input, a second input, and an output. The circuitry further comprises an oscillator circuit coupled to receive voltage from the output of the transconductance circuit, wherein the oscillating output signal is responsive to an output of the oscillator circuit. Also included are circuitry for providing a first voltage to the first input of the transconductance circuit and a frequency controlled circuit for providing a second voltage to the second input the transconductance circuit. The second voltage is response to a frequency of operation of the frequency controlled circuit, and the frequency of operation of the frequency controlled circuit is responsive to feedback from the output of the oscillator circuit. 12-. (canceled)3. Circuitry for providing an oscillating output signal , comprising:a transconductance circuit having a first input, a second input, and an output;an oscillator circuit coupled to receive voltage from the output of the transconductance circuit, wherein the oscillating output signal is responsive to an output of the oscillator circuit;circuitry for providing a first voltage to the first input of the transconductance circuit;a frequency controlled circuit for providing a second voltage to the second input the transconductance circuit;wherein the second voltage is responsive to a frequency of operation of the frequency controlled circuit; andwherein the frequency of operation of the frequency controlled circuit is responsive to feedback derived from the output of the oscillator circuit;wherein the frequency controlled circuit comprises:a first switch and a second switch operable to open and close in non-overlapping phases responsive to the output of the oscillator circuit; anda capacitor connected from a node, between the first switch and the second switch, and a reference voltage; andwherein the non-overlapping operation of the ...

OSCILLATION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING THE SAME

An oscillation circuit including, a latch for generating an output signal based on a first signal and a second signal, an electric-charge charge/discharge unit which has first and second capacitors, and charges or discharges the first and second capacitors complementarily based on the output signal, a first comparator which compares a first voltage according to electric charge accumulated in the first capacitor and a first reference voltage, and outputs the first signal, a second comparator which compares a second voltage according to electric charge accumulated in the second capacitor and the first reference voltage, and outputs the second signal, and a control unit for controlling a timing, to compensate for variations of signals in the latch, the first comparator, and the second comparator, at which respective voltage levels of the first reference voltage and the first voltage match. 1. An oscillation circuit comprising:a latch for generating an output signal based on a first signal and a second signal;an electric-charge charge/discharge unit which has first and second capacitors, and charges or discharges the first and second capacitors complementarily based on the output signal;a first comparator which compares a first voltage according to electric charge accumulated in the first capacitor and a first reference voltage, and outputs the first signal;a second comparator which compares a second voltage according to electric charge accumulated in the second capacitor and the first reference voltage, and outputs the second signal; anda control unit for controlling a timing, to compensate for variations of signals in the latch, the first comparator, and the second comparator, at which respective voltage levels of the first reference voltage and the first voltage match,wherein the control unit controls the voltage level of the first reference voltage in accordance with the frequency of the output signal.2. The oscillation circuit according to claim 1 , wherein the ...

CIRCUIT DEVICE, OSCILLATOR, ELECTRONIC APPARATUS, AND VEHICLE

A circuit device includes an oscillation signal generation circuit that generates an oscillation signal having an oscillation frequency using a resonator, the oscillation frequency being a frequency set by using frequency control data, and a processor configured to perform a signal process on input frequency control data based on a phase comparison result between an input signal based on the oscillation signal and a reference signal. The processor is configured to estimate a true value for an observed value of the frequency control data based on the phase comparison result through a Karman filter process in a period before a hold-over state is detected, and generate aging-corrected frequency control data, in a case where the hold-over state is detected, by holding the true value at a timing corresponding to a timing of detecting the hold-over state, and by performing a calculation based on the true value. 1. A circuit device comprising:an oscillation signal generation circuit that generates an oscillation signal having an oscillation frequency using a resonator, the oscillation frequency being a frequency set by using frequency control data; and [ 'estimate a true value for an observed value of the frequency control data based on the phase comparison result through a Karman filter process in a period before a hold-over state due to the absence or abnormality of the reference signal is detected; and', 'perform a signal process on input frequency control data based on a phase comparison result between an input signal based on the oscillation signal and a reference signal;'}, 'generate aging-corrected frequency control data, in a case where the hold-over state is detected, by holding the true value at a timing corresponding to a timing of detecting the hold-over state, and by performing a calculation based on the true value., 'a processor configured to;'}2. The circuit device according to claim 1 ,wherein the processor is configured to generate the aging-corrected ...

Relaxation Oscillator Circuit for Low Frequency and Low Power Dissipation

A relaxation oscillator circuit includes a current mirror configured to receive the input current from the and generate a plurality of starved currents, a Schmitt trigger configured to be current starved by a first starved current of the plurality of starved currents and a plurality of inverters configured to receive a Schmitt trigger output signal and generate an output clock signal, the inverters including a plurality of current starved inverters that are current starved by a second starved current of the plurality of starved currents, the plurality of current starved inverters receiving the Schmitt trigger output signal and generating a first inverter output signal, upon which an output clock signal is based. The relaxation includes a capacitor configured to charge or discharge in response to the output clock signal and a switching module configured to provide current from the current source based on the output clock signal. 1. A relaxation oscillator circuit comprising:a current source configured to provide an input current;a current mirror configured to receive the input current from the current source and generate a plurality of starved currents;a Schmitt trigger configured to be current starved by a first starved current of the plurality of starved currents and generate a Schmitt trigger output signal in response to an oscillating voltage input, wherein the Schmitt trigger output signal oscillates from a high signal to a low signal, the high signal triggered when the oscillating input voltage is lower than a lower voltage threshold for the Schmitt trigger, and the low signal is triggered when the oscillating input voltage exceeds a high voltage threshold for the Schmitt trigger; a plurality of current starved inverters that are current starved by a second starved current of the plurality of starved currents, the plurality of current starved inverters receiving the Schmitt trigger output signal and generating a first inverter output signal; and', 'one or more ...

Delay Circuit for Clock Generation

A clock delay circuit is configured to generate a delayed clock signal based on an input clock signal, the delayed clock signal delayed by a delay time (T). The circuit includes a current mirror configured to generate starved currents based on the reference current, a plurality of inverters, and a Schmitt trigger configured to generate an output signal in response to the input clock signal, wherein the Schmitt trigger output signal increases from a low signal to a high signal over a period (T) correlated with T. Some inverters and the Schmitt trigger are configured to be current starved when the input clock signal is high and are configured to be shorted to ground and the reference current when the input clock signal is low. Tis based on Tand Tis based on C, N, V, and a supply voltage. 1. A clock delay circuit configured to generate a delayed clock signal based on an input clock signal , the delayed clock signal delayed by a delay time (T) , the circuit comprising:an input module configured to receive the input clock signal;a reference current source providing a reference current;a capacitor configured to charge or discharge based on the input clock signal and an output clock signal, the capacitor having a capacitance (C) and connected to a top node;{'sub': 'TOP', 'a current mirror configured to generate one or more starved currents based on the reference current and having a current scaling factor and configured to provide a scaled version of the reference current at the top node, scaled by a current scaling factor (N);'}a switching module configured to provide current from the current source to charge the capacitor when the input clock signal is high and discharge the capacitor when the input clock signal is low;{'sub': CHARGE', 'DEL', 'ST,High, 'a Schmitt trigger configured to generate a Schmitt trigger output signal in response to the input clock signal, wherein the Schmitt trigger output signal increases from a low signal to a high signal over a charging period ...

CIRCUIT DEVICE, OSCILLATOR, ELECTRONIC APPARATUS, AND VEHICLE

A circuit device includes an oscillation signal generation circuit that generates an oscillation signal having an oscillation frequency, the oscillation frequency being a frequency set by using frequency control data, and a processor that is configured to perform a signal process on input frequency control data, and. The processor is configured to acquire the frequency control data from which an environmental change component is removed of the environmental change component and an aging change component by using environmental change component information, and perform aging correction on the basis of the frequency control data from which the environmental change component is removed. 1. A circuit device comprising:an oscillation signal generation circuit that generates an oscillation signal having an oscillation frequency using a resonator, the oscillation frequency being a frequency set by using frequency control data; and perform a signal process on input frequency control data to output frequency control data; and', 'acquire the frequency control data from which an environmental change component is removed of the environmental change component and an aging change component by using environmental change component information; and', 'perform aging correction on the basis of the frequency control data from which the environmental change component is removed., 'a processor that is configured to;'}2. The circuit device according to claim 1 ,wherein the environmental change component information includes temperature change component information.3. The circuit device according to claim 2 ,wherein the processor is configured to acquire the frequency control data from which the temperature change component is removed by using the temperature change component information, and perform the aging correction on the basis of the frequency control data from which the temperature change component is removed.4. The circuit device according to claim 2 ,wherein the processor is ...

RELAXATION OSCILLATORS WITH DELAY COMPENSATION

Relaxation oscillators with delay compensation are provided herein. In certain embodiments, a relaxation oscillator includes a capacitor, a current source that outputs a charging current, and control circuitry that operates to selectively charge the capacitor with the charging current. The control circuitry includes a primary or main comparator operable to compare a charging voltage of the capacitor to a threshold voltage. The relaxation oscillator further includes delay compensation circuitry coupled to the capacitor and operable to adjust the threshold voltage to provide compensation for a delay of the control circuitry. 1. A relaxation oscillator with delay compensation , the relaxation oscillator comprising:a first capacitor;a first current source configured to output a first charging current;control circuitry that operates to selectively charge the first capacitor with the first charging current, the control circuitry including a first primary comparator configured to compare a charging voltage of the first capacitor to a threshold voltage; anddelay compensation circuitry electrically coupled to the first capacitor and operable to adjust the threshold voltage to provide compensation for a delay of the control circuitry.2. The relaxation oscillator of claim 1 , further comprising a multiplexer configured to receive a plurality of available threshold voltages claim 1 , and to output a particular one of the available threshold voltages as the threshold voltage claim 1 , wherein the delay compensation circuitry controls the multiplexer.3. The relaxation oscillator of claim 2 , wherein the first current source is regulated by a feedback loop claim 2 , wherein the plurality of available threshold voltages are generated based on a feedback voltage of the feedback loop.4. The relaxation oscillator of claim 3 , further comprising a plurality of resistors in series between the feedback voltage and a ground voltage and operable to generate the plurality of available ...

System and Method for a Voltage Controlled Oscillator

In accordance with an embodiment, a voltage controlled oscillator (VCO) includes a VCO core having a plurality of transistors and a varactor circuit that has a first end coupled to emitter terminals of the VCO core and a second end coupled to a tuning terminal. The varactor circuit includes a capacitance that increases with increasing voltage applied to the tuning terminal with respect to the emitter terminals of the VCO core. 1. A voltage controlled oscillator (VCO) comprising:a VCO core comprising a plurality of transistors; anda varactor circuit having a first end coupled to emitter terminals of the VCO core and a second end coupled to a tuning terminal, wherein the varactor circuit comprises a capacitance that increases with increasing voltage applied to the tuning terminal with respect to the emitter terminals of the VCO core.2. The VCO of claim 1 , wherein the varactor circuit comprises:a first capacitor having a first terminal coupled to a first of the emitter terminals of the VCO core;a first varactor diode having a cathode coupled to a second terminal of the first capacitor and an anode coupled to the tuning terminal; andan RF choke circuit coupled between a second terminal of the first capacitor and a varactor reference terminal.3. The VCO of claim 2 , further comprising a voltage reference circuit coupled to the varactor reference terminal.4. The VCO of claim 3 , wherein the voltage reference circuit comprises:a resistor coupled between a first reference terminal and the varactor reference terminal, wherein the first reference terminal is coupled to collector terminals of the VCO core; anda diode coupled between the varactor reference terminal and a second reference terminal.5. The VCO of claim 4 , wherein the diode comprises a plurality of diodes.6. The VCO of claim 4 , wherein the second reference terminal is a ground terminal.7. The VCO of claim 3 , wherein the voltage reference circuit comprises a voltage regulator coupled between the varactor ...

SEMICONDUCTOR DEVICE

Disclosed is a semiconductor device. The semiconductor device includes a functional circuit having a resistor formed by a plurality of polysilicon resistors, and in which the property of the functional circuit can be adjusted by trimming the resistor, and in which the polysilicon resistors are coupled in series or in parallel to each other and arranged in a direction perpendicular to one side of the semiconductor device. 1. An on-chip oscillator comprising:a relaxation oscillator;a current generating circuit; anda reference voltage generating circuit outputs a first reference voltage and a second reference voltage to the relaxation oscillator, and outputs a third reference voltage to the current generating circuit,wherein the current generating circuit outputs a first current to the relaxation oscillator via a first output terminal, and a second current is outputted from the relaxation oscillator to the current generating circuit via a second output terminal, andwherein an oscillation frequency of the relaxation oscillator is based on the first current, the second current, the first reference voltage and the second reference voltage.2. The on-chip oscillator according to claim 1 , a capacitor is coupled at one end to a first power supply,', 'a first comparator having an inverted input terminal coupled to receive the first reference voltage and a non-inverted input terminal coupled to another end of the capacitor, and', 'a second comparator having an inverted input terminal coupled to receive the second reference voltage and a non-inverted input terminal coupled to the other end of the capacitor, and, 'wherein the relaxation oscillator includesa RS-type flip-flop having a set input coupled to an output of the first comparator and a reset input coupled to an output of the second comparator.3. The on-chip oscillator according to claim 2 , further comprising:a first switch coupled at one end to a node coupled to the one end of the capacitor, and coupled at another end ...

Oscillator circuit

According to one embodiment, an oscillator circuit includes a resonant circuit and first and second negative-resistance circuits. Each of the first and second negative-resistance circuits includes a first power-supply terminal, a second power-supply terminal, an input terminal and an output terminal. The first and second negative-resistance circuits are connected in series between a first power supply and a second power supply at the first and second power-supply terminals, and connected parallel to the resonance circuit at the input and output terminals.

OSCILLATION CIRCUIT

An oscillation circuit includes an electrical current generating portion configured to generate an electrical current having an oscillation frequency decreasing as an amplitude thereof is decreased; a control voltage generating portion configured to generate a control voltage having a magnitude decreasing as a magnitude of a power source voltage is decreased; and an electrical current control portion. The electrical current control portion includes a first input terminal connected to the control voltage generating portion for receiving the electrical current; a control terminal connected to the control voltage generating portion for receiving the control voltage; and a first output terminal. The electrical current control portion is configured to reduce the amplitude of the electrical current flowing between the first input terminal and the first output terminal as the magnitude of the control voltage is decreased. 1. An oscillation circuit , comprising:an electrical current generating portion configured to generate an electrical current having an oscillation frequency decreasing as an amplitude thereof is decreased;a control voltage generating portion configured to generate a control voltage having a magnitude decreasing as a magnitude of a power source voltage is decreased; andan electrical current control portion,wherein said electrical current control portion includes a first input terminal connected to the control voltage generating portion for receiving the electrical current; a control terminal connected to the control voltage generating portion for receiving the control voltage; and a first output terminal, andsaid electrical current control portion is configured to reduce the amplitude of the electrical current flowing between the first input terminal and the first output terminal as the magnitude of the control voltage is decreased.2. The oscillation circuit according to claim 1 , wherein said control voltage generating portion includes a plurality of ...

VOLTAGE CONTROLLED OSCILLATOR WITH A LARGE FREQUENCY RANGE AND A LOW GAIN

A circuit includes a voltage controlled oscillator (“VCO”) having a VCO cell. The VCO cell includes a first transistor and a second transistor. The first transistor has a gate terminal coupled to a first node that also is coupled to a low-pass filter from which the gate terminal receives a first control voltage signal. A second terminal of the first transistor is connected to a first voltage source. The second transistor has a gate terminal coupled to a second node that is disposed between a capacitor and a resistor of the low pass filter. The second transistor has a second terminal connected to the first voltage source. The second transistor is larger than the first transistor, and the VCO has an output terminal for providing an output frequency signal. 1. A circuit , comprising: a first transistor having a gate terminal coupled to a low-pass filter from which the gate terminal receives a first control voltage signal, a second terminal of the first transistor connected to a first voltage source; and', 'a second transistor having a gate terminal coupled to the low pass filter between a capacitor and a resistor, the second transistor having a second terminal connected to the first voltage source;, 'a voltage controlled oscillator (“VCO”) having a VCO cell, the VCO cell comprisingwherein the second transistor has a larger capacitance than the first transistor, andwherein said VCO has an output terminal for providing an output frequency signal.2. The circuit of claim 1 , wherein the resistor of the low pass filter is coupled between the first node and the second node.3. The circuit of claim 1 , wherein the low pass filter includes a second capacitor that is disposed in parallel with the capacitor and the resistor of the low pass filter.4. The circuit of claim 3 , wherein the second capacitor has a smaller capacitor than the capacitor of the low pass filter.5. The circuit of claim 1 , wherein the gate terminal of the first transistor is coupled to a charge pump.6. The ...

CLOCK GENERATOR WITH STABILITY DURING PVT VARIATIONS AND ON-CHIP OSCILLATOR HAVING THE SAME

Provided is a clock generator that includes a comparator in which characteristics of two input signals vary over time. A voltage controller, having a resistor and at least one constant current source, generates a direct current (DC) voltage proportional to an output current of the constant current source and a resistance value of the resistor. The comparator compares a ramp voltage generated by the voltage controller with the DC voltage. 1. A clock generator comprising:a comparator in which characteristics of two input signals vary over time; anda voltage controller including a resistor and at least one constant current source, wherein:the voltage controller generates a direct current (DC) voltage proportional to an output current of the constant current source and a resistance value of the resistor, andthe comparator compares a ramp voltage generated by the voltage controller with the DC voltage.2. The clock generator of claim 1 , wherein:the voltage controller includes a first capacitor and a second capacitor, andthe resistor is coupled between the first capacitor and the second capacitor.3. The clock generator of claim 2 , wherein the second capacitor is discharged while the first capacitor is charged claim 2 , and the second capacitor is charged while the first capacitor is discharged.4. The clock generator of claim 3 , wherein the ramp voltage comprises a voltage charged in the first capacitor and a voltage charged in the second capacitor.5. The clock generator of claim 4 , wherein input nodes of the comparator alternately receive the DC voltage and the voltages charged in the first capacitor and the second capacitor over time.6. A clock generator comprising:a voltage generator configured to supply a bias voltage;a voltage controller including a constant current source, a resistor, and a capacitance and configured to generate a ramp voltage between the constant current source and the capacitance and generate a direct current (DC) voltage between the constant ...

Frequency Sweep Generator and Method

An oscillator is configured to generate a signal with a frequency sweep, the oscillator having circuitry comprising a set of capacitors, each capacitor of the set of capacitors being switchably connectable in parallel in the circuitry so that the frequency of the signal has an intrinsic dependence on the number of the capacitors connected, a shift register controllable by a clock line and comprising a number of bits, each bit of the number of bits controlling connection of a respective capacitor of the set of capacitors so that the capacitors are connectable or disconnectable in a pre-determined order by shifting, respectively, activation or de-activation bits into the shift register, wherein the shifting is paced by the clock line; and a clock signal generator configured to output a clock signal with a time modulation on the clock line.

Oscillator with pulse-edge tuning

An oscillator architecture with pulse-edge tuning. The oscillator includes a signal generator generating at least two signal frequencies, and a logic circuit (such as an AND gate) that combines the signal frequencies to generate a corresponding oscillator signal. The logic circuit includes a pull-up PMOS transistor coupled to a high rail, and a pull-down NMOS transistor coupled to a low rail. Duty cycle tuning/correction circuitry includes high and low side tuning FETs: a high-side tuning PMOS transistor is coupled between the high rail and a source terminal of the pull-up PMOS transistor, and a low-side tuning NMOS transistor is coupled between the low rail and a source terminal of the pull-down NMOS transistor. Both tuning FETs are controlled for operation as a variable resistor by respective high-side and low-side DACs (digital to analog converters) configure to provide a tuning control signals to the tuning FETs (variable resistance) based on respective input digital tuning/correction signals. In an example application, the oscillator design is adapted for a direct conversion RF transmit chain including an I-Path and a Q-Path: the signal generator generates ±I and ±Q differential signal frequencies, and each signal frequency is generated by a separate logic circuit (such as an AND gate), including pulse-edge tuning/correction circuitry.

ROBUST TRIMMING SCHEME FOR LOW POWER RC OSCILLATOR COMPATIBLE WITH HIGH TEMPERATURE OPERATION

In some embodiments, the present disclosure relates to a frequency generator having a resistor network and a capacitor network. The capacitor network has a plurality of capacitors connected in parallel with one another. A comparator is configured to output an oscillating voltage signal. An input of the comparator is connected to the output of the resistor network and the output of the capacitor network. A frequency testing circuit is configured to calculate a frequency of the oscillating voltage signal and determine whether the frequency is within a range of an expected frequency. The frequency testing circuit may also be configured to selectively connect a first plate of the plurality of capacitors to a non-varying voltage or to the input of the capacitor network to adjust a frequency of the oscillating voltage signal. 1. A frequency generator , comprising:a comparator configured to output an oscillating voltage signal having a first frequency; a resistor network;', 'a capacitor network comprising a plurality of capacitors connected in parallel, wherein each capacitor of the plurality of capacitors comprises a first plate and a second plate; and, 'a RC network circuit coupled between an input and an output of the comparator, wherein the RC network circuit compriseswherein a frequency testing circuit is configured to determine whether the first frequency is within a range of an expected frequency, wherein the frequency testing circuit is configured to selectively connect the first plate of some of the capacitors disposed in the capacitor network to a non-varying voltage and other capacitors disposed in the capacitor network to an input of the capacitor network when the first frequency is outside the range of the expected frequency.2. The frequency generator of claim 1 , further comprising:an inverter having an input connected to an output of the comparator and an output connected to the input of the capacitor network.3. The frequency generator of claim 2 , wherein ...

Integrated Oscillator Circuitry

Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a comparator stage, a resistor, a capacitor, and active switches arranged to provide a clock signal having a time period that is independent of a first source voltage. Independence may be achieved by using a second source voltage derived from the first source voltage as a fixed ratio. 1. An integrated circuit , comprising:a comparator stage that provides a clock signal based on a first source voltage and a fixed ratio of the first source voltage; anda resistor, a capacitor, and active switches arranged with the comparator stage to provide the clock signal with a time period that is independent of the first source voltage,wherein independence is achieved by using a second source voltage derived from the first source voltage as the fixed ratio, andwherein the comparator stage includes a voltage comparator and a switched-capacitor network, and wherein the second source voltage is derived as a reference voltage using the switched-capacitor network, and wherein the voltage comparator is implemented as a duty-cycled comparator for low power operation.2. The integrated circuit of claim 1 , further comprising a control component configured to modify behavior of one or more of the comparator stage claim 1 , the resistor claim 1 , the capacitor claim 1 , and the active switches so as to reduce power consumption.3. The integrated circuit of claim 2 , wherein the control component comprises a power-gating component configured to duty-cycle the comparator stage during the time-period.4. The integrated circuit of claim 1 , further comprising a resettable delay component configured to provide a delay signal to the comparator stage claim 1 , wherein the delay signal has a delay time that is less than an oscillation time period of the integrated circuit claim 1 , and wherein the delay signal is reset by a rising edge of the clock signal.5. The integrated circuit of ...

SEMICONDUCTOR DEVICE

A resistance element includes a conductor, the conductor having a repeating pattern of: a first conductive layer formed on a first interlayer insulating layer on a semiconductor substrate; a second conductive layer formed on a second interlayer insulating layer different from the first interlayer insulating layer; and an interlayer conductive layer connecting the first conductive layer and the second conductive layer, and the second conductive layer has a resistance-value fluctuation characteristic opposite to a resistance-value fluctuation characteristic of the first conductive layer after a heat treatment. 1. A semiconductor device comprising:a semiconductor substrate: and a first conductive layer pattern formed in a first interlayer insulating layer formed over the semiconductor substrate;', 'a second conductive layer pattern formed in a second interlayer insulating layer different from the first interlayer insulating layer; and', 'an interlayer conductive layer pattern connecting the first conductive layer pattern and the second conductive layer pattern,, 'a conductor having a repeating pattern ofwherein the first conductive layer pattern is formed of a material different from that of the second conductive layer pattern, andthe first conductive layer pattern has a resistance-value fluctuation characteristic opposite to a resistance-value fluctuation characteristic of the second conductive layer pattern after a heat treatment.2. The semiconductor device according to claim 1 ,wherein a resistance value of the interlayer conductive layer pattern is larger than a sum of a resistance value of the first conductive layer pattern and a resistance value of the second conductive layer pattern.3. The semiconductor device according to claim 1 , further comprising a third interlayer insulating layer formed between the first interlayer insulating layer and the second interlayer insulating layer claim 1 ,wherein the interlayer conductive layer pattern has a landing pad formed ...

STRESS COMPENSATED OSCILLATOR CIRCUITRY AND INTEGRATED CIRCUIT USING THE SAME

A stress compensated oscillator circuitry comprises a sensor arrangement for providing a sensor output signal S, wherein the sensor output signal Sis based on an instantaneous stress or strain component σ in the semiconductor substrate, a processing arrangement for processing the sensor output signal Sand providing a control signal Sdepending on the instantaneous stress or strain component σ in the semiconductor substrate, and an oscillator arrangement for providing an oscillator output signal Shaving an oscillator frequency fbased on the control signal S, wherein the control signal Scontrols the oscillator output signal S, and wherein the control signal Sreduces the influence of the instantaneous stress or strain component σ in the semiconductor substrate onto the oscillator output signal S, so that the oscillator circuitry provides a stress compensated oscillator output signal. 1. Stress compensated oscillator circuitry , comprising:a sensor arrangement for providing a sensor output signal (SSensor), wherein the sensor output signal (SSensor) is based on an instantaneous stress or strain component (σ) in a semiconductor substrate,a processing arrangement for processing the sensor output signal (SSensor) and providing a control signal (SControl) depending on the instantaneous stress or strain component (σ) in the semiconductor substrate, andan oscillator arrangement for providing an oscillator output signal (Sosc) having an oscillator frequency (fosc) based on the control signal (SControl),wherein the control signal (SControl) controls the oscillator output signal (Sosc), and wherein the control signal (SControl) reduces an influence of the instantaneous stress or strain component (σ) in the semiconductor substrate onto the oscillator output signal (Sosc), so that the stress compensated oscillator circuitry provides a stress compensated oscillator output signal (Sosc).2. The stress compensated oscillator circuitry according to claim 1 , wherein the sensor ...

SYNCHRONOUS OSCILLATION CIRCUIT

A synchronous oscillation circuit has multiple oscillators, a grounding unit and a common floating grounding unit. Each of the oscillators has a ground terminal. The grounding unit has a first terminal and a second terminal, wherein the second terminal is grounded. The common floating grounding unit is electrically connected between the ground terminals of the oscillators and the first terminal of the grounding unit. The oscillators are grounded through the common floating grounding unit and the grounding unit, so that the oscillators interfere with each other. When the oscillation signals generated by the oscillators reach a steady state, the oscillation frequencies of the oscillators are synchronized. 1. A synchronous oscillation circuit comprises:multiple oscillators, each one of the oscillators having a ground terminal;a grounding unit having a first terminal and a second terminal, wherein the second terminal is grounded; and;a common floating grounding unit electrically connected between the ground terminals of the oscillators and the first terminal of the grounding unit.2. The synchronous oscillation circuit as claimed in claim 1 , wherein the common floating grounding unit comprises a common node and multiple electronic components claim 1 , and the ground terminals of the oscillators are electrically connected to the common node through the electronic components respectively; andthe first terminal of the grounding unit is connected to the common node of the common floating grounding unit.3. The synchronous oscillation circuit as claimed in claim 1 , wherein each one of the oscillators comprises a phase modulation circuit.4. The synchronous oscillation circuit as claimed in claim 2 , wherein each one of the oscillators comprises a phase modulation circuit.5. The synchronous oscillation circuit as claimed in claim 1 , wherein one of the oscillators is electrically connected to a phase-locked loop.6. The synchronous oscillation circuit as claimed in claim 2 , ...

Oscillator temperature coefficient adjustment

An oscillator circuit is disclosed. The oscillator circuit includes: oscillator transistors including gates; adjustment transistors coupled to the gates; a differential output coupled to the oscillator transistors; a switch configured to set an oscillation frequency of the differential output by driving: a first current including a first portion of a main current through at least one of the oscillator transistors; and a second current including a second portion of the main current through at least one of the adjustment transistors; a first set of auxiliary current sources configured to adjust a temperature coefficient of the oscillator circuit by driving a first set of auxiliary currents through the oscillator transistors; and a second set of auxiliary current sources configured to maintain the oscillation frequency of the differential output by driving, in response to driving the first set of auxiliary currents, a second set of auxiliary currents though the adjustment transistors.

OSCILLATION DEVICE, SCANNING-TYPE SCANNER DEVICE, INFORMATION TERMINAL, PHASE-SHIFT AMOUNT ADJUSTMENT DEVICE, AND PHASE-SHIFT AMOUNT ADJUSTMENT METHOD

An oscillation device includes an oscillator, an oscillation detection unit that detects oscillation of the oscillator and outputs an oscillation detection signal, and a drive unit that generates a drive signal in keeping with the oscillation detection signal and outputs the drive signal to the oscillator. The drive unit includes a phase shift unit that shifts the phase to provide the drive signal as positive feedback to the oscillator. The phase shift unit includes a disturbance generating unit that outputs the periodic signal, a fluctuation unit that causes the amount of phase shift to fluctuate based on the periodic signal, a drive amplitude detection unit that detects the amplitude of the drive signal and outputs a drive amplitude signal, a product detection unit that outputs a detection signal after performing product detection on the drive amplitude signal based on the periodic signal, and an adjustment unit that adjusts the phase-shift amount based on the detection signal. 1. An oscillation device comprising:an oscillator;an oscillation detection unit configured to detect oscillation of the oscillator and to output an oscillation detection signal; anda drive unit configured to generate a drive signal in accordance with the oscillation detection signal and outputs the drive signal to the oscillator; whereinthe drive unit includes a phase shift unit configured to shift a phase to provide the drive signal as positive feedback to the oscillator; and a disturbance generating unit configured to output a periodic signal;', 'a fluctuation unit configured to cause an amount of phase shift to fluctuate based on the periodic signal;', 'a drive amplitude detection unit configured to detect an amplitude of the drive signal and to output a drive amplitude signal;', 'a product detection unit configured to output a detection signal after performing product detection on the drive amplitude signal based on the periodic signal; and', 'an adjustment unit configured to adjust the ...

Multiple adjacent slicewise layout of voltage-controlled oscillator

Methods and systems are described for generating multiple phases of a local clock at a controllable variable frequency, using loop-connected strings of active circuit elements. A specific embodiment incorporates a loop of four active circuit elements, each element providing true and complement outputs that are cross-coupled to maintain a fixed phase relationship, and feed-forward connections at each loop node to facilitate high frequency operation. A particular physical layout is described that maximizes operating frequency and minimizes clock pertubations caused by unbalanced or asymmetric signal paths and parasitic node capacitances.

Variable frequency rc oscillator

An oscillator circuit having a programmable output frequency may include a first delay section having a negative gain and a variable delay that is set by a control signal provided to the first delay section. A second delay section having a negative gain and a fixed delay may be connected in series with the first delay section. The oscillator circuit may include an output comprising the output of the second delay section having a frequency that is dependent on the delay of the first delay section and the delay of second delay section.

Electronic oscillator

The present invention concerns an electronic oscillator comprising: an LC resonant circuit comprising an inductive component and a capacitive component, the LC resonant circuit being connected to a first reference voltage node and to an oscillator output node; a first transistor connected to the oscillator output node and arranged to periodically operate in a conducting state and a non-conducting state; and a phase shift circuit. A phase shift circuit output is connected to the first transistor, while a phase shift circuit input is connected by a first feedback circuit to the oscillator output node. The phase shift circuit comprises a signal phase shifter for shifting the phase of a first feedback signal from the first feedback circuit by substantially 180 degrees. The phase shift circuit further comprises a signal adder for adding a first signal from the signal phase shifter and a second signal to obtain a summed signal; and a second transistor connected to the signal adder for mirroring the summed signal to the oscillator output node through the first transistor.

AMPLIFICATION INTERFACE, AND CORRESPONDING MEASUREMENT SYSTEM AND METHOD FOR CALIBRATING AN AMPLIFICATION INTERFACE

A thermally-isolated-metal-oxide-semiconducting (TMOS) sensor has inputs coupled to first and second nodes to receive first and second bias currents, and an output coupled to a third node. A tail has a first conduction terminal coupled to the third node and a second conduction terminal coupled to a reference voltage. A control circuit applies a control signal to a control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode voltage at the first and second nodes is equal to a reference common mode voltage. A differential current integrator has a first input terminal coupled to the second node and a second input terminal coupled to the first node, and provides an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current at the second input terminal. 1. An electronic device , comprising:a thermally-isolated metal-oxide semiconducting (TMOS) sensor having a first current input terminal coupled to a first node to receive a first bias current, a second current input terminal coupled to a second node to receive a second bias current, and a current output terminal coupled to a third node;a tail transistor having a first conduction terminal coupled to the third node, a second conduction terminal coupled to a reference voltage, and a control terminal;a control circuit configured to generate a control signal applied to the control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode of voltages at the first and second nodes is equal to a reference common mode voltage; anda differential current integrator comprising a first input terminal coupled to the second node and a second input terminal coupled to the first node, wherein said differential current integrator is configured to provide an output voltage indicative of an integral of a difference between a first output current at the first ...

AMPLIFICATION INTERFACE, AND CORRESPONDING MEASUREMENT SYSTEM AND METHOD FOR CALIBRATING AN AMPLIFICATION INTERFACE

An amplification interface includes a drain of a first FET connected to a first node, a drain of a second FET connected to a second node, and sources of the first and second FETs connected to a third node. First and second bias-current generators are connected to the first and second nodes. A third FET is connected between the third node and a reference voltage. A regulation circuit drives the gate of the third FET to regulate the common mode of the voltage at the first node and the voltage at the second node to a desired value. A current generator applies a correction current to the first and/or second node. A differential current integrator has a first and second inputs connected to the second and first nodes. The integrator supplies a voltage representing the integral of the difference between the currents received at the second and first inputs. 1. An amplification interface , comprising:a first FET having a drain terminal connected to a first node and a source terminal connected to a third node;a second FET having a drain terminal connected to a second node and a source terminal connected to the third node;a first bias current generator configured to apply a first bias current to said first node;a second bias current generator configured to apply a second bias current to said second node;a third FET having a drain terminal connected to said third node and a source terminal connected to a reference voltage;a regulation circuit configured to drive a gate terminal of said third FET in order to regulate a common mode voltage at said first node and a common mode voltage at said second node to a given value;at least one current generator configured to apply a correction current to one of said first node and said second node; anda differential current integrator comprising a first input terminal connected to said second node and a second input terminal connected to said first node, wherein said differential current integrator is configured to provide via two output ...

Low Noise Voltage Controlled Oscillator

An enhanced negative resistance voltage controlled oscillator (VCO) circuit is provided, in which a parallel connection of a capacitor and a resistor configured to provide frequency-dependent transconductance is present across source nodes of a first pair of field effect transistors in which gate nodes and drain nodes are cross-coupled. The source nodes of the first pair of field effect transistors are electrically shorted to drain nodes of a second pair of field effect transistors of which the gate nodes are electrically shorted to the gate nodes of the first pair of field effect transistors. The parallel connection of the capacitor and the resistor includes a parallel connection of a capacitor and a resistor such that the net transconductance of the first pair of field effect transistors is less at low frequencies where thermal noise and flicker noise are dominant part of the phase noise than at the operational frequency range. 1. A voltage controlled oscillator (VCO) circuit comprising:a first transistor and a second transistor, wherein a gate of said first transistor is electrically shorted to a drain of said second transistor, and a gate of said second transistor is electrically shorted to a drain of said first transistor; anda parallel connection of a capacitor and a resistor providing frequency-dependent transconductance and connected across a source of said first transistor and a source of said second transistor.2. The VCO circuit of claim 1 , wherein gR is less than 2×(2πfRC−1) and gR is less than 2×(2πfRC−1) claim 1 , wherein gis a transconductance of said first transistor claim 1 , gis a transconductance of said second transistor claim 1 , R is a resistance of a resistor in said parallel connection of said capacitor and said resistor claim 1 , C is a capacitance of a capacitor in said parallel connection of said capacitor and said resistor and fis said nominal operating frequency of said VCO circuit.3. The VCO circuit of claim 1 , further comprising at ...

OSCILLATION SIGNAL GENERATION CIRCUIT

An oscillation signal generation circuit includes an oscillator and a calibration circuit. The oscillator includes a reference signal source circuit that has a reference signal source outputting a reference signal and converts the output reference signal into a control voltage, a filter that includes a variable resistance and a capacitance and removes noise in the control voltage, a transistor that converts the control voltage which has passed through the filter into a control current and outputs the control current, a core circuit that is driven by the control current and generates an output signal, and an output terminal that outputs the generated output signal. The calibration circuit is connected to the output terminal of the oscillator, detects whether or not the generated output signal is oscillating, and adjusts the current value of the control current by controlling the resistance value of the variable resistance in accordance with the detection result. 1. An oscillation signal generation circuit comprising: a reference signal source circuit that has a reference signal source outputting a reference signal and which, in operation, converts the output reference signal into a control voltage,', 'a first filter that includes a variable resistance and a capacitance and which, in operation, removes noise in the control voltage,', 'a first transistor which, in operation, converts the control voltage output from the first filter into a control current and outputs the control current,', 'a core circuit which, in operation, is driven by the control current and generates an output signal, and', 'an output terminal which, in operation, outputs the generated output signal; and, 'an oscillator includinga calibration circuit connected to the output terminal of the oscillator, which, in operation, detects whether or not the generated output signal is oscillating, and adjusts a current value of the control current by controlling a resistance value of the variable resistance ...

CHARGE PUMP CIRCUIT

When a voltage difference between a raised output voltage vcp and an input voltage vin is larger than a set voltage value, based on a added-on voltage vup detected by a voltage monitor or a current iu passing through the voltage monitor the clock generator controller is activated. Then the clock generator controller draws in a frequency control current iw from a clock generator side, switches the frequency Fclk of a clock signal CLK generated by the clock generator from a first frequency, which is comparatively high, to a second frequency, which is one or more digits lower than the first frequency, and applies the clock signal CLK to the voltage raiser The voltage raiser saves power by performing voltage raising (charge pumping) at the second frequency. 1. A charge pump circuit , comprising:a clock generator configured to generate a clock signal whose frequency varies between a first frequency and a second frequency lower than the first frequency;a voltage raiser configured to generate a raised output voltage higher than a supplied input voltage by using the clock signal;a switching device receiving at a control electrode thereof the raised output voltage, the switching device receiving at a first principal electrode thereof first input supply power, the switching device yielding at a second principal electrode thereof first output supply power; anda clock generator controller configured to switch the frequency of the clock signal from the first frequency to the second frequency when the raised output voltage reaches a predetermined value or when a load current through the first or second principal electrode exceeds a predetermined value.2. The charge pump circuit of claim 1 , whereinthe clock generator controller is configured to generate a frequency control current for controlling the clock generator such that, as the frequency control current increases, the first frequency lowers.3. The charge pump circuit of claim 2 , whereinthe second frequency is one or more ...

OSCILLATION CIRCUIT

An oscillation circuit small in circuit scale and in the influence of temperature on its oscillation frequency is provided. The oscillation circuit includes: a constant current circuit configured to supply a current based on a first depletion MOS transistor; a charge/discharge circuit having a first capacitor, a second capacitor, a second depletion MOS transistor, and a third depletion MOS transistor provided in a current path for charging the second capacitor, the first to third depletion MOS transistors having the same threshold voltage and the same temperature characteristics of the threshold voltage; and an RS latch circuit configured to output a waveform that falls by input of the reset signal and rises by input of the set signal. 1. An oscillation circuit comprising:a constant current circuit including a first depletion MOS transistor and configured to supply a current based on the first depletion MOS transistor; a first capacitor;', 'a second capacitor;', 'a second depletion MOS transistor; and', 'a third depletion MOS transistor,', 'the charge/discharge circuit being configured to charge the first capacitor with a current based on the first depletion MOS transistor and output a reset signal when the charging of the first capacitor is completed, and configured to charge the second capacitor with a current based on the first depletion MOS transistor and output a set signal when the charging of the second capacitor is completed,', 'the second depletion MOS transistor being provided in a current path for charging the first capacitor, and having the same threshold voltage and the same temperature characteristics of the threshold voltage as a threshold voltage of the first depletion MOS transistor and temperature characteristics of the threshold voltage of the first depletion MOS transistor,', 'the third depletion MOS transistor being provided in a current path for charging the second capacitor, and having the same threshold voltage and the same temperature ...

OSCILLATOR CIRCUIT WITH RECONFIGURABLE OSCILLATOR AMPLIFIER AND/OR HYBRID AMPLITUDE CALIBRATION CIRCUIT AND ASSOCIATED METHOD

An oscillator circuit has a reconfigurable oscillator amplifier. The reconfigurable oscillator amplifier is used to be coupled to a resonant circuit in parallel. The reconfigurable oscillator amplifier supports different circuit configurations for different operation modes, respectively. The reconfigurable oscillator amplifier has at least one circuit component shared by the different circuit configurations. The reconfigurable oscillator amplifier employs one of the different circuit configurations under one of the different operation modes. 11. The oscillator circuit of claim 1 , wherein the different operation modes comprise a first operation mode and a second operation mode claim 1 , and the oscillator circuit further comprises:a hybrid amplitude calibration circuit, configured to perform amplitude calibration upon an oscillation signal generated from the resonant circuit to determine a final bias setting of the reconfigurable oscillator amplifier during a mode transition from the first operation mode to the second operation mode, wherein the hybrid amplitude calibration circuit determines the final bias setting by jointly using different amplitude calibration schemes.12. The oscillator circuit of claim 11 , wherein the different amplitude calibration schemes comprise continuous-time amplitude calibration and discrete-time amplitude calibration claim 11 , and the hybrid amplitude calibration circuit comprises:a first amplitude calibration circuit, configured to perform the continuous-time amplitude calibration upon the oscillation signal to determine a first bias setting of the reconfigurable oscillator amplifier; anda second amplitude calibration circuit, configured to perform the discrete-time amplitude calibration upon a second bias setting by comparing the second bias setting with the first bias setting, and output the second bias setting as the final bias setting.13. The oscillator circuit of claim 12 , wherein the second amplitude calibration circuit ...

MULTI-ORDER WAVE VOLTAGE CONTROLLED OSCILLATOR

A multi-order wave voltage controlled oscillator (VCO) includes a power impedance matching unit, a signal transmitting unit, a harmonic wave eliminating unit and an oscillation frequency adjusting unit. The power impedance matching unit includes an input end, an output end and a first transmission line between the input end and the output end. The first transmission line is a ¼-wavelength transmission line based on a wavelength of an output harmonic wave. The signal transmitting unit includes multiple upper inductor electrically connected to the output end and multiple lower inductors electrically connected to a ground end. The harmonic wave eliminating unit includes multiple transistors electrically connected to the signal transmitting unit and each having a drain electrically connected to a gate of the adjacent transistor to form a multi-order ring loop. The oscillation frequency adjusting unit includes multiple varactors. 1. A multi-order wave voltage controlled oscillator (VCO) , comprising:a power impedance matching unit, comprising an input end, a first transmission line and an output end, the input end for inputting an external voltage, the first transmission line disposed between the input end and the output end and performing impedance matching on an output signal sent to the output end, wherein the first transmission line is a ¼-wavelength transmission line based on a wavelength of an output harmonic wave;a signal transmitting unit, comprising a plurality of upper inductors and a plurality of lower inductors disposed correspondingly to the upper inductors, each of the upper inductors having one end electrically connected to the output end, each of the lower inductors having one end electrically connected to a ground end;a harmonic wave eliminating unit, comprising a plurality of transistors disposed between and electrically connected to the upper inductors and the lower inductors, each of the transistors having a drain electrically connected to a gate of ...

CRYSTAL OSCILLATOR

Provided is a crystal oscillator, including: a crystal; an oscillating circuit including a first oscillating transistor and a second oscillating transistor, where the first oscillating transistor and the second oscillating transistor are configured to provide transconductance for starting oscillation and maintaining oscillation of the crystal; a first driving circuit configured to generate a stable reference current; and a second driving circuit, configured to supply an operating voltage to the oscillating circuit and make an operating current of the first oscillating transistor and the second oscillating transistor be a stable current according to the reference current, where the operating voltage is used to control the first oscillating transistor and the second oscillating transistor to operate in a sub-threshold region. 1. A crystal oscillator , comprising:a crystal;an oscillating circuit comprising a first oscillating transistor and a second oscillating transistor, wherein the first oscillating transistor and the second oscillating transistor are configured to provide transconductance for starting oscillation and maintaining oscillation of the crystal;a first driving circuit configured to generate a stable reference current; anda second driving circuit, configured to supply an operating voltage to the oscillating circuit and make an operating current of the first oscillating transistor and the second oscillating transistor be a stable current according to the reference current, wherein the operating voltage is configured to control the first oscillating transistor and the second oscillating transistor to operate in a sub-threshold region.2. The crystal oscillator according to claim 1 , wherein the second driving circuit comprises a negative feedback loop configured to receive the reference current generated by the first driving circuit and generate the operating voltage according to the reference current.3. The crystal oscillator according to claim 2 , wherein ...

IMPROVED LOW-POWER OSCILLATOR

A method of calibrating a first oscillator () is disclosed. A temperature is measured to obtain a measured temperature value and a determination is made of whether said measured temperature value differs from at least one previously measured temperature value by more than a threshold amount. If said measured temperature does differ from at least one previously measured temperature by more than said threshold amount, a reference oscillator () is used to calibrate the first oscillator (). 1. A method of calibrating a first oscillator , comprising:measuring a temperature to obtain a measured temperature value;determining whether said measured temperature value differs from at least one previously measured temperature value by more than a threshold amount; andif said measured temperature does differ from said at least one previously measured temperature by more than said threshold amount, using a reference oscillator to calibrate the first oscillator.27-. (canceled)8. A method as claimed in wherein the at least one previously measured temperature value is stored in a memory.9. A method as claimed in comprising storing multiple previously measured temperature values in the memory and comparing said multiple previously measured temperature values against a subsequent temperature measurement.10. A method as claimed in claim 8 , wherein each temperature value in the memory has an associated calibration result.11. A method as claimed in claim 8 , comprising adding the measured temperature value and a corresponding calibration result to the memory when a new calibration is carried out.12. A method as claimed in claim 8 , wherein a plurality of reference oscillators is provided and the memory comprises a plurality of data sets of temperature values and associated calibration results claim 8 , and wherein each set of the plurality of data sets corresponds to a different reference oscillator.1318-. (canceled)19. Apparatus comprising:a first oscillator;a reference oscillator;a ...

PHASED ARRAY MODULAR HIGH-FREQUENCY SOURCE

Embodiments described herein include a modular high-frequency emission source comprising a plurality of high-frequency emission modules and a phase controller. In an embodiment, each high-frequency emission module comprises an oscillator module, an amplification module, and an applicator. In an embodiment, each oscillator module comprises a voltage control circuit and a voltage controlled oscillator. In an embodiment, each amplification module is coupled to an oscillator module, in an embodiment, each applicator is coupled to an amplification module. In an embodiment, the phase controller is communicatively coupled to each oscillator module. 1. A modular high-frequency emission source , comprising: an oscillator module;', 'an amplification module; and', 'an applicator, wherein the applicator comprises a dielectric body with a monopole antenna extending into an axial center of the dielectric body;, 'a plurality of high-frequency emission modules, wherein each high-frequency emission module comprises2. The modular high-frequency emission source of claim 1 , wherein the applicator of each high-frequency emission module is part of a phased array.3. The modular high-frequency emission source of claim 2 , further comprising a phase controller claim 2 , wherein the phase controller controls a phase relationship of electromagnetic radiation generated by the oscillator modules in order to form an electromagnetic radiation pattern emitted by the phased array.4. The modular high-frequency emission source of claim 3 , wherein the electromagnetic radiation pattern is a static pattern.5. The modular high-frequency emission source of claim 3 , wherein the electromagnetic radiation pattern is a dynamic pattern.6. The modular high-frequency emission source of claim 1 , wherein the high-frequency is a microwave frequency.7. The modular high-frequency emission source of claim 1 , wherein the high-frequency is 0.1 MHz to 300 GHz.8. A modular high-frequency emission source claim 1 , ...

Leakage Tolerant Oscillator

A technique for reducing jitter in an oscillating signal generated by an oscillator circuit includes reducing feedback of gate leakage current while increasing electrostatic discharge protection and reducing regulated power supply requirements of the oscillator circuit, as compared to conventional oscillator circuits. A circuit includes a first integrated circuit terminal and a thick gate native transistor of a first conductivity type having a first gate terminal having a first gate thickness. The first gate terminal is coupled to the first integrated circuit terminal. The thick gate native transistor has a first threshold voltage. The thick gate native transistor is configured as a source follower. The circuit includes a second transistor of the first conductivity type having a second gate terminal with a second gate thickness less than the first gate thickness. The second gate terminal is coupled to a source terminal of the thick gate native transistor. 1. A circuit comprising:a first integrated circuit terminal;a thick gate native transistor of a first conductivity type having a first gate terminal having a first gate thickness, the first gate terminal being coupled to the first integrated circuit terminal, the thick gate native transistor having a first threshold voltage, the thick gate native transistor being configured as a source follower; anda second transistor of the first conductivity type having a second gate terminal with a second gate thickness less than the first gate thickness, the second gate terminal being coupled to a source terminal of the thick gate native transistor, the second transistor having a second threshold voltage.2. The circuit claim 1 , as recited in claim 1 , wherein a first magnitude of the first threshold voltage is less than a second magnitude of the second threshold voltage.3. The circuit claim 1 , as recited in claim 1 , wherein the first threshold voltage has a magnitude of approximately zero volts.4. The circuit claim 1 , as ...

CIRCUIT DEVICE, OSCILLATOR, ELECTRONIC APPARATUS, AND VEHICLE

A circuit device includes a processing circuit and an oscillation signal generation circuit. The processing circuit performs Kalman filter processing for a result of phase comparison between an input signal based on an oscillation signal and a reference signal and performs loop filter processing for the result of phase comparison. The oscillation signal generation circuit generates the oscillation signal of an oscillation frequency set by frequency control data which is output data of the loop filter processing by using the frequency control data and a resonator. The processing circuit estimates a truth value for an observed value of the result of phase comparison by using the Kalman filter processing. 1. A circuit device comprising:a processing circuit that performs Kalman filter processing for a result of phase comparison between an input signal based on an oscillation signal and a reference signal, and performs loop filter processing for the result of phase comparison; andan oscillation signal generation circuit that generates the oscillation signal of an oscillation frequency set by frequency control data which is output data of the loop filter processing by using the frequency control data and a resonator,wherein the processing circuit estimates a truth value for an observed value of the result of phase comparison by using the Kalman filter processing.2. The circuit device according to claim 1 ,wherein the processing circuit sets a system noise variance value and an observed noise variance value of the Kalman filter processing, and performs the Kalman filter processing based on the set system noise variance value and the set observed noise variance value.3. The circuit device according to claim 2 , further comprising:a storage unit that stores a first initial value which is an initial value of the system noise variance value,wherein the processing circuit performs first processing of changing the system noise variance value from the first initial value.4. The ...

RADIO FREQUENCY (RF) TRANSCEIVER AND OPERATING METHOD THEREOF

A radio frequency (RF) transceiver includes a first oscillator configured to generate a first oscillation frequency associated with an RF signal, a second oscillator configured to generate a second oscillation frequency associated with a clock frequency, a counter configured to generate a counter output signal using the first oscillation frequency and the second oscillation frequency, and a comparer configured to generate a digital output signal associated with the RF signal by comparing an output value of the counter output signal to a reference value. 1. A radio frequency (RF) transceiver comprising:a first oscillator configured to generate a first oscillation frequency associated with an RF signal;a second oscillator configured to generate a second oscillation frequency associated with a clock frequency;a quenching wave generator configured to generate a quenching signal that controls a negative-R generator of the first oscillator using the second oscillation frequency;a counter configured to generate a counter output signal using the first oscillation frequency and the second oscillation frequency; anda comparer configured to generate a digital output signal associated with the RF signal by comparing an output value of the counter output signal to a reference value.2. The RF transceiver of claim 1 , wherein the counter output signal is associated with a ratio of the first oscillation frequency to the second oscillation frequency.3. The RF transceiver of claim 1 , wherein the first oscillator comprises:an antenna configured to receive the RF signal;the negative-R generator being electrically connected to the antenna; anda capacitor bank connected in parallel with the antenna and the negative-R generator.4. The RF transceiver of claim 1 , further comprising:an auto gain calibration controller configured to disable the quenching wave generator and the negative-R generator in response to an input power of the RF signal being greater than or equal to a threshold ...

STRESS COMPENSATED OSCILLATOR CIRCUITRY AND INTEGRATED CIRCUIT USING THE SAME

A stress compensated oscillator circuitry comprises a sensor arrangement for providing a sensor output signal S, wherein the sensor output signal Sis based on an instantaneous stress or strain component a in the semiconductor substrate, a processing arrangement for processing the sensor output signal Sand providing a control signal Sdepending on the instantaneous stress or strain component σ in the semiconductor substrate, and an oscillator arrangement for providing an oscillator output signal Shaving an oscillator frequency fbased on the control signal S, wherein the control signal Scontrols the oscillator output signal S, and wherein the control signal Sreduces the influence of the instantaneous stress or strain component σ in the semiconductor substrate onto the oscillator output signal S, so that the oscillator circuitry provides a stress compensated oscillator output signal. 1. Stress compensated oscillator circuitry comprising:{'sub': Sensor', 'Sensor, 'a sensor arrangement for providing a sensor output signal (S), the sensor arrangement comprising a stress-sensitive sensor element and a stress-insensitive resistive element, wherein the sensor output signal (S) is based on an instantaneous stress or strain component (σ) in a semiconductor substrate,'}{'sub': Sensor', 'Control, 'a processing arrangement for processing the sensor output signal (S) and providing a control signal (S) depending on the instantaneous stress or strain component (σ) in the semiconductor substrate, and'}{'sub': osc', 'osc', 'Control, 'an oscillator arrangement for providing an oscillator output signal (S) having an oscillator frequency (f) based on the control signal (S),'}{'sub': 'Sensor', 'wherein the stress-sensitive sensor element provides a stress dependent sensor signal having a stress component dependency with respect to at least one of a sum of normal stress components (σxx+σyy), a difference of the normal stress components (σxx−σyy) or a shear stress component σxy in the ...

Thermal Oscillator

A temperature dependent oscillator charges a capacitance from a voltage source through a switch. The switch is opened and the capacitance discharges through a transistor having a temperature dependent resistance. The voltage across the capacitance is compared to a predetermined threshold voltage. The comparator asserts a compare signal when the capacitance discharges to a predetermined voltage level. The switch is then closed for a long enough time to recharge the capacitor and then the switch is opened to allow the capacitance to discharge through the transistor. The charging and discharging repeats with a frequency that is exponentially related to temperature. A counter counts the oscillations over a predetermined time period. The count value is processed using a natural log function resulting in a thermal value corresponding to temperature. The thermal value may be corrected for supply voltage errors. 1. A method comprising:charging a capacitance from a voltage source through a switch;discharging the capacitance through a transistor having a temperature dependent resistance;comparing capacitance voltage to a predetermined threshold voltage and supplying an asserted compare signal responsive to the capacitance voltage being reduced to the predetermined threshold voltage through discharge of the capacitance through the transistor;closing the switch to recharge the capacitance responsive to the asserted compare signal and then opening the switch to allow the capacitance to discharge through the transistor; andrepeating the charging and discharging with a frequency that is related to temperature of the transistor.2. The method as recited in wherein the transistor has a first threshold voltage and the method further comprises:selecting between the compare signal and a second compare signal of a second temperature dependent oscillator having a second transistor with a different threshold voltage than the first threshold voltage.3. The method as recited in further ...

MULTIPLE ADJACENT SLICEWISE LAYOUT OF VOLTAGE-CONTROLLED OSCILLATOR

Methods and systems are described for generating multiple phases of a local clock at a controllable variable frequency, using loop-connected strings of active circuit elements. A specific embodiment incorporates a loop of four active circuit elements, each element providing true and complement outputs that are cross-coupled to maintain a fixed phase relationship, and feed-forward connections at each loop node to facilitate high frequency operation. A particular physical layout is described that maximizes operating frequency and minimizes clock pertubations caused by unbalanced or asymmetric signal paths and parasitic node capacitances. 1. An apparatus comprising:an interconnection grid having metallization layers configured to provide (i) interconnections between a plurality of loop elements containing voltage controlled oscillator (VCO) stages, the plurality of VCO stages repeated along a first dimension and (ii) a set of VCO outputs from the plurality of VCO stages; (i) a capacitive coupling element and a PMOS portion of each inverter of the plurality of inverters arranged on one side of the interconnection grid; and', '(ii) an NMOS portion of each inverter of the plurality of inverters arranged on an other side of the interconnection grid., 'each given VCO stage of the plurality of VCO stages comprising a plurality of inverters, each inverter arranged along a second dimension, the plurality of inverters comprising (i) a primary path inverter configured to receive an output of a VCO stage in a preceding loop element with respect to a loop element containing the given VCO stage, (ii) a feed-forward inverter configured to receive a feed-forward output from a VCO stage in a two-prior loop element with respect to the loop element containing the given VCO stage, (iii) a cross-coupled inverter configured to receive a complementary output from a complementary VCO stage within the loop element containing the given VCO stage, and (iv) buffer inverters for generating the ...

Electric Circuit Of A Generator Of Oscillations

The invention relates to an electric circuit of a generator of oscillations, comprising an enhancement-mode field transistor T inductance L and resistance R connected to the source or the drain of the transistor T characterized in that the inductance L is connected directly between the gate and the drain of the transistor T or to an electric circuit of a generator of oscillations, comprising an depletion-mode field transistor T inductance L and resistance R connected with its one end to the source of the transistor T characterized in that the inductance L is connected directly between the gate of the transistor T and the other end of the resistance R 1. An electric circuit of a generator of oscillations comprising:{'b': '1', 'a single n-channel enhancement-mode field transistor T;'}{'b': 1', '1', '1, 'an inductance L connected directly between a gate of the transistor T and a drain of the transistor T;'}{'b': 1', '1', '1, 'a resistance R connected directly between a source of the transistor T and a ground or connected directly between a supply voltage and the drain of the transistor T.'}21111111. An electric circuit of a generator of oscillations , comprising an depletion-mode field transistor T , inductance L and resistance R connected with its one end to the source of the transistor T , characterized in that the inductance L is connected directly between the gate of the transistor T and the other end of the resistance R.311. The circuit according to claim 1 , characterized in that it additionally comprises a first capacity C connected in parallel to the resistance R.421. The circuit according to characterized in that it additionally comprises a second capacity C connected in parallel to the inductance L.5. (canceled)61. The circuit according to claim 1 , characterized in that it comprises exactly one inductance L.71. The circuit according to claim 1 , characterized in that it comprises exactly one resistance R.81. The circuit according to claim 3 , characterized ...

Oscillator circuit and configuration method thereof

The present disclosure provides an oscillator circuit. The oscillator circuit includes a signal selecting unit, a control voltage generating unit, a reference voltage generating unit, an output adjusting unit, and a frequency-dividing unit. The signal selecting unit is configured to select a reference signal or a frequency-divided signal as an input signal. The control voltage generating unit is configured to generate a control voltage based on the input signal. The reference voltage generating unit is configured to generate a reference voltage. The output adjusting unit is configured to generate an output signal based on the control voltage and the reference voltage. The frequency-dividing unit is configured to divide the frequency of the output signal and generate the frequency-divided signal.

SERIES-RESONANCE OSCILLATOR

An oscillator circuit () comprises a first tank circuit (T) comprising an inductive element (L) and a capacitive element (C) coupled in series between a first voltage rail () and a first drive node (). A feedback stage (F) is coupled to a first tank output () of the first tank circuit (T) and to the first drive node (). The feedback stage (F) is arranged to generate, responsive to a first oscillating tank voltage present at the first tank output (), a first oscillating drive signal at the first drive node () in-phase with a first oscillating tank current flowing in the inductive element (L) and the capacitive element (C), thereby causing the oscillator () to oscillate in a series resonance mode of the inductive element (L) and the capacitive element (C). 1. An oscillator circuit comprising:a first tank circuit comprising an inductive element and a capacitive element coupled in series between a voltage rail and a first drive node; anda feedback stage coupled to a first tank output of the first tank circuit and to the first drive node;wherein the feedback stage is arranged to generate, responsive to a first oscillating tank voltage present at the first tank output, a first oscillating drive signal at the first drive node in-phase with an oscillating tank current flowing in the inductive element and the capacitive element, thereby causing the oscillator circuit to oscillate in a series resonance mode of the inductive element and the capacitive element.2. The oscillator circuit as claimed in claim 1 , wherein the feedback stage is arranged to generate the first oscillating drive signal having a substantially rectangular waveform.3. The oscillator circuit as claimed in claim 1 , wherein the first tank circuit is arranged to generate claim 1 , responsive to the first oscillating drive signal claim 1 , the first oscillating tank voltage in-phase with the first oscillating drive signal claim 1 , and wherein the feedback stage comprises a first driver arranged to generate ...

PHASED ARRAY MODULAR HIGH-FREQUENCY SOURCE

Embodiments described herein include a modular high-frequency emission source comprising a plurality of high-frequency emission modules and a phase controller. In an embodiment, each high-frequency emission module comprises an oscillator module, an amplification module, and an applicator. In an embodiment, each oscillator module comprises a voltage control circuit and a voltage controlled oscillator. In an embodiment, each amplification module is coupled to an oscillator module, in an embodiment, each applicator is coupled to an amplification module. In an embodiment, the phase controller is communicatively coupled to each oscillator module. 1. A modular high-frequency emission source , comprising: [ a voltage control circuit; and', 'a voltage controlled oscillator;, 'an oscillator module, wherein each oscillator module comprises, 'an amplification module, wherein the amplification module is coupled the oscillator module;', 'an applicator, wherein the applicator is coupled to the amplification module; and, 'a plurality of high-frequency emission modules, wherein each high-frequency emission module comprisesa phase controller communicatively coupled to each oscillator module.2. The modular high-frequency emission source of claim 1 , wherein the applicator of each high-frequency emission module is part of a phased array.3. The modular high-frequency emission source of claim 2 , wherein the phase controller controls a phase relationship of electromagnetic radiation generated by the oscillator modules in order to form an electromagnetic radiation pattern emitted by the phased array.4. The modular high-frequency emission source of claim 3 , wherein the electromagnetic radiation pattern is a static pattern.5. The modular high-frequency emission source of claim 3 , wherein the electromagnetic radiation pattern is a dynamic pattern.6. The modular high-frequency emission source of claim 1 , wherein the high-frequency is a microwave frequency.7. The modular high-frequency ...

VARIABLE FREQUENCY CIRCUIT IN ATTENUATOR AND/OR NEGATIVE VOLTAGE GENERATOR

Apparatus and methods for distributing spurious tones through the frequency domain are disclosed. One such apparatus can include a dithering circuit configured to generate a sequence of numbers that exhibit statistical randomness and a variable frequency circuit configured to adjust a frequency of an output based on the sequence of numbers so as to spread energy of spurious tones in a frequency response of the output to lower a noise floor. In one example, spurious tones can be reduced in a negative voltage generator of a radio frequency (RF) attenuator. 1. (canceled)2. A radio frequency attenuator comprising:a controller including a variable frequency circuit configured to spread energy of spurious tones through a frequency domain of an output, the controller further including a buffer configured to receive the output of the variable frequency circuit and to generate differential signals, and the controller configured to generate a control signal based on the differential signals; andan attenuator component in communication with the controller, the attenuator component configured to attenuate a radio frequency signal based on the control signal.3. The radio frequency attenuator of wherein the controller indudes a dithering circuit configured to provide an output sequence that exhibits statistical randomness to the variable frequency circuit.4. The radio frequency attenuator of wherein the controller includes a charge pump configured to receive the differential signals from the buffer.5. The radio frequency attenuator of wherein an output of the charge pump is a negative voltage that is maintained below zero Volts.6. The radio frequency attenuator of wherein the dithering circuit is configured to use a signal of the differential signals as a clock signal.7. The radio frequency attenuator of wherein the buffer is configured to receive the output of the variable frequency circuit as a single-ended input.8. The radio frequency attenuator of wherein the controller ...

RELAXATION OSCILLATORS WITH REDUCED ERRORS OR NO ERRORS IN OUTPUT FREQUENCIES CAUSED BY CHANGES IN TEMPERATURES AND/OR FABRICATION PROCESSES

Relaxation oscillator and method for providing an output frequency. For example, the relaxation oscillator includes a reference generator, a capacitor, a first comparator, a second comparator, a latch, and a temperature compensation circuit. The reference generator is configured to generate a first bias current, a first bias voltage and a second bias voltage. The capacitor is configured to be charged by a charging current to generate a charged voltage, and the charging current is generated based on at least the first bias current. The first comparator is configured to compare the charged voltage and the first bias voltage to generate a first comparison result, and the second comparator is configured to compare the charged voltage and the second bias voltage to generate a second comparison result. The latch is configured to generate a clock signal based on at least the first comparison result and the second comparison result. 1. A relaxation oscillator , the oscillator comprising:a reference generator;a capacitor;a first comparator;a second comparator;a latch; anda temperature compensation circuit; the reference generator is configured to generate a first bias current, a first bias voltage and a second bias voltage;', 'the capacitor is configured to be charged by a charging current to generate a charged voltage, the charging current being generated based on at least the first bias current;', 'the first comparator is configured to compare the charged voltage and the first bias voltage to generate a first comparison result;', 'the second comparator is configured to compare the charged voltage and the second bias voltage to generate a second comparison result;', 'the latch is configured to generate a clock signal based on at least the first comparison result and the second comparison result, the clock signal being configured to be used to control charging and discharging of the capacitor, a frequency of the clock signal being an output frequency of the relaxation ...

Active biquad filter with oscillator circuit

Certain aspects of the present disclosure are generally directed to a tunable active filter and a method of calibrating a tunable active filter. One example apparatus is a filter circuit that generally includes a resistor-capacitor (RC) topology tunable active filter comprising a first amplifier, a second amplifier, and a feedback path coupled between an input of the first amplifier and an output of the second amplifier. The filter circuit also includes a negative transconductance circuit coupled to a first node of the tunable active filter.