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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Применить Всего найдено 5. Отображено 4.
16-01-2020 дата публикации

SHIFT REGISTER, METHOD FOR DRIVING THE SAME, GATE DRIVER CIRCUIT, AND DISPLAY DEVICE

Номер: US20200020264A1
Принадлежит:

This disclosure discloses a shift register, a method for driving the same, a gate driver circuit, and a display device. The shift register includes an input circuit, a reset circuit, a first control circuit, a first output circuit, and a second output circuit, where the first output circuit includes two output channels, where one channel is that under the joint control of signals of a first clock signal terminal and a first node, a signal of a first clock signal terminal is provided to a drive signal output terminal of the shift register, and the other channel is that under the joint control of signals of the second clock signal terminal and the first node, a signal of a second clock signal terminal is provided to the drive signal output terminal, and the first output circuit cooperates with the other four circuits so that these two channels can operate alternately to thereby avoid current from flowing through only one of the channels so as to improve the service lifetime of the shift register. 1. A shift register , comprising:an input circuit configured to provide a first node with a signal of an input signal terminal under the control of the input signal terminal;a reset circuit configured to provide the first node with a signal of a reference voltage signal terminal under the control of a reset signal terminal;a first control circuit configured to control a level at the first node, and a level at a second node;a first output circuit configured to provide a drive signal output terminal of the shift register with a signal of a first clock signal terminal under the joint control of the signal of the first clock signal terminal and a signal of the first node, and to provide the drive signal output terminal with a signal of a second clock signal terminal under the joint control of the signal of the second clock signal terminal and the signal of the first node, wherein the signal of the first clock signal terminal and the signal of the second clock signal terminal have ...

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30-04-2020 дата публикации

TIMING CONTROLLER, AND DRIVING METHOD AND DISPLAY DEVICE THEREOF

Номер: US20200135082A1
Принадлежит:

Provided are a timing controller, and a driving method and a display device thereof. The timing controller may include a detection circuit and a control circuit. The detection circuit may detect a symbol error rate of a drive signal transmitted from a control circuit to a source drive circuit, and send the symbol error rate to the control circuit. The control circuit may automatically adjust a voltage swing of the drive signal according to the symbol error rate of the drive signal, and may enable a magnitude of the adjusted voltage swing to negatively correlate with a magnitude of the symbol error rate. Therefore, electromagnetic interference is effectively reduced, and flexibility in reducing electromagnetic interference is improved. 1. A timing controller comprising a detection circuit and a control circuit , wherein the control circuit is connected to a source drive circuit , and the detection circuit is connected to the source drive circuit and the control circuit respectively;the control circuit is configured to transmit a drive signal to the source drive circuit;the detection circuit is configured to detect a symbol error rate of the drive signal;the control circuit is further configured to adjust a voltage swing of the drive signal according to a symbol error rate detected by the detection circuit, wherein a magnitude of the voltage swing of the drive signal is negatively correlated with a magnitude of the symbol error rate, and the voltage swing of the drive signal refers to a maximum value and a minimum voltage of a voltage of the drive signal.2. The timing controller according to claim 1 , wherein the detection circuit comprises an operation sub-circuit and a counter sub-circuit; whereina first input terminal of the operation sub-circuit is connected to an output terminal of the control circuit, a second input terminal of the operation sub-circuit is connected to an input terminal of the source drive circuit, an output terminal of the operation sub-circuit ...

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06-08-2020 дата публикации

Method and device for driving display panel and display device

Номер: US20200251063A1

A method and a device for driving a display panel, and a display device are provided. The method includes: dividing the display panel into at least two display regions, where each display region corresponds to a timing controller, and the timing controller is configured to control the corresponding display region to display; dividing each display region into multiple detection blocks; detecting whether a defect block exists in each display region; and enabling, when the defect block exists in only one display region, by the timing controller corresponding to the only one display region, a pattern detection function, and enabling, when the defect block exists in each of more than one display region, by the timing controllers corresponding to the more than one display region simultaneously, the pattern detection function.

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07-07-2020 дата публикации

Shift register, method for driving the same, gate driver circuit, and display device

Номер: US10706760B2

A shift register, a method for driving the same, a gate driver circuit, and a display device are provided. The shift register includes an input circuit, a reset circuit, a first control circuit, a first output circuit, and a second output circuit, where the first output circuit includes two output channels, where one channel is that under the joint control of signals of a first clock signal terminal and a first node, a signal of a first clock signal terminal is provided to a drive signal output terminal of the shift register, and the other channel is that under the joint control of signals of the second clock signal terminal and the first node, a signal of a second clock signal terminal is provided to the drive signal output terminal.

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