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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Применить Всего найдено 20. Отображено 20.
09-11-2010 дата публикации

Non-destructive sideband reading of processor state information

Номер: US0007831816B2
Автор: Wallace P. Montgomery, David F. Tobias, Michael T. Clark, MONTGOMERY WALLACE P, TOBIAS DAVID F, CLARK MICHAEL T, MONTGOMERY WALLACE P., TOBIAS DAVID F., CLARK MICHAEL T.
Принадлежит: GLOBALFOUNDRIES Inc., GLOBALFOUNDRIES INC, GLOBALFOUNDRIES INC.

A processor receives a command via a sideband interface on the processor to read processor state information, e.g., CPUID information. The sideband interface provides the command information to a microcode engine in the processor that executes the command to retrieve the designated processor state information at an appropriate instruction boundary and retrieves the processor state information. That processor information is stored in local buffers in the sideband interface to avoid modifying processor state. After the microcode engine completes retrieval of the information and the sideband interface command is complete, execution returns to the normal flow in the processor. Thus, the processor state information may be obtained non-destructively during processor runtime.

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Номер записи: 1
06-05-2003 дата публикации

Unicode-based drivers, device configuration interface and methodology for configuring similar but potentially incompatible peripheral devices

Номер: US0006560659B1
Автор: David F. Tobias, Gary M. Godfrey, TOBIAS DAVID F, GODFREY GARY M, TOBIAS DAVID F., GODFREY GARY M.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

A computing system employs an unicode driver to access and control peripheral devices by abstracting commands and status data to a level above register sets of similar but potentially incompatible peripheral devices. A unicode may be generated by an operating system or the unicode driver. Unicodes are routed by a device configuration interface that passes the unicodes between the unicode driver and peripheral devices. The peripheral devices include command decoders for performing conversion between unicodes and device-specific instructions. The use of unicode drivers eliminates duplicate driver code and simplifies device configuration for the computing system.

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Номер записи: 2
29-06-2010 дата публикации

System and method for limiting processor performance

Номер: US0007747881B2
Автор: Francisco L. Duran, W. Paul Montgomery, David F. Tobias, DURAN FRANCISCO L, MONTGOMERY W PAUL, TOBIAS DAVID F, DURAN FRANCISCO L., MONTGOMERY W. PAUL, TOBIAS DAVID F.
Принадлежит: GLOBALFOUNDRIES Inc., GLOBALFOUNDRIES INC, GLOBALFOUNDRIES INC.

A system and method for managing performance states of a processor. An enclosure comprises a first processing board with a processor and a second processing board with a processor. A service processor may also be coupled to the enclosure via an interconnect. The second processing board is configured to store a value indicative of a maximum processor performance state for a processor on the second board. In response to a detected request for a transition to a first processor performance state, the processor on the second board is configured to transition to the first processor performance state, if the first processor state is less than or equal to the maximum processor performance state; and transition to the maximum processor performance state, if the first processor state is greater than the maximum processor state. The second processor board may store the value in response to a an operating environment condition detected elsewhere within the enclosure.

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Номер записи: 3
05-11-2002 дата публикации

Power button controlled diagnostic mode for an information appliance

Номер: US0006477482B1
Автор: Patrick E. Maupin, David F. Tobias, MAUPIN PATRICK E, TOBIAS DAVID F, MAUPIN PATRICK E., TOBIAS DAVID F.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

A system adds functionality to a power button where use of the power button controls the entry and exit from a diagnostic mode. The system includes an information appliance connected to a diagnostic appliance. Once an information appliance is powered up, the information appliance monitors its power button for a press which indicates a request to enter a diagnostic mode. Absent a press of the power button, the system continues to be under control of the information appliance and never enters a diagnostic mode. However, if a press of the power button is detected, the system enters a diagnostic mode. Once in a diagnostic mode the system provides an exit therefrom by interpreting a power button press as a request to exit. The window of time to make such an exit closes once the diagnostic appliance achieves communication with the information appliance. If the power button is pressed during this window of time, then the system ends its diagnostic mode and control of the system returns to the ...

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Номер записи: 4
11-10-2005 дата публикации

Method and apparatus for communicating configuration data for a peripheral device of a microcontroller via a scan path

Номер: US0006954879B1
Автор: David F. Tobias, Richard G. Russell, Mark T. Ellis, TOBIAS DAVID F, RUSSELL RICHARD G, ELLIS MARK T, TOBIAS DAVID F., RUSSELL RICHARD G., ELLIS MARK T.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

A microcontroller has many internal peripheral devices. The peripheral devices are coupled to a scan path. A memory storage device that is external to the microcontroller is also coupled to the scan path. When commanded, data is shifted out of each device configuration register onto the scan path and stored in the external memory device. This is particularly useful for obtaining the states of each device without bringing down the application. Furthermore, configuration data stored in external memory can be loaded into the peripheral device configuration registers via the scan path. This invention also supports zero-volt suspend/resume which does not need extra software readable shadow registers which are often required in other architectures for reading back the current state of legacy registers which are read-only.

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Номер записи: 5
21-09-2004 дата публикации

Power state resynchronization

Номер: US0006795927B1
Автор: Morrie Altmejd, Richard Russell, Evandro Menezes, David F. Tobias, ALTMEJD MORRIE, RUSSELL RICHARD, MENEZES EVANDRO, TOBIAS DAVID F, TOBIAS DAVID F.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

A computer system has multiple performance states. The computer system periodically determines if the software power state maintained by power management software that represents the power state of the processor or other computer system component matches the actual power state of the processor or other computer system component. If not, the actual power state and the software power state are resynchronized, for example, by reinitializing the power management software or otherwise causing the software power state to match the hardware power state.

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Номер записи: 6
14-02-2008 дата публикации

System and method for limiting processor performance

Номер: US20080040622A1
Автор: Francisco L. Duran, W. Paul Montgomery, David F. Tobias
Принадлежит: Advanced Micro Devices, Inc.

A system and method for managing performance states of a processor. An enclosure comprises a first processing board with a processor and a second processing board with a processor. A service processor may also be coupled to the enclosure via an interconnect. The second processing board is configured to store a value indicative of a maximum processor performance state for a processor on the second board. In response to a detected request for a transition to a first processor performance state, the processor on the second board is configured to transition to the first processor performance state, if the first processor state is less than or equal to the maximum processor performance state; and transition to the maximum processor performance state, if the first processor state is greater than the maximum processor state. The second processor board may store the value in response to a an operating environment condition detected elsewhere within the enclosure.

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Номер записи: 7
12-01-2010 дата публикации

Method and apparatus for improving responsiveness of a power management system in a computing device

Номер: US0007647513B2
Автор: David F. Tobias, Evandro Menezes, Richard Russell, Morrie Altmejd, TOBIAS DAVID F, MENEZES EVANDRO, RUSSELL RICHARD, ALTMEJD MORRIE, TOBIAS DAVID F.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

A computer system has multiple performance states. The computer system periodically determines utilization information for the computer system and adjusts the performance state according to the utilization information. If a performance increase is required, the computer system always goes to the maximum performance state. If a performance decrease is required, the computer system steps the performance state down to a next lower performance state.

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Номер записи: 8
07-08-2007 дата публикации

System and method for controlling an intergrated circuit to enter a predetermined performance state by skipping all intermediate states based on the determined utilization of the intergrated circuit

Номер: US0007254721B1
Автор: David F. Tobias, Evandro Menezes, Richard Russell, Morrie Altmejd, TOBIAS DAVID F, MENEZES EVANDRO, RUSSELL RICHARD, ALTMEJD MORRIE, TOBIAS DAVID F.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

A computer system has multiple performance states. The computer system periodically determines utilization information for the computer system and adjusts the performance state according to the utilization information. If a performance increase is required, the computer system always goes to the maximum performance state. If a performance decrease is required, the computer system steps the performance state down to a next lower performance state.

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Номер записи: 9
13-02-2001 дата публикации

Microcontroller having a block of logic configurable to perform a selected logic function and to produce output signals coupled to corresponding I/O pads according to a predefined hardware interface

Номер: US0006188241B1
Автор: Lloyd W. Gauthier, Carl K. Wakeland, Faheem Hayat, David F. Tobias, GAUTHIER LLOYD W, WAKELAND CARL K, HAYAT FAHEEM, TOBIAS DAVID F, GAUTHIER LLOYD W., WAKELAND CARL K., TOBIAS DAVID F.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

A microcontroller is presented having a block of logic configurable to perform a selected logic function and to produce output signals coupled to corresponding I/O pads according to a predefined hardware interface. The microcontroller includes a central processing unit (CPU), a first set of I/O pads, and a configurable logic block (CLB) all formed upon a single monolithic semiconductor substrate. The CPU is configured to execute instructions, preferably x86 instructions. The CPU produces CPU output signals during instruction execution. The CLB is coupled between the CPU output signals and the first set of I/O pads, and is configurable to perform a logic function selected from a predefined set of logic functions. Each member of the set of logic functions has an associated hardware interface including a signal table which defines a correspondence between CLB input/output signals and members of the first set of I/O pads. The microcontroller also preferably includes a test/program core coupled ...

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Номер записи: 10
09-08-2005 дата публикации

Method and apparatus for saving peripheral device states of a microcontroller

Номер: US0006928586B1
Автор: David F. Tobias, Richard G. Russell, Mark T. Ellis, TOBIAS DAVID F, RUSSELL RICHARD G, ELLIS MARK T, TOBIAS DAVID F., RUSSELL RICHARD G., ELLIS MARK T.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

A microcontroller has many internal peripheral devices. The peripheral devices are coupled to a scan path. A memory storage device that is external to the microcontroller is also coupled to the scan path. When commanded, data is shifted out of each device configuration register onto the scan path and stored in the external memory device. This is particularly useful for obtaining the states of each device without bringing down the application. Furthermore, configuration data stored in external memory can be loaded into the peripheral device configuration registers via the scan path. This invention also supports zero-volt suspend/resume which does not need extra software readable shadow registers which are often required in other architectures for reading back the current state of legacy registers which are read-only.

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Номер записи: 11
06-03-2007 дата публикации

Processor operational range indicator

Номер: US0007188261B1
Автор: David F. Tobias, Morrie Altmejd, TOBIAS DAVID F, ALTMEJD MORRIE, TOBIAS DAVID F.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

An integrated circuit device provides an operational set point indicator. The operational set point indicator is utilized for obtaining a plurality of operational set points. Each of the plurality of operational set points can be a pair of an operational voltage and an operational frequency for application to the integrated circuit device. The operational set point indicator can be, for example, a Schmoo Class Register, a Device Identification Register, or actual operating condition information of the integrated circuit device. The Schmoo Class Register and the Device Identification Register are utilized to identify a performance state table in memory. The actual operating conditional information can be one or more entire Schmoo Plots for the device or a subset of such information. Operational set points are used during operation of the integrated circuit device, for example, in power management applications.

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Номер записи: 12
26-03-2002 дата публикации

Method and apparatus for saving and loading peripheral device states of a microcontroller via a scan path

Номер: US0006363501B1
Автор: David F. Tobias, Richard G. Russell, Mark T. Ellis, TOBIAS DAVID F, RUSSELL RICHARD G, ELLIS MARK T, TOBIAS DAVID F., RUSSELL RICHARD G., ELLIS MARK T.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

A microcontroller has many internal peripheral devices. The peripheral devices are coupled to a scan path. A memory storage device that is external to the microcontroller is also coupled to the scan path. When commanded, data is shifted out of each device configuration register onto the scan path and stored in the external memory device. This is particularly useful for obtaining the states of each device without bringing down the application. Furthermore, configuration data stored in external memory can be loaded into the peripheral device configuration registers via the scan path. This invention also supports zero-volt suspend/resume which does not need extra software readable shadow registers which are often required in other architectures for reading back the current state of legacy registers which are read-only.

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Номер записи: 13
18-01-2005 дата публикации

CPU utilization measurement techniques for use in power management

Номер: US0006845456B1
Автор: Evandro Menezes, David F. Tobias, Richard Russell, Morrie Altmejd, MENEZES EVANDRO, TOBIAS DAVID F, RUSSELL RICHARD, ALTMEJD MORRIE, TOBIAS DAVID F.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

A computer system that has multiple performance states periodically obtains utilization information for a plurality of tasks operating on the processor and determines processor utilization according to the utilization information for the plurality of tasks. The system compares the processor utilization to at least one threshold and selectively adjusts a current processor performance state to another performance state according to the comparison.

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Номер записи: 14
03-12-2009 дата публикации

NON-DESTRUCTIVE SIDEBAND READING OF PROCESSOR STATE INFORMATION

Номер: US20090300332A1
Автор: Wallace P. Montgomery, David F. Tobias, Michael T. Clark
Принадлежит:

A processor receives a command via a sideband interface on the processor to read processor state information, e.g., CPUID information. The sideband interface provides the command information to a microcode engine in the processor that executes the command to retrieve the designated processor state information at an appropriate instruction boundary and retrieves the processor state information. That processor information is stored in local buffers in the sideband interface to avoid modifying processor state. After the microcode engine completes retrieval of the information and the sideband interface command is complete, execution returns to the normal flow in the processor. Thus, the processor state information may be obtained non-destructively during processor runtime.

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Номер записи: 15
07-02-2006 дата публикации

Forward-looking fan control using system operation information

Номер: US0006996441B1
Автор: David F. Tobias, TOBIAS DAVID F, TOBIAS DAVID F.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

Predictions may be made regarding heat removal requirements depending on certain operational characteristics of an information processing system which have been monitored over time. A fan may be controlled based on the observed operational characteristics and based on the predictions made regarding the heat removal requirements for the system. For example, system utilization by applications may be monitored, possibly along with system performance parameters such as power level and frequency. These and other operational characteristics may be used to predict heat generation so that a fan may be controlled to anticipate temperature changes and thereby flatten temperature curves over time. This may be done in addition to monitoring the ambient temperature of the system and reacting to temperature spikes that may have already occurred.

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Номер записи: 16
15-06-2004 дата публикации

Multiple protected mode execution environments using multiple register sets and meta-protected instructions

Номер: US0006751737B1
Автор: Richard G. Russell, David F. Tobias, RUSSELL RICHARD G, TOBIAS DAVID F, RUSSELL RICHARD G., TOBIAS DAVID F.
Принадлежит: Advanced Micro Devices, ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES

A system is provided that contains multiple control register and descriptor table register sets so that an execution context switch between X86 protected mode operating systems can be performed with minimal processing overhead. Upon receipt of a protected instruction determined to be a meta-protected instruction, the system calls a meta virtual machine (MVM) that performs the functions necessary to shift execution contexts.

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Номер записи: 17
08-04-2003 дата публикации

Invalid configuration detection resource

Номер: US0006546482B1
Автор: James R. Magro, David F. Tobias, Daniel P. Mann, MAGRO JAMES R, TOBIAS DAVID F, MANN DANIEL P, MAGRO JAMES R., TOBIAS DAVID F., MANN DANIEL P.
Принадлежит: Advanced Micro Devices, Inc., ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.

An invalid configuration detection resource for identifying and reporting conflicts between system resources of a microcontroller or other device is provided. Selected system registers within each resource are monitored by discrete hardware logic within the invalid configuration detection resource. For each resource, a status register provides an encoding of the configuration for that resource. The invalid configuration detection resource then compares the status registers for invalid combinations, and encodes this information in a system status register. Alternatively, the invalid configuration detection resource monitors each selected system register, independent of the resource to which it belongs. Improper combinations of registers are then encoded in a system status register. An alternative embodiment uses software to replace the discrete hardware logic with a table that specifies invalid register combinations. The invalid configuration detection resource further provides a software-controlled ...

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Номер записи: 18
21-02-2008 дата публикации

System and method for limiting processor performance

Номер: WO2008021365A1
Автор: David F. Tobias, Francisco L. Duran, Paul W. Montgomery
Принадлежит: Advanced Micro Devices, Inc.

A system and method for managing performance states of a processor. An enclosure comprises a first processing board with a processor and a second processing board with a processor. A service processor may also be coupled to the enclosure via an interconnect. The second processing board is configured to store a value indicative of a maximum processor performance state for a processor on the second board. In response to a detected request for a transition to a first processor performance state, the processor on the second board is configured to transition to the first processor performance state, if the first processor state is less than or equal to the maximum processor performance state; and transition to the maximum processor performance state, if the first processor state is greater than the maximum processor state. The second processor board may store the value in response to an operating environment condition detected elsewhere within the enclosure.

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Номер записи: 19
10-09-2009 дата публикации

System und Verfahren zur Begrenzung der Prozessorleistung

Номер: DE112007001922T5
Автор: David F. Pflugerville Tobias, Francisco L. Austin Duran, Paul W. Austin Montgomery
Принадлежит: Advanced Micro Devices Inc

Verfahren zum Verwalten eines Prozessorleistungsverhaltens, wobei das Verfahren umfasst: Speichern eines Wertes, der einen maximalen Prozessorleistungszustand angibt; Erfassen einer Anforderung (200) für einen Übergang in einen ersten Prozessorleistungszustand; Überführen des Prozessors in den ersten Prozessorleistungszustand (212, 214, 216) in Reaktion darauf, dass bestimmt wird, dass der erste Prozessorzustand niedriger ist als der oder gleich ist dem maximalen Prozessorleistungszustand (202); und Überführen des Prozessors in den maximalen Prozessorleistungszustand (222, 224, 226) in Reaktion darauf, dass bestimmt wird, dass der erste Prozessorzustand höher als der maximale Prozessorzustand (202) ist.

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Номер записи: 20