Heterocyclic compound and organic light emitting device including same

The present specification relates to a hetero-cyclic compound and an organic light emitting device comprising the same.

Method of controlling water injector for preventing damage to catalyst for exhaust gas purification and engine driven by method

Disclosed are a method of controlling a water injector for preventing damage to a catalyst for exhaust gas purification and an engine driven by the method. A method of controlling the operation of an injector for injecting water into the combustion chamber of an engine to which a turbo system for increasing the amount of air by compressing air has been applied includes a catalyst state determination step of determining the danger condition of a catalyst for exhaust gas purification by detecting the state of the catalyst, a water injection amount calculation step of calculating a water injection flow value F1 at which a temperature of exhaust gas drops to a preset temperature when the catalyst is in the danger condition, and a water injection step of performing the waterjet operation of a water injector based on the water injection flow value calculated in the water injection amount calculation step.

METHOD TO DIAGNOSE FAULT OF WATER INJECTOR AND FAULT DIAGNOSIS APPARATUS OPERATED THEREBY

Disclosed are a method to diagnose fault of a water injector and a fault diagnosis apparatus operated thereby. According to one embodiment of the present invention, the method to diagnose fault of a water injector comprises: a steady state attainment determination step of determining entry to a steady state when a duration, in which all of a supercharge pressure sensor, a fuel pressure sensor, a supercharge pressure value, and a target flow rate value satisfy a predetermined condition, exceeds a predetermined time; and a fault determination step of determining a state of the water inject as a fault state in the case that a difference between an actual water injection flow rate value, which remains after a fuel amount and an air amount are excluded from a total amount of exhaust gas, and a target water inject flow value calculated by an engine control unit (ECU) is equal to or greater than a threshold value when the entry to the steady state is determined in the steady state attainment determination ...

METHOD OF CONTROLLING WATER INJECTOR FOR PREVENTING DAMAGE TO CATALYST FOR EXHAUST GAS PURIFICATION AND ENGINE DRIVEN BY METHOD

Disclosed are a method of controlling a water injector for preventing damage to a catalyst for exhaust gas purification and an engine driven by the method. A method of controlling the operation of an injector for injecting water into the combustion chamber of an engine to which a turbo system for increasing the amount of air by compressing air has been applied includes a catalyst state determination step of determining the danger condition of a catalyst for exhaust gas purification by detecting the state of the catalyst, a water injection amount calculation step of calculating a water injection flow value F 1 at which a temperature of exhaust gas drops to a preset temperature when the catalyst is in the danger condition, and a water injection step of performing the waterjet operation of a water injector based on the water injection flow value calculated in the water injection amount calculation step.

SEMICONDUCTOR APPARATUS SEMICONDUCTOR APPARATUS HAVING A SEMICONDUCTOR PACKAGE AND THERMALLY-CONDUCTIVE LAYER FOR DISSIPATING HEAT

A semiconductor apparatus includes: a system substrate; a semiconductor package mounted on the system substrate and having a first length in a first horizontal direction; a conductive label flexible and arranged on the semiconductor package, the conductive label including: a first adhesive layer contacting the semiconductor package; a thermally-conductive layer attached to the semiconductor package by the first adhesive layer and having a second length in the first horizontal direction greater than the first length; and a second adhesive layer contacting a portion of a surface of the conductive layer, the portion not vertically overlapping the semiconductor package; a thermal interface material (TIM) arranged on the conductive layer to vertically overlap the semiconductor package; and a cover including: a first cover portion vertically overlapping the semiconductor package and contacting the TIM; and a second cover portion to which the thermally-conductive layer is attached by the second adhesive layer. 1. A semiconductor apparatus comprising:a system substrate;a semiconductor package mounted on the system substrate and having a first length in a first horizontal direction;a conductive label that is flexible and arranged on the semiconductor package, the conductive label comprising: a first adhesive layer contacting the semiconductor package; a thermally-conductive layer, which is attached to the semiconductor package by the first adhesive layer and has a second length in the first horizontal direction greater than the first length of the semiconductor package; and a second adhesive layer contacting a portion of a surface of the thermally-conductive layer, the portion not vertically overlapping the semiconductor package;a thermal interface material arranged on the thermally-conductive layer to vertically overlap the semiconductor package; anda cover comprising: a first cover portion vertically overlapping the semiconductor package and contacting the thermal ...

ELECTRONIC DEVICE INCLUDING COVER GLASS AND METHOD FOR PROCESSING THE COVER GLASS

In an embodiment, a liquid planarization material is coated on at least one of a first surface and a second surface of the cover glass. The second surface faces a direction opposite the first surface. The liquid planarization material is pressed toward the cover glass by a pressing plate and cured. Then, the pressing plate is detached from the cured planarization material and the cover glass. Other embodiments are possible. 1. An electronic device comprising:a camera;a cover glass covering the camera and having a first surface facing the camera and a second surface facing a direction opposite the first surface; anda substantially transparent planarization material coated on at least one of the first surface and the second surface of the cover glass.2. The electronic device of claim 1 , wherein the planarization material is coated on a region of the cover glass corresponding to the camera.3. The electronic device of claim 1 , further comprising:a curved display,wherein at least one portion of the cover glass is curved to correspond to the curved display.4. The electronic device of claim 1 , wherein a refractive index of the planarization material has is within a range of 0.2 from a refractive index of the cover glass.5. The electronic device of claim 1 , wherein the planarization material is cured by heat or ultraviolet rays.6. The electronic device of claim 1 , wherein the cover glass coated with the planarization material has a peak-to-valley value of 0.5 wavelength or less.7. The electronic device of claim 1 , wherein the first surface of the cover glass is processed using the planarization material claim 1 , and the second surface of the cover glass is processed using a polishing technique.8. A method for processing a cover glass of an electronic device claim 1 , the method comprising operations of:coating a liquid planarization material on at least one of a first surface and a second surface of the cover glass, wherein the second surface faces a direction ...

INJECTOR CONTROLLING METHOD USING OPENING DURATION

Disclosed is an injector controlling method using an opening duration. The injector controlling method using an opening duration converts a target fuel quantity into an opening duration and sets relationship between the opening duration and an injector actuation signal in order to control the fuel quantity of injectors more accurately. 1. An injector controlling method using an opening duration comprising:a first step of applying actuation signals to a plurality of injectors and securing a time profile of the output voltage;a second step of evaluating the time profile to determine the closing time of the injectors;a third step of learning the opening durations of the injectors based on the closing time;a fourth step of selecting a standard injector out of the injectors; anda fifth step of determining an actuation signal to be inputted into the remaining injectors except the standard injector based on the learned opening duration of the standard injector.2. The injector controlling method according to claim 1 , wherein the output voltage in the first step is a self-induced voltage which is created when a current flow is interrupted after the current flow is formed on the injector by the actuation signal.3. The injector controlling method according to claim 2 , wherein the second step includes the steps of finding an inflection point from the time profile of the self-induced voltage and determining the closing time based on the inflection point.4. The injector controlling method according to claim 3 , wherein the inflection point is formed while the self-induced voltage is decayed.5. The injector controlling method according to claim 1 , wherein the second step is to find an inflection point from the time profile of the self-induced voltage by evaluating the time profile and determine the closing time based on the inflection point.6. The injector controlling method according to claim 1 , wherein the third step includes the steps of:determining the opening time based ...

Electronic device including cover glass and method for processing the cover glass

In an embodiment, a liquid planarization material is coated on at least one of a first surface and a second surface of the cover glass. The second surface faces a direction opposite the first surface. The liquid planarization material is pressed toward the cover glass by a pressing plate and cured. Then, the pressing plate is detached from the cured planarization material and the cover glass. Other embodiments are possible.

Injector controlling method using opening duration

Disclosed is an injector controlling method using an opening duration. The injector controlling method using an opening duration converts a target fuel quantity into an opening duration and sets relationship between the opening duration and an injector actuation signal in order to control the fuel quantity of injectors more accurately.

Metrology and process control for semiconductor manufacturing

A semiconductor metrology system including a spectrum acquisition tool for collecting, using a first measurement protocol, baseline scatterometric spectra on first semiconductor wafer targets, and for various sources of spectral variability, variability sets of scatterometric spectra on second semiconductor wafer targets, the variability sets embodying the spectral variability, a reference metrology tool for collecting, using a second measurement protocol, parameter values of the first semiconductor wafer targets, and a training unit for training, using the collected spectra and values, a prediction model using machine learning and minimizing an associated loss function incorporating spectral variability terms, the prediction model for predicting values for production semiconductor wafer targets based on their spectra.

VERFAHREN ZUM STEUERN EINES WASSERINJEKTORS ZWECKS DER VERHINDERUNG DER BEEINTRÄCHTIGUNG EINES KATALYSATORS FÜR ABGASREINIGUNG UND DURCH DIESES BETRIEBENER VERBRENNUNGSMOTOR

Die vorliegende Erfindung betrifft ein Verfahren zum Steuern eines Wasserinjektors und einen durch dieses Verfahren betriebenen Verbrennungsmotor, wobei das Verfahren und der Verbrennungsmotor dazu dienen, eine Beeinträchtigung eines Katalysators (engl: catalyst) für Abgasreinigung aufgrund der Temperaturerhöhung zu verhindern. Das Verfahren zum Steuern eines Wasserinjektors gemäß einem Ausführugnsbeispiel der Erfindung dasjenige darstellt, welches die Betätigung des Wasserinjektors steuern kann, der das Wasser in die Brennräume eines Verbrennungsmotors einspritzt, auf dem ein Turbosystem, das dazu dient, die Luft zu komprimieren und somit die Luftmenge zu vermehren, angewandt ist, wobei das Verfahren folgende Verfahrensschritte als Hauptpunkt der erfindungsgemäßen Ausgestaltung umfasst: das Beurteilen eines Katalysatorzustandes, bei dem der Zustand des Katalysators für die Abgasreinigung detektiert wird und danach anhand des detektierten Zustandes darüber entschieden wird, ob der Katalysator ...

Hetero-cyclic compound and organic light emitting device comprising the same

METROLOGY AND PROCESS CONTROL FOR SEMICONDUCTOR MANUFACTURING

A semiconductor metrology system including a spectrum acquisition tool for collecting, using a first measurement protocol, baseline scatterometric spectra on first semiconductor wafer targets, and for various sources of spectral variability, variability sets of scatterometric spectra on second semiconductor wafer targets, the variability sets embodying the spectral variability, a reference metrology tool for collecting, using a second measurement protocol, parameter values of the first semiconductor wafer targets, and a training unit for training, using the collected spectra and values, a prediction model using machine learning and minimizing an associated loss function incorporating spectral variability terms, the prediction model for predicting values for production semiconductor wafer targets based on their spectra.

Metrology and process control for semiconductor manufacturing

A semiconductor metrology system including a spectrum acquisition tool for collecting, using a first measurement protocol, baseline scatterometric spectra on first semiconductor wafer targets, and for various sources of spectral variability, variability sets of scatterometric spectra on second semiconductor wafer targets, the variability sets embodying the spectral variability, a reference metrology tool for collecting, using a second measurement protocol, parameter values of the first semiconductor wafer targets, and a training unit for training, using the collected spectra and values, a prediction model using machine learning and minimizing an associated loss function incorporating spectral variability terms, the prediction model for predicting values for production semiconductor wafer targets based on their spectra.

Metrology and process control for semiconductor manufacturing

Semiconductor metrology method and semiconductor metrology system

A semiconductor metrology system including a spectrum acquisition tool for collecting, using a first measurement protocol, baseline scatterometric spectra on first semiconductor wafer targets, and for various sources of spectral variability, variability sets of scatterometric spectra on second semiconductor wafer targets, the variability sets embodying the spectral variability, a reference metrology tool for collecting, using a second measurement protocol, parameter values of the first semiconductor wafer targets, and a training unit for training, using the collected spectra and values, a prediction model using machine learning and minimizing an associated loss function incorporating spectral variability terms, the prediction model for predicting values for production semiconductor wafer targets based on their spectra.

HOUSING INCLUDING PATTERNED-STRUCTURE LAYER AND METHOD THEREOF

According to various embodiments, there may be provided a housing manufacturing method including preparing a base material, disposing at least one patterned structure layer including a plurality of fillers on an upper portion of the base material, and disposing a protective layer on an upper portion of the patterned structure layer. In addition, the housing manufactured by the aforementioned manufacturing method may be applied to at least part of an exterior of an electronic device. 1. A housing comprising:a base material;at least one patterned structure layer comprising a plurality of fillers disposed on an upper portion of the base material; anda protective layer disposed on an upper portion of the patterned structure layer.2. The housing of claim 1 , wherein the plurality of fillers have a same period claim 1 , depth claim 1 , and shape.3. The housing of claim 1 , wherein the plurality of fillers have different shapes claim 1 , different periods claim 1 , and/or different depths for different regions claim 1 , and different colors are expressed by a different reflectance and/or transmittance of light.4. The housing of claim 1 , wherein the patterned structure layer comprises at least two layers claim 1 , and each of the at least two layers comprises a plurality of fillers having different shapes claim 1 , different periods claim 1 , and/or different depths.5. The housing of claim 1 , wherein the plurality of fillers have a step height which is gradually increased or decreased in a specific region.6. The housing of claim 1 , wherein the housing comprises at least one of: synthetic resin claim 1 , glass claim 1 , film claim 1 , metal claim 1 , and composite material.7. The housing of claim 1 ,wherein the housing comprises a curved region, andwherein the filler of the patterned structure layer disposed on each curved region and another region other than the curved region has different shapes, different cycles, and/or different depths.8. The housing of claim 1 , ...

METROLOGY AND PROCESS CONTROL FOR SEMICONDUCTOR MANUFACTURING

A semiconductor metrology system including a spectrum acquisition tool for collecting, using a first measurement protocol, baseline scatterometric spectra on first semiconductor wafer targets, and for various sources of spectral variability, variability sets of scatterometric spectra on second semiconductor wafer targets, the variability sets embodying the spectral variability, a reference metrology tool for collecting, using a second measurement protocol, parameter values of the first semiconductor wafer targets, and a training unit for training, using the collected spectra and values, a prediction model using machine learning and minimizing an associated loss function incorporating spectral variability terms, the prediction model for predicting values for production semiconductor wafer targets based on their spectra. 1. A semiconductor metrology method comprising:collecting, using a spectrum acquisition tool and in accordance with a first measurement protocol, a baseline set of spectra on a first set of semiconductor wafer targets;collecting, using a reference metrology tool and in accordance with a second measurement protocol, values of predefined parameters of the first set of semiconductor wafer targets;for each of one or more predefined sources of spectral variability, collecting a variability set of spectra using the spectrum acquisition tool, and in accordance with the first measurement protocol, on a second set of semiconductor wafer targets corresponding to the first set of semiconductor wafer targets, wherein the variability set of spectra embodies the spectral variability;creating a training set of data from the collected sets of spectra and parameter values;using one or more generative models to increase the size of the training set of data; and wherein the prediction model is configured to be used to predict values for any of the predefined parameters using production spectra of a third set of semiconductor wafer targets, wherein the production spectra ...

HETEROCYCLIC COMPOUND AND ORGANIC LIGHT EMITTING DEVICE INCLUDING SAME

The present specification relates to a hetero-cyclic compound and an organic light emitting device comprising the same. 3. The hetero-cyclic compound of claim 1 , wherein Rto Rare the same as or different from each other claim 1 , and are each independently selected from the group consisting of a substituted or unsubstituted phenyl group; a substituted or unsubstituted biphenyl group; a substituted or unsubstituted terphenyl group; and a substituted or unsubstituted fluorenyl group.5. An organic light emitting device claim 1 , comprising:a first electrode;a second electrode provided to face the first electrode; andone or more organic material layers provided between the first electrode and the second electrode,{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'wherein one or more layers of the organic material layers comprise the hetero-cyclic compound of .'}6. The organic light emitting device of claim 5 , wherein the organic material layer comprises a light emitting layer claim 5 , and the light emitting layer comprises the hetero-cyclic compound.7. The organic light emitting device of claim 5 , wherein the organic material layer comprises an electron transporting layer claim 5 , an electron injection layer claim 5 , or a layer which simultaneously transports and injects electrons claim 5 , and the electron transporting layer claim 5 , the electron injection layer claim 5 , or the layer which simultaneously transports and injects electrons comprises the hetero-cyclic compound.8. The organic light emitting device of claim 5 , wherein the organic material layer further comprises one or more selected from the group consisting of a hole injection layer claim 5 , a hole transporting layer claim 5 , a light emitting layer claim 5 , an electron transporting layer claim 5 , and an electron injection layer.10. The organic light emitting device of claim 9 , wherein L1 is a direct bond claim 9 , Ar3 is a divalent pyrene group claim 9 , Ar4 and Ar5 are the same as or ...

ELECTRONIC DEVICE INCLUDING THERMAL INTERFACE MATERIAL LAYER AND SEMICONDUCTOR PACKAGE

An electronic device includes a substrate, a first plate having a first internal surface facing a first surface of the substrate, and at least one first through-hole and at least one second through-hole, first and second semiconductor packages spaced apart from each other between the first surface and the first internal surface, a first thermal interface material layer contacting an upper surface of the first semiconductor package and the first internal surface, and filling at least a portion of the at least one first through-hole, and a second thermal interface material layer contacting an upper surface of the second semiconductor package and the first internal surface, and filling at least a portion of the at least one second through-hole. At least one of side surfaces of the first and second thermal interface material layers is exposed to an empty space between the first internal surface and the first surface. 1. An electronic device , comprising:a substrate having a first surface and a second surface opposing each other;a first plate having a first internal surface facing the first surface of the substrate, and a first external surface opposing the first internal surface, the first plate including at least one first through-hole and at least one second through-hole;a first semiconductor package and a second semiconductor package on the first surface of the substrate, the first semiconductor package and the second semiconductor package being between the first surface of the substrate and the first internal surface of the first plate, and the first semiconductor package and the second semiconductor package being spaced apart from each other;a first thermal interface material layer between the first semiconductor package and the first plate, the first thermal interface material layer contacting an upper surface of the first semiconductor package and the first internal surface of the first plate, and the first thermal interface material layer filling at least a ...

Detecting outliers and anomalies for ocd metrology machine learning

A system and methods for OCD metrology are provided including receiving training data for training an OCD machine learning (ML) model, including multiple pairs of corresponding sets of scatterometric data and reference parameters. For each of the pairs, one or more corresponding outlier metrics are by calculated and corresponding outlier thresholds are applied whether a given pair is an outlier pair. The OCD MIL model is then trained with the training data less the outlier pairs.

Detecting outliers and anomalies for ocd metrology machine learning

Metrology and process control for semiconductor manufacturing

A semiconductor metrology system including a spectrum acquisition tool for collecting, using a first measurement protocol, baseline scatterometric spectra on first semiconductor wafer targets, and for various sources of spectral variability, variability sets of scatterometric spectra on second semiconductor wafer targets, the variability sets embodying the spectral variability, a reference metrology tool for collecting, using a second measurement protocol, parameter values of the first semiconductor wafer targets, and a training unit for training, using the collected spectra and values, a prediction model using machine learning and minimizing an associated loss function incorporating spectral variability terms, the prediction model for predicting values for production semiconductor wafer targets based on their spectra.

Metrology and process control for semiconductor manufacturing

A semiconductor metrology system including a spectrum acquisition tool for collecting, using a first measurement protocol, baseline scatterometric spectra on first semiconductor wafer targets, and for various sources of spectral variability, variability sets of scatterometric spectra on second semiconductor wafer targets, the variability sets embodying the spectral variability, a reference metrology tool for collecting, using a second measurement protocol, parameter values of the first semiconductor wafer targets, and a training unit for training, using the collected spectra and values, a prediction model using machine learning and minimizing an associated loss function incorporating spectral variability terms, the prediction model for predicting values for production semiconductor wafer targets based on their spectra.

Leveraging processing-in-memory (pim) resources to expedite non-pim instructions executed on a host

Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host is disclosed. In an implementation, a memory controller identifies a first write instruction to write first data to a first memory location, where the first write instruction is not a processing-in-memory (PIM) instruction. The memory controller then writes the first data to a first PIM register. Opportunistically, the memory controller moves the first data from the first PIM register to the first memory location. In another implementation, a memory controller identifies a first memory location associated with a first read instruction, where the first read instruction is not a processing-in-memory (PIM) instruction. The memory controller identifies that a PIM register is associated with the first memory location. The memory controller then reads, in response to the first read instruction, first data from the PIM register.

Semiconductor apparatus for discharging heat

A semiconductor apparatus includes: a system substrate; a semiconductor package mounted on the system substrate and having a first length in a first horizontal direction; a conductive label flexible and arranged on the semiconductor package, the conductive label including: a first adhesive layer contacting the semiconductor package; a thermally-conductive layer attached to the semiconductor package by the first adhesive layer and having a second length in the first horizontal direction greater than the first length; and a second adhesive layer contacting a portion of a surface of the conductive layer, the portion not vertically overlapping the semiconductor package; a thermal interface material (TIM) arranged on the conductive layer to vertically overlap the semiconductor package; and a cover including: a first cover portion vertically overlapping the semiconductor package and contacting the TIM; and a second cover portion to which the thermally-conductive layer is attached by the second adhesive layer.

Semiconductor package and electronic device including the same

A semiconductor package includes a package board, at least one semiconductor chip disposed on the package board, a molding member disposed on the package board and at least partially surrounding the at least one semiconductor chip, and a heat dissipation member disposed on the at least one semiconductor chip and the molding member. The molding member has first region in which a plurality of uneven structures are disposed, and a second region spaced apart from an external region by the plurality of uneven structures. The plurality of uneven structures protrude to a predetermined height away from the semiconductor chip, the molding member, and the heat dissipation member, and may be formed as a part of the head dissipation member, or formed separately.

Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host

Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host is disclosed. In an implementation, a memory controller identifies a first write instruction to write first data to a first memory location, where the first write instruction is not a processing-in-memory (PIM) instruction. The memory controller then writes the first data to a first PIM register. Opportunistically, the memory controller moves the first data from the first PIM register to the first memory location. In another implementation, a memory controller identifies a first memory location associated with a first read instruction, where the first read instruction is not a processing-in-memory (PIM) instruction. The memory controller identifies that a PIM register is associated with the first memory location. The memory controller then reads, in response to the first read instruction, first data from the PIM register.

Metrology and process control for semiconductor manufacturing

A semiconductor metrology system including a spectrum acquisition tool for collecting, using a first measurement protocol, baseline scatterometric spectra on first semiconductor wafer targets, and for various sources of spectral variability, variability sets of scatterometric spectra on second semiconductor wafer targets, the variability sets embodying the spectral variability, a reference metrology tool for collecting, using a second measurement protocol, parameter values of the first semiconductor wafer targets, and a training unit for training, using the collected spectra and values, a prediction model using machine learning and minimizing an associated loss function incorporating spectral variability terms, the prediction model for predicting values for production semiconductor wafer targets based on their spectra.

Detecting outliers and anomalies for OCD metrology machine learning

A system and methods for OCD metrology are provided including receiving training data for training an OCD machine learning (ML) model, including multiple pairs of corresponding sets of scatterometric data and reference parameters. For each of the pairs, one or more corresponding outlier metrics are by calculated and corresponding outlier thresholds are applied whether a given pair is an outlier pair. The OCD MIL model is then trained with the training data less the outlier pairs.

Curved glass comprising anti-reflection and anti-scratch coating layer and electronic device

Disclosed is an electronic device. An electronic device according to various embodiments includes: a housing; a first glass plate attached to the housing and forming a portion of an external surface of the electronic device, wherein the first glass plate includes a flat portion, a curved portion extending from an edge of the flat portion, a first surface facing outwardly from the electronic device, and a second surface facing inwardly towards the electronic device; and a coating layer formed on the first surface of the first glass plate, wherein the coating layer includes a first layer having a first refractive index and containing at least one first material, and includes a second layer disposed further from the first surface than the first layer, containing at least one second material, and having a second refractive index different from the first refractive index.

Efficient caching and queueing for per-allocation non-redundant metadata

An apparatus includes circuitry to receive a memory access request based on a memory address in a memory allocation of a program. The memory allocation is assigned to a slot of memory apportioned into a plurality of slots. The circuitry is to calculate an index based, at least in part, on whether a size of the slot exceeds a slot threshold size, and determine whether a buffer communicatively coupled to the circuitry includes a buffer entry corresponding to the index and containing a set of metadata associated with the memory allocation. Based on the slot size, the circuitry is to calculate the index by either determining a metadata virtual address or by determining a virtual address of a midpoint of the slot. The indexed data may include bounds and tag information for the circuitry to determine if a memory access is within the bounds and matches the tag value.