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Применить Всего найдено 10489. Отображено 100.
10-03-2007 дата публикации

СТАНОК ДЛЯ ПРОДОЛЬНОГО РАЗРЕЗАНИЯ СЛИТКОВ КРЕМНИЯ

Номер: RU0000061718U1
Автор: Бараков Борис Николаевич, Муравицкий Степан Александрович, Никулин Анатолий Иванович, Филимонов Николай Иванович, Шагаров Борис Анатольевич
Принадлежит: Федеральное государственное унитарное предприятие "ГОРНО-ХИМИЧЕСКИЙ КОМБИНАТ"

1. Станок для продольного резания слитков кремния, содержащий станину с направляющими, колонку, каретку со шлифовальной головкой, систему охлаждения рабочей зоны, отличающийся тем, что станина снабжена дополнительно ходовым винтом, соединенным с мотор-редуктором, в цепи питания которого установлен тиристорный преобразователь частоты, а шлифовальная головка содержит несколько отрезных алмазных кругов, кроме того, на столе смонтирована плита со шпонкой, на которой установлены подвижные промежуточные опоры с пазами. 2. Станок по п.1, отличающийся тем, что насадок системы охлаждения снабжен соплами, направленными в зону резания каждого отрезного алмазного круга. 3. Станок по п.1, отличающийся тем, что станина сообщается с каскадным отстойником. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) 61 718 (13) U1 (51) МПК C30B 33/00 C30B 35/00 (2006.01) (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ, ПАТЕНТАМ И ТОВАРНЫМ ЗНАКАМ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (21), (22) Заявка: 2006131273/22 , 30.08.2006 (24) Дата начала отсчета срока действия патента: 30.08.2006 (45) Опубликовано: 10.03.2007 (73) Патентообладатель(и): Федеральное государственное унитарное предприятие "ГОРНО-ХИМИЧЕСКИЙ КОМБИНАТ" (RU) U 1 6 1 7 1 8 R U Ñòðàíèöà: 1 U 1 Формула полезной модели 1. Станок для продольного резания слитков кремния, содержащий станину с направляющими, колонку, каретку со шлифовальной головкой, систему охлаждения рабочей зоны, отличающийся тем, что станина снабжена дополнительно ходовым винтом, соединенным с мотор-редуктором, в цепи питания которого установлен тиристорный преобразователь частоты, а шлифовальная головка содержит несколько отрезных алмазных кругов, кроме того, на столе смонтирована плита со шпонкой, на которой установлены подвижные промежуточные опоры с пазами. 2. Станок по п.1, отличающийся тем, что насадок системы охлаждения снабжен соплами, направленными в зону резания каждого отрезного алмазного круга. 3. Станок по п.1, отличающийся тем, что станина ...

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Номер записи: 1
27-06-2008 дата публикации

УСТАНОВКА ДЛЯ ТЕРМИЧЕСКОЙ ОБРАБОТКИ МОНОКРИСТАЛЛОВ

Номер: RU0000074389U1
Автор: Антонов Игорь Николаевич, Волков Борис Михайлович, Калагурский Ярослав Иванович, Пивоваров Александр Викторович, Хоренко Александр Васильевич
Принадлежит: Общество с ограниченной отвественностью "ДОМСАТ"

1. Установка для термической обработки монокристаллов, содержащая цилиндрическую герметичную камеру, подключенную к вакуумному насосу и снабженную держателем с обрабатываемым монокристаллом, размещенным на продольной оси этой камеры, и, по меньшей мере, одним прозрачным окном, выполненным на продольной оси этой камеры с возможностью лучевого воздействия через него на монокристалл, и содержащая по меньшей мере, один источник инфракрасного излучения с отражателем, сфокусированным на обрабатываемый монокристалл, управляющее устройство и связанный с ним, по меньшей мере, один термоэлемент, установленный в зоне обрабатываемого монокристалла, отличающаяся тем, что установка дополнительно снабжена импульсным генератором плазмы, размещенным внутри герметичной камеры, емкостным накопителем энергии, запитанным на электрическую систему питания генератора, снабженную управляющим коммутатором, системой подачи, по меньшей мере, одного технологического газа в герметичную камеру и дополнительными источниками инфракрасного излучения, равномерно расположенными вокруг герметичной камеры на уровне обрабатываемого монокристалла в плоскости, перпендикулярной продольной оси герметичной камеры, при этом герметичная камера выполнена составной с разъемом в плоскости, перпендикулярной продольной оси этой камеры, и дополнительно снабжена боковыми прозрачными окнами, выполненными на уровне обрабатываемого монокристалла с возможностью лучевого воздействия на последний, управляющее устройство дополнительно снабжено средством контроля давления внутри герметичной камеры, средством расхода технологического газа и средствами контроля параметров плазмы, импульсный генератор плазмы выполнен в виде двухэлектродного разрядника, изолированного от герметичной камеры посредством диэлектрической трубы с перфорированной внутренней стенкой и снабженной кольцевой внутренней полостью, причем один из электродов разрядника выполнен в виде металлического цилиндра, расположенного внутри диэлектрической трубы с ...

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Номер записи: 2
27-08-2016 дата публикации

НОСИТЕЛЬ ДЛЯ ПЛАЗМОХИМИЧЕСКОГО ТРАВЛЕНИЯ ПОДЛОЖЕК ИЗ ДИЭЛЕКТРИЧЕСКИХ МАТЕРИАЛОВ

Номер: RU0000164392U1
Автор: Ковалев Михаил Сергеевич, Кузнецов Алексей Станиславович, Одиноков Сергей Борисович, Сагателян Гайк Рафаэлович
Принадлежит: федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Московский государственный технический университет имени Н.Э. Баумана" (МГТУ им. Н.Э. Баумана)

Носитель для плазмохимического травления подложек из диэлектрических материалов, содержащий плоское металлическое основание, над основанием плоский металлический экран с отверстием, соответствующим по конфигурации и размеру обрабатываемой подложке, устанавливаемой на основании, с обеспечением электрической изолированности основания и экрана друг от друга за счет диэлектрических прокладочных элементов между ними, отличающийся тем, что экран выполнен металлизированным в виде тонкого металлического покрытия, нанесенного на тонкую диэлектрическую пластину, выполняющую функцию прокладочного элемента; экран лежит на основании под действием собственного веса и находится с ним в оптическом контакте, закрывая полностью площадь контакта основания с плазмой; экран нарезан с обеспечением безотходного раскроя на элементы мозаично-замковой структуры типа «пазл» с возможностью посредством выборочного удаления отдельных элементов мозаично-замковой структуры формирования в экране вышеуказанного отверстия; форма элементов мозаично-замковой структуры с взаимно-обратными выступами и впадинами замков такова, что элементы, будучи собраны все вместе, покрывают всю плоскость металлического основания, обеспечивая невозможность разделения металлизированного экрана на части при горизонтальном механическом воздействии на элементы; между обрабатываемой подложкой и металлическим основанием помещена дополнительная металлическая прокладка, заходящая частично под экран и обрамляющая обрабатываемую площадь подложки в вышеуказанном отверстии экрана. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 164 392 U1 (51) МПК C30B 33/12 (2006.01) H01L 21/3065 (2006.01) C30B 35/00 (2006.01) B01J 3/02 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ (21)(22) Заявка: ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ 2016112585/05, 04.04.2016 (24) Дата начала отсчета срока действия патента: 04.04.2016 (45) Опубликовано: 27.08.2016 Стр.: 1 U 1 1 6 4 3 9 2 R U U 1 (54) НОСИТЕЛЬ ДЛЯ ПЛАЗМОХИМИЧЕСКОГО ТРАВЛЕНИЯ ПОДЛОЖЕК ИЗ ...

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Номер записи: 3
30-04-2020 дата публикации

Функциональный трехмерный компонент оптоэлектронного прибора

Номер: RU0000197477U1
Автор: Березовская Тамара Нарциссовна, Большаков Алексей Дмитриевич, Котляр Константин Павлович, Резник Родион Романович, Цырлин Георгий Эрнстович, Шевчук Дмитрий Степанович, Штром Игорь Викторович
Принадлежит: Федеральное государственное бюджетное учреждение высшего образования и науки "Санкт-Петербургский национальный исследовательский Академический университет имени Ж.И. Алферова Российской академии наук" (СПБАУ РАН им. Ж.И. Алферова)

Полезная модель относится к полупроводниковым приборам и может найти применение в промышленном производстве светоизлучающих устройств и фоточувствительных элементов. Функциональный трехмерный компонент оптоэлектронного прибора представляет собой бесподложечный массив однонаправленных нитевидных нанокристаллов нитрида индий-галлия, имеющих переменное по высоте поперечное сечение с утонениями на обоих концах и частично сросшихся в серединной по высоте зоне. Достигаемый технический результат - обеспечение конструктивной прочности (целостности) ФТК, сформированного в виде массива ННК нитрида индий-галлия, достаточной для его функционирования после отделения от подложки при высоком оптическом качестве материала ННК. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (51) МПК C30B 29/62 (2006.01) C30B 29/38 (2006.01) C30B 29/40 (2006.01) C30B 23/08 (2006.01) C30B 33/06 (2006.01) C30B 33/10 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА B82B 3/00 (2006.01) ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ B82Y 20/00 (2011.01) B82Y 40/00 (2011.01) G02B 1/02 (2006.01) (12) (13) 197 477 U1 H01L 21/02 (2006.01) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (52) СПК (21)(22) Заявка: 2019140444, 09.12.2019 (24) Дата начала отсчета срока действия патента: Дата регистрации: 30.04.2020 Приоритет(ы): (22) Дата подачи заявки: 09.12.2019 (45) Опубликовано: 30.04.2020 Бюл. № 13 U 1 1 9 7 4 7 7 R U (56) Список документов, цитированных в отчете о поиске: CN 109795982 A, 24.05.2019. EP 1796180 В1, 07.06.2017. WO 2005017962 A2, 24.02.2005. KEVIN D. GOODMAN et al., Green luminescence of InGaN nanowires grown on silicon substratesby molecular beam epitaxy, "Journal of Applied Physics", 2011,109, 084336. (54) Функциональный трехмерный компонент оптоэлектронного прибора (57) Реферат: Полезная модель относится к галлия, имеющих переменное по высоте полупроводниковым приборам и может найти поперечное сечение с утонениями на обоих концах применение в промышленном производстве и частично сросшихся в серединной по высоте светоизлучающих устройств и зоне. ...

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Номер записи: 4
12-01-2012 дата публикации

Thin Silicon Sheets for Solar Cells

Номер: US20120006409A1
Автор: Andrew William Blakers, Klaus Johannes Weber
Принадлежит: Transform Solar Pty Ltd

A thin layer of single-crystal silicon is produced by forming first trenches in a silicon substrate having (111) orientation; forming narrower second trenches at the base of the trenches; anisotropically etching lateral channels ( 4 ) from the second trenches, until adjacent etch fonts ( 16 ) substantially meet; and detaching said layer from the substrate. The trenches may be arranged so that the resultant layer has rows of slots, with the slots in adjacent rows being mutually offset. Solar cells may be formed on strips having two electrical contacts on the same face ( 6 ) of each strip ( 5 ).

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Номер записи: 5
12-01-2012 дата публикации

Hybrid Silicon Wafer and Method of Producing the Same

Номер: US20120009374A1
Автор: Hiroshi Takamura, Ryo Suzuki
Принадлежит: Nippon Mining and Metals Co Ltd

Provided is a hybrid silicon wafer in which molten state polycrystalline silicon and solid state single-crystal silicon are mutually integrated, comprising fine crystals having an average crystal grain size of 8 mm or less at a polycrystalline portion within 10 mm from a boundary with a single-crystal portion. Additionally provided is a method of manufacturing a hybrid silicon wafer, wherein a columnar single-crystal silicon ingot is sent in a mold in advance, molten silicon is cast around and integrated with the single-crystal ingot to prepare an ingot complex of single-crystal silicon and polycrystalline silicon, and a wafer shape is cut out therefrom. The provided hybrid silicon wafer comprises the functions of both a polycrystalline silicon wafer and a single-crystal wafer.

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Номер записи: 6
26-01-2012 дата публикации

Semiconductor substrate for solid-state image sensing device as well as solid-state image sensing device and method for producing the same

Номер: US20120021558A1
Автор: Kazunari Kurita
Принадлежит: Sumco Corp

There is provided a semiconductor substrate for solid-state image sensing device in which the production cost is lower than that of a gettering method through a carbon ion implantation and problems such as occurrence of particles at a device production step and the like are solved. Silicon substrate contains solid-soluted carbon having a concentration of 1×10 16 -1×10 17 atoms/cm 3 and solid-soluted oxygen having a concentration of 1.4×10 18 -1.6×10 18 atoms/cm 3 .

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Номер записи: 7
09-02-2012 дата публикации

Diamond semiconductor element and process for producing the same

Номер: US20120034737A1
Автор: Kenji Ueda, Makoto Kasu, Toshiki Makimoto, Yoshiharu Yamauchi
Принадлежит: Nippon Telegraph and Telephone Corp

A process of producing a diamond thin-film includes implanting dopant into a diamond by an ion implantation technique, forming a protective layer on at least part of the surface of the ion-implanted diamond, and firing the protected ion-implanted diamond at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C. A process of producing a diamond semiconductor includes implanting dopant into each of two diamonds by an ion implantation technique and superimposing the two ion-implanted diamonds on each other such that at least part of the surfaces of each of the ion-implanted diamonds makes contact with each other, and firing the ion implanted diamonds at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C.

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Номер записи: 8
23-02-2012 дата публикации

Method of processing of nitride semiconductor wafer, nitride semiconductor wafer, method of producing nitride semiconductor device and nitride semiconductor device

Номер: US20120043645A1
Автор: Hidenori Mikami, Keiji Ishibashi, Naoki Matsumoto
Принадлежит: Sumitomo Electric Industries Ltd

A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 μm-10 μm thick edge process-induced degradation layer.

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Номер записи: 9
01-03-2012 дата публикации

Polycrystalline silicon and method for production thereof

Номер: US20120052297A1
Автор: Erich Dornberger, Reiner Pech
Принадлежит: Wacker Chemie AG

Polycrystalline silicon of the invention contains: (a) polycrystalline silicon fragments, wherein at least 90% of the fragments have a size from 10 to 40 mm, (b) <15 ppmw of silicon dust particles having particle sizes <400 μm; (c) <14 ppmw of silicon dust particles having particle sizes <50 μm; (d) <10 ppmw of silicon dust particles having particle sizes <10 μm; (e) <3 ppmw of silicon dust particles having particle sizes <1 μm; and (f) surface metal impurities in an amount ≦0.1 ppbw and ≧100 ppbw. A polycrystalline silicon production method of the invention includes fracturing polycrystalline silicon deposited on thin rods in a Siemens reactor into fragments; classifying the fragments by size; and treating the fragments with compressed air or dry ice to remove silicon dust from the fragments without wet chemical cleaning.

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Номер записи: 10
29-03-2012 дата публикации

Supporting substrate, bonded substrate, method for manufacturing supporting substrate, and method for manufacturing bonded substrate

Номер: US20120074404A1
Автор: Kazuhiro Ushita
Принадлежит: Bridgestone Corp

Provided is a supporting substrate ( 30 ) to be bonded on a single crystalline wafer composed of a single crystalline body. The supporting substrate is provided with a silicon carbide polycrystalline substrate ( 10 ) composed of a silicon carbide polycrystalline body, and a coat layer ( 20 ) deposited on the silicon carbide polycrystalline substrate ( 10 ). The coat layer ( 20 ) is composed of silicon carbide or silicon and is in contact with the single crystalline wafer, and the arithmetic average roughness of the contact surface ( 22 ) of the coat layer ( 20 ) in contact with the single crystalline wafer is 1 nm or less.

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Номер записи: 11
26-04-2012 дата публикации

Support Ring For Supporting A Semiconductor Wafer Composed Of Monocrystalline Silicon During A Thermal Treatment, Method For The Thermal Treatment of Such A Semiconductor Wafer, and Thermally Treated Semiconductor Wafer Composed of Monocrystalline Silicon

Номер: US20120098100A1
Автор: Erich Daub, Michael Kloesler, Raimund Kaiss, Thomas Loch
Принадлежит: SILTRONIC AG

A support ring for supporting a monocrystalline silicon semiconductor wafer during a thermal treatment of the semiconductor wafer has outer and inner lateral surfaces and a curved surface extending from the outer lateral surface to the inner lateral surface, this curved surface serving for the placement of the semiconductor wafer. The curved surface has a radius of curvature of not less than 6000 mm and not more than 9000 mm for 300 mm diameter wafers, or a radius of curvature of not less than 9000 mm and not more than 14,000 mm for 450 mm diameter wafers. Use of the support ring during thermal treatment reduces slip and improves wafer nanotopography.

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Номер записи: 12
03-05-2012 дата публикации

Method and apparatus for treating diamond using liquid metal saturated with carbon

Номер: US20120107212A1
Автор: A. Marshall Stoneham, Philip H. Taylor
Принадлежит: Designed Materials Ltd

A method of treating a diamond, the method comprising: (i) providing a liquid metal saturated with carbon with respect to graphite precipitation; (ii) lowering the temperature of the liquid metal such that the liquid metal is saturated with carbon with respect to diamond precipitation; (iii) immersing a diamond in the liquid metal; and (iv) removing the diamond from the metal.

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Номер записи: 13
26-07-2012 дата публикации

Hybrid Silicon Wafer

Номер: US20120187409A1
Автор: Hiroshi Takamura, Ryo Suzuki
Принадлежит: JX Nippon Mining and Metals Corp

A hybrid silicon wafer which is a silicon wafer having a structure wherein monocrystalline silicon is embedded in polycrystalline silicon that is prepared by the unidirectional solidification/melting method. The longitudinal plane of crystal grains of the polycrystalline portion prepared by the unidirectional solidification/melting method is used as the wafer plane, and the monocrystalline silicon is embedded so that the longitudinal direction of the crystal grains of the polycrystalline portion forms an angle of 120° to 150° relative to the cleaved surface of the monocrystalline silicon. Thus provided is a hybrid silicon wafer comprising the functions of both a polycrystalline silicon wafer and a monocrystalline wafer.

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Номер записи: 14
26-07-2012 дата публикации

Method for making gallium nitride substrate

Номер: US20120190172A1
Автор: Jian-Shihn Tsang
Принадлежит: Hon Hai Precision Industry Co Ltd

A method for making a GaN substrate for growth of nitride semiconductor is provided. The method first provides a GaN single crystal substrate. Then an ion implanting layer is formed inside the GaN single crystal substrate, which divides the GaN single crystal substrate into a first section and a second section. After that, the GaN single crystal substrate is connected with an assistant substrate through a connecting layer. Thereafter, the GaN single crystal substrate is heated whereby the ion implanting layer is decompounded. Finally, the second section is separated from the first section. The first section left on a surface of the assistant substrate is provided for growth of nitride semiconductor thereon.

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Номер записи: 15
23-08-2012 дата публикации

Low-temperature selective epitaxial growth of silicon for device integration

Номер: US20120210932A1
Автор: Alexander Reznicek, Ali Khakifirooz, Bahman Hekmatshoar-Tabari, Davood Shahrjerdi, Devendra K. Sadana, Ghavam G. Shahidi
Принадлежит: International Business Machines Corp

An epitaxy method includes providing an exposed crystalline region of a substrate material. Silicon is epitaxially deposited on the substrate material in a low temperature process wherein a deposition temperature is less than 500 degrees Celsius. A source gas is diluted with a dilution gas with a gas ratio of dilution gas to source gas of less than 1000.

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Номер записи: 16
13-09-2012 дата публикации

Method of determining an amount of impurities that a contaminating material contributes to high purity silicon and furnace for treating high purity silicon

Номер: US20120227472A1
Автор: Alan Rytlewski, Dennis DePasa, Jon Host, Troy Houthoofd
Принадлежит: Individual

A method of determining an amount of impurities that a contaminating material contributes to high purity silicon comprises the step of partially encasing a sample of high purity silicon in the contaminating material. The sample encased in the contaminating material is heated within a furnace. A change in impurity content of the high purity silicon is determined after the step of heating, compared to an impurity content of the high purity silicon prior to the step of heating.

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Номер записи: 17
11-10-2012 дата публикации

Epitaxial growth method and devices

Номер: US20120256191A1
Автор: Anton Devilliers, Erik Byers, Scott Sills
Принадлежит: Individual

Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

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Номер записи: 18
08-11-2012 дата публикации

Nanoparticles having reduced ligand spheres

Номер: US20120283462A1
Автор: Frank Stefan Riehle, Gerald Urban, Michael Krüger, Yunfei Zhou
Принадлежит: Bayer Intellectual Property GmbH

The invention relates to the technical field of nanoparticles. The subject matter of the invention is a method for treating nanoparticles for the reduction of ligand spheres.

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Номер записи: 19
31-01-2013 дата публикации

GaN BONDED SUBSTRATE AND METHOD OF MANUFACTURING GaN BONDED SUBSTRATE

Номер: US20130029472A1
Автор: Bo Hyun Lee, Bongmo Park, Jun Sung Choi, Kwang Je Woo, Seung Yong Park
Принадлежит: Samsung Corning Precision Materials Co Ltd

A gallium nitride (GaN) bonded substrate and a method of manufacturing a GaN bonded substrate in which a polycrystalline nitride-based substrate is used. The method includes loading a single crystalline GaN substrate and a polycrystalline nitride substrate into a bonder; raising the temperature in the bonder; bonding the single crystalline GaN substrate and the polycrystalline nitride substrate together by pressing the single crystalline GaN substrate and the polycrystalline nitride substrate against each other after the step of raising the temperature; and cooling the resultant bonded substrate.

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Номер записи: 20
28-02-2013 дата публикации

Method of making lightweight, single crystal mirror

Номер: US20130052468A1
Автор: Vincent T. Bly
Принадлежит: UNITED OF AMERICA ADMINISTRATOR OF NATIONAL

A method of making a mirror from a single crystal blank may include fine grinding top and bottom surfaces of the blank to be parallel. The blank may then be heat treated to near its melting temperature. An optical surface may be created on an optical side of the blank. A protector may be bonded to the optical surface. With the protector in place, the blank may be light weighted by grinding a non-optical surface of the blank using computer controlled grinding. The light weighting may include creating a structure having a substantially minimum mass necessary to maintain distortion of the mirror within a preset limit. A damaged layer of the non-optical surface caused by light weighting may be removed with an isotropic etch and/or repaired by heat treatment. If an oxide layer is present, the entire blank may then be etched using, for example, hydrofluoric acid. A reflecting coating may be deposited on the optical surface.

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Номер записи: 21
18-04-2013 дата публикации

SILICON CARBIDE INGOT AND SILICON CARBIDE SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME

Номер: US20130095294A1
Автор: HARADA Shin, NISHIGUCHI Taro, Sasaki Makoto
Принадлежит: Sumitomo Electric Industries, Ltd.

A silicon carbide ingot excellent in uniformity in characteristics and a silicon carbide substrate obtained by slicing the silicon carbide ingot, and a method of manufacturing the same are obtained. A method of manufacturing a silicon carbide ingot includes the steps of preparing a base substrate having an off angle with respect to a (0001) plane not greater than 1° and composed of single crystal silicon carbide and growing a silicon carbide layer on a surface of the base substrate. In the step of growing a silicon carbide layer, a temperature gradient in a direction of width when viewed in a direction of growth of the silicon carbide layer is set to 10° C./cm or less. 1. A method of manufacturing a silicon carbide ingot , comprising the steps of:preparing a base substrate having an off angle with respect to a (0001) plane not greater than 1° and composed of single crystal silicon carbide; andgrowing a silicon carbide layer on a surface of said base substrate,in said step of growing a silicon carbide layer, a temperature gradient in a direction of width when viewed in a direction of growth of said silicon carbide layer being set to 10° C./cm or less.2. The method of manufacturing a silicon carbide ingot according to claim 1 , whereina surface of said silicon carbide layer located opposite to a side where the base substrate is located includes a (0001) facet plane, andsaid (0001) facet plane includes a central portion of said surface of the silicon carbide layer.3. The method of manufacturing a silicon carbide ingot according to claim 2 , whereina portion located under a region having said (0001) facet plane in said silicon carbide layer after the step of growing a silicon carbide layer is a high-nitrogen-concentration region higher in nitrogen concentration than a portion other than said portion located under the region having said (0001) facet plane in said silicon carbide layer.4. The method of manufacturing a silicon carbide ingot according to claim 3 , further ...

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Номер записи: 22
25-04-2013 дата публикации

Architectural construct having a plurality of implementations

Номер: US20130101808A1
Автор: Roy Edward McAlister
Принадлежит: McAlister Technologies LLC

An architectural construct is a synthetic material that includes a matrix characterization of different crystals. An architectural construct can be configured as a solid mass or as parallel layers that can be on a nano-, micro-, and macro-scale. Its configuration can determine its behavior and functionality under a variety of conditions. Implementations of an architectural construct can include its use as a substrate, sacrificial construct, carrier, filter, sensor, additive, and catalyst for other molecules, compounds, and substances, or may also include a means to store energy and generate power.

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Номер записи: 23
16-05-2013 дата публикации

Large area nitride crystal and method for making it

Номер: US20130119401A1
Автор: Derrick S. Kamber, Douglas W. Pocius, James S. Speck, Mark P. D&#39;Evelyn
Принадлежит: Soraa Inc

Techniques for processing materials in supercritical fluids including processing in a capsule disposed within a high-pressure apparatus enclosure are disclosed. The disclosed techniques are useful for growing crystals of GaN, AlN, InN, and their alloys, including InGaN, AlGaN, and AlInGaN for the manufacture of bulk or patterned substrates, which in turn can be used to make optoelectronic devices, lasers, light emitting diodes, solar cells, photoelectrochemical water splitting and hydrogen generation devices, photodetectors, integrated circuits, and transistors.

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Номер записи: 24
06-06-2013 дата публикации

Method and jig for holding silicon wafer

Номер: US20130140752A1
Автор: Toshiaki Ono, Yumi Hoshino
Принадлежит: Individual

Provided are a method and a jig for holding a silicon wafer, which are applied to the production of the silicon wafer having {110} or {100} plane as its principal surface, in which the silicon wafer is held while a silicon wafer holding positions are properly defined at wafer edge regions relative to the reference direction as being from the center of the silicon wafer toward <110> in crystal orientation in parallel to the wafer surface. In handling the silicon wafer, generation of contact scratches is suppressed as little as possible, and a fracture which is caused by development of the crack initiating from easily generated contact scratches can be prevented in the silicon wafer, particularly in the silicon wafer having {110} plane as its principal surface.

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Номер записи: 25
20-06-2013 дата публикации

METHOD FOR FORMING IDENTIFICATION MARKS ON SILICON CARBIDE SINGLE CRYSTAL SUBSTRATE, AND SILICON CARBIDE SINGLE CRYSTAL SUBSTRATE

Номер: US20130157009A1
Автор: Kondo Sadahiko
Принадлежит: HITACHI METALS ,LTD.

A method for forming an identification mark on a silicon carbide single crystal substrate according to the present invention includes: (a) scanning a principal surface of a silicon carbide single crystal substrate with a laser beam at a first energy density such that a groove is formed in the principal surface of the silicon carbide single crystal substrate, thereby forming an identification mark which is constituted of one or more grooves in the principal surface of the silicon carbide single crystal substrate; and (b) scanning an inside of the groove formed in the principal surface of the silicon carbide single crystal substrate with a laser beam at a second energy density that is lower than the first energy density. 1. A method for forming an identification mark on a silicon carbide single crystal substrate , comprising:(a) scanning a principal surface of a silicon carbide single crystal substrate with a laser beam at a first energy density such that a groove is formed in the principal surface of the silicon carbide single crystal substrate, thereby forming an identification mark which is constituted of one or more grooves in the principal surface of the silicon carbide single crystal substrate; and(b) scanning an inside of the groove formed in the principal surface of the silicon carbide single crystal substrate with a laser beam at a second energy density that is lower than the first energy density.2. The method of claim 1 , wherein a width of the groove is not less than 50 μm claim 1 , and a depth of the groove is not less than 20 μm.3. The method of wherein claim 1 , at least at a bottom surface of an internal surface of the groove claim 1 , the surface roughness Ra is not more than 1 μm.4. The method of claim 1 , further comprising(c) after step (b), performing mechanical polishing on the principal surface of the silicon carbide single crystal substrate.5. The method of wherein claim 4 , after step (c) claim 4 , gas phase etching is performed on the ...

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Номер записи: 26
20-06-2013 дата публикации

Method for manufacturing a silicon carbide wafer and respective equipment

Номер: US20130157448A1
Автор: Ferruccio Frisina, Giuseppe Abbondanza
Принадлежит: STMICROELECTRONICS SRL

An embodiment described herein includes a method for producing a wafer of a first semiconductor material. Said first semiconductor material has a first melting temperature. The method comprises providing a crystalline substrate of a second semiconductor material having a second melting temperature lower than the first melting temperature, and exposing the crystalline substrate to a flow of first material precursors for forming a first layer of the first material on the substrate. The method further comprising bringing the crystalline substrate to a first process temperature higher than the second melting temperature, and at the same time lower than the first melting temperature, in such a way the second material melts, separating the second melted material from the first layer, and exposing the first layer to the flow of the first material precursor for forming a second layer of the first material on the first layer.

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Номер записи: 27
18-07-2013 дата публикации

Process for obtaining nanocrystalline corundum from natural or synthetic alums

Номер: US20130183527A1
Автор: Joaquín Bastida Cuairán, Maria del Mar Urquila Casas, Pablo Rafael Pardo Ibañez, Rafael Ibanez Puchades
Принадлежит: UNIVERSITAT DE VALENCIA

The present invention relates to a process for obtaining nanocrystalline corundum, characterised in that it comprises a first step of thermal treatment of the raw material used in the process at standard pressure, to a temperature greater than that of the last endothermic accident of the differential thermal analysis record of the raw material, performed to 925° C.; and a second step of fast cooling from the maximum temperature reached in the preceding step to room temperature. Moreover, the present invention relates to the nanocrystalline corundum obtainable from the process described, as well as to multiple uses of said corundum. Furthermore, this material may be disaggregated, for example by means of high-energy grinding, to produce a fine aggregate that may be used as an abrasive or as a functional load in plastic polymers or other types of materials.

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Номер записи: 28
29-08-2013 дата публикации

Synthesis, capping and dispersion of nanocrystals

Номер: US20130221279A1
Автор: Jun Xu, Linfeng Gou, Robert J. Wiacek, Selina L. Thomas, Wei Xu, Xia Bai, Yijun Wang, Zehra Serpil Gonen Williams
Принадлежит: PIXELLIGENT TECHNOLOGIES LLC

Preparation of semiconductor nanocrystals and their dispersions in solvents and other media is described. The nanocrystals described herein have small (1-10 nm) particle size with minimal aggregation and can be synthesized with high yield. The capping agents on the as-synthesized nanocrystals as well as nanocrystals which have undergone cap exchange reactions result in the formation of stable suspensions in polar and nonpolar solvents which may then result in the formation of high quality nanocomposite films.

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Номер записи: 29
19-09-2013 дата публикации

Method for growing white color diamonds by using diborane and nitrogen in combination in a microwave plasma chemical vapor deposition system

Номер: US20130239615A1
Автор: Devi Shanker Misra
Принадлежит: IIA Technologies Pte Ltd

The present application discloses the details of a microwave plasma chemical vapor deposition process that uses Nitrogen and Diborane simultaneously in combination along with the Methane and Hydrogen gases to grow white color diamonds. The invention embodies using nitrogen to avoid inclusions and impurities in the CVD diamond samples and Diborane for the color enhancement during the growth of diamond. It is also found that heating of the so grown diamonds to 2000 C results in significant color enhancement due to the compensation of Nitrogen and Boron centers in the samples. The origin of the various colors in diamond is explained on the basis of the band diagram of CVD diamond.

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Номер записи: 30
12-12-2013 дата публикации

Method of semiconductor film stabilization

Номер: US20130330911A1
Автор: Errol Antonio C. Sanchez, Yi-Chiau Huang, Yihwan Kim
Принадлежит: Individual

Embodiments of the invention generally relate to methods for forming silicon-germanium-tin alloy epitaxial layers, germanium-tin alloy epitaxial layers, and germanium epitaxial layers that may be doped with boron, phosphorus, arsenic, or other n-type or p-type dopants. The methods generally include positioning a substrate in a processing chamber. A germanium precursor gas is then introduced into the chamber concurrently with a stressor precursor gas, such as a tin precursor gas, to form an epitaxial layer. The flow of the germanium gas is then halted, and an etchant gas is introduced into the chamber. An etch back is then performed while in the presence of the stressor precursor gas used in the formation of the epitaxial film. The flow of the etchant gas is then stopped, and the cycle may then be repeated. In addition to or as an alternative to the etch back process, an annealing processing may be performed.

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Номер записи: 31
19-12-2013 дата публикации

Semiconductor Structure and Method

Номер: US20130337631A1
Автор: Pu-Fang Chen, Sen-Hong Syue, Shiang-Bau Wang
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A system and method for providing support to semiconductor wafer is provided. An embodiment comprises introducing a vacancy enhancing material during the formation of a semiconductor ingot prior to the semiconductor wafer being separated from the semiconductor ingot. The vacancy enhancing material forms vacancies at a high density within the semiconductor ingot, and the vacancies form bulk micro defects within the semiconductor wafer during high temperature processes such as annealing. These bulk micro defects help to provide support and strengthen the semiconductor wafer during subsequent processing and helps to reduce or eliminate a fingerprint overlay that may otherwise occur.

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Номер записи: 32
30-01-2014 дата публикации

PROCESSES AND APPARATUSES FOR MANUFACTURING WAFERS

Номер: US20140026617A1
Автор: Yakub Andrew X.
Принадлежит:

The process for manufacturing wafers includes the steps of mounting an ingot as a work piece in a manner that permits rotation about a longitudinal axis of rotation and rotating the ingot about its longitudinal axis of rotation to permit a microwave device that generates an energized beam to penetrate an outer surface layer thereof. Furthermore, the process includes exfoliating the outer surface layer with the energized beam, removing the exfoliated outer surface layer from the ingot as a continuous planar strip and cutting the continuous planar strip into a wafer. 1. A process for manufacturing wafers , comprising the steps of:mounting an ingot as a work piece in a manner that permits rotation about a longitudinal axis of rotation;rotating said ingot about said longitudinal axis of rotation;energizing a microwave device for generating an energized beam sufficient for penetrating an outer surface layer of said rotating ingot;exfoliating said outer surface layer with said energized beam;removing said exfoliated outer surface layer from said ingot as a continuous planar strip; andcutting said continuous planar strip into a wafer.2. The process of claim 1 , wherein said removing step includes the step of transversely moving said continuous planar strip along a conveyor synchronized with said rotating ingot.3. The process of claim 1 , including the step of cooling said ingot at a penetration point where said energized beam bombards said outer surface layer of said ingot.4. The process of claim 3 , wherein said energized beam comprises an energy level between 0.3-1.7 megaelectron volts.5. The process of claim 1 , including the step of calibrating said microwave device to maximize a Q value.6. The process of claim 1 , wherein said microwave device comprises a klystron for generating said energized beam comprising a proton beam or an ion beam.7. The process of claim 1 , wherein said ingot comprises a cylinder carried by a rotatable shaft mountable to a rotor for rotating ...

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Номер записи: 33
06-03-2014 дата публикации

Group iii nitride wafer and its production method

Номер: US20140065796A1
Автор: Edward Letts, Sierra HOFF, Tadao Hashimoto
Принадлежит: Seoul Semiconductor Co Ltd

The present invention discloses a group III nitride wafer such as GaN, AlN, InN and their alloys having one surface visually distinguishable from the other surface. After slicing of the wafer from a bulk crystal of group III nitride with a mechanical method such as multiple wire saw, the wafer is chemically etched so that one surface of the wafer is visually distinguishable from the other surface. The present invention also discloses a method of producing such wafers.

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Номер записи: 34
27-03-2014 дата публикации

Method for creating atomically sharp edges on objects made of crystal material

Номер: US20140082947A1
Автор: Faisal Nabulsi, Sunil Phatak
Принадлежит: Rubicon Technology Inc

A process to make atomically sharp cutting devices is described. The process may provide for a cost effective and efficient technique of producing the atomically sharp cutting devices made from single crystal material such as, for example, sapphire, silicon carbide, silicon, and the like. The process may include identifying and choosing a preferred geometric orientation of the crystal material where cleavage can be promoted along a preferred natural plane of the single crystal material, thus ultimately producing an atomically sharp edge. The single crystal material may be covered at select surface locations by a photo-resist material arranged in a predetermined alignment with reference to the preferred plane to prevent etching at unexposed surface portions while permitting etching at exposed surface portions of the single crystal material. An atomic edge may be created by physical cleaving once the etching has reached a predetermined end-point.

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Номер записи: 35
03-04-2014 дата публикации

LARGE ALUMINUM NITRIDE CRYSTALS WITH REDUCED DEFECTS AND METHODS OF MAKING THEM

Номер: US20140093671A1
Автор: Bondokov Robert, Morgan Kenneth E., Schowalter Leo J., Slack Glen A.
Принадлежит:

Reducing the microvoid (MV) density in AlN ameliorates numerous problems related to cracking during crystal growth, etch pit generation during the polishing, reduction of the optical transparency in an AlN wafer, and, possibly, growth pit formation during epitaxial growth of AlN and/or AlGaN. This facilitates practical crystal production strategies and the formation of large, bulk AlN crystals with low defect densities—e.g., a dislocation density below 10cmand an inclusion density below 10cmand/or a MV density below 10cm. 138.-. (canceled)39. An AlN single crystal having at least one of (i) an optical absorption coefficient of less than 5 cmat all wavelengths in a range spanning 500 nm to 3 ,000 nm or (ii) an optical absorption coefficient of less than 1 cmat any wavelength in a range spanning 210 nm to 4 ,500 nm.40. The AlN single crystal of claim 39 , wherein the AlN single crystal has an optical absorption coefficient of less than 5 cmat all wavelengths in a range spanning 500 nm to 3 claim 39 ,000 nm.41. The AlN single crystal of claim 40 , wherein the AlN single crystal has an optical absorption coefficient of less than 1 cmat any wavelength in a range spanning 210 nm to 4 claim 40 ,500 nm.42. The AlN single crystal of claim 39 , wherein the AlN single crystal has an optical absorption coefficient of less than 1 cmat any wavelength in a range spanning 210 nm to 4 claim 39 ,500 nm.43. The AlN single crystal of claim 39 , wherein the AlN single crystal has a microvoid density less than approximately 10cm.44. The AlN single crystal of claim 39 , wherein the AlN single crystal is substantially crack-free.45. The AlN single crystal of claim 39 , wherein the AlN single crystal is in the form of a wafer with a surface having a crystalline orientation within 2° of the (0001) c-face and an Al polarity.46. The AlN single crystal of claim 40 , wherein the AlN single crystal is in the form of a wafer with a surface having a crystalline orientation within 2° of the (0001) c ...

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Номер записи: 36
02-01-2020 дата публикации

CHALCOGEN-CONTAINING COMPOUND, ITS PREPARATION METHOD AND THERMOELECTRIC ELEMENT COMPRISING THE SAME

Номер: US20200002168A1
Автор: JUNG Myung Jin, KIM Min Kyoung, KO Kyung Moon, MIN Yu Ho, PARK Chee Sung, PARK Cheol Hee
Принадлежит: LG CHEM, LTD.

A chalcogen-containing compound of the following chemical formula which exhibits an excellent thermoelectric performance index (ZT) through an increase in power factor and a decrease in thermal conductivity, a method for preparing the same, and a thermoelectric element including the same: MVSnSbTe, wherein V is vacancy, M is at least one alkali metal, x≥6, and 0 Подробнее

Номер записи: 37
05-01-2017 дата публикации

METHOD AND DEVICE FOR SLICING A SHAPED SILICON INGOT USING LAYER TRANSFER

Номер: US20170002479A1
Автор: Henley Francois J.
Принадлежит:

A method for slicing a crystalline material ingot includes providing a crystalline material boule characterized by a cropped structure including a first end-face, a second end-face, and a length along an axis in a first crystallographic direction extending from the first end-face to the second end-face. The method also includes cutting the crystalline material boule substantially through a first crystallographic plane in parallel to the axis to separate the crystalline material boule into a first portion with a first surface and a second portion with a second surface. The first surface and the second surface are planar surfaces substantially along the first crystallographic plane. The method further includes exposing either the first surface of the first portion or the second surface of the second portion, and performing a layer transfer process to form a crystalline material sheet from either the first surface of the first portion or from the second surface of the second portion. 1. A crystalline material boule portion used to produce a plurality of crystalline material sheets , the crystalline material boule portion comprising:a major surface that is substantially planar along a crystallographic plane;a first side face that is substantially planar along a first direction orthogonal to the major surface; anda second side face that is substantially planar along a second direction orthogonal to the major surface,wherein the major surface is exposed to produce the plurality of crystalline material sheets through a layer transfer process.2. The crystalline material boule portion of claim 1 , wherein the crystalline material boule portion is cut from a crystalline material boule that has a cropped structure including a first end-face claim 1 , a second end-face claim 1 , and a length along an axis in a crystallographic direction substantially extending from the first end-face to the second end-face claim 1 ,wherein the first and the second side faces correspond to the ...

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Номер записи: 38
05-01-2017 дата публикации

Method for heat treatment of silicon single crystal wafer

Номер: US20170002480A1
Автор: Hiroyuki Kamada, Ryoji Hoshi
Принадлежит: Shin Etsu Handotai Co Ltd

The present invention is a method for a heat treatment of a silicon single crystal wafer in an oxidizing ambient, including: performing the heat treatment based on a condition determined by a tripartite correlation between a heat treatment temperature during the heat treatment, an oxygen concentration in the silicon single crystal wafer before the heat treatment, and a void size in the silicon single crystal wafer before the heat treatment. This provides a method for a heat treatment of a silicon single crystal wafer which can annihilate void defects or micro oxide precipitate nuclei in a silicon single crystal wafer with low cost, efficiently, and securely by a heat treatment in an oxidizing ambient.

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Номер записи: 39
07-01-2016 дата публикации

METHOD FOR CONTROLLING DONOR CONCENTRATION IN Ga2O3 SINGLE CRYSTAL BODY, AND METHOD FOR FORMING OHMIC CONTACT

Номер: US20160002823A1
Автор: HIGASHIWAKI Masataka, SASAKI Kohei
Принадлежит:

Provided is a method for controlling a donor concentration in a GaO-based single crystal body. In addition, an ohmic contact having a low resistance is formed between a GaO-based single crystal body and an electrode. A donor concentration in a GaO-based single crystal body is controlled by a method which includes a step wherein Si, which serves as a donor impurity, is introduced into the GaO-based single crystal body by an ion implantation method at an implantation concentration of 1×10cmor less, so that a donor impurity implanted region is formed in the GaO-based single crystal body, the donor impurity implanted region having a higher donor impurity concentration than the regions into which Si is not implanted, and a step wherein Si in the donor impurity implanted region is activated by annealing, so that a high donor concentration region is formed. 1. A method for controlling a donor concentration in a GaOsingle crystal body , comprising:{'sub': 2', '3', '2', '3, 'sup': 20', '−3, 'introducing Si as a donor impurity into the GaOsingle crystal body by an ion implantation method at an implantation concentration of not more than 1×10cmso as to form a donor impurity implanted region in the GaOsingle crystal body, the donor impurity implanted region having a higher donor impurity concentration than a region into which the Si is not implanted; and'}activating the Si in the donor impurity implanted region by annealing so as to form a high donor concentration region.2. The method for controlling a donor concentration in a GaOsingle crystal body according to claim 1 , wherein the implantation concentration is not less than 1×10cm.3. The method for controlling a donor concentration in a GaOsingle crystal body according to claim 2 , wherein the implantation concentration is not less than 1×10cmand not more than 1×10cm.4. The method for controlling a donor concentration in a GaOsingle crystal body according to claim 3 , wherein the implantation concentration is not less than 2 ...

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Номер записи: 40
02-01-2020 дата публикации

METHODS FOR MODELING THE IMPURITY CONCENTRATION OF A SINGLE CRYSTAL SILICON INGOT

Номер: US20200002837A1
Автор: Hudson Carissima Marie, Ryu JaeWoo
Принадлежит:

Methods for forming single crystal silicon ingots in which plural sample rods are grown from the melt are disclosed. A parameter related to the impurity concentration of the melt or ingot is measured. In some embodiments, the sample rods each have a diameter less than the diameter of the product ingot. 1. A method for modeling the impurity concentration of a single crystal silicon ingot , the method comprising:pulling a first sample rod from a silicon melt disposed in a crucible, the first sample rod having a first sample rod diameter of less than 100 mm;measuring a first sample rod parameter related to the impurity content of the first sample rod;pulling a second sample rod from the silicon melt, the second sample rod having a first sample rod diameter of less than 100 mm;measuring a second sample rod parameter related to the impurity content of the second sample rod;determining the impurity concentration of a single crystal silicon ingot based at least in part on the measured first sample rod parameter and the measured second sample rod parameter.2. The method as set forth in wherein the first sample rod parameter and the second sample rod parameter is the same parameter.3. The method as set forth in wherein the parameter is selected from the group consisting of the phosphorous concentration claim 2 , boron concentration claim 2 , aluminum concentration claim 2 , gallium concentration claim 2 , arsenic concentration claim 2 , indium concentration claim 2 , antimony concentration claim 2 , total impurity concentration claim 2 , dopant concentration claim 2 , and resistivity of the sample rod.4. The method as set forth in wherein the first sample rod diameter and the second sample rod diameter is each less than about 50 mm.5. The method as set forth in wherein the first sample rod diameter and the second sample rod diameter is each less than about 25 mm.6. The method as set forth in wherein the first sample rod diameter and the second sample rod diameter from about ...

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Номер записи: 41
02-01-2020 дата публикации

TUNED MATERIALS, TUNED PROPERTIES, AND TUNABLE DEVICES FROM ORDERED OXYGEN VACANCY COMPLEX OXIDES

Номер: US20200002845A1
Автор: Chen Chonglin, Liu Ming, Ma Chunrui
Принадлежит:

A single-crystalline LnBMO or LnBMO compound is provided, which includes an ordered oxygen vacancy structure; wherein Ln is a lanthanide, B is an alkali earth metal, M is a transition metal, O is oxygen, and 0≤δ≤1. Methods of making and using the compound, and devices and compositions including same are also provided. 112-. (canceled)13. A multiferroic device , comprising a single-crystalline LnBMO or LnBMO compound , comprising an ordered oxygen vacancy structure; whereinLn is a lanthanide,B is an alkali earth metal,M is a transition metal,O is oxygen, and0≤δ≤1.1432-. (canceled)33. The multiferroic device of claim 13 , wherein Ln is La claim 13 , Pr claim 13 , Nd claim 13 , Sm claim 13 , or Gd.34. The multiferroic device of claim 13 , wherein B is Ba claim 13 , Sr claim 13 , or Ca.35. The multiferroic device of claim 13 , wherein M is Co claim 13 , Mn claim 13 , Fe claim 13 , or Ni.36. The multiferroic device of claim 13 , wherein the compound has a double perovskite structure. This application claims the benefit of U.S. Provisional Application No. 62/003,751, filed May 28, 2014. The entire contents of the aforementioned application is incorporated by reference in its entirety.This invention was made with government support under Grant No. DE-FE0003780 awarded by the Department of Energy. The government has certain rights in the invention.This application relates to single-crystalline LaBaCoO (LBCO) compounds, methods of making, and their use. In particular, the application relates to epitaxial LBCO thin films, methods of making, and their use.Cobalt oxides have been widely studied for many years due to their high chemical stability, excellent oxygen permeability, and many other unique physical chemistry properties for energy conversion, catalysts, sensors, and solid oxides fuel cells, etc. Kim, G. et al., 88, 024103, (2006); Liu, J. et al., 22, 799-802, (2010); Kim, Y. M. et al., 11, 888-894, (2012). Cobaltates also exhibit rich magnetic and electronic transport ...

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Номер записи: 42
01-01-2015 дата публикации

Substrate with high fracture strength

Номер: US20150004366A1
Автор: Jer-Liang Yeh
Принадлежит: National Tsing Hua University NTHU

The invention discloses a substrate with high fracture strength. The substrate according to the present invention includes a plurality of nanostructures. The substrate has a first surface, where the nanostructures protrude from the first surface. Through the formation of the nanostructures, the fracture strength of the substrate is enhanced.

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Номер записи: 43
02-01-2020 дата публикации

High transmittance single crystal yap scintillators

Номер: US20200003912A1
Автор: Jan KUBÁT, Jan Polak, Martin Klejch, Tomas Marek
Принадлежит: CRYTUR

A single crystal yttrium aluminum perovskite scintillator has a minimum thickness of at least 5 mm and a transmittance of at least 50% at a wavelength of 370 nm. A method for fabricating the yttrium aluminum perovskite scintillator includes acquiring a yttrium aluminum perovskite single crystal boule, annealing the yttrium aluminum perovskite single crystal boule in an oxygen containing environment to obtain a partially annealed crystal, and annealing the partially annealed crystal in an inert environment or a reducing environment to obtain the yttrium aluminum perovskite single crystal scintillator.

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Номер записи: 44
02-01-2020 дата публикации

INTERNAL CLADDING IN SAPPHIRE OPTICAL DEVICE AND METHOD OF MAKING SAME

Номер: US20200003949A1
Автор: Blue Thomas Elder, Wilson Brandon Augustus
Принадлежит:

Provided is a cladded single crystal sapphire optical device (e.g., a s sapphire optical fiber or wafer). In one embodiment, the innovation provides a method for forming a cladding in a single crystal sapphire optical device by reactor irradiation. The reactor irradiation creates ions external to the optical device that enter the optical device, displace atoms in the optical device, and are implanted in the optical device, thus modifying the index of refraction of the optical device near the surface of the optical device and creating a cladding in the sapphire optical device. 1. A sapphire optical device having a graded internal refractive cladding within the sapphire optical device.2. The sapphire optical device of claim 1 , wherein the sapphire optical device is a sapphire optical fiber.3. The sapphire optical device of inscribed with at least one type-II Bragg grating.4. The sapphire optical device of claim 1 , wherein the sapphire optical device is a sapphire optical wafer.5. The sapphire optical device of claim 4 , wherein the sapphire optical wafer includes an ion implanted waveguide.6. A waveguide comprising the sapphire optical device of . The waveguide of claim 4 , wherein the waveguide is implemented onto a silicon chip.87. The waveguide of claim claim 4 , wherein the silicon chip is incorporated into a photonic device.9. The waveguide of claim 9 , wherein the photonic device is a silicon chip-based spectroscopy device. This application is a Continuation of and claims priority to U.S. patent application Ser. No. 15/928,411 entitled “Internal Cladding in Sapphire Optical Device and Method of Making Same’ filed on Mar. 22, 2018 which claims the benefit of U.S. Provisional Patent Application Ser. No. 62/475,312 entitled “Creation of an Internal Cladding in Sapphire Optical Fiber by Reactor Irradiation” filed on Mar. 23, 2017, each of which is incorporated herein in its entirety by reference.The innovation relates to internal cladding in sapphire optical ...

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Номер записи: 45
04-01-2018 дата публикации

METHOD FOR MAKING NANO-HETEROSTRUCTURE

Номер: US20180006227A1
Автор: FAN SHOU-SHAN, JIANG KAI-LI, WEI YANG, ZHANG Jin
Принадлежит:

The present disclosure relates to a method for making nanoscale heterostructure. The method includes: providing a support and forming a first carbon nanotube layer on the support, and the first carbon nanotube layer comprises a plurality of first source carbon nanotubes; forming a semiconductor layer on the first carbon nanotube layer; covering a second carbon nanotube layer on the semiconductor layer, and the second carbon nanotube layer comprises a plurality of second source carbon nanotubes; finding and labeling a first carbon nanotube in the first carbon nanotube layer and a second carbon nanotube in the second carbon nanotube layer; removing the plurality of first source carbon nanotubes and the plurality of second source carbon nanotubes; and annealing the multilayer structure. 1. A method for making a nano-heterostructure comprising:{'b': '1', 'S: providing a support and forming a first carbon nanotube layer on the support, and the first carbon nanotube layer comprises a plurality of first source carbon nanotubes;'}{'b': '2', 'S: forming a semiconductor layer on the first carbon nanotube layer;'}{'b': '3', 'S: covering a second carbon nanotube layer on the semiconductor layer, and the second carbon nanotube layer comprises a plurality of second source carbon nanotubes;'}{'b': '4', 'S: finding and labeling a first carbon nanotube in the first carbon nanotube layer and a second carbon nanotube in the second carbon nanotube layer;'}{'b': '5', 'S: removing the plurality of first source carbon nanotubes and the plurality of second source carbon nanotubes except for the first carbon nanotube and the second carbon nanotube to form a multilayer structure; and'}{'b': '6', 'S: annealing the multilayer structure.'}21. The method of claim 1 , wherein in step S claim 1 , a method for forming the first carbon nanotube layer on the support is a transfer method.3. The method of claim 2 , wherein the transfer method comprises the following steps:growing the first carbon ...

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Номер записи: 46
04-01-2018 дата публикации

NANO-HETEROSTRUCTURE

Номер: US20180006231A1
Автор: FAN SHOU-SHAN, JIANG KAI-LI, WEI YANG, ZHANG Jin
Принадлежит:

The present disclosure relates to a method for making nanoscale heterostructure. The method includes: providing a support and forming a first carbon nanotube layer on the support, and the first carbon nanotube layer comprises a plurality of first source carbon nanotubes; forming a semiconductor layer on the first carbon nanotube layer; covering a second carbon nanotube layer on the semiconductor layer, and the second carbon nanotube layer comprises a plurality of second source carbon nanotubes; finding and labeling a first carbon nanotube in the first carbon nanotube layer and a second carbon nanotube in the second carbon nanotube layer; removing the plurality of first source carbon nanotubes and the plurality of second source carbon nanotubes; and annealing the multilayer structure. 1. A nano-heterostructure comprising:a first carbon nanotube oriented along a first direction;a semiconductor layer with a thickness ranging from 1 nanometer to 200 nanometers, and the semiconductor layer comprising a first surface and a second surface opposite to the first surface;a second carbon nanotube oriented along a second direction;wherein the first carbon nanotube is located on the first surface, the second carbon nanotube is located on the second surface, the semiconductor layer is sandwiched between the first carbon nanotube and the second carbon nanotube, and the first carbon nanotube and the second carbon nanotube are crossed with each other.2. The nano-heterostructure of claim 1 , wherein the first carbon nanotube is a metallic carbon nanotube.3. The nano-heterostructure of claim 2 , wherein the first carbon nanotube is a single-walled carbon nanotube.4. The nano-heterostructure of claim 1 , wherein the second carbon nanotube is a metallic carbon nanotube.5. The nano-heterostructure of claim 4 , wherein the second carbon nanotube is a single-walled carbon nanotube.6. The nano-heterostructure of claim 1 , wherein a diameter of the first carbon nanotube ranges from 1 ...

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Номер записи: 47
04-01-2018 дата публикации

NANO-SCALE TRANSISTOR

Номер: US20180006252A1
Автор: FAN SHOU-SHAN, JIANG KAI-LI, WEI YANG, ZHANG Jin
Принадлежит:

The present disclosure relates to a nano-scale transistor. The nano-scale transistor includes a source electrode, a drain electrode, a gate electrode and a nano-heterostructure. The nano-heterostructure is electrically coupled with the source electrode and the drain electrode. The gate electrode is insulated from the nano-heterostructure, the source electrode and the drain electrode via an insulating layer. The nano-heterostructure includes a first carbon nanotube, a second carbon nanotube and a semiconductor layer. The semiconductor layer includes a first surface and a second surface opposite to the first surface. The first carbon nanotube is located on the first surface, the second carbon nanotube is located on the second surface. 1. A nano-scale transistor comprising: a first carbon nanotube oriented along a first direction;', 'a semiconductor layer with a thickness ranging from 1 nanometer to 200 nanometers, and the semiconductor layer comprising a first surface and a second surface opposite to the first surface;', 'a second carbon nanotube oriented along a second direction; and', 'wherein the first carbon nanotube is located on the first surface, the second carbon nanotube is located on the second surface, the semiconductor layer is sandwiched between the first carbon nanotube and the second carbon nanotube, and the first carbon nanotube and the second carbon nanotube are crossed with each other., 'a source electrode, a drain electrode, a gate electrode, and a nano-heterostructure; the nano-heterostructure being electrically coupled with the source electrode and the drain electrode, the gate electrode being insulated from the nano-heterostructure, the source electrode and the drain electrode via an insulating layer; and, the nano-heterostructure comprises2. The nano-scale transistor of claim 1 , wherein the source electrode is located at one end of the first carbon nanotube and adhered on a surface of the first carbon nanotube.3. The nano-scale transistor of ...

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Номер записи: 48
04-01-2018 дата публикации

LIGHT DETECTOR

Номер: US20180006255A1
Автор: FAN SHOU-SHAN, JIANG KAI-LI, WEI YANG, ZHANG Jin
Принадлежит:

The present disclosure relates to a light detector. The light detector includes a first electrode, a second electrode, a current detector, a power source and a nano-heterostructure. The nano-heterostructure is electrically coupled with the first electrode and the second electrode. The nano-heterostructure includes a first carbon nanotube, a second carbon nanotube and a semiconductor layer. The semiconductor layer includes a first surface and a second surface opposite to the first surface. The first carbon nanotube is located on the first surface, the second carbon nanotube is located on the second surface. 1. A light detector comprising: a semiconductor layer with a thickness ranging from 1 nanometer to 100 nanometers, and the semiconductor layer comprising a first surface and a second surface;', 'a first carbon nanotube located on the first surface and arranged along a first direction; and', 'a second carbon nanotube located on the second surface and arranged along a second direction different from the first direction, and the second carbon nanotube being crossed with the first carbon nanotube., 'a first electrode, a second electrode, a current detector, a power source and a nano-heterostructure; the nano-heterostructure being electrically coupled with the first electrode and the second electrode, wherein a circuit is formed by the first electrode, the second electrode, the current detector, the power source and the nano-heterostructure; and the nano-heterostructure comprises2. The light detector of claim 1 , wherein the first electrode is located at one end of the first carbon nanotube and adhered on a surface of the first carbon nanotube.3. The light detector of claim 1 , wherein the second electrode is located at one end of the second carbon nanotube and adhered on a surface of the second carbon nanotube.4. The light detector of claim 1 , wherein the first carbon nanotube is a metallic carbon nanotube.5. The light detector of claim 4 , wherein the first carbon ...

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Номер записи: 49
02-01-2020 дата публикации

Method for Separating Thin Layers of Solid Material from a Solid Body

Номер: US20200006119A1
Автор: Drescher Wolfram, Richter Jan
Принадлежит:

Providing a solid body to be split into a number of layers of solid material, introducing or generating defects in the solid body in order to determine a first detachment plane () along which a first layer of solid material is separated from the solid body, providing a receiving layer for holding the layer of solid material on the solid body, applying heat to the receiving layer in order to generate, in particular mechanically, stresses in the solid body, due to the stresses a crack propagating in the solid body along the detachment plane, which crack separates the first layer of solid material from the solid body, then providing a second receiving layer for holding another layer of solid material on the solid body reduced by the first layer of solid material, introducing or generating defects in the solid body in order to determine a second detachment plane () along which a second layer of solid material is separated from the solid body, applying heat to the second receiving layer in order to generate, in particular mechanically, stresses in the solid body, due to the stresses a crack propagating in the solid body along the second detachment plane, which crack separates the second layer of solid material from the solid body. 1. (canceled)2. A method for producing layers of solid material , the method comprising:introducing or generating defects in a solid body to define a first detachment plane along which a first layer of solid material is to be separated from the solid body;providing a first receiving layer for holding the first layer of solid material on the solid body;applying heat to the first receiving layer to generate stresses in the solid body, the stresses causing a first crack to propagate in the solid body along the first detachment plane, wherein the first layer of solid material is separated from the solid body along the first crack;after separating the first layer of solid material from the solid body, introducing or generating defects in the solid ...

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Номер записи: 50
02-01-2020 дата публикации

Epitaxial Layers in Source/Drain Contacts and Methods of Forming the Same

Номер: US20200006159A1
Автор: Ding-Kang SHIH, Pang-Yen Tsai
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A method includes providing a p-type S/D epitaxial feature and an n-type source/drain (S/D) epitaxial feature, forming a semiconductor material layer over the n-type S/D epitaxial feature and the p-type S/D epitaxial feature, processing the semiconductor material layer with a germanium-containing gas, where the processing of the semiconductor material layer forms a germanium-containing layer over the semiconductor material layer, etching the germanium-containing layer, where the etching of the germanium-containing layer removes the germanium-containing layer formed over the n-type S/D epitaxial feature and the semiconductor material layer formed over the p-type S/D epitaxial feature, and forming a first S/D contact over the semiconductor material layer remaining over the n-type S/D epitaxial feature and a second S/D contact over the p-type S/D epitaxial feature. The semiconductor material layer may have a composition similar to that of the n-type S/D epitaxial feature.

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Номер записи: 51
03-01-2019 дата публикации

FZ SILICON AND METHOD TO PREPARE FZ SILICON

Номер: US20190006190A1
Автор: HUBER Alois, LENZ Andrej
Принадлежит: SILTRONIC AG

FZ silicon which shows no degradation of its minority carrier lifetime after any processing steps at a processing temperature of less than 900° C. is prepared by annealing FZ silicon at an annealing temperature of greater than or equal to 900° C. and processing the annealed FZ silicon at a processing temperature of less than 900° C. 114.-. (canceled)15. A method for preparing FZ silicon with improved minority carrier lifetime , comprising:annealing FZ silicon at an annealing temperature of ≥900° C., and further processing the annealed FZ silicon at processing temperatures of less than 900° C.16. The method of claim 15 , further comprising mechanically forming a plurality of FZ silicon wafers from an FZ pulled ingot claim 15 , prior to annealing at ≥900° C.17. The method of claim 15 , comprising annealing an FZ pulled ingot at an annealing temperature of ≥900° C. claim 15 , and then mechanically forming a plurality of FZ wafers.18. The method of claim 15 , wherein the FZ silicon is annealed in an oxygen-containing ambient.19. The method of claim 16 , wherein at least one FZ wafer formed from the FZ silicon is further processed at a processing temperature of less than 900° C.20. The method of claim 17 , wherein at least one FZ wafer formed from the FZ silicon is further processed at a processing temperature of less than 900° C.21. The method of claim 15 , wherein the annealing step is performed in a rapid thermal processing chamber.22. The method of claim 15 , wherein processing the annealed FZ silicon at a processing temperature of less than 900° C. comprises a step of deposition of polycrystalline silicon on a surface of an FZ wafer.23. The method of claim 15 , wherein the FZ silicon is doped with nitrogen.24. FZ silicon which shows no degradation of minority carrier lifetime after any processing steps at processing temperatures of less than 900° C.25. The FZ silicon of claim 24 , doped with nitrogen.26. The FZ silicon of claim 24 , comprising a wafer with a nominal ...

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Номер записи: 52
03-01-2019 дата публикации

METHOD OF PRODUCING LITHIUM NIOBATE SINGLE CRYSTAL SUBSTRATE

Номер: US20190007025A1
Автор: Kajigaya Tomio
Принадлежит: SUMITOMO METAL MINING CO., LTD.

To provide a method of producing a lithium niobate (LN) substrate which allows treatment conditions regarding a temperature, a time, and the like to be easily managed and in which an in-plane distribution of a volume resistance value is very small, and also variations in volume resistivity are small among substrates machined from the same ingot. 1. A method of producing a lithium niobate single crystal substrate by using a lithium niobate single crystal grown by the Czochralski process , wherein{'sub': 2', '3, 'sup': 8', '12, 'a lithium niobate single crystal having a Fe concentration of 50 mass ppm or more and 2000 mass ppm or less in the single crystal and being in a form of an ingot is buried in an Al powder or a mixed powder of Al and AlO, and heat-treated at a temperature of 450° C. or more and less than 660° C., which is a melting point of aluminum, to produce a lithium niobate single crystal substrate having a volume resistivity controlled to be within a range of 1×10Ω·cm or more to 2×10Ω·cm or less.'}2. The method of producing a lithium niobate single crystal substrate according to claim 1 , whereinthe lithium niobate single crystal being in the form of an ingot to be heat-treated is a lithium niobate single crystal ingot after growth of the single crystal and until after cylindrical abrading process.3. The method of producing a lithium niobate single crystal substrate according to claim 2 , whereina surface roughness of the lithium niobate single crystal ingot after the cylindrical abrading process is 0.2 μm or more and 2 μm or less in arithmetic average roughness Ra.4. The method of producing a lithium niobate single crystal substrate according to claim 1 , whereinthe heat treatment is conducted in a vacuum atmosphere or in a reduced-pressure atmosphere of an inert gas.5. The method of producing a lithium niobate single crystal substrate according to claim 1 , whereinthe heat treatment is conducted for 10 hours or more.6. The method of producing a lithium ...

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Номер записи: 53
14-01-2021 дата публикации

Treatment solution and treatment method

Номер: US20210008399A1
Автор: Eunsang KWON, Hiroyuki Fukui, Ikuo Uematsu, Kenya UCHIDA, Takeaki Iwamoto
Принадлежит: Tohoku University NUC, Toshiba Corp

According to one embodiment, a treatment solution is provided. The treatment solution is used for treating a byproduct stemming from a process of depositing a silicon-containing material on a member using a gas which includes silicon and halogen. The treatment solution includes at least one of an inorganic base or an organic base and being basic.

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Номер записи: 54
12-01-2017 дата публикации

SEMICONDUCTOR SUBSTRATE MANUFACTURING METHOD

Номер: US20170009378A1
Автор: Abe Yukio, Kitamura Toshio, SHIBATA Masatomo, Yoshida Takehiro
Принадлежит:

A semiconductor substrate manufacturing method includes: epitaxially growing a columnar III nitride semiconductor single crystal on a principal place of a circular substrate; removing a hollow cylindrical region at an outer peripheral edge side of the III nitride semiconductor single crystal to leave a solid columnar region at an inside of the hollow cylindrical region of the III nitride semiconductor single crystal; and slicing the solid columnar region after removing the hollow cylindrical region. The hollow cylindrical region is removed such that the shape of the III nitride semiconductor single crystal is always keeps an axial symmetry that a center axis of the III nitride semiconductor single crystal is defined as a symmetric axis. 1. A method for manufacturing a semiconductor substrate , comprising:epitaxially growing a columnar group III nitride semiconductor single crystal on a principal plane of a circular substrate;removing a hollow cylindrical region at an outer peripheral edge side of the group III nitride semiconductor single crystal to leave a solid columnar region at an inside of the hollow cylindrical region of the group III nitride semiconductor single crystal; andslicing the solid columnar region after removing the hollow cylindrical region, wherein the removing of the hollow cylindrical region is carried out such that a shape of the group III nitride semiconductor single crystal always keeps an axial symmetry that a central axis of the semiconductor crystal is defined as a symmetry axis.2. The method according to claim 1 , wherein the hollow cylindrical region comprises a region that has a concentration of an impurity that is different from that in the solid columnar region.3. The method according to claim 1 , wherein the hollow cylindrical region comprises a region formed by a crystal growth using a plane that has a different orientation from an orientation in an upper surface of the solid columnar region as a growth interface in the epitaxial ...

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Номер записи: 55
27-01-2022 дата публикации

LARGE GRAIN QUASI-SINGLE-CRYSTAL FILM AND MANUFACTURING METHOD THEREOF

Номер: US20220025550A1
Автор: CHEN Chih, LI YU-JIN
Принадлежит:

A large grain quasi-single-crystal film and a manufacturing method thereof are provided. The metal film having the <111> preferred orientation on its surface is subjected to mechanical tensile force to make the arrangement of crystal grains more ordered. The metal film is grown into a film with large crystal grains having an average diameter of over 500 microns by annealing at a temperature below the recrystallization temperature, thereby obtaining a large grain quasi-single-crystal film having the preferred directions of three axes. The large grain quasi-single-crystal film has a <110> preferred orientation along the tensile direction and a <211> preferred orientation along the direction vertical to the tensile force, and maintains a <111> preferred orientation on its top surface. The present invention can be used to produce highly anisotropic large-area quasi-single-crystal films, and can also be applied to grow 2-dimensional materials or develop anisotropic structures. 1. A large grain quasi-single-crystal film , comprising a plurality of close packed crystal grains , wherein said crystal grains in over 50% area of a surface of said large grain quasi-single-crystal film have a <111> preferred orientation; after said large grain quasi-single-crystal film is plastically deformed by a mechanical tensile force and annealed , said crystal grains in over 50% area has a <110> preferred orientation along a tensile direction; said crystal grains in over 50% area has a <211> preferred orientation along a direction vertical to said tensile direction;said crystal grains has an average diameter of over 500 μm.2. The large grain quasi-single-crystal film according to claim 1 , wherein said surface is a (111) crystallographic plane.3. The large grain quasi-single-crystal film according to claim 1 , wherein said large grain quasi-single-crystal film includes a plurality of columnar crystal grains.4. The large grain quasi-single-crystal film according to claim 1 , wherein said ...

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Номер записи: 56
14-01-2021 дата публикации

METHOD OF MANUFACTURING DIAMOND SUBSTRATE, DIAMOND SUBSTRATE, AND DIAMOND COMPOSITE SUBSTRATE

Номер: US20210010131A1
Автор: Nishibayashi Yoshiki, Okahisa Takuji, Tatsumi Natsuo, Yamamoto Yoshiyuki
Принадлежит: Sumitomo Electric Industries, Ltd.

A method of manufacturing a diamond substrate includes: forming an ion implantation layer at a side of a main surface of a diamond seed substrate by implanting ions into the main surface of the diamond seed substrate; producing a diamond structure by growing a diamond growth layer by a vapor phase synthesis method on the main surface of the diamond seed substrate, after implanting the ions; and performing heat treatment on the diamond structure. The performed heat treatment causes the diamond structure to be separated along the ion implantation layer into a first structure including the diamond seed substrate and failing to include the diamond growth layer, and a diamond substrate including the diamond growth layer. Thus, the method of manufacturing a diamond substrate is provided that enables a diamond substrate with a large area to be manufactured in a short time and at a low cost. 1. A diamond substrate of a single crystal , a first emission peak having an emission peak wavelength in a wavelength range of not less than 450 nm and not more than 650 nm, and', 'a second emission peak having an emission peak wavelength in a wavelength range of not less than 570 nm and not more than 580 nm, the photoluminescence spectrum being obtained by applying, to the diamond substrate, excitation light having a peak wavelength in a wavelength range of not less than 315 nm and not more than 335 nm at a temperature in a temperature range of not less than 7 K and not more than 83 K,, 'a photoluminescence spectrum of the diamond substrate including'}the first emission peak having a full width at half maximum of not less than 50 nm,the second emission peak having a full width at half maximum of not more than 10 nm, anda peak height of the first emission peak being not less than 0.1 times as high as a peak height of the second emission peak, wherein a first surface; and', 'a second surface located opposite to the first surface,, 'the diamond substrate includesa concentration of first ...

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Номер записи: 57
10-01-2019 дата публикации

METHOD FOR MANUFACTURING SINGLE-CRYSTAL SiC, AND HOUSING CONTAINER

Номер: US20190010629A1
Автор: Torimi Satoshi, Yabuki Norihito
Принадлежит: TOYO TANSO CO., LTD.

Provided is a method for producing high-purity SiC single crystal, which is applicable to a process of growing SiC single crystal through a solution growth method. This method is for producing SiC single crystal and includes growing, through a solution growth method, an epitaxial layer on a seed material, at least a surface of which is made of SiC, wherein the SiC single crystal is grown so that impurity concentrations therein measured by secondary ion mass spectrometry are very small. Also provided is a housing container for growing SiC single crystal through a solution growth method using a Si melt, including a feed material that is disposed on at least a surface of the housing container and adds, to the Si melt, an additional material that is SiC and/or C. Performing the solution growth method using this housing container can produce high-purity SiC single crystal without any special treatment. 1. A method for producing silicon carbide single crystal , comprising:growing, through a solution growth method, an epitaxial layer on a seed material, at least a surface of which is made of silicon carbide, whereinthe epitaxial layer is grown to yield silicon carbide single crystal whose impurity concentrations measured by secondary ion mass spectrometry satisfy the following conditions:{'sup': 16', '3, '4.00×10or less (atoms/cm) of aluminum;'}{'sup': 14', '3, '3.00×10or less (atoms/cm) of titanium;'}{'sup': 15', '3, '7.00×10or less (atoms/cm) of chromium; and'}{'sup': 15', '3, '1.00×10or less (atoms/cm) of iron.'}2. The method according to claim 1 , whereinthe impurity concentrations in the silicon carbide single crystal further satisfy the following conditions:{'sup': 13', '3, '2.00×10or less (atoms/cm) of sodium;'}{'sup': 14', '3, '1.00×10or less (atoms/cm) of phosphorus;'}{'sup': 14', '3, '1.00×10or less (atoms/cm) of calcium;'}{'sup': 12', '3, '1.00×10or less (atoms/cm) of vanadium;'}{'sup': 14', '3, '5.00×10or less (atoms/cm) of nickel; and'}{'sup': 14', '3, '2.00× ...

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Номер записи: 58
09-01-2020 дата публикации

Two-stage seeded growth of large aluminum nitride single crystals

Номер: US20200010975A1
Автор: James R. Grandusky, Leo J. Schowalter, Robert T. Bondokov
Принадлежит: Crystal IS Inc

In various embodiments, growth of large, high-quality single crystals of aluminum nitride is enabled via a two-stage process utilizing two different crystalline seeds.

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Номер записи: 59
09-01-2020 дата публикации

CALCIUM FLUORIDE MEMBER, METHOD FOR PRODUCING SAME, AND METHOD FOR PRESSURE-BONDING CALCIUM FLUORIDE CRYSTAL

Номер: US20200010977A1
Автор: AZUMI Minako, SUZUKI Shitoka, UEHARA Naoyasu
Принадлежит: NIKON CORPORATION

The calcium fluoride member includes a first member made from monocrystalline calcium fluoride and a second member made from monocrystalline or polycrystalline calcium fluoride. The first member and the second member is pressure-bonded together to form the calcium fluoride member. 1. A calcium fluoride member , comprising:a first member made from monocrystalline calcium fluoride; anda second member made from monocrystalline or polycrystalline calcium fluoride,the first member and the second member being pressure-bonded together to form the calcium fluoride member.2. The calcium fluoride member according to claim 1 , wherein the second member is made from monocrystalline calcium fluoride.3. The calcium fluoride member according to claim 1 , wherein the calcium fluoride member is used as a member for constituting a light source.4. The calcium fluoride member according to claim 3 , wherein the member for constituting the light source is a gas sealing container that includes a spherical shell in which a gas is sealed therein.5. The calcium fluoride member according to claim 3 , wherein the member for constituting the light source is a gas sealing container in which a gas is sealed therein claim 3 , the gas sealing container including a first cylinder in which the gas is sealed therein and a flange that is pressure-bonded to an end of the first cylinder in an axial direction of the first cylinder claim 3 , the first cylinder being included as the first member and the flange being included as the second member.6. The calcium fluoride member according to claim 1 , wherein the calcium fluoride member is a cylinder-shaped member claim 1 , and a flow path for circulating a coolant is formed inside a peripheral wall portion of the cylinder-shaped member.7. The calcium fluoride member according to claim 6 ,wherein the cylinder-shaped member is a gas sealing container in which a gas is sealed therein,the gas sealing container includes a first cylinder as the first member and a ...

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Номер записи: 60
12-01-2017 дата публикации

EPITAXIAL-SILICON-WAFER MANUFACTURING METHOD AND EPITAXIAL SILICON WAFER

Номер: US20170011918A1
Автор: Ono Toshiaki, TORIGOE Kazuhisa
Принадлежит: SUMCO CORPORATION

A manufacturing method of an epitaxial silicon wafer including a silicon wafer doped with boron and having a resistivity of 100 mΩ•cm or less and an epitaxial film formed on the silicon wafer includes: growing the epitaxial film on the silicon wafer; and applying a heat treatment on the epitaxial silicon wafer at a temperature of less than 900 degrees C. 1. A manufacturing method of an epitaxial silicon wafer comprising: a silicon wafer doped with boron and having a resistivity of 100 mΩ•cm or less; and an epitaxial film provided on a surface of the silicon wafer , the method comprising:growing the epitaxial film on the silicon wafer; andapplying a heat treatment on the epitaxial silicon wafer at a temperature of less than 900 degrees C.2. The manufacturing method of an epitaxial silicon wafer according to claim 1 , wherein{'sup': 17', '3', '17', '3, 'an oxygen concentration of the silicon wafer before being subjected to the heat treatment is 8×10atoms/cmor more and 18×10atoms/cmor less (according to ASTM F-121, 1979), and'}a film thickness of the epitaxial film is 0.5 μm or more and 8.0 μm or less.3. The manufacturing method of an epitaxial silicon wafer according to claim 1 , wherein{'sup': 17', '3, 'an average oxygen concentration of the epitaxial film after the heat treatment is 1.7×10atoms/cm(according to ASTM F-121, 1979) or more.'}5. An epitaxial silicon wafer comprising:a silicon wafer doped with boron and having a resistivity of 100 mΩ•cm or less; andan epitaxial film provided on a surface of the silicon wafer, wherein{'sup': 17', '3, 'an average oxygen concentration of the epitaxial film is 1.7×10atoms/cm(according to ASTM F-121, 1979) or more.'}6. The epitaxial silicon wafer according to claim 5 , whereinwhen an oxygen-concentration profile in a depth direction is measured, a local oxygen-concentration increase profile is observable in a vicinity of an interface between the silicon wafer and the epitaxial film. The present invention relates to a ...

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Номер записи: 61
03-02-2022 дата публикации

METHOD FOR MANUFACTURING TWO-DIMENSIONAL MATERIAL USING TOP-DOWN METHOD

Номер: US20220033265A1
Автор: Lee JaeHyun, MOON Jiyun
Принадлежит: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION

The present embodiments relate to a method for manufacturing a two-dimensional material using a top-down method, the method includes the steps of preparing a bulk crystal, forming a metal layer on the bulk crystal, and then attaching a thermal release tape on the metal layer, exfoliating a two-dimensional material to which the metal layer and the thermal release tape have been attached from the bulk crystal, transferring the two-dimensional material to which the metal layer and the thermal release tape have been attached onto a substrate, and removing the thermal release tape and the metal layer from the substrate onto which the two-dimensional material has been transferred. 1. A method for manufacturing a two-dimensional material using a top-down method , the method comprising the steps of:preparing a bulk crystal;forming a metal layer on the bulk crystal, and then attaching a thermal release tape on the metal layer;exfoliating a two-dimensional material to which the metal layer and the thermal release tape have been attached from the bulk crystal;transferring the two-dimensional material to which the metal layer and the thermal release tape have been attached onto a substrate; andremoving the thermal release tape and the metal layer from the substrate onto which the two-dimensional material has been transferred.2. The method of claim 1 , wherein the bulk crystal includes at least one of graphite claim 1 , transition metal dichalcogenide (TMD) claim 1 , hexagonal boron nitride (h-BN) claim 1 , and black phosphorus (BP).3. The method of claim 1 , wherein the metal layer is formed using a metal including at least one of gold claim 1 , silver claim 1 , copper claim 1 , iron claim 1 , nickel claim 1 , cobalt claim 1 , aluminum claim 1 , and palladium.4. The method of claim 1 , wherein the step of forming the metal layer is performed by a deposition method using at least one of thermal evaporation equipment and an E-beam evaporator.5. The method of claim 1 , wherein ...

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Номер записи: 62
15-01-2015 дата публикации

Self-aligned tunable metamaterials

Номер: US20150017466A1
Автор: Arturo A. Ayon, Diana Strickland, Ramakrishna Kotha
Принадлежит: Individual

A self-aligned tunable metamaterial is formed as a wire mesh. Self-aligned channel grids are formed in layers in a silicon substrate using deep trench formation and a high-temperature anneal. Vertical wells at the channels may also be etched. This may result in a three-dimensional mesh grid of metal and other material. In another embodiment, metallic beads are deposited at each intersection of the mesh grid, the grid is encased in a rigid medium, and the mesh grid is removed to form an artificial nanocrystal.

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Номер записи: 63
19-01-2017 дата публикации

Crucible, fabrication method of the crucible, and fabrication method of a crystalline material by means of such a crucible

Номер: US20170016140A1
Автор: Denis Chavrier, Etienne Pihan, Jean-Paul Garandet
Принадлежит: Commissariat a lEnergie Atomique et aux Energies Alternatives CEA

A crucible for formation of a crystalline material by solidification by growth on seed, including a bottom, at least one side wall orthogonal to the bottom of the crucible, and at least two marks extending on the inner surface of the at least one side wall in an orthogonal direction to the bottom of the crucible, for materialising the position of at least one seed designed to be positioned at the bottom of the crucible, the seed including at least first and second surfaces orthogonal to the bottom of the crucible. The respective positions of at least two of the marks on at least one of the side walls define, in the crystalline material, a first cutting plane tangent to the first surface of the seed and a second cutting plane tangent to the second surface of the seed.

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Номер записи: 64
17-01-2019 дата публикации

Shaped silicon ingot using layer transfer

Номер: US20190017192A1
Автор: Francois J. Henley
Принадлежит: Silicon Genesis Corp

A shaped crystalline ingot for an ion cleaving process has a major surface that is substantially planar, a first side face that is substantially planar along a first direction orthogonal to the major surface, and a second side face that is substantially planar along a second direction orthogonal to the major surface. The ion cleaving process is a process in which ions are implanted into the shaped crystalline ingot to form a cleave plane that separates a substrate comprising the major surface from the shaped crystalline ingot.

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Номер записи: 65
16-01-2020 дата публикации

Epitaxial silicon wafer

Номер: US20200020817A1
Автор: Kazuhisa TORIGOE, Toshiaki Ono
Принадлежит: Sumco Corp

A method of manufacturing an epitaxial silicon wafer that includes growing a silicon single crystal ingot doped with a boron concentration of 2.7×1017 atoms/cm3 or more and 1.3×1019 atoms/cm3 or less by the CZ method; producing a silicon substrate by processing the silicon single crystal ingot; and forming an epitaxial layer on a surface of the silicon substrate. During growing of the silicon single crystal ingot, the pull-up conditions of the silicon single crystal ingot are controlled so that the boron concentration Y (atoms/cm3) and an initial oxygen concentration X (×1017 atoms/cm3) satisfy the expression X≤−4.3×10−19Y+16.3.

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Номер записи: 66
26-01-2017 дата публикации

BORON-DOPED N-TYPE SILICON TARGET

Номер: US20170022603A1
Автор: Ivanov Eugene Y., Yuan Yongwen
Принадлежит:

Sputter targets and methods of making same. The targets comprise B doped n-type Si. The targets may be made from single crystal boron doped p-type Si ingot made by the CZ method. Resistivities along the length of the crystal are measured, and blanks may be cut perpendicular to the ingot central axis at locations having resistivities of from about 1-20 ohm.cm. The blanks are then formed to acceptable shapes suitable for usage as sputter targets in PVD systems. No donor killing annealing is performed on the ingot or blanks. 1. Sputter target comprising B doped n-type Si having a resistivity of about 0.01-700 ohm.cm.2. Sputter target as recited in wherein said resistivity is about 1-20 ohm.cm.3. Sputter target as recited in wherein said resistivity is about 1-12 ohm.cm.4. Sputter target as recited in wherein said Si has an oxygen content of about 0.1 to about 200 ppm.5. Sputter target as recited in wherein said Si has an oxygen content of about 1 to about 60 ppm.6. Sputter target as recited in having a B content of about 0.001 to 1 ppm.7. Sputter target made by obtaining single crystal ingot of B doped p-type Si having a resistivity of about 1-60 ohm.cm comprising forming blanks from said ingot claim 1 , measuring the resistivity of said blanks claim 1 , selecting blanks having resistivities of from about 1-20 ohm.cm claim 1 , said selected blanks not being further heat treated at temperatures of about 400° C. and higher claim 1 , and forming said blanks into shapes suitable for use as a sputter target.8. Sputter target as recited in wherein said step of selecting blanks comprises selecting blanks having resistivities of about 1-12 ohm.cm.9. Method of making a B-doped p-typed Si sputter target comprising:a) obtaining a single crystal Si ingot comprising B prepared by the CZ method, said ingot having a central axis,b) measuring resistivities of said ingot at at least one location along said central axis,c) determining locations along said central axis wherein the ...

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Номер записи: 67
25-01-2018 дата публикации

HEATING MODULATORS TO IMPROVE EPI UNIFORMITY TUNING

Номер: US20180023214A1
Автор: KUMAR SURAJIT, LAU Shu-Kwan, Ranish Joseph M., Samir Mehmet Tugrul, SANCHEZ ERROL ANTONIO C., Shah Kartik, Ye Zhiyuan
Принадлежит:

Embodiments disclosed herein generally related to a processing chamber, and more specifically a heat modulator assembly for use in a processing chamber. The heat modulator assembly includes a heat modulator housing and a plurality of heat modulators. The heat modulator housing includes a housing member defining a housing plane, a sidewall, and an annular extension. The sidewall extends perpendicular to the housing plane. The annular extension extends outward from the sidewall. The plurality of heat modulators is positioned in the housing member. 1. A heat modulator assembly for use in an epitaxial chamber , comprising:a heat modulator housing comprising a housing member defining a housing plane, a sidewall extending perpendicular to the housing plane, and an annular extension extending outward from the sidewall, wherein the heat modulator housing is in a multi-axis arrangement; anda plurality of heat modulators positioned in the housing member.2. The heat modulator assembly of claim 1 , wherein the multi-axis arrangement is a two-axis formation with the heat modulators positioned along a first axis and a second axis.3. The heat modulator assembly of claim 1 , wherein the multi-axis arrangement is a multi-axis formation with the heat modulators positioned plane along two or more axes.4. The heat modulator assembly of claim 3 , wherein the two or more axes do not align.5. The heat modulator assembly of claim 1 , wherein each of the heat modulators comprises:a body;a filament disposed in the body;a first convex lens disposed in the body to collect and collimate rays from the filament; anda second convex lens disposed in the body to converge the collimated rays onto a substrate.6. The heat modulator assembly of claim 1 , wherein each of the heat modulators comprises:a lamp; andan ellipsoid reflector positioned about the lamp, such that the lamp is positioned at a focus of the ellipsoid reflector.7. The heat modulator assembly of claim 1 , wherein at least one of the ...

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Номер записи: 68
25-01-2018 дата публикации

Electro-optical single crystal-element, method for the preparation thereof, and systems employing the same

Номер: US20180024389A1
Автор: Pengdi Han, Welling Yan
Принадлежит: Individual

The present invention relates to an Electro-Optical (E-O) crystal elements, their applications and the processes for the preparation thereof More specifically, the present invention relates to the E-O crystal elements (which can be made from doped or un-doped PMN-PT, PIN-PMN-PT or PZN-PT ferroelectric crystals) showing super-high linear E-O coefficient γ c , e.g., transverse effective linear E-O coefficient γ T c , more than 1100 pm/V and longitudinal effective linear E-O coefficient γ l c up to 527 pm/V, which results in a very low half-wavelength voltage V l π below 200V and V T π below about 87V in a wide number of modulation, communication, laser, and industrial uses.

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Номер записи: 69
24-01-2019 дата публикации

ALUMINUM OXIDE, METHOD FOR MANUFACTURING ALUMINUM OXIDE AND OPTICAL COMPONENT

Номер: US20190024258A1
Автор: MIZUGUCHI Masafumi
Принадлежит: NIKON CORPORATION

Aluminum oxide provides, at a thickness of 5 mm, an internal transmittance of 90% or higher for light at a wavelength of 193 nm. 1. Aluminum oxide providing , at a thickness of 5 mm , an internal transmittance of 90% or higher for light at a wavelength of 193 nm.2. The aluminum oxide according to claim 1 , wherein:the internal transmittance achieved therein is 95% or higher.3. The aluminum oxide according to claim 1 , wherein:{'sub': '80', 'a wavelength λof light for which an internal transmittance of 80% is achieved at a thickness of 5 mm is 170 nm or less.'}4. The aluminum oxide according to claim 3 , wherein:{'sub': '80', 'the wavelength λis 150 nm or less.'}5. The aluminum oxide according to claim 1 , wherein:at a thickness of 5 mm, an average internal transmittance of light at wavelengths from 150 nm through 220 nm is 85% or higher.6. The aluminum oxide according to claim 5 , wherein:the average internal transmittance is 90% or higher.7. A method for manufacturing aluminum oxide claim 5 , comprising:a first heating in which aluminum oxide is heated at a first temperature in an atmosphere containing oxygen; anda second heating in which the aluminum oxide having been heated through the first heating is heated at a second temperature in an atmosphere having fewer oxygen molecules per unit volume compared to a number of oxygen molecules per unit volume in the atmosphere used for the first heating.8. The method for manufacturing aluminum oxide according to claim 7 , wherein:the first temperature is 1600° C. or higher; andthe second temperature is 1600° C. or higher.9. The method for manufacturing aluminum oxide according to claim 7 , wherein:the first temperature is 1700° C. or higher; andthe second temperature is 1800° C. or higher.10. The method for manufacturing aluminum oxide according to claim 7 , wherein:{'sup': 18', '3, 'the number of oxygen molecules per unit volume in the atmosphere used for the second heating is 1.0×10/mor smaller.'}11. The method for ...

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Номер записи: 70
24-01-2019 дата публикации

TECHNIQUES FOR FORMING OPTOELECTRONIC DEVICES

Номер: US20190024259A1
Автор: Henley Francois J., Kang Sien, Lamm Albert
Принадлежит:

Embodiments relate to use of a particle accelerator beam to form thin films of material from a bulk substrate. In particular embodiments, a bulk substrate (e.g. donor substrate) having a top surface is exposed to a beam of accelerated particles. In certain embodiments, this bulk substrate may comprise GaN; in other embodiments this bulk substrate may comprise Si, SiC, or other materials. Then, a thin film or wafer of material is separated from the bulk substrate by performing a controlled cleaving process along a cleave region formed by particles implanted from the beam. In certain embodiments this separated material is incorporated directly into an optoelectronic device, for example a GaN film cleaved from GaN bulk material. In some embodiments, this separated material may be employed as a template for further growth of semiconductor materials (e.g. GaN) that are useful for optoelectronic devices. 1. A method comprising:providing a GaN workpiece;introducing a plurality of particles into a surface of the GaN workpiece to form a cleave region in the GaN workpiece;bonding the surface of the GaN workpiece to a substrate;applying energy to cleave a detached thickness of GaN, from a remainder of the GaN workpiece; andprocessing the substrate bearing the detached thickness of GaN.2. A method as in wherein the substrate comprises a metal.3. A method as in wherein:the metal comprises a reflecting layer positioned between the detached thickness of GaN and a remainder of the substrate following the application of energy; andthe method further comprises processing the substrate to create a light emitting diode device.4. A method as in wherein the wherein the substrate comprises an integrated pattern including filler.5. A method as in wherein the integrated pattern includes electrically conductive islands.6. A method as in wherein the filler comprises silicon oxide and/or aluminum nitride.7. A method as in wherein the substrate comprises sapphire.8. A method as in wherein the ...

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Номер записи: 71
29-01-2015 дата публикации

SEED LAYERS AND PROCESS OF MANUFACTURING SEED LAYERS

Номер: US20150027362A1
Автор: Stoddard Nathan G.
Принадлежит:

This invention relates seed layers and a process of manufacturing seed layers for casting silicon suitable for use in solar cells or solar modules. The process includes the step of positioning tiles with aligned edges to form seams on a suitable surface, and the step of joining the tiles at the seams to form a seed layer. The step of joining includes heating the tiles to melt at least a portion of the tiles, contacting the tiles at both ends of at least one seam with electrodes, using plasma deposition of amorphous silicon, applying photons to melt a portion of the tiles, and/or layer deposition. Seed layers of this invention include a rectilinear shape of at least about 500 millimeters in width and length. 1. A process for manufacturing silicon seed layers suitable for use in the manufacture of solar cells or solar modules , the process comprising:positioning tiles with aligned edges to form seams on a suitable surface; andjoining the tiles at the seams to form a seed layer.2. The process of claim 1 , wherein the joining comprises:heating the tiles to melt at least a portion of the tiles and close the seams; andcooling the seed layer.3. The process of claim 2 , further comprising:repositioning the seed layer with respect to a top side and a bottom side following cooling the seed layer;reheating the seed layer to melt at least a previously unmelted portion of the seed layer and close the seams; andrecooling the seed layer.4. The process of claim 2 , wherein the cooling comprises about 100 degrees Celsius an hour.5. The process of claim 1 , wherein the joining comprises:contacting the tiles at both ends of at least one seam with electrodes;flowing electrical current through the tiles between the electrodes to melt at least a portion of the tiles and close the seams;optionally repeating the contacting and the flowing for each seam in the layer; andcooling the seed layer.6. The process of claim 5 , wherein the electrodes remain stationary with respect to the tiles ...

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Номер записи: 72
29-01-2015 дата публикации

Manufacture of multijunction solar cell devices

Номер: US20150027519A1
Автор: Andreas W. Bett, Bruno Ghyselen, Chantal Arena, Frank Dimroth
Принадлежит: Soitec SA

The present disclosure relates to a method for manufacturing a multi-junction solar cell device comprising the steps of: providing a first substrate, providing a second substrate having a lower surface and an upper surface, forming at least one first solar cell layer on the first substrate to obtain a first wafer structure, forming at least one second solar cell layer on the upper surface of the second substrate to obtain a second wafer structure, and bonding the first wafer structure to the second wafer structure, wherein the at least one first solar cell layer is bonded to the lower surface of the second substrate and removing the first substrate.

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Номер записи: 73
26-01-2017 дата публикации

Gas Storage System

Номер: US20170025691A1
Автор: Grande William J., Marsh Stephen Alan, Parker Donald M.
Принадлежит:

Among other things, a gas storage system includes a group of capsules and an activation element coupled to the group. The group of capsules are formed within a substrate and contain gas stored at a relatively high pressure compared to atmospheric pressure. The activation element is configured to deliver energy in an amount sufficient to cause at least one of the capsules to release stored gas. 1. A gas storage system comprising:a first substrate having plural groups of capsules formed within the first substrate, with each of the capsules containing gas stored at a relatively high pressure compared to atmospheric pressure;a plurality of activation elements, each one coupled to a corresponding one of the plurality of groups, the activation element configured to deliver energy in an amount sufficient to cause at least one of the capsules each of the plurality of groups to release stored gas;a second substrate having a second plurality of groups of capsules formed within the second substrate, with each of the capsules of the second plurality of groups of capsules containing gas stored at a relatively high pressure compared to atmospheric pressure; anda second plurality of activation elements, each one coupled to a corresponding one of the second plurality of groups, the activation element configured to deliver energy in an amount sufficient to cause at least one of the capsules in the second plurality of groups of capsules to release stored gas.2. The gas storage system of further comprising:control electronics coupled to the activation elements, the control electronics configured to selectively deliver electrical signal to control operation of a selected one of the activation elements.3. The gas storage system of wherein the capsules are interconnected by channels that allow gas to flow between the capsules claim 1 , the capsules configured to release the gas simultaneously when at least one of the capsules is activated by the activation element.4. The gas storage ...

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Номер записи: 74
29-01-2015 дата публикации

SINGLE CRYSTALLINE MICROSTRUCTURES AND METHODS AND DEVICES RELATED THERETO

Номер: US20150028724A1
Автор: Meloy Rob, Summers Eric
Принадлежит:

A product, such as one or more thin sheets, each containing a single or near-single crystalline inclusion-containing magnetic microstructure, is provided. In one embodiment, the inclusion-containing magnetic microstructure is a Galfenol-carbide microstructure. Various methods and devices, as well as compositions, are also described. 1. A product comprising a single or near-single crystalline inclusion-containing magnetic microstructure comprising a Galfenol-carbide microstructure.2. The product of comprising one or more thin sheets.3. (canceled)4. The product of wherein an inclusion in the inclusion-containing magnetic microstructure is niobium carbide.5. The product of wherein an amount of NbC is included in the niobium carbide.6. The product of having an eta (η)-fiber texture greater than about 45.3 area % up to about 100 area % and a misorientation of less than about 30 degrees.7. The product of having a magnetostriction between about 200.1 ppm and about 400 ppm.8. The product of having a grain diameter in the rolling direction (RD)-transverse direction (TD) plane of at least about 10 mm and a thickness of no more than about 3 mm.9. The product of wherein the thickness is no more than about 0.381 mm.10. The product of having an operating frequency from about direct current (DC) to about 30 kHz.11. The product of wherein between about 230 and about 1400 ppmw of C (0.1 to 0.68 at %) is present and the AGG is moderate to strong.12. The product of comprising (Fe—Ga)(Nb)(C).13. The product of configured for use in a device comprising an actuator claim 9 , sensor or energy harvester.14. The product of wherein the energy harvester is a motor mount configured to convert motor vibrations from a motor into electrical energy.15. A method of making one or more thin sheets comprising:combining one or more form factor components with a dopant, a magnetic material, a magnetic material performance enhancer and a precipitate former to produce a melted alloy, wherein the dopant is ...

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Номер записи: 75
02-02-2017 дата публикации

LASER POLISHING CERAMIC MATERIAL

Номер: US20170029327A1
Автор: Jones Christopher D., Memering Dale N., ROGERS MATTHEW S.
Принадлежит:

Systems and methods for polishing a ceramic component using a laser. The ceramic component may include a planar region that is polished using, for example, a mechanical or chemical mechanical polishing operation to produce a polished face. A contoured region that is adjacent to the planar region may be irradiated using a laser to heat the ceramic material within the contoured region. The irradiation may reduce the surface roughness of the contoured region to produce a polished surface. The ceramic component may be heated prior to being irradiated with the laser to reduce thermal gradients within the ceramic component. 1. A method of polishing a sapphire component , the method comprising:heating a first region of the sapphire component to a first temperature;irradiating a second region, within the first region, using a laser to heat the second region to a second temperature that is greater than the first temperature; andreflowing a surface of the sapphire component within the second region to reduce a surface roughness of the surface.2. The method of claim 1 , wherein heating the first region comprises:placing the sapphire component within a furnace; andheating the furnace to heat the first region of the sapphire component to an elevated temperature; andwherein irradiating the second region occurs before the first region cools below the first temperature.3. The method of claim 1 , wherein: 'irradiating the first region using a first laser-based process to heat the sapphire component to an elevated temperature, which is different from a second laser-based process used to irradiate the second region; and', 'heating the first region comprisesbefore the first region cools below the first temperature, the second region is irradiated using the second laser-based process.4. The method of claim 1 , wherein:the first temperature is less than an annealing temperature of the sapphire component; andthe second temperature is greater than a melting temperature of the sapphire ...

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Номер записи: 76
02-02-2017 дата публикации

Method of producing large-scale layers of solid material

Номер: US20170029974A1
Автор: Drescher Wolfram, Lichtensteiger Lukas, Richter Jan
Принадлежит:

The invention relates to a method of producing at least one layer of solid material (). This method comprises at the very least the steps of: 11. A method of producing at least one layer of solid material () , comprising at the very least the steps of:{'b': 2', '4', '6, 'providing a carrier substrate () with a first exposed surface () end with a second exposed surface ();'}{'b': 8', '2', '4', '2', '8', '10, 'producing a detachment layer () in the carrier substrate () or over the first exposed surface () of the carder substrate (), the detachment layer () having an exposed surface ();'}{'b': 1', '10', '8', '1', '12', '8, 'producing a first layer of solid material () Over the exposed surface () of the detachment layer (), the first layer of solid material () haying a free surface () spaced apart from the detachment layer ();'}{'b': 14', '6', '2', '12', '1, 'positioning or forming a receiving layer () on the second exposed surface () of the carrier substrate () or on the free surface () of the first layer of solid material ();'}{'b': '8', 'claim-text': [{'b': '14', 'the stresses being generated by tempering at least the receiving layer (),'}, {'b': 8', '16', '8', '1', '1, 'a crack propagating within the detachment layer () or in the boundary region () between the detachment layer () and the layer of solid material () as a result of the stresses, the first layer of solid material () being split off from the previously produced multi-layer arrangement by the crack.'}], 'generating stresses within the detachment layer (),'}2. The method according to claim 1 ,characterised in that{'b': 8', '1, 'the detachment layer () is configured such that it differs significantly from the same mechanical property of another layer, in particular the first layer of solid material () in at least one mechanical property, in particular breaking strength.'}3. The method according to or claim 1 ,characterised in that{'b': 8', '2', '8', '1, 'the detachment layer () is produced, in particular ...

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Номер записи: 77
02-02-2017 дата публикации

METHOD FOR PRODUCING SEMICONDUCTOR EPITAXIAL WAFER AND SEMICONDUCTOR EPITAXIAL WAFER

Номер: US20170029977A1
Автор: GOTO Hirokazu, HAGIMOTO Kazunori, KOBAYASHI Shoichi, KURIMOTO Hirotaka, SATO Ken, SHIKAUCHI Hiroshi, SHINOMIYA Masaru, TSUCHIYA Keitaro
Принадлежит: SHIN-ETSU HANDOTAI CO., LTD.

A method for producing a semiconductor epitaxial wafer, including steps of: fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate; observing the outer edge portion of the fabricated epitaxial wafer; and removing portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present. As a result, a method for producing a semiconductor epitaxial wafer in which a completely crack-free semiconductor epitaxial wafer can be obtained, is provided. 111-. (canceled)12. A method for producing a semiconductor epitaxial wafer , comprising:fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate;observing an outer edge portion of the fabricated epitaxial wafer; andremoving portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present.13. The method for producing a semiconductor epitaxial wafer according to claim 12 , whereinin the step of removing, the portions in which the crack, the epitaxial layer peeling, and the reaction mark are present are ground without change in an outside diameter of the silicon-based substrate of the epitaxial wafer.14. The method for producing a semiconductor epitaxial wafer according to claim 13 , whereinafter the step of removing, a ground surface of the epitaxial wafer is turned into a mirror surface or a quasi-mirror surface by mixed acid etching.15. The method for producing a semiconductor epitaxial wafer according to claim 14 , whereinan overhang portion of the epitaxial layer, the overhang portion formed as a result of the silicon-based substrate being etched by the mixed acid etching, is removed by chamfering.16. The method for producing a semiconductor epitaxial wafer according to claim 12 , whereinthe semiconductor layer is composed of a nitride semiconductor.17. The method for producing a semiconductor epitaxial wafer according to claim 13 , ...

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Номер записи: 78
02-02-2017 дата публикации

LARGE AREA, LOW-DEFECT GALLIUM-CONTAINING NITRIDE CRYSTALS, METHOD OF MAKING, AND METHOD OF USE

Номер: US20170029978A1
Автор: "DEvelyn Mark P.", DOWNEY BRADLEY C., Ehrentraut Dirk, JIANG Wenkan
Принадлежит:

An ultralow defect gallium-containing nitride crystal and methods of making ultralow defect gallium-containing nitride crystals are disclosed. The crystals are useful as substrates for light emitting diodes, laser diodes, transistors, photodetectors, solar cells, and photoelectrochemical water splitting for hydrogen generators. 1. A method for forming an ultralow defect gallium-containing nitride crystal derived from a proto-seed comprising a gallium-containing nitride crystal with a length and a first thickness substantially orthogonal to a first direction of the length and a second thickness orthogonal to the first direction of the length , the method comprising:subjecting the proto-seed to an ammonothermal growth of a gallium based crystalline material to cause the proto-seed to grow in a second direction lateral to the first direction of the length to form a laterally-grown sector comprising at least one of an a-wing, a +c sector, a −c sector, an m-m′ sector, and an m′-m′ sector; separating the a-wing from a portion of the crystal comprising the proto-seed by slicing substantially parallel to an a-plane, and', 'removing residual defective material from the a-wing by removing material from a −c-surface positioned opposite to a +c-surface of the a-wing or from a +c-surface positioned opposite to a −c-surface of the a-wing to form said ultralow defect gallium-containing nitride crystal;, 'wherein if the laterally-grown sector comprises an a-wing,'} separating the ±c sector from a portion of the crystal comprising the proto-seed by slicing substantially parallel to a c-plane;', 'removing residual defective material from the ±c sector by removing material substantially parallel to a c axis or by removing material substantially parallel to an m-plane to form said ultralow defect gallium-containing nitride crystal;, 'wherein if the laterally-grown sector comprises at least one of a +c sector or a −c sector,'} separating an m/a wing from a portion of the crystal ...

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Номер записи: 79
04-02-2016 дата публикации

Methods Of Etching Films With Reduced Surface Roughness

Номер: US20160032460A1
Автор: Anthis Jeffrey W., Benjaminson David, Ingle Nitin K., Liu Jie, Nemani Srinivas D., Schmiege Benjamin, Wang Xikun
Принадлежит:

Provided are methods for etching films comprising transition metals which help to minimize higher etch rates at the grain boundaries of polycrystalline materials. Certain methods pertain to amorphization of the polycrystalline material, other pertain to plasma treatments, and yet other pertain to the use of small doses of halide transfer agents in the etch process. 1. A method of etching a substrate , the method comprising:providing a polycrystalline film comprising a transition metal;amorphizing at least a portion of the polycrystalline film to provide an amorphous layer;exposing the amorphous layer to a halide transfer agent to provide an activated substrate surface; andexposing the activated substrate surface to a reagent comprising a Lewis base or pi acid to provide a vapor phase coordination complex comprising one or more atoms of the transition metal coordinated to one or more ligands from the reagent.3. The method of claim 1 , wherein the pi acid comprises AlHXR claim 1 , wherein X is a halogen claim 1 , the sum of n+m+p is 3 claim 1 , and Ris C1-C6 alkyl.4. The method of claim 1 , wherein the Lewis base or pi acid comprises a chelating amine selected from the group consisting of N claim 1 ,N claim 1 ,N′ claim 1 ,N′-tetramethylethylene diamine claim 1 , ethylene diamine claim 1 , N claim 1 ,N′-dimethylethylenediamine claim 1 , 2-(aminomethyl)pyridine claim 1 , 2-[(alkylamino)methyl]pyridine claim 1 , and 2-[(dialkylamino)methyl]pyridine claim 1 , wherein the alkyl group is C1-C6 alkyl.5. The method of claim 1 , wherein the halide transfer agent is selected from the group consisting of C1and Br.6. The method of claim 1 , wherein the polycrystalline film comprises cobalt.7. The method of claim 1 , wherein the polycrystalline film comprises a metal selected from the group consisting of Co claim 1 , Cu claim 1 , Ru claim 1 , Ni claim 1 , Fe claim 1 , Pt claim 1 , Mn and Pd.8. The method of claim 1 , wherein amorphization comprises exposing the polycrystalline ...

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Номер записи: 80
04-02-2016 дата публикации

TUNED MATERIALS, TUNED PROPERTIES, AND TUNABLE DEVICES FROM ORDERED OXYGEN VACANCY COMPLEX OXIDES

Номер: US20160032490A1
Автор: Chen Chonglin, Liu Ming, Ma Chunrui
Принадлежит:

A single-crystalline LnBMOor LnBMOcompound is provided, which includes an ordered oxygen vacancy structure; wherein Ln is a lanthanide, B is an alkali earth metal, M is a transition metal, O is oxygen, and 0≦δ≦1. Methods of making and using the compound, and devices and compositions including same are also provided. 1. A single-crystalline LnBMOor LnBMOcompound , comprising an ordered oxygen vacancy structure; whereinLn is a lanthanide,B is an alkali earth metal,M is a transition metal,O is oxygen, and0≦δ≦1.2. The compound of claim 1 , wherein Ln is La claim 1 , Pr claim 1 , Nd claim 1 , Sm claim 1 , or Gd.3. The compound of claim 1 , wherein B is Ba claim 1 , Sr claim 1 , or Ca.4. The compound of claim 1 , wherein M is Co claim 1 , Mn claim 1 , Fe claim 1 , or Ni.5. The compound of claim 1 , wherein the compound has a double perovskite structure.6. A composition claim 1 , comprising the compound of in epitaxial contact with a single-crystalline substrate.7. The composition of claim 6 , wherein the substrate comprises Nb-doped SrTiO.8. A single-crystalline LnBMOor LnBMOcompound claim 6 , δ being ≧0 and ≦1 claim 6 , produced by a process comprising:forming, on a single-crystalline substrate, a thin film comprising Ln, B, M, and O, wherein Ln is a lanthanide, B is an alkali earth metal, M is a transition metal, and O is oxygen;annealing said thin film in an oxygen-containing gas, to form an oxygen-annealed film and cooling9. The compound of claim 8 , wherein forming said thin film comprises pulsed laser desorption of a target compound comprising Ln claim 8 , B claim 8 , M claim 8 , and O.10. The compound of claim 8 , wherein annealing said thin film in an oxygen-containing gas comprises beating said thin film at 800° C. in 400 Torr oxygen for 15 minutes.11. The compound of claim 8 , wherein annealing said oxygen-annealed film comprises heating said oxygen-annealed film at 800° C. at a pressure lower than 1*10Torr for 15 minutes.12. The compound of claim 8 , wherein ...

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Номер записи: 81
04-02-2016 дата публикации

NITROGEN DOPED AND VACANCY DOMINATED SILICON INGOT AND THERMALLY TREATED WAFER FORMED THEREFROM HAVING RADIALLY UNIFORMLY DISTRIBUTED OXYGEN PRECIPITATION DENSITY AND SIZE

Номер: US20160032491A1
Автор: Lu Tse-Wei, Lu Zheng, Samanta Gaurab, Tsai Feng-Chien
Принадлежит:

Nitrogen-doped CZ silicon crystal ingots and wafers sliced therefrom are disclosed that provide for post epitaxial thermally treated wafers having oxygen precipitate density and size that are substantially uniformly distributed radially and exhibit the lack of a significant edge effect. Methods for producing such CZ silicon crystal ingots are also provided by controlling the pull rate from molten silicon, the temperature gradient and the nitrogen concentration. Methods for simulating the radial bulk micro defect size distribution, radial bulk micro defect density distribution and oxygen precipitation density distribution of post epitaxial thermally treated wafers sliced from nitrogen-doped CZ silicon crystals are also provided. 1. A method of producing a nitrogen-doped CZ silicon crystal ingot , the method comprising:{'sup': 13', '3', '15', '3, 'pulling the silicon crystal ingot from molten silicon at a pull rate of from about 0.85 mm per minute to about 1.5 mm per minute thereby forming the nitrogen-doped CZ silicon crystal ingot, wherein the nitrogen-doped CZ silicon crystal ingot has a surface temperature gradient of from about 10° K per cm to about 35° K per cm at an average crystal surface temperature of from about 1300° C. to about 1415° C., and wherein the silicon crystal ingot has a nitrogen concentration of from about 1*10atoms per cmto about 1*10atoms per cm.'}2. The method of wherein a wafer sliced from the nitrogen-doped CZ silicon crystal ingot and thermally treated at 780° C. for 3 hours and then at 1000° C. for 16 hours is characterized by:{'sup': 8', '3', '10', '3, '(1) an edge band in a region extending from about 1000 μm to the edge of said wafer and to the edge of said wafer wherein the edge band comprises oxygen precipitates having an average diameter of from about 30 nm to about 100 nm and an oxygen precipitation density of from about 1*10atoms per cmto about 1*10atoms per cm,'}(2) an increase in radial bulk micro defect size in a region ...

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Номер записи: 82
01-05-2014 дата публикации

Method and apparatus for fabricating free-standing group iii nitride crystals

Номер: US20140116327A1
Автор: Maxim Blashenkov
Принадлежит: Perfect Crystals LLC

The method for fabricating a free-standing group III nitride plate ( 6 ) comprises the steps of growing at a growth temperature within a growth reactor ( 7 ) a first group III nitride layer ( 2 ) on a foreign growth substrate ( 1 ); growing at the growth temperature within the growth reactor ( 7 ) a second group III nitride layer ( 5 ) on the first group III nitride layer ( 2 ); and separating by laser lift-off the second group III nitride layer ( 5 ) from the growth substrate ( 1 ) so as to form a free-standing group III nitride plate ( 6 ). According to the present invention, the step of separating the second group III nitride layer ( 5 ) from the growth substrate ( 6 ) is performed at the growth temperature and within the growth reactor ( 7 ), and the method further comprises a step of treating the first group III nitride layer ( 1 ) by laser treatment at the growth temperature within the growth reactor ( 7 ) so as to provide stress relaxation areas ( 4 ) in the first group III nitride layer ( 2 ).

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Номер записи: 83
01-05-2014 дата публикации

Production and Distribution of Dilute Species in Semiconducting Materials

Номер: US20140117513A1
Автор: Bolotnikov Aleksey E., CAMARDA GIUSEPPE, CUI YONGGANG, Ge Yang, Hosaain Anwar, JAMES RALPH B., KIM Kihyun, Tappero Ryan
Принадлежит: Brookhaven Science Associates, LLC

Technologies are described effective to implement systems and methods of producing a material. The methods comprise receiving a tertiary semiconductor sample with a dilute species. The sample has two ends. The first end of the sample includes a first concentration of the dilute species lower than a second concentration of the dilute species in the second end of the sample. The method further comprises heating the sample in a chamber. The chamber has a first zone and a second zone. The first zone having a first temperature higher than a second temperature in the second zone. The sample is orientated such that the first end is in the first zone and the second end is in the second zone. 1. A method of producing a material , the method comprising:receiving a tertiary semiconductor (tSC) sample with a dilute species, wherein the tSC sample has two ends, a first end of the tSC sample includes a first concentration of the dilute species lower than a second concentration of the dilute species in a second end of the tSC sample; andheating the tSC sample in a chamber, wherein the chamber has a first zone and a second zone, the first zone having a first temperature higher than a second temperature in the second zone, and the tSC sample is orientated such that the first end is in the first zone and the second end is in the second zone.2. The method of claim 1 , wherein:the tertiary semiconductor sample includes Cd, Zn, and a group VI element; andZn is the dilute species.3. The method of claim 2 , wherein the group VI element is Te or Se.4. The method of claim 1 , wherein a difference in temperature between the first zone and the second zone creates a temperature gradient along the tSC sample and a difference in temperature between the first zone and the second zone is about 50° C.5. The method of claim 4 , wherein the temperature gradient is about 10° C./cm at an average temperature of about 750° C.; andthe method further comprises heating the tSC sample for about 140 hours.6. ...

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Номер записи: 84
30-01-2020 дата публикации

LARGE SCALE PRODUCTION OF THINNED GRAPHITE, GRAPHENE, AND GRAPHITE-GRAPHENE COMPOSITES

Номер: US20200031674A1
Автор: BOZALINA Marie, NAZARPOUR Soroush, PERRET Philippe
Принадлежит: NanoXplore Inc.

Embodiments described herein relate generally to large scale synthesis of thinned graphite and in particular, few layers of graphene sheets and graphene-graphite composites. In some embodiments, a method for producing thinned crystalline graphite from precursor crystalline graphite using wet ball milling processes is disclosed herein. The method includes transferring crystalline graphite into a ball milling vessel that includes a grinding media. A first and a second solvent are transferred into the ball milling vessel and the ball milling vessel is rotated to cause the shearing of layers of the crystalline graphite to produce thinned crystalline graphite. 181-. (canceled)82. A composition , comprising:a plurality of few layer graphene particles, the plurality of few layer graphene particles having thickness of 1 graphene layer to about 10 graphene layers and an average lateral dimension of about 500 nm to about 5 μm.83. The composition of claim 82 , wherein the plurality of few layer graphene particles have an aspect ratio of at least about 50.84. The composition of claim 83 , wherein the plurality of few layer graphene particles have an aspect ratio of at least about 100.85. The composition of claim 84 , wherein the plurality of few layer graphene particles have an aspect ratio of at least about 250.86. The composition of claim 82 , wherein the plurality of few layer graphene particles have an aspect ratio in a range of about 50 to about 1 claim 82 ,000.87. The composition of claim 82 , wherein the plurality of few layer graphene particles have an aspect ratio in a range of about 100 to about 500.88. The composition of claim 82 , wherein the plurality of few layer graphene particles have an aspect ratio in a range of about 250 to about 1 claim 82 ,000.89. A composition claim 82 , comprising:a plurality of few layer graphene particles, the plurality of few layer graphene particles having a thickness of less than about 5 nm and an average lateral dimension of at ...

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Номер записи: 85
01-02-2018 дата публикации

GAS PURGE SYSTEM AND METHOD FOR OUTGASSING CONTROL

Номер: US20180033659A1
Автор: BAO XINYU, Yan Chun
Принадлежит:

Embodiments disclosed herein generally relate to a system, method, and apparatus for controlling substrate outgassing such that hazardous gasses are eliminated from a surface of a substrate after a III-V epitaxial growth process or an etch clean process, and prior to additional processing. An oxygen containing gas is flowed to a substrate in a load lock chamber, and subsequently a non-reactive gas is flowed to the substrate in the load lock chamber. As such, hazardous gases and outgassing residuals are decreased and/or removed from the substrate such that further processing may be performed. 1. A substrate processing apparatus , comprising:a loadlock chamber having a body defining a volume therein;a support structure disposed in the volume, the support structure having a plurality of support members; and a gas supply line operatively connected to a gas source; and', 'a plurality of distribution lines, wherein each distribution line is operatively connected to and extends from the gas supply line, wherein at least one distribution line is disposed adjacent to each support member, wherein each distribution line has a plurality of gas holes disposed therein, wherein each distribution line defines a plane, and wherein each gas hole is angled toward a corresponding support member relative to the plane., 'a gas distribution structure disposed in the volume adjacent the support structure, the gas distribution structure comprising2. The substrate processing apparatus of claim 1 , wherein each distribution line is an arcuate distribution line having a radius between about four inches and about twelve inches.3. The substrate processing apparatus of claim 2 , wherein each distribution line has an angular extent between about 100 degrees and about 150 degrees.4. The substrate processing apparatus of claim 1 , wherein each gas hole is disposed at the plane of each distribution line.5. The substrate processing apparatus of claim 1 , wherein each gas hole has a gas flow axis that ...

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Номер записи: 86
01-02-2018 дата публикации

SILICON CARBIDE SINGLE CRYSTAL SUBSTRATE, SILICON CARBIDE SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE

Номер: US20180033703A1
Автор: HONKE Tsubasa, Okita Kyoko
Принадлежит: Sumitomo Electric Industries, Ltd.

A silicon carbide single crystal substrate includes a first main surface and a second main surface opposite to the first main surface. The first main surface includes a central square region and an outer square region. When viewed in a thickness direction, each of the central square region and the outer square region has a side having a length of 15 mm. The first main surface has a maximum diameter of not less than 100 mm. The silicon carbide single crystal substrate has a TTV of not more than 5 μm. A value obtained by dividing a LTIR in the central square region by a LTV in the central square region is not less than 0.8 and not more than 1.2. A value obtained by dividing a LTV in the outer square region by the LTV in the central square region is not less than 1 and not more than 3. 1. A silicon carbide single crystal substrate comprising a first main surface and a second main surface opposite to the first main surface , a central square region surrounded by a square having a center corresponding to an intersection between the first main surface and a straight line that passes through a center of gravity of the silicon carbide single crystal substrate and that is parallel to a thickness direction of the silicon carbide single crystal substrate, and', 'an outer square region surrounded by a square that has a side parallel to a straight line perpendicular to a straight line connecting the intersection to a certain position on an outer edge of the first main surface and that has a center corresponding to a position separated away by 10.5 mm from the certain position toward the intersection,, 'the first main surface including'}when viewed in the thickness direction, each of the central square region and the outer square region having a side having a length of 15 mm,the first main surface having a maximum diameter of not less than 100 mm,the silicon carbide single crystal substrate having a TTV of not more than 5 μm,a value obtained by dividing a LTIR in the central ...

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Номер записи: 87
30-01-2020 дата публикации

NON-POLAR OR SEMI-POLAR GaN WAFER

Номер: US20200032420A1
Автор: NAMITA Hideo, TASHIRO Masayuki, TSUKADA Yusuke
Принадлежит: MITSUBISHI CHEMICAL CORPORATION

A method for producing a GaN crystal is provided. In the method, front surfaces of a plurality of tiling GaN seeds closely arranged side by side on a flat surface of a plate are planarized. An aggregated seed is formed by arranging the tiling GaN seeds closely side by side on a susceptor of an HVPE apparatus in the same arrangement as when fixed on the plate, with the front planarized surfaces facing upward. A bulk GaN crystal is grown epitaxially on the aggregated seed by an HVPE method. 19-. (canceled)10. A method for producing a GaN crystal , comprising:planarizing front surfaces of a plurality of tiling GaN seeds closely arranged side by side on a flat surface of a plate;forming an aggregated seed by arranging the tiling GaN seeds closely side by side on a susceptor of an HVPE apparatus in the same arrangement as when fixed on the plate, with the front planarized surfaces facing upward; andgrowing a bulk GaN crystal epitaxially on the aggregated seed by an HVPE method.11. The method for producing a GaN crystal according to claim 10 , whereinan angle formed by the front surface and the side surface of the tiling GaN seed is not an obtuse angle.12. The method for producing a GaN crystal according to claim 10 , whereinback surfaces of the tiling GaN seeds are planarized prior to the planarizing of the front surfaces of the tiling GaN seeds.13. The method for producing a GaN crystal according to claim 10 , whereinthe tiling GaN seeds are made of a GaN crystal grown by an ammonothermal method.14. The method for producing a GaN crystal according to claim 10 , whereinmain surfaces of the tiling GaN seeds are parallel to an M-plane or slightly tilted from the M-plane.15. The method for producing a GaN crystal according to claim 14 , whereinthe tiling GaN seeds have rectangular main surfaces with long sides perpendicular to a c-axis and short sides perpendicular to an a-axis.16. A method for producing a GaN wafer claim 14 , comprising:{'claim-ref': {'@idref': 'CLM-00010 ...

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Номер записи: 88
31-01-2019 дата публикации

Plasma Modified Epitaxial Fabricated Graphene on SiC for Electrochemical Trace Detection of Explosives

Номер: US20190033247A1
Автор: Gaskill David Kurt, Hangarter Sandra C., MYERS-WARD Rachael L., Stenger David A., Trammell Scott A., Walton Scott G., Zabetakis Daniel
Принадлежит:

An electrochemical cell includes a working electrode in contact with an aqueous electrolyte solution, a counter electrode in contact with the aqueous electrolyte solution, and a reference electrode in contact with the aqueous electrolyte solution. The working electrode comprises a plasma modified epitaxial synthesized graphene surface fabricated on SiC. 1. An electrochemical cell comprising:a working electrode in contact with an aqueous electrolyte solution;a counter electrode in contact with the aqueous electrolyte solution; anda reference electrode in contact with the aqueous electrolyte solution;wherein, the working electrode comprises a plasma modified epitaxial graphene surface synthesized from SiC.2. The electrochemical cell of claim 1 , wherein the graphene surface is approximately 1.6 mm.3. The electrochemical cell of claim 1 , further comprising a cell on top of the working electrode comprising an open-ended container and a gasket disposed between the container and the working electrode and configured to prevent leaks therebetween.4. The electrochemical cell of claim 3 , further comprising a base extending laterally outward from the electrodes below the cell and configured for clamping claim 3 , the broad base having a cut-out allowing access to the working electrode claim 3 , and wherein the reference and counter electrodes are suspended in an upper funnel-shaped well which also holds the electrolyte.5. The electrochemical cell of claim 1 , wherein the working electrode is a single layer claim 1 , non-flaky detection element.6. The electrochemical cell of claim 1 , wherein the working electrode comprises a surface atomic percentage of oxygen claim 1 , as measured by X-ray photoelectron spectroscopy claim 1 , of 10-15% O.7. The electrochemical cell of claim 6 , wherein the working electrode comprises a surface atomic percentage of oxygen claim 6 , as measured by X-ray photoelectron spectroscopy claim 6 , of 11.7% O.8. The electrochemical cell of claim 1 , ...

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Номер записи: 89
04-02-2021 дата публикации

Method for producing a single-crystal film of aln material and substrate for the epitaxial growth of a single-crystal film of aln material

Номер: US20210032772A1
Автор: Bruno Ghyselen
Принадлежит: Soitec SA

A process for producing a monocrystalline layer of AlN material comprises the transfer of a monocrystalline seed layer of SiC- 6 H material to a carrier substrate of silicon material, followed by the epitaxial growth of the monocrystalline layer of AlN material.

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Номер записи: 90
05-02-2015 дата публикации

METHOD OF REDUCING THE THICKNESS OF A SAPPHIRE LAYER

Номер: US20150037537A1
Автор: Murali Venkatesan, Prabhu Gopal
Принадлежит:

A method of removing material from a sapphire article is described. In particular, the method comprises the step of providing an initial sapphire layer and reducing the thickness of the layer while not significantly increasing the surface roughness of the layer. Cover plates for electronic device and methods of preparing them are also disclosed, along with a method of analyzing a sapphire article produced by the present method. 1. A method of producing a sapphire layer comprising the steps of:{'sub': 'I', 'i) providing an initial sapphire layer having a thickness and at least one surface, the surface of the initial sapphire layer having an average surface roughness value of Ra; and'}ii) reducing the thickness of the initial sapphire layer by contacting the surface with a reagent solution to produce the sapphire layer,{'sub': F', 'F', 'I', 'I, 'wherein the sapphire layer has a thickness that is less than the thickness of the initial sapphire layer and further has a final surface having an average surface roughness value of Ra, wherein (Ra−Ra)/Rais less than or equal to 0.2.'}2. The method of claim 1 , wherein the initial sapphire layer has a thickness of from about 0.4 mm to about 0.8 mm.3. The method of claim 1 , wherein the sapphire layer has a thickness of from about 0.35 mm to about 0.75 mm.4. The method of claim 1 , wherein the thickness of the initial sapphire layer is reduced at a rate of greater than or equal to about 30 microns/hour.5. The method of claim 1 , wherein the thickness of the initial sapphire layer is reduced at a temperature of from about 250° C. to about 350° C.6. The method of claim 1 , wherein the reagent solution comprises sulfuric acid.7. The method of claim 1 , wherein the reagent solution comprises phosphoric acid.8. The method of claim 6 , wherein the reagent solution comprises phosphoric acid.9. The method of claim 1 , wherein (Ra−Ra)/Rais less than or equal to 0.1.10. The method of claim 1 , wherein the initial sapphire layer has c- ...

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Номер записи: 91
05-02-2015 дата публикации

METHOD OF ANALYZING A SAPPHIRE ARTICLE

Номер: US20150037897A1
Автор: Murali Venkatesan, Prabhu Gopal, Squiller Daniel
Принадлежит:

A method of removing material from a sapphire article is described. In particular, the method comprises the step of providing an initial sapphire layer and reducing the thickness of the layer while not significantly increasing the surface roughness of the layer, Cover plates for electronic device and methods of preparing them are also disclosed, along with a method of analyzing a sapphire article produced by the present method. 1. A method of producing a sapphire article comprising the steps of:{'sub': 'I', 'i) providing an initial sapphire article having a thickness and at least one surface, the surface of the initial sapphire article having an average surface roughness value of Ra; and'}ii) reducing the thickness of the initial sapphire article by contacting the surface with a reagent solution to produce the sapphire article,{'sub': F', 'F', 'I', 'I, 'wherein the sapphire article has a thickness that is less than the thickness of the initial sapphire article and further has a final surface having an average surface roughness value of Ra, wherein (Ra−Ra)/Rais less than or equal to 0.2.'}2. The method of claim 1 , wherein the initial sapphire article is a sapphire brick having a length and a width claim 1 , and wherein the step of reducing the thickness of the initial sapphire article comprises removing sapphire from an end of the brick claim 1 , thereby reducing the length.3. The method of claim 2 , wherein the step of providing the initial sapphire article comprises removing the sapphire brick from a sapphire boule.4. The method of claim 1 , wherein the thickness of the initial sapphire article is reduced at a rate of greater than or equal to about 10 microns/hour.5. The method of claim 1 , wherein the thickness of the initial sapphire article is reduced at a temperature of from about 250° C. to about 350° C.6. The method of claim 1 , wherein the reagent solution comprises sulfuric acid.7. The method of claim 1 , wherein the reagent solution comprises phosphoric ...

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Номер записи: 92
08-02-2018 дата публикации

BIODEGRADABLE MAGNESIUM AND METHOD FOR CONTROLLING DEGRADATION RATE OF BIODEGRADABLE MAGNESIUM

Номер: US20180036456A1
Автор: SHIN Kwang-seon
Принадлежит: SNU R&DB FOUNDATION

Disclosed are biodegradable magnesium having a biodegradation rate which is determined by controlling an atom packing density of a surface contacting a living body, and a method for controlling the biodegradation rate of magnesium, wherein the biodegradation rate is determined by controlling an atomic packing density of the surface in contact with a living body. 1. Biodegradable magnesium having a biodegradation rate which is determined by controlling an atom packing density of a surface contacting a living body.2. The biodegradable magnesium according to claim 1 ,wherein the magnesium is pure magnesium or a magnesium alloy.3. The biodegradable magnesium according to claim 1 ,wherein the magnesium is polycrystalline magnesium, and the magnesium comprises a texture which is preferentially oriented with a specific crystallographic plane.4. The biodegradable magnesium according to claim 2 ,wherein the magnesium alloy is a solid solution alloy or a precipitation hardening type alloy.5. The biodegradable magnesium according to claim 2 ,wherein the magnesium alloy comprises at least one selected from Ca, Zn, Al, Sn, Mn, Si, Sr, Li, In, Ga, Ba, Ce, La, Nd, Gd or Y.6. The biodegradable magnesium according to claim 1 ,wherein the magnesium is a single crystal magnesium, and the surface in contact with the living body corresponds to (0001), (10-10), (2-1-10); or a crystal plane which is crystallographically the same as the crystal planes; or a crystal plane with an atomic packing density of 0.4 or more.7. The biodegradable magnesium according to claim 3 ,wherein the specific crystal plane is (0001), (10-10), (2-1-10); a crystal plane which is crystallographically the same as the crystal planes; or a crystal plane with an atomic packing density of 0.4 or more.8. A method for controlling the biodegradation rate of magnesium claim 3 ,wherein the biodegradation rate is determined by controlling an atomic packing density of the surface in contact with a living body.9. The method ...

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Номер записи: 93
12-02-2015 дата публикации

Abrasive particles having a unique morphology

Номер: US20150040486A1
Автор: Kan-Yin Ng, Timothy Francis Dumm
Принадлежит: Diamond Innovations Inc

An abrasive particle having an irregular surface, wherein the surface roughness of the particle is less than about 0.95. A method for producing abrasive particles having a unique surface morphology including providing a plurality of abrasive particles; providing a plurality of metal particles; mixing the abrasive particles and the metal particles to form a mixture; compressing the mixture to form a compressed mixture; heating the compressed mixture; and recovering modified abrasive particles.

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Номер записи: 94
11-02-2016 дата публикации

MANUFACTURING METHOD OF DOUBLE CLADDING CRYSTAL FIBER

Номер: US20160040316A1
Автор: HSU KUANG-YU, HUANG Sheng-Lung, JHENG DONG-YO, YANG MU-HAN
Принадлежит:

The present invention relates to a manufacturing method of a double cladding crystal fiber, in which growing an YAG or a sapphire into a single crystal fiber by LHPG method, placing the single crystal fiber into a glass capillary for inner cladding, placing the single crystal fiber together with the glass capillary for inner cladding into a glass capillary for outer cladding in unison, heating the glass capillary for inner cladding and outer cladding by the LHPG method to attach to the outside of the single crystal fiber, and thus growing into a double cladding crystal fiber. When the present invention is applied to high power laser, by using the cladding pumping scheme, the high power pumping laser is coupled to the inner cladding layer, so the problems of heat dissipation and the efficiency impairment due to energy transfer up-conversion of high power laser are mitigated. 1. A manufacturing method of a double cladding crystal fiber , comprising the steps of:providing a yttrium aluminum garnet (YAG) or a sapphire single crystal rod;growing said single crystal rod into a single crystal fiber having a predetermined diameter by means of the Laser-Heated Pedestal Growth (LHPG) method;providing a glass capillary for inner cladding, wherein said single crystal fiber is placed into said glass capillary for inner cladding;providing a glass capillary for outer cladding, wherein said single crystal fiber together with said glass capillary for inner cladding are placed into said glass capillary for outer cladding in unison; andheating said glass capillary for inner cladding and said glass capillary for outer cladding simultaneously by means of the LHPG method, in such a way that said glass capillary for inner cladding together with said glass capillary for outer cladding are softened and melted simultaneously to attach to the outside of said single crystal fiber, and thus grown into a double cladding crystal fiber.2. The manufacturing method according to claim 1 , wherein the ...

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Номер записи: 95
09-02-2017 дата публикации

Silicon Carbide Epitaxial Wafer and Process for Producing Same

Номер: US20170037538A1
Автор: Keiko MASUMOTO
Принадлежит: National Institute of Advanced Industrial Science and Technology AIST

A subject of present invention is to enable reducing, even in growth at a high C/Si ratio, contamination by different polytypes with respect to a silicon carbide epitaxial wafer having a low off-angle, and to provide the silicon carbide epitaxial wafer which enables forming a reliable high voltage silicon carbide semiconductor element. The silicon carbide epitaxial wafer of the present invention is a silicon carbide epitaxial wafer comprising an epitaxially grown layer disposed on a silicon carbide substrate having an α-type crystal structure and an off-angle tilted at an angle of more than 0° and less than 4° from a (0001) Si plane or a (000-1) C plane, wherein a region of a step bunching including five to ten bunched steps of 1 nm in height occupies 90% or more of the surface of the silicon carbide substrate.

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Номер записи: 96
09-02-2017 дата публикации

METHOD FOR HEAT TREATMENT OF SILICON SINGLE CRYSTAL WAFER

Номер: US20170037541A1
Автор: Hoshi Ryoji, Kamada Hiroyuki
Принадлежит: SHIN-ETSU HANDOTAI CO., LTD.

A method for a heat treatment of a silicon single crystal wafer in an oxidizing ambient, including: performing the heat treatment based on a condition determined by a tripartite correlation between a heat treatment temperature during the heat treatment, an oxygen concentration in the silicon single crystal wafer before the heat treatment, and a growth condition of a silicon single crystal from which the silicon single crystal wafer is cut out. This provides a method for a heat treatment of a silicon single crystal wafer which can annihilate void defects or micro oxide precipitate nuclei in a silicon single crystal wafer with low cost, efficiently, and securely by a heat treatment in an oxidizing ambient. 18-. (canceled)9. A method for a heat treatment of a silicon single crystal wafer in an oxidizing ambient , comprising:performing the heat treatment based on a condition determined by a tripartite correlation between a heat treatment temperature during the heat treatment, an oxygen concentration in the silicon single crystal wafer before the heat treatment, and a growth condition of a silicon single crystal from which the silicon single crystal wafer is cut out.12. The method for a heat treatment of a silicon single crystal wafer according to claim 11 , wherein the silicon single crystal wafer is cut out from a silicon single crystal doped with nitrogen at a concentration of 5×1015 atoms/cm3 or less.13. The method for a heat treatment of a silicon single crystal wafer according to claim 9 , wherein the silicon single crystal wafer is cut out from a silicon single crystal without a defect due to Interstitial-Si.14. The method for a heat treatment of a silicon single crystal wafer according to claim 10 , wherein the silicon single crystal wafer is cut out from a silicon single crystal without a defect due to Interstitial-Si.15. The method for a heat treatment of a silicon single crystal wafer according to claim 11 , wherein the silicon single crystal wafer is cut out ...

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Номер записи: 97
09-02-2017 дата публикации

SCINTILLATOR, METHOD OF MANUFACTURING THE SAME, RADIATION IMAGING APPARATUS, AND RADIATION IMAGING SYSTEM

Номер: US20170038482A1
Автор: Ichimura Tomoaki, Ishida Yohei, Kobayashi Tamaki
Принадлежит:

A method of manufacturing a scintillator, includes growing a scintillator layer constituted by a plurality of column crystals on a base, forming a first protection film so as to cover the scintillator layer, planarizing the first protection film, the planarizing including a polishing process of polishing the first protection film, and forming a second protection film configured to cover the first protection film that has undergone the planarizing. The scintillator layers grown on the base include an abnormally grown portion. In the polishing process, a front end of the abnormally grown portion is polished as well as a surface of the first protection film so as to form a continuation surface by the surface of the first protection film and a surface of the abnormally grown portion. 1. A method of manufacturing a scintillator , the method comprising:growing a scintillator layer constituted by a plurality of column crystals on a base;forming a first protection film so as to cover the scintillator layer;planarizing the first protection film, the planarizing including a polishing process of polishing the first protection film; andforming a second protection film configured to cover the first protection film that has undergone the planarizing,wherein the scintillator layers grown on the base include an abnormally grown portion, andin the polishing process, a front end of the abnormally grown portion is polished as well as a surface of the first protection film so as to form a continuation surface by the surface of the first protection film and a surface of the abnormally grown portion.2. The method according to claim 1 , wherein the polishing process is executed such that a plane is formed by an exposed surface of the first protection film polished by the polishing process and an exposed surface of the abnormally grown portion polished by the polishing process.3. The method according to claim 1 , wherein respective front ends of the plurality of columnar crystals are ...

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Номер записи: 98
12-02-2015 дата публикации

METAL NITRIDE MATERIAL FOR THERMISTOR, METHOD FOR PRODUCING SAME, AND FILM TYPE THERMISTOR SENSOR

Номер: US20150042445A1
Автор: Fujita Toshiaki, Nagatomo Noriaki, Tanaka Hiroshi
Принадлежит:

Provided are a metal nitride material for a thermistor, which has a high reliability and high heat resistance and can be directly deposited on a film or the like without firing, a method for producing the same, and a film type thermistor sensor. 1. A metal nitride material for a thermistor , consisting of a metal nitride represented by the general formula: (MA)AlN(where “M” represents at least one of Ti , V , Cr , Mn , Fe , and Co , “A” represents at least one of Sc , Zr , Mo , Nb , and W , 0.0 Подробнее

Номер записи: 99
11-02-2016 дата публикации

EPITAXIAL SILICON WAFER AND METHOD FOR MANUFACTURING SAME

Номер: US20160042974A1
Автор: Ono Toshiaki, UMENO Shigeru
Принадлежит: SUMCO CORPORATION

An epitaxial silicon wafer cut from a silicon single crystal grown by the Czochralski method, and having a diameter of 300 mm or more. In this epitaxial silicon wafer, the time required to cool every part of the silicon single crystal during the growth from 800° C. down to 600° C. is set to 450 minutes or less, the interstitial oxygen concentration is from 1.5×10to 2.2×10atoms/cm(old ASTM standard), the entire surface of the cut silicon wafer is composed of a COP region, and the BMD density in the bulk of the epitaxial wafer after a heat treatment at 1000° C. for 16 hours is 1×10/cmor less. In this epitaxial silicon wafer, even if the thermal process in a semiconductor device fabrication process is a low temperature thermal process, epitaxial defects do not occur, as well as sufficient gettering capability being obtainable. 1. An epitaxial silicon wafer comprising:a cut silicon wafer, which was cut from a silicon single crystal grown by the Czochralski method, and has a diameter of 300 mm or more, andan epitaxial layer formed on a surface of the cut silicon wafer; whereina time required to cool every part of the silicon single crystal from 800° C. down to 600° C. during the growth is set to 450 minutes or less,{'sup': 18', '18', '3, 'an interstitial oxygen concentration of the cut silicon wafer is from 1.5×10to 2.2×10atoms/cm(old ASTM standard),'}{'sup': 13', '3, 'a nitrogen concentration of the cut silicon wafer is 1×10atoms/cmor less,'}{'sup': 16', '3, 'a carbon concentration of the cut silicon wafer is 1×10atoms/cmor less,'}an entire surface of the cut silicon wafer is composed of a COP region, and{'sup': 4', '2, 'a BMD density in a bulk of the epitaxial silicon wafer is 1×10/cmor less after a heat treatment at 1000° C. for 16 hours.'}2. The epitaxial silicon wafer according to claim 1 ,wherein the epitaxial silicon wafer is heat treated at 1000° C. or less, and then is subjected to a thermal stress test by a flash lamp anneal process at a maximum attainable ...

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Номер записи: 100