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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Применить Всего найдено 28653. Отображено 101.
03-03-2016 дата публикации

SEMICONDUCTOR MANUFACTURING FOR FORMING BOND PADS AND SEAL RINGS

Номер: US20160064294A1
Принадлежит:

An integrated circuit die includes a first bond pad having a bond contact area at a first depth into a plurality of build-up layers over a semiconductor substrate of the integrated circuit die, having sidewalls that surround the bond contact area, the sidewalls extending from the first depth to a top surface of the plurality of build-up layers, and having a top portion that extends over a portion of a top surface of the plurality of build-up layers.

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05-01-2012 дата публикации

Method for manufacture of integrated circuit package system with protected conductive layers for pads

Номер: US20120003830A1
Принадлежит: Individual

A method for manufacture of an integrated circuit package system includes: providing an integrated circuit die having a contact pad; forming a protection cover over the contact pad; forming a passivation layer having a first opening over the protection cover with the first opening exposing the protection cover; developing a conductive layer over the passivation layer; forming a pad opening in the protection cover for exposing the contact pad having the conductive layer partially removed; and an interconnect directly on the contact pad and only adjacent to the protection cover and the passivation layer.

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19-01-2012 дата публикации

Interconnections for flip-chip using lead-free solders and having reaction barrier layers

Номер: US20120012642A1
Принадлежит: International Business Machines Corp

An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components. With a two-layer ball-limiting composition comprising an adhesion/reaction barrier layer, wherein the adhesion/reaction barrier layer serves both as an adhesion layer and a reaction barrier layer, the adhesion/reaction barrier layer can be comprised of a material selected from the group consisting of Zr and ZrN

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19-01-2012 дата публикации

Methods of forming semiconductor chip underfill anchors

Номер: US20120012987A1
Принадлежит: Individual

Various semiconductor chips and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first opening in an insulating layer applied to a side of a semiconductor chip. The first opening does not extend through to the side. A second opening is formed in the insulating layer that exposes a portion of the side.

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19-01-2012 дата публикации

Stacked microelectronic packages having at least two stacked microelectronic elements adjacent one another

Номер: US20120013028A1
Принадлежит: Tessera LLC

A microelectronic assembly includes first and second microelectronic elements. Each of the microelectronic elements has oppositely-facing first and second surfaces and edges bounding the surfaces. The first microelectronic element is disposed on the second microelectronic element with the second surface of the first microelectronic element facing toward the first surface of the second microelectronic element. The first microelectronic element preferably extends beyond at least one edge of the second microelectronic element and the second microelectronic element preferably extends beyond at least one edge of the first microelectronic element. A first edge of the first microelectronic element has a length that is smaller than a first edge of the second microelectronic element. A second edge of the first microelectronic element has a length that is greater than the second edge of the second microelectronic element.

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26-01-2012 дата публикации

Electronic module with vertical connector between conductor patterns

Номер: US20120020044A1
Автор: Antti Iihola, Petteri Palm
Принадлежит: IMBERA ELECTRONICS OY

The present invention generally relates to a new structure to be used with electronic modules such as printed circuit boards and semiconductor package substrates. Furthermore there are presented herein methods for manufacturing the same. According to an aspect of the invention, the aspect ratio of through holes is significantly improved. Aspect ratio measures a relationship of a through hole or a micro via conductor in the direction of height divided width. According to the aspect of the invention, the aspect ratio can be increased over that of the prior art solution by a factor of ten or more.

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02-02-2012 дата публикации

Semiconductor device

Номер: US20120025260A1
Принадлежит: Panasonic Corp

A semiconductor device includes a lead frame, a first semiconductor element mounted on the lead frame, a frame-like member formed on the lead frame, surrounding the first semiconductor element, and a protective resin filling a space surrounded by the frame-like member. The lead frame has an external terminal protruding outside the frame-like member. The external terminal has a barrier portion which is located at an end portion thereof protruding from the frame-like member and rises from a top surface of the external terminal.

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02-02-2012 дата публикации

Laminated semiconductor substrate, laminated chip package and method of manufacturing the same

Номер: US20120025354A1

In a laminated semiconductor substrate, a plurality of semiconductor substrates are laminated. Each of the semiconductor substrate has a plurality of scribe-groove parts formed along scribe lines. Further, each of the semiconductor substrate has a plurality of device regions insulated from each other and has a semiconductor device formed therein. Further, an uppermost substrate and a lowermost substrate have an electromagnetic shielding layer formed using a ferromagnetic body. The electromagnetic shielding layer is formed in a shielding region except the extending zone. The extending zone is set a part which the wiring electrode crosses, in a peripheral edge part of the device region.

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02-02-2012 дата публикации

Semiconductor device

Номер: US20120025367A1
Принадлежит: J Devices Corp, Toshiba Corp

A semiconductor device which includes a substrate, a semiconductor element arranged on the substrate, a heat dissipation component arranged on the semiconductor element, and a mold component covering an upper part of the substrate, the semiconductor element and the heat dissipation component, wherein an area of a surface on the semiconductor element of the heat dissipation component is larger than an area of a surface on which the heat dissipation component of the semiconductor element is arranged.

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02-02-2012 дата публикации

Method and electrostatic transfer stamp for transferring semiconductor dice using electrostatic transfer printing techniques

Номер: US20120027557A1
Автор: Ian Ashdown, Ingo Speier
Принадлежит: Cooledge Lighting Inc

A transfer stamp that can be charged with a spatial pattern of electrostatic charge for picking up selected semiconductor dice from a host substrate and transferring them to a target substrate. The stamp may be bulk charged and then selectively discharged using irradiation through a patterned mask. The technique may also be used to electrostatically transfer selected semiconductor dice from a host substrate to a target substrate.

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02-02-2012 дата публикации

Method of manufacturing semiconductor chip

Номер: US20120028414A1
Принадлежит: Canon Inc

A method of manufacturing a semiconductor chip including an integrated circuit and a through-electrode penetrating a semiconductor layer includes the steps of preparing a first substrate including a release layer and a semiconductor layer formed on the release layer; forming an integrated circuit in the semiconductor layer; forming, in the semiconductor layer, a hole or groove having a depth that does not reach the release layer; filling the hole or the groove with an electrical conductor; bonding a second substrate to the semiconductor layer to form a bonded structure; separating the bonded structure at the release layer to prepare the second substrate to which the semiconductor layer is transferred; and removing at least a portion of the reverse surface side of the semiconductor layer exposed by the separation to expose the bottom of the electrical conductor.

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09-02-2012 дата публикации

Multi-Layer Circuit Assembly And Process For Preparing The Same

Номер: US20120031655A1
Принадлежит: PPG Industries Ohio Inc

A process for fabricating a multi-layer circuit assembly is provided. The process includes (a) providing a substrate at least one area of which comprises a plurality of vias area(s) having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the substrate to form a conformal coating thereon; (c) removing the dielectric coating in a predetermined pattern to expose sections of the substrate; (d) applying a layer of metal to all surfaces to form metallized vias through and/or to the electrically conductive core; (e) applying a resist to the metal layer to form a photosensitive layer thereon; (f) imaging resist in predetermined locations; (g) developing resist to uncover selected areas of the metal layer; and (h) etching uncovered areas of metal to form an electrical circuit pattern connected by the metallized vias.

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09-02-2012 дата публикации

Gas delivery system for reducing oxidation in wire bonding operations

Номер: US20120031877A1
Принадлежит: Kulicke and Soffa Industries Inc

A wire bonding machine is provided. The wire bonding machine includes a bonding tool and an electrode for forming a free air ball on an end of a wire extending through the bonding tool where the free air ball is formed at a free air ball formation area of the wire bonding machine. The wire bonding machine also includes a bond site area for holding a semiconductor device during a wire bonding operation. The wire bonding machine also includes a gas delivery mechanism configured to provide a cover gas to: (1) the bond site area whereby the cover gas is ejected through at least one aperture of the gas delivery mechanism to the bond site area, and (2) the free air ball formation area.

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09-02-2012 дата публикации

Method for fabrication of a semiconductor device and structure

Номер: US20120032294A1
Принадлежит: Monolithic 3D Inc

A semiconductor device comprising: a first single crystal silicon layer comprising first transistors, first alignment mark, and at least one metal layer overlying said first single crystal silicon layer, wherein said at least one metal layer comprises copper or aluminum more than other materials; a second layer overlying said at least one metal layer, said second layer comprising second transistors, second alignment mark, and a through via through said second layer, wherein said through via is a part of a connection path between said first transistors and said second transistors, wherein alignment of said through via is based on said first alignment mark and said second alignment mark and effected by a distance between said first alignment mark and said second alignment mark.

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09-02-2012 дата публикации

Semiconductor device, electronic apparatus, and method of manufacturing semiconductor device

Номер: US20120032298A1
Принадлежит: Renesas Electronics Corp

A semiconductor chip is mounted on a first surface of an interconnect substrate, and has a multilayer interconnect layer. A first inductor is formed over the multilayer interconnect layer, and a wiring axis direction thereof is directed in a horizontal direction to the interconnect substrate. A second inductor is formed on the multilayer interconnect layer, and a wiring axis direction thereof is directed in the horizontal direction to the interconnect substrate. The second inductor is opposite to the first inductor. A sealing resin seals at least the first surface of the interconnect substrate and the semiconductor chip. A groove is formed over the whole area of a portion that is positioned between the at least first inductor and the second inductor of a boundary surface of the multilayer interconnect layer and the sealing resin.

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09-02-2012 дата публикации

Semiconductor device and method of manufacturing the same

Номер: US20120032323A1
Принадлежит: Renesas Electronics Corp

A preferred aim of the invention is to provide technique for improving reliability of semiconductor devices when using a low-dielectric-constant film having a lower dielectric constant than a silicon oxide film to a part of an interlayer insulating film. More specifically, to achieve the preferred aim, an interlayer insulating film IL 1 forming a first fine layer is formed of a middle-Young's-modulus film, and thus it is possible to separate an integrated high-Young's-modulus layer (a semiconductor substrate 1 S and a contact interlayer insulating film CIL) and an interlayer insulating film (a low-Young's-modulus film; a low-dielectric-constant film) IL 2 forming a second fine layer not to let them directly contact with each other, and stress can be diverged. As a result, film exfoliation of the interlayer insulating film IL 2 formed of a low-Young's-modulus film can be prevented and thus reliability of semiconductor devices can be improved.

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09-02-2012 дата публикации

Gain Enhanced LTCC System-on-Package for UMRR Applications

Номер: US20120032836A1

An apparatus, system, and method for Gain Enhanced LTCC System-on-Package radar sensor. The sensor includes a substrate and an integrated circuit coupled to the substrate, where the integrated circuit is configured to transmit and receive radio frequency (RF) signals. An antenna may be coupled to the integrated circuit and a lens may be coupled to the antenna. The lens may be configured to enhance the gain of the sensor.

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16-02-2012 дата публикации

Overmolded electronic module with an integrated electromagnetic shield using smt shield wall components

Номер: US20120036710A1
Принадлежит: Skyworks Solutions Inc

An electronic module with an integrated electromagnetic shield using surface mount shield wall components has been disclosed. Each surface mount shield wall component provides side shielding of the circuitry within the overmolded electronic module and provides an exposed conductive shield wall section to which a top conductive shield can be applied. By including the shield structure as part of the overmolded electronic module, the need for a separate shield and separate process steps for installing the separate shield can be eliminated. Each surface mount shield wall component comprises a non-conductive portion that provides stability during a reflow soldering process, but at least a sacrificial portion of the non-conductive portion can be removed to reduce the amount of area occupied by the overmoldable shield structure.

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16-02-2012 дата публикации

Semiconductor device with less power supply noise

Номер: US20120037959A1
Автор: Tetsuya Katou
Принадлежит: Renesas Electronics Corp

A semiconductor device includes a first power supply line; a second power supply line; a first cell arrangement area in which a first cell is arranged; and a switch area in which a switching transistor and a decoupling capacitance are arranged. The first cell is provided in a first well of a first conductive type, the switching transistor is provided in a second well of the first conductive type, and the decoupling capacitance is provided in a separation area of a second conductive type to separate the first well and the second well from each other. The switching transistor connects the first power supply line and the second power supply line in response to a control signal, the first cell operates with power supplied from the second power supply line, and the decoupling capacitance is connected with the first power supply line.

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16-02-2012 дата публикации

Semiconductor device

Номер: US20120038033A1
Принадлежит: Panasonic Corp

A semiconductor device includes a first semiconductor chip 1 , a second semiconductor chip 4 , a first lead frame 3 including a first die pad 9 on which the first semiconductor chip 1 is mounted, and a second lead frame 5 including a second die pad 11 on which the second semiconductor chip 4 is mounted. A sealing structure 6 covers the first semiconductor chip 1 and the second semiconductor chip 4 . A noise shield 7 is disposed between the first semiconductor chip 1 and the second semiconductor chip 4.

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23-02-2012 дата публикации

Packaging Integrated Circuits

Номер: US20120043650A1
Принадлежит: INFINEON TECHNOLOGIES AG

An integrated circuit 15 is placed onto a lead frame 101 having lead fingers 109 of substantially constant thickness along their length. Wires are formed from the lead fingers 109 to corresponding electrical contacts the integrated circuit. Following the wire bonding process, the thickness of the tips of the lead fingers 109 is reduced by a laser process, to form tips of reduced thickness desirable for a subsequent moulding operation. Thus, at the time of the wire bonding the tips of the fingers 109 need not have a gap beneath them, so that more secure wire bonds to the lead fingers 109 can be formed.

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01-03-2012 дата публикации

Thermally conductive foam product

Номер: US20120048528A1
Принадлежит: Parker Hannifin Corp

A compressible, thermally conductive foam interface pad is adapted for emplacement between opposed heat transfer surfaces in an electronic device. One heat transfer surface can be part of a heat-generating component of the device, while the other heat transfer surface can be part of a heat sink or a circuit board. An assembly including the foam interface pad and the opposed electronic components is also provided.

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01-03-2012 дата публикации

Packaging structure of electronic components and a manufacturing method thereof

Номер: US20120051002A1
Принадлежит: ACSIP Tech Inc

A manufacturing method of a packaging structure of electronic components is provided, and includes the steps of: providing a substrate including at least an electronic component and a grounding area; covering the electronic component of the substrate with a molding unit; cutting out the molding unit to form a plurality of recessed spaces, wherein the recessed spaces are arranged around the electronic component and at least one of the recessed spaces is electrically connected to the grounding area of the substrate; and forming a plurality of columnar electromagnet barriers in the recessed spaces and an electromagnet barrier layer on an upper surface of the molding unit. A packaging structure of electronic components manufactured by the aforementioned method is also provided.

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08-03-2012 дата публикации

Bi-directional, reverse blocking battery switch

Номер: US20120056261A1
Принадлежит: GEM Services Inc USA

Embodiments of the present invention relate to an improved package for a bi-directional and reverse blocking battery switch. According to one embodiment, two switches are oriented side-by-side, rather than end-to-end, in a die package. This configuration reduces the total switch resistance for a given die area, often reducing the resistance enough to avoid the use of backmetal in order to meet resistance specifications. Elimination of backmetal reduces the overall cost of the die package and removes the potential failure modes associated with the manufacture of backmetal. Embodiments of the present invention may also allow for more pin connections and an increased pin pitch. This results in redundant connections for higher current connections, thereby reducing electrical and thermal resistance and minimizing the costs of manufacture or implementation of the die package.

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15-03-2012 дата публикации

Control device of semiconductor device

Номер: US20120061722A1
Принадлежит: Renesas Electronics Corp

A control device of a semiconductor device is provided. The control device of a semiconductor device is capable of reducing both ON resistance and feedback capacitance in a hollow-gate type planar MOSFET to which a second gate electrode is provided or a trench MOSFET to which a second gate electrode is provided. In the control device controlling driving of a hollow-gate type planar MOSFET to which a second gate electrode is provided or a trench MOSFET to which a second gate electrode is provided, a signal of tuning ON or OFF is outputted to a gate electrode in a state of outputting a signal of turning OFF to the second gate electrode.

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15-03-2012 дата публикации

Power amplifier circuit

Номер: US20120062325A1
Принадлежит: Samsung Electro Mechanics Co Ltd

There is provided a power amplifier circuit capable of improving cross isolation between a high frequency band power coupler and a low frequency band power coupler, by directly transmitting power to the high frequency band power coupler and the low frequency band power coupler from a power amplifier, and forming a predetermined inductance circuit or an LC resonance circuit in a line transmitting the power to the high frequency band power coupler. The power amplifier circuit may include a power amplifying unit supplied with power from the outside and amplifying an input signal, a coupling unit having a high frequency band power coupler and a low frequency band power coupler, and an isolation unit including a first power line and a second power line, wherein the first power line has an inductor blocking signal interference generated in a predetermined frequency band.

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15-03-2012 дата публикации

Semiconductor package integrated with conformal shield and antenna

Номер: US20120062439A1
Принадлежит: Advanced Semiconductor Engineering Inc

A semiconductor package integrated with conformal shield and antenna is provided. The semiconductor package includes a semiconductor element, an electromagnetic interference shielding element, a dielectric structure, an antenna element and an antenna signal feeding element. The electromagnetic interference shielding element includes an electromagnetic interference shielding film and a grounding element, wherein the electromagnetic interference shielding film covers the semiconductor element and the grounding element is electrically connected to the electromagnetic interference shielding layer and a grounding segment of the semiconductor element. The dielectric structure covers a part of the electromagnetic interference shielding element and has an upper surface. The antenna element is formed adjacent to the upper surface of the dielectric structure. The antenna signal feeding element passing through the dielectric structure electrically connects the antenna element and the semiconductor element.

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15-03-2012 дата публикации

Manufacturing method of substrate for a semiconductor package, manufacturing method of semiconductor package, substrate for a semiconductor package and semiconductor package

Номер: US20120064666A1
Принадлежит: SUMITOMO METAL MINING CO LTD

A manufacturing method of a substrate for a semiconductor package includes a resist layer forming step to form a resist layer on a surface of a conductive substrate; an exposure step to expose the resist layer using a glass mask with a mask pattern including a transmission area, a light shielding area, and an intermediate transmission area, wherein transmittance of the intermediate transmission area is lower than that of the transmission area and is higher than that of the light shielding area; a development step to form a resist pattern including a hollow with a side shape including a slope part decreasing in hollow circumference as the hollow circumference approaches the substrate; and a plating step to plate on an exposed area to form a metal layer with a side shape including a slope part decreasing in circumference as the circumference approaches the substrate.

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15-03-2012 дата публикации

Semiconductor device including coupling conductive pattern

Номер: US20120064827A1
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A semiconductor device is disclosed including a through electrode. The semiconductor device may include a first semiconductor chip including a transceiver circuit formed on a first surface, a first coupling conductive pattern which is formed on a second surface opposite the first surface, and a through electrode which connects the transceiver circuit and the first coupling conductive pattern. There may be a transceiver located on a second semiconductor chip and including a second coupling conductive pattern facing the first coupling conductive pattern which communicates wirelessly with the first coupling conductive pattern.

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15-03-2012 дата публикации

Network system and node

Номер: US20120066421A1
Принадлежит: Azbil Corp

A connector unit includes a communication line connecting a receiving port of a physical layer unit of a node to one adjacent node, and a communication line connecting a transmitting port of the physical layer unit to the one adjacent node via a capacitor, and a connector unit includes a communication line for connecting a receiving port of a physical layer unit of the node to the other adjacent node, and a communication line for connecting a transmitting port of the physical layer unit to the other adjacent node via a capacitor, wherein the connector unit is connected to a connector unit of the one adjacent node, so that the communication line of the node is connected to the communication line of the one adjacent node, and the communication line of the node is connected to the communication line of the one adjacent node.

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22-03-2012 дата публикации

Massively Parallel Interconnect Fabric for Complex Semiconductor Devices

Номер: US20120068229A1
Принадлежит: Individual

An embodiment of this invention uses a massive parallel interconnect fabric (MPIF) at the flipped interface of a core die substrate (having the core logic blocks) and a context die (used for in circuit programming/context/customization of the core die substrate), to produce ASIC-like density and FPGA-like flexibility/programmability, while reducing the time and cost for development and going from prototyping to production, reducing cost per die, reducing or eliminating NRE, and increasing performance. Other embodiments of this invention enable debugging complex SoC through large contact points provided through the MPIF, provide for multi-platform functionality, and enable incorporating FGPA core in ASIC platform through the MPIF. Various examples are also given for different implementations.

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22-03-2012 дата публикации

Tsop with impedance control

Номер: US20120068317A1
Принадлежит: TESSERA RESEARCH LLC

A semiconductor device of an illustrative embodiment includes a die, a lead frame including a plurality of leads having substantial portions arranged in a lead plane and electrically connected to the die. Most preferably, the package includes at least a substantial portion of one conductive element arranged in a plane positioned adjacent the lead frame and substantially parallel to the lead plane, the conductive element being capacitively coupled to the leads such that the conductive element and at least one of the leads cooperatively define a controlled-impedance conduction path, and an encapsulant which encapsulates the leads and the conductive element. The leads and, desirably, the conductive element have respective connection regions which are not covered by the encapsulant.

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22-03-2012 дата публикации

Integrated Power Converter Package With Die Stacking

Номер: US20120068320A1
Принадлежит: Monolithic Power Systems Inc

An integrated circuit for implementing a switch-mode power converter is disclosed. The integrated circuit comprises at least a first semiconductor die having an electrically quiet surface, a second semiconductor die for controlling the operation of said first semiconductor die stacked on said first semiconductor die having said electrically quiet surface and a lead frame structure for supporting said first semiconductor die and electrically coupling said first and second semiconductor dies to external circuitry.

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22-03-2012 дата публикации

Multi-function and shielded 3d interconnects

Номер: US20120068327A1
Принадлежит: TESSERA RESEARCH LLC

A microelectronic unit includes a semiconductor element consisting essentially of semiconductor material and having a front surface, a rear surface, a plurality of active semiconductor devices adjacent the front surface, a plurality of conductive pads exposed at the front surface, and an opening extending through the semiconductor element. At least one of the conductive pads can at least partially overlie the opening and can be electrically connected with at least one of the active semiconductor devices. The microelectronic unit can also include a first conductive element exposed at the rear surface for connection with an external component, the first conductive element extending through the opening and electrically connected with the at least one conductive pad, and a second conductive element extending through the opening and insulated from the first conductive element. The at least one conductive pad can overlie a peripheral edge of the second conductive element.

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22-03-2012 дата публикации

Semiconductor device having semiconductor member and mounting member

Номер: US20120068362A1
Автор: Syuuichi Kariyazaki
Принадлежит: Renesas Electronics Corp

A semiconductor device including: a semiconductor member having thereon a plurality of interconnect pads: and a mounting member having a plurality of electrode terminals electrically and mechanically connected to the respective interconnect pads for mounting the semiconductor chip on the mounting member, the electrode terminals forming a plurality of I/O cells each having part of the electrode terminals, the part of electrode terminals including signal terminals, the I/O cells forming a first group of the I/O cells and a second group of I/O cells disposed on an inner position of the mounting member with respect to the first group. The higher integration of the semiconductor device having the higher performances can be realized because the interconnect lines can be drawn to the outer periphery of the chip from the interconnect pads corresponding to each of the I/O cells when the chip is miniaturized or the number of the ball electrodes is increased.

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22-03-2012 дата публикации

High speed digital interconnect and method

Номер: US20120068890A1
Принадлежит: Texas Instruments Inc

In some developing interconnect technologies, such as chip-to-chip optical interconnect or metal waveguide interconnects, misalignment can be a serious issue. Here, however, a interconnect that uses an on-chip directional antenna (which operates in the sub-millimeter range) to form a radio frequency (RF) interconnect through a dielectric waveguide is provided. This system allows for misalignment while providing the increased communication bandwidth.

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29-03-2012 дата публикации

Multilayer printed wiring board and method for manufacturing multilayer printed wiring board

Номер: US20120073868A1
Принадлежит: Ibiden Co Ltd

A method for manufacturing a multilayer printed wiring board includes preparing a first resin insulative material having a first conductive circuit on or in the first resin insulative material, forming a second resin insulative material on the first resin insulative material and the first conductive circuit, forming on a surface of the second resin insulative material a first concave portion to be filled with a conductive material for formation of a second conductive circuit, forming on the surface of the second resin insulative material a pattern having a second concave portion and post portions to be filled with the conductive material for formation of a plane conductor, and filling the conductive material in the first concave portion and the second concave portion such that the second conductive circuit and the plane conductor are formed.

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29-03-2012 дата публикации

Multi-layered substrate

Номер: US20120073871A1
Принадлежит: Advanced Semiconductor Engineering Inc

The present invention directs to double-sided multi-layered substrate a base, at least a through-hole passing through the base, patterned first and second metal layers formed on the two opposite surfaces of the base, and first and second plating layers. The first plating layer covers a sidewall of the through-hole and the bottom surface surrounding a bottom opening of the through hole. The second plating layer covers the first plating layer and the top surface surrounding a top opening of the through hole.

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29-03-2012 дата публикации

Semiconductor device

Номер: US20120074542A1
Автор: Shin Soyano
Принадлежит: Fuji Electric Co Ltd

A semiconductor device, in which a control circuit board is mountable outside a sheath case and a power semiconductor element is placeable inside the sheath case, includes a metal step support, a shield plate and a metal ring. The support includes a base portion implanted in the sheath case, a connection portion which extends from an end of the base portion, and a step portion formed at a boundary between the base portion and the connection portion. The shield plate is disposed over the step portion such that the connection portion of the support pierces the shield plate. An end of the metal ring protrudes from an end of the connection portion over the shield plate. The semiconductor device is adapted such that the control circuit board is mounted over the protruded end of the metal ring and is fixed onto the connection portion by an engagement member.

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29-03-2012 дата публикации

Integrated circuit packaging system with warpage control and method of manufacture thereof

Номер: US20120074588A1
Принадлежит: Individual

A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit device having chip interconnects; applying an attachment layer directly on the integrated circuit device; attaching a device stiffener to the integrated circuit device with the attachment layer; attaching a chip carrier to the chip interconnects with the device stiffener attached to the integrated circuit device for controlling warpage of the integrated circuit device to prevent the warpage from causing some of the chip interconnects to separate from the chip carrier during attachment of the chip interconnects to the chip carrier; and applying an underfill between the chip carrier and the integrated circuit device for controlling connectivity of all the chip interconnects to the chip carrier.

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29-03-2012 дата публикации

Integrated circuit packaging system with a shield and method of manufacture thereof

Номер: US20120075821A1
Автор: Reza Argenty Pagaila
Принадлежит: Individual

A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a first integrated circuit over the substrate; forming an encapsulant around the first integrated circuit and over the substrate; and forming a shield structure within and over the encapsulant while simultaneously forming a vertical interconnect structure.

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05-04-2012 дата публикации

Chip Capacitor Precursors

Номер: US20120081832A1
Автор: Azuma Chikara
Принадлежит: Texas Instruments Inc

A capacitive precursor includes electrically conductive material layers stacked on a substrate. The electrically conductive layers provide first and second patterns. The patterns each include overlaying areas free of the electrically conductive material. The first pair of areas overlay areas of the second pattern having the electrically conductive material and the second pair of areas overlay areas of the first pattern having the electrically conductive material. Dielectric layers are interposed between neighboring electrically conductive material layers for electrical isolation. One or more capacitive precursors can be dropped onto or into a board and during assembly of a packaged semiconductor device and have electrically conducting layers associated with its respective plates connected together to form a capacitor during assembly using conventional assembly steps.

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19-04-2012 дата публикации

Semiconductor chip assembly with bump/base/ledge heat spreader, dual adhesives and cavity in bump

Номер: US20120091493A1
Принадлежит: Bridge Semiconductor Corp

A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and dual adhesives. The heat spreader includes a bump, a base and a ledge. The conductive trace includes a pad and a terminal. The semiconductor device is mounted on the bump in a cavity in the bump, is electrically connected to the conductive trace and is thermally connected to the heat spreader. The bump extends into an opening in the first adhesive and is aligned with and spaced from an opening in the second adhesive. The base and the ledge extend laterally from the bump. The first adhesive is sandwiched between the base and the ledge, the second adhesive is sandwiched between the conductive trace and the ledge and the ledge is sandwiched between the adhesives. The conductive trace is located outside the cavity and provides signal routing between the pad and the terminal.

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19-04-2012 дата публикации

Semiconductor device having plural insulated gate switching cells and method for designing the same

Номер: US20120091502A1
Принадлежит: Honda Motor Co Ltd

In a semiconductor device including a plurality of insulated gate switching cells each of which has a gate electrode, an emitter electrode that is commonly provided to cover the plurality of insulated gate switching cells, and a bonding wire connected to the emitter electrode, a gate driving voltage being applied to the gate electrode of each insulated gate switching cell so that emitter current flows through the emitter electrode, mutual conductance of each insulated gate switching cell is varied in accordance with the distance from the connection portion corresponding to the bonding position of the bonding wire so that the emitter current flowing through the emitter electrode is substantially equal among the plurality of insulated gate switching cells.

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19-04-2012 дата публикации

Microelectronic assemblies having compliancy and methods therefor

Номер: US20120091582A1
Принадлежит: Tessera LLC

A microelectronic assembly is disclosed that includes a semiconductor wafer with contacts, compliant bumps of dielectric material overlying the first surface of the semiconductor wafer, and a dielectric layer overlying the first surface of the semiconductor wafer and edges of the compliant bumps. The compliant bumps have planar top surfaces which are accessible through the dielectric layer. Conductive traces may be electrically connected with contacts and extend therefrom to overlie the planar top surfaces of the compliant bumps. Conductive elements may overlie the planar top surfaces in contact with the conductive traces.

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26-04-2012 дата публикации

Atomic layer deposition encapsulation for power amplifiers in rf circuits

Номер: US20120097970A1
Принадлежит: RF Micro Devices Inc

Power amplifiers and methods of coating a protective film of alumina (Al 2 O 3 ) on the power amplifiers are disclosed herein. The protective film is applied through an atomic layer deposition (ALD) process. The ALD process can deposit very thin layers of alumina on the surface of the power amplifier in a precisely controlled manner. Thus, the ALD process can form a uniform film that is substantially free of free of pin-holes and voids.

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26-04-2012 дата публикации

Chip package and manufacturing method thereof

Номер: US20120098109A1
Принадлежит: Individual

A chip package including a shielding layer having a plurality of conductive connectors for better electromagnetic interferences shielding is provided. The conductive connectors can be flexibly arranged within the molding compound for better shielding performance. The shielding layer having the conductive connectors functions as the EMI shield and the shielding layer is electrically grounded within the package structure.

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26-04-2012 дата публикации

Power/ground layout for chips

Номер: US20120098127A1
Принадлежит: MARVELL WORLD TRADE LTD

Embodiments of the present disclosure provide a chip that comprises a base metal layer formed over a first semiconductor die and a first metal layer formed over the base metal layer. The first metal layer includes a plurality of islands configured to route at least one of (i) a ground signal or (ii) a power signal in the chip. The chip further comprises a second metal layer formed over the first metal layer. The second metal layer includes a plurality of islands configured to route at least one of (i) the ground signal or (ii) the power signal in the chip.

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03-05-2012 дата публикации

Method for manufacturing leadframe, packaging method for using the leadframe and semiconductor package product

Номер: US20120104588A1
Принадлежит: MediaTek Inc

A leadframe package includes a die pad with four unitary, outwardly extending slender bars; a plurality of leads arranged along periphery of the die pad; a separate pad segment separated from the die pad and isolated from the plurality of leads; a semiconductor die mounted on an upper side of the die pad, wherein the semiconductor die contains first bond pads wire-bonded to respective the plurality of leads and a second bond pad wire-bonded to the separate pad segment; and a molding compound encapsulating the semiconductor die, the upper side of the die pad, the first suspended pad segment and inner portions of the plurality of leads.

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10-05-2012 дата публикации

Laser ashing of polyimide for semiconductor manufacturing

Номер: US20120111496A1
Принадлежит: International Business Machines Corp

A method for laser ashing of polyimide for a semiconductor manufacturing process using a structure, the structure comprising a supporting material attached to a semiconductor chip by a polyimide glue, includes releasing the supporting material from the polyimide glue, such that the polyimide glue remains on the semiconductor chip; and ashing the polyimide glue on the semiconductor chip using an ablating laser.

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10-05-2012 дата публикации

Semiconductor Device and Method of Forming Prefabricated EMI Shielding Frame with Cavities Containing Penetrable Material Over Semiconductor Die

Номер: US20120112327A1
Принадлежит: Stats Chippac Pte Ltd

A semiconductor device has a plurality of semiconductor die mounted to a temporary carrier. A prefabricated shielding frame has a plate and integrated bodies extending from the plate. The bodies define a plurality of cavities in the shielding frame. A penetrable material is deposited in the cavities of the shielding frame. The shielding frame is mounted over the semiconductor die such that the penetrable material encapsulates the die. The carrier is removed. An interconnect structure is formed over the die, shielding frame, and penetrable material. The bodies of the shielding frame are electrically connected through the interconnect structure to a ground point. The shielding frame is singulated through the bodies or through the plate and penetrable material to separate the die. TIM is formed over the die adjacent to the plate of the shielding frame. A heat sink is mounted over the plate of the shielding frame.

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17-05-2012 дата публикации

3d optoelectronic packaging

Номер: US20120120978A1
Принадлежит: International Business Machines Corp

An optoelectronic (OE) package or system and method for fabrication is disclosed which includes a silicon layer with a wiring layer. The silicon layer has an optical via for allowing light to pass therethrough. An optical coupling layer is bonded to the silicon layer, and the optical coupling layer includes a plurality of microlenses for focusing and or collimating the light through the optical via. One or more first OE elements are coupled to the silicon layer and electrically communicating with the wiring. At least one of the first OE elements positioned in optical alignment with the optical via for receiving the light. A second OE element embedded within the wiring layer. A carrier may be interposed between electrical interconnect elements and positioned between the wiring layer and a circuit board.

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24-05-2012 дата публикации

Use of Ionomeric Silicone Thermoplastic Elastomers in Electronic Devices

Номер: US20120125436A1
Принадлежит: Individual

This invention relates to the use of a thermoplastic elastomer comprising at least one silicone ionomer in the formation of electronic devices.

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24-05-2012 дата публикации

Semiconductor device package with electromagnetic shielding

Номер: US20120126378A1
Принадлежит: Unisem (Mauritius) Holdings Ltd

A package for a semiconductor device includes shielding from RF interference. The package has a lead frame with a lead and a connecting bar. The lead has an inner end for connecting to the device and an outer end having an exposed surface at the package side face. The connecting bar also has an end with an exposed surface at the package side face. A molding compound overlying the leadframe forms a portion of the side face. Electrically conductive shielding forms a top surface of the package, and extends downward therefrom to form an upper portion of the package side face. The exposed surface at the connecting bar end has an upper edge higher than the upper edge of the exposed surface of lead end. Accordingly, the shielding makes electrical contact with the connecting bar adjacent to its exposed surface, while being electrically isolated from the lead.

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24-05-2012 дата публикации

Magnetic shielding for multi-chip module packaging

Номер: US20120126382A1
Автор: Romney R. Katti
Принадлежит: Honeywell International Inc

A system comprises a plurality of stacked integrated circuit dice, each integrated circuit die comprising at least one circuit, a package enclosing the plurality of dice, and at least two magnetic shields configured to magnetically shield the at least one circuit of each of the plurality of integrate circuit dice. At least one of the magnetic shields is within the package, and at least two of the plurality of stacked integrated circuit dice are positioned between the at least two magnetic shields.

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24-05-2012 дата публикации

System comprising a semiconductor device and structure

Номер: US20120129301A1
Принадлежит: Monolithic 3D Inc

A method of manufacturing a semiconductor device, the method including, providing a first monocrystalline layer including semiconductor regions, overlaying the first monocrystalline layer with an isolation layer, transferring a second monocrystalline layer comprising semiconductor regions to overlay the isolation layer, wherein the first monocrystalline layer and the second monocrystalline layer are formed from substantially different crystal materials; and subsequently etching the second monocrystalline layer as part of forming at least one transistor in the second monocrystalline layer.

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31-05-2012 дата публикации

Laminated wiring board

Номер: US20120132460A1
Автор: Yoshihisa Warashina
Принадлежит: Hamamatsu Photonics KK

In a multilayer wiring board 1, a low resistance silicon substrate 2 having a predetermined resistivity and a high resistance silicon substrate 4 having a resistivity higher than the predetermined resistivity are stacked while interposing an insulating layer 3 therebetween. The low resistance silicon substrate 2 is provided with an electric passage part 6 surrounded by a ring-shaped groove 5, while a wiring film 13 electrically connected to the electric passage part 6 through an opening 8 of the insulating layer 3 is disposed on a rear face 4 b of the high resistance silicon substrate 4 and an inner face 11 a of a recess 11. Since the high resistance silicon substrate 4 is thus provided with the wiring film 13, an optical semiconductor element 20 and an electronic circuit element 30 which differ from each other in terms of the number and positions of electrode pads can be electrically connected to each other on the front and rear face sides of the multilayer wiring board 1.

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31-05-2012 дата публикации

Semiconductor device

Номер: US20120133058A1
Автор: Kunihiro Komiya
Принадлежит: ROHM CO LTD

The semiconductor device has the CSP structure, and includes: a plurality of electrode pads formed on a semiconductor integrated circuit in order to input/output signals from/to exterior; solder bumps for making external lead electrodes; and rewiring. The solder bumps are arranged in two rows along the periphery of the semiconductor device. The electrode pads are arranged inside the outermost solder bumps so as to be interposed between the two rows of solder bumps. Each trace of the rewiring is extended from an electrode pad, and is connected to any one of the outermost solder bumps or any one of the inner solder bumps.

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31-05-2012 дата публикации

Stackable semiconductor chip with edge features and methods of fabricating and processing same

Номер: US20120133381A1
Принадлежит: Electro Scientific Industries Inc

A method of performing a function on a three-dimensional semiconductor chip package as well as on individual chips in the package is disclosed. That method involves the creation of an operative relationship between a function performer and an edge feature on the chip or chips wherein the edge feature consists of one or more of an electrically conductive pad, thermally conductive pad, a probe pad, a fuse, a resistor, a capacitor, an inductor, an optical emitter, an optical receiver, a test pad, a bond pad, a contact pin, a heat dissipator, an alignment marker, a metrology feature and a function performer may be any one or more of a test probe, the laser, a programming device, an interrogation device, a loading device or a tuning device. In addition, a chip per se with edge features is disclosed along with a three-dimensional stack of such chips in either of several different configurations. The disclosure provides information regarding the formation of edge feature, the singulation of dice having incipient edge features, the stacking of dice and the handling or dice with edge features.

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31-05-2012 дата публикации

Radiofrequency amplifier

Номер: US20120133442A1
Автор: Igor Blednov
Принадлежит: NXP BV

An integrated radiofrequency amplifier with an operational frequency includes first and second Doherty amplifiers each having a main device, and a peak device connected at respective inputs and outputs by respective phase shift elements configured to provide a 90 degree phase shift at the operational frequency. An input of the amplifier is connected to the input of the main device of the first Doherty amplifier, an output of the amplifier is connected to the outputs of the peak devices of the first and second Doherty amplifiers and the input of the peak device of the first Doherty amplifier is connected to the input of the main device of the second Doherty amplifier by a phase shift element providing a 90 degree phase shift at the operational frequency.

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07-06-2012 дата публикации

Semiconductor Device

Номер: US20120139130A1
Принадлежит: Renesas Electronics Corp

The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOS•FET for a high side switch and a power MOS•FET for a low side switch are connected in series. In the non-insulated type DC-DC converter, the power transistor for the high side switch, the power transistor for the low side switch, and driver circuits that drive these are respectively constituted by different semiconductor chips. The three semiconductor chips are accommodated in one package, and the semiconductor chip including the power transistor for the high side switch, and the semiconductor chip including the driver circuits are disposed so as to approach each other.

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14-06-2012 дата публикации

Semiconductor device

Номер: US20120146176A1
Принадлежит: Toshiba Corp

A semiconductor device receiving as input a radio frequency signal having a frequency of 500 MHz or more and a power of 20 dBm or more is provided. The semiconductor device includes: a silicon substrate; a silicon oxide film formed on the silicon substrate; a radio frequency interconnect provided on the silicon oxide film and passing the radio frequency signal; a fixed potential interconnect provided on the silicon oxide film and placed at a fixed potential; and an acceptor-doped layer. The acceptor-doped layer is formed in a region of the silicon substrate. The region is in contact with the silicon oxide film. The acceptor-doped layer is doped with acceptors.

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14-06-2012 дата публикации

Semiconductor device with vias and flip-chip

Номер: US20120146214A1
Автор: Mehdi Frederik Soltan
Принадлежит: SANA TECHNOLOGY HOLDINGS Ltd

Semiconductor devices comprising a flip-chip having passive circuits such as spiral inductors on the back side are disclosed. Provision is made for connection with the spiral inductors using vias and/or bondwires. Further aspects of the invention provide for methods of making such devices.

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14-06-2012 дата публикации

Semiconductor device and substrate

Номер: US20120146233A1
Автор: Akira Nakayama
Принадлежит: Oki Semiconductor Co Ltd

A semiconductor device of the invention include a rectangular semiconductor element mounted on a substrate formed with an external input terminal, an external output terminal, and a plurality of wiring patterns connected to each of the external input terminal and the external output terminal. The semiconductor element comprises, a plurality of first electrodes formed along a first edge of a surface thereof, a plurality of second electrodes formed along an edge opposite to the first edge of the surface, a plurality of third electrodes formed in the neighborhood of a functional block, and an internal wiring for connecting the first electrodes and the third electrodes. The substrate comprises, a first wiring pattern for connecting the external input terminal and the first electrodes, a second wiring pattern for connecting the external output terminal and the second electrodes, and a third wiring pattern for connecting the first electrodes and the third electrodes.

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14-06-2012 дата публикации

Mold release film and process for producing light emitting diode

Номер: US20120148820A1
Автор: Tamao Okuya
Принадлежит: Asahi Glass Co Ltd

To provide a mold release film for producing a light emitting diode by a mold, which is less susceptible to formation of pin holes or rupture and which is applicable to mass production of a light emitting diode by means of a mold having a plurality of cavities, and a process for producing a light emitting diode by means of such a mold release film. A mold release film to be disposed on the cavity surface of a mold to form a substantially hemispherical lens portion by encapsulating a light emitting element of a light emitting diode with an encapsulation resin, which release film has a thickness of from 16 to 175 μm and a tensile rupture elongation of from 600 to 3,000% at 110° C. as measured in accordance with JIS K7127, and a process for producing a light emitting diode by means of such a mold release film.

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21-06-2012 дата публикации

Element carrier and light receiving module

Номер: US20120153132A1
Принадлежит: Mitsubishi Electric Corp

An element carrier has a mounting surface where at least one element outputting a high-frequency signal is disposed. A first dielectric layer has a first side surface partially forming the mounting surface and a first main surface connecting to the first side surface and extending in an intersecting direction intersecting with the mounting surface. A first wiring pattern is provided on the first main surface and extends from the first side surface. A second dielectric layer has a second side surface partially forming the mounting surface and a second main surface connecting to the second side surface and extending in the intersecting direction, and is provided on a part of the first main surface of the first dielectric layer where the first wiring pattern is provided. A second wiring pattern is provided on the second main surface of the second dielectric layer and extends from the second side surface.

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21-06-2012 дата публикации

Packaged semiconductor chips with array

Номер: US20120153443A1
Принадлежит: Tessera LLC

A chip-sized, wafer level packaged device including a portion of a semiconductor wafer including a device, at least one packaging layer containing silicon and formed over the device, a first ball grid array formed over a surface of the at least one packaging layer and being electrically connected to the device and a second ball grid array formed over a surface of the portion of the semiconductor wafer and being electrically connected to the device.

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21-06-2012 дата публикации

Chip Pad Resistant to Antenna Effect and Method

Номер: US20120156870A1
Автор: Ji-Shyang Nieh, Wu-Te Weng

A chip pad structure of an integrated circuit (IC) and the method of forming are disclosed. The chip pad comprises a main pad portion and a ring pad portion. During a charging process involved in forming the chip pad structure, electrical connections from the gate electrodes of MOS transistors in the IC substrate generally are made only to the ring pad portion that has an antenna-to-gate area ratio substantially below a predetermined antenna design rule ratio, and thus is resistant or immune to antenna effect. The main pad portion and the ring pad portion are coupled together through metal bridges formed in an upper interconnect metal layer or in the top conductive pad layer. The chip pad may be used as probe pads on a parametric testline or bonding pads on an IC.

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28-06-2012 дата публикации

Semiconductor device

Номер: US20120161231A1
Принадлежит: Renesas Electronics Corp

In a semiconductor power device such as a power MOSFET having a super-junction structure in each of an active cell region and a chip peripheral region, an outer end of a surface region of a second conductivity type coupled to a main junction of the second conductivity type in a surface of a drift region of a first conductivity type and having a concentration lower than that of the main junction is located in a middle region between an outer end of the main junction and an outer end of the super-junction structure in the chip peripheral region.

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28-06-2012 дата публикации

Semiconductor Device and Method of Forming Integrated Passive Device Over Semiconductor Die with Conductive Bridge and Fan-Out Redistribution Layer

Номер: US20120161279A1
Автор: Kai Liu, KANG Chen, Yaojian Lin
Принадлежит: Stats Chippac Pte Ltd

A semiconductor device has a first semiconductor die. A first inductor is formed over the first semiconductor die. A second inductor is formed over the first inductor and aligned with the first inductor. An insulating layer is formed over the first semiconductor die and the first and second inductors. A conductive bridge is formed over the insulating layer and electrically connected between the second inductor and the first semiconductor die. In one embodiment, the semiconductor device has a second semiconductor die and a conductive layer is formed between the first and second semiconductor die. In another embodiment, a capacitor is formed over the first semiconductor die. In another embodiment, the insulating layer has a first thickness over a footprint of the first semiconductor die and a second thickness less than the first thickness outside the footprint of the first semiconductor die.

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28-06-2012 дата публикации

Chip scale surface mounted semiconductor device package and process of manufacture

Номер: US20120161307A1
Автор: Tao Feng
Принадлежит: ALPHA AND OMEGA SEMICONDUCTOR INC

A semiconductor device package die and method of manufacture are disclosed. The device package die may comprise a device substrate having one or more front electrodes located on a front surface of the device substrate and electrically connected to one or more corresponding device regions formed within the device substrate proximate the front surface. A back conductive layer is formed on a back surface of the device substrate. The back conductive layer is electrically connected to a device region formed within the device substrate proximate a back surface of the device substrate. One or more conductive extensions are formed on one or more corresponding sidewalls of the device substrate in electrical contact with the back conductive layer, and extend to a portion of the front surface of the device substrate. A support substrate is bonded to the back surface of the device substrate.

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05-07-2012 дата публикации

Peeling apparatus and manufacturing apparatus of semiconductor device

Номер: US20120168066A1
Принадлежит: Semiconductor Energy Laboratory Co Ltd

To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.

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05-07-2012 дата публикации

Low cost thermally enhanced hybrid bga and method of manufacturing the same

Номер: US20120168929A1
Автор: Kim-yong Goh
Принадлежит: STMICROELECTRONICS PTE LTD

A semiconductor package is formed having a substrate juxtaposed on at least two sides of a semiconductor die. Both the substrate and the semiconductor die are affixed to a conductive layer that draws heat generated during use of the semiconductor package away from the semiconductor die and the substrate. There are also electrical contacts affixed to the substrate and the semiconductor die. The electrical contacts facilitate electrical connection between the semiconductor die, the substrate, and any external devices or components making use of the semiconductor die. The substrate, semiconductor die, and at least a portion of some of the electrical contacts are enclosed by an encapsulating layer insulating the components. Portions of the electrical contacts not enclosed by the encapsulating layer are affixed to an outside device, such as a printed circuit board.

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05-07-2012 дата публикации

Solid element device and method for manufacturing the same

Номер: US20120171789A1

A method of making a solid element device that includes a solid element, an element mount part on which the solid element is mounted and which has a thermal conductivity of not less than 100 W/mK, an external terminal provided separately from the element mount part and electrically connected to the solid element, and a glass sealing part directly contacting and covering the solid element for sealing the solid element, includes pressing a glass material at a temperature higher than a yield point of the glass material for forming the glass sealing part.

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05-07-2012 дата публикации

Rf identification device with near-field-coupled antenna

Номер: US20120171953A1
Принадлежит: STMICROELECTRONICS SRL

An embodiment of a RF identification device is formed by a tag and by a reader. The tag is formed by a processing circuit and a first antenna, which has the function both of transmitting and of receiving data. The reader is formed by a control circuit and by a second antenna, which has the function both of transmitting and of receiving data. The processing circuit is formed by a resonance capacitor, a modulator, a rectifier circuit, a charge-pump circuit and a detection circuit. The antenna of the tag and the processing circuit are integrated in a single structure in completely monolithic form. The first antenna has terminals connected to the input of the rectifier circuit, the output of which is connected to the charge-pump circuit. The charge-pump circuit has an output connected to the detection circuit.

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12-07-2012 дата публикации

Test Contact System For Testing Integrated Circuits With Packages Having An Array Of Signal and Power Contacts

Номер: US20120176151A1
Принадлежит: Johnstech International Corp

A test fixture ( 120 ) is disclosed for electrically testing a device under test ( 130 ) by forming a plurality of temporary mechanical and electrical connections between terminals ( 131 ) on the device under test ( 130 ) and contact pads ( 161 ) on the load board ( 160 ). The test fixture ( 120 ) has a replaceable membrane ( 150 ) that includes vias ( 151 ), with each via ( 151 ) being associated with a terminal ( 131 ) on the device under test ( 130 ) and a contact pad ( 161 ) on the load board ( 160 ). In some cases, each via ( 151 ) has an electrically conducting wall for conducting current between the terminal ( 131 ) and the contact pad ( 161 ). In some cases, each via ( 151 ) includes a spring ( 152 ) that provides a mechanical resisting force to the terminal ( 131 ) when the device under test ( 130 ) is engaged with the test fixture ( 120 ).

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12-07-2012 дата публикации

Passive resistive-heater addressing network

Номер: US20120176180A1
Принадлежит: SENSORTECHNICS GMBH

There is described a passive heater-and-diode multiplexing network for selective addressing of thermally-coupled and electrically-disconnected fuses within a passive device network (resistor/capacitor/inductor) or within an application circuit.

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19-07-2012 дата публикации

Semiconductor Device and Method of Forming Bond Wires and Stud Bumps in Recessed Region of Peripheral Area around the Device for Electrical Interconnection to Other Devices

Номер: US20120181689A1
Принадлежит: Stats Chippac Pte Ltd

A semiconductor wafer contains a plurality of semiconductor die each having a peripheral area around the die. A recessed region with angled or vertical sidewall is formed in the peripheral area. A conductive layer is formed in the recessed region. A first stud bump is formed over a contact pad of the semiconductor die. A second stud bump is formed over the first conductive layer within the recessed region. A bond wire is formed between the first and second stud bumps. A third stud bump is formed over the bond wire and first stud bump. A dicing channel partially formed through the peripheral area. The semiconductor wafer undergoes backgrinding to the dicing channel to singulate the semiconductor wafer and separate the semiconductor die. The semiconductor die can be disposed in a semiconductor package with other components and electrically interconnected through the bond wire and stud bumps.

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19-07-2012 дата публикации

Dram device with built-in self-test circuitry

Номер: US20120182776A1
Автор: Ming Li, Scott C. Best
Принадлежит: RAMBUS INC

A dynamic random access memory (DRAM) device includes a first and second integrated circuit (IC) die. The first integrated circuit die has test circuitry to generate redundancy information. The second integrated circuit die is coupled to the first integrated circuit die in a packaged configuration including primary storage cells and redundant storage cells. The second integrated circuit die further includes redundancy circuitry responsive to the redundancy information to substitute one or more of the primary storage cells with one or more redundant storage cells.

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26-07-2012 дата публикации

Direct Edge Connection for Multi-Chip Integrated Circuits

Номер: US20120187577A1
Принадлежит: International Business Machines Corp

The present invention allows for direct chip-to-chip connections using the shortest possible signal path.

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26-07-2012 дата публикации

Packaged semiconductor device for high performance memory and logic

Номер: US20120187578A1
Автор: Ming Li
Принадлежит: Individual

A packaged semiconductor device is disclosed. The device comprises a substrate having multiple layers between first and second oppositely disposed faces, and a cavity with an opening at the first face to nest at least one integrated circuit memory device. Logic circuitry is disposed on the second face and includes contacts for electrically coupling to the stacked integrated circuit memory devices. The logic circuitry is coupled to electrical contacts formed on the first face through first electrical paths formed in the multiple layers of the substrate, the first electrical paths including conductive traces and vias.

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26-07-2012 дата публикации

Manufacturing method of semiconductor device, semiconductor device and mobile communication device

Номер: US20120187585A1
Автор: Takashi Yamazaki
Принадлежит: Toshiba Corp

A manufacturing method of a semiconductor device includes: sealing a semiconductor chip with a sealing resin containing a filler; exposing a part of the filler; etching at least a part of the exposed filler; and forming a metal film at least at a part of a surface of the sealing resin including inner surfaces of holes formed at the surface of the sealing resin by the etching.

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02-08-2012 дата публикации

Radiation-Emitting Semiconductor Component

Номер: US20120193657A1
Принадлежит: OSRAM Opto Semiconductors GmbH

A radiation-emitting semiconductor component includes a light-emitting diode chip with at least two emission regions that can be operated independently of each other and at least two differently designed conversion elements. During operation of the light-emitting diode chips each of the emission regions is provided for generating electromagnetic primary radiation. Each emission region has an emission surface by which at least part of the primary radiation is decoupled from the light-emitting diode chip. The conversion elements are provided for absorbing at least part of the primary radiation and for re-emitting secondary radiation. The differently designed conversion elements are disposed downstream of different emission surfaces. An electric resistance element is connected in series or parallel to at least one of the emission regions.

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02-08-2012 дата публикации

Ohmic connection using widened connection zones in a portable electronic object

Номер: US20120193804A1
Автор: Yannick Grasset
Принадлежит: RFIDEAL

The invention relates to portable electronic objects comprising an integrated circuit chip, and a mounting having two connection terminals for a circuit, as well as to a method for manufacturing such objects. The invention is characterized in that the chip is provided, on the active surface thereof, with two widened connection zones, in particular connection plates, said connection plates being positioned opposite said terminals and electrically connected, by ohmic contact, to the latter, and in that the surface defined by the connection plates, at the surface of the active integrated circuit having said plates, is greater than ½ of the surface of said surface. The invention can be used, in particular, for RFID objects.

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02-08-2012 дата публикации

Charging and Communication System for a Battery-Powered Microstimulator

Номер: US20120197352A1
Принадлежит: Boston Scientific Neuromodulation Corp

A system and method are provided for both recharging and communicating with a stimulator having a rechargeable battery, which stimulator is implanted deeply in the body, in particular where the stimulator is a microstimulator, the system includes a base station and an external device, for instance a chair pad. The chair pad may contain an antenna/charging coil and a booster coil. The antenna/charging coil can be used for charging the rechargeable battery and also for communicating with the stimulator using frequency shift keying and on-off keying. The booster coil can be used to recharge a battery depleted to zero volts. The base station connected to the chair pad may be used to power the antenna/charging coil and the booster coil.

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16-08-2012 дата публикации

Reprogrammable circuit board with alignment-insensitive support for multiple component contact types

Номер: US20120206889A1
Автор: Richard Norman
Принадлежит: Individual

The present invention is directed to a system that programmably interconnects integrated circuit chips and other components at near-intra-chip density. The system's contact structure allows it to adapt to components with a wide variety of contact spacings and interconnection requirements, the use of releasable attachment means allows component placement to be modified as needed, the system identifies the contacts and the components to facilitate specifying the inter-component connections, and the system provides signal conditioning and retiming to minimize issues with signal integrity and signal skew.

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23-08-2012 дата публикации

Microwave unit and method therefore

Номер: US20120211487A1
Принадлежит: Huawei Technologies Co Ltd

A microwave unit comprising a motherboard and a package adapted to be assembled automatically in, e.g., a Surface Mounted Device, SMD, machine is disclosed. The microwave unit preferably comprises a connecting component interconnecting the motherboard and the package, and operable to make the signal ways on a same level at both the motherboard and at the package. Furthermore, the microwave unit preferably comprises a micro-strip adapted soldering tag for soldering on two sides.

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30-08-2012 дата публикации

Semiconductor Device and Method of Forming the Device Using Sacrificial Carrier

Номер: US20120217634A9
Принадлежит: Stats Chippac Pte Ltd

A semiconductor device includes a first semiconductor die or component having a plurality of bumps, and a plurality of first and second contact pads. In one embodiment, the first and second contact pads include wettable contact pads. The bumps are mounted directly to a first surface of the first contact pads to align the first semiconductor die or component. An encapsulant is deposited over the first semiconductor die or component. An interconnect structure is formed over the encapsulant and is connected to a second surface of the first and second contact pads opposite the first surface of the first contact pads. A plurality of vias is formed through the encapsulant and extends to a first surface of the second contact pads. A conductive material is deposited in the vias to form a plurality of conductive vias that are aligned by the second contact pads to reduce interconnect pitch.

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30-08-2012 дата публикации

Multi-stack semiconductor integrated circuit device

Номер: US20120217658A1
Автор: Tadahiro Kuroda
Принадлежит: KEIO UNIVERSITY

The invention relates to a multi-stack semiconductor integrated circuit device where communication between semiconductor chips can be efficiently carried out by bypassing a number of chips. Each semiconductor chip that forms a multi-stack semiconductor integrated circuit device having a stack structure where four or more semiconductor chips having the same shape are stacked on top of each other is provided with: a first coil for transmission/reception for communication between chips over a long distance; and a second coil for transmission/reception for communication between chips over a short distance, of which the size is smaller than that of the above-described first coil for transmission/reception.

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06-09-2012 дата публикации

Package 3D Interconnection and Method of Making Same

Номер: US20120225522A1
Принадлежит: Broadcom Corp

A method of manufacturing an integrated circuit (IC) package is provided. The method includes stacking an interposer substrate and a device structure, the interposer substrate having a first plurality of contact members formed on a first surface of the interposer substrate and the device structure having a second plurality of contact members that are exposed at a surface of the device structure, and laminating the interposer substrate and the device structure such that the first plurality of contact members are physically and electrically coupled to the second plurality of contact members. The interposer substrate is configured such that a circuit member mounted to a second surface of the interposer substrate is electrically coupled to the second plurality of contact members.

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13-09-2012 дата публикации

Semiconductor device

Номер: US20120228784A1
Автор: Tatsu Suzuki
Принадлежит: Sumitomo Bakelite Co Ltd

Disclosed is a semiconductor device configured by encapsulating a semiconductor element, partially or entirely covered with a polyimide, using an epoxy resin composition for encapsulating semiconductor device which contains an epoxy resin (A), a phenol resin (B), a curing accelerator (C), an inorganic filler (D), and a silane coupling agent (E) represented by the formula (1): (in the formula (1), each of R 1 , R 2 and R 3 represents a C 1-4 hydrocarbon group, all of them may be the same or different from each other, and n represents an integer from 0 to 2), and/or a hydrolytic condensate thereof.

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13-09-2012 дата публикации

Method of manufacturing film for semiconductor device

Номер: US20120231557A1
Принадлежит: Nitto Denko Corp

The present invention aims to provides a method of manufacturing a film for a semiconductor device in which a dicing film, a die bond film, and a protecting film are laminated in this order, including the steps of: irradiating the die bond film with a light ray having a wavelength of 400 to 800 nm to detect the position of the die bond film based on the obtained light transmittance and punching the dicing film out based on the detected position of the die bond film, and in which T 2 /T 1 is 0.04 or more, wherein T 1 is the light transmittance of the portion where the dicing film and the protecting film are laminated and T 2 is the light transmittance of the portion where the dicing film, the die bond film, and the protecting film are laminated.

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20-09-2012 дата публикации

Semiconductor light-emitting device and manufacturing method

Номер: US20120235169A1
Принадлежит: Stanley Electric Co Ltd

A semiconductor light-emitting device and a method for manufacturing the same can include a wavelength converting layer encapsulating at least one semiconductor light-emitting chip to emit various colored lights including white light. The semiconductor light-emitting device can include a base board with the chip mounted thereon, a frame located on the base board, a transparent plate located on the wavelength converting layer, a reflective material layer disposed between the frame and both side surfaces of the wavelength converting layer and the transparent plate, and a light-absorbing layer located on the reflective material layer. The semiconductor light-emitting device can be configured to improve light-emitting efficiency and a contrast between a light-emitting and non-light-emitting surfaces by using the transparent material and light-absorbing layer. A wavelength-converted light that is emitted can have a high light-emitting efficiency and a high contrast between a light-emitting and non-light-emitting surface from a small light-emitting surface.

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20-09-2012 дата публикации

Manufacturing method of semiconductor device, and semiconductor device

Номер: US20120235308A1
Автор: Noriyuki Takahashi
Принадлежит: Renesas Electronics Corp

To suppress the reduction in reliability of a resin-sealed semiconductor device. A first cap (member) and a second cap (member) with a cavity (space formation portion) are superimposed and bonded together to form a sealed space. A semiconductor including a sensor chip (semiconductor chip) and wires inside the space is manufactured in the following way. In a sealing step of sealing a joint part between the caps, a sealing member is formed of resin such that an entirety of an upper surface of the second cap and an entirety of a lower surface of the first cap are respectively exposed. Thus, in the sealing step, the pressure acting in the direction of crushing the second cap can be decreased.

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20-09-2012 дата публикации

Esd network circuit with a through wafer via structure and a method of manufacture

Номер: US20120238069A1
Автор: Steven H. Voldman
Принадлежит: International Business Machines Corp

A method includes forming an ESD active device on a substrate, forming a ground plane on a backside of the substrate and forming at least one through wafer via electrically connected to a negative power supply of the ESD active device and the ground plane to provide a low series resistance path to the substrate.

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27-09-2012 дата публикации

Integrated circuit packaging system with collapsed multi-integration package and method of manufacture thereof

Номер: US20120241980A1
Принадлежит: Individual

A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; mounting a central integrated circuit over the base substrate; mounting a side package having a side package substrate along a peripheral region of the base substrate and laterally peripheral to the central integrated circuit with the side package substrate coplanar with the central integrated circuit; and encapsulating the central integrated circuit and the side package above the base substrate with a base encapsulation to form a planar surface over the central integrated circuit and the side package facing away from the base substrate.

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04-10-2012 дата публикации

Integrated circuit package including miniature antenna

Номер: US20120249380A1
Принадлежит: Fractus SA

The present invention relates to an integrated circuit package comprising at least one substrate, each substrate including at least one layer, at least one semiconductor die, at least one terminal, and an antenna located in the integrated circuit package, but not on said at least one semiconductor die. The conducting pattern comprises a curve having at least five sections or segments, at least three of the sections or segments being shorter than one-tenth of the longest free-space operating wavelength of the antenna.

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11-10-2012 дата публикации

Stacked Composite Device Including a Group III-V Transistor and a Group IV Diode

Номер: US20120256190A1
Принадлежит: International Rectifier Corp USA

In one implementation, a stacked composite device comprises a group IV diode and a group III-V transistor stacked over the group IV diode. A cathode of the group IV diode is in contact with a source of the group III-V transistor, an anode of the group IV diode is coupled to a gate of the group III-V transistor to provide a composite anode on a bottom side of the stacked composite device, and a drain of the group III-V transistor provides a composite cathode on a top side of the stacked composite device.

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11-10-2012 дата публикации

Optical module, manufacturing method of optical module and optical communication device

Номер: US20120257852A1
Принадлежит: Sony Corp

An optical module includes: a substrate provided with a through hole for inserting an optical fiber from a second principal surface side of the substrate; an optical device provided on a first principal surface side of the substrate; a first electrode provided in the substrate for connecting an electric fiber from the second principal surface side; a second electrode formed on the first principal surface side of the substrate for connecting to the optical device; and a third electrode provided on a side surface of the substrate and electrically connected to the second electrode.

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18-10-2012 дата публикации

On-chip capacitors with a variable capacitance for a radiofrequency integrated circuit

Номер: US20120262229A1
Принадлежит: International Business Machines Corp

Methods of fabricating an on-chip capacitor with a variable capacitance, as well as methods of adjusting the capacitance of an on-chip capacitor and design structures for an on-chip capacitor. The method includes forming first and second ports configured to be powered with opposite polarities, first and second electrodes, and first and second voltage-controlled units. The method includes configuring the first voltage-controlled unit to selectively couple the first electrode with the first port, and the second voltage-controlled unit to selectively couple the second electrode with the second port. When the first electrode is coupled by the first voltage-controlled unit with the first port and the second electrode is coupled by the second voltage-controlled unit with the second port, the capacitance of the on-chip capacitor increases.

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25-10-2012 дата публикации

Semiconductor device

Номер: US20120267682A1
Принадлежит: Renesas Electronics Corp

A semiconductor device in which the wiring resistance and parasitic inductance of a semiconductor package configuring a power semiconductor module is reduced. In the semiconductor device, a semiconductor chip with an IGBT formed therein and a diode chip are mounted over the upper surface of a die pad. An emitter pad of the semiconductor chip and an anode pad of the diode chip are coupled with a lead by an Al wire. One end of the lead is located in a higher position than the upper surface of the die pad in order to shorten the length of the Al wire for coupling the emitter pad and the lead.

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