СИСТЕМА ЗАЩИТЫ УСТРОЙСТВА ПОСТОЯННОГО ТОКА

В настоящей заявке описываются схемы и системы для использования в многофазных источниках питания для защиты от токов переходных процессов. Металлооксидные варисторы между каждыми из двух фаз и между каждой фазой и нейтральной точкой заменяются единственным варистором, соединенным с источником питания постоянного тока. При этом токи переходных процессов ограничиваются резисторами, которые включены последовательно входам каждой из трех фаз. Защита от переходных процессов между любыми из четырех входов обеспечивается с помощью одного металлооксидного варистора, подключенного к источнику питания постоянного тока. Токи переходных процессов между фазами и между фазами и нейтральной точкой направляют через диоды в металлооксидный варистор, включенный между положительным и отрицательным выходными клеммами источника питания постоянного тока. Технический результат - упрощение. 3 н. и 14 з.п. ф-лы, 5 ил.

Частотозависимый индуктивно-резистивный элемент на основе композитных проводников для защиты от импульсных перенапряжений и высокочастотных помех

Полезная модель относится к области силовой электроники и посвящено разработке электронного компонента, предназначенного для защиты от импульсных перенапряжений в цепях питания электронной аппаратуры и подавления высокочастотных помех, и может быть использовано для улучшения эксплуатационных и потребительских свойств устройств защиты от импульсных перенапряжений и ВЧ-фильтров для силовых цепей.Сущность полезной модели заключается в создании частотозависимого индуктивно-резистивного элемента, представляющего собой свернутую в спираль ленту, имеющую композитную структуру. Внутренний слой ленты (2) выполнен из неферромагнитного материала высокой электрической проводимостью. Внешний слой (1) выполнен из неферромагнитного материала с низкой электрической проводимостью. Для обеспечения электрической изоляции между соседними слоями введен диэлектрический слой (3). Эффективное увеличение сопротивления элемента с ростом частоты обеспечивается за счет скин-эффекта и эффекта близости перераспределения тока и «выталкивание» в область с низкой электропроводностью. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 169 173 U1 (51) МПК H02H 9/04 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ФОРМУЛА ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ РОССИЙСКОЙ ФЕДЕРАЦИИ (21)(22) Заявка: 2016117718, 04.05.2016 (24) Дата начала отсчета срока действия патента: 04.05.2016 09.03.2017 Приоритет(ы): (22) Дата подачи заявки: 04.05.2016 Адрес для переписки: 390005, г. Рязань, ул. Гагарина, 59/1, ФГБОУ ВО "РГРТУ", патентная служба (56) Список документов, цитированных в отчете о поиске: US5235311 A, 10.08.1993. RU 2237333 C2, 27.09.2004. RU 2284622 C1, 27.09.2006. CN 103036221 A, 10.04.2013. U 1 1 6 9 1 7 3 R U (57) Формула полезной модели Частотозависимый индуктивно-резистивный элемент, представляющий собой токопроводящую ленту, свернутую в спираль, соседние витки которой электрически изолированы друг от друга, отличающийся тем, что токопроводящая лента имеет внутренний слой из неферромагнитного материала ...

Устройство обеспечения непрерывной работоспособности электронных устройств при перенапряжениях и коротких высоковольтных импульсах в бортовой сети транспортного средства

Полезная модель относится к электротехнике и может быть использована для защиты электронных устройств от высоких пиковых напряжений сети, а также от возникновения на длительный период времени высокого постоянного напряжения на линиях питания, превышающее в несколько раз номинальное. Задачей полезной модели является создание устройства, защищающего электронные приборы от высоких пиковых и постоянных значений напряжения бортовой сети ТС, приводящих к их выходу из строя. Техническим результатом полезной модели является повышение надежности работы такого устройства защиты. Технический результат полезной модели достигается при использовании устройства обеспечения непрерывной работоспособности электронных устройств при перенапряжениях и коротких высоковольтных импульсах в бортовой сети ТС, содержащего блок защиты элементов электронного устройства от коротких высоковольтных импульсов, высоковольтный высокоскоростной электронный ключ с управляющим входом, фильтр низких частот, блок отслеживания ...

Индуктивно-резистивный защитный элемент

Полезная модель относится к области силовой электроники и связана с разработкой электронного компонента, предназначенного для защиты от импульсных перенапряжений в электрических сетях, в цепях питания электронной аппаратуры и подавления ВЧ помех, и может быть использована для улучшения эксплуатационных свойств устройств защиты от импульсных перенапряжений и ВЧ-фильтров для силовых цепей.Сущность полезной модели заключается в создании частотозависимого индуктивно-резистивного защитного элемента на основе многослойной проводящей структуры в виде ленты, свернутой в спираль, обеспечивающего малое омическое сопротивление на постоянном токе и низкой частоте, и высокое активное сопротивление в области средних и высоких частот.Внутренний слой ленты (3) выполнен из магнитомягкого ферромагнитного материала, промежуточный слой (2), покрывающий внутренний, из неферромагнитного материала высокой электрической проводимостью и внешний слой (1), покрывающий промежуточный, выполнен из неферромагнитного ...

Предохранительное устройство

Изобретение относится к области электротехники и может быть использовано в электроустановках с классом напряжения до 20 кВ для защиты однофазного силового или измерительного трансформатора от короткого замыкания в цепи вторичной обмотки трансформатора, а также от перегрузок в первичной обмотки трансформатора при номинальном токе срабатывания защиты от 0,3 А. Техническим результатом является упрощение конструкции предохранительного устройства, отсутствие реакции на изменения тока, вызванные импульсными перенапряжениями, в том числе и случайными пиковыми перенапряжениями, исключение необоснованного отключения потребителя, возможность получения достоверной информации о срабатывании устройства, повышение безопасности. Предохранительное устройство содержит корпус (1) в виде трубы с контактными колпачками (2, 3) с цилиндрическим контактным выступом, электромагнитный расцепитель (4), узел (5) управления расцепителем, механизм свободного расцепления 6, указатель срабатывания 7. Электромагнитный ...

СПОСОБ ЗАЗЕМЛЕНИЯ НЕЙТРАЛИ

Изобретение относится к области электротехники и может быть использовано для снижения тока однофазного замыкания и уровня перенапряжений в электросетях. Способ заземления нейтрали включает использование конденсаторов, заземленных через реактор, индуктивное сопротивление которого выбирают по условию компенсации тока однофазного замыкания. Активное сопротивление реактора выбирают по условию исключения феррорезонанса. На время замыкания к поврежденной и отстающей фазам конденсаторов подключают дополнительные емкости. Способ повышает надежность и безопасность электросети. 3 ил., 1 табл.

МНОГООБМОТОЧНЫЙ ДРОССЕЛЬ ДЛЯ ИСПОЛЬЗОВАНИЯ В СТАБИЛИЗАТОРЕ ПЕРЕМЕННОГО ТОКА

... 1. Многообмоточный дроссель, содержащий:магнитный сердечник с первым, вторым и третьим стержнями, по существу параллельными друг другу;первую обмотку, намотанную на первый магнитный стержень и заканчивающуюся на первом конце первым выводом, а на втором конце вторым выводом;вторую обмотку, намотанную на второй магнитный стержень и заканчивающуюся на первом конце первым выводом, а на втором конце вторым выводом;третью обмотку, намотанную на третий магнитный стержень и заканчивающуюся на первом конце первым выводом, а на втором конце вторым выводом;четвертую обмотку, сформированную из ближнего участка второго вывода первой обмотки, причем четвертая обмотка намотана на дальнюю часть второго вывода третьей обмотки;пятую обмотку, сформированную из ближнего участка второго вывода третьей обмотки, причем пятая обмотка намотана на дальнюю часть второго вывода первой обмотки.2. Многообмоточный дроссель по п.1, в котором дальняя часть второго вывода первой обмотки проходит через третью обмотку перед ...

УСТРОЙСТВО И СПОСОБ ЗАЩИТЫ ОТ ПЕРЕНАПРЯЖЕНИЙ

ЭЛЕМЕНТ ЗАЩИТЫ ОТ ПЕРЕНАПРЯЖЕНИЯ

... 1. Элемент защиты от перенапряжения с корпусом, с выводами (2, 3) для электрического подключения элемента (1) защиты от перенапряжения к подлежащей защите токо- или сигналопроводящей линии, с двумя расположенными внутри корпуса и включенными электрически параллельно варисторами (4, 5) и, по меньшей мере, с частично расположенным между варисторами (4, 5) центральным электродом (6), причем корпус имеет две состоящие из металла, электрически соединенные друг с другом половины (7, 8) корпуса, причем центральный электрод (6) изолирован от половин (7, 8) корпуса и своими противолежащими друг другу сторонами соответственно электрически соединен с первой присоединительной областью (9) варистора (4, 5), и, причем оба варистора (4, 5) и центральный электрод (6) расположены по типу сэндвича между обеими половинами (7, 8) корпуса,отличающийся тем, чтоодна половина (8) корпуса выполнена в виде крышки, которая имеет покровный участок (10) и утапливаемый участок (11) зацепления, причем в соединенном состоянии ...

СИСТЕМА КОНТРОЛЬНОГО УСТРОЙСТВА И ОГРАНИЧИТЕЛЯ ПЕРЕНАРЯЖЕНИЯ

ЦЕПЬ ИСКРОБЕЗОПАСНОГО ОГРАНИЧИВАЮЩЕГО НАПРЯЖЕНИЕ ПАРАЛЛЕЛЬНОГО СТАБИЛИЗАТОРА

Источник питания для электронной аппаратуры

Изобретение относится к электротехнике, в частности к устройствам питания для электронной аппаратуры, а именно к источникам питания для светодиодных светильников. Техническим результатом является защита электронной аппаратуры от продолжительного воздействия повышенного напряжения. Источник питания для электронной аппаратуры содержит плату, на которой установлен модуль защиты от продолжительного воздействия повышенного напряжения, состоящий из узла защиты от помех большой энергии, узла подавления электромагнитных помех, узла питания схемы анализа, а также схемы анализа и отключения нагрузки. 1 з.п. ф-лы, 5 ил.

Способ выявления и подавления феррорезонансных процессов в сетях средних классов напряжения

Изобретение относится к области электротехники и может быть использовано для выявления и борьбы с феррорезонансом в сетях переменного тока 6-35 кВ, работающих с изолированной и компенсированной нейтралью. Технический результат заключается в повышении быстродействия и точности идентификации феррорезонансных процессов в качестве исходной информации для управления регулируемым защитным резистором, вводимым в контур нулевой последовательности для надёжной ликвидации резонанса, достигается способом выявления и подавления феррорезонансных процессов в сетях средних классов напряжения, заключающимся в выявлении режима феррорезонанса и формировании сигнала для управления величиной регулируемого защитного резистора, согласно изобретению идентифицируют режим феррорезонанса по мгновенным значениям токов и напряжений в фазах и в контуре нулевой последовательности, реализуют получение фазовых характеристик сети для фаз и контура нулевой последовательности, определяют величину оптимального значения сопротивления ...

STEUERSCHALTKREIS FUER EINEN HEIZER

VERFAHREN UND EINRICHTUNG ZUM SCHÜTZEN EINES SCHALTERS, WIE Z. B. EINES MEMS-SCHALTERS. UND MEMS-SCHALTER MIT EINER SOLCHEN SCHUTZEINRICHTUNG

Es werden ein Verfahren und eine Einrichtung zum Schützen eines MEMS-Schalters bereitgestellt. Mit dem Verfahren und der Einrichtung wird die Integrität der MEMS-Schalter durch Verringern ihrer Anfälligkeit gegen einen Strom, der während des Schaltens des MEMS-Schalters zwischen Ein und Aus und umgekehrt durch diese fließt, verbessert. Die Schutzschaltung bietet einen parallelen Weg, der als Shunt bekannt ist, um die MEMS-Komponente herum. Komponenten innerhalb der Shuntschaltung können jedoch selbst aus dem Shunt entfernt werden, wenn sie nicht benötigt werden. Dadurch wird die elektrische Leistung des Shunts verbessert, wenn angenommen wird, dass sich der Schalter in einem Aus-Zustand befindet.

Device for protection from mains surges in a three-phase mains

The invention relates to a device (14) for protection from mains surges (U1, U2) in a three-phase mains (4), the device (14) consisting of three delta-connected active surge arrestors (16, 18, 20), the voltage-dependent fixed resistors (28, 30, 32) of which are connected to the three-phase mains (4) via thyristors (22, 24, 26) in the event of a surge (U1, U2), each thyristor drive (34, 36, 38) containing a series circuit comprising a diode (46, 48, 50), a voltage-controlled diode (52, 54, 56) and a gate resistor (58, 60, 62). According to the invention, the inputs (64, 66, 68) of the surge arrestors (16, 18, 20) are isolated from each other using isolating diodes (82, 84, 86) so that each isolating diode (82, 84, 86) is linked, on the anode side, to the input (64, 66, 68) of a first surge arrestor (16, 18, 20) and, on the cathode side, to an interconnection point (72, 74, 70) of the diode (48, 50, 46) and the voltage-controlled diode (54, 56, 52) of the thyristor drive (36, 38, 34) of a ...

Elektronische Sicherung für eine, an ein Niedervolt-Gleichspannungsnetz anschließbare Last

Die Erfindung betrifft eine elektronische Sicherung für eine, an einem Niedervolt-Gleichspannungsnetz anschließbare Last, bestehend aus zwischen Eingangsklemmen und der Last angeordneten Baugruppen, diese umfassend eine Spannungsüberwachungseinheit, eine Stromüberwachungseinheit sowie Halbleiterschalteinheiten und diesen zugeordnete Steuerungen. Erfindungsgemäß ist an den Eingangsklemmen eine Reihenschaltung aus einer TVS-Diode und einem Widerstand angeschlossen, wobei der Widerstand mit einem ersten Anschluss eines Mikrocontrollers in Verbindung steht und der resultierende Spannungsabfall am Widerstand bei überspannungsbedingtem Erreichen der Durchbruchspannung an der TVS-Diode dem Mikrocontroller ein Überspannungserkennungssignal liefert. Ein zweiter Anschluss des Mikrocontrollers steht mit einer ersten Halbleiterschalteinheit in Verbindung, wobei die erste Halbleiterschalteinheit als Längsschalter in Reihe zur Last liegt, wobei der Mikrocontroller die erste Halbleiterschalteinheit sperrt ...

Protection circuit against interference voltages - used on long distance cables, incorporates choke inserted into remote supply circuit

In order to suppress brief voltage surges in the cables, each remote supplied repeater (V) has a protection circuit which is free from self-inductance and which consists of the choke (Dr) in series with a diode or group of diodes D2 in the forward direction, and there is a further diode or group of diodes of opposite polarity which are connected in parallel with the choke (Dr). The diodes in each group are connected in series, and the inverse voltage or the sum of inverse voltages of diodes in parallel with the choke is greater than that of the other diodes.

Schaltungsanordnung zum Schutz vor energiereichen Überspannungen

Schaltungsanordnung zum Schutz von eλektronischen Schaltkreisen,Schaltungskomponenten, empfindlichen Verbrauchern vor energiereichen übersgannungen, welche beim Auftreten einer Überspannung, die über einem vorgegebenen Grenzwert (URef) liegt, einen ohnehin vorhandenen, leistungsstarken bzw. niederohmigen Verbraucher (VB) für eine Vorgegebene Zeitspanne oder für die Dauer der Überspannung einschaltet, dadurch gekennzeichnet,daß die Schaltungsanordnung ein Zeitglied (6) enthält, das beim Auftreten einer Überspannung den Verbraucher (VB) für eine σorgegebene, über die Dauer der Überspannung hinausgehende Zeitspanne einschaltet,wobei das Zeitglied in Form einer monostabilenKippstufe (6) realisiert ist und das Zeitglied (6) nur dann eingeschaltet wird, wenn das Auftreten der überspannung eine vorgegebene Mindestdauer überschreitet, und wobei dem Zeitglied(6) ein Verzögerungsglied (5) vorgeschaltet ist, das nur dann ein Signal abgibt,wenn die Überspannung die vorgegebene Mindestdauer überschreitet ...

Wechselrichteranordnung

Wechselrichteranordnung, mit: einem Wechselrichter (20), der einen Gleichstromeingang mit einem Gleichstrom-Pluspol und einem Gleichstrom-Minuspol aufweist; wenigstens zwei Gleichstromeingängen zum Anschließen der Wechselrichteranordnung (100) an Gleichstromquellen, wobei jeder der Gleichstromeingänge einen Gleichstrom-Pluspol und einen Gleichstrom-Minuspol aufweist; einer separaten Eingangssicherung (30) für jeden der Gleichstrompole eines jeden der wenigstens zwei Gleichstromeingänge der Wechselrichteranordnung, wobei jeder der Gleichstrom-Pluspole der wenigstens zwei Gleichstromeingänge der Wechselrichteranordnung an eine erste Klemme der entsprechenden separaten Eingangssicherung (30) angeschlossen ist, wobei eine zweite Klemme an den Gleichstrom-Pluspol des Gleichstromeingangs des Wechselrichters (20) angeschlossen ist, und wobei jeder der Gleichstrom-Minuspole der wenigstens zwei Gleichstromeingänge der Wechselrichteranordnung an eine erste Klemme der entsprechenden separaten Eingangssicherung ...

Halbleiter-Spannungsregler,vorzugsweise fuer einen Startergenerator

Electrical circuit with surge protection monitoring

An electrical circuit comprising a power supply, a load and a surge protection device adapted to protect said load and/or power supply from electrical fast transient events according to the requirements of IEC 61000-4-2 or 4 and which comprises a stress threshold, in which the electrical circuit further comprises a monitoring device adapted to monitor the current in said surge protection device and detect the breaching of said threshold by electrical fast transient events.

Overvoltage protection circuit, LED backlight drive circuit and liquid crystal display

Methods and apparatus for spurge protection of a distributed control system component

SOLID STATE STATION PROTECTOR DEVICE

A device for protecting electronic equipment from damaging surges of voltage and current uses two solid state bidirectional voltage sensitive switches 38, 40 coupled across the electronic equipment with a ground terminal 50 therebetween, and two pairs of parallel connected variable resistance members 52, 54, 56, 58 which vary their resistance in proportion to the applied current located in series in ring and tip connection lines. The elements 38, 40, 52, 54, 56, 58 are enclosed in a common sealed plastics housing (76), (78), (Figs. 3 to 5), and are connected to input and output terminal studs (68a) to (68d) via input and output contact members (64), (64a), (66), (66a), (Figs. 3, 6, 7, 8) having contact spring elements (94), (100). ...

Circuit arrangement for current limitation and for overvoltage protection

Methods, devices and systems for protecting RFID reader front ends

An RFID protection scheme includes monitoring an output signal of a least one receiver mixer of the reader, and, based at least in part on said monitoring, when said output signal exceeds a predetermined threshold, performing one or more of the following: removing an RF signal from a transmitter power amplifier (PA); removing a bias from the PA; causing a protection switch to divert transmitter power away from an antenna circuit; and signaling a processor to reduce transmitter power.

DC-DC converter

AUTOMATIC ICE MAKER OF REFRIGERATORS

In an automatic ice maker (7) of a refrigerator, water is supplied into an ice tray (14) disposed in an ice making compartment (4) of the refrigerator. The water in the ice tray (14) is frozen and then, the ice tray (14) is turned with a twisting motion by a drive mechanism (13) including a motor (10) so that ice cubes are removed from the ice tray (14). Vibration is applied to the ice tray (14) by an electromagnet excited by a pulse current during a water freezing step so that escape of air bubbles of the water is promoted. A cover (38) covers an upper open end of the ice tray (14) during the water surface side as compared with the ice tray bottom side. Alternatively, a heater (39) is employed for the cover (38). Gas form a storage compartment in the refrigerator may be guided into the space above the water in the ice tray to retard the freezing process in the top part of the ice tray. ...

A protection device using field effect transistors

Overvoltage protection for NFC devices

The present application relates to a near field communication (NFC) device (30, figure 1) which has an antenna (32, figure 1) for receiving NFC signals. The NFC device 30 includes a protection system 50 for protecting a transmit/receive system, and other systems, of the NFC device 30 from potentially damaging voltages that may develop at an output of the antenna 32 if the device 30 enters a strong magnetic field. The protection system 50 includes current control devices such as n-channel MOSFET devices 58, 60 that are operative to source or sink current depending upon the polarity of a signal at an output of the antenna 32, to generate a voltage which at least partially negates a positive or negative voltage at the output of the antenna, thereby reducing the peak voltage at the antenna output. The current control devices may be controlled by a servo loop 66, or by a plurality of diodes (82, figure 4). The protection system 50 may also serve as a load modulation circuit to control an antenna ...

Electrical circuit with surge protection monitoring

Varistor

System and method for limiting currents in a power distribution system

A TRANSIENT PROTECTION CIRCUIT

Improvements in or relating to a voltage limiting device

... 675,338. Valve limiting circuits. SMOOT, C. H. Oct. 2, 1950, No. 24023/50. Class 40 (vi). [Also in Group XXXV] An A.C. potential to be limited is applied over high resistor 14 to a bridge of rectifiers 17, 19 and resistors 18, 21, the bridge being biased from an A.C. source 22 feeding a potential divider 23 from which a suitable voltage is fed over rectifiers 25, 26 to the junctions of the rectifiers and resistors. Since the bias is A.C. the input is not distorted but only limited to the value set by voltmeter 27. In order to provide a minimum limit, an A.C. of opposite phase from the input and of greater amplitude than the limit set by the bias on the bridge is applied over transformer 30. This results in a small input A.C. having a large amplitude and vice versa, the resulting signal then being fed to a similar bridge to limit the maximum amplitude. An A.C. of the same phase as the input and same amplitude as that from transformer 30 is added to the A.C. limited by the second bridge over ...

Improvements in and relating to variable resistance shunts

... 309,514. Porter, G. L., and Ferranti, Ltd. Dec. 12, 1927. Sets of resistances; contacting-solid resistances.-Variable resistance shunts used across relays, &c. g, h, each comprise two parallel limbs a, b composed of metal rectifier units, the units in one limb being oppositely directed to those in the other. The variation in resistance of the unit is due to the property that for the direction of current corresponding to hard resistance, the resistance varies in an inverse manner with the current.

Over-Voltage Protection Circuit

... 1,163,795. Overvoltage protection. ASSOCIATED ELECTRICAL INDUSTRIES Ltd. 10 April, 1968 [2 June, 1967], No. 25479/67. Heading H2H. An overvoltage protection arrangement for a load L which may comprise semi-conductor devices comprises a fixed resistor R in series with a non-linear impedance M shunting the load L, a voltage breakdown device T being connected across the resistor R, the characteristic of the impedance M being such that as the voltage thereacross increases the impedance thereof decreases. Thus when the voltage between lines 1, 2 is excessive the voltage across the resistor reaches a value large enough to cause breakdown of the device T. The full-line voltage is then applied to the impedance M which then assumes a low-impedance state such that a lowresistance path is created which absorbs the overvoltage between the lines 1, 2. The device T may be an untriggered thyristor or bi-directional device such as a TRIAC. Alternatively a bridge circuit of thyristors or thyristors and ...

Method and device for surge protection of electric vehicle during charging

Active bleeder circuit

HIGH VOLTAGE LOAD SYSTEM MECHANISM OF TYPE OF DRYING AND PROCEDURE FOR THE PREVENTION OF A CHAIN SEPARATION/CARC DISCHARGE OF THE MECHANISM

SCHALTUNGSANORDNUNG ZUR UBERWACHUNG EINER MESSSPANNUNG

SCHALTUNGSANORDNUNG FUR DEN ANSCHLUSS EINES MIT ELEKTRONISCHEN BAUTEILEN BESTUCKTEN RUNDSTEUEREMPFANGERS AN EIN WECHSELSPANNUNGSNETZ

DECOUPLING MEMBER FOR OVERVOLTAGE PROTECTION CIRCUIT

MECHANISM FUR UBERSPANNUNGSSCHUTZ PREFERABLY A DIRECT STATIC FREQUENCY CHANGER IN THE ROTOR CIRCLE OF AN ASYNCHRONOUS MACHINE

POWER PACK FOR A SAFETY-RELEVANT CIRCUIT

INSTALLATION PROTECTIVE SWITCH

DREHSTROMSTELLER

A three-phase AC power controller has three strands, each having an input and an output. Five pairs of valves are connected antiparallel for rotating field reversal. The first input is connected to the first output by way of a first pair, the second input is connected to the second output by way of a second pair and to the third output by way of a third pair, and the third input is connected to the second output by way of a fourth pair and to the third output by way of a fifth pair. An RC half-branch is connected as a snubber circuit to each input and to each output. These RC half-branches are each interconnected via a transverse connection.

INSTALLATION PROTECTIVE SWITCH

SWITCHING CONFIGURATION FUR THE CONNECTION OF A WITH ELECTRONIC CONSTRUCTION UNITS BESTUCKTEN RUNDSTEUEREMPFANGERS TO AN ALTERNATING VOLTAGE SYSTEM

APPARATUS WITH SUPPRESSION OF TRANSIENT TENSIONS

Device for the operation of lighting means

Die erfindungsgemäße Vorrichtung ist für die Verwendung in Leuchten geeignet, die ein Betriebsgerät (3) für ein Leuchtmittel (2) und zumindest ein Leuchtmittel (2) umfassen. Das Leuchtmittel (2) zeigt mindestens eine Leuchtdiode (2.1) und weist zumindest einen Eingangsanschluss (7.2) zur Spannungsversorgung des Leuchtmittels (2) durch das Betriebsgerät (3) auf. Die erfindungsgemäße Vorrichtung zeichnet sich dadurch aus, dass sie ein mit dem zumindest einen Eingangsanschluss (7.2) des Leuchtmittels (2) elektrisch verbundenes Impedanzelement (8), bevorzugt eine Kapazität (9), umfasst und damit die Auswirkungen von eingangsseitigen Überspannungen auf das angeschlossene Leuchtmittel (2) reduziert und/oder vermeidet.

Protection circuit for operating equipment

Schutzschaltung (SS1), aufweisend wenigstens zwei Eingangsanschlüsse (E1, E2), über die die Schutzschaltung elektrisch mit einer AC-Spannung versorgbar ist, wenigstens eine Drossel (L1) mit wenigstens zwei Wicklungen (La, Lb), wobei die Eingangsanschlüsse (E1, E2) mit einer Eingangsseite der Drossel (L1) und jeweils einer der wenigstens zwei Wicklungen (La, Lb) verbunden sind, und wobei wenigstens eine der wenigstens zwei Wicklungen (La, Lb) der Drossel (L1) durch eine Serienschaltung eines spannungsabhängigen Widerstands (F02) und einer Funkenstrecke (F03) überbrückt ist.

LED-Modul, Leuchte und Verfahren zum Betreiben eines LED-Moduls

The invention relates to a LED module which comprises at least one light-emitting diode (25, 26), an input terminal (21) for coupling the LED module (20) to an operating device (10) and a controllable switching means (31) which is coupled to the input terminal (21) and the at least one light-emitting diode (25, 26). An overcurrent limitation can be realized and/or a glow of the at least one light-emitting diode (25, 26) can be suppressed by controlling the controllable switching means (31).

SWITCHING CONFIGURATION FOR THE OVERVOLTAGE PROTECTION OF INTERFACE CIRCUITS.

SWITCHING CONFIGURATION FOR UBERWACHUNG MEASURING VOLTAGE

MECHANISM FOR OVERVOLTAGE PROTECTION PREFERABLY A DIRECT STATIC FREQUENCY CHANGER IN THE ROTOR CIRCLE OF AN ASYNCHRONOUS MACHINE

DECOUPLING MEMBER FOR OVERVOLTAGE PROTECTION CIRCUIT

Protective circuit

Method and device to protect an ESP power supply from transient over-voltages on the power grid

A power supply converter unit is disclosed, in particular for an electrostatic precipitator, converting the frequency of alternating input supply (1) to high frequency alternating output (Ua, Ub) by rectifying the alternating input supply (1) in a rectifier (12) to a direct current (Udc), which is converted to alternating-current in a full bridge inverter (13) in a H-bridge circuit with switches (48) controlled by a control unit (23). According to the invention on the input side of the rectifier (12) and/or in the direct current (Udc) section there is provided at least one overvoltage protection circuitry (34, 35, 37-39, 45). Furthermore the invention discloses a method of operation of such a power supply converter unit as well as uses of such a power supply converter unit.

Circuits and methods for limiting open circuit voltage of photovoltaic strings

CIRCUITS AND METHODS FOR LIMITING OPEN CIRCUIT VOLTAGE OF PHOTOVOLTAIC STRINGS A photovoltaic string (100) comprising a plurality of serially connected solar cells (115) and positive lead (130) and a negative lead (131) on opposite ends of the photovoltaic string (100). One end of the plurality of serially connected solar cells (115) is connected to the positive lead (130) and an opposite end of the plurality of serially connected solar cells (115) is connected to the negative lead (131). An open circuit voltage limiter (120) is provided across a group of solar cells in the plurality of serially connected solar cells (115). The open circuit voltage limiter (100) has a positive terminal (122) connected to the negative lead (131) and a negative terminal (121) connected to a connection between adjacent solar cells in the plurality of solar cells (115). The open circuit voltage limiter (100) has a limiter voltage less than an open circuit voltage of the group of solar cells for current flowing ...

Destructive Electrostatic Discharge Damage Prevention of Garments

A method for the prevention of Destructive Electrostatic Discharge (DED) damage to outer garments caused by triboelectric charge discharging to the wearer's body through a distinct point of discharge at a conductor in contact with or close proximity to the wearer's skin wherein the method consists of interposing an insulating layer of high dielectric strength at the conductor such that the conductor is insulated from either the skin of the wearer or the outer garment and the circuit of triboelectric charge through the conductor is broken. FC-uQE *3 ...

A HEATER CONTROL CIRCUIT

TRANSIENT VOLTAGE SUPPRESSING CIRCUIT

ELECTRICAL DISTURBANCE PROTECTIVE DEVICE BETWEEN A TERMINAL AND A TELEPHONE LINE

SYSTEM FOR SUPPLYING ELECTRICAL POWER TO START VEHICLE ENGINES

A protection circuit for protecting an energy storage device includes a first circuit region between a first terminal of the energy storage device and a first connector node, a second circuit region between a second terminal of the energy storage device and a second connector node, a latching circuit to electrically couple the first connector node to the first terminal of the energy storage device when the latching circuit is in a closed configuration, and a contactor circuit electrically coupled to an operational switch of the latching circuit, the contactor circuit comprising a capacitor to store charge and a microcontroller to monitor an electrical property of the energy storage device to determine if a short circuit occurs and, if a short circuit does occur, cause the capacitor to discharge to the operational switch of the latching circuit to cause the latching circuit to transition to the open configuration.

OVERVOLTAGE PROTECTOR

The invention relates to an overvoltage protector (8) for protecting a device (4) to be protected, comprising a first terminal (12) and a second terminal (14). A number of strings (22) are connected in parallel to one another between the first terminal (12) and the second terminal (14), each string (22) having a resistor (26), and at least one of the strings (22) having a switch element (28) that is connected in series with the resistor (26) of the string (22). The invention also relates to a circuit (2) having an overvoltage protector (8), a use of an overvoltage protector (8), and a method (132) for operating an overvoltage protector (8).

ARRESTER TEMPERATURE MONITOR

An instrumented electric power arrester includes a temperature sensor, wireless transmitter, and a visual over-temperature indicator. A disk shaped module, a replacement varister block, or a dummy block containing the sensor/transmitter is placed between varister blocks inside the arrester housing. A strap-on module is attached to the outside of the arrester housing. The sensor/transmitter utilizes a harvesting power supply that draws electric power for the electronics from the power line protected by the arrester. An ambient temperature sensor may be utilized to enhance accuracy. The temperature sensor/transmitter typically sends arrester monitoring data wirelessly to an RTU or handheld unit located outside the arrester, which relays the monitoring data to an operations control center that scheduled replacement of the arrester based on the monitoring data. A surge counter keeps track of the number of equipment and lightening related temperature surges experienced by the arrester.

UNIVERSAL SURGE PROTECTOR FOR NOTEBOOK COMPUTERS

A surge protector for portable personal computers, or notebooks, of the shunting type, employs two differently rated metal oxide varistors in a manner enabling operation with several differently rated AC power services. The surge protector is designed to provide an optimum effective clamping voltage with a low let-through voltage.

SURGE PROTECTION CIRCUIT

There are provided circuits and methods for surge protection. For example, there is provided a clamp circuit for protecting a load against a surge. The clamp circuit can include a power dissipation circuit including at least one transistor and a resistor. The clamp circuit can further include a voltage sensitive device configured to cause a voltage limit across the load when the surge occurs. The power dissipation circuit can be configured to turn on the at least one transistor to dissipate power across one of the resistor and the at least one transistor.

Electric Service Safety Disconnect Apparatus with Overvoltage and Overcurrent Protection

AC VOLTAGE CLIPPER IN MOS-TECHNOLOGY

... 2101442 9222950 PCTABS00018 AC voltage clipper for an MOS-circuit having two input terminals (In1, In2) receiving an ac supply voltage, wherein one input terminal (In1) is connected to a point of common voltage through a first MOS-transistor (MCL41) and the other input terminal (In2) is connected to said point of common voltage through a second MOS-transistor (MCL42). The gates of MOS-transistors (MCL41, MCL42) are connected to each other and receive a gate voltage (Vg4) of a control circuit (MCL2, MCL3, DCL11, DCL12), in such a way that both transistors (MCL41, MCL42) will conduct when the absolute value of the ac supply voltage, being applied as an input signal to the control circuit (MCL2, MCL3, DCL11, DCL12) exceeds a predetermined threshold value.

IMPROVED TRANSIENT VOLTAGE SURGE SUPPRESSION AND ELECTRICAL NOISE ATTENUATION CIRCUIT

The invention is a combination of an altered AC to DC circuit utilized with typical power protection components for improved power protection purposes. More particularly, in accordance with the present invention there is provided a paral lel circuit to protect electrical and electronic equipment from transients from an electrica l system. The circuit comprises (a) first uni-directional diodes attached to line, neutral and/or ground connection of the electrical system; (b) a DC capacitor with a positive p ole being fed by said first uni-directional diodes; (c) uni-directional diodes attached an d feeding back to line, neutral and/or ground connection, and being fed from a negative pole of the DC capacitor; and (d) a discharge resistor in parallel with said DC capacitor.

Vorrichtung zum Schutze von Hochspannungswicklungen gegen durch Sprungwellen verursachte Überspannungen.

Verfahren zum Schutze elektrischer Anlagen gegen Überspannungen.

Dispositif pour la protection des réseaux à courants alternatifs contre les surtensions.

Schutzvorrichtung für elektrische Apparate.

Vorrichtung für die Spannungssicherung einer Übertragungsapparatur vor hohen Spitzenspannungen

Anordnung zum Schutz von Induktivitäten gegen Überspannungen

Uberspannungsableiter

Dispositif de protection contre les surtensions

Uberspannungsableiter

Verfahren und Vorrichtung zur Amplitudenbegrenzung von Wechselspannungen

Konstantstromgerät mit Spannungsbegrenzerschaltung

Uberspannungsableiter

Dispositif avertisseur de protection contre des surtensions pour appareils électro-ménagers bitension

Uberspannungsschutzeinrichtung

Uberspannungsableiter

SCHALTUNG ZUM SCHUTZ VON ELEKTRONISCHEN ENDVERSTAERKERN GEGEN UEBERSPANNUNGEN.

Einrichtung zum Schutz gegen Überspannungen in einer Motor-Antriebsanordnung

Uberspannungsschutzanordnung für elektrische Anlagen

Overvoltage arrester module with series-coupled spark gaps - has control spark gap with plate electrodes with differential field strength

The overvoltage arrester arrangement contains several spark gaps and a single control spark gap, containing plate electrodes with edges of such configuration that the electric field strength is smaller there than in the electrode centre. The space between the electrodes is surrounded by radio active radiation sources arranged approximately at the mid plane between the electrodes and concentrically to the electrode axis. Preferably the radiation sources are arragned in a ring, the sources being formed by a carbon, boron, or silicon isotope. The control spark gap may be immersed in a gas, such as nitrogen, hydrogen, or air which reduces its response voltage. the gas surrounding the spark gaps forms negative ions, e.g. sulphur hexafluoride.

Dispositif pour établir un chemin de faible résistance électrique à travers un gaz

Schaltung zur Begrenzung hoher Gleichspannungen

Dispositif pour la protection d'un appareil comportant au moins un élément semi-conducteur contre une surtension et/ou une surcharge

Электровоз переменного тока с асинхронными тяговыми двигателями

Полезная модель направлена на повышение защищенности тягового оборудования электровоза переменного тока с асинхронными тяговыми двигателями от бросков токов и напряжений, эксплуатационной надежности и безотказности электровоза. Указанный технический результат достигается тем, что в электровозе переменного тока с асинхронными тяговыми двигателями, состоящем из одной или более идентичных секций, каждая из которых содержащая тележки с интегрированным в них тяговым приводом с асинхронными электродвигателями, кузов, внутри которого размещены тяговые трансформаторы, тяговые преобразователи, электрическая аппаратура, силовые цепи, а на крыше кузова - токоприемник, главный выключатель, ограничитель грозовых и коммутационных перенапряжений в цепи токоприемника, после главного выключателями параллельно к тяговым трансформаторам дополнительно подключен ограничитель коммутационных перенапряжений. При этом ограничитель коммутационных перенапряжений размещен в машинном отделении секции электровоза, в защитной оболочке. Функцию защитной оболочки выполняет один из шкафов машинного отделения секции электровоза. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 179 025 U1 (51) МПК B60L 9/28 (2006.01) B61C 3/00 (2006.01) H02H 9/04 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (52) СПК B60L 9/28 (2017.08); B61C 3/00 (2017.08); H02H 9/046 (2017.08); B60L 2200/26 (2017.08) (21)(22) Заявка: 2017120426, 09.06.2017 (24) Дата начала отсчета срока действия патента: Дата регистрации: (73) Патентообладатель(и): Общество с ограниченной ответственностью "Уральские локомотивы" (RU) 25.04.2018 (56) Список документов, цитированных в отчете о поиске: RU 127017 U1, 20.04.2013. RU (45) Опубликовано: 25.04.2018 Бюл. № 12 1 7 9 0 2 5 R U 2351484 C1, 10.04.2009. RU 2565634 C1, 20.10.2015. EP 2848452 A2, 18.03.2015. (54) ЭЛЕКТРОВОЗ ПЕРЕМЕННОГО ТОКА С АСИНХРОННЫМИ ТЯГОВЫМИ ДВИГАТЕЛЯМИ (57) Реферат: Полезная модель направлена на повышение преобразователи, ...

Электровоз переменного тока с асинхронными тяговыми двигателями

Полезная модель направлена на повышение защищенности тягового оборудования электровоза переменного тока с асинхронными тяговыми двигателями от бросков токов и напряжений, эксплуатационной надежности и безотказности электровоза. Указанный технический результат достигается тем, что в электровозе переменного тока с асинхронными тяговыми двигателями, состоящем из одной секции, которая содержит тележки с интегрированным в них тяговым приводом с асинхронными электродвигателями, кузов, внутри которого размещены тяговые трансформаторы, тяговые преобразователи, электрическая аппаратура, силовые цепи, а на крыше кузова - токоприемники, главный выключатель, ограничитель грозовых и коммутационных перенапряжений в цепи токоприемника, после главного выключателями параллельно к тяговым трансформаторам дополнительно подключен ограничитель коммутационных перенапряжений. При этом ограничитель коммутационных перенапряжений размещен в машинном отделении секции электровоза, в защитной оболочке. Функцию защитной оболочки выполняет один из шкафов машинного отделения секции электровоза. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 181 752 U1 (51) МПК B61C 3/00 (2006.01) B60L 9/28 (2006.01) H02H 9/04 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (52) СПК B61C 3/00 (2006.01); B60L 9/28 (2006.01); H02H 9/04 (2006.01) (21)(22) Заявка: 2018105212, 12.02.2018 (24) Дата начала отсчета срока действия патента: Дата регистрации: 26.07.2018 09.06.2017 (56) Список документов, цитированных в отчете о поиске: RU 127017 U1, 20.04.2013. RU 2379202 C2, 20.01.2010. RU 2422299 C1, 27.06.2011. WO 96/09675 A1, 28.03.1996. (45) Опубликовано: 26.07.2018 Бюл. № 21 1 8 1 7 5 2 R U (54) ЭЛЕКТРОВОЗ ПЕРЕМЕННОГО ТОКА С АСИНХРОННЫМИ ТЯГОВЫМИ ДВИГАТЕЛЯМИ (57) Реферат: Полезная модель направлена на повышение аппаратура, силовые цепи, а на крыше кузова защищенности тягового оборудования токоприемники, главный выключатель, электровоза переменного тока с асинхронными ...

Secondary ESD Circuit

An integrated circuit device provides electrostatic discharge (ESD) protection, as may be applicable to circuits susceptible to ESD in conjunction with, or prior to, activation of a primary ESD circuit for dissipating an ESD. In connection with various example embodiments, primary and secondary ESD circuits discharge electrostatic pulses as may be present at a power input pad, with the secondary ESD circuit separated from the input pad by an impedance circuit. The secondary ESD circuit is configured to actively mitigate an electrostatic pulse present in conjunction with, or before, the activation of the primary ESD circuit, in response to an input voltage level achieving a threshold level. In some implementations, the secondary ESD circuit activates to mitigate some or all of the presentation of an electrostatic pulse to a circuit that competes with the primary ESD circuit, for drawing charge from a common node (e.g., a power supply pad).

Voltage clamp circuit and integrated circuit incorporating same

A voltage clamp circuit includes a power supply, a first element connected with the power supply to output a constant current, a third element configured to allow a current to pass through when a voltage of a predetermined value or more is applied; and a second element configured to output a voltage according to a voltage generated by the first and third elements.

Distributed maximum power point tracking system, structure and process

Distributed maximum power point tracking systems, structures, and processes are provided for power generation structures, such as for but not limited to a solar panel arrays. In an exemplary solar panel string structure, distributed maximum power point tracking (DMPPT) modules are provided, such as integrated into or retrofitted for each solar panel. The DMPPT modules provide panel level control for startup, operation, monitoring, and shutdown, and further provide flexible design and operation for strings of multiple panels. The strings are typically linked in parallel to a combiner box, and is then toward and enhanced inverter module, which is typically connected to a power grid. Enhanced inverters are controllable either locally or remotely, wherein system status is readily determined, and operation of one or more sections of the system are readily controlled. The system provides increased operation time, and increased power production and efficiency, over a wide range of operating conditions.

Low Voltage Electrostatic Discharge Protection

A protection circuit for protecting components from an electrostatic discharge at a node in an integrated circuit having a first set of electronic components of a first voltage sensitivity, the protection circuit comprising: detection circuitry arranged to detect an electrostatic discharge at the node; a first switching device connected between the first set of components and the node; and a second switching device connected between the node and ground; wherein, when an electrostatic discharge is detected at the node, the first switching device is configured to isolate the first set of components from the node and the second switching device is configured to provide a current path from said node to ground.

Electrostatic discharge protection circuit

An electrostatic discharge protection circuit includes a diode chain coupled between a power supply voltage end and a control node, a control voltage generator configured to generate a control voltage in response to a first current flowing through the diode chain, and a discharger configured to discharge a second current from the power supply voltage end to a ground voltage end in response to the control voltage, wherein the diode chain includes a plurality of P-well regions formed in an N-well region, diodes formed in the respective P-well regions, and a resistor coupled between the diodes.

Circuit arrangement for a control device

The invention relates to a circuit arrangement ( 10 ) for a control device, and a method for operating said circuit arrangement ( 10 ). The circuit arrangement ( 10 ) comprises a first field-effect transistor ( 12 ) actuating the control device, and a comparator, which compares the voltage provided for actuating the control device with a threshold voltage, and which actuates a timed operation of the first field-effect transistor ( 12 ) via a control unit ( 20 ) if the threshold voltage is exceeded.

Overvoltage Protection for Inverters that Comprise an EMC Filter at Their Input End

In an overvoltage protection apparatus before an inverter configured to feed electric energy from a DC voltage source into an AC power grid, the overvoltage protection apparatus includes a DC voltage input stage. The DC voltage input stage includes, at least two current-carrying lines and an EMC filter including interference suppressing capacitors and interference suppressing inductors, and surge arrestors configured to divert overvoltages with respect to ground are connected to the current-carrying lines after the EMC filter, from a point of view of the DC voltage source.

TBF Compatible with Input Power Including GFCI

A protective circuit having hot, neutral, and ground leads arranged to be placed between corresponding hot, neutral, and ground leads of a power utility outlet and corresponding hot, neutral, and ground leads of electrical apparatus.

Semiconductor ESD Circuit and Method

In an embodiment, an electrostatic discharge (ESD) circuit for providing protection between a first node and a second node includes a first MOS device having a first source/drain coupled to a first node, and a second source/drain coupled to an intermediate node. The ESD circuit also includes a first capacitor coupled between a gate of the first MOS device and the first node, a first resistor coupled between the gate of the first MOS device the intermediate node, a second MOS device having a first source/drain coupled to the intermediate node, and a second source/drain coupled to the second node, a second capacitor coupled between a gate of the second MOS device and the first node, and a second resistor coupled between the gate of the second MOS device and the second node.

Semiconductor module and system including the same

A semiconductor module includes a printed circuit board, at least one on-board device unit coupled between at least one voltage line and a power line. The at least on-board device unit is mounted on the printed circuit board. At least one electrostatic discharge protection circuit unit, configured to protect the at least one on-board device unit from an electrostatic discharge that occurs in the at least one voltage line, is coupled to the at least one voltage line.

Esd protection against charge coupling

This document discusses among other things apparatus and methods for reducing ESD damage to buffer circuits. In an example, an output buffer can include an output, a first transistor configured to couple the output to a high logic supply rail, a second transistor configured to couple the output node to a low logic supply rail, pre-driver logic configured to drive a gate of the first transistor and a gate of the second transistor, and a first resistor configured to reduce electrostatic discharge (ESD) induced current between the first transistor and the pre-driver logic.

Led driving circuit and short-circuit protection circuit

An LED driving circuit, adapted to drive an LED module, is disclosed. The LED driving circuit comprises a converting circuit, a converting controller, and a short-circuit protection circuit. The converting circuit, having a capacitor coupled to the LED module, is coupled to an input power source to proceed converting operation to supply an output current for driving the LED module. The converting controller controls the converting circuit to provide a stable current flowing through the LED module. The short-circuit protection circuit is coupled to the LED module in series and cuts the current flowing through the LED module off when detecting that the current higher than a current protection value.

Semiconductor integrated circuit

According to one embodiment, a first electrostatic protection circuit is connected between a first power supply wire and a second power supply wire, a second electrostatic protection circuit is connected between the first power supply wire and a third power supply wire, a first transistor is connected between the second power supply wire and the third power supply wire, a gate control circuit controls a gate potential of the first transistor based on a detection result of a second voltage, a second transistor is connected between the third power supply wire and a gate of the first transistor, and an abnormal voltage detection circuit controls on and off of the second transistor based on a detection result of a third voltage.

Electrostatic discharge protection circuit for compound semiconductor devices and circuits

An apparatus and method is disclosed for providing an electrostatic discharge protection circuit for compound semiconductor devices and circuits. The electrostatic discharge protection circuit comprises a first terminal and a second terminal. The electrostatic discharge protection circuit further comprises a transistor shunt element that is operably coupled between the first terminal and the second terminal; the transistor shunt element is capable of providing a bi-directional discharge path between the first terminal and the second terminal. The electrostatic discharge protection circuit further comprises a shut-off element that is operably coupled with the second terminal; the shut-off element is capable of keeping the transistor shunt element turned-off.

Esd protection device

An electrostatic discharge (ESD) protection device for protecting an I/O port of an electronic circuit from overvoltage and a coil structure for use in an ESD protection device. The ESD protection device includes: a plurality of inductors that are serially coupled in a line, where a node is formed between two neighboring inductors; and a plurality of protection arrangements adapted to conduct charges to one provided potential when an overvoltage is applied, where each of the protection arrangements is connected with one of the nodes, and where the serially coupled inductors are magnetically coupled with each other.

Static surge protection device

A surge protection device that includes varistors to absorb surge currents and protect a load from an overvoltage condition. The surge protection device includes a combination of switching elements and diodes. The surge protection device includes a basic cell design that can be easily adapted for higher voltage applications and/or higher discharge current applications and/or higher energy applications by parallel and/or series combinations of the basic cell design. Operation of the device minimizes fatigue to the varistors, thereby extending their useful life. The surge protection device achieves a better ratio of MOV clamping voltage rating versus MOV maximum continuous AC voltage rating, as compared with a conventional MOV installed alone.

Driver circuit, method of manufacturing the driver circuit, and display device including the driver circuit

Provided are a driver circuit which suppresses damage of a semiconductor element due to ESD in a manufacturing process, a method of manufacturing the driver circuit. Further provided are a driver circuit provided with a protection circuit with low leakage current, and a method of manufacturing the driver circuit. By providing a protection circuit in a driver circuit to be electrically connected to a semiconductor element in the driver circuit, and by forming, at the same time, a transistor which serves as the semiconductor element in the driver circuit and a transistor included in the protection circuit in the driver circuit, damage of the semiconductor element due to ESD is suppressed in the process of manufacturing the driver circuit. Further, by using an oxide semiconductor film for the transistor included in the protection circuit in the driver circuit, leakage current in the protection circuit is reduced.

Systems and methods for grounding power line sections to clear faults

Systems and methods for dynamically clearing faults in a power transmission line involve automatically terminating ends of a section of the power line while preserving electrical and/or physical continuity of the power line. The terminating of the ends is reversed at about voltage zero-crossings in the power line to clear a fault.

RC Triggered ESD Protection Device

An RC triggered ESD protection device comprises a discharge transistor, a driver circuit and a trigger circuit. The trigger circuit comprises a plurality of native NMOS transistors connected in parallel with a plurality of PMOS transistors operating as resistors. The relatively small resistance of the plurality of native NMOS transistors helps to keep a stable RC time constant value so that the ESD protection device can avoid a leakage current during a power up operation.

Power supply and data signal interface circuit with overvoltage protection

A data processing device with a power supply and data signal interface circuit has a switch for connecting an external line and an internal node. The power supply and data signal interface circuit also includes a controller for applying an enabling voltage to the switch enabling the switch to supply current between the external line and the internal node in the presence of power supply to the controller and in the absence of the overvoltage condition on the external line. The power supply and data signal interface circuit also includes a voltage reduction connection from the external line for applying a control voltage to the switch in the absence of power supply to the controller. The control voltage from the voltage reduction connection limits a voltage applied to the internal node through the switch in the presence of the overvoltage condition.

Combination esd protection circuits and methods

Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. In an example method, a thyristor is triggered to conduct current from a signal node to a reference voltage node using leakage currents provided by a transistor formed in a semiconductor doped well shared with the base of the thyristor. The leakage currents are responsive to a noise event (e.g., electrostatic discharge (ESD) event) at the signal node, and increase the voltage of the semiconductor doped well to forward bias the base and the collector of the thyristor. The triggered thyristor conducts the current resulting from the ESD event to the reference voltage node.

Electrostatic discharge protection circuit and electrostatic discharge protection method

An ESD protection circuit and method for its use are provided. The circuit comprising: a discharge path formed by first and second NMOS transistors which are sequentially connected between a ground and a power supply; an ESD event detection unit; first and second drive units respectively connected between an output of the ESD event detection unit and a gate of the first transistor and between the output of the ESD event detection unit and a gate of the second transistor. The first and second drive units respectively cause the first and second transistors to be turned on during an ESD event and to be turned off when there is no ESD event.

Voltage Surge and Overvoltage Protection Using Prestored Voltage-Time Profiles

Disclosed are various embodiments of voltage protectors that include a first voltage clamping device configured to clamp a voltage of an input power applied to an electrical load, and a second voltage clamping device configured to clamp the voltage applied to the electrical load. A series inductance separates the first and second voltage clamping devices. Also, a switching element is employed to selectively establish a direct coupling of the input power to the electrical load, where a circuit is employed to control the operation of the switching element. 135-. (canceled)36. A system , comprising:at least one first voltage clamping device configured to clamp a voltage of an input power voltage applied to an electrical load;at least one second voltage clamping device configured to clamp the voltage applied to the electrical load;an inductance arranged between the first and second voltage clamping devices;a switching element employed to selectively establish a coupling of the input power voltage to the electrical load; anda processor circuit that controls the operation of the switching element, the processor circuit operative to:store a plurality of predefined voltage-time thresholds in a memory;monitor the input power voltage to identify an overvoltage experienced in the power voltage among the first clamping device and the second clamping device; andtime a duration of the overvoltage by controlling the switching element to selectively establish a coupling of the input power voltage to the electrical load such that, when the input power voltage experiences an overvoltage that extends beyond one or more of the voltage-time thresholds, the processor circuit manipulates the switching element to at least partially isolate the electrical load and the second voltage clamping device from the power voltage until the overvoltage has abated.37. The system of claim 36 , wherein the at least one first voltage clamping device comprises a metal-oxide varistor.38. The system of ...

ESD Protection for FinFETs

An embodiment is a semiconductor device comprising a receiver circuit comprising fin field effect transistors (FinFETs), a transceiver circuit comprising FinFETs, and a transmit bus electrically coupling the receiver circuit and the transceiver circuit, wherein the receiver circuit and the transceiver circuit each further comprises an electrostatic discharge protection circuit comprising planar transistors electrically coupled to the transmit bus. Other embodiments may further comprise a power clamp electrically coupling a first power bus and a first ground bus, a power clamp electrically coupling a second power bus and a second ground bus, or at least two diodes electrically cross-coupling the first ground bus and the second ground bus. Also, the planar transistors of the transceiver circuit and the receiver circuit may each comprise a planar PMOS transistor and a planar NMOS transistor. 1. A method comprising:receiving a charge in a first circuit, the first circuit comprising first operational circuitry and first protection circuitry, the first operational circuitry comprising a first fin field effect transistor (FinFET), the first protection circuitry comprising a first planar transistor;passing a first current through the first planar transistor, the first current resulting from the charge that was received in the first circuit;passing the first current through a transmit bus, the transmit bus being electrically coupled to a second circuit, the second circuit comprising second operational circuitry and second protection circuitry, the second protection circuitry comprising a second planar transistor;passing the first current through the second planar transistor; anddischarging the first current through a contact electrically coupled to the second circuitry.2. The method of claim 1 , wherein the first circuit comprises a transceiver circuit.3. The method of claim 1 , wherein the first circuit comprises a receiver circuit.4. The method of claim 1 , wherein the ...

HIGH-FREQUENCY MODULE

A high-frequency module includes an inductor and an ESD protection element. The inductor is a circuit element defining a low pass filter, and includes parasitic capacitance between a signal line and a ground in a specific frequency band. The ESD protection element transfers a surge current flowing through a signal line to the ground, includes a capacitor in a specific frequency band, and has a configuration in which the capacitor and the parasitic capacitance of the inductor are connected in parallel. 1. A high-frequency module comprising:a signal selection circuit arranged to select a specific communication signal from a plurality of communication signals propagating through an antenna; andan ESD protection element; whereinthe signal selection circuit is located between a signal line through which the specific communication signal flows and a ground, and includes a circuit element including a capacitance component in a frequency band of the specific communication signal; andthe ESD protection element includes a capacitance component in the frequency band of the specific communication signal; whereinthe capacitance component of the ESD protection element and the capacitance component of the circuit element are connected in parallel in an equivalent circuit in the frequency band of the specific communication signal.2. The high-frequency module according to claim 1 , wherein the circuit element is a capacitor connected between the signal line and the ground.3. The high-frequency module according to claim 2 , wherein the signal selection circuit includes a low pass filter claim 2 , and the capacitor and the ESD protection element are connected in parallel to a terminal of the low pass filter that is different from a terminal thereof connected to the antenna.4. The high-frequency module according to claim 1 , wherein the circuit element is a strip line or a microstrip line defined by the signal line and a ground facing the signal line through a dielectric layer.5. The ...

OVERVOLTAGE PROTECTION COMPONENT, AND OVERVOLTAGE PROTECTION MATERIAL FOR OVERVOLTAGE PROTECTION COMPONENT

An overvoltage protector includes a first discharging electrode, a second discharging electrode, and an overvoltage protection part provided between the first and second discharging electrodes. The overvoltage protecting part has an insulating property under a normal operation condition, and has a conductive property if an overvoltage is applied between the first and second discharging electrodes. The overvoltage protecting part is made of a mixture of resin having an insulation property, an inorganic compound having an insulating property, and metallic boride compound powder. The metallic boride compound powder has a high melting point therefore it is hardly melted. Under high temperatures causing the powder to melt, the powder is oxidized and loses conductivity, thus providing a high reliability. 1. An overvoltage protector comprising:a first discharging electrode;a second discharging electrode; andan overvoltage protection part provided between the first discharging electrode and the second discharging electrode,wherein the overvoltage protecting part has an insulating property under a normal operation condition where a voltage not higher than a predetermined voltage is applied between the first discharging electrode and the second discharging electrode, and has a conductive property if an overvoltage higher than the predetermined voltage is applied between the first discharging electrode and the second discharging electrode,wherein the overvoltage protecting part is made of a mixture of resin having an insulation property, an inorganic compound having an insulating property, and metallic boride compound powder,wherein an average particle diameter of the metallic boride compound powder ranges from 0.5 μm to 3 μm.2. The overvoltage protector according to . claim 1 , wherein the metallic boride compound powder contains at least one of TiB claim 1 , ZrB claim 1 , and LaB.3. The overvoltage protector according to claim 2 , wherein both the first discharging electrode ...

Aggregation enclosure for elevated, outdoor locations

Certain types of aggregation enclosures include cable input ports and downwardly angled cable output ports. A cover is pivotally coupled to the body so that the cover moves between an open position and a closed position. A modular component panel may be disposed within the enclosure. The component panel includes one or more distribution components (e.g., fiber distribution components or power distribution components) configured to connect at least a portion of an incoming cable to at least a portion of an outgoing cable.

Electrical surge protector and method of providing the same

Some embodiments include an electrical surge protector. Other embodiments of related systems and methods are also disclosed.

ELECTROSTATIC DISCHARGE CLAMP WITH CONTROLLED HYSTERESIS INCLUDING SELECTABLE TURN ON AND TURN OFF THRESHOLD VOLTAGES

An electrostatic discharge (ESD) clamp for coupling between first and second nodes for providing ESD protection including first and second voltage threshold circuits. The clamp circuit limits operating voltage between the first and second nodes to a maximum level when activated. The first and second voltage threshold circuits each have a selectable threshold voltage, such as by coupling one or more voltage threshold devices in series. The first and second voltage threshold circuits trigger to turn on the clamp circuit when the operating voltage increases above a first voltage threshold. The voltage threshold circuits are turned off to turn off the clamp circuit when the operating voltage decreases to the second threshold voltage. The second threshold voltage may be selected at any level above the nominal operating voltage to prevent the clamp from latching. 1. An electrostatic discharge clamp for coupling between first and second power rails , comprising:first, second, third, and fourth nodes;a first resistive device having a first terminal for coupling to the first power rail and having a second terminal coupled to said first node;a second resistive device having a first terminal coupled to said second node and having a second terminal for coupling to the second power rail;a third resistive device coupled between said third and fourth nodes;a first transistor having a first current terminal coupled to said first terminal of said first resistive device, having a control terminal coupled to said first node, and having a second current terminal coupled to said second node;a second transistor having a control terminal coupled to said second node, having a first current terminal coupled to said third node, and having a second current terminal coupled to said second terminal of said second resistive device;a third transistor having a control terminal coupled to said fourth node, having a first current terminal coupled to said first node, and having a second current ...

Fully isolated coaxial surge protector

A protective device for a coaxial cable system including a first interface pin and a second interface pin positioned in axial relationship along a longitudinal axis with the first interface pin such that a dielectric gap is formed between the first and second interface pins, the dielectric gap being configured to couple radio frequency signals across the dielectric gap and block low frequency electrical current across the dielectric gap. A housing positioned in an axially surrounding relation to the first interface pin and an outer conductor interface positioned in axial relationship to the housing such that a coupling gap is formed between outer conductor interface and the housing, the coupling gap configured to couple radio frequency signals across the coupling gap and block low frequency electrical current across the coupling gap.

OVERVOLTAGE PROTECTION ELEMENT

An overvoltage protection element is disclosed that includes a housing, connections for electrically connecting the overvoltage protection element to a current path or a signal path to be protected The overvoltage protection element further includes two varistors arranged inside the housing and electrically connected in parallel, and a center electrode arranged at least partially between the varistors. The housing has two housing halves made of metal and electrically connected to each other, wherein the center electrode is isolated from the housing halves and is electrically connected at the opposite sides of the electrode to a first connection area of a varistor and wherein the two varistors and the center electrode are sandwiched between the two housing halves. One housing half is designed as a cover, which has a covering section and a recessed engagement section. In the installed states of the two housing halves, the engagement section engages in the corresponding receiving space formed by the other housing half and the covering section covers the receiving space, and in that the two housing halves are connected to each other such that in the installed state a visible gap is present between the two housing halves. 122-. (canceled)23. An overvoltage protection element comprising:a housing;terminals electrically connecting the overvoltage protection element to a current path or a signal path to be protected;two varistors connected electrically in parallel and located within the housing; anda middle electrode located between the varistors, wherein:the housing comprises two metal housing halves electrically connected to one another;the middle electrode is electrically insulated from the housing halves;each of opposite sides of the middle electrode is electrically connected to a respective first connecting region of each of the two varistors, the two varistors and the middle electrode are sandwiched between the housing halves;a first one of the housing halves is a ...

ESD Protection Circuit

Disclosed is a circuit () comprising a transistor () coupled between a supply voltage line () and ground (), the transistor comprising a control terminal coupled to a input signal line (), the circuit further comprising first and second bipolar transistors () coupled in series between the input signal line () and ground (), wherein the base of the first bipolar transistor is connected to the input signal line and the base of the second bipolar transistor is connected to ground. 1. Circuit comprising:a transistor coupled between a supply voltage line and ground, the transistor comprising a control terminal coupled to an input signal line, andfirst and second bipolar transistors coupled in series between the input signal line and ground, the first bipolar transistor having a base and the second bipolar transistor having a basewherein the base of the first bipolar transistor is connected to the input signal line and the base of the second bipolar transistor is connected to ground.2. The circuit of claim 1 , wherein the base of the first bipolar transistor is connected to the input signal line via a first resistor and the base of the second bipolar transistor is connected to ground via a second resistor.3. The circuit of claim 1 , wherein the first and second bipolar transistors share an N-region.4. The circuit of claim 1 , further comprising:first and second MOS transistors coupled in series between the input signal line and ground, the first MOS transistor having a gate and the second MOS transistor having a gate,wherein the gate of the first MOS transistor is connected to the input signal line and the gate of the second MOS transistor is connected to ground, and wherein a node between the first bipolar transistor and the second bipolar transistor is connected to a node between the first MOS transistor and the second MOS transistor.5. The circuit of claim 4 , wherein said MOS transistors are LDMOS transistors.6. The circuit of claim 1 , wherein the transistor is an ...

SURGE PROTECTION

A victim unit (310, 410) connectable to a surge protective device (300, 400) via an alternating current system or a direct current system, the victim unit (310) comprises at least one victim unit sensor (313314315) adapted to measure at least one status parameter at the victim unit (310, 410) and a controller (312) operatively connected to the at least one victim unit sensor (313314315). The controller (312) is capable of initiating a voltage limitation of the victim unit (310) by controlling the surge protective device (300, 400) if one or more of the at least one status parameters indicates that the victim unit (310) has reached a critical state. 1. A victim unit connectable to a surge protective device via an alternating current system or a direct current system , the victim unit comprising:at least one victim unit sensor adapted to measure at least one status parameter at said victim unit and a controller operatively connected to said at least one victim unit sensor, wherein said controller is capable of initiating a voltage limitation of said victim unit by controlling said surge protective device if one or more of said at least one status parameters indicates that said victim unit has reached a critical state.2. A victim unit according to claim 1 , wherein said controller is adapted to determine that said victim unit has reached a critical state if one or more of said at least one measured status parameter is above a respective first threshold value.3. A victim unit according to claim 2 , wherein said controller is further adapted to control said surge protective device via an external trig signal provided to said surge protective device if said at least one status parameter is above said respective first threshold value.4. A victim unit according to claim 3 , wherein the victim unit is further connectable to at least one additional surge protective device claim 3 , wherein said controller is further adapted to control each connected surge protective device by ...

Electrostatic discharge protection for electrical components, devices including such protection and methods for making the same

Systems and methods for protecting electrical components such as light emitting diodes are described. In some embodiments, electrical components are protected from high level electrostatic discharge (“ESD”) events by a circuit board that provides an intrinsic level of ESD protection. At the same time, such electrical components are protected against low level ESD events by one or more diodes that are electrically coupled thereto. The one or more diodes may be thin film diodes comprising at least one layer of p-type semiconductive material and at least one layer of n-type semiconductive material. Devices including ESD protection and methods for manufacturing such devices are also described.

DRIVING CIRCUITS WITH POWER MOS BREAKDOWN PROTECTION AND DRIVING METHODS THEREOF

A driving circuit is provided. The driving circuit is capable of driving a load coupled to an output node of the driving circuit. The driving circuit includes an output-stage element, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a first P-type metal-oxide-semiconductor (PMOS) transistor. The output-stage element is coupled between an operation voltage source and the output node. The first NMOS transistor has a gate, a drain coupled to the output node, and a source coupled to a ground. The first PMOS transistor has a gate, a drain coupled to the ground, and a source coupled to the output node. When the first NMOS transistor begins to be turned off, the first PMOS transistor is turned on, and a voltage at the drain of the first NMOS transistor is clamped to be lower than a breakdown trigger voltage of the first NMOS transistor. 1. A driving circuit for driving a load coupled to an output node of the driving circuit , comprising:an output-stage element coupled between an operation voltage source and the output node;a first N-type metal-oxide-semiconductor (NMOS) transistor having a gate, a drain coupled to the output node, and a source coupled to a ground; anda first P-type metal-oxide-semiconductor (PMOS) transistor having a gate, a drain coupled to the ground, and a source coupled to the output node.2. The driving circuit as claimed in claim 1 , wherein when the first NMOS transistor begins to be turned off claim 1 , the first PMOS transistor is turned on claim 1 , and a voltage at the drain of the first NMOS transistor is clamped to be lower than a breakdown trigger voltage of the first NMOS transistor.3. The driving circuit as claimed in claim 1 ,wherein the first NMOS transistor is controlled according to a first driving signal, and the gate of first PMOS transistor receives a control signal,wherein at a first time point, the first driving signal switches from a first high voltage level to a first low voltage level for turning off the first NMOS ...

Serial surge suppression and overload protection optimization device

A serial surge suppression and overload protection optimization device has an input terminal, an output terminal and multiple surge suppression units. The surge suppression units are serially connected between the input terminal and the output terminal. Each surge suppression unit has two parallel inductors and multiple surge absorbing elements. Each surge absorbing element is connected to an output end of one of the parallel inductors and has a fuse serially connected therewith. When surge energy is excessively large, the fuse melts to separate the surge absorbing element from a main power loop without causing a short circuit within the main power loop due to the meltdown of the fuse. The optimization device is used with an automatic overload protection unit to normally supply power to equipment connected to the output terminal thereof and ensure electrical safety protection with a bypass circuit design thereof.

Electrostatic discharge protection apparatus and method therefor

An electrostatic discharge (ESD) protection apparatus includes a clamp circuit, a detection circuit and a control circuit. The clamp circuit has a first terminal and a second terminal respectively coupled to a first rail line and a second rail line. In response to an ESD event, the clamp circuit generates a first coupling potential at its coupling terminal. The detection circuit, coupled to the coupling terminal of the clamp circuit and the second rail line, outputs a detection signal in response to the first coupling potential. The control circuit, coupled to the first and second rail lines, the detection circuit and the clamp circuit, outputs a conduction signal to a control terminal of the clamp circuit in response to the detection signal. The clamp circuit is conducted in response to the conduction signal so that ESD between the first and second rail lines is performed through the clamp circuit.

Power supply system, image forming apparatus having the same, and low-capacity ac processing circuit

A power supply system includes: a switching power supply to be connected to an AC power supply, the switching power supply rectifying and smoothing an AC voltage to generate predetermined DC voltage; a first capacitor including a first electrode connected to one end of the AC power supply, and a second electrode; a second capacitor including a first electrode connected to the other end of the AC power supply, and a second electrode; a surge-voltage suppressing circuit connected between the second electrode of the first capacitor and the second electrode of the second capacitor; a rectifier circuit connected to a first contact node between the first capacitor and the surge-voltage suppressing circuit and a second contact node between the second capacitor and the surge-voltage suppressing circuit; and an output-signal generating circuit connected to the rectifier circuit, and uses the rectified current to generate a predetermined output signal.

OVERVOLTAGE PROTECTION FOR DEFIBRILLATOR

A defibrillation circuit comprising a gas discharge tube and a light source arranged to pre-energize the gas discharge tube in order to provide predictable breakdown conditions of the gas discharge tube. The gas discharge tube may be used as an overvoltage protection device for the defibrillation circuit or for certain parts of the defibrillation circuit. An overvoltage protection device for medical devices is also described. The overvoltage protection device comprises a gas discharge tube and a light source arranged to pre-energize the gas discharge tube in order to provide predictable breakdown conditions of the gas discharge tube. 1. A defibrillation circuit comprising a gas discharge tube and a light source arranged to pre-energize the gas discharge tube in order to provide predictable breakdown conditions of the gas discharge tube.2. The defibrillation circuit according to claim 1 , wherein the light source is situated in proximity to the gas discharge tube.3. The defibrillation circuit according to claim 1 , wherein the light source is substantially permanently lit during an operation of the defibrillation circuit.4. The defibrillation circuit according to claim 1 , wherein the gas discharge tube is arranged to function as an overvoltage protection device.5. The defibrillation circuit according to claim 1 , wherein the light source is a light emitting diode.6. The defibrillation circuit according to claim 1 , further comprising an electrocardiogram monitoring circuit and wherein the gas discharge tube is connected to the electrocardiogram monitoring circuit to function as an overvoltage protection device for the electrocardiogram monitoring circuit.7. The defibrillation circuit according to claim 6 , wherein the electrocardiogram monitoring circuit comprises a plurality of monitoring leads claim 6 , wherein the defibrillation circuit comprises an electrical conductor carrying an electrical reference potential sufficient to absorb excess electrical charge claim ...

Electronic Device, in Particular for Protection Against Electrostatic Discharges, and Method for Protecting a Component Against Electrostatic Discharges

The electronic device includes a first (BP) and a second (BN) terminal and electronic means coupled between said two terminals; the electronic means include at least one block (BLC) comprising an MOS transistor (TR) including a parasitic bipolar transistor, the MOS transistor having the drain (D) thereof coupled to the first terminal (BP), the source (S) thereof coupled to the second terminal (BN) and being additionally configured, in the event of a current pulse (IMP) between the two terminals, to operate in a hybrid mode including MOS operation in a subthreshold mode and operation of the parasitic bipolar transistor. The device can comprise two blocks (BLC, BLC) connected symmetrically between the two terminals (BP, BN) with a triac (TRC) the trigger of which is connected to the common terminal (BC) of the two blocks. 1. An electronic device , comprising a first and a second terminal and electronic means coupled between the two terminals , characterized in that the electronic means comprise at least one block comprising an MOS transistor that has a first electrode , a second electrode , a gate and includes a parasitic bipolar transistor , the MOS transistor having its first electrode coupled to the first terminal , its second electrode coupled to the second terminal and also being configured to , in the presence of a current pulse between the two terminals , operate in a hybrid mode including an MOS-type operation in a below-threshold mode and an operation of the parasitic bipolar transistor.2. The device according to claim 1 , in which the substrate and the gate of the MOS transistor are respectively left floating.3. The device according to claim 1 , in which the substrate and the gate of the MOS transistor are connected together claim 1 , the gate and the substrate of the transistor not being directly connected to one of the first and second terminals.4. The device according to claim 1 , in which the block also comprises a control circuit configured to claim 1 , ...

ESD PROTECTION DEVICE

The present invention provides an ESD protection device that not only has small electrostatic capacitance and an excellent discharge property but also has high durability against repeated use with the occurrence of short-circuiting between electrodes after discharge inhibited. An ESD protection device including an insulating substrate, electrodes arranged on this insulating substrate away from and opposite each other, and a discharge induction section located between these electrodes, wherein the discharge induction section is composed of a porous body, in which micropores are discontinuously scattered, and has a hollow structure having at least one or more hollow sections. 1. An ESD protection device comprising an insulating substrate , electrodes arranged on the insulating substrate away from and opposite each other , and a discharge induction section located between the electrodes , whereinthe discharge induction section is composed of a porous body in which micropores are discontinuously scattered, and has a hollow structure having at least one or more hollow sections.2. The ESD protection device according to claim 1 , whereinthe hollow section is formed so as to extend along a direction of connecting the electrodes.3. The ESD protection device according to claim 1 , whereinin the discharge induction section, a length of the hollow section in the direction of connecting the electrodes is 0.5 times a gap distance ΔG between the electrodes to less than discharge induction section length.4. The ESD protection device according to claim 1 , whereinthe electrodes are exposed in the hollow section.5. The ESD protection device according to claim 1 , whereinthe discharge induction section has a plurality of the hollow sections.6. The ESD protection device according to claim 1 , whereinthe porous body is a composite in which at least one type of conductive inorganic material is discontinuously dispersed in a matrix of at least one type of insulating inorganic material.7. ...

ESD PROTECTION DEVICE AND METHOD FOR MANUFACTURING THE SAME

An ESD protection device is manufactured such that its ESD characteristics are easily adjusted and stabilized. The ESD protection device includes an insulating substrate, a cavity provided in the insulating substrate, at least one pair of discharge electrodes each including a portion exposed in the cavity, the exposed portions being arranged to face each other, and external electrodes provided on a surface of the insulating substrate and connected to the at least one pair of discharge electrodes. A particulate supporting electrode material having conductivity is dispersed between the exposed portions of the at least one pair of discharge electrodes in the cavity 1. An ESD protection device comprising:an insulating substrate;a cavity provided in the insulating substrate;at least one pair of discharge electrodes each including a portion exposed in the cavity, the exposed portions being arranged to face each other; andexternal electrodes provided on a surface of the insulating substrate and connected to the at least one pair of discharge electrodes; whereina particulate supporting electrode material having conductivity is dispersed between the exposed portions of the at least one pair of discharge electrodes in the cavity; andan insulating material is dispersed in the cavity.2. The ESD protection device according to claim 1 , wherein the supporting electrode material is a conductive material dispersed between the at least one pair of discharge electrodes in the cavity claim 1 , and the conductive material is in contact with a bottom surface and a top surface that define the cavity.3. The ESD protection device according to claim 2 , wherein a portion of the conductive material is buried in the insulating substrate.4. The ESD protection device according to claim 2 , whereinthe insulating substrate is a ceramic substrate including a ceramic material and a glass material; andthe conductive material is fixed to the insulating substrate via the glass material.5. The ESD ...

Electrostatic discharge protection device

An electrostatic discharge protection device is provided. The electrostatic discharge protection device includes a clamp unit and a control circuit. The clamp unit provides a discharging path from a first power line to a first ground line. The control circuit receives a first power voltage from the first power line and a second power voltage from a second power line. Wherein, when the first power voltage and the second power voltage are applied, the control circuit generates an isolation signal to disconnect the discharging path. When the first power voltage and the second power voltage are not applied, the control circuit generates a trigger signal according to an electrostatic signal from the first power line to turn on the discharging path.

COMPACT ELECTRONIC DEVICE FOR PROTECTING FROM ELECTROSTATIC DISCHARGE

A device for protecting a set of N nodes from electrostatic discharges, wherein N is greater than or equal to three, includes a set of N units respectively possessing N first terminals respectively connected to the N nodes and N second terminals connected together to form a common terminal. Each unit includes at least one MOS transistor including a parasitic transistor connected between a pair of the N nodes and configured, in the presence of a current pulse between the pair of nodes, to operate, at least temporarily, in a hybrid mode including MOS-type operation in a sub-threshold mode and operation of the bipolar transistor. 1. A device for protecting a set of N nodes from electrostatic discharge , N being three or more , comprising:a set of N units respectively possessing N first terminals respectively connected to the N nodes and N second terminals connected together to form a common terminal,wherein each unit comprises at least one MOS transistor including a parasitic transistor connected between two terminals of the MOS transistor and configured, in the presence of a current pulse between the two terminals, to operate, at least temporarily, in a hybrid mode including MOS-type operation in a sub-threshold mode and operation of the bipolar transistor.2. The device according to claim 1 , wherein the MOS transistor has a first electrode coupled to the first terminal claim 1 , a second electrode coupled to said common terminal claim 1 , a gate coupled to a substrate of the MOS transistor without being directly coupled to the first terminal claim 1 , and a resistive element coupled between the substrate of the MOS transistor and the first terminal.3. The device according to claim 1 , further comprising a triggerable element possessing at least one control electrode that is connected between each pair of nodes in the set of nodes claim 1 , the control electrodes of all the triggerable elements being connected to said common terminal.4. The device according to claim 3 ...

Bi-directional back-to-back stacked scr for high-voltage pin esd protection, methods of manufacture and design structures

Bi-directional back-to-back stacked SCRs for high-voltage pin ESD protection, methods of manufacture and design structures are provided. The device includes a symmetrical bi-directional back-to-back stacked silicon controlled rectifier (SCR). An anode of a first of the back-to-back stacked SCR is connected to an input. An anode of a second of the back-to-back stacked SCR is connected to ground. Cathodes of the first and second of the back-to-back stacked SCR are connected together. Each of the symmetrical bi-directional back-to-back SCRs include a pair of diodes directing current towards the cathodes which, upon application of a voltage, become reverse biased effectively and deactivating elements from one of the symmetrical bi-directional back-to-back SCRs while the diodes of another of the symmetrical bi-directional back-to-back SCRs direct current in the same direction as the reverse biased diodes.

HIGH HOLDING VOLTAGE, MIXED-VOLTAGE DOMAIN ELECTROSTATIC DISCHARGE CLAMP

An electrostatic discharge (ESD) protection circuit is disclosed including at least a clamping device, a switching device, and a voltage limiter. The ESD protection circuit may include devices of different voltage domains. The switching device may be in series with the clamping device to block at least a portion of a voltage from dropping across the clamping device. The switching device may sustain higher maximum operating voltages than the clamping device. 1. An electrostatic discharge (ESD) protection circuit , for protecting circuitry , coupled between a first node and a second node , comprising:at least one clamping device of a first voltage domain coupled to the first node;a switching device of a second voltage domain coupled in series with the at least one clamping device and coupled to the second node; anda voltage limiter coupled to the at least one clamping device and configured to limit a voltage over the at least one clamping device.2. The ESD protection circuit of claim 1 , wherein a voltage level of the second voltage domain is higher than a voltage level of the first voltage domain.3. The ESD protection circuit of claim 1 , wherein a maximum voltage level corresponding to reliability and leakage requirements of the second voltage domain is higher than a voltage level corresponding to reliability and leakage requirements of the first voltage domain.4. The ESD protection circuit of claim 1 , wherein the at least one clamping device includes a plurality of serially-coupled clamping devices.5. The ESD protection circuit of claim 1 , wherein the at least one clamping device includes at least one metal oxide semiconductor (MOS) device.6. The ESD protection circuit of claim 5 , wherein the at least one MOS device is at least one low-voltage domain MOS device.7. The ESD protection circuit of claim 5 , wherein each MOS device of the at least one MOS device comprises a gate and a source claim 5 , and wherein the gate of each MOS device is connected to the ...

ELECTROSTATIC DISCHARGE (ESD) PROTECTION AND OPERATING METHOD THEREOF

An electrostatic discharge (ESD) protection circuit includes a clamp transistor, and inverter, a resistance-capacitance (RC) circuit, and a current mirror. The clamp transistor is coupled between a first supply node and a second supply node. The inverter has an input end and an output end, and the output end of the inverter is coupled with a gate of the clamp transistor. The RC circuit is coupled to the first supply node. The current mirror includes a first transistor and a second transistor. The first transistor is coupled between the input end of the inverter and the second supply node, and the second transistor is coupled between the RC circuit and the second supply node. 1. An electrostatic discharge (ESD) protection circuit , comprising:a clamp transistor coupled between a first supply node and a second supply node;an inverter having an input end and an output end, the output end of the inverter being coupled with a gate of the clamp transistor;a resistance-capacitance (RC) circuit coupled to the first supply node; anda current mirror including a first transistor and a second transistor, the first transistor being coupled between the input end of the inverter and the second supply node, and the second transistor being coupled between the RC circuit and the second supply node.2. The ESD protection circuit of claim 2 , wherein the RC circuit comprises:a resistive device having a first end coupled to the input end of the inverter; anda capacitive device having a first end coupled to the resistive device and the input end of the inverter.3. The ESD protection circuit of claim 1 , further comprising a circuit coupled with the input end of the inverter claim 1 , the circuit being configured to output a voltage state on the input end of the inverter that is capable of substantially turning off the clamp transistor responsive to a latch-up event.4. The ESD protection circuit of claim 3 , wherein the circuit comprises:a third transistor, a source end of the third ...

ESD PROTECTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

An ESD protection device includes an alumina multilayer substrate, a hollow portion, a discharge electrode pair, discharge-assisting electrodes, and a vitreous substance. The hollow portion is disposed inside of the alumina multilayer substrate. The electrodes of the discharge electrode pair are disposed opposite to each other at an interface between the hollow portion and the alumina multilayer substrate. The discharge-assisting electrodes are disposed dispersedly between the opposite electrodes of the discharge electrode pair. The vitreous substance covers the discharge-assisting electrodes in the inside of the hollow portion. A trial discharge is executed so as to induce creepage discharge between the electrodes of the discharge electrode pair in advance. 1. An ESD protection structure comprising:an insulating portion;a pair of discharge electrodes disposed at a distance from each other on a surface of the insulating portion;discharge-assisting electrodes disposed between the pair of discharge electrodes and including insulating material-coated metal particles and/or semiconductor particles; anda vitreous substance disposed around the discharge-assisting electrodes to embed the discharge-assisting electrodes in the vitreous substance; whereindischarge craters, at which the discharge-assisting electrodes are exposed, are disposed in the vitreous substance and defined by a removed portion of the vitreous substance.2. The ESD protection structure according to claim 1 , further comprising a hollow portion disposed adjoining the surface of the insulating portion is further included.3. The ESD protection structure according to claim 1 , wherein the insulating material-coated metal particles are alumina-coated Cu particles and the semiconductor particles are SiC particles provided with oxide films.4. The ESD protection structure according to claim 1 , wherein the insulating portion is an alumina multilayer substrate.5. The ESD protection structure according to claim 1 , ...

ELECTRONIC COMPONENT PROTECTION POWER SUPPLY CLAMP CIRCUIT

Electronic component protection power supply clamp circuits comprising a plurality of p-type channel metal-oxide-semiconductor (PMOS) and n-type channel metal-oxide-semiconductor (NMOS) transistors are described. These clamp circuits use a feedback latching circuit to retain an electrostatic discharge (ESD)-triggered state and efficiently conduct ESD current that has been diverted into the power supply, in order to dissipate ESD energy. The feedback latching circuit also maintains a clamp transistor in its off state if the clamp circuit powers up untriggered, thus enhancing the clamp circuit's immunity to noise during normal operation. Passive resistance initialization of key nodes to an untriggered state, as well as passive resistance gate input loading of a large ESD clamping transistor, further enhances the clamp circuit's immunity to false triggering. This also lengthens the time that the clamp circuit remains in the ESD-triggered state during human body model (HBM) or other long duration detected ESD events. 1. An electronic component protection power supply clamp circuit connected to a positive terminal and a negative terminal of a power supply , the clamp circuit comprising:a feedback latching circuit including a first p-type metal-oxide-semiconductor (PMOS) transistor and a first n-type metal-oxide-semiconductor (NMOS) transistor;a clamp transistor;a capacitor having a first end that is connected to the negative power supply terminal, and a second end that is connected to a drain terminal of the first PMOS transistor and a drain terminal of the first NMOS transistor;a first resistor having a first end that is connected to the positive power supply terminal, and a second end that is connected to the second end of the capacitor;a plurality of inverters connected between the second end of the first resistor and a gate terminal of the clamp transistor;a second resistor having a first end that is connected to the negative power supply terminal, and a second end ...

INTEGRATED CIRCUIT HAVING A CHARGED-DEVICE MODEL ELECTROSTATIC DISCHARGE PROTECTION MECHANISM

An integrated circuit having charged-device model (CDM) electrostatic discharge (ESD) protection includes an I/O circuit, at least one CDM ESD protection device, and at least one internal circuit. The integrated circuit further includes at least one TSV (Through Silicon Via) each being coupled between a ground of at least one ground of the input/output circuit and one of the at least one ESD protection device, wherein each of the at least one ESD protection device is coupled between one of the at least one TSV and a ground of one of the at least one internal circuit. 1. An integrated circuit having a CDM (Charged-Device Model) ESD (Electrostatic Discharge) protection , comprising:an input/output circuit; andat least one ESD protection device coupled between at least one ground of the input/output circuit and a ground of at least one internal circuit.2. The integrated circuit of claim 1 , wherein one of the at least one ESD protection device is coupled between a ground of one of the at least one internal circuit and a ground of another one of the at least one internal circuit.3. The integrated circuit of claim 1 , wherein the at least one ESD protection device includes a CDM ESD protection device.4. The integrated circuit of claim 3 , wherein the CDM ESD protection device includes a gateway circuit.5. The integrated circuit of claim 4 , wherein the gateway circuit provides a conducting path having a low resistance during normal operation of the integrated circuit.6. The integrated circuit of claim 4 , wherein the gateway circuit provides a conducting path to allow a dual-directional conduction during a CDM ESD event.7. The integrated circuit of claim 4 , wherein the gateway circuit has a conducting voltage during a CDM ESD event.8. The integrated circuit of further comprising:at least one TSV (Through Silicon Via) coupled between a ground of the at least one ground of the input/output circuit and the at least one ESD protection device.9. The integrated circuit of ...

Power supply apparatus including overvoltage protection function

There is provided a power supply apparatus including an overvoltage protection function, the power supply apparatus including: a power supply unit supplying a predetermined input power supply; a rectification unit generating a first power supply by rectifying the input power supply; a main circuit unit generating a second power supply from the first power supply; and an overvoltage blocking unit blocking overvoltages and overcurrents, wherein the overvoltage blocking unit includes varistors connected between at least one of a live line and a neutral line of the input power supply and a ground.

Over-voltage protection device for resonant wireless power transmission device and method for controlling the over-voltage protection device

Provided is an over-voltage protection device for a resonant wireless power transmission device. The over-voltage protection device includes an amplifier for amplifying a transmission signal, a resonance signal generator for generating a wireless resonance signal according to the transmission signal amplified by the amplifier, a voltage detector for sensing a voltage of the wireless resonance signal generated by the resonance signal generator, and a controller for monitoring the voltage detected by the voltage detector to determine whether the voltage repetitively increases and decreases with periodicity when the voltage is greater than a reference voltage and controlling the amplifier to decrease an output of the transmission device by a value according to a result of the determination.

OVER-VOLTAGE PROTECTION DEVICE FOR RESONANT WIRELESS POWER RECEPTION DEVICE AND METHOD FOR CONTROLLING THE OVER-VOLTAGE PROTECTION DEVICE

Provided is an over-voltage protection device for a resonant wireless power reception device. The over-voltage protection device includes a resonance signal receiver for receiving a wireless resonance signal transmitted from a wireless power transmission device, an over-voltage protector which is driven by a driver in an over-voltage protection operation to detune a resonance frequency of the reception device, thereby reducing reception power, the driver for driving the over-voltage protector according to a control signal in the over-voltage protection operation, and a controller for outputting the control signal for driving the over-voltage protector to the driver when it is determined that over-voltage occurs. 1. An over-voltage protection device for a resonant wireless power reception device , the over-voltage protection device comprising:a resonance signal receiver for receiving a wireless resonance signal transmitted from a wireless power transmission device;an over-voltage protector which is driven by a driver in an over-voltage protection operation to detune a resonance frequency of the reception device, thereby reducing reception power;the driver for driving the over-voltage protector according to a control signal in the over-voltage protection operation; anda controller for outputting the control signal for driving the over-voltage protector to the driver when it is determined that over-voltage occurs.2. The over-voltage protection device of claim 1 , wherein the over-voltage protector comprises resonance-detuning first and second capacitors which are connected with two connection terminals of a resonator of the resonance signal receiver claim 1 , respectively.3. The over-voltage protection device of claim 2 , wherein the driver comprises a switch structure in which the driver performs a switching operation according to the control signal output from the controller to connect the first and second capacitors of the over-voltage protector to a ground terminal ...

DESTRUCTIVE ELECTROSTATIC DISCHARGE DAMAGE PREVENTION OF GARMENTS

A method and system for the prevention of Destructive Electrostatic Discharge (DED) damage to outer garments caused by triboelectric charge discharging to the wearer's body through a distinct point of discharge at a conductor in contact with or close proximity to the wearer's skin. The method consists of interposing an insulating layer of high dielectric strength at the conductor such that the conductor is insulated from either the skin of the wearer or the outer garment and the circuit of triboelectric charge through the conductor is broken. The system includes a conductor and an insulating layer positioned between the outer garment and the skin of the wearer on either side of the conductor. 1. A method for the prevention of Destructive Electrostatic Discharge (DED) damage to outer garments caused by triboelectric charge discharging to the wearer's body through a distinct point of discharge at a conductor in contact with or close proximity to the wearer's skin wherein the method consists of interposing an insulating layer of high dielectric strength at the conductor such that the conductor is insulated from either the skin of the wearer or the outer garment and the circuit of triboelectric charge through the conductor is broken.2. A system for the prevention of DED damage to outer garments at a distinct point of discharge at a conductor in contact with or close proximity to the wearer's skin and in close proximity to the wearer's outer garment , the system comprising an insulating layer positioned between the outer garment and the skin of the wearer on either side of the conductor.3. The system of wherein the conductor is a metal stud.4. The system of wherein the insulating layer has a high dielectric strength such that the thickness of the layer can be kept to a minimum.5. The system of wherein the insulating layer is rubber.6. The system of wherein the insulating layer is held in position by means of adhesive between the insulating layer and the supporting fabric ...

ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

An electrostatic discharge (ESD) protection circuit includes a first power line; a second power line; a ground line; two stack transistors connected in series between the first power line and the ground line; a first resistor connected between the first power line and a first node; a first transistor and a capacitor connected in series between the first node and the ground line; a second transistor connected between the second power line and a second node; a third transistor connected between the first power line and a third node; an inverter, connected between the third node and the ground line, and having an input connected to the second node; a fourth transistor, connected to the first power line, and having a gate connected to the second node; and a fifth transistor, connected between the second power line and the third node, and having a gate connected to a terminal of the fourth transistor. 1. An electrostatic discharge protection circuit comprising:a first power line configured to provide a first power supply voltage;a second power line configured to provide a second power supply voltage;a ground line connected to a ground voltage terminal;at least two stack transistors connected in series between the first power line and the ground line;a first resistor connected between the first power line and a first node;a first transistor and a first capacitor connected in series between the first node and the ground line;a second transistor, connected between the second power line and a second node, and having a gate connected to the ground line;a third transistor, connected between the first power line and a third node, and having a gate connected to the first node;an inverter, connected between the third node and the ground line, and having an input connected to the second node;a fourth transistor, connected to the first power line, and having a gate connected to the second node; anda fifth transistor, connected between the second power line and the third node, and ...

Overvoltage protection circuit for at least one branch of a half-bridge, inverter, dc/dc voltage converter and circuit arrangement for operating an electrical machine

An overvoltage protection circuit is provided for at least one branch of a half-bridge which includes a controllable semiconductor switch element and a free-wheeling diode connected in series and situated on a common circuit substrate. The protection circuit includes a commutation branch connected in parallel with the half-bridge branch, the commutation branch including at least one commutation capacitor also situated on the circuit substrate.

Devices and methods related to electrostatic discharge-protected cmos switches

Disclosed are devices and methods related to a CMOS switch for radio-frequency (RF) applications. In some embodiments, the switch can be configured to include a resistive body-floating circuit to provide improved power handling capability. The switch can further include an electrostatic discharge (ESD) protection circuit disposed relative to the switch to provide ESD protection for the switch. Such a switch can be implemented for different switching applications in wireless devices such as cell phones, including band-selection switching and transmit/receive switching.

Electronic device and method for protecting against damage by electrostatic discharge

An electronic device with a protective circuit against damage by electrostatic discharge includes a discharge current path connectable between an input to be protected and a ground pin. An enabling circuit outputs a control signal for connecting the discharge current path in the event of an electrostatic discharge. A deactivating circuit which deactivates the enabling circuit during operation of the electronic device is controlled by the inverted control signal. A method of protecting an electronic device against damage by electrostatic discharge includes providing a control signal for connecting a discharge current path between an input to be protected and a ground pin in the event of an electrostatic discharge. An inverted control signal is applied to the inverted control signal to a deactivating circuit. The inverted control signal prevents connection of the discharge current path between the input to be protected and ground during operation of the electronic device.

METHOD FOR MANUFACTURING ESD PROTECTION DEVICE AND ESD PROTECTION DEVICE

In a method for manufacturing an ESD protection device and an ESD protection device, on sheets defining insulating layers, portions defining a first connection conductor and a second connection conductor and a portion defining a mixed portion are formed, then the sheets are laminated and heated. The mixed portion is formed using a mixed portion formation material containing a cavity formation material and a solid component containing at least one of (i) a metal and a semiconductor, (ii) a metal and ceramic, (iii) a metal, a semiconductor, and ceramic, (iv) a semiconductor and ceramic, (v) a semiconductor, (vi) a metal coated with an inorganic material, (vii) a metal coated with an inorganic material and a semiconductor, (viii) a metal coated with an inorganic material and ceramic, and (ix) a metal coated with an inorganic material, a semiconductor, and ceramic. The cavity formation material disappears during heating. 1. A method for manufacturing an ESD protection device , comprising:a first step of preparing a plurality of sheets defining insulating layers, forming portions defining a first connection conductor and a second connection conductor and a portion defining a mixed portion which is disposed between the first and second connection conductors and is connected to the first and second connection conductors in at least one of the sheets, and then alternately laminating the sheets to form a laminate; anda second step of heating the laminate to form the first and second connection conductors and the mixed portion in an insulating substrate in which the insulating layers are laminated; whereinin the first step, the portions defining the first and second connection conductors are formed using materials having conductivity, and the portion defining the mixed portion is formed using a mixed portion formation material containing a mixture of a cavity formation material which disappears due to an increase in temperature during heating in the second step and a solid ...

Electrostatic Discharge Protection Apparatus

An electrostatic discharge (ESD)-triggered protection apparatus includes a first circuit and a second circuit. The first circuit includes an ESD trigger circuit to sense an ESD pulse and to generate a switching pulse responsive to the ESD pulse; a first ESD discharge device communicatively coupled to the ESD trigger circuit and responsive to the switching pulse to transfer a current generated by the ESD pulse to the ground rail; a control circuit that generates a control signal in response to the switching pulse. The second circuit includes at least one trigger cell buffer that is configured to receive the control signal and to control a second ESD discharge device such that the current generated by the ESD pulse is transferred to the ground rail. 1. An electrostatic discharge (ESD)-triggered protection apparatus , comprising: an ESD trigger circuit to sense an ESD pulse and to generate a switching pulse responsive to the ESD pulse;', 'a first ESD discharge device communicatively coupled to the ESD trigger circuit and responsive to the switching pulse to transfer a current generated by the ESD pulse to a ground rail;', 'a control circuit that generates a control signal in response to the switching pulse; and, 'a first circuit comprising 'at least one trigger cell buffer that is configured to receive the control signal and to control a second ESD discharge device such that the current generated by the ESD pulse is transferred to the ground rail.', 'a second circuit comprising2. The ESD-triggered protection apparatus of claim 1 , wherein the first circuit comprises:at least one inverting buffer communicatively coupled between the ESD trigger circuit and the first ESD discharge device to propagate the switching pulse from the ESD trigger circuit to the first ESD discharge device.3. The ESD-triggered protection apparatus of claim 1 , wherein a single placement of the first circuit and a single or multiple placements of the second circuit provides selectable levels of ...

ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

An integrated circuit for an implantable medical device can include a substrate, a first capacitor, and an electrostatic discharge (ESD) protection circuit. The first capacitor can include an electrically conductive lower polysilicon terminal and an electrically conductive upper polysilicon terminal that can be separated from the lower polysilicon terminal by a first capacitor dielectric material. The ESD protection circuit can include an ESD shunt transistor and a second capacitor. The ESD shunt transistor can be configured to be normally off, but can be configured to turn on and conduct between first and second power supply rails in response to an ESD event exceeding a specified ESD event threshold value. The second capacitor can includes a first substrate terminal and an electrically conductive second polysilicon terminal that can be separated from the first substrate terminal by a second capacitor dielectric material. 1. An implantable medical device , comprising:a housing;an integrated circuit carried within the housing, the integrated circuit including:a substrate;a first capacitor, located directly or indirectly upon the substrate, the first capacitor comprising an electrically conductive lower polysilicon terminal and an electrically conductive upper polysilicon terminal that is separated from the lower polysilicon terminal by a first capacitor dielectric material; andan electrostatic discharge (ESD) protection circuit, comprising:an ESD shunt transistor, configured to be normally off, but configured to turn on and conduct between first and second power supply rails in response to an ESD event exceeding a specified ESD event threshold value; anda second capacitor, located directly or indirectly upon the substrate, the second capacitor coupled to a control terminal of the ESD shunt transistor, the second capacitor comprising a first substrate terminal and an electrically conductive second polysilicon terminal separated from the first substrate terminal by a ...

Multi-staged overvoltage protection circuit, in particular for information-technology systems

The invention relates to a multi-staged overvoltage protection circuit, in particular for information-technology systems, comprising at least one coarse protection element and at least one fine protection element, wherein the at least one fine protection element can be activated by a triggering device depending on a threshold. According to the invention, the applied operating voltage is led to an evaluation device, which generates a reference voltage. Also provided is an evaluation unit, firstly for checking to see whether the current operating voltage is above the reference voltage, secondly for checking to see whether the voltage excess exceeds a previously determined level, and thirdly for establishing whether the rate of change of the operating voltage is greater than another previously determined value so that a transient overvoltage exists, wherein the triggering device then receives an activation signal from the evaluation device.

Multiple port rf switch esd protection using single protection structure

Antenna switching circuitry comprises a plurality of communication ports, an antenna port, a plurality of switches, and an ESD protection device. The plurality of switches are adapted to selectively couple one or more of the communication ports to the antenna port in order to transmit or receive a signal. The ESD protection device is coupled between one of the plurality of communication ports and ground, and is adapted to form a substantially low impedance path to ground during an ESD event. Upon the occurrence of an ESD event, a received electrostatic charge passes through one or more of the plurality of switches to the ESD protection device, where it is safely diverted to ground. By using only one ESD protection device, desensitization of the antenna switching circuitry due to the parasitic loading of the ESD protection device is avoided. Further, the area of the antenna switching circuitry is minimized.

HIGH-VOLTAGE TRANSISTOR, ESD-PROTECTION CIRCUIT, AND USE OF A HIGH-VOLTAGE TRANSISTOR IN AN ESD-PROTECTION CIRCUIT

In the high-voltage transistor, which is suitable for an ESD-protection circuit, there is no doped well or at most a portion of a second well () of a second conductivity type opposite a first conductivity type under a contact region () for the drain between a first well () and a semiconductor material of the substrate (), said semiconductor material being undoped or being doped for the first conductivity type. Said portion has a lower thickness than a thickness which would provide a good insulation of the first well from the substrate and which would provide a high-breakdown voltage. 1. A high-voltage transistor comprising:a substrate made of semiconductor material with an upper side;doped wells on the upper side, that comprise a first well of a first conductivity type provided for a drift section and a second well, of a second conductivity type opposite to the first conductivity type, provided for a channel region;a first contact area for a drain terminal in the first well;a second contact area for a source terminal in the second well;a gate dielectric on a region of the second well between the first contact area and the second contact area; anda gate electrode on the gate dielectric,wherein the substrate is not doped or is doped for the first conductivity type,wherein underneath the first contact area, no additional doped well or only a part of the second well is present between the first well and the semiconductor material of the substrate that is not doped or doped for the first conductivity type, andwherein the second well is omitted under the first contact area, or is formed with a lesser depth, measured from the upper side of the substrate into the substrate, than that under the second contact area.2. The high-voltage transistor according to claim 1 , wherein the second well is arranged on the side of the first well and is omitted under the first well.3. The high-voltage transistor according to claim 1 , wherein the first well is arranged in the second well ...

ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

An electrostatic discharge protection circuit is coupled to a power supply rail and a ground supply rail of an integrated circuit and includes at least one shunt configured to couple the supply rails and a trigger configured to supply on an output a shunt control voltage to a control terminal of the shunt to set the shunt in a coupling state when an ESD event is sensed on one of the supply rails. The protection circuit further comprises a voltage booster arranged between the output of the trigger and the control terminal of the shunt to boost the shunt control voltage. 1. An electrostatic discharge (ESD) protection circuit , and comprising:a shunt having a control terminal and configured to electrically couple a power supply rail and a ground supply rail of an integrated circuit in response to receiving a boosted shunt control voltage at the control terminal;a trigger having an output and configured to sense an ESD event on one of the supply rails and output a shunt control voltage in response to sensing the ESD event; anda voltage booster arranged between the output of the trigger and the control terminal of the shunt, and configured to boost the shunt control voltage and provide the boosted shunt control voltage to the control terminal of the shunt.2. The circuit according to claim 1 , wherein the voltage booster is a level-shifter circuit having a first power input configured to receive a first high electrostatic discharge voltage from a first power input terminal.3. The circuit according to claim 2 , wherein the level-shifter circuit has a second power input configured to receive a second high electrostatic discharge voltage from a second power input terminal claim 2 , the circuit comprising:a first diode arranged between the first power input of the level-shifter circuit and first power input terminal; anda second diode arranged between the second power input of the level-shifter circuit and second power input terminal.4. The circuit according to claim 1 , ...

Non-Linear Element, Display Device Including Non- Linear Element, And Electronic Device Including Display Device

A non-linear element, such as a diode, in which an oxide semiconductor is used and a rectification property is favorable is provided. In a thin film transistor including an oxide semiconductor in which the hydrogen concentration is less than or equal to 5×10/cm, the work function φms of a source electrode in contact with the oxide semiconductor, the work function φmd of a drain electrode in contact with the oxide semiconductor, and electron affinity λ of the oxide semiconductor satisfy φms≦λ<φmd. By electrically connecting a gate electrode and the drain electrode of the thin film transistor, a non-linear element with a more favorable rectification property can be achieved. 1. A protection circuit comprising:a resistor;a diode;a first power supply line;a second power supply line electrically connected to a first terminal of the resistor; anda signal line electrically connected to a first terminal of the diode and a second terminal of the resistor;wherein a second terminal of the diode is electrically connected to one of the first power supply line and the second power supply line.2. The protection circuit according to claim 1 , wherein the diode is a diode-connected n channel transistor.3. The protection circuit according to claim 1 , further comprising:a first capacitor; anda second capacitor,wherein a first terminal of the first capacitor and a first terminal of the second capacitor are electrically connected to the signal line,wherein a second terminal of the first capacitor is electrically connected to the first power supply line, andwherein a second terminal of the second capacitor is electrically connected to the second power supply line.4. A display device comprising the protection circuit according to .5. A protection circuit comprising:a resistor;a first power supply line;a second power supply line electrically connected to a first terminal of the resistor;a signal line electrically connected to a second terminal of the resistor;a first transistor a gate ...

ESD PROTECTION DEVICE AND MANUFACTURING METHOD THEREFOR

The ESD protection device includes: opposed electrodes including an opposed electrode on one side and an opposed electrode on the other side, and a discharge auxiliary electrode , the discharge auxiliary electrode being placed so as to extend from the opposed electrode on one side to the opposed electrode on the other side, wherein the discharge auxiliary electrode contains metal grains, semiconductor grains and a glass material, the metal grains, the semiconductor grains, and the metal grain and the semiconductor grain are bound together, respectively, via the glass material, the average grain size X of the metal grains is 1.0 μm or more, and the relationship between the thickness Y of the discharge auxiliary electrode and the average grain size X of the metal grains satisfies the requirement of 0.5≦Y/X≦3. 1. An ESD protection device which comprises:a ceramic base material;opposed electrodes provided with one-sided opposed electrode and an other-sided opposed electrode on a surface of the ceramic base material, the opposed electrodes being formed so as to be opposed to each other at a distance therebetween; anda discharge auxiliary electrode contacting each of the one-sided opposed electrode and the other-sided opposed electrode constituting the opposed electrodes, the discharge auxiliary electrode being placed so as to extend from the one-sided opposed electrode to the other-sided opposed electrode,wherein the discharge auxiliary electrode contains metal grains, semiconductor grains and a glass material, and each of the metal grains, each of the semiconductor grains, and each of the metal grains and each of the semiconductor grains are bound together, respectively, via the glass material, andan average grain size X of the metal grains is 1.0 μm or more, and a relationship between a thickness Y of the discharge auxiliary electrode and the average grain size X of the metal grains satisfies a requirement of 0.5≦Y/X≦3.2. The ESD protection device according to claim 1 ...

SYSTEM AND METHOD FOR PROVIDING SURGE PROTECTION

Methods and systems described herein provide protection for sensitive circuits against power surges on power lines. A surge protector for protecting a load coupled to a power source is provided. The surge protector includes an input having a first node, a second node and a third node to respectfully couple to line, neutral, and ground connections of a power source, an output having a fourth node, a fifth node, and a sixth node for respectfully coupling to line, neutral and ground connections of the load, a first voltage limiting circuit coupled between the fourth node and the fifth node, a first inductor coupled between the first node and the fourth node, and a second voltage limiting circuit coupled between the first node and the second node. 1. A surge protector for protecting a load coupled to a power source , the surge protector comprising:an input having a first node, a second node and a third node to respectfully couple to line, neutral, and ground connections of a power source;an output having a fourth node, a fifth node, and a sixth node for respectfully coupling to line, neutral and ground connections of the load;a first voltage limiting circuit coupled between the fourth node and the fifth node;a first inductor coupled between the first node and the fourth node; anda second voltage limiting circuit coupled between the first node and the second node.21. The surge protector of claim , , further comprising:a third voltage limiting circuit coupled between the fifth node and the sixth node;a second inductor coupled between the second node and the fifth node; anda fourth voltage limiting circuit coupled between the second node and the third node.3. The surge protector of claim 2 , further comprising a fifth voltage limiting circuit coupled between the fourth node and the sixth node.4. The surge protector of claim 3 , wherein the second voltage limiting circuit includes a first gas discharge tube.5. The surge protector of claim 4 , wherein the second voltage ...

Surge arrester with extendable collar

A surge arrester has a collar for fixing tensioning elements. The collar is extendable and is capable of absorbing released energy in the event of a fault and holding together the cage containing the tensioning elements. The collar, which fixes the tensioning elements in the radial direction, is positioned around the cage of the surge arrester formed from the tensioning elements. The form of the collar is such that it has defined deformation regions, with the result that the collar can expand and thus widen in the event of a force effect in the radial direction. If the varistor elements expand in the manner of an explosion during an overload, the collar is expanded and absorbs some of the released energy. This ensures that the cage is held together in the event of an overload and thus no fragments of the varistor elements can be flung out of the cage.

Switched transient voltage suppression circuit

A transient voltage suppression circuit includes a voltage suppression circuit, a switch activation circuit, and a solid-state switch. The switch activation circuit is configured to selectively supply a switch activation signal. The solid-state switch is electrically connected in series with the voltage suppression circuit, is coupled to receive the switch activation signal selectively supplied by the switch activation circuit, and is configured, in response to the switch activation signal, to switch from an OFF state to an ON state.

DISTRIBUTED MAXIMUM POWER POINT TRACKING SYSTEM, STRUCTURE AND PROCESS

Distributed maximum power point tracking systems, structures, and processes are provided for power generation structures, such as for but not limited to a solar panel arrays. In an exemplary solar panel string structure, distributed maximum power point tracking (DMPPT) modules are provided, such as integrated into or retrofitted for each solar panel. The DMPPT modules provide panel level control for startup, operation, monitoring, and shutdown, and further provide flexible design and operation for strings of multiple panels. The strings are typically linked in parallel to a combiner box, and then toward and enhanced inverter module, which is typically connected to a power grid. Enhanced inverters are controllable either locally or remotely, wherein system status is readily determined, and operation of one or more sections of the system are readily controlled. The system provides increased operation time, and increased power production and efficiency, over a wide range of operating conditions. 1. A control module for a power panel , comprising:input connections that are connectable to one or more DC power cells;output connections that are connectable to an inverter;a signal processing circuit connected to the input connections and to the output connections;a crowbar circuit that is located across the input connections; anda controller that is connected to the signal processing circuit, wherein the controller comprises a communications link that is connectable to a server;wherein the controller is configured to drive the crowbar circuit to short across the input connections to shut down the DC output of the power panel in response to an input signal that is sent from the server and received at the controller over the communications link.2. The control module of claim 1 , wherein the input signal to shut down the DC output of the power panel corresponds with any of service claim 1 , safety claim 1 , or fire.3. The control module of claim 1 , wherein the control module ...

ELECTROSTATIC DISCHARGE PROTECTION FOR HIGH VOLTAGE DOMAINS

An electrostatic discharge (ESD) protection device is disclosed. The ESD protection circuit is configured to operate in high voltage domains. The ESD protection device may further include stacked NMOS or PMOS devices. The gates of the MOS devices may be driven by respective inverters. The inverters may be coupled to a voltage divider and may be triggered by respective trigger circuits. Power nodes of the inverters may be connected such that devices in the ESD protection circuit are exposed to voltages that are within their maximum voltage rating. 1. A circuit for use in an electrostatic discharge (ESD) protection device , the circuit comprising:a first NMOS device including a first gate, a first source, and a first drain;a second NMOS device including a second gate, a second source, and a second drain, wherein the first source is coupled to the second drain;a first inverter including a first higher voltage power node, a first lower voltage power node, a first input, and a first output, wherein the first output is coupled to the first gate;a second inverter including a second higher voltage power node, a second lower voltage power node, a second input, and a second output, wherein the second output is coupled to the second gate and wherein the second higher voltage power node is coupled to the first output;a voltage divider coupled to the first lower voltage power node; anda trigger circuit coupled to the first input and the second input, wherein the trigger circuit is configured to sense an ESD event.2. A circuit for use in an electrostatic discharge (ESD) protection device , the circuit comprising:a first PMOS device including a first gate, a first source, and a first drain;a second PMOS device including a second gate, a second source, and a second drain, wherein the first source is coupled to the second drain;a first inverter including a first higher voltage power node, a first lower voltage power node, a first input, and a first output, wherein the first output ...

Esd-robust i/o driver circuits

An ESD-robust I/O driver circuit is disclosed. Embodiments include providing a first NMOS transistor having a first source, a first drain, and a first gate; coupling the first source to a ground rail and the first drain to an I/O pad; coupling a gate driver control circuit to the first drain and the first gate; and providing a ground potential to the first gate, via the gate driver control circuit, during an ESD event occurring from the I/O pad to the ground rail.

SEMICONDUCTOR PACKAGE HAVING A CONDUCTIVE LAYER FOR ELECTROSTATIC DISCHARGE AND DISPLAY DEVICE INCLUDING THE SAME

A semiconductor package is provided. The semiconductor package may include a base film having a first surface and a second surface opposite the first surface, an interconnection pattern on the first surface of the base film, and a ground layer on the second surface of the base film. The semiconductor package may further include a semiconductor chip on the first surface of the base film within the first region and a via contact plug in the second region that penetrates the base film and is configured to electrically connect the interconnection pattern with the ground layer when electrostatic discharge occurs through the via contact plug. 1. A semiconductor package comprising:a base film having a first surface and a second surface opposite the first surface, the base film comprising a first region and a second region spaced apart from one another;an interconnection pattern on the first surface of the base film, the interconnection pattern being in the second region and extending toward the first region;an insulating layer on the interconnection pattern in the second region;a ground layer on the second surface of the base film;a semiconductor chip on the first surface of the base film within the first region, the semiconductor chip having a bonding pad electrically connected to the interconnection pattern; anda via contact plug in the second region penetrating the base film, the via contact plug being configured to electrically connect the interconnection pattern with the ground layer when electrostatic discharge occurs through the via contact plug.2. The semiconductor package of claim 1 , wherein the via contact plug comprises a voltage sensitive polymer.3. The semiconductor package of claim 1 , wherein the interconnection pattern comprises one among a plurality of interconnection patterns and the via contact plug is configured to electrically connect at least two of the plurality of interconnection patterns with the ground layer when electrostatic discharge occurs ...

Semiconductor device

A semiconductor device for protecting loads from power surges includes a first resistor having a first end connected to a first supply terminal, a capacitor connected to a second end of the first resistor and a second supply terminal. There is a first transistor with a source connected to the first supply terminal and a gate connected to a point between the first resistor and the capacitor. A second resistor is connected between the drain of the first transistor and the second supply terminal, and a first diode is connected between the gate and the source of the first transistor. A second transistor has a drain connected to the first supply terminal, a source connected to the second supply terminal, and a gate connected to the drain of the first transistor. There is a second diode connected between the gate and the source of the second transistor.

ESD protection circuit and ESD protection device thereof

The ESD protection circuit is electrically connected between a first power rail and a second power rail, and includes an ESD protection device, a switching device electrically connected between the ESD protection device and a first power rail, and a low-pass filter electrically connected between the first power rail and the first switching device. The ESD protection device includes a BJT and a first resistor electrically connected between a base of the BJT and a first power rail. When no ESD event occurs, a potential of the base is larger than or equal to a potential of an emitter of the BJT. When the ESD event occurs, the potential of the base is smaller than the potential of the emitter. 1. An ESD protection device , comprising:a substrate, having a first conductive type;a first well, having a second conductive type and disposed in the substrate, and the first well being electrically connected to a first switching device;a first doped region, having the first conductive type and disposed in the first well, and the first doped region and the first well being electrically connected to a first power rail;a second doped region, having the second conductive type and disposed in the substrate, and the second doped region and the substrate being electrically connected to a second power rail; anda third doped region, having the second conductive type and disposed in the first well between the first doped region and the second doped region, and the first well being electrically connected to the first switching device by the third doped region;wherein when an ESD event does not occur, the first switching device is turned on, and a potential of the first well is larger than or equal to a potential of the first doped region; and when the ESD event occurs, the first switching device is turned off, and the potential of the first well is smaller than the potential of the first doped region.2. The ESD protection device according to claim 1 , wherein the third doped region ...

POWER AMPLIFIER PROTECTION CIRCUIT, COMMUNICATION DEVICE, AND METHOD

Embodiments of the present application disclose a power amplifier protection circuit, communication device, and method, to protect a power amplifier when an abnormal signal, such as a bun or a pulse, occurs in a circuit. The method according to an embodiment of the present application comprises: detecting and comparing, by an input detection circuit, an abnormal signal in an input signal, outputting a protection control signal, and after processing performed by a delay circuit, controlling a power amplifier to be in an off state in a pulse width of the delayed protection control signal, so that the abnormal signal passes through the power amplifier when the power amplifier is in the off state, thereby preventing the power amplifier from burning, and achieving the effect of protecting the power amplifier. 1. A power amplifier protection circuit , comprising:an input detection circuit, a delay circuit, and a control circuit; wherein an input end of the input detection circuit is connected to a signal input end, and the input detection circuit is configured to detect an abnormal signal in an input signal, compare the abnormal signal with a reference level, and output a protection control signal if a pulse amplitude of the abnormal signal is higher than the reference level;an input end of the delay circuit is connected to an output end of the input detection circuit, and the delay circuit is configured to perform delay processing on the protection control signal; andan input end of the control circuit is connected to an output end of the delay circuit, and an output end of the control circuit is connected to an input end of a power amplifier, and the control circuit is configured to control the power amplifier to be in an off state in a pulse width of a protection control signal that has undergone the delay processing and is output by the delay circuit, so that the abnormal signal passes through the power amplifier when the power amplifier is in the off state.2. The ...

Overvoltage Protection for Electrically Conductive Structures

There is described a structure () that is disposed on an electrically non-conductive, electrostatically chargeable strip-type carrier film () and that has electrically conductive and/or semiconducting structural elements, which structure has at least one structural region (s) protected against electrostatic voltage flashover. The at least one structural region (s) protected against electrostatic voltage flashover is connected to a protective conductor track () and/or surrounded by a protective conductor track (′), which is realized such that it discharges an electrostatic charge and/or shields the protected structural region (s), 1. A film having overvoltaae protection for electrically conductive structures applied to the film comprising:an electrically non-conductive, electrostatically chargeable carrier film; anda structure on the carrier film comprising one or more electrically conductive and/or semiconducting structural elements and having at least one structural region protected against electrostatic voltage flashover, the one or more electrically conductive or semiconducting structural elements being connected to a protective conductor track and/or surrounded by a protective conductor track, such that the protective conductor track discharges an electrostatic charge that might otherwise occur on the structure and/or shields the protected structural region from receiving an electrostatic charge.2. The Film according to claim 1 , wherein the protected structural region is a fuse structured as a conductor track.3. The Film according to wherein the protected structural element is one of a field-effect transistor claim 1 , diode claim 1 , resistor or capacitor claim 1 , or a partial region thereof.4. The film according to wherein the protected structural element is composed of one or more layers claim 1 , applied to the carrier film by printing claim 1 , which layers are selected from the group comprising electrically conductive layer claim 1 , electrically ...

CIRCUIT PROTECTION DEVICE

A voltage suppression device for suppressing voltage surges in an electrical circuit having a voltage sensitive assembly comprised of a plurality of tubular sections within a tubular casing. 1. A disposable voltage suppression device for suppressing voltage surges in an electrical circuit , said device comprised of:a tubular casing formed of an electrically insulating material;a first conductive component attached to a first end of said casing;a second conductive component attached to a second end of said casing;a tubular voltage sensitive assembly within said tubular casing, said voltage sensitive assembly comprised of two or more tubular sections, said voltage sensitive assembly having a first surface and a second surface and a predetermined voltage rating across said first and second surfaces, said voltage sensitive assembly increasing in temperature as voltage applied across said first and second surfaces exceeds said voltage rating;a first terminal electrically connected to said first surface of said voltage sensitive assembly and to said first conductive component;a thermal element electrically connected to said second surface of said voltage sensitive assembly, said thermal element being an electrically conductive solid at room temperature and having a predetermined softening temperature;a second terminal electrically connected to said second conductive component, said second terminal having a contact portion in electrical connection with said second surface of said voltage sensitive assembly, said voltage sensitive assembly sensing the voltage drop between said first conductive element and said second conductive element, said second terminal being maintained in electrical contact with said voltage sensitive assembly by said thermal element and being biased away therefrom, wherein said second terminal moves away from electrical contact with said voltage sensitive assembly and breaks said electrical current path if an over-voltage condition sensed by said ...

Protective circuit in a windscreen wiper drive and windscreen wiper drive

The invention relates to a protective circuit ( 10 ) in a screen wiper drive ( 1 ), consisting of a parallel circuit having two circuit elements ( 16, 17 ), wherein one circuit element ( 16 ) consists of a capacitor ( 18 ) and the other circuit element ( 17 ) consists of a series-connection of a diode ( 19 ) and a Zener diode ( 20 ), wherein the forward direction of the diode ( 19 ) and the Zener diode ( 20 ) is different and the Zener diode ( 20 ) inhibits in the direction of a plus pole.

COMPACT TRANSIENT VOLTAGE SURGE SUPPRESSION DEVICE

A transient voltage surge suppression device includes a varistor assembly having a compact thickness, and a disconnect element carrying a separable contact along a linear axis to disconnect the varistor element from external circuitry. 1. A transient voltage surge suppression device comprising:a nonconductive housing; and a substantially planar varistor element having opposed first and second sides, the varistor element operable in a high impedance mode and a low impedance mode in response to an applied voltage;', 'a first terminal surface mounted to the first side of the varistor element;', 'a disconnect element mounted to the second side of the varistor element and movable along a linear axis between a first position and a second position; and', 'a second terminal mounted to the disconnect element., 'a varistor assembly comprising2. The device of claim 1 , wherein the disconnect element includes an aperture claim 1 , and the device further comprising a conductive element applied to the aperture.3. The device of claim 2 , wherein the conductive element includes a first side claim 2 , the second terminal surface mounted to the first side of the conductive element.4. The device of claim 3 , wherein the conductive element includes a second side opposing the first side claim 3 , and the second side of the conductive element is surface mounted to the second side of the varistor element.5. The device of claim 1 , wherein the second terminal is substantially planar.6. The device of claim 5 , wherein the second terminal is asymmetrical.7. The device of wherein the second terminal comprises a first section and a second section offset from to the first section.8. The device of claim 7 , wherein the first section of the second terminal extends in a first direction and wherein the second section of the second terminal extends in a second direction opposite to the first direction.9. The device of claim 1 , wherein the varistor element is epoxy coated claim 1 , and wherein a ...

Overvoltage protection method using exposed device supply rail

A semiconductor device may be protected from over-voltages via a comparator-controlled, high-current FET coupled to the semiconductor device output and between circuit devices that carry high voltages. A three-terminal, N-channel field effect transistor (FET) may have its source coupled to the output of the semiconductor device to be protected from over voltage. The FET drain may be connected to the load to be driven by the semiconductor device. A transistor, or other voltage comparator, may be configured and connected in order to compare the voltage on the FET drain to a V max reference voltage. When a voltage on the FET drain exceeds V max , the comparator output may shut down the FET, thereby isolating the semiconductor device, which is connected to the FET source, from the overvoltage on the FET drain.

VOLTAGE MONITORING CIRCUIT, AND VEHICLE EQUIPPED WITH SAME

During charging of a cell module in which a plurality of cells are connected in series, a voltage is applied in forward polarity to a switch element even when a current interrupting switch provided to the cell module is open, thereby shorting an anti-fuse element, and the switch element is thereby opened. A voltage monitoring circuit and a vehicle equipped with the voltage monitoring circuit are thereby provided in which a high voltage is not applied even when the cell module is charging when the current interrupting switch is open 1. A voltage monitoring circuit for monitoring voltages across N chargeable and dischargeable series-connected cells of a battery module with a load being connected between a maximum potential and a minimum potential of the battery modules , and a current blocking switch being connected between at least a pair of adjacent ones of the cells , wherein N+1 wires are connected from positive terminals and negative terminals of the cells to the voltage monitoring circuit , the voltage monitoring circuit comprising:switching elements connected in series to respective ones of the N+1 wires apart from a wire carrying the maximum potential or the minimum potential, the switching elements being openable and closable by control signals from control lines branched from adjacent ones of the respective wires;resistive elements connected in series respectively to the control lines between control input terminals of the switching elements and the adjacent ones of the respective wires; andanti-fuse elements connected respectively between the control input terminals and the respective wires, the wires being disconnected and connected when the switching elements are opened and closed.2. The voltage monitoring circuit according to claim 1 , further comprising:capacitors connected in parallel with the resistive elements, respectively.3. The voltage monitoring circuit according to claim 1 , wherein the switching elements comprise semiconductor switches that are ...

ELECTRO-STATIC DISCHARGE POWER SUPPLY CLAMP WITH DISABLEMENT LATCH

The described devices, systems and methods include an electro-static discharge clamp with a latch to prevent false triggering of an electro-static discharge protection circuit in response to fluctuations in a power supply rail. 1. A circuit for protecting integrated circuitry comprising:an integrated circuit including a power supply node and a common node;a resistor coupled to the power supply node;a capacitor coupled to the common node and further coupled to the resistor to form a first node;a first inverter including a first inverter input coupled to the first node, a first inverter output coupled to a second node, and a clear input, wherein the first inverter is configured to output a logic low level upon assertion of the clear input;a second inverter including a second inverter input coupled to the second node, and a second inverter output coupled to the clear input of the first inverter;a first NFET including a gate coupled to the second node, a drain coupled to the power supply node, and a gate coupled to the common node.2. The circuit for protecting integrated circuitry of wherein the common node is a ground node of the integrated circuit.3. The circuit for protecting integrated circuitry of wherein the capacitor is a first capacitor claim 1 , and the circuit further includes a second capacitor coupled between an output of the second inverter and the common node.4. The circuit for protecting integrated circuitry of wherein the resistor is a dynamic resistor.5. The circuit for protecting integrated circuitry of wherein the capacitor is a metal oxide semiconductor (MOS) capacitor.6. The circuit for protecting integrated circuitry of claim 1 , wherein the first NFET includes an array of transistors. This application is a Divisional filing of U.S. patent application Ser. No. 12/913,060, filed Oct. 27, 2010, which claims the benefit of U.S. provisional patent application No. 61/256,742, filed Oct. 30, 2009, the disclosures of which are incorporated herein by ...

COMMUNICATION LINE ISOLATOR

An isolator is formed with an isolation transformer that blocks an abnormal voltage entering from a communication line and protects a protection target device . A pulse transformer in the device includes a primary winding connected to a secondary winding of the transformer and a secondary winding connected to an inner circuit. A medium tap of the primary winding is grounded through an inner capacitance Ci of the device . A parasitic capacitance Cs between the primary winding and the secondary winding of the transformer and the inner capacitance Ci are connected in series, an abnormal voltage is divided by the capacitance Cs and the capacitance Ci, and a capacitance value of the capacitance Cs is set such that the divided voltage of the capacitance Ci is equal to or below a predetermined value. 1. A communication line isolator that is configured with an isolation transformer including a primary winding connected to a communication line and a secondary winding connected to a protection target device that performs communication with the communication line , and blocks an abnormal voltage entering from the communication line to protect the protection target device , wherein:the protection target device has a function to transmit/receive a pulse signal to/from the communication line via a pulse transformer and perform the communication, the pulse transformer includes a primary winding connected to a side of the secondary winding of the isolation transformer and a secondary winding connected to an inner circuit side of the protection target device, and a medium tap in the primary winding of the pulse transformer is grounded through an inner capacitance of the protection target device; anda parasitic capacitance caused between the primary winding and the secondary winding in the isolation transformer and the inner capacitance are connected in series, the abnormal voltage is divided by the parasitic capacitance and the inner capacitance, and a capacitance value of the ...

Current leakage in rc esd clamps

Aspects of the invention provide an electrostatic discharge (ESD) protection device for eliminating current leakage, and a related method. In one embodiment, an ESD protection device includes: a resistor-capacitor (RC) circuit for receiving a power supply voltage; an ESD clamp including a plurality of n-type field-effect transistors (nFETs) for protecting the IC during an ESD event; a trigger circuit for receiving an output of the RC circuit and generating a trigger pulse to turn on the ESD clamp during the ESD event; and an nFET bias selection circuit connected to the trigger circuit, the nFET bias selection circuit for selecting one of: a low voltage supply or a negative bias voltage supply for the trigger circuit, such that the trigger circuit generates a trigger pulse, in response to selecting the negative bias voltage supply, to turn off the ESD clamp during normal operation.

ESD Protection System Optimized at Board Level

An electronic system protected against an incoming energy pulse, comprising a semiconductor device () connected in sequential order to a first impedance (), a coupling noise filter () having an internal frequency-dependent second impedance (), a third impedance (), a transient voltage suppressor (), a fourth impedance (), and an entry port exposed to the incoming energy pulse (). The fourth impedance has a size suitable for supporting the transient voltage suppressor in discharging a portion of the incoming energy pulse up to the full capability of the suppressor; the third impedance has a size suitable for supporting and synchronizing the performance of the coupling noise filter to filter common mode noise from two phase lags between differential signals; and the first impedance has a size suitable for diminishing, in combination with the second impedance as operational in the active frequency regime, the un-discharged portion of the energy pulse to a value under the device threshold failure current. 1. An electronic system protected against an incoming energy pulse , comprising:a semiconductor device connected in sequential order to a first impedance, a coupling noise filter having an internal frequency-dependent second impedance, a third impedance, a transient voltage suppressor, a fourth impedance, and an entry port exposed to the incoming energy pulse;the fourth impedance suitable for supporting the transient voltage suppressor in discharging a portion of the incoming energy pulse up to the full capability of the suppressor;the third impedance suitable for supporting and synchronizing the performance of the coupling noise filter to filter common mode noise from two phase lags between differential signals; andthe first impedance suitable for diminishing, in combination with the second impedance as operational in the active frequency regime, the un-discharged portion of the energy pulse to a value under the device threshold failure current.2. The system of ...

OUTPUT CIRCUITS WITH ELECTROSTATIC DISCHARGE PROTECTION

An output circuit is provided and includes first and second output stage elements, a detection circuit, a control circuit, and a first pre-driver. The first and second output stage elements are coupled in series between a power terminal and the ground terminal. The detection circuit detect whether an electrostatic discharge event occurs at an output terminal between the two output stage elements to generate a control signal. The control circuit controls a state of the first output stage element when the control circuit is enabled according to the control signal. The first pre-driver controls the state of the first output stage element when the first per-driver is enabled according to the control signal. When the detection circuit detects that the electrostatic discharge event occurs at the output terminal, the control circuit is enabled to turn on the first output stage element, and the first pre-driver is disabled. 1. An output circuit comprising:a first output stage element coupled to an output terminal of the output circuit and a ground terminal;a second output stage element coupled to the output terminal and a power terminal;{'b': '12', 'a detection circuit, coupled to the power terminal, for performing a detection operation to detect whether an electrostatic discharge event occurs at the output terminal to generate a control signal (S) at a first node;'}a control circuit, coupled to the first node, for receiving the control signal and controlling a state of the first output stage element when the control circuit is enabled according to the control signal; anda first pre-driver for receiving the control signal and controlling the state of the first output stage element when the first per-driver is enabled according to the control signal,wherein when the detection circuit detects that the electrostatic discharge event occurs at the output terminal, the control circuit is enabled according to the control signal to turn on the first output stage element to form a ...

ELECTROSTATIC DISCHARGE PROTECTION APPARATUS AND ASSOCIATED METHOD

An electrostatic discharge (ESD) protection apparatus, coupled between a first rail line and a second rail line, includes a clamp circuit and a detection circuit. The detection circuit includes an electronic element having an equivalent capacitance value, and a transistor having a gate, a first input and a second input respectively coupled to a first node, the first rail line and a drive terminal of the clamp circuit. In response to an ESD event, leakage currents pass between the first input and the gate and between the second input and the gate to equivalently form parasitic resistance therein, respectively. The parasitic resistances and the electronic element form a delay circuit to provide a drive voltage between the gate and the first input, and to provide a trigger current for conducting the clamp circuit, so that the first and second rail lines perform an ESD operation via the clamp circuit. 1. An electrostatic discharge (ESD) protection apparatus , comprising:a clamp circuit, coupled between a first rail line and a second rail line, the first and second rail lines respectively having a first reference voltage and a second reference voltage; and a first node;', 'an electronic element, coupled between the first node and the second rail line, having an equivalent capacitance value; and', 'a transistor, coupled to the first node;, 'a detection circuit, comprisingwherein, in response to an ESD event triggered between the first and second rail lines, a plurality of leakage currents correspondingly pass between a first input and a gate and between a second input and the gate of the transistor, and respectively in equivalence form a first parasitic resistance and a second parasitic resistance between the first input and the gate and between the second input and the gate; the first parasitic resistance and the second parasitic resistance and the electronic element form a delay circuit to provide a drive voltage between the gate and the first input for conducting the ...

SYSTEM AND METHODS FOR PROTECTION OF BATTER MODULES

A circuit includes multiple battery modules and protection circuits respectively coupled to the battery modules. Each protection circuit includes a controller and a shunt circuit. The controller is coupled to one of the battery modules and detects a fault associated with the battery module. The shunt circuit is coupled to the battery module and the controller, and shunts a current around the battery module if the fault associated with the battery module is detected by the controller. 1. A system comprising:a shunt circuit; andcontrol circuitry, coupled to said shunt circuit, said control circuitry operable for detecting a fault in a plurality of battery modules, operable for controlling said shunt circuit to shunt a first current flowing from a negative terminal of a battery module of said plurality of battery modules to a positive terminal of said battery module if said fault is associated with said battery module and occurs during a discharging process of said battery modules, and operable for controlling said shunt circuit to shunt a second current flowing from said positive terminal to said negative terminal if said fault is associated with said battery module and occurs during a charging process of said battery modules.2. The system as claimed in claim 1 , wherein said control circuitry determines presence of said fault by detecting a module voltage across said battery module and comparing said module voltage with a voltage threshold.3. The system as claimed in claim 1 , wherein said control circuitry determines presence of said fault by detecting a voltage change rate of a module voltage across said battery module.4. The system as claimed in claim 1 , wherein said shunt circuit comprises a bidirectional current path.5. The system as claimed in claim 4 , wherein said bidirectional current path comprises a first switch and a second switch coupled in series claim 4 , a first diode coupled in parallel with said first switch claim 4 , and a second diode coupled in ...

PROTECTION CIRCUIT

HDMI devices coupled to interfaces in environments with high voltages, for example in an automotive vehicle, may be damaged by a short circuit between a cable and a large DC voltage. A protection circuit () for the high speed TMDS lines of an HDMI interface includes a DC voltage source (), a pair of capacitors (C C) and a pair of splitters (). Each splitter is arranged to split a signal from respective one of the pair of electrical conductors between two signal paths, whereby one of the signal paths is coupled to the voltage source, and a second signal path is coupled to a first terminal of a respective one of the pair of capacitors. A signal received from an HDMI source () is split between a first path coupled to a first terminal of a respective capacitor and a second path coupled to the DC voltage source. The protection circuit can block a DC voltage on a cable () connected to the second terminals of the respective capacitors while providing a DC image of a receiver so allowing correct operation of a connected HDMI source. 1. A protection circuit for a High Definition Multimedia Interface (HDMI) , the protection circuit comprising:a pair of electrical conductors for carrying data transmitted as Transition Minimized Differential Signals,a pair of capacitors, each said capacitor having a first terminal and a second terminal, wherein the first terminal of each said capacitor is coupled to a respective one of the pair of electrical conductors,a voltage source operable to supply a DC voltage,a pair of splitters, each said splitter being coupled to a respective one of the pair of electrical conductors and arranged to split a signal from a respective one of the pair of electrical conductors between at least two signal paths, wherein one of the at least two signal paths is coupled to the voltage source, and a second of the at least two signal paths is coupled to a first terminal of a respective one of the pair of capacitors, and whereinin operation the protection circuit ...

DISCHARGE GAP-FILLING COMPOSITION AND ELECTROSTATIC DISCHARGE PROTECTOR

A discharge gap-filling composition including a metal powder (A), a binder component (B) and a diluent (C). The diluent (C) has two or more characteristic groups in a molecule, and the characteristic groups are not directly bonded to each other in a molecule but are bonded to each other through a hydrocarbon group or a silicon atom. 1. A discharge gap-filling composition comprising a metal powder (A) , a binder component (B) and a diluent (C) , wherein the diluent (C) has two or more characteristic groups in a molecule , and the characteristic groups are not directly bonded to each other in a molecule but are bonded to each other through a hydrocarbon group or a silicon atom.2. The discharge gap-filling composition as claimed in claim 1 , wherein the content of the binder component (B) is 10 to 90 parts by mass and the content of the diluent (C) is 50 to 10000 parts by mass claim 1 , based on 100 parts by mass of the content of the metal powder (A).3. The discharge gap-filling composition as claimed in claim 1 , wherein the characteristic groups of the diluent (C) are hydrophilic characteristic groups.4. The discharge gap-filling composition as claimed in claim 1 , wherein the characteristic groups of the diluent (C) are hydrophilic characteristic groups each containing at least one atom selected from the group consisting of a nitrogen atom claim 1 , an oxygen atom claim 1 , a phosphorus atom claim 1 , a sulfur atom and a halogen atom.5. The discharge gap-filling composition as claimed in claim 1 , wherein the characteristic groups of the diluent (C) are each selected from the group consisting of a hydroxyl group claim 1 , an oxy group at least one of two bonding hands of which is not bonded to a hydrocarbon group claim 1 , an oxo group claim 1 , a carbonyl group claim 1 , an amino group claim 1 , an imino group claim 1 , a halogen group claim 1 , an N-oxide group claim 1 , an N-hydroxyl group claim 1 , a hydrazine group claim 1 , a nitro group claim 1 , a nitroso ...

TEST DEVICE FOR POWER ENGINEERING EQUIPMENT AND METHOD FOR MANUFACTURING A TEST DEVICE FOR POWER ENGINEERING EQUIPMENT

A test device () for testing power engineering equipment comprises at least one connection socket () which is electrically connected to an overvoltage protection arrangement (). The overvoltage protection arrangement () comprises at least one overvoltage protection element () and is configured such that the at least one overvoltage protection element () is exchangeable. 1. A test device for testing power engineering equipment , comprising:a housing,at least one socket for receiving an input signal or outputting an output signal,an overvoltage protection arrangement comprising at least one overvoltage protection element and being electrically connected to the at least one socket, andwherein the overvoltage protection arrangement is configured such that the at least one overvoltage protection element is exchangeable.2. The test device according to claim 1 ,wherein the test device is configured to be a test device for testing operating resources of an electrical high or medium voltage system.3. The test device according to claim 1 ,wherein the overvoltage protection arrangement is configured such that the at least one overvoltage protection element is exchangeable without having to open the housing.4. The test device according to claim 1 ,wherein the at least one socket is electrically connected to the at least one overvoltage protection element via a diode arrangement.5. The test device according to claim 1 ,wherein the test device comprises a plurality of sockets which are each electrically connected to the overvoltage protection arrangement.6. The test device according to claim 1 ,wherein the test device comprises a plurality of sockets which are electrically connected to different overvoltage protection arrangements.7. the test device according to claim 1 ,wherein the at least one overvoltage protection element of the overvoltage protection arrangement is a suppressor diode or an overvoltage gas arrester.8. The test device according to claim 7 ,wherein the ...

Operational transconductance amplifier with increased current sinking capability

An amplifier circuit includes an input terminal and an output terminal. A current sinking transistor includes a first conduction terminal coupled to the output terminal and a second conduction terminal coupled to a reference supply node. A voltage sensing circuit has a first input coupled to the input terminal and a second input coupled to the output terminal. An output of the voltage sensing circuit is coupled to the control terminal of the current sinking transistor. The voltage sensing circuit functions to sense a rise in the voltage at the output terminal which exceeds the voltage at the input terminal, and respond thereto by activating the current sinking transistor.

ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

An electrostatic discharge (ESD) protection circuit, suitable for an input stage circuit including a first N channel metal oxide semiconductor (NMOS) transistor, is provided. The ESD protection circuit includes an P channel metal oxide semiconductor (PMOS) transistor and an impedance device, in which the PMOS transistor has a source coupled to a gate of the first NMOS transistor, and a drain coupled to a source of the first NMOS transistor, and the impedance device is coupled between a gate of the PMOS transistor and a first power rail to perform a initial-on ESD protection circuit. The ESD protection circuit formed by the PMOS transistor and the resistor is capable of increasing the turn-on speed of the ESD protection circuit and preventing the input stage circuit from a CDM ESD event. 1. An electrostatic discharge (ESD) protection circuit , suitable for an input stage circuit including a first N-channel metal oxide semiconductor (NMOS) transistor , the ESD protection circuit comprising:a P-channel metal oxide semiconductor (PMOS) transistor having a source coupled to a gate of the first NMOS transistor, and a drain coupled to a source of the first NMOS transistor; andan impedance device, coupled to the gate of the PMOS transistor directly and a first power rail.2. The ESD protection circuit according to claim 1 , wherein the drain of the PMOS transistor is directly coupled to a heavily doped N-type (N+) diffusion region used to form the source of the first NMOS transistor claim 1 , and coupled to a first ground rail through the N+ diffusion region.3. The ESD protection circuit according to claim 1 , wherein the impedance device is a resistor.4. The ESD protection circuit according to claim 1 , further comprising a capacitor coupled to the impedance device and a first ground rail claim 1 , wherein the gate of the PMOS transistor is coupled to a common node between the impedance device and the capacitor.5. The ESD protection circuit according to claim 4 , further ...

Switching device

In the present invention, a main switch circuit ( 13 ) is provided between an electric power line (PL), to which voltage outputted from a solar cell ( 11 ) is applied, and a battery module ( 12 ). A protection circuit ( 19 ) turns OFF the main switch circuit ( 13 ) to protect the battery module ( 12 ) from overcharging when the voltage (VBAT) of the battery module ( 12 ) is equal to or greater than an upper limit voltage. The voltage outputted from the solar cell ( 11 ) is set so as to be greater than the upper limit voltage to allow the battery module ( 12 ) to be charged to the upper limit voltage. When a charge ON command signal has been received, a control unit ( 18 ) turns ON only a sub-switch circuit ( 14 ) to introduce current from the solar cell ( 11 ) into a parallel circuit ( 15 ) and to suppress the voltage (VPL) of the power line (PL) to less than the upper limit voltage before turning ON the main switch circuit ( 13 ).

METHOD AND DEVICE TO PROTECT AN ESP POWER SUPPLY FROM TRANSIENT OVER-VOLTAGES ON THE POWER GRID

A power supply converter unit is disclosed, in particular for an electrostatic precipitator, converting the frequency of alternating input supply () to high frequency alternating output (Ua, Ub) by rectifying the alternating input supply () in a rectifier () to a direct current (Udc), which is converted to alternating-current in a full bridge inverter () in a H-bridge circuit with switches () controlled by a control unit (). According to the invention on the input side of the rectifier () and/or in the direct current (Udc) section there is provided at least one overvoltage protection circuitry (-). Furthermore the invention discloses a method of operation of such a power supply converter unit as well as uses of such a power supply converter unit. 1. A power supply converter unit for an electrostatic precipitator comprising:a rectifier for rectifying an alternating input supply to a direct current by converting a frequency to a high frequency alternating output;a full bridge inverter in a H-bridge circuit with switches controllable by a control unit for converting the direct current to an alternating current; andat least one overvoltage protection circuitry on an input side and/or in a direct current section of the rectifier.2. A power supply converter unit according to claim 1 , wherein the overvoltage protection circuitry comprises at least one voltage limiting circuitry limiting the maximum voltage between individual phases of the alternating input supply or between levels of the direct current claim 1 , respectively claim 1 , and the overvoltage protection circuitry further comprises at least one further voltage limiting circuitry limiting a maximum voltage between the individual phases of the alternating input supply and a ground or between the levels of the direct current and a ground.3. A power supply converter unit according to claim 1 , wherein the overvoltage protection circuitry further comprises at least one inductor in each phase of the alternating input ...