РАЗВЕТВИТЕЛЬ СИГНАЛА ДЛЯ МНОГОКАНАЛЬНОГО АНАЛОГО-ЦИФРОВОГО ПРЕОБРАЗОВАТЕЛЯ

Полезная модель относится к устройствам для преобразования и передачи информации и может быть использована в модульных системах сбора данных для коммутирования сигналов, поступающих с аналоговых источников сигнала, для их дальнейшей передачи и обработки. Разветвитель сигнала для многоканального АЦП содержит мультиплексор на входе. Разветвитель представляет собой корпус, в котором установлены печатная плата повторения сигнала с разъемами для подключения источников аналогового сигнала, выполненная с возможностью обеспечения питания источников аналогового сигнала от АЦП, печатная плата коммутации, подключенная к плате повторения сигнала, причем плата повторения сигнала содержит выходы в количестве, соответствующем количеству упомянутых разъемов и количеству каналов АЦП, а также операционные усилители, подключенные к разъемам и соединенные с выходами, при этом плата коммутации содержит разъем для подключения к АЦП. Техническим результатом заявленной полезной модели является расширение его функциональных ...

УСИЛИТЕЛЬ

Изобретение относится к схемам усилителя. Технический результат заключается в обеспечении широкополосного согласования входного импеданса с достижением достаточно высокой производительности при усилении с частотной избирательностью. Раскрыт усилитель (30) для схемы (15) приемника. Усилитель имеет входной узел (V) и выходной узел (V). Он содержит настраиваемый колебательный контур (100), соединенный с выходным узлом (V), цепь (200) схемы обратной связи, соединенную между выходным узлом (V) и входным узлом (V), и настраиваемый конденсатор (210), соединенный между внутренним узлом цепи (200) схемы обратной связи и узлом опорного напряжения. Также раскрыты схема приемника и устройство связи. 4 н. и 8 з.п. ф-лы, 10 ил.

Усилитель

Verfahren zum Linearisieren von Signalen und Anordnung zum Durchführen des Verfahrens

Elektrische Signalverstärkerschaltung

LEISTUNGSVERSTAERKER-VORRICHTUNG

Monolithisch integrierter Mikrowellenverstärker mit hoher Verstärkung

Monolithisch integrierter Mikrowellenverstärker mit hoher Verstärkung

DIFFERENTIAL-OPERATIONSVERSTAERKER MIT REGELBAREM VERSTAERKUNGSGRAD UND LASTKORREKTURSCHALTUNG DAFUER

Hochfrequenzverstärker-Anordnung für einen Hochfrequenzgenerator

Die Hochfrequenzverstärker-Anordnung (10) für einen Hochfrequenzgenerator, insbesondere für einen Hochfrequenzgenerator zum Betreiben eines Plasmagenerators, ist versehen mit einem Signalgenerator (12) für die Erzeugung eines hochfrequenten Signals; einem ersten Verstärker-Transistor (16a) zum Verstärken des vom Signalgenerator (12) erzeugten Signals; einem Ausgangsanschluss (20) zum Ausgeben des verstärkten Signals an eine externe Last (22); einem zwischen dem Signalgenerator (12) und dem ersten Verstärker-Transistor (16a) angeordneten Eingangsnetzwerk (14) zum Bereitstellen des hochfrequenten Signals am Eingang des Verstärker-Transistors (16); einem zwischen dem Verstärker-Transistor (16a) und der externen Last (22) angeordneten Ausgangsnetzwerk (18) zum Bereitstellen einer gewünschten Lastimpedanz für den Verstärker-Transistor (16a); und einer am Ausgangsanschluss (20) angeordneten, elektronischen Spannungsbegrenzungs-Anordnung (30) zum Begrenzen der am Ausgangsanschluss (20) anliegenden ...

Schaltungsanordnung mit einem Summen- und Differenzbildner fuer zwei Niederfrequenzsignale, insbesondere fuer stereophonische UEbertragung

Composite-operational amplifier e.g. single-step difference trans-conductance amplifier, has connector formed as amplifier's inverted input, and main-forward signal path whose input is connected with output of auxiliary-forward signal path

The amplifier has a main-forward signal path (M) whose signal output serves as an output (Uo) of the amplifier. The main-forward signal path and an auxiliary-forward signal path (A) are serially switched, and a signal input of the auxiliary-forward signal path serves as a non-inverted input (positive-IN) of the amplifier. Minus-inputs of trans-conductance amplifier parts are connected with each other, and an electrical connector forms as an inverted input (negative-IN) of the amplifier. An input of the main-forward signal path is connected with an output of the auxiliary-forward signal path.

VERSTAERKERSCHALTKREIS

TRANSISTORVERSTAERKER

FUNKSENDER

GEGENTAKT-VERSTAERKER

Verfahren zur Offsetkompensation eines Switched Capacitor-Verstärkers und Switched Capacitor-Verstärkeranordnung

Ein Verfahren zur Offset-Kompensation eines Switched-Capacitor Verstärkers umfasst eine Resetphase (1) und wenigstens eine Arbeitsphase (2). Dabei wird in der Resetphase (1) in Abhängigkeit einer Offset-Spannung (Voff) eine Ausgangsspannung (Vout) des Verstärkers (amp) gemäß einer gedämpften Schleifenverstärkung (AB(1)) auf einen ersten Verstärkereingang (ain1) geführt wird. In der wenigstens einen Arbeitsphase (2) wird in Abhängigkeit der Offset-Spannung (Voff) ein Offset des Verstärkers (amp) kompensiert, indem entsprechend einer Schleifenverstärkung (AB(2)) die Ausgangsspannung (Vout) einer Eingangspannung (Vin) des Verstärkers (amp) überlagert wird.

VERSTAERKER FUER HOCHFREQUENTE ELEKTRISCHE SCHWINGUNGEN

AMPLIFIER CIRCUIT

... 1325284 Transistor amplifying circuits TEKTRONIX Inc 31 Jan 1972 [19 March 1971] 4369/72 Heading H3T An amplifier circuit having a load capacitance 22 connected to its output terminal 20 includes first means 16, 18 for providing a low-frequency signal path between the input 12 and output 20 terminals of the amplifier, and is characterized by second means 28, 18 for providing a highfrequency signal between the input and output terminals of higher frequency response than the low-frequency path, with at least a portion 28 of the high-frequency path being separate from the low-frequency path; the low- and highfrequency paths being of substantially the same gain, and the high-frequency path having a frequency response overlapping that of the lowfrequency path. In the embodiment, a further transistor 38 forms a constant current source for the transistor 18, and in a second embodiment (Fig. 3, not shown) the collector of transistor 28 is not connected to the emitter 34 of transistor 18, but is ...

Apparatus, method, system and computer program for amplifying an audio signal

Wideband constant impedance amplifiers

In a differential input/differential output wideband transistor amplifier using series and shunt negative feedback over two stages to achieve constant impedance, feedback from unbypassed emitter resistors of a pair of output transistors is applied to the respective base electrodes of a pair of input transistors 1, 21, the collector electrodes of these input transistors being connected to the respective base electrodes of the output transistors. ...

Wideband constant impedance amplifiers

A baseband predistorter for a transmitter with combined downconversion and demodulation in the feedback path

A baseband predistorter for a transmitter in a radiotelephone is controlled by feedback from the power amplifier output. In the feedback path the functions of down conversion and demodulation are combined by combining the frequency conversion LO signal 215 and the modulator/demodulator signal 212 in mixer 224. 226 is a DC offset compensator. The feedback signal may be supplied to DSP 240 intermittently via switches 227 and AD converters 228.

Linear amplifier and Schmitt trigger using an analogue switch

Induction loop driving ampliflier

An audio frequency amplifier particularly for an induction loop system (19) wherein the input to said amplifier, consisting of stages (17, 18), includes a variable cut-off low pass filter (13). This filter controls the bandwidth of the amplifier in response to the detection of conditions approaching overloading of the amplifier by high amplitude high frequency signal components in such a manner as to reduce the high frequency response of the amplifier during periods when said high amplitude high frequency signal components might otherwise overload the amplifier. The filter (13) is controlled by a signal derived from the output of the amplifier (18), and fed via overload sensor (21) and time constant (22). The arrangement avoids resultant distortion of the amplifier output signal and also avoids the generation of radio frequency interference signals in the induction loop (19) connected to the amplifier output. The amplifier may be a current-driving amplifier or a voltage-driving amplifier ...

Radio frequency signal processing and amplification in cartesian loop amplifiers

ELECTRONIC SIGNAL AMPLIFIER

... 1382483 Transistor emitter follower amplifiers RCA CORPORATION 14 Feb 1972 [16 Feb 1971] 6765/72 Heading H3T An emitter follower 10 has negative feedback from collector to emitter through a path comprising two B insensitive current amplifiers 18, 26 and a common emitter amplifier 16. As shown in Fig. 1, the current feedback amplifiers are unity gain current mirrors. The collector voltage of the emitter follower is held close to the collector supply and the current mirrors provide a current at the collector of 20 equal to the collector current of 14. Any difference between this and a predetermined constant current supplied by resistor 30 is fed to the base of transistor 16 to maintain the collector current of transistor 14 substantially constant. Accordingly, the input signal may swing between values close to the supply voltages without substantial change in the voltage drop between base and emitter of transistor 14. In Fig. 2, the two current mirrors are arranged in parallel so that if ...

OSCILLATORS HAVING REDUCED MULTIPLICATIVE PHASE-NOISE

Reducing amplifier distortion by comparison of input and feedback from output

An amplifier circuit comprises a main amplifier (12) having an input (16) for receiving an input signal and an output (18) for delivering an output signal, a first feedback circuit (14) and a second feedback circuit (R1, R2). The first feedback circuit (14) comprises an attenuator (R3, R4,) which attenuates the output signal to the level of the input signal, a phase correction circuit (R8, C2, R9 C3) which compensates the input signal for phase changes occurring in the main amplifier (12) and a difference amplifier (22) which subtracts the attenuated output signal from the phase corrected input signal. The output of the difference amplifier (22) is amplified in an operational amplifier (23) and supplied to the main amplifier (12) as a negative feedback signal. In operation, the first feedback circuit (14) greatly reduces the level of distortion components in the output signal. ...

Linear amplifiers

Variable gain wideband amplifier

A phase compensation circuit for a low distortion audio amplifier

An audio power amplifier has multiple stages to provide a high open-loop gain at high audio frequencies, which allows the reduction of gain error, gain doubling, crossover distortion and other amplifier distortions by application of feedback around the amplifier. Closed-loop stability is provided by a compensation network comprising a phase lead capacitor 23 in the feedback branch and a phase lag network 24,25 between the feedback and input nodes.

Controller for an electromechanical transducer

A suppression circuit for suppressing unwanted transmitter output

The invention relates to a suppression circuit which allows at least one selected frequency to be excised from the output signal of an amplifier, such as an RF power amplifier 54. The circuit down-converts a feedback signal 52a derived from the amplifier output into baseband signals, which may be quadrature signals produced by mixers 58a&b. Each of the quadrature baseband signals may be inverted 64a&b and filtered 66a&b to remove signals falling outside the excision frequency band. The filtered quadrature signals are subsequently up-converted into an RF signal by mixers 70a&b, combined 72, and fed back to the input of the power amplifier via a coupler 74. Mixers 58a&b and 70a&b may receive a local oscillator signal from an oscillator 62 which operates at the excision frequency at which it is desired to suppress (fig.4: notch) a signal such as an intermodulation product from the output of the power amplifier. Multiple feedback loops may be provided (fig.3) to suppress multiple spurious signals ...

Common base bipolar rf amplifiers using feedback

Amplifier arrangements having low noise, low distortion and controlled input impedance, suitable for front-end radio frequency integrated circuits, in each of which a negative feedback path utilising two impedance elements of like argument is provided between output and input to control the input impedance.

Amplifier with adjustable ramp up/down gain for minimizing or eliminating pop noise

Wireless communication unit and transmitter circuit therefor

Signal change-over amplifier

A signal change-over amplifier for an FM receiver for switching over between AM and FM receiving modes without the addition of frequency response distortion or pop noise. The amplifier circuit includes two input signal control sections each of which includes a differential transistor pair. Activating current is fed to the emitters of the differential transistor pairs by a constant current source which is activated in response to the input control signal. The collectors of the transistor of the two input control sections are interconnected. The base of one transistor of one pair is coupled to the base of the corresponding transistor of the other pair. The input information-bearing signals are coupled to the bases of the other transistors in the two pairs. The interconnected collectors are coupled respectively to a transistor pair in an output section to which current is fed by a current mirror circuit. The final output is provided by a push-pull circuit. Feedback is provided between the ...

Impedance transformer device

... 1,029,107. Impedance transformer devices. BOLKOW G.m.b.H. Feb. 26, 1965 [Feb. 29, 1964], No. 8487/65. Heading H3T. An impedance transformer device includes an input transistor T1, the emitter of which is connected to the base of transistor T2, the collector of T1 being connected to the base of transistor T3, T2 and T3 being series connected and of complementary type to T1. Negative feedback is applied to the base of T1 from the emitter of T3. A variable resistor R3 is used to balance out any potential difference existing between the input and output points under no signal conditions.

RF transmitter and method of operation

Circuit arrangements utilising thermal feedback

... 1,021,206. Transistor amplifier circuits. TEXAS INSTRUMENTS Inc. Dec. 31, 1962 [Sept. 7, 1962], No. 49030/62. Heading H3T. [Also in Division H1] An electrical circuit utilizing thermal coupling comprises a plurality of electrically isolated circuit elements in a semi-conductor wafer which are externally coupled together, one of the elements generating heat in response to an electrical signal, the heat being transmitted through the wafer to another circuit element which is heat-responsive. Fig. 1 shows a highgain amplifier on which input signals are applied to the base of transistor 11, the collector of which is coupled through Zener diode 17 to the base of transistor 18. The output is taken from the collector of transistor 18 and a resistor 19 carrying the collector current is thermally coupled to transistor 11 to provide low-frequency or D.C. negative feed-back. Another transistor 21 acts as a reference by being differentially connected with transistor 18 by means of common emitter resistor ...

Improvements in or relating to transistorized amplifiers

... 1,057,762. Transistor amplifier circuits. TELEGRAPH CONDENSER CO. Ltd. Jan. 20, 1964 [Jan. 28, 1963], No. 2344/64. Heading H3T. A transistor amplifier comprises four direct coupled stages, the first and third 12, 20 being common emitter and the second and fourth 14, 22 common collector, the third being of complementary type to the fourth and overall negative feedback being provided between the emitters of the first and fourth stage. In Fig. 2 the feedback path comprises a series resistor 35 shunted by a capacitor 36 which reduces the gain at higher frequencies and the first emitter is partly shunted by a capacitor 17 to reduce the gain at low frequencies. A resistor (29), Fig. 3 (not shown), between the second stage emitter and base permits a higher standing current without lowering the load impedance and in Fig. 4 (not shown) the feedback path includes a distributed R.C. notch filter to make the amplifier frequency selective.

Improvements in and relating to electrical amplifier arrangements

A pre-amplifier arrangement for a magnetic replay head is shown. The amplifier arrangement is neither of the current mode type nor of the voltage mode type but is in the form of an amplifier 5 of inherent very high stability which is connected to receive the input from the head (represented by the inductance L and the resistance r) and with resistive feedback (represented by R). The amount of feedback is insufficient to affect the overall gain of the arrangement. Therefore, the amplifier produces an integral response due to its inherent open loop characteristic and high stability of the amplifier itself. The circuit is analysed to show that it produces increased separation between the low frequency and high frequency poles.

Improvements in or relating to transistorised amplifiers

... 965,666. Transistor amplifying circuits. PHILIPS ELECTRICAL INDUSTRIES Ltd. Dec. 15, 1960 [Dec. 18, 1959], No. 43213/60. Heading H3T. A transistor amplifier having a high imput impedance has the collector of a first emitterfollower transistor directly connected to the emitter of a second transistor, the base of the second transistor being connected for signals to the emitter of the first transistor and its emitter being connected for signals to a tapping on the emitter resistor of the first transistor. Signals from a high ohmic source are supplied through input terminals 1 to the base of emitter-follower transistor 2 having an emitter resistor constituted by partial resistors 3, 4, the collector of this transistor being directly connected to a second transistor 5 which has its base connected through blocking capacitor 6 to the emitter of transistor 2 and its emitter connected through blocking capacitor 7 to junction point 8. Since the signal voltages set up at the base and emitter of transistor ...

Amplifier

A radiofrequency amplifier 100 comprises an input 102 to receive a radiofrequency input signal; an output 132 to provide a radiofrequency output signal; a feedback loop 140 coupled to the output to provide a feedback signal dependent upon the output signal and to subtract the feedback signal from the input signal to obtain a subtracted signal; a demodulator 110 to demodulate the subtracted signal using a first carrier signal having a carrier frequency to obtain an in-phase component I and a quadrature component Q; a first filter 114 to filter the in-phase component to obtain a filtered in-phase component I; a second filter 116 to filter the quadrature component to obtain a filtered quadrature component Q; a modulator 120 to modulate a second carrier signal having the carrier frequency with the filtered in-phase component and the filtered quadrature component to obtain a modulated signal; and an amplifier 130 configured to amplify the modulated signal to obtain the radiofrequency output ...

Amplifier system for a transmitter

Transistor circuits

... 1,055,061. Transistor circuits. TRW SEMICONDUCTORS Inc. Jan. 7, 1964 [Jan. 8, 1963; April 23, 1963], No. 673/64. Heading H3T. A transistor amplifier is provided with negative feedback via an inversely-operated transistor so as to minimize the effects of temperature and radiation. Fig. 23 shows a common emitter amplifying stage 310 in which the emitter current is fed back to the base via an inversely-operated transistor 320, operating as a constant current device. The beta of the inversely-operated transistor 320 should be in the range 0À01-1À0. Fig. 21 shows a three-stage amplifier in which each stage comprises a pair of transistors as shown in Fig. 23, the inverselyoperated transistors 260, 2601 having an additional emitter to which the output 265 is connected. The transistors 270, 280 of stage 2 are of opposite conductivity type to the remaining transistors. The collector of the inverselyoperated transistor may be left open circuit or fed via a high-impedance load. Equivalent ...

CURRENT-DRIVING AMPLIFIERS

AMPLIFIERS

... 1313136 Amplifier and sample and hold circuits UNITED KINGDOM ATOMIC ENERGY AUTHORITY 27 April 1970 [5 May 1969] 22912/69 Heading H3T A negative feedback amplifier, or a gate-andhold circuit, having a capacitor producing a dominant lay, e.g. a compensating or storage capacitor, has the capacitor located in the input and output path of a current amplifier and a resistor across the input path of the amplifier to reduce leakage current. In the sample-andhold circuit shown, the storage capacitor is connected to a double emitter follower j4, j5, whereby the capacitor charges very quickly but thereafter allows the capacitor to maintain stability in the feedback loop. Constant currents I, I 2 and I 3 may be provided by transistors which, during the hold period, are cut-off. The capacitor may be connected in series with a resistor to resonate near the cut-off frequency of j1 and j2 to increase stability.

Improvements in or relating to Feedback Amplifier Systems

... 1,180,200. Negative feedback amplifying circuits. SIEMENS A.G. 26 July, 1967 [27 July, 1966], No. 61505/68. Divided out of 1,178,039. Heading H3T. In an amplifier having a first negative feedback path in series with both the input and output circuits of the amplifier, and a second negative feedback path in parallel with both the input and output circuits of the amplifier, the first feedback path takes the form of a twoterminal device #s comprising resistance and reactance in parallel, while the second feedback path is in the form of a T-network # 1 , # 2 , # p , at least one of the series arms of which is resistive: the shunt arm of the T-network is reactive and the ratio of its reactance to the reactance of the two terminal device is made less by 1 than the ratio of the resistance of the said one series arm and the resistance of the two-terminal network. It is shown in the Specification that if (1) the amplifier is terminated in a resistive load Z A and the input series arm # 1 of the ...

Improvements relating to parametric amplifiers

... 1,069,147. Parametric amplifiers. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. Aug. 4, 1964 [July 24, 1963], No. 30707/64. Heading H3B. In order to permit operation of a parametric amplifier including a resonant circuit containing a signal-varied capacitance at pump energies which would tend to cause instability, a succeeding amplifier is connected in cascade with the parametric amplifier and negative feedback is applied from the succeeding amplifier to the parametric amplifier to damp the resonant circuit. As shown a pump signal from pulse generator PG is applied over centretapped transformer TP to two circuit branches each including two crystal diodes C 1 , C 2 and C 3 , C 4 respectively biased in their reverse directions by different voltages -V 1 , -V 2 , the two branches being in series with inductor L and the series circuit tuned to the pump frequency. The input signal applied to terminals K 1 , K 2 is superposed on the bias voltage and varies the capacitances of the diodes so ...

CIRCUIT ARRANGEMENT INCORPORATING A TRANSISTOR AMPLIFIER

... 1,210,715. Transistor gain control circuits. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 6 June, 1968 [9 June, 1967], No. 26954/68. Headings H3T and H4R. In a transistor amplifier more particularly for use in hearing aids, in which a resistor 7, Fig. 1, in conjunction with capacitor 8 provides a D.C. negative feedback path stabilizing the amplifier, the resistor 7 is returned to the slider of a volume control 5 shunting the signal input source, i.e. microphone 4. In addition, the output of the amplifier may be rectified by diodes 11, 12, Fig. 2, and smoothed by a capacitor 14, and applied via a resistor to capacitor 8 or to the slider of potentiometer 5 to bias back the first transistor amplifier 1; the collector circuit of this includes a diode acting as a variable impedance, so varying the gain of the stage as its bias and the collector current changes.

Radio frequency signal processing and amplification in cartesian loop and other linear amplifiers

STABILIZED AMPLIFIER

... 1467059 Transistor amplifiers RCA CORPORATION 14 May 1974 [24 May 1973] 21246/74 Heading H3T The invention relates to an amplifier of the type comprising four transistors or compound transistors arranged in bridge formation. In the embodiment the compound transistors are 41, 42, 43 and 44 in each of which the commoned collectors are the equivalent emitter, the commoned emitters are the collector and the base is that of the common emitter input transistor. According to the invention a phase-splitter 201-204 and 251-253 provides a high impedance and sole source of quiescent bias and drive and a differential amplifier 50 provides negative feedback of at least the quiescent potential across the load. The embodiment is an integrated circuit in which the NPN transistors are vertical structures and the PNP of the lateral type. Input terminal T1 is coupled to an input amplifier 10 comprising an emitter coupled pair, which feeds a Darlington pair common collector stage 11, 12 followed by a common ...

AMPLIFIERS

... 1499980 Transistor amplifiers ACOUSTICAL MFG CO Ltd 14 Jan 1975 [17 Jan 1974] 02278/74 Heading H3T An amplifier with low distortion, e.g. a Class B A.F. amplifier, comprises a distortion-free amplifier 12 and a power amplifier 13 connected in cascade to a load 15 via an impedance 14, a shunt circuit 16 whereby current is fed to the load from the output of amplifier 12, and a circuit 17, 19 applying negative feedback from the amplifier side of 14 to the inputs of both amplifiers, any distortion from the amplifier 13 being cancelled by the amplifier 12. The condition for such cancellation is stated to be Z 14 Z 19 =Z 16 Z 17 . The transistors constituting the power amplifier 13 are denoted in the Specification by the term "current dumping" transistors.

PHASE SPLITTER

Improvements in or relating to transistor amplifiers

... 896,099. Transistor amplifier circuits. PHILIPS ELECTRICAL INDUSTRIES Ltd. Dec. 4, 1958 [Dec. 7, 1957], No. 39130/58. Class 40(6). A multi-stage transistor amplifier adapted to operate from a rectified A.C. supply has the final stage operated in common collector configuration with the collector connected to a poorly smoothed supply and its base effectively connected for D.C. to the collector of a preceding stage deriving its supply from a relatively well smoothed supply. In the Figure, an output stage 4 feeding a loud-speaker 5 derives its supply from the input of the smoothing circuit 9, 11, 12. The base of the transistor is connected through a further common collector stage to a common emitter stage 2 having its collector connected to the output of the smoothing circuit. It is arranged that the D.C. voltage across the loud-speaker is about half of that applied to the transistor 4 ...

EQUALIZER CIRCUIT

AMPLIFYING INTEGRATED CIRCUIT CONSTRUCTED IN ACCORDANCE WITH THE MOSFET TECHNOLOGY

... 1470020 Integrated circuits COMMISSARIAT A L'ENERGIE ATOMIQUE 15 Jan 1975 [25 Jan 1974] 1782/75 Heading H1K [Also in Division H3] In the integrated circuit of a MOSFET amplifier, transistors on a common substrate are interdigitized to keep capacitance effects in balance between stages, allowing up to 2 Ám in relative displacement in the masks. FET's forming the amplifier inverter chain (Fig. 2, not shown) and identical FET's acting as loads have source diffusion zones 32, 321 seen in Fig. 3(a) and in section Fig. 3(b) with central drain zone 30. Over insulated layer 35 metallized deposit 34 forms the gate; total drain-source capacitance depends on the sum of capacitances across zones 36, 361, insensitive to centrality of drain 30. Twin FET's in the input stage are similar, Figs. 4(a), 4(b), being formed with split gate areas 44, 441. To maintain the capacitance of each in agreement with those in the amplifier stages, the ratio of length to width of zones 46, 46 ...

TRANSISTOR AMPLIFIER

... 1497194 Transistor amplifiers RCA CORPORATION 1 July 1975 [5 July 1974] 27702/75 Heading H3T A transistor amplifier, particularly if integrated, in which differential input potentials at 101, 102 are acceptable if in the neighbourhood of a reference level (earth), swinging both above and below, comprises differentially coupled input PNP transistors 105, 106 with collectors directly connected to the collectors of a pair of complementary transistors 131, 132, these having common bases fed via common-mode feedback loops which maintain the collector-emitter potential of transistors 131, 132 below their base-emitter potential but above saturation level, and the input terminal quiescent level near earth potential. The commonmode loops run from the collectors of 105, 106 through potential shift stages 107-109 and 108-110 and through differential NPN output stage 111, 112 with NPN transistor 133 as emitter load; taking the base-emitter voltage of each transistor as a uniform value (0À65 V), and ...

Improvements in or relating to negative feedback amplifier arrangements

... 892,426. Transistor amplifying circuits. GENERAL ELECTRIC CO. Ltd. Dec. 7, 1960 [Dec. 7, 1959], No. 41487/59. Class 40(6). A negative feedback amplifier, as shown comprising a three-stage resistance-capacity coupled transistor amplifier with feedback over network 6, is stabilized by means of a two-terminal impedance network 7 connected across one of the interstage coupling impedances. According to the invention a suitable configuration for the network 7 is determined by breaking the feedback path at the point 10 and connecting a variable frequency oscillator 11 to it, connecting an appropriate load 12 to the output of the amplifier and measuring the frequency response. The difference between this and the desired response is calculated and network 7 chosen so as to produce a corresponding insertion loss.

High input impedance direct-coupled transistor amplifier

... 1,055,411. Transistor amplifier circuits. LEEDS & NORTHRUP CO. Sept. 3, 1964 [Sept. 27, 1963], No. 36150/64. Heading H3T. An amplifier comprises a first transistor having its emitter conductively connected to the base of the last stage which latter has in its emitter circuit a resistance 15 which carries he D.C. current of all the transistors and is included in the input and output circuit of the amplifier, the collector of the last transistor being connected to the supply through a first resistance 16 of the same order as or higher order than the emitter resistance 15 and to the base of the first stage through a second resistance having an impedance 14, 14b of the order of megohms and greater than the first and emitter resistances. A capacitor 18 may bypass signals in the feedback circuit and a capacitor 22 may by-pass high frequency noise. The collector of transistor 11 may operate at a reduced potential (Fig. 2, not shown) and an additional emitter follower may be interposed between ...

YOKE DRIVERS

... 1,259,864. Deflection circuits. AMPEX CORP. 27 Feb., 1969 [1 March, 1968], No. 10667/69. Heading H3T. A deflection circuit comprises an amplifier 10, 36, 38, 40 having an energy-storing inductive load 72 feeding a yoke winding 22 and having means 70 for limiting the output voltage during flyback and including feedforward and feedback paths. As described, the input signal at 14 is amplified at 10 and passed via transistor 36 to a long tailed pair of transistors 38, 40. A rapid flyback is produced in yoke 22 when transistor 40 is cut off due to the energy stored in inductor 22, resistor 76 damping any ringing. A linearizing feedforward loop 28 and a negative feedback loop 24 are included.

Class d amplifier circuit

STAGE TRANSFORMER FOR ELECTRICAL SIGNALS

FIELD-EFFECT TRANSISTOR AMPLIFIER

PHASECORRECTED MILLER COMPENSATION OF CHOPPERS AND INTERLOCKED CHOPPER STAR CORE

STUFENUMFORMER FUER ELEKTRISCHE SIGNALE

ACHIEVEMENT AMPLIFIER ON THE BASIS OF A LINEARIZED SWITCH

TRANSMITTER WITH CARTESIAN LOOP AND PROCEDURE FOR ADJUSTMENT AN OUTPUT LEVEL OF SUCH A TRANSMITTER

ATTITUDE CIRCUIT

CLASS E RADIO FREQUENCY MORE LEISTUNGSVERSTÄRKER WITH FEEDBACK CONTROL

PREVENTION OF THE SATURATION AND REDUCTION OF THE DISTORTION OF AN AMPLIFIER

DEVICE FOR SUPERVISING NONLINEAR DISTORTIONS OF RADIO SIGNALS AND PROCEDURES FOR IT

ACHIEVEMENT AMPLIFIER

SATURATION DETECTION AND CORRECTION FOR ACHIEVEMENT AMPLIFIERS

Multi-level transistorisierter alternating voltage amplifier with DC voltage-free entrance and exit

Thermoplastic molding materials on the basis of satisfied polyesters and polymers

Multi-level alternating voltage amplifier

RADIO TRANSMITTER CAPABLE OF COMPENSATING FOR A FREQUENCY CHARACTERISTIC OF AN ANTENNA AND/OR A COUPLING CIRCUIT

Apparatus and method for reducing interference

Low-complexity nonlinear filters

WIDE-BAND TRANSISTOR AMPLIFIER

SELF-BIASED COMPLEMENTARY TRANSISTOR AMPLIFIER

CITIZENS BAND TRANSMITTER WITH OVERALL ENVELOPE FEEDBACK FROM ANTENNA COUPLING FILTER

C-3028 D-2,403 A citizens band transmitter employing negative overall envelope feedback in the final RF stage obtains the feedback signal from a filter in the antenna coupling network which has a phase shift of 90 degrees or an odd multiple thereof at the radio frequency. A pair of detector diodes have their cathodes connected to opposite ends of filter and their anodes connected to a low pass filter to provide an envelope of the higher of the two voltages at either end of the filter in the coupling circuit in negative feedback to the modulating signal.

HIGH-GAIN IC AMPLIFIER

An amplifier of the type having a differential input stage driving an active load which produces a singleended output directed to a voltage-gain stage. The gain of the amplifier is isolated from the effects of load changes by a biasing circuit which forces the differential input stage to remain balanced at all times.

STABILIZED AMPLIFIER

FEEDBACK AMPLIFIER

CITIZENS BAND TRANSMITTER WITH OVERALL ENVELOPE FEEDBACK FROM ANTENNA COUPLING FILTER

AUTOMATIC EXPOSURE CONTROL SYSTEM WITH FAST LINEAR RESPONSE

AMPLIFIER

An amplifier (30) for a receiver circuit (15) is disclosed. The amplifier has an input node (Vin) and an output node (Vout). It comprises a tunable tank circuit (100) connected to the output node (Vout), a feedback circuit path (200) connected between the output node (Vout) and the input node (Vin), and a tunable capacitor (210) connected between an internal node of the feedback circuit path (200) and a reference-voltage node. A receiver circuit and a communication apparatus is disclosed as well.

STABILIZED AMPLIFIER

CLIPPED AMPLIFIER

ABSTRACT OF THE DISCLOSURE A clipping circuit for an amplifier, the clipping circuit using a tunneling junction. A molecular or other tunneling electronic-based component within a hybrid analog-tunneling circuit is used to produce soft or hard clipping capability with enhanced control over the output. The circuit may be used as a distortion circuit for an electric guitar signal or other electronic signals.

A SUPPRESION CIRCUIT FOR SUPPRESSING UNWANTED TRANSMITTER OUTPUT

The invention relates to a frequency suppression circuit arrangement, which allows at least one selected frequency band to be suppressed by coupling the frequency suppression circuit between the input and output of an RF power amplifier. The frequency circuit in the embodiments of the invention down-converts a feedback signal derived from the amplified output signal into baseband signals. Each of the baseband signals is fed into an inverting amplifier to generate a negative baseband signal. The negative baseband signal is subsequently filtered to selectively pass the negative baseband signal. The filtered signal is subsequently up-converted into an RF signal. The up-converted RF signal is combined and provided to a coupler connected at the input of the power amplifier such that when the input signal is amplified by the RF power amplifier any signals at the selected frequency can be suppressed.

Method and system for a feedback transimpedance amplifier with sub-40khz low-frequency cutoff

A system for a feedback transimpedance amplifier with sub-40 khz low-frequency cutoff is disclosed and may include amplifying electrical signals received via coupling capacitors utilizing a transimpedance amplifier (TIA) having feedback paths comprising source followers and feedback resistors. The feedback paths may be coupled prior to the coupling capacitors at inputs of the TIA. Voltages may be level shifted prior to the coupling capacitors to ensure stable bias conditions for the TIA. The TIA may be integrated in a CMOS chip and the source followers may comprise CMOS transistors. The TIA may receive current-mode logic or voltage signals. The electrical signals may be received from a photodetector, which may comprise a silicon germanium photodiode and may be differentially coupled to the TIA. The chip may comprise a CMOS photonics chip where optical signals for the photodetector in the CMOS photonics chip may be received via one or more optical fibers.

Improved control of switcher regulated power amplifier modules

Various embodiments described herein relate to a power management block and an amplification block used in the transmitter of a communication subsystem. The power management block provides improved control for the gain control signal provided to a pre-amplifier and the supply voltage provided to a power amplifier which are both in the amplification block. The power expended by the power amplifier is optimized by employing a continuous control method in which one or more feedback loops are employed to take into account various characteristics of the transmitter components and control values.

Linear amplifier

There is provided a linear amplifier capable of suppressing a reduction in bandwidth and reducing a ripple voltage by using a source follower and a local feedback loop. The linear amplifier includes an amplifier amplifying an input signal according to a difference in signal level between the input signal and a feedback signal, and a buffer buffering a signal amplified in the amplifier by a source follow method, suppressing a reduction in bandwidth of the signal, outputting the signal, and providing the buffered signal to the amplifier as the feedback signal.

Ground Partitioned Power Amplifier for Stable Operation

Achievement of robust stability of a power amplifier (PA) that allows the sharing of the ground between the driver stages and the output stage is shown. A controlled amount of negative feedback is used to neutralize the local positive feedback that results from the driver-to-output stage ground sharing in the signal path, for example, a radio frequency (RF) signal path. The solution keeps a strong drive and a good performance of the PA. Exemplary embodiments are shown for the PA positive feedback neutralization. A first embodiment uses a ground signal divider while another embodiment uses a ground signal divider weighting technique.

Transimpedance amplifier, integrated circuit and system

An integrated circuit according to one embodiment includes a first transimpedance amplifier and a second transimpedance amplifier. In the integrated circuit, one of the first transimpedance amplifier and the second transimpedance amplifier is set into an enabled state and the other is set into a disabled state. The first transimpedance amplifier and the second transimpedance amplifier share an input transistor. The first transimpedance amplifier has a first resistor provided between a feedback node thereof and an input node connected to the input transistor. The second transimpedance amplifier has a second resistor provided between a feedback node thereof and the first resistor. A feedback resistor of the second transimpedance amplifier is configured with a series connection of the first resistor and the second resistor.

Transmitter and communication device

Provided is a transmitter that compensates for AM/PM distortion and operate with low distortion and high efficiency. A compensation section 22 calculates an amplitude signal M representing the magnitude of a vector consisting of I PL and Q PL signals which pass through LPFs 14 and 15 , respectively, thereby predicting variation of the envelope of a radio frequency signal Pi, which variation occurs due to I p ′ and Q p ′ signals passing through LPFs 12 and 13 , respectively. The compensation section 22 calculates a phase compensation amount θcomp, based on the calculated amplitude signal M, and adds the phase compensation amount θcomp to a phase signal θ.

Circuit and Power Amplifier

A cascode circuit includes a first transistor and a second transistor. The first transistor and the second transistor are connected to make a cascode. In addition, the circuit has a block capacitance which is connected between a control terminal of the second transistor and a source terminal of the first transistor. In addition, the circuit has a feedback element which is connected between a drain terminal of the second transistor and a control terminal of the first transistor.

Combined filter and transconductance amplifier

Embodiments of circuitry, which includes an operational transconductance amplifier and a passive circuit, are disclosed. The passive circuit is coupled to the operational transconductance amplifier. Further, the passive circuit receives an input signal and the operational transconductance amplifier provides an output current, such that the passive circuit and the OTA high-pass filter and integrate the input signal to provide the output signal.

Audio amplifier

An amplifier includes: a first operational signal path arranged to generate a first pre-output signal according to an input signal under a first operating mode of the amplifier; a second operational signal path arranged to generate a second pre-output signal according to the input signal under a second operating mode of the amplifier; and an output stage, coupled to the first operational signal path and the second operational signal path, for outputting a first output signal according to the first pre-output signal under the first operating mode and outputting a second output signal according to the second pre-output signal under the second operating mode, wherein the first operational signal path and the second operational signal path are arranged to share at least one common circuit element for generating the first pre-output signal and the second pre-output signal under the first operating mode and the second operating mode, respectively.

Communication system with band, mode, impedance and linearization self-adjustment

A communication system is provided, including an antenna, a PA, a linearization circuit to enhance linearity, a filter system, and a controller. The controller is configured to receive information on the signals and conditions, and based on the information the controller controls one or more of the antenna, the PA, the linearization circuit and the filter system to provide an optimum configuration to meet specifications of signal properties under the conditions. The controller may look up a registry having entries regarding the specifications of signal properties under conditions in terms of predetermined parameters.

LINEAR AMPLIFIER THAT PERFORM LEVEL SHIFT AND METHOD OF LEVEL SHIFTING

A linear amplifier that comprises a signal input terminal that receives an input signal having a first common mode voltage, a voltage amplifier having a non-inverting input terminal that receives a second common mode voltage, a first and a second input resistance connected in series from the signal input terminal to the inverting input terminal of the voltage amplifier, a feedback resistance connected between the inverting input terminal and the output terminal of the voltage amplifier, and a constant current source. The constant current source supplies a constant current to a middle node between the first and the second input resistances. The constant current generates a voltage drop, which is equal to a difference between the first and the second common mode voltages, across the first input resistance. Accordingly, the common mode voltage of the output signal is directly determined by the second common mode voltage. 1. A linear amplifier comprising:a signal input terminal that receives an input signal having a first common mode voltage;a voltage amplifier having an inverting input terminal, a non-inverting input terminal to which a second common mode voltage is supplied, and an output terminal that outputs an output signal;a first and a second input resistance connected in series from the signal input terminal to the inverting input terminal of the voltage amplifier;a feedback resistance connected between the inverting input terminal and the output terminal of the voltage amplifier; anda constant current source that supplies a constant current to a middle node between the first and second input resistances, the constant current generates a voltage drop, which is equal to a difference between the first and second common mode voltages, across the signal input terminal and the middle node.2. The linear amplifier according to claim 1 , wherein the constant current source includes:a current generating resistance connected between the first and second common mode ...

AUTO-ZERO AMPLIFIER AND FEEDBACK AMPLIFIER CIRCUIT USING THE AUTO-ZERO AMPLIFIER

In aspects of the invention, at normal operation, an operational amplifier circuit has feedback applied from the output thereof to the input thereof so that currents equal to each other flow in differential pair transistors, respectively. While, in order that currents equal to each other may flow in the differential pair transistors, respectively, for compensating the difference in threshold voltages in the differential pair transistors, a voltage lower by a certain voltage difference than the voltage applied to the gate terminal of the transistor must be applied to the gate terminal of the transistor. From this, the switching of switches, when a virtual short circuit occurs, can make the output voltage of the operational amplifier circuit become a signal in which positive and negative rectangular ripples, with the values thereof being proportional to the value of the certain voltage difference, are superimposed on a true value. 1. An operational amplifier circuit comprising:a non-inverting input terminal and an inverting input terminal;an output terminal;a constant current producing transistor;a differential pair of transistors comprising a first transistor and a second transistor the source terminals of which are connected to the drain terminal of the constant current producing transistor and which carry out a differential operation in a pair, the first transistor and the second transistor having the same conduction type as the conduction type of the constant current producing transistor;an input switching circuit carrying out switching between a first connection state and a second connection state, the first connection state being a state in which the non-inverting input terminal is connected to the gate terminal of the first transistor and, along with this, the inverting input terminal is connected to the gate terminal of the second transistor, and the second connection state being a state in which the inverting input terminal is connected to the gate terminal ...

Mobile wireless communications device with selective power amplifier control and related methods

A mobile wireless communications device may include a processor, a modulator coupled downstream from the processor, a power amplifier coupled downstream from the modulator and having a control voltage input, an antenna coupled downstream from the power amplifier, and a feedback path coupled between the antenna and the processor. The processor may be coupled to the control voltage input of the power amplifier, and may be configured to determine an adjacent channel leakage value based upon the feedback path and to selectively set a control voltage for the power amplifier based upon the adjacent channel leakage value.

Multiple power mode amplifier

A multiple power mode amplifier includes: N amplifiers connected in series via switches; and a control circuit for controlling the N amplifiers in accordance with the output modes. P amplifiers out of the N amplifiers constitute a driver amplifier, and constitute a negative feedback amplifier including a feedback circuit for negatively feeding back its own output signal to its own input side. N−P amplifiers constitute a final stage amplifier connected in series to the negative feedback amplifier in a disconnectable manner. The control circuit is configured to: in a first output mode, disconnect the final stage amplifier from the negative feedback amplifier, and disable the feedback circuit; and in a second output mode, connect the final stage amplifier in series to the negative feedback amplifier, and enable the feedback circuit.

SEMICONDUCTOR DEVICE

Power consumption of a signal processing circuit is reduced. Further, power consumption of a semiconductor device including the signal processing circuit is reduced. The signal processing circuit includes a reference voltage generation circuit, a voltage divider circuit, an operational amplifier, a bias circuit for supplying bias current to the operational amplifier, and first and second holding circuits. The first holding circuit is connected between the reference voltage generation circuit and the bias circuit. The second holding circuit is connected between the voltage divider circuit and a non-inverting input terminal of the operational amplifier. Reference voltage from the reference voltage generation circuit and reference voltage from the voltage divider circuit can be held in the first and second holding circuits, respectively, so that the reference voltage generation circuit can stop operating. Thus, power consumption of the reference voltage generation circuit can be reduced. 1. A semiconductor device comprising:a first circuit electrically connected between a first terminal supplied with first power supply voltage and a second terminal supplied with second power supply voltage, the first circuit configured to output first reference voltage and second reference voltage;a second circuit electrically connected between the first terminal and the second terminal, the second circuit configured to divide the second reference voltage to output third reference voltage;a first switch electrically connected between the first terminal and the first circuit and turned on or off in accordance with a first signal;an operational amplifier whose non-inverting input terminal is supplied with the third reference voltage and whose inverting input terminal is supplied with output voltage;a third circuit configured to supply bias current to the operational amplifier;a fourth circuit electrically connected between the first circuit and the third circuit, the fourth circuit ...

System and Method for a Low Noise Amplifier

In accordance with an embodiment, a low noise amplifier (LNA) includes a transistor, and a transformer having a first winding coupled between a LNA input terminal and a control node of the transistor, and a second winding magnetically coupled to the first winding coupled between a reference node of the transistor and a LNA reference terminal. An output of the LNA is coupled to an output node of the transistor.

SEMICONDUCTOR INTEGRATED CIRCUIT AND RADIO COMMUNICATION TERMINAL INCLUDING THE SAME

A semiconductor integrated circuit includes an operational amplifier that amplifies a voltage difference between an input voltage supplied to an inverting input terminal and a reference voltage supplied to a non-inverting input terminal and outputs an amplified signal, a feedback resistor that performs negative feedback of the amplified signal to the inverting input terminal of the operational amplifier, and a variable resistor unit that sets a current path with a first resistance value in accordance with a control signal between an external input terminal and the inverting input terminal of the operational amplifier, and sets a first alternative path with a second resistance value in accordance with the control signal between a node on the current path and a reference voltage terminal to which the reference voltage is supplied. 1. A semiconductor integrated circuit comprising:an operational amplifier that amplifies a voltage difference between an input voltage supplied to an inverting input terminal and a reference voltage supplied to a non-inverting input terminal and outputs an amplified signal;a feedback resistor that performs negative feedback of the amplified signal to the inverting input terminal of the operational amplifier; anda variable resistor unit that sets a current path with a first resistance value in accordance with a control signal between an external input terminal and the inverting input terminal of the operational amplifier, and sets a first alternative path with a second resistance value in accordance with the control signal between a node on the current path and a reference voltage terminal to which the reference voltage is supplied.2. The semiconductor integrated circuit according to claim 1 , wherein the variable resistor unit sets the first alternative path between the inverting input terminal of the operational amplifier and the reference voltage terminal.3. The semiconductor integrated circuit according to claim 2 , wherein the variable ...

TRANSIMPEDANCE AMPLIFIER

A method of forming a circuit includes forming a transimpedance amplifier having a first input node and a second input node. The method also includes forming a feedback circuit having a first transistor having a drain terminal connected to the first input node, a source terminal, and a gate terminal, a second transistor having a drain terminal connected to the second input node, a source terminal, and a gate terminal, and a third transistor having a drain terminal connected to the source terminal of the first transistor and the source terminal of the second terminal. 1. A method of forming a circuit comprising;forming a transimpedance amplifier having a first input node and a second input node;forming a feedback circuit comprising a first transistor, a second transistor, and a third transistor;connecting a drain terminal of the first transistor to the first input node;connecting a drain terminal of the second transistor to the second input node; andconnecting a drain terminal of the third transistor to a source terminal of the first transistor and to a source terminal of the second transistor.2. The method of claim 1 , wherein the third transistor comprises a gate terminal connected to a bias voltage source.3. The method of claim 1 , wherein the transimpedance amplifier further comprises a first output node and a second output node.4. The method of claim 3 , further comprising connecting the first output node to a gate terminal of the first transistor via a low pass filter.5. The method of claim 4 , further comprising connecting the second output node to a gate terminal of the second transistor via the low pass filter.6. The method of claim 1 , further comprising forming a current output device connected to the first input node.7. The method of claim 6 , wherein the current output device is a photodiode.8. The method of claim 4 , wherein the transimpedance amplifier further comprises a first single-ended inverter portion and a second single-ended inverter portion.9. ...

Distortion-compensated rf transmitter and method therefor

An RF transmitter ( 10 ) includes an RF amplifier ( 28 ) that generates an amplified RF signal ( 36 ) including a linear RF signal ( 92 ) and a spurious baseband signal ( 94 ). The spurious baseband signal ( 94 ) interacts with bias feed networks ( 56, 66 ) to cause the RF amplifier ( 28 ) to generate an unwanted RF distortion at or near the allocated RF bandwidth. A baseband compensation signal ( 98 ) is generated and equalized in an adaptive equalizer ( 102 ) then fed to the RF amplifier ( 28 ). A feedback signal ( 46 ) is obtained from the RF amplifier ( 28 ) and used to drive the adaptive equalizer ( 102 ). A feedback loop causes the adaptive equalizer to adjust a baseband signal ( 24, 32 ) supplied to the RF amplifier ( 28 ) so that the RF distortion is minimized.

Instrumentation Amplifier and Signal Amplification Method

An instrumentation amplifier includes a first amplifier having one input connected to a first input of the instrumentation amplifier, a second amplifier having one input connected to a second input of the instrumentation amplifier, and a feedback network. The feedback network including an active filter having a first low pass filter characteristic with a first cut-off frequency in respect of differential mode signals at the first and second inputs of the instrumentation amplifier, and a second low pass filter characteristic with a second cut-off frequency in respect of common mode signals at the first and second inputs of the instrumentation amplifier. The disclosure also relates to a device for acquiring biopotential signals and a signal amplification method.

LOW-NOISE AMPLIFIER

A common source or common emitter LNA circuit for amplifying signals at an operating frequency f in a receiver circuit is disclosed. The LNA circuit comprises an input transistor arranged to, in operation, be biased to have a transconductance gat the operating frequency f, and having a first terminal, which is a gate or base terminal, operatively connected to an input terminal of the LNA circuit. The LNA circuit further comprises a shunt-feedback capacitor operatively connected between the first terminal of the input transistor and a second terminal, which is a drain or collector terminal, of the input transistor. Furthermore, the LNA circuit comprises an output capacitor operatively connected between the second terminal of the input transistor and an output terminal of the LNA circuit. The output capacitor has a capacitance value C Подробнее

TRANSIMPEDANCE AMPLIFIER WITH PULSE WIDENING

Mechanisms for evaluating amplitude for current pulses provided to a transimpedance amplifier (TIA) for current levels beyond the linear range of the TIA where clipping circuit(s) may limit the input voltage of the TIA are disclosed. In one aspect, an example TIA arrangement includes a clipping arrangement that includes multiple clipping circuits. Each clipping circuit can be biased by different bias voltages such that the different clipping circuits are activated at different input current amplitudes. Different clipping circuits can have different impedances, which can result in different recovery time characteristics. With the multiple clipping circuits in clipping arrangements discussed herein, a saturated dynamic range of a TIA can be divided into sub-regions and different pulse widening characteristics for each region may be defined, which may enable determination of amplitude for current pulses provided to the TIA even for current levels beyond the linear range of the TIA. 1. A transimpedance amplifier (TIA) arrangement , comprising:a TIA; and each of the first clipping circuit and the second clipping circuit is coupled to an input of the TIA,', 'an impedance of the second clipping circuit is larger than an impedance of the first clipping circuit, and', 'when the TIA is coupled to a device that is configured to sink current from the TIA, a bias voltage of the second clipping circuit is higher than a bias voltage of the first clipping circuit., 'a clipping arrangement comprising a first clipping circuit and a second clipping circuit, wherein2. The TIA arrangement according to claim 1 , wherein the bias voltage of the second clipping circuit is at least 100 millivolts (mV) higher than the bias voltage of the first clipping circuit.3. The TIA arrangement according to claim 1 , wherein the bias voltage of the second clipping circuit is higher than a voltage at the input of the TIA if an input current applied to the input of the TIA is equal to or greater than the ...

Linear fet feedback amplifier

A circuit that includes a Darlington transistor pair having an input transistor and an output transistor configured to generate an output signal at an output node in response to an input signal received through an input node is disclosed. The circuit has a feedback coupling network coupled between the output node and the input node for feeding back to the input node a portion of an amplified version of the input signal that passes through the input transistor. The circuit further includes a bias feedback network that includes a bias transistor and a resistive network that consists of only resistive elements such that no inductors and no capacitors are provided within the bias feedback network.

TRANSIMPEDANCE AMPLIFIER FOR RECEIVING BURST OPTICAL SIGNAL

A transimpedance amplifier converts an input current to a differential signal and outputs the differential signal. The transimpedance amplifier includes a single-ended amplifier configured to convert a current signal to a voltage signal, a first feedback circuit configured to generate a bypass current, a differential amplifier circuit configured to generate the differential signal in accordance with the difference between the voltage signal and a reference voltage signal, and a detector circuit configured to detect a start and an end of a burst optical signal. The detector circuit detects the end of the burst optical signal based on a peak value of the positive-phase component and a peak value of the negative-phase component and switches the time constant of the first feedback circuit from a first time constant to a second time constant smaller than the first time constant in response to detecting the end of the burst optical signal. 1. A transimpedance amplifier configured to convert an input current generated by a photodetector in accordance with a burst optical signal to a differential signal including a positive-phase component and a negative-phase component and output the differential signal , the transimpedance amplifier comprising:a single-ended amplifier configured to convert a current signal to a voltage signal;a first feedback circuit having a time constant, the first feedback circuit being configured to generate a bypass current at a response speed adjusted by the time constant;a differential amplifier circuit configured to generate the differential signal in accordance with a difference between the voltage signal and a reference voltage signal; anda detector circuit configured to detect a start and an end of the burst optical signal based on the differential signal, whereinthe first feedback circuit generates the bypass current in accordance with the difference between the voltage signal and the reference voltage signal and generates the current signal ...

Power Amplifier

A power amplifier includes a class D amplification section and a load current feedback circuit. The class D amplification section includes an input section and a switching section serving as an output stage and switched depending on a signal input to the input section, and outputs current from a power source to a load via the switching section. The load current feedback circuit negatively feeds back the current flowing in the load to the input section of the class D amplification section.

Transmission apparatus, output control method for transmission apparatus and transmission system

A transmission apparatus includes: an amplifier configured to amplify a transmission signal; a calculation unit configured to calculate a standing-wave ratio based on the transmission signal and a signal from an antenna to the amplifier; and a controller configured to switch a state of the amplifier based on the state of the amplifier and the standing-wave ratio.

WIRELESS RECEIVER

A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal. 1. A low noise amplifier (LNA) , comprising:a first transistor configured to provide a first transconductance; anda second transistor configured to provide a second transconductance; and an amplifier; and', 'a first resistor having a first end coupled to a first input of the amplifier and a second end, opposite the first end, coupled to a drain of the first transistor, wherein an output of the amplifier is coupled to a gate of the first transistor, and, 'a common-mode feedback circuit, wherein the common-mode feedback circuit compriseswherein the LNA is configured to use a sum of the first and second transconductances to amplify an input signal, and wherein respective source ends of the first and second transistors are coupled to a blocking capacitor.2. The LNA of claim 1 , wherein the first transistor is an n-type metal-oxide-semiconductor field-effect-transistor claim 1 , and the second transistor is a p-type metal-oxide-semiconductor field-effect-transistor.3. The LNA of claim 1 , further comprising:a second resistor having a third end coupled to the first input of the amplifier; anda third transistor having the first transconductance type, wherein a fourth end of the second resistor, opposite the third end, is ...

CONTROL CIRCUIT FOR USE WITH A FOUR TERMINAL SENSOR, AND MEASUREMENT SYSTEM INCLUDING SUCH A CONTROL CIRCUIT

A control circuit for use with a four terminal sensor, the sensor having first and second drive terminals and first and second measurement terminals, the control circuit arranged to drive at least one of the first and second drive terminals with an excitation signal, to sense a voltage difference between the first and second measurement terminals, and control the excitation signal such that the voltage difference between the first and second measurement terminals is within a target range of voltages, and wherein the control circuit includes N poles in its transfer characteristic and N−1 zeros in its transfer characteristic such that when a loop gain falls to unity the phase shift around a closed loop is not substantially 2π radians or a multiple thereof, where N is greater than 1. 1. (canceled)2. A control circuit configured to couple to a biological sensor , the control circuit comprising:an excitation output node configured to provide current for a variable impedance of the biological sensor;a sensor input configured to receive a signal indicative of a voltage across the variable impedance;an amplifier configured to receive the signal and to adjust an excitation voltage at the excitation output node based on a comparison of the signal and a reference voltage.wherein a feedback path of the amplifier is configured to provide a zero of a transfer characteristic of the control circuit at a frequency where the gain of the control circuit is greater than unity gain.3. The control circuit of claim 2 , wherein the transfer characteristic of the control circuit includes N poles and N−1 zeros; andwherein N is an integer greater than 2.4. The control circuit of claim 3 , wherein one of the N poles is implemented using an integrator.5. The control circuit of claim 3 , wherein a pole and zero pair of the N poles and the N−1 zeros is provided by a series combination of a capacitor and a resistor in a feedback loop of an operational amplifier.6. The control circuit of claim 2 , ...

OFF-STATE ISOLATION ENHANCEMENT FOR FEEDBACK AMPLIFIERS

A feedback amplifier having an improved feedback network including two cross coupled switches that isolate the amplifier from extraneous undesired electrical signals present in a system or network when the amplifier is turned off (i.e., in an off-state). The cross coupled switches interconnect two feedback paths of a feedback network to enable out-of-phase differential signals to be summed and effectively canceled. Further, the feedback amplifier provides on-stage advantages to enable different amplifier characteristics and parameter to be selectively engaged by turning on or turning off certain feedback networks. 1. A differential feedback amplifier comprising:a positive first line input corresponding to a negative first line output;a negative second line input corresponding to a positive second line output;a first feedback path extending from the first line output towards the first line input;a second feedback path extending from the second line output towards the second line input;wherein the first feedback path includes a first switch and a second switch, wherein the first switch couples the first feedback path to the positive first line input and the second switch cross couples the first feedback path to the negative second line input; andwherein the second feedback path includes a third switch and a fourth switch, wherein the third switch couples the second feedback path to the negative second line input and the fourth switch cross couples the second feedback path to the positive first line input.2. The differential feedback amplifier of further comprising:open and closed positions associated with each of the first switch, the second switch, the third switch, and the fourth switch;wherein an extraneous and undesired signal is isolated depending on the open and closed position of each switch.3. The differential feedback amplifier of claim 2 , wherein each of the first switch claim 2 , the second switch claim 2 , the third switch claim 2 , and the fourth switch ...

TRANSDUCER DRIVER CIRCUITRY

This application relates to method and apparatus for driving acoustic transducers, such as speakers or haptic transducers. A transducer driver circuit () has a hysteretic comparator () configured to compare, with hysteresis, an input signal (S) received at a first comparator input to a feedback signal (S) received at a second comparator input. Based on the comparison the hysteretic comparator () generates a pulse-width modulation (PWM) signal (S) at a comparator output (). An inductor () is coupled between the comparator output and an output node (). In use a resistive component (), which may comprise the transducer () is coupled to output node (). The inductor () and resistive component () provide filtering to the PWM signal (S). A feedback path extends between the output node () and the second comparator input to provide the feedback signal (S). 1. A transducer driver circuit comprising:an input node for receiving an input signal waveform;an output node for outputting a driving signal waveform into an acoustic output transducer:a hysteretic comparator configured to compare, with hysteresis, the input signal waveform received at a first comparator input to a feedback signal received at a second comparator input and to generate a pulse-width modulation (PWM) signal at a comparator output;an inductor coupled between the comparator output and the output node; anda feedback path between the output node and the second comparator input to provide the feedback signal.2. A transducer driving circuit as claimed further comprising a hysteresis controller for controlling hysteresis of the hysteretic comparator.3. A transducer driving circuit as claimed in wherein the hysteresis controller is configured to control the hysteresis of the hysteretic comparator based on the PWM signal.4. A transducer driving circuit as claimed in further comprising a time-to-digital-converter configured to receive the PWM signal and output a digital control signal based on a parameter of the PWM ...

POWER AMPLIFIER

A power amplifier, for a transmitter circuit is disclosed, which comprises at least one field-effect transistor having a gate terminal and a bulk terminal. The at least one field-effect transistor is configured to receive an input voltage at the gate terminal and a dynamic bias voltage at the bulk terminal. The power amplifier comprises a bias-voltage generation circuit configured to generate the dynamic bias voltage as a nonlinear function of an envelope of input signal. The input voltage is a linear function of the input signal. The bias-voltage generation circuit comprises a rectifier circuit configured to generate a rectified input voltage and an amplifier circuit, operatively connected to the rectifier circuit, configured to generate the dynamic bias voltage based on the rectified input voltage. The amplifier circuit is a variable-gain amplifier circuit and the power amplifier comprises a control circuit configured to tune the gain of the amplifier circuit. 1. A power amplifier , for a transmitter circuit , comprising:at least one field-effect transistor having a gate terminal and a bulk terminal, wherein the at least one field-effect transistor is configured to receive an input voltage at the gate terminal and a dynamic bias voltage at the bulk terminal; anda bias-voltage generation circuit,wherein the input voltage is a linear function of an input signal,wherein the bias-voltage generation circuit is configured to generate the dynamic bias voltage as a nonlinear function of an envelope of the input signal, and a rectifier circuit configured to generate a rectified input voltage; and', 'an amplifier circuit operatively connected to the rectifier circuit and configured to generate the dynamic bias voltage based on the rectified input voltage,', 'wherein the amplifier circuit is a variable-gain amplifier circuit, and', 'wherein the power amplifier comprises a control circuit configured to tune the gain of the amplifier circuit., 'wherein the bias-voltage ...

Class-d dynamic closed loop feedback amplifier

A circuit for stabilizing a Class-D audio amplifier having a loop bandwidth modulator configured to modulate a loop bandwidth of the amplifier as a function of one or more control signals, a tuned output filter terminator coupled to a low-pass filter and configured to provide stabilizing control feedback to loop bandwidth modulator, and a carrier injection system configured to provide a wide range fixed frequency operation. Also, a method of stabilizing a feedback network within a Class-D amplifier by providing a first feedback loop coupling an output of a PWM logic stage of the amplifier to an input circuit of the amplifier, providing a second feedback loop coupling an output of a switching output stage of the amplifier to the input circuit, and providing a third feedback loop coupling an output of a low-pass filter of the amplifier to the input circuit.

AMPLIFIER FOR MODULATING THE AMPLITUDE OF AN RF SIGNAL

An amplifier for modulating the amplitude of an RF signal, the amplifier including: a plurality of amplifier circuits, each circuit being connected to a first power source, each circuit including a charge storage device and an output across which a potential difference supplied by the first power source can be applied; a switching arrangement for switching connections between the first power source, the charge storage device, and the output in each amplifier circuit, wherein each circuit includes a first switched configuration in which the charge storage device is charged by the first power source and a second switched configuration in which the charge storage device, once charged, will apply an additional potential difference across the output. The amplifier is configured to vary the amplitude of the RF signal in proportion to the sum of the potential differences applied across the output in each amplifier circuit. 1. An amplifier for modulating the amplitude of an RF signal , the amplifier comprising:a plurality of amplifier circuits, each circuit being connected to a first power source, each circuit having a charge storage device and an output across which a potential difference supplied by the first power source can be applied;a switching arrangement for switching connections between the first power source, the charge storage device and the output in each amplifier circuit, wherein each circuit has a first switched configuration in which the charge storage device is charged by the first power source and a second switched configuration in which the charge storage device, once charged, will apply an additional potential difference across the output;the amplifier being configured to vary the amplitude of the RF signal in proportion to the sum of the potential differences applied across the output in each amplifier circuit.2. An amplifier according to claim 1 , wherein when a respective amplifier circuit is in the first switched configuration claim 1 , the first ...

TRANSIMPEDANCE AMPLIFIER WITH VARIABLE INDUCTANCE INPUT REDUCING PEAK VARIATION OVER GAIN

A transimpedance amplifier (TIA) structure includes an input node with a variable inductance component serving to reduce variation in peak amplitude over different gain conditions. According to certain embodiments, an inductor at the TIA input has a first node in communication with a Field Effect Transistor (FET) drain, and a second node in communication with the FET source. A control voltage applied to the FET gate effectively controls the input inductance by adding a variable impedance across the inductor. Under low gain conditions, lowering of inductance afforded by the control voltage applied to the FET reduces voltage peaking. TIAs in accordance with embodiments may be particularly suited to operate over a wide dynamic range to amplify incoming electrical signals received from a photodiode. 123-. (canceled)24. A method for reducing peaking at an amplifier output under low gain conditions between the amplifier output and an output signal of a photodiode , the method comprising:providing a transimpedance amplifier (TIA) having an input node; andconnecting the input node of the TIA to a variable inductance component having a first terminal in electrical communication with the output signal of the photodiode;connecting a second terminal of the variable inductance component to be in electrical communication with the input node of the TIA; andconnecting a third terminal of the variable inductance component to be in electrical communication with a variable control voltage to change an effective inductance at the input node of the TIA, the variable inductance component comprising,an inductor having a first node in electrical communication with the output signal of the photodiode, a second node in electrical communication with the input node of the TIA, anda switching device having a first contact in communication with the first node, a second contact in electrical communication with the second node, and a third contact being in electrical communication with the ...

BUFFER STAGE AND CONTROL CIRCUIT

A buffer stage includes a control circuit. The control circuit includes a voltage generator, a voltage-to-current converter, and a current-to-voltage converter. The voltage generator is configured to generate a compensation voltage. The voltage-to-current converter is configured to convert the compensation voltage into a compensation current. The current-to-voltage converter is configured to convert the compensation current into a recovery compensation voltage. The recovery compensation voltage is arranged for modifying an output voltage of the buffer stage. 1. A buffer stage , comprising: a voltage generator, configured to generate a compensation voltage;', 'a voltage-to-current converter, configured to convert the compensation voltage into a compensation current; and', 'a current-to-voltage converter, configured to convert the compensation current into a recovery compensation voltage;, 'a control circuit, comprisingwherein the recovery compensation voltage is arranged for modifying an output voltage of the buffer stage.2. The buffer stage as claimed in claim 1 , further comprising:a source follower, coupled to the control circuit, and configured to generate the output voltage of the buffer stage.3. The buffer stage as claimed in claim 2 , wherein the current-to-voltage converter is a first resistor coupled between an input node of the buffer stage and the source follower.4. The buffer stage as claimed in claim 3 , wherein the source follower comprises:a first N-type transistor, wherein the first N-type transistor has a control terminal coupled to a first node, a first terminal coupled to an output node of the buffer stage, and a second terminal coupled to a supply voltage; anda first current sink, drawing a first sink current from the output node of the buffer stage;wherein the first resistor is coupled between the input node of the buffer stage and the first node.5. The buffer stage as claimed in claim 4 , wherein the voltage generator comprises:a first current ...

TEMPERATURE DETECTING APPARATUS, SWITCH CAPACITOR APPARATUS AND VOLTAGE INTEGRATING CIRCUIT THEREOF

The invention provides a temperature detecting apparatus, a switch capacitor apparatus and a voltage integrating circuit. The voltage integrating circuit includes an operating amplifier, a capacitor and a current source. The operating amplifier has a positive input end, a negative input end and an output end. The output end of the operating amplifier generates an output voltage, and the positive input end receives a reference voltage. The capacitor is coupled between the output end and the negative input end of the operating amplifier. The current source is coupled to the output end of the operating amplifier. The current source draws a replica current from the capacitor, and a current level of the replica current is determined according to a current level of a current flowing to the negative input end of the operating amplifier. 1. A voltage integrating circuit , comprising:an operating amplifier, having a positive input end, a negative input end and an output end, the output end of the operating amplifier generating an output voltage, the positive input end receiving a reference voltage;a capacitor, having a first end connected to the output end and a second end connected to the negative input end of the operating amplifier; anda current source, coupled to the output end of the operating amplifier, the current source drawing a replica current from the first end of the capacitor, and a current level of the replica current is determined according to a current level of a current flowing to the negative input end of the operating amplifier.2. The voltage integrating circuit according to claim 1 , wherein a voltage level of the voltage on the negative input end of the operating amplifier is constant.3. The voltage integrating circuit according to claim 1 , wherein the current level of the replica current is in positive proportion to the current level of the current flowing to the negative input end of the operating amplifier.4. The voltage integrating circuit according ...

Degenerated transimpedance amplifier with wire-bonded photodiode for reducing group delay distortion

An integrated circuit includes a degeneration network configured to improve group delay across one or more variations, wherein the degeneration network includes a transimpedance amplifier with one or more degeneration inductors. The transimpedance amplifier further includes one or more transistors, and the one or more degeneration inductors are connected after at least one emitter of the one or more transistors.

TRANSIMPEDANCE AMPLIFIER WITH VARIABLE INDUCTANCE INPUT REDUCING PEAK VARIATION OVER GAIN

A transimpedance amplifier (TIA) structure includes an input node with a variable inductance component serving to reduce variation in peak amplitude over different gain conditions. According to certain embodiments, an inductor at the TIA input has a first node in communication with a Field Effect Transistor (FET) drain, and a second node in communication with the FET source. A control voltage applied to the FET gate effectively controls the input inductance by adding a variable impedance across the inductor. Under low gain conditions, lowering of inductance afforded by the control voltage applied to the FET reduces voltage peaking. TIAs in accordance with embodiments may be particularly suited to operate over a wide dynamic range to amplify incoming electrical signals received from a photodiode. 1. A method comprising:adding variable impedance at an input terminal of a transimpedance amplifier that is coupled to a photodetector and operating under low gain conditions, in order to reduce a peak voltage at an output terminal of the transimpedance amplifier.2. The method of wherein the variable impedance is added by applying a control voltage to a variable inductance component located between the photodetector and the input terminal.3. The method of wherein the variable inductance component comprises an inductor and a switch.4. The method of wherein the switch comprises a transistor.5. The method of wherein the switch comprises:a control contact receiving the control voltage,a first contact in communication with a first node of the inductor in communication with a photodiode, anda second contact at a second node of the inductor in communication with the input terminal.6. The method of wherein the switch comprises a field-effect transistor (Fet).7. The method of wherein:the control contact comprises a gate of the Fet in communication with a variable voltage source;the first contact comprises a drain of the Fet; andthe second contact comprises a source of the Fet.8. The ...

Signal Amplifier

A hearing prosthesis circuit includes a power source, a first amplifier coupled to the power source, and a second amplifier coupled to the power source. The circuit also includes a stimulation component coupled to the first amplifier and the second amplifier. The stimulation component is configured to provide an output in accordance with an electrical signal that includes audio data. Further, the circuit includes a controller coupled to the first amplifier and the second amplifier. The controller is operable in accordance with a first operational setting to use the first amplifier to provide the electrical signal to the stimulation component and the controller is also operable in accordance with a second operational setting to use the second amplifier to provide the electrical signal to the stimulation component. Generally, the first amplifier provides greater signal amplification of the audio data than the second amplifier. 1. A hearing prosthesis , comprising:at least one power source;at least one stimulation component;an output amplifier stage coupled between the at least one power source and the stimulation component, wherein the output amplifier stage is configured to amplify an electrical signal that includes audio data and to provide the stimulation component with an amplified electrical signal enabling the at least one stimulation component to deliver stimulation to a recipient to evoke perception of the audio data; anda controller coupled to the output amplifier stage and configured to dynamically switch the output amplifier stage between first and second operating modes, wherein amplification of the electrical signal is different in each of the first and second operating modes of the output amplifier stage.2. The hearing prosthesis of claim 1 , wherein the controller is configured to dynamically switch the output amplifier stage between the first and second operating modes based on a power output requirement associated with the at least one stimulation ...

SELF-CALIBRATED INPUT VOLTAGE-AGNOSTIC REPLICA-BIASED CURRENT SENSING APPARATUS

A current sensing topology uses an amplifier with capacitively coupled inputs in feedback to sense the input offset of the amplifier, which can be compensated for during measurement. The amplifier with capacitively coupled inputs in feedback is used to: operate the amplifier in a region where the input common-mode specifications are relaxed, so that the feedback loop gain and/or bandwidth is higher; operate the sensor from the converter input voltage by employing high-PSRR (power supply rejection ratio) regulators to create a local, clean supply voltage, causing less disruption to the power grid in the switch area; sample the difference between the input voltage and the controller supply, and recreate that between the drain voltages of the power and replica switches; and compensate for power delivery network related (PDN-related) changes in the input voltage during current sensing.

MULTI-MODE OPAMP-BASED CIRCUIT

A multi-mode OPAMP-based circuit is provided. An input amplifying stage amplifies a pair of input differential signals to provide a pair of intermediate differential signals. An output amplifying stage amplifies the pair of intermediate differential signals to provide a pair of output differential signals. A first capacitor is disposed in a first negative feedback loop of the output amplifying stage. A second capacitor is disposed in a second negative feedback loop of the output amplifying stage. A third capacitor is selectively disposed in a first positive feedback loop of the output amplifying stage or coupled to the first capacitor in parallel according to a control signal. A fourth capacitor is selectively disposed in a second positive feedback loop of the output amplifying stage or coupled to the second capacitor in parallel according to the control signal. 1. A multi-mode OPAMP-based circuit , comprising: an input amplifying stage, amplifying a pair of input differential signals to provide a pair of intermediate differential signals;', 'an output amplifying stage, amplifying the pair of intermediate differential signals to provide a pair of output differential signals; and', a first capacitor disposed in a first negative feedback loop of the output amplifying stage;', 'a second capacitor disposed in a second negative feedback loop of the output amplifying stage;', 'a third capacitor selectively disposed in a first positive feedback loop of the output amplifying stage or coupled to the first capacitor in parallel according to a control signal; and', 'a fourth capacitor selectively disposed in a second positive feedback loop of the output amplifying stage or coupled to the second capacitor in parallel according to the control signal., 'a compensation unit, comprising], 'an operational amplifier, comprising2. The multi-mode OPAMP-based circuit as claimed in claim 1 , wherein the capacitances of the first and second capacitors are identical claim 1 , and the ...

AMPLIFIER CIRCUIT AND FEEDBACK CIRCUIT

An amplifier circuit whose frequency response has almost no soft knee characteristic or no peak when inverting input capacitance Csin varies and when feedback capacitance Cf is a fixed value of small capacitance, and a feedback circuit is provided. The amplifier circuit includes a plurality of amplifiers each of which negative feedback is provided to and which are connected in series, and a feedback means (feedback circuit) which is connected to an output side of an amplifier near output of the amplifier circuit and an input side of an amplifier near input of the amplifier circuit. These amplifiers are ones in the plurality of amplifiers. One or odd numbers of amplifiers in the plurality of amplifiers are inverting amplifiers. 1. A feedback circuit that is used along with an amplifier , the feedback circuit comprising:a first resistance;a first capacitor;a buffer amplifier; anda parallel circuit of a second resistance and a second capacitor,wherein one end of the first resistance is connected to an output side of the amplifier, one end of the first capacitor and an input side of the buffer amplifier are connected to another end of the first resistance, another end of the first capacitor is grounded alternately, one end of the parallel circuit is connected to an output side of the buffer amplifier, and another end of the parallel circuit is connected to an input side of the amplifier, so that a product of a resistance value of the first resistance and a capacitance value of the first capacitor is equivalent to a product of a resistance value of the second resistance and a capacitance value of the second capacitor.2. A feedback circuit that is used along with an amplifier , the feedback circuit comprising:a first resistance;a first capacitor; anda parallel circuit of a second resistance and a second capacitor,wherein one end of the first resistance is connected to an output side of the amplifier, one end of the first capacitor and one end of the parallel circuit are ...

Control of envelope tracker PMIC

A tracker circuit configured to provide a variable supply voltage to a power amplifier (PA) circuit is disclosed. The tracker circuit includes a state machine circuit comprising a plurality of states mapped in accordance with transitions associated with a mapping scheme. In some embodiments, the plurality of states of the state machine circuit identify one or more operational modes associated with the tracker circuit, wherein at least one operational mode comprises one or more voltage levels respectively associated therewith. In some embodiments, the one or more operational modes includes at least two active operational modes. In some embodiments, a transition between the one or more operational modes of the tracker circuit is controlled by a digital selection signal received from a digital communication interface associated therewith. 1. A tracker circuit configured to provide a variable supply voltage to a power amplifier (PA) circuit comprising:a state machine circuit comprising a plurality of states, wherein the plurality of states of the state machine circuit identify operational modes associated with the tracker circuit, wherein at least one operational mode comprises one or more voltage levels associated therewith; andwherein a transition between the operational modes of the tracker circuit is controlled by a digital selection signal received from a digital communication interface.2. The tracker circuit of claim 1 , wherein the plurality of states of the state machine circuit are mapped in accordance with a mapping scheme and a transition between the operational modes of the tracker circuit is defined based on mapping the operational modes to trajectories comprising state transitions associated with the mapping scheme.3. The tracker circuit of claim 2 , wherein the states of the state machine circuit are mapped by utilizing allowable transitions associated with Gray mapping.4. The tracker circuit of claim 2 , wherein the states of the state machine circuit ...

ISOLATION AMPLIFICATION CIRCUIT WITH IMPROVED COMMON MODE REJECTION

An isolation amplification circuit having an input stage circuitry and a control circuitry stage interconnected through a galvanic isolation barrier. The input stage circuitry includes a first filter network and a second filter network for supplying first and second output signals in response to the application of first and second electrical input signals. The input stage circuitry includes a first feedback path configured for applying a first feedback signal to a common node of the first filter network to close a first feedback loop around the first filter network and a second feedback path configured for applying a second feedback signal to a common node of the second filter network to close a second feedback loop around the second filter network. 1. An isolation amplification circuit comprising:an input stage circuitry and a control circuitry stage inter-connected through a galvanic isolation barrier; said input stage circuitry being referenced to a first ground potential and configured to receive at least a first electrical signal and a second electrical signal generated by a signal source;said input stage circuitry comprising:a first filter network comprising a first input node, a first output node and first common node wherein the first output node is configured to supply a first output signal in response to application of the first electrical signal at the first input node; anda second filter network comprising a second input node, a second output node and a second common node, wherein the second output node is configured to supply a second output signal in response to application of the second electrical signal at the second input node; anda first feedback path configured for lowpass filtering the first output signal and supplying a first lowpass filtered output signal to the first common node; anda second feedback path configured for lowpass filtering the second output signal and supplying a second lowpass filtered output signal to the second common node.2. ...

CLASS-D AUDIO AMPLIFIER

The present disclosure relates to a class-D audio amplifier. When the system is powered on, an auxiliary power amplifier and an auxiliary feedback circuit constitute an auxiliary close loop so that a control loop is established in advance. The auxiliary close loop is disconnected after various circuit modules reach their steady operation points, and the system operates at a normal state. A soft start circuit is provided for suppressing noise which occurs when the system is powered on. Thus, the class-D audio amplifier suppresses POP noise at an output terminal when the system is powered on. 1. A class-D audio amplifier , comprising:a loop filter configured to receive and filter an audio signal and provide a first audio signal;a PWM modulation circuit being electrically coupled to said loop filter, and configured to receive said first audio signal and compare said first audio signal with a triangular wave signal and provide an audio PWM signal;a power amplifier being electrically coupled to said PWM modulation circuit, and configured to receive and amplify power of said audio PWM signal and provide an output voltage;an auxiliary power amplifier configured to start to operate when said system is powered on and stops operating after said system is powered off; anda soft start circuit configured to suppress noise interference from a control loop when said system is powered on,wherein an output voltage of said power amplifier is not fed back to an input terminal of said loop filter, or said power amplifier is disabled, when said auxiliary power amplifier is active.2. The class-D audio amplifier according to claim 1 , further comprising an auxiliary feedback circuit which connects said auxiliary power amplifier to or disconnects said auxiliary power amplifier from said system.3. The class-D audio amplifier according to claim 2 , wherein said auxiliary power amplifier is connected between an input terminal and an output terminal of said loop filter through said auxiliary ...

OPERATIONAL AMPLIFIER AND CONTROL METHOD THEREOF

An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit. 1. An operational amplifier , comprising:a first amplifier stage, configured to generate a plurality of first output voltages according to a plurality of first input voltages;a second amplifier stage, coupled to the first amplifier stage, the second amplifier stage configured to generate a plurality of second output voltages according to the first output voltages;a second output stage circuit, coupled to the second amplifier stage and a first output stage circuit, the second output stage circuit configured to replicate an equivalent or a scaled-down version of the first output stage circuit;a first common-mode feedback circuit, coupled to the second amplifier stage and the second output stage circuit, the first common-mode feedback circuit configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value;a logic loop circuit, coupled to the first amplifier stage, the logic loop circuit configured to adjust a difference between the first output voltages of the first amplifier stage;a bias ...

Systems and Methods to Provide Compensated Feedback Phase Information

A communication system includes a polar conversion component, a polar modulator, an RF front-end component, a feedback receiver, a delay compensation component, and an adder. The polar conversion component is configured to provide an amplitude signal and a phase signal. The polar modulator is configured to receive amplitude signal and the phase signal and to provide the phase modulated local oscillator signal and an RF output signal. The RF front-end component is configured to receive the RF output signal and to provide a coupled output signal. The feedback receiver is configured to receive the phase modulated local oscillator signal and the coupled output signal and to generate an uncompensated feedback phase information signal. The delay compensation component is configured to receive the phase signal and the uncompensated feedback phase information signal and to generate a compensation signal. The adder is configured to add the compensation signal to the uncompensated feedback phase information signal to generate a compensated feedback phase information signal.

INVERTER TYPE POWER AMPLIFIER

The present disclosure relates to an inverter type power amplifier. An exemplary embodiment of the present disclosure provides an inverter type power amplifier including: a first transistor including a gate to which an AC type of input signal is applied through an input port, a first terminal connected a power source voltage, and a second terminal connected to an output port; a second transistor including a gate through which the input signal is applied thereto, a first terminal connected to a ground, and a second terminal connected to the output port; a feedback resistor including a first terminal connected to the input port and a second terminal connected to the output port; and an AC blocking block including a first terminal connected to the output port and a second terminal connected to a DC output port. 1. An inverter type power amplifier comprising:a first transistor including a gate to which an AC type of input signal is applied through an input port, a first terminal connected a power source voltage, and a second terminal connected to an output port;a second transistor including a gate through which the input signal is applied thereto, a first terminal connected to a ground, and a second terminal connected to the output port;a feedback resistor including a first terminal connected to the input port and a second terminal connected to the output port; andan AC blocking block including a first terminal connected to the output port and a second terminal connected to a DC output port.2. The inverter type power amplifier of claim 1 ,wherein the output port is connected a DC blocking block.3. The inverter type power amplifier of claim 1 ,wherein the AC blocking block is connected to a gate of a third transistor through the DC output port.4. The inverter type power amplifier of claim 1 ,wherein the inverter type power amplifiers are connected in series in two or more stages.5. The inverter type power amplifier of claim 1 ,wherein the AC blocking block is formed of a ...

METHOD AND APPARATUS FOR GAIN ENHANCEMENT OF DIFFERENTIAL AMPLIFIER

A differential amplifier circuit and method having a feed-in network coupling an input signal to an intermediate signal. An amplifier amplifies the intermediate signal by a gain factor to output an output signal to a load network. A feedback network configured in a negative feedback topology and couples the output signal to the intermediate signal. A gain enhancing network is configured in a positive feedback topology and couples the output signal to the intermediate signal. Preferably, an impedance of the gain enhancing network is approximately equal to an impedance of a parallel connection of the feed-in network and the feedback network times the gain factor minus one. 1. A circuit comprising:a feed-in network coupling an input signal to an intermediate signal;an amplifier amplifying the intermediate signal by a gain factor to output an output signal to a load network;a feedback network configured in a negative feedback topology coupling the output signal to the intermediate signal; anda gain enhancing network configured in a positive feedback topology coupling the output signal to the intermediate signal, wherein an impedance of the gain enhancing network is approximately equal to an impedance of a parallel connection of the feed-in network and the feedback network times the gain factor minus one.2. The circuit of claim 1 , wherein the feed-in network comprises a resistor of a feed-in impedance and the feedback network comprises a feedback capacitor.3. The circuit of claim 2 , wherein the gain enhancing network comprises a resistor of a resistance that is approximately equal to the feed-in resistance times the gain factor minus one.4. The circuit of claim 1 , wherein the circuit further comprises a feedforward network coupling the input signal to the output signal.5. The circuit of claim 4 , wherein an impedance of the feedforward network is approximately equal to a sum of the impedance of a feed-in impedance and an impedance of the feedback network.6. A method ...

CLASS D AMPLIFIER CIRCUIT

This application relates to Class D amplifier circuits (). A modulator () controls a Class D output stage () based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (), which may comprise an ADC (), generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input () of a signal selector block (). The input signal may be received at a second input () of the signal selector block (). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (). 1. A Class D amplifier circuit for receiving a digital input signal and outputting an analog output signal comprising:a class-D output stage;a digital modulator for generating at least one control signal for controlling said class-D output stage based on a modulator input signal;an error block for generating an error signal based on said output signal and said digital input signal; in the first mode the modulator input signal is based at least in part on the error signal; and', 'in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal; and, 'said signal selector block is operable in a first mode and a second mode of operation, wherein, 'a signal selector block configured to receive the ...

LOW CAPACITANCE SWITCH FOR PROGRAMMABLE GAIN AMPLIFIER OR PROGRAMABLE GAIN INSTRUMENTATION AMPLIFIER

A low capacitance n-channel analog switch circuit, a p-channel analog switch circuit, and a full CMOS transmission gate (T-gate) circuit are described. Resistive decoupling can be used to isolate the switch or T-gate from AC grounds. A semiconductor region that is separated from a body region of a pass field-effect transistor (FET), such as by an insulator, can be coupled to or driven to a voltage similar to the input voltage or other desired bias voltage (e.g., an operational amplifier output) to help reduce parasitic capacitance of the switch or T-gate. The switch or T-gate can help provide improved frequency bandwidth or frequency response. The switch can be useful in a programmable gain amplifier (PGA) or programmable gain instrumentation amplifier (PGIA) or other circuit in which excessive switch capacitance could degrade circuit performance. 1. An analog switch circuit , comprising:a first pass FET, including a gate coupled to a first control signal input, a first conduction terminal coupled to a signal input, a second conduction terminal coupled to a signal output, and a first body, wherein the first body is separated from a local first semiconductor region by a first insulator.2. The analog switch circuit of claim 1 , wherein the local first semiconductor region is dedicated to the analog switch circuit by being additionally electrically isolated by a second insulator that claim 1 , together with the first insulator and an underlying third insulator claim 1 , forms a moat region about or near the first pass FET claim 1 , and wherein the local first semiconductor region is coupled to a circuit node claim 1 , or driven to claim 1 , a bias voltage.3. The analog switch circuit of claim 2 , wherein the local first semiconductor region is coupled to claim 2 , or driven to a voltage like that of claim 2 , one of the signal input or the signal output.4. The analog switch circuit of claim 3 , wherein the local first semiconductor region is coupled to claim 3 , or ...

IMPLANTABLE MONITORING DEVICE WITH SELECTABLE REFERENCE CHANNEL AND OPTIMIZED ELECTRODE PLACEMENT

Techniques for amplifying a plurality of input voltages to generate a corresponding plurality of output voltages. In an exemplary embodiment, each of the plurality of input voltages is referenced to a common voltage comprising the average of the plurality of input voltages, wherein for each of the input voltages, the common voltage is coupled to a common node via a corresponding switch. 1. A device , comprising:a plurality of amplifier modules each having an input node and an output node, each of the plurality of amplifier modules having a first amplifier with a first amplifier output connected to a second amplifier at a second amplifier input of the second amplifier;a first amplifier common node electrically coupling together the first amplifier outputs of each of the plurality of amplifier modules; anda reference channel coupled to the first amplifier common node via at least one of a reference channel switch, a reference channel resistor, and a reference channel amplifier electrically disposed between the reference channel and the first amplifier common node.2. The device of claim 1 , wherein each of the plurality of amplifier modules includes at least one of a first amplifier switch and a first amplifier resistor electrically disposed between the first amplifier output and the first amplifier common node.3. The device of claim 2 , wherein at least one of the plurality of amplifier modules is configured to provide a variable output at the first amplifier output due to a status of at least one of the first amplifier switch and the first amplifier resistor.4. The device of claim 2 , wherein at least one of the plurality of amplifier modules is configured to provide a variable output at the output node due to a status of at least one of the first amplifier switch and the first amplifier resistor.5. The device of claim 2 , wherein the second amplifier includes a second amplifier output claim 2 , the device further comprising:a second amplifier common node ...

APPARATUS AND METHODS FOR EQUALIZATION

Apparatus and methods for equalization are provided. In certain implementations, an equalizer includes first and second feedback resistors, first and second equalization resistors, an equalization capacitor, and an amplification circuit that includes first to fourth input terminals and first and second output terminals. The amplification circuit can receive a differential input voltage signal between the first and third input terminals, and the first and second equalization resistors and the equalization capacitor are electrically connected in series between the second and fourth input terminals with the equalization capacitor between the first and second equalization resistors. Additionally, the first feedback resistor is electrically connected between the first output terminal and the second input terminal, and the second feedback resistor is electrically connected between the second output terminal and the fourth input terminal. 1. An equalizer , comprising:an amplification circuit including a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal, and a second output terminal, wherein the amplification circuit is configured to receive a differential input signal between the first and third input terminals and to generate a differential output signal between the first and second output terminals, wherein the amplification circuit is configured to control a voltage of the first output terminal based on a voltage difference between the first and second input terminals, and wherein the amplification circuit is further configured to control a voltage of the second output terminal based on a voltage difference between the third and fourth input terminals;a first feedback resistor electrically connected between the first output terminal and the second input terminal of the amplification circuit;a second feedback resistor electrically connected between the second output terminal and the fourth input ...

OPERATIONAL AMPLIFYING CIRCUIT AND SEMICONDUCTOR DEVICE COMPRISING THE SAME

An operational amplifying circuit are provided. The operational amplifying circuit includes a control circuit, pull-up and pull-down transistors, first and second bias circuits, and a bias voltage generating circuit. The control circuit includes first and second input terminals, and is configured to change, when an input voltage transitions to a first level, a voltage level of a pull-up node and a pull-down node to a second level different from the first level. The pull-up transistor provides a power supply voltage to the output terminal. The pull-down transistor connects the output terminal to a ground voltage. The first bias circuit provides a first bias current to the control circuit. The bias voltage generating circuit generates a bias voltage when the voltage level of at least one of the pull-up and pull-down nodes reaches a threshold voltage level, and the second bias circuit provides a second bias current to the control circuit. 1. An operational amplifying circuit comprising:a control circuit comprising a first input terminal configured to receive an input voltage, a second input terminal and an output terminal connected to the second input terminal, the control circuit being configured to, in response to the input voltage transitioning to a first level, change a voltage level of a pull-up node and a voltage level of a pull-down node to a second level that is different from the first level;a pull-up transistor gated to the voltage level of the pull-up node to provide a power supply voltage to the output terminal;a pull-down transistor gated to the voltage level of the pull-down node to connect the output terminal to a ground voltage;a first bias circuit configured to provide a first bias current to the control circuit;a bias voltage generating circuit configured to generate a bias voltage in response to the voltage level of at least one of the pull-up node and the pull-down node reaching a threshold voltage level; anda second bias circuit gated to the ...

LOW VOLTAGE HIGH SPEED CMOS LINE DRIVER WITHOUT TAIL CURRENT SOURCE

The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a line driver with transistors directly coupled to the ground, and a bias voltage is coupled common mode resistors of the line driver. There are other embodiments as well. 1. A data communication system comprising:a voltage supply, the voltage supply being characterized by a first voltage level;a common voltage source comprising a voltage divider, the voltage divider comprises a pair of resistors characterized by predetermined resistance values, the common voltage source being coupled to an operational amplifier;a first load resistor and a second load resistor, the first load resistor and the second load resistor being characterized by a first resistance value;a first common resistor and a second common resistor, the first common resistor being characterized by a second resistance value, the second resistance value being higher than the first resistance value, the first common resistor being configured in series with the second common resistor, the common voltage source being coupled between the first common resistor and the second common resistor;a first voltage input and a second voltage input;a first switch comprising a first gate and a first drain and a first source, the first gate being coupled to the first voltage input, the first drain being coupled to the first load resistor and the first common resistor, the first source being coupled to a ground terminal; anda second switch comprising a second gate and a second drain and a second source, the second gate being coupled to the second voltage input, the second drain being coupled to the second load resistor and the second common resistor, the second source being coupled to the ground terminal.2. The system of further comprising a first load resistor and a second load resistor claim 1 , the first load resistor and the second load resistor being characterized by a ...

Signal processing system and method thereof

A signal processing system and method is disclosed, applicable to environment providing voltage to Class-H driver. When using the signal processing system, the first is to detect the volume change of inputted voice and use the detection result as a power source to generate an expectation value for the circuit; the input end of the power generation circuit also adds a voltage offset in addition to the expectation value, so that the output voltage from the output end of the power generator provided to the Class-H driver is higher than a fixed value. The signal processing system and method of the present invention can adjust automatically and rapidly the output voltage signal for the power voltage provided to the Class-H driver by using negative feedback controller (such as, negative feedback loop, voltage offset and proportional integral differential (PID)) based on the detected volume change of inputted voice and use.

METHOD AND DEVICE FOR MEASURING BIOSIGNAL BY USING ELECTRODE

Disclosed in various embodiments of the present invention are a method and a device comprising: a first electrode, a second electrode and a third electrode which make contact with the body of a user; an instrumentation amplifier for differentially amplifying signals received from the first electrode and the second electrode; a feedback amplifier for feeding back feedback noise to the body of the user through the third electrode; and a control circuit, wherein the control circuit is configured to analyze a noise level by using a biosignal obtained from the instrumentation amplifier, and control the gain of the feedback amplifier on the basis of the result of the analysis. Various embodiments are possible. 1. An electronic device comprising:a first electrode, a second electrode, and a third electrode which are in contact with a body part of a user;an instrumentation amplifier configured to differentially amplify signals received from the first electrode and the second electrode;a feedback amplifier configured to provide feedback noise to a body part of the user via the third electrode; anda control circuit,wherein the control circuit is configured to analyze a magnitude of a noise using a biometric signal obtained from the instrumentation amplifier, and to control a gain of the feedback amplifier based on a result of the analysis.2. The electronic device as claimed in claim 1 , wherein the control circuit is configured to analyze the magnitude of the noise included in the biometric signal by increasing the gain of the feedback amplifier.3. The electronic device as claimed in claim 2 , wherein claim 2 , if the magnitude of the noise included in the biometric signal is increased claim 2 , the control circuit is configured to suspend increasing the gain of the feedback amplifier claim 2 , and to set the gain of the feedback amplifier to a feedback gain used before the magnitude of the noise is increased.4. The electronic device as claimed in claim 1 , further comprising: ...

Low Noise Amplifier

A low noise amplifier includes an amplifier transistor having a source, a gate, and a drain. An input node is coupled to the gate. An output node is coupled to the drain. An inductor is coupled between the gate and the drain.

Gain Invariant Impedance Feedback Amplifier

A system includes a weighting element, a transconductance circuit, a feedback loop, and an auxiliary loop. In some implementations, the transconductance circuit may accept an input and provide a first portion of an output for amplification at a variable amplification level to generate an amplifier output. The feedback loop may provide a portion of the amplifier output as a first feedback to the input. The first feedback may be associated with an impedance that may vary with the amplification level. The auxiliary loop may provide a second feedback to the input to reduce the dependence of the impedance on the amplification level.

APPARATUS AND A METHOD FOR AMPLIFYING AN INPUT SIGNAL

An apparatus for amplifying an input signal is provided. The apparatus includes an output stage to generate an output signal. The apparatus further includes a compensation signal generator configured to generate a compensation signal based on at least one of a voltage value of the input signal or a voltage value of the output signal. The apparatus further includes a combiner configured to generate a control signal for the output stage based on a target signal, the compensation signal and a signal related to a current value of the output stage. The target signal corresponds to a desired output signal. The output stage is configured to generate the output signal using the control signal. 1. (canceled)2. An apparatus for amplifying an input signal , comprising:an output stage configured to generate an output signal;a compensation signal generator configured to generate a compensation signal and to adjust an amplitude of the compensation signal based on at least one of a voltage value of the input signal or a voltage value of the output signal; anda combiner configured to generate a control signal for the output stage based on a target signal corresponding to a desired output signal, the compensation signal and a signal related to a current value of the output stage,wherein the output stage is configured to generate the output signal using the control signal.3. The apparatus of claim 2 , wherein the compensation signal generator is configured to generate multiple compensation signals within a working cycle of the apparatus.4. The apparatus of claim 2 , wherein the compensation signal generator is configured to generate a single compensation signal for a working cycle of the apparatus.5. The apparatus of claim 2 , wherein the compensation signal generator is configured to generate the compensation signal with a triangular signal shape.6. The apparatus of claim 2 , wherein the compensation signal generator is configured to generate the compensation signal to depend ...

APPARATUS FOR PERFORMING CAPACITOR AMPLIFICATION IN AN ELECTRONIC DEVICE

An apparatus for performing capacitor amplification in an electronic device may include a first resistor and a second resistor that are connected in series and coupled between a set of input terminals of a receiver in the electronic device, a common mode capacitor having a first terminal coupled to a common mode terminal and having a second terminal, and an alternating current (AC)-coupled amplifier that is coupled between the common mode terminal and the second terminal of the common mode capacitor. The first resistor and the second resistor may be arranged for obtaining a common mode voltage at the common mode terminal between the first resistor and the second resistor. In addition, the common mode capacitor may be arranged for reducing a common mode return loss. Additionally, the AC-coupled amplifier may be arranged for performing capacitor amplification for the common mode capacitor. 1. An apparatus for performing capacitor amplification in an electronic device , the apparatus comprising:a first resistor and a second resistor, connected in series and coupled between a set of input terminals of a receiver in the electronic device, arranged for obtaining a common mode voltage at a common mode terminal between the first resistor and the second resistor;a common mode capacitor, having a first terminal coupled to the common mode terminal and having a second terminal, arranged for reducing a common mode return loss; andan alternating current (AC)-coupled amplifier, coupled between the common mode terminal and the second terminal of the common mode capacitor, arranged for performing capacitor amplification for the common mode capacitor.2. The apparatus of claim 1 , wherein the set of input terminals comprises two differential input terminals.3. The apparatus of claim 1 , wherein all input terminals of the set of input terminals are voltage input terminals.4. The apparatus of claim 1 , wherein the AC-coupled amplifier has an input terminal and an output terminal; and ...

Current feedback output circuit

The current feedback output circuit includes first and second transistors. The current feedback output circuit includes a current amplifier that has a non-inverting input terminal, an inverting input terminal, a first output terminal and a second output terminal, an input impedance of the non-inverting input terminal being higher than an input impedance of the inverting input terminal, and flows a current obtained by amplifying the difference between a current of an input signal to the non-inverting input terminal and a current input to the inverting input terminal between the first output terminal and the second output terminal. The current feedback output circuit includes first to sixth current mirror circuits. The current feedback output circuit includes a current feedback circuit that supplies a current responsive to a voltage at the signal output terminal to the inverting input terminal.

Amplifier linearization using magnetically coupled feedback provided by a transformer coupled to a balun-based load

An amplifier circuit includes an amplifier having an amplifier input and an amplifier output. The amplifier circuit includes a transformer having a primary winding in series with the amplifier output and a secondary winding coupled to the amplifier input. The primary winding and the secondary winding are arranged such that a portion of a magnetic field generated by the primary winding couples to the secondary winding through a magnetically coupled feedback loop, thereby providing feedback from the amplifier output to the amplifier input. An output load arrangement is connected to the primary winding wherein the output arrangement includes a balun. The amplifier circuit may be implemented as an integrated circuit and where the primary and secondary windings are integrated in different metal layers of the integrated circuit or are otherwise arranged to effect a desired degree of magnetic coupling and feedback from the amplifier output to the amplifier input.

Amplifier linearization using magnetically coupled feedback

An amplifier circuit includes an amplifier having an amplifier input and an amplifier output. A transformer disposed to provide a signal for driving a load includes a primary winding in series with the amplifier output. A secondary winding of the transformer is coupled to the amplifier input where the primary winding and the secondary winding are arranged such that a portion of a magnetic field generated by the primary winding couples to the secondary winding so as to establish a magnetically coupled feedback loop from the amplifier output to the amplifier input. A loop gain of the magnetically coupled feedback loop is substantially independent of an impedance of the load and is defined at least in part by a coupling factor and turn-ratio of the transformer. The load may be included within an output load arrangement including a balun.

Feedback-based power supply for radio-frequency power amplifier

A feedback-based power supply for a radio-frequency power amplifier includes: a linear amplification unit, a first controlling unit, a first driving unit, a first feeding-back unit and a superimposing unit, and the first controlling unit obtains a feedback signal of a change rate of an electrical signal of a supply voltage end of the radio-frequency power amplifier through the first feeding-back unit and outputs a first control signal to enable the power supply to work in any one of the following modes: a constant on time control mode having a constant on time and a constant off time control mode having a constant off time; the first driving unit is configured to connect an output end of the first controlling unit and provide a first electrical signal based on the first control signal.

DEGENERATED TRANSIMPEDANCE AMPLIFIER WITH WIRE-BONDED PHOTODIODE FOR REDUCING GROUP DELAY DISTORTION

An integrated circuit includes a degeneration network configured to improve group delay across one or more variations, wherein the degeneration network includes a transimpedance amplifier with one or more degeneration inductors. The transimpedance amplifier further includes one or more transistors, and the one or more degeneration inductors are connected after at least one emitter of the one or more transistors. 1. An integrated circuit comprising:a degeneration network configured to improve group delay across one or more variations; one or more degeneration inductors; and', 'a transimpedance amplifier including the one or more degeneration inductors., 'wherein the degeneration network comprises2. The integrated circuit according to claim 1 , wherein the transimpedance amplifier includes one or more transistors claim 1 , and the one or more degeneration inductors are connected after at least one emitter of the one or more transistors.3. The integrated circuit according to claim 1 , wherein the transimpedance amplifier includes at least two transistors claim 1 , and the one or more degeneration inductors are connected between emitters of each of the at least two transistors.4. The integrated circuit according to claim 1 , wherein:the transimpedance amplifier includes at least two transistors;a first one of the one or more degeneration inductors is connected to an emitter of a first one of the at least two transistors; anda second one of the one or more degeneration inductors is connected to an emitter of a second one of the at least two transistors.5. The integrated circuit according to claim 1 , wherein the transimpedance amplifier further comprises at least one damping resistor.6. The integrated circuit according to claim 1 , wherein improving the group delay comprises flattening a group delay profile over a frequency range claim 1 , wherein the group delay profile corresponds to at least one inductance of the one or more degeneration inductors.7. The integrated ...

AMPLIFIER WITH CONFIGURABLE FINAL OUTPUT STAGE

An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Structure of the feedback network and the first stage may remain static when switching between modes. 1. An amplifier comprising: a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal at an intermediate output which is a function of the input signal; and', 'a final output stage configured to generate an output signal at an amplifier output, wherein the output signal is a function of the intermediate signal; and, 'a plurality of stages comprising at leasta signal feedback network coupled between the amplifier output and the amplifier input; a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal; and', 'a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal; and, 'wherein the final output stage is switchable among a plurality of modes including at leastwherein structure of the signal feedback network and the first stage remain static when switching between the first mode and the second mode and when switching between the second mode and the first mode.2. ...

Voltage amplifier based on cascaded charge pump boosting

Disclosed herein are related to a system and a method of amplifying an input voltage based on cascaded charge pump boosting. In one aspect, first electrical charges are stored at a first capacitor according to the input voltage to obtain a second voltage. In one aspect, the second voltage is amplified according to the first electrical charges stored by the first capacitor to obtain a third voltage. In one aspect, second electrical charges are stored at the second capacitor according to the third voltage. In one aspect, the third voltage is amplified according to the second electrical charges stored by the second capacitor to obtain a fourth voltage.

Multi-Stage Amplifier with Improved Operating Efficiency

A multi-stage amplifier, comprising a first amplifier stage is presented. The output of the first amplifier stage is coupled to a first terminal of a capacitor having a controllable capacitance. The input of a second amplifier stage is coupled to the output of the first amplifier stage and the first terminal of the capacitor. The output of the second amplifier stage is coupled to a second terminal of the capacitor and an output of the multi-stage amplifier. The input of a current sensing circuit is coupled with the output of the multi-stage amplifier. A control signal generator is coupled between the output of the current sensing circuit and a control terminal of the capacitor. The control signal generator provides a control signal to the capacitor in order to control or vary the capacitance of the capacitor. 1. A multi-stage amplifier comprising:a first amplifier stage having an input and an output, the output of the first amplifier stage being coupled with a first terminal of a capacitor having a controllable capacitance;a second amplifier stage having an input and an output, the input of the second amplifier stage being coupled to the output of the first amplifier stage and the first terminal of the capacitor, the output of the second amplifier stage being coupled to a second terminal of the capacitor and an output of the multi-stage amplifier;a current sensing circuit having an input and an output, the input of the current sensing circuit being coupled with the output of the multi-stage amplifier; anda control signal generator being coupled between the output of the current sensing circuit and a control terminal of the capacitor, wherein the control signal generator provides a control signal to the capacitor, wherein the capacitance of the capacitor is controlled by the control signal.2. The multi-stage amplifier of claim 1 , wherein the current sensing circuit provides a sense current based on a load current through a load claim 1 , the load being coupled to ...

Amplifier with common mode detection

An analog discrete current mode negative feedback amplifier circuit for use with a micro-fused strain gauge is disclosed. The amplifier circuit includes a Wheatstone bridge coupled to a first power supply and a second power supply. The first power supply and the second power supply can be configured such that the periodically alternate between two voltage levels. The Wheatstone bridge can be coupled to a negative feedback amplifier circuit with common mode detection. The amplifier circuit can comprise a differential amplifier with a negative feedback configuration coupled to a common mode amplifier. In addition, the output of each of the amplifiers can be coupled to a common-mode amplifier. In a pressure sensing application, the output of the common mode amplifier serves to output the temperature while the differential amplifiers serve to output the pressure.

REDUCING INTERFERENCE IN RADIO BROADCAST BANDS

In one example, the present disclosure describes a device, computer-readable medium, and method for reducing interference on the frequency modulation (FM) radio broadcast band from the G.fast protocol standard spectrum. For instance, in one example, a method includes delivering broadband service to a customer over a spectrum that overlaps with a frequency modulation radio broadcast band, and applying a notch filter to a target frequency of the frequency modulation radio broadcast band based on a profile that is customized for the customer, wherein the notch filter prevents the broadband service from using the target frequency during the delivering. 1. A method comprising:delivering a broadband service to a customer over a spectrum that overlaps with a frequency modulation radio broadcast band; andapplying a notch filter to a target frequency of the frequency modulation radio broadcast band based on a profile that is customized for the customer, wherein the notch filter prevents the broadband service from using the target frequency during the delivering.2. The method of claim 1 , wherein the target frequency is used for broadcast by a local radio station into which the customer tunes.3. The method of claim 1 , further comprising:creating the profile prior to the delivering.4. The method of claim 3 , wherein the creating comprises:identifying a plurality of candidate frequencies to which to apply the notch filter, wherein each candidate frequency of the plurality of candidate frequencies is associated with a respective radio station of a plurality of radio stations that broadcasts radio transmissions in a geographic location associated with the customer, and wherein the plurality of candidate frequencies includes the target frequency; andperforming a survey to narrow the plurality of candidate frequencies down to a smaller set of frequencies, wherein the smaller set of frequencies includes the target frequency.5. The method of claim 4 , wherein the identifying ...

Sensor Arrangement and Method for Generating An Amplified Sensor Signal

A sensor arrangement () comprises an amplifier () having a signal input () to receive an input signal (SIN) and a signal output () to provide an amplified sensor signal (SOUT) that is an inverted signal with respect to the input signal (SIN). Furthermore, the sensor arrangement () comprises a feedback path connecting the signal output () to the signal input (), wherein the feedback path comprises a series connection of a capacitive sensor () and a feedback capacitor (). A voltage source arrangement () of the sensor arrangement () is connected to a feedback node () between the capacitive sensor () and the feedback capacitor (). 120.-. (canceled)21. An sensor arrangement , comprising:an amplifier having a signal input to receive an input signal and a signal output to provide an amplified sensor signal that is an inverted signal with respect to the input signal,a feedback path that comprises a capacitive sensor and a feedback capacitor, wherein the capacitive sensor is coupled to the signal input of the amplifier and to a feedback node; and the feedback capacitor is coupled to the feedback node and to the signal output of the amplifier, anda voltage source arrangement that is connected to the feedback node between the capacitive sensor and the feedback capacitor, anda further capacitor coupling a further signal input of the amplifier to the feedback node.22. The sensor arrangement according to claim 21 , wherein the feedback path is adapted to provide a feedback signal from the signal output to the signal input.23. The sensor arrangement according to claim 21 , wherein the capacitive sensor is directly connected between the feedback node and the signal input of the amplifier.24. The sensor arrangement according to claim 21 , which is configured to perform a DC measurement claim 21 , in particular a DC-only measurement claim 21 , with the capacitive sensor.25. The sensor arrangement according to claim 21 , wherein during operation of the sensor arrangement no signal ...

FULLY DIFFERENTIAL OPERATIONAL AMPLIFIER

A fully differential operational amplifier is provided. The amplifier has input nodes and includes a differential input stage for receiving input signals over the input nodes and providing output signals on first and second intermediary nodes. The amplifier includes a fully differential amplification stage having positive and negative inputs coupled to the first and second intermediary nodes, respectively. The amplifier includes a first compensation transistor having conduction terminals coupled to the first intermediary node and a first node, and a control terminal coupled to a negative output of the fully differential amplification stage. The amplifier includes a second compensation transistor having conduction terminals coupled to the second intermediary node and a second node, and a control terminal coupled to a positive output of the fully differential amplification stage. The amplifier includes positive and negative output stages for providing amplifier outputs and feeding the outputs back to the amplifier. 1. A fully differential operational amplifier , comprising:first and second amplifier input nodes;first and second amplifier output nodes;a differential input stage having a first input coupled to the first amplifier input node, a second input coupled to the second amplifier input node, a first output coupled to a first intermediary node and a second output coupled to a second intermediary node; a fully differential amplification stage having a positive input coupled to the first intermediary node, a negative input coupled to the second intermediary node, a negative output, and a positive output;', 'a first compensation transistor having a first conduction terminal coupled to the first intermediary node, a second conduction terminal coupled to the first output of the level shifting and amplification stage, and a control terminal coupled to the negative output of the fully differential amplification stage; and', 'a second compensation transistor having a ...

AMPLIFIER CIRCUIT

An amplifier circuit includes a multistage amplifier, a first feedback circuit and a second feedback circuit. The multistage amplifier includes a first-staged amplifier, a last-staged amplifier and at least one middle-staged amplifier cascaded between the first-staged amplifier and the last-staged amplifier. The first feedback circuit is configured to couple a positive output end of the last-staged amplifier to a positive input end of the at least one middle-staged amplifier, or is configured to couple a negative output end of the last-staged amplifier to a negative input end of the at least one middle-staged amplifier. The second feedback circuit is configured to couple the positive output end of the last-staged amplifier to a positive input end of the last-staged amplifier, or is configured to couple the negative output end of the last-staged amplifier to a negative input end of the last-staged amplifier. 1. An amplifier circuit , comprising:a multistage amplifier comprising a first-staged amplifier, a last-staged amplifier and at least one middle-staged amplifier cascaded between the first-staged amplifier and the last-staged amplifier;a first feedback circuit configured to couple a positive output end of the last-staged amplifier to a positive input end of the at least one middle-staged amplifier, or configured to couple a negative output end of the last-staged amplifier to a negative input end of the at least one middle-staged amplifier; anda second feedback circuit configured to couple the positive output end of the last-staged amplifier to a positive input end of the last-staged amplifier, or configured to couple the negative output end of the last-staged amplifier to a negative input end of the last-staged amplifier.2. The amplifier circuit of claim 1 , wherein the first feedback circuit includes a first compensating resistor and a first compensating capacitor.3. The amplifier circuit of claim 2 , wherein the first compensating resistor is coupled between ...

SEMICONDUCTOR DEVICE

Power consumption of a signal processing circuit is reduced. Further, power consumption of a semiconductor device including the signal processing circuit is reduced. The signal processing circuit includes a reference voltage generation circuit, a voltage divider circuit, an operational amplifier, a bias circuit for supplying bias current to the operational amplifier, and first and second holding circuits. The first holding circuit is connected between the reference voltage generation circuit and the bias circuit. The second holding circuit is connected between the voltage divider circuit and a non-inverting input terminal of the operational amplifier. Reference voltage from the reference voltage generation circuit and reference voltage from the voltage divider circuit can be held in the first and second holding circuits, respectively, so that the reference voltage generation circuit can stop operating. Thus, power consumption of the reference voltage generation circuit can be reduced. 1. (canceled)2. A semiconductor device comprising:a differential circuit;a bias circuit configured to supply a bias current to the differential circuit;a reference voltage generation circuit configured to output a reference voltage to the bias circuit; anda holding circuit configured to hold the reference voltage,wherein the holding circuit comprises a first transistor and a capacitor,wherein the first transistor comprises an oxide semiconductor film comprising a channel formation region,wherein one of a source and a drain of the first transistor is electrically connected to the reference voltage generation circuit,wherein the other of the source and the drain of the first transistor is electrically connected to the bias circuit, andwherein the capacitor is electrically connected to the other of the source and the drain of the first transistor.3. The semiconductor device according to claim 2 ,wherein operating of the reference voltage generation circuit is stopped after the reference ...

Ultra-broadband transimpedance amplifiers (tia) for optical fiber communications

Design of ultra broadband transimpedance amplifiers (TIA) for optical fiber communications is disclosed. In one embodiment, a TIA comprises a g m -boosted dual-feedback common-base stage, a level shifter and an RC-degenerated common-emitter stage, and a first emitter-follower stage, wherein the first emitter follower stage is inductively degenerated. An output of the TIA is buffered using a second emitter-follower stage.

Amplifier Circuit of High Response Speed and Related Clamping Method

An amplifier circuit includes an input stage, having a positive input end and a negative a negative input end, for generating a pair of differential signals according to a first input voltage received from the positive input end and a second input voltage received from a negative input end; an output stage, coupled to the input stage for generating an output voltage at an output end according to the pair of differential signals; a feedback stage, coupled between the output end and the negative input end; and a clamping unit, coupled between the positive input end and the negative input end for adjusting the second input voltage when the first input voltage is varied so as to clamp a voltage difference between the first input voltage and second input voltage. 1. An amplifier circuit , comprising:an input stage, having a positive input end and a negative a negative input end, for generating a pair of differential signals according to a first input voltage received from the positive input end and a second input voltage received from a negative input end;an output stage, coupled to the input stage for generating an output voltage at an output end according to the pair of differential signals;a feedback stage, coupled between the output end and the negative input end; anda clamping unit, coupled between the positive input end and the negative input end for adjusting the second input voltage when the first input voltage is varied so as to clamp a voltage difference between the first input voltage and second input voltage.2. The amplifier circuit of claim 1 , wherein the clamping unit adjusts the second input voltage to follow the variation in the first input voltage such that the voltage difference between the first input voltage and second input voltage is clamped to be below a threshold voltage.3. The amplifier circuit of claim 2 , wherein the clamping unit adjusts the second input voltage when an absolute value of the voltage difference between the first input voltage ...

DIGITAL AMPLIFIER

The invention relates to a digital amplifier for providing a desired electrical output power, the amplifier comprising a power source () for generating the electrical output power, the amplifier further comprising: 1. A digital amplifier for providing a desired electrical output power , the amplifier comprising ,:a power source for generating the electrical output power;a digital input adapted for receiving a digital input signal, the digital input signal representing the desired electrical output power level;a reference power generator for generating an analogue reference power controlled by the digital input signal, the reference power generator comprising a set of switches digitally controlled by the digital input signal;a power measurement component adapted for measuring the power differential between the electrical output power provided by the power source and the analogue reference power;an analogue-to-digital converter adapted for converting the power differential into a digital power differential value;a combiner adapted for providing a combined digital signal by adding the digital power differential value to a signal including at least the digital value input signal to the reference power generator for generating the analogue reference power;wherein the power source is adapted for providing the electrical output power corrected for the difference between a power value indicated by the digital input signal and the combined digital signal.2. The digital amplifier of claim 1 , wherein each switch is configured to control the electrical output of at least one amplifier.3. The digital amplifier of claim 1 , wherein the reference power generator is adapted for setting the level of the analogue reference power by combining the electrical output of the switched amplifiers.4. The digital amplifier of claim 2 , wherein at least one amplifier includes three amplifiers claim 2 , each amplifier being controlled by a corresponding switch.5. The digital amplifier of claim ...

AUDIO CIRCUIT

An audio amplifier includes an operational amplifier, a replica of an output stage of the operational amplifier, and a feedback circuit configured such that, in a normal mode, an output signal of the operational amplifier is fed back to the input side of the operational amplifier, and such that, in a calibration mode, an output signal of the replica is fed back to the input side of the operational amplifier. The calibration circuit cancels out the offset voltage of the audio amplifier. An adjustment circuit changes the offset of the audio amplifier according to a control signal S. A control circuit adjusts the control signal such that an output signal Vof the replica is within a predetermined target range in a state in which a predetermined voltage is input to the audio amplifier. Memory stores the control signal S acquired in the final stage. 1. An audio circuit comprising: an operational amplifier;', 'a replica circuit configured as a replica of an output stage of the operational amplifier; and', 'a feedback circuit configured such that, in a normal mode, an output signal of the operational amplifier is fed back to an input side of the operational amplifier, and such that, in a calibration mode, an output signal of the replica circuit is fed back to the input side of the operational amplifier; and, 'an audio amplifier that comprisesa calibration circuit that cancels out an offset voltage of the audio amplifier in the calibration mode, an adjustment circuit that changes an offset of the audio amplifier according to a control signal;', 'a control circuit that adjusts the control signal in the calibration mode such that the output signal of the replica circuit is within a predetermined target range in a state in which a predetermined voltage is input to the audio amplifier; and', 'a memory that stores the control signal acquired in a final stage of the calibration mode., 'wherein the calibration circuit comprises2. The audio circuit according to claim 1 , wherein the ...

ON-DIE HARMONICS FILTERING FOR RADIO FREQUENCY POWER AMPLIFIERS

A power amplifier architecture for connecting a radio frequency (RF) transceiver to an antenna. An input matching circuit is connected to its input port, and an output matching circuit is connected to its output port. An amplifier circuit includes at least one amplifier active device with a first terminal connected to the input matching segment and a second terminal connected to the output matching segment. A first harmonic feedback circuit is connected across the amplifier active device. Voltage components of emissions of one or more harmonic frequencies of a carrier fundamental frequency generated by the amplifier active device is fed back with opposite phase to the first terminal of the amplifier active device. A negative feedback is defined at a level correlated with a gain level of the amplifier active device at the harmonic frequencies of the carrier fundamental frequency. Negative feedback is minimized at the carrier fundamental frequency. 1. A power amplifier architecture for connecting a transceiver generating a radio frequency (RF) signal defined by a carrier fundamental frequency to an antenna including an input port and an output port comprising:an input matching circuit connected to the input port;an output matching circuit connected to the output port;an amplifier circuit including at least one amplifier active device with a first terminal connected to the input matching segment and a second terminal connected to the output matching segment; anda first harmonic feedback circuit connected across the amplifier active device, voltage components of emissions of one or more harmonic frequencies of the carrier fundamental frequency generated by the amplifier active device being fed back with opposite phase to the first terminal of the amplifier active device by the first harmonic feedback circuit;wherein a negative feedback at a level correlated with a gain level of the amplifier active device at the one or more harmonic frequencies of the carrier ...

Method and circuit for suppressing pop noise in an audio operation amplifier

A method for suppressing POP noise in an audio operation amplifier, comprising: connecting a first resistor and a second resistor in series at an output stage of the audio operation amplifier by turning on a first switch and a second switch; generating, with a ramp generator, a ramp voltage after an audio signal is input into the audio operation amplifier, wherein the ramp voltage varies from zero to a first value; generating, with an voltage generator, a second voltage, wherein a third switch is turned on and a fourth switch is turned off when the ramp voltage reaches the second value; short-circuiting the first and second resistors by turning off the first and second switches; and outputting, with the audio operation amplifier, an amplified audio signal.

AMPLIFIER

A capacitive trans-impedance amplifier comprising a voltage amplifier having an inverting input terminal for connection to an input current source. A feed-back capacitor is coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly. A calibration unit includes a calibration capacitor electrically coupled, via a calibration switch, to the inverting input terminal and electrically coupled to the feed-back capacitor. The calibration unit is operable to switch the calibration switch to a calibration state permitting a discharge of a quantity of charge from the calibration capacitor to the feed-back capacitor. The capacitive trans-impedance amplifier is arranged to determine a voltage generated across the feed-back capacitor while the calibration switch is in the calibration state and to determine a capacitance value (C=Q/V) for the feed-back capacitor according to the value of the generated voltage (V) and the quantity of charge (Q). 1. A capacitive trans-impedance amplifier comprising:a voltage amplifier having an inverting input terminal for connection to an input current source, and a non-inverting input terminal, the voltage amplifier being arranged to provide at an output terminal thereof an output voltage signal;a feed-back capacitor coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly wherein the capacitor defines a negative feed-back loop of the voltage amplifier such that the output voltage is proportional to said accumulation of said charges;a calibration unit including a calibration capacitor electrically coupled, via a calibration switch, to said inverting input terminal of said voltage amplifier and thereby electrically coupled to said feed-back capacitor, wherein the calibration unit is operable to switch the ...

THIN FILM TRANSISTOR-BASED BOOTSTRAP STRUCTURE AMPLIFIER AND CHIP

The present disclosure discloses a thin film transistor (TFT)-based bootstrap structure amplifier, and a chip. The amplifier includes an input circuit, an output buffer, and several bootstrap structure units. The bootstrap structure units include a TFT and a capacitor. The drain and the gate of the TFT are both connected to the same voltage node. The source of the TFT is connected to one end of the capacitor. The other end of the capacitor is connected to an output signal node. The output buffer is formed by connecting the sources and drains of several TFTs in series. Two ends of the output buffer are respectively connected to an input voltage node and an output signal node. The source of the TFT in each bootstrap structure unit is connected to the gates of the TFTs in one output buffer. The input circuit includes an input signal node, the output signal node, and a grounding node. The present disclosure can increase circuit gain and have a simple structure and low fabrication cost. The present disclosure can be widely applied to the field of integrated circuits. 1. A thin film transistor (TFT)-based bootstrap structure amplifier , comprising an input circuit , an output buffer , and several bootstrap structure units , where inthe bootstrap structure unit comprises a TFT and a capacitor; the drain and the gate of the TFT are both connected to the same voltage node; the source of the TFT is connected to one end of the capacitor; the other end of the capacitor is connected to an output signal node;the output buffer is formed by connecting several TFTs in series; two ends of the output buffer are respectively connected to an input voltage node and an output signal node;the source of the TFT in each bootstrap structure unit is connected to the gate of the TFT in one output buffer; andthe input circuit comprises an input signal node, the output signal node, and a grounding node.2. The TFT-based bootstrap structure amplifier according to claim 1 , wherein the TFTs are all ...

Signal conversion circuit, heart rate sensor and electronic device

A signal conversion circuit, a heart rate sensor, and an electronic device are provided, and the signal conversion circuit includes: a photoelectric conversion circuit, configured to convert an optical signal into a current signal; a differential signal conversion circuit, connected to the photoelectric conversion circuit, and configured to convert the current signal into a first differential signal and a second differential signal, where the first differential signal is an integration signal of the current signal in a first phase, and the second differential signal is an integration signal of the current signal in a second phase; and a subtraction amplifier, connected to the differential signal conversion circuit, and configured to amplify a difference value between the first differential signal and the second differential signal, to generate a third differential signal. The signal conversion circuit of embodiments of the present disclosure can effectively suppress ambient interference.

Structure and Method of Audio Amplifier with Power Feedback

The present invention generally relates to a structure and method of audio amplifier with power feedback, including a power amplifying unit, a loud-speaker, a current sensing unit, a voltage sensing unit and a multiplying unit, the power amplifying unit includes an input side and an output side, the input side inputs an audio voltage signal; and the loud-speaker is electrically connected to an output side of the power amplifying unit; the current sensing unit is electrically connected to the output side of the power amplifying unit and senses the output current of the power amplifying unit and then converted into a current control voltage signal; the voltage sensing unit is electrically connected to the output side of the power amplifying unit, and senses the output voltage of the power amplifying unit to form an output sensing voltage signal; the multiplying unit obtains the voltage of the current control voltage multiplied by the output sensing voltage, and the output side of the multiplying unit is electrically connected to the input side of the power amplifying unit to form a closed loop power feedback structure, accordingly improving the output quality of the amplifier and loud-speaker. 1. A audio amplifier structure with power feedback includes:a power amplifying unit with an input side and an output side, the input side inputs an audio voltage signal;a loud-speaker electrically connected to an output side of the power amplifying unit;a current sensing unit electrically connected to the output side of the power amplifying unit and sensing the output current of the power amplifying unit converted into a current control voltage signal;a voltage sensing unit electrically connected to the output side of the power amplifying unit, and sensing the output voltage of the power amplifying unit to form an output sensing voltage signal;a multiplying unit, the input side is electrically connected to the current control voltage signal and the output sensing voltage signal, ...

AMPLIFIER CIRCUIT WITH REDUCED FEEDFORWARD CURRENT

An amplifier circuit that includes a first amplifier that has a first input that receives an input signal, a second input and an output. The amplifier circuit also includes a second amplifier that has a first input that is coupled to the output of said the amplifier and a second input. The circuit further includes a first impedance network Z a second impedance network Z a third impedance network Z and a fourth impedance network Z The first impedance network Z is coupled to a load and the second input of the second amplifier, the second impedance Z is connected the output of the first amplifier and the second input of the first amplifier, the third impedance Z is connected to the output of the first amplifier and the load, the fourth impedance Z is connected the output of the second amplifier and the second input of said first amplifier. 1. An amplifier circuit , comprising:a first amplifier that has a first input that receives an input signal, a second input and an output;a second amplifier that has a first input that is coupled to said output of said first amplifier, a second input and an output;{'b': '1', 'a first impedance network Z coupled to a load and said second input of said second amplifier;'}{'b': '2', 'a second impedance Z connected to said output of said first amplifier and said second input of said first amplifier;'}{'b': '3', 'a third impedance Z connected to said output of said first amplifier and said load; and,'}{'b': '4', 'a fourth impedance Z connected to said output of said second amplifier and said second input of said first amplifier.'}2. The amplifier circuit of claim 1 , further comprising a resistor in parallel with a capacitor claim 1 , said resistor and said capacitor being connected to said output of said second amplifier and said second input of said second amplifier.312341234. The amplifier circuit of claim 1 , wherein said first Z claim 1 , second Z claim 1 , third Z and fourth Z impedance networks have values such that Z×Z=Z×Z.41234. ...

CURRENT-DOMAIN ANALOG FRONTEND FOR INTENSITY MODULATED DIRECT TIME-OF-FLIGHT LIDARS

A circuit for filtering a signal corresponding to a time of flight (TOF) of light from a laser reflected off an object to a photo detector, the circuit includes a preamplifier, a DC cancelation loop, and an AC cancelation loop. The preamplifier may be configured to receive the signal from the photo detector corresponding to an output of the laser reflected off an object remote from the laser and photo detector. The DC cancelation loop includes a current feedback DC servo loop. The AC cancelation loop includes a feedback network driven by a floating class AB output stage, and the preamplifier configured to drive the floating class AB output stage, wherein the preamplifier is driven by an error signal of the feedback network and creates an AC signal path with the feedback network and floating class AB output stage. 1. A current-domain analog frontend (AFE) circuit for a LIDAR system comprising:a photo detector configured to source a current;a current feedback DC servo loop configured to cancel a DC component of the current;a feedback network configured to cancel an AC component of the current;a floating class AB output stage that drives the feedback network; anda preamplifier configured to drive the floating class AB output stage, wherein the preamplifer is driven by an error signal of the feedback network and creates an AC signal path with the feedback network and floating class AB output stage.2. The circuit of claim 1 , wherein the floating class AB output stage includes a dynamically degenerated current mirror.3. The circuit of claim 1 , wherein the feedback network includes switches coupled between an input and output of the floating class AB output stage.4. The circuit of claim 3 , wherein claim 3 , in response to an absolute value of an output of the floating class AB output stage exceeding twice a threshold voltage of level shift switches of the feedback network claim 3 , the feedback network is configured to transition from capacitive operation to resistive ...

Gain enhancement using advanced correlated level shifting

Systems and methods disclosed herein provide for enhancing the low frequency (DC) gain of an operational amplifier with multiple correlated level shifting capacitors. In an embodiment, the operational amplifier is level shifted with a first correlated level shifting capacitor in a first phase and, then, is level shifted again with at least a second correlated level shifting capacitor in at least a second, non-overlapping, consecutive phase. In an embodiment, the multiple correlated level capacitors are controlled by a switching circuit network.

Amplifier circuitry

This application relates to circuitry for monitoring for instability of an amplifier. The amplifier (100) has a first signal path between an amplifier input (INN) and an amplifier output (VOUT) and a feedback path from the output to form a feedback loop with at least part of the first signal path. A comparator (212) has a first input configured to receive a first signal (INN) derived from a first amplifier node which is part of said feedback loop and a second input configured to receive a second signal (INP) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.

CURRENT REUSE TYPE FIELD EFFECT TRANSISTOR AMPLIFIER

A current reuse type FET amplifier according to the present invention has a capacitance provided between a drain of a first FET in a first stage and a gate of a second FET in a next stage, electrically separates a gate voltage of the second FET from a drain voltage of the first FET, and includes a control circuit controlling the gate voltage of the first FET and the gate voltage of the second FET so that a variation of a drain current of the second FET and a variation of a drain voltage of the first FET are reduced in accordance with a variation of a saturation current Idss of the FET. Furthermore, the current reuse type FET amplifier according to the present invention uses only a depression mode FET to provide a circuit configuration operable with a positive single power source. 1. A current reuse type field effect transistor amplifier , comprising:a first field effect transistor including a first gate to which an RF signal is input, a first source, and a first drain;a first resistance connected between the first source and a ground terminal;a second field effect transistor including a second source, a second gate, and a second drain connected to a first power source terminal and outputting an RF signal which has been amplified;a second resistance connected between the first drain and the second source;a capacitance connected between the first drain and the second gate;a third field effect transistor including a third source, a third drain connected to a second power source terminal, and a third gate connected to the ground terminal;a fourth field effect transistor including a fourth source, a fourth drain, and a fourth gate connected to the third source;a first diode connected between the fourth source and the ground terminal;a third resistance connected between the second power source terminal and the fourth drain;a fourth resistance connected between the fourth drain and the first gate; anda fifth resistance connected between the fourth drain and the second gate ...

Sampled Moving Average Notch Filter for Ripple Reduction in Chopper Stabilized Operational Amplifiers

A chopper-stabilized amplifier includes a first transconductance amplifier and a first chopper circuit coupled to an input of the first transconductance amplifier. A second chopper circuit is coupled to an output of the first transconductance amplifier. The chopper-stabilized amplifier also includes second and third transconductance amplifiers having inputs coupled to the output of the first transconductance amplifier. The second transconductance amplifier produces an output responsive to a first notch clock signal having a first phase relative to the chopping of the second chopper circuit. The third transconductance amplifier produces an output responsive to a second notch clock signal having a second phase relative to the first phase. The output signals produced by the second and third transconductance amplifiers are added to filter ripple noise at the outputs of the second and third transconductance amplifiers.

WIRELESS RECEIVER

A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first trans conductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal. 1. A low noise amplifier (LNA) , comprising:a first transistor, having a first type, and configured to provide a first transconductance; anda second transistor, having a second type being different from the first type, and configured to provide a second transconductance, wherein a drain end of the second transistor is coupled to a common-mode feedback circuit,wherein the LNA is configured to use a sum of the first and second transconductances to amplify an input signal.2. The LNA of claim 1 , wherein the first transistor is art n-type metal-oxide-semiconductor field-effect-transistor claim 1 , and the second transistor is a p-type metal-oxide-semiconductor field-effect-transistor.3. The LNA of claim 1 , further comprising:a blocking capacitor coupled between respective source ends of the first and second transistors.4. The LNA of claim 1 , further comprising:a first inductor coupled between a source end of the first transistor and ground; anda second inductor coupled between a source end of the second transistor and a supplied voltage of the LNA.5. The LNA of claim 4 , wherein the first inductor is formed as a first conductive coil claim 4 , and the second inductor is formed as a second conductive coil.6. The LNA of ...

CIRCUIT HAVING HIGH-PASS FILTER WITH VARIABLE CORNER FREQUENCY

The present invention provides a circuit having a filter with an amplifier circuit for filtering and amplifying an input signal to generate an output signal, wherein a corner frequency of the filter is adjustable to control a settling time of the output signal. 1. An input stage of a chip , comprising:a variable resistor, for directly receiving an input signal from a pad of the chip to generate a first signal; andan amplifier with a feedback resistor, for amplifying the first signal to generate an output signal;wherein in a first mode, the variable resistor is controlled to have a first resistance to increase a settling time of the output signal, and in a second mode, the variable resistor is controlled to have a second resistance greater than the first resistance.2. The input stage of claim 1 , wherein when the input stage starts to process the input signal claim 1 , initially the input stage of the chip operates in the first mode claim 1 , and then the input stage of the chip operates in the second mode.3. The input stage of claim 1 , wherein the feedback resistor is a variable feedback resistor claim 1 , and in the first mode claim 1 , the variable resistor is controlled to have the first resistance claim 1 , and the variable feedback resistor is controlled to have a third resistance; and in the second mode claim 1 , the variable resistor is controlled to have the second resistance claim 1 , and the variable feedback resistor is controlled to have a fourth resistance greater than the third resistance.4. An input stage of a chip claim 1 , comprising:an input capacitor, for directly receiving an input signal from a pad of the chip to generate a first signal; andan amplifier with a feedback resistor and a feedback capacitor, for amplifying the first signal to generate an output signal, wherein the feedback resistor is a variable feedback resistor, or the feedback capacitor is a variable feedback capacitor;wherein in a first mode, the feedback resistor or the ...

DEVICES AND METHODS RELATED TO VARIABLE LOAD POWER AMPLIFIER SUPPORTING DUAL-MODE ENVELOPE TRACKING AND AVERAGE POWER TRACKING PERFORMANCE

A variable load power amplifier that improves the performance of a power amplifier that provides both envelope tracking (ET) and average power tracking (APT). The variable load power amplifier can include a plurality of amplifiers that are each selectively connectable into one of a plurality of parallel combinations, each of the plurality of parallel combinations characterized by a corresponding load line. The variable load power amplifier can also include a plurality of control elements arranged to selectively connect one or more of the plurality of amplifiers into one of the plurality of parallel combinations, each of the plurality of control elements having a respective input terminal provided to receive a respective control signal, each of the plurality of control elements responsive to the respective control signal. 1a plurality of amplifiers that are each selectively connectable into one of a plurality of parallel combinations, including a first combination corresponding to an envelope tracking performance mode and a second combination corresponding to an average power tracking performance mode; anda plurality of control elements arranged to selectively connect one or more of the plurality of amplifiers into one of the plurality of parallel combinations, each of the plurality of control elements having a respective input terminal provided to receive a respective control signal, each of the plurality of control elements responsive to the respective control signal.. A variable load power amplifier comprising: This application is a continuation of U.S. patent application Ser. No. 16/000,877, filed Jun. 5, 2018, entitled “VARIABLE LOAD POWER AMPLIFIER SUPPORTING DUAL-MODE ENVELOPE TRACKING AND AVERAGE POWER TRACKING PERFORMANCE,” which is a continuation of U.S. patent application Ser. No. 14/824,679, filed Aug. 12, 2015, entitled “VARIABLE LOAD POWER AMPLIFIER SUPPORTING DUAL-MODE ENVELOPE TRACKING AND AVERAGE POWER TRACKING PERFORMANCE,” which claims priority to ...

Impedance transformation circuit for amplifier

Aspects of this disclosure relate to an impedance transformation circuit for use in an amplifier, such as a low noise amplifier. The impedance transformation circuit includes a matching circuit including a first inductor. The impedance transformation circuit also includes a second inductor. The first and second inductors are magnetically coupled to each other to provide negative feedback to linearize the amplifier.

DIFFERENTIAL AMPLIFIER

There is provided a differential amplifier including: an inverting input terminal to which a first voltage is applied; a non-inverting input terminal to which a second voltage proportional to the first voltage is applied; and an offset part configured to generate a predetermined input offset voltage between the inverting input terminal and the non-inverting input terminal. 1. A differential amplifier , comprising:an inverting input terminal to which a first voltage is applied;a non-inverting input terminal to which a second voltage proportional to the first voltage is applied; andan offset part configured to generate a predetermined input offset voltage between the inverting input terminal and the non-inverting input terminal.2. A power supply circuit for supplying an output to a load , comprising:{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'the differential amplifier of configured to generate an error voltage corresponding to the output.'}3. A linear power supply circuit , comprising:an output transistor provided between an input terminal to which an input voltage is applied and an output terminal to which an output voltage is applied; anda driver configured to drive the output transistor based on a difference between a voltage based on the output voltage and a reference voltage, [{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'the differential amplifier of configured to output a voltage corresponding to the difference between the voltage based on the output voltage and the reference voltage;'}, 'a first capacitor including one end to which an output of the differential amplifier is applied and the other end to which a ground potential is applied;', 'a converter configured to convert a voltage based on the output of the differential amplifier into a current and to output the current; and', 'a current amplifier configured to amplify the current outputted from the converter,, 'wherein the driver includeswherein a power supply voltage of the differential ...

An amplifier

The use of a capacitor ( 22 ) to serve as the principal impedance in a negative feed-back loop in a voltage amplifier component ( 21 ) of a trans-impedance amplifier and actively controlling the amount of charge accumulated within the capacitor appropriately to improve the responsiveness and/or dynamic range of the amplifier. A switch ( 25 ) is electrically coupled to the inverting input terminal of the voltage amplifier and electrically isolated from the output terminal ( 23 ) of the voltage amplifier. The output voltage of the amplifier is proportional to the accumulation of charge, and the switch is operable to ‘reset’ the charge/voltage on the feedback capacitor, as desired. This arrangement decouples the structure of the switch from the output port of the voltage amplifier, and so avoids leakage currents and/or interfering voltage signals emanating from the switch structure and being felt at the output port of the voltage amplifier.

Capacitive feedback (transimpedance) amplifier for use with nanopore detection and sequencing device

A multiplexed nanopore sensing network comprising an integrated and multiplexed network of patch clamp capacitive integrator-differentiator amplifiers with small feedback capacitors using pseudo-resistors.

AN AMPLIFIER

A capacitive trans-impedance amplifier comprising a voltage amplifier having an inverting input terminal for connection to an input current source. A feed-back capacitor is coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly. A calibration unit includes a calibration capacitor electrically coupled, via a calibration switch, to the inverting input terminal and electrically coupled to the feed-back capacitor. The calibration unit is operable to switch the calibration switch to a calibration state permitting a discharge of a quantity of charge from the calibration capacitor to the feed-back capacitor. The capacitive trans-impedance amplifier is arranged to determine a voltage generated across the feed-back capacitor while the calibration switch is in the calibration state and to determine a capacitance value (C=Q/V) for the feed-back capacitor according to the value of the generated voltage (V) and the quantity of charge (Q). 1. A capacitive trans-impedance amplifier comprising:a voltage amplifier having an inverting input terminal for connection to an input current source, and a non-inverting input terminal, the voltage amplifier being arranged to provide at an output terminal thereof an output voltage signal;a feed-back capacitor coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly wherein the capacitor defines a negative feed-back loop of the voltage amplifier such that the output voltage is proportional to said accumulation of said charges;a calibration unit including a calibration capacitor electrically coupled, via a calibration switch, to said inverting input terminal of said voltage amplifier and thereby electrically coupled to said feed-back capacitor, wherein the calibration unit is operable to switch the ...

HIGH VOLTAGE OUTPUT STAGE

An amplifier circuit includes a high-voltage output stage. The high-voltage output stage includes an output terminal, a high-side output circuit, a low-side output circuit, and a feedback circuit. The high-side output circuit sources current to the output terminal, and includes a high-side input transistor, a first high-side cascode transistor coupled to the high-side input transistor, and a second high-side cascode transistor coupled to the first high-side cascode transistor and the output terminal. The low-side output circuit sinks current from the output terminal, and includes a low-side input transistor, a first low-side cascode transistor coupled to the low-side input transistor, and a second low-side cascode transistor coupled to the first low-side cascode transistor and the output terminal. The feedback circuit is configured to bias the second high-side cascode transistor and the second low-side cascode transistor based on a sense voltage generated by the high-side output circuit or the low-side output circuit. 1. An amplifier circuit , comprising: an output terminal;', a first terminal coupled to a power supply rail; and', 'a second terminal coupled to a signal source;, 'a high-side input transistor comprising, a first terminal coupled to a third terminal of the high-side input transistor; and', 'a second terminal coupled to a constant voltage source;, 'a first high-side cascode transistor comprising, a first terminal coupled to a third terminal of the first high-side cascode transistor; and', 'a second terminal coupled to the output terminal; and, 'a second high-side cascode transistor comprising, a first terminal coupled to the output terminal; and', 'a second terminal coupled to a third terminal of the second high-side cascode transistor., 'a resistor comprising], 'a high-voltage output stage comprising2. The amplifier circuit of claim 1 , further comprising: a first terminal coupled to the output terminal; and', 'a second terminal coupled to the third ...