ПЕРЕМЕЖИТЕЛЬ ТУРБОКОДА, ИСПОЛЬЗУЮЩИЙ ЛИНЕЙНЫЕ КОНГРУЭНТНЫЕ ПОСЛЕДОВАТЕЛЬНОСТИ

Изобретение относится к области кодирования для коммуникационных систем и может быть применено, в частности, к перемежителям для турбокодеров. Его использование позволяет получить технический результат в виде повышения производительности канала передачи и уменьшения количества ошибок при передаче данных и их последующем декодировании. Технический результат достигается за счет того, что турбокодер содержит первый кодер, выполненный с возможностью приема множества входных битов последовательно и генерирования из него множества выходных символов, перемежитель, выполненный с возможностью приема множества входных битов последовательно, причем перемежитель содержит множество ячеек хранения битов, расположенных в матрице строк и столбцов, и генератор линейной конгруэнтной последовательности, выполненный с возможностью псевдослучайного генерирования последовательности для тасования битов в каждой строке перемежителя, и второй кодер, выполненный с возможностью приема множества перемежающихся битов ...

СПОСОБ И УСТРОЙСТВО ДЛЯ ДЕПЕРЕМЕЖЕНИЯ ПОТОКА ПЕРЕМЕЖЕННЫХ ДАННЫХ В СИСТЕМЕ СВЯЗИ

Изобретение относится к системе связи с высокоскоростной передачей пакетных данных и, в частности, к способу и устройству для приема перемеженных данных и для считывания записанных символов посредством перемежения в приемнике системы подвижной связи. Сущность изобретения заключается в том, что перемеженный кодирующий пакет имеет значение m сдвига разрядов, верхнее предельное значение J и остаток R, и поток символов кодирующего пакета записывают по порядку столбец - строка, при этом формируют промежуточный адрес посредством инвертирования порядка разрядов при допущении, что остаток R равен 0 для принятых символов, вычисляют коэффициенты коррекции адреса для коррекции промежуточного адреса с учетом столбца, сформированного с остатком, и формируют адрес считывания путем сложения промежуточного адреса с коэффициентом коррекции адреса для требуемого декодирования символа, и считывают символ, записанный в сформированном адресе считывания. Технический результат - одновременное декодирование множества ...

УСТРОЙСТВО ОБРАБОТКИ ДАННЫХ И СПОСОБ ОБРАБОТКИ ДАННЫХ

Группа изобретений относится к области обработки данных и может быть использована для кодирования/декодирования с использованием LDPC-кода. Техническим результатом является повышение устойчивости LDPC-кода к возникновению ошибок. LDPC-код включает в себя бит информации и бит четности. Матрица контроля четности включает в себя часть информационной матрицы, соответствующую битам информации, и часть матрицы четности, соответствующую битам четности. Часть информационной матрицы представлена таблицей начальных значений матрицы контроля четности. Таблица начальных значений матрицы контроля четности представляет собой таблицу, показывающую позиции элементов 1 части информационной матрицы каждые 360 столбцов. 12 н. и 60 з.п. ф-лы, 130 ил.

СПОСОБ И УСТРОЙСТВО ПЕРЕМЕЖЕНИЯ ДАННЫХ В СИСТЕМЕ МОБИЛЬНОЙ СВЯЗИ

Изобретение относится к способу и устройству передачи данных в системах мобильной связи, более конкретно к способу и устройству перемежения данных в системе мобильной связи. Реализован способ перемежения, к которому применяется преобразование сначала по времени для множества канально-кодированных и согласованных по скорости кодовых блоков в системе мобильной связи. Способ перемежения содержит этапы, на которых: определяют размеры горизонтальной зоны и вертикальной зоны перемежителя; генерируют группы модуляции со смежными кодированными битами в вертикальном направлении в соответствии со схемой модуляции; последовательно записывают группы модуляции в горизонтальной зоне строка за строкой; и последовательно считывают кодированные биты, записанные в перемежителе в вертикальной зоне столбец за столбцом. Технический результат - повышение надежности приема данных передачи в системе мобильной связи. 4 н. и 17 з.п. ф-лы, 22 ил.

УСТРОЙСТВО И СПОСОБ ДЛЯ ФОРМИРОВАНИЯ И ДЕКОДИРОВАНИЯ КОДОВ С ПРЯМЫМ ИСПРАВЛЕНИЕМ ОШИБОК, ИМЕЮЩИХ ПЕРЕМЕННУЮ СКОРОСТЬ ПЕРЕДАЧИ В ВЫСОКОСКОРОСТНОЙ БЕСПРОВОДНОЙ СИСТЕМЕ ПЕРЕДАЧИ ДАННЫХ

Изобретение относится к устройство и способу для генерации кодов, имеющих переменную скорость передачи, с прямым исправлением ошибок в беспроводной системе передачи данных. Устройство для формирования квазикомплементарных сдвоенных двоичных турбокодов (QC-DBTC) включает в себя QC-DBTC кодер, который принимает поток информационных символов и формирует множество потоков систематических символов и множество потоков символов четности в соответствии с заданной скоростью кодирования. Устройство дополнительно включает в себя квадро-символьный преобразователь, который выполняет квадро-символьное преобразование потоков систематических символов в один поток символов, канальный перемежитель, который независимо перемежает квадро-преобразованный поток систематических символов и потоки символов четности, выполняет обратное квадро-преобразование квадро-преобразованного потока систематических символов, чередует символы в потоках символов четности и последовательно конкатенирует обратно квадро-преобразованный ...

ПЕРЕСТАНОВОЧНЫЙ ДЕКОДЕР С ОБРАТНОЙ СВЯЗЬЮ

Изобретение относится к технике связи и может использоваться при проектировании новых и модернизации существующих систем обмена данными. Техническим результатом является сокращение объема памяти для хранения эталонных матриц. Перестановочный декодер с обратной связью содержит: блок приема, блок мягких решений символов, преобразователь мягких решений, блок упорядочения оценок, блок эквивалентного кода, блок сравнения и обратных преобразований, блок исправления стираний, при этом дополнительно введены блок ранжирования перестановок, блок отрицательных перестановок, блок ввода отрицательных перестановок, блок положительных перестановок, блок быстрых матричных преобразований, блок усреднения мягких решений и блок сигналов обратной связи. 3 ил., 2 табл.

УСТРОЙСТВО ОБРАБОТКИ ДАННЫХ И СПОСОБ ОБРАБОТКИ ДАННЫХ

Изобретение относится к технике связи и может быть использовано для обработки данных. Технический результат – обеспечение хорошего качества связи при передаче данных, используя код LDPC. Для этого бит кода для кода LDPC, в котором длина кода составляет 16200 битов и скорость кодирования составляет 8/15, обменивают с символьным битом символа, соответствующего любой из 8 точек сигнала, определенных 8PSK. Когда 3 бита битов кода, сохраненных в трех модулях хранения, имеющих емкость хранения 16200/3 битов, и считываемых поразрядно из модулей хранения, выделяют для одного символа, (#i+1)-й бит от старшего значащего бита из 3 битов из битов кода устанавливают в бит b#i, (#i+1)-й бит от старшего значащего бита из 3 битов символьных битов одного символа устанавливают в бит y#i и бит b0 обменивают на бит y1, бит b1 обменивают на бит у0 и бит b2 обменивают на бит у2. 4 н. и 2 з.п. ф-лы, 79 ил.

Генератор комбинаций двоичного эквивалентного кода

Изобретение относится к технике связи. Технический результат заключается в сокращении цикла генерации комбинаций требуемых эквивалентных кодов и в уменьшении обьема памяти, необходимой для хранения эталонных матриц эквивалентных кодов. Генератор позволяет с минимальными по времени потерями нейтрализовать отрицательный эффект от непродуктивных перестановок за счет целенаправленной трансформации неудачной перестановки. Этому способствует разделенная когнитивная карта генератора, при использовании которой в первую очередь решается вопрос принадлежности текущей перестановки к отрицательным решениям и трансформации такой перестановки. Меньшая доля таких перестановок способствует более эффективной генерации комбинаций двоичных эквивалентных кодов. Производительность работы генератора существенно улучшается за счет исключения из алгоритма обработки данных матричных вычислений. 1 ил.

УСТРОЙСТВО ОБРАБОТКИ ДАННЫХ И СПОСОБ ОБРАБОТКИ ДАННЫХ

... 1. Устройство обработки данных, содержащее:блок кодирования, который кодирует информационный бит в LDPC-код, имеющий длину кода 16200 битов и кодовую скорость 12/15, на основании матрицы контроля четности кода разреженного контроля четности (LDPC),где LDPC-код включает в себя информационный бит и бит четности,где матрица контроля четности включает в себя информационную часть матрицы, соответствующую информационному биту, и часть матрицы четности, соответствующую биту четности,где информационная часть матрицы представлена таблицей начальных значений матрицы контроля четности игде таблица начальных значений матрицы контроля четности представляет собой таблицу, представляющую позиции элементов 1 в информационной части матрицы с интервалом 360 столбцов, и представляет собой2. Устройство обработки данных по п. 1,в котором, если строка исходной таблицы матрицы контроля четности представлена i и длина битов четности LDPC-кода представлена М,(2+360×(i-1))-й столбец матрицы контроля четности представляет ...

СПОСОБ И УСТРОЙСТВО ДЛЯ ПЕРЕМЕЖЕНИЯ БИТОВ СИГНАЛОВ В СИСТЕМЕ ЦИФРОВОГО ЗВУКОВОГО РАДИОВЕЩАНИЯ

... 1. Способ перемежения битов цифрового сигнала, представляющего данные и/или аудиоданные в системе цифрового звукового радиовещания, который содержит шаги: записи множества битов цифрового сигнала во внутреннюю матрицу; считывания битов из внутренней матрицы; при этом, по меньшей мере, один из шагов записи и считывания выполняется по непоследовательной схеме адресации; и записи битов в выходную матрицу. 2. Способ по п.1, по которому число битов в выходной матрице равно числу битов в кадре передачи цифрового сигнала. 3. Способ по п.1, по которому биты во внутренней матрице располагаются во множестве секторов. 4. Способ по п.3, по которому каждый из секторов содержит множество блоков. 5. Способ по п.3, по которому каждый из секторов содержит группу битов, представляющих логический канал. 6. Способ по п.5, по которому биты в каждом логическом канале скремблируются. 7. Способ радиопередачи цифровой информации, представляющей данные и/или аудиоданные в системе цифрового звукового радиовещания ...

Способ и устройство дл формировани (n,3) кода и (n,4)кода с использованием симплексных кодов

... 1. Устройство для кодирования информационного битового потока с 3 битами в (n, 3) кодовое слово с n кодовыми символами, содержащее симплексный кодер, предназначенный для формирования кодового слова Рида - Маллера первого порядка с (Р+1) кодовыми символами из входного информационного битового потока для n>Р, а также для выкалывания первого кодового символа из (Р+1) кодовых символов Рида - Маллера первого порядка для создания (Р, 3) симплексного кодового слова, перемежитель, предназначенный для перестановки Р кодовых символов (Р, 3) симплексного кодового слова столбцами согласно заданной конфигурации, и повторитель, предназначенный для повторения переставленного столбцами (Р, 3) кодового слова до тех пор, пока число повторяющихся кодов не станет равным n, и для выведения (n, 3) кодового слова с повторяющимися n кодовыми символами. 2. Устройство по п.1, отличающееся тем, что если k=3, то (Р, 3) симплексное кодовое слово переставляется столбцами согласно следующей конфигурации: [S1, S2, S3, ...

ПЕРЕСТАНОВОЧНЫЙ ДЕКОДЕР С ПАМЯТЬЮ

УСТРОЙСТВО, СОДЕРЖАЩЕЕ КОЛЬЦЕВОЙ БУФЕР, И СПОСОБ ДЛЯ ПРИСВОЕНИЯ ВАРИАНТОВ ИЗБЫТОЧНОСТИ КОЛЬЦЕВОМУ БУФЕРУ

... 1. Способ для присвоения вариантов избыточности кольцевому буферу, способ, содержащий этапы, на которых: ! принимают систематические биты, первый блок битов четности и второй блок битов четности, при этом систематические биты, первый блок битов четности и второй блок битов четности - все содержат фиктивные биты; ! по отдельности блоками перемежают систематические биты, первый блок битов четности и второй блок битов четности; ! чересстрочно чередуют первый блок битов четности со вторым блоком битов четности, чтобы создать чересстрочно чередованные биты четности; ! присоединяют спереди перемеженные систематические биты к чересстрочно чередованным битам четности, чтобы создать кольцевой буфер; ! определяют варианты избыточности для начала в конкретном ряду кольцевого буфера; ! принимают вариант избыточности (RV) и число требуемых битов; и ! выводят число требуемых битов, начиная с битового положения RV. ! 2. Способ по п.1, в котором этап, где определяют варианты избыточности для начала в конкретном ...

Codemultiplexsystem für Hochgeschwindigkeits-Abwärtsstrecken-Gemeinschaftskanal

Kodier- und Multiplexiersystem in einem Hochgeschwindigkeits-Abwärtsstrecken-Gemeinschaftskanal, aufweisend ein Segmentierungsmodul für einen physischen Kanal, dadurch gekennzeichnet, dass das Kodier- und Multiplexiersystem weiterhin aufweist: ein Verschachtelungsmodul, das konfiguriert ist zum Teilen, in einem Fall von 64QAM, einer von dem Segmentierungsmodul für einen physischen Kanal ausgegebenen Bitfolge in drei Folgen und zum Verschachteln jeder der drei Folgen jeweils durch einen 32-Reihen-×-30-Spalten-Verschachteler; und dadurch, dass das System weiterhin derart konfiguriert ist, dass die Bitfolge aufweist: up,k, up,k+1, up,k+2, up,k+3, up,k+4 und up,k+5, und p eine Folgenummer des physischen Kanals ist; und das System weiterhin derart konfiguriert ist, dass up,k und up,k+1 durch einen ersten Verschachteler verschachtelt werden, up,k+2 und up,k+3 durch einen zweiten Verschachteler verschachtelt werden und up,k+4 und up,k+5 durch einen dritten Verschachteler verschachtelt werden.

MULTIPLEXVERFAHREN UND MULTIPLEXVORRICHTUNG SOWIE VERFAHREN UND VORRICHTUNG ZUR ÜBERTRAGUNG VON DATENSIGNALEN

Verschachteler und zugeordnete Verfahren

Verfahren zum Erzeugen von Blöcken aus Daten, wobei das Verfahren aufweist: Aufteilen von Daten in ein Spaltenformat aus N Zeilen und M Spalten, wobei das Spaltenformat erzeugt wird, indem Daten zeilenweise in das Format gelesen werden; spaltenweises Auslesen von Daten aus dem Spaltenformat, wobei ein Intervall zwischen aufeinanderfolgend gelesenen Spalten größer ist als 1; Erzeugen eines Blocks aus Daten aus einer Anzahl M der gelesenen Daten; und Zuordnen des Blocks aus Daten zu einer Vielzahl von Unterträgern, die einem Mehrträger-Kommunikationskanal zugewiesen sind, wobei eine Spanne zwischen Unterträgern für benachbarte Blöcke aus Daten größer ist als 3, wobei das Aufteilen von Daten weiter aufweist: Erzeugen einer Anzahl unterschiedlicher Versionen des Spaltenformats, wobei ein jedes einer Anzahl von räumlichen Strömen zugewiesen ist, die erzeugt werden, wobei die Differenz zwischen den Versionen des Spaltenformats eine Frequenzverschiebung in den Spalten zwischen den Versionen ist ...

Bit omission method for bit-rate matching in mobile communication system by calculating bit displacement values in each column of virtual interleaving pattern

The method involves performing a channel coding for bits in a transport channel and outputting one or more channel-coded sequences. A first interleaving pattern is created based on a symbol unit for each channel-coded sequence. A virtual interleaving pattern is created for each channel-coded sequence, taking account of a mapping rule to the first interleaving pattern. Different bit displacement values are calculated in each column of the virtual interleaving pattern for each virtually interleaved sequence, and the position of a bit to be omitted is determined. An Independent claim is included for a sequence repetition method for rate matching in an uplink of a mobile communications system.

Mapping cells to symbols

Data permutation

RATE ADJUSTMENT AND CHANNEL NESTING FOR A COMMUNICATION SYSTEM

PROCEDURE AND ARRANGEMENT FOR THE EXECUTION OF INTRARAHMENVERSCHACHTELUNG

PROCESSING OF THE PHYSICAL LAYER FOR A WIRELESS COMMUNICATION SYSTEM USING CODE MULTIPLEX ACCESS

ROBUST MOVE MODE

DEVICE AND PROCEDURE FOR THE DATA PROCESSING

DEVICE AND PROCEDURE FOR THE CONTROL A DEMULTIPLEXEUR AND DEMULTIPLEXEUR FOR RATE ADJUSTMENT IN A MOBILE TRANSMISSION SYSTEM

DEVICE AND PROCEDURE FOR TURBOVERSCHALTELUNG

Data processing device and data processing method

Data processing device and data processing method

The present technique relates to a data processing device that can improve tolerance of data errors, and to a data processing method. When a predetermined LDPC code having a coded rate of 8/15 is mapped with a code length of 16200 bits over 256 signal points, and when a demultiplexer designates the code bits of 8×1 bits and bits #i+1 from the highest of the symbol bits of the 8×1 bits of one symbol as bits b#i and y#i, respectively, replacements are performed for allocating b0 to y2, b1 to y6, b2 to y1, b3 to y0, b4 to y7, b5 to y5, b6 to y3, and b7 to y4. The present technique can be applied to a transfer system or the like for transferring LDPC code, for example.

Data process device, data process method, coding device, coding method

APPARATUS AND METHOD FOR CONTROLLING A DEMULTIPLEXER AND A MULTIPLEXER USED FOR RATE MATCHING IN A MOBILE COMMUNICATION SYSTEM

A transmitting device in a mobile communication system is disclosed. In the transmitting device, an encoder receives an information bit stream in a frame, which is as long as an integer multiple of a predetermined value, and generates an information symbol, a first parity symbol, and a second parity symbol by encoding each information bit. An interleaver sequentially arranges the information symbols and the first and second parity symbols by rows in an array with an integer number of rows and an integer number of columns. The interleaver reorders the columns in the array according to a predetermined rule. The interleaver further outputs a plurality of radio frames in a stream, by reading the symbols by going down each column, starting at the leftmost column and proceeding right. Each radio frame has a predetermined size. A demultiplexer demultiplexes each of the radio frames received from the interleaver into a stream of information symbols, a stream of first parity symbols, and a stream ...

TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF

TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

ROBUST TRANSMISSION MODE

An interleaving/de-interleaving scheme for providing redundancy with both time and frequency diversity to data in OFDM symbols in a data transmission system (10). On the transmit side (12), encoded data to be modulated onto carriers in OFDM symbols is interleaved by storing the encoded data in an interleaver memory (20) and reading multiple copies of the encoded data from the interleaver memory (20) so that the encoded data copies are spread in time on non-consecutive symbols and in frequency on non-adjacent carriers. On the receive side (14), the multiple copies of the OFDM data are received, and phase noise computations are used to combine the multiple copies (in either metric or phase angle form) into one. From the combined copies, a single metric value to be used in decoding the OFDM data is produced.

TIME INTERLEAVER, TIME DEINTERLEAVER, TIME INTERLEAVING METHOD, AND TIME DEINTERLEAVING METHOD

A convolution interleaver, which is included in a time interleaver and performs a convolution interleaving, comprises: a first switch for switching the connection destination of the input of the convolution interleaver to an end of any one of a plurality of branches; FIFO memories disposed in some of the plurality of branches except one branch in such a manner that the number of FIFO memories is different among said some of the plurality of branches; and a second switch for switching the connection destination of the output of the convolution interleaver to the other end of said any one of the plurality of branches. When a plurality of cells, the number of which is equal to the number of code words per frame, have passed, the first and second switches switch said connection destinations in such a manner that the branching of the destinations is performed by repeating the plurality of branches in turn.

TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

BROADCAST SIGNAL TRANSMITTING APPARATUS, BROADCAST SIGNAL RECEIVING APPARATUS, BROADCAST SIGNAL TRANSMITTING METHOD, AND BROADCAST SIGNAL RECEIVING METHOD

Provided is a broadcast signal transmitting method. The broadcast signal transmitting method according to the present invention comprises the steps in which: an input formatting block formats input streams into a plurality of physical layer pipes (PLPs); an encoder encodes the data in the plurality of PLPs; a time interleaver time-interleaves the encoded data in the plurality of PLPs, wherein the time-interleaving step comprises a step in which a cell interleaver cell-interleaves the encoded data by changing the order of the cells in one forward error correction (FEC) block in the plurality of PLPs; a framer frame-maps the time-interleaved data into at least one signal frame; and a waveform block waveform-modulates the mapped data of the at least one signal frame, and may comprise the modulated data.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

This technology pertains to a data processing device and data processing method which are capable of providing an LDPC code having a favorable error rate. This LDPC encoder encodes at a code length of 64,800 bits and at a 2/30, 3/30, 4/30, 5/30 or 6/30 LDPC code rate. The LDPC code contains information bits and parity bits, and a check matrix (H) is configured from an information matrix section corresponding to the information bits of the LDPC code, and a parity matrix section corresponding to the parity bits. The information matrix section of the check matrix (H) is represented by a check matrix initial value table expressing the position of one element of the information matrix section for each of 360 rows. This technology can be applied in cases when conducting LDPC encoding and LDPC decoding.

DATA-PROCESSING DEVICE AND DATA PROCESSING METHOD

This technology pertains to a data-processing device and a data processing method that make it possible to ensure good communication quality when using an LDPC code to transmit data. In group-wise interleaving, an LDPC code having a code length (N) of 16,200 bits and a code rate (r) of 10/15 or 12/15 is interleaved on a per-bit-group basis, each bit group being 360 bits long. In group-wise deinterleaving, the interleaved LDPC code is restored to the original ordering thereof. This technology can be applied, for example, to data transmission or the like using an LDPC code.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

This technology pertains to a data processing device and a data processing method that make it possible to provide an LDPC code that has a good error rate. An LDPC encoder encodes using an LDPC code that has a code length of 16,200 bits and a code rate of 10/15. Said LDPC code contains information bits and parity bits, and the parity-check matrix (H) for said LDPC code comprises an information-matrix section corresponding to the information bits of said LDPC code and a parity-matrix section corresponding to the parity bits. The information-matrix section of the parity-check matrix (H) is represented by a parity-check-matrix initial-value table that represents the position of one element of said information-matrix section each 360 columns. This technology can be applied when performing LDPC encoding and LDPC decoding.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

This technology pertains to a data processing device and a data processing method that make it possible to ensure good communication quality when using an LDPC code to transmit data. In group-wise interleaving, an LDPC code having a code length of 64,800 bits and a code rate of 6/15, 7/15, 8/15, or 9/15 is interleaved on a per-bit-group basis, each bit group being 360 bits long. In group-wise deinterleaving, the interleaved LDPC code is restored to the original ordering thereof. This technology can be applied, for example, to data transmission or the like using an LDPC code.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

This technology pertains to a data processing device and a data processing method that make it possible to ensure good communication quality when using an LDPC code to transmit data. In group-wise interleaving, an LDPC code having a code length of 16,200 bits and a code rate of 6/15, 7/15, 8/15, or 9/15 is interleaved on a per-bit-group basis, each bit group being 360 bits long. In group-wise deinterleaving, the interleaved LDPC code is restored to the original ordering thereof. This technology can be applied, for example, to data transmission or the like using an LDPC code.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

This technology pertains to a data processing device and a data processing method that make it possible to provide an LDPC code that has a good error rate. An LDPC encoder encodes using an LDPC code that has a code length of 64,800 bits and a code rate of 5/15. Said LDPC code contains information bits and parity bits, and the parity-check matrix (H) for said LDPC code comprises an information-matrix section corresponding to the information bits of said LDPC code and a parity-matrix section corresponding to the parity bits. The information-matrix section of the parity-check matrix (H) is represented by a parity-check-matrix initial-value table that represents the position of one element of said information-matrix section each 360 columns. This technology can be applied when performing LDPC encoding and LDPC decoding.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present invention relates to a data processing device and a data processing method which can ensure excellent communication quality in data transmission using LDPC codes. In groupwise interleaving, the code length N is 64800 bits, and LDPC codes with a coding rate r of 9/15, 11/15 or 13/15 are interleaved in bit group units of 360 bits. In groupwise deinterleaving, the sequence of the LDPC codes after groupwise interleaving is returned to the original sequence. This invention can be applied for example when performing data transmission, etc., using LDPC codes.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present invention relates to a data processing device and a data processing method which can ensure excellent communication quality in data transmission using LDPC codes. In groupwise interleaving, the code length N is 64800 bits, and LDPC codes with a coding rate r of 9/15, 11/15 or 13/15 are interleaved in bit group units of 360 bits. In groupwise deinterleaving, the sequence of the LDPC codes after groupwise interleaving is returned to the original sequence. This invention can be applied for example when performing data transmission, etc., using LDPC codes.

PROCESS AND SYSTEM FOR INTERLEAVING AND DESINTERLEAVING SDH BLOCKS

L'invention concerne notamment un procédé d'entrelacement et de désentrelacement de pointeurs de trames SDH de type STM-1 ou STM-N transmises entre un émetteur et un récepteur. Chaque trame comporte trois zones : - une zone de surdébit de section ; - une zone de pointeurs ; - une zone de capacité utile comportant notamment les données utiles à transmettre. Le procédé de l'invention se caractérisé en ce que, au niveau de l'émetteur, l'entrelacement consiste à entrelacer les bits de la zone de pointeurs et ceux de la zone de capacité utile selon une loi d'entrelacement conservant aux bits entrelacés leur rang modulo 24, l'entrelacement fournissant une trame entrelacée transmise au récepteur et en ce qu'il consiste, au niveau du récepteur, à désentrelacer la trame entrelacée selon une loi réciproque de la loi d'entrelacement. On entrelace ainsi tous les bits des pointeurs pouvant se trouver dans la trame tout en conservant les valeurs des octets de contrôle de parité B1 et B2.

MODULE PARALLEL BITS INTERLEAVING

MODULE PARALLEL BITS INTERLEAVING

УСТРОЙСТВО И СПОСОБ ОБРАБОТКИ ДАННЫХ

Настоящее изобретение касается устройства обработки данных и способа обработки данных, которые могут улучшить устойчивость к появлению ошибок в данных. В демультиплексоре 25 заменяют в соответствии с правилом сопоставления битов LDPC-кода и битов символов, которые представляют символы, mb битов из битов кода и используют биты кода после замены как биты b символов. Согласно правилу сопоставления, когда группы, в которые сгруппированы биты кода и биты символа в зависимости от вероятности появления ошибок, используют как группы битов кода и группы битов символа соответственно, определяют комбинацию любой группы битов кода и любой группы битов символа, которой должна быть сопоставлена группа битов кода, и количества битов кода и битов символа.

MODULE PARALLEL BITS INTERLEAVING

УСТРОЙСТВО И СПОСОБ ОБРАБОТКИ ДАННЫХ

Устройство обработки данных отображает входные символы, предназначенные для передачи, в заданное количество сигналов поднесущей ортогонального мультиплексированного с частотным разделением (ОМЧР) символа. Процессор обработки данных включает в себя запоминающее устройство перемежителя, который считывает заданное количество символов данных для отображения на сигналы поднесущей ОМЧР. Запоминающее устройство перемежителя считывает символы данных на поднесущие ОМЧР для выполнения отображения, причем считывание с запоминающего устройства выполняют в ином порядке, чем занесение в запоминающее устройство, порядок определяют по набору адресов, в результате чего символы данных перемежают на сигналы поднесущей. Набор адресов генерируют с генератора адреса, содержащего линейный регистр сдвига с обратной связью и схему перестановок.

УСТРОЙСТВО И СПОСОБ ОБРАБОТКИ ДАННЫХ

Устройство обработки данных отображает входные символы, предназначенные для передачи в заданное количество сигналов поднесущей ортогонально мультиплексированного с частотным разделением (ОМЧР) символа. Процессор обработки данных включает в себя запоминающее устройство перемежителя, которое считывает заданное количество символов данных для отображения на сигналы поднесущей ОМЧР. Запоминающее устройство перемежителя считывает символы данных на поднесущие ОМЧР для выполнения отображения, причем считывание из запоминающего устройства выполняют в другом порядке, чем считывание в запоминающее устройство, порядок определяют из набора адресов, в результате чего символы данных перемежают на сигналы поднесущей. Набор адресов генерируют из генератора адреса, который содержит линейный сдвиговый регистр с обратной связью и схему перестановок. Линейный сдвиговый регистр с обратной связью имеет одиннадцать каскадов регистра с полиномом генератора для линейного сдвигового регистра с обратной связью и код ...

СИСТЕМА И ПРОЦЕССОР ПЕРЕМЕЖЕВАНИЯ

Заявлены система и способ для частотного разнесения, которые используют перемежевание. Поднесущие чередования перемежевываются способом реверсирования битов и чередования перемежевываются способом реверсирования битов.

УСТРОЙСТВО И СПОСОБ ОБРАБОТКИ ДАННЫХ, А ТАКЖЕ УСТРОЙСТВО И СПОСОБ КОДИРОВАНИЯ

Изобретение относится к устройству обработки данных и к способу обработки данных, а также к устройству кодирования и способу кодирования, которые позволяют улучшить устойчивость к ошибкам. В коде LDPC, который предписан в соответствии с DVB-S.2 и имеет длину кода 64800 и скорость кодирования 2/3, mb кодовых битов заменяют и кодовые биты после замены становятся битами символов, состоящими из b символов. Когда m равно 8 и b равно 2, в случае, когда i+1-й бит от старшего значащего бита 8×2 кодовых битов и 8×2 битов символов двух последовательных символов представлены как bi и yi, соответственно, замена состоит в назначении b0 для y15, b1 для у7, b2 для y1, b3 для у5, b4 для у6, b3 для y13, b6 для у11, b7 для у9, b8 для у8, b9 для y14, b10 для y12, b11 для у3, b12 для у0, b13 для у10, b14 для у4 и b15 для у2. Настоящее изобретение можно применять, например, в системе передачи данных для передачи кода LDPC и т.д.

TURBO CODER; METHOD AND DEVICE FOR INTERLEAVING DATA ELEMENTS

MODULE PARALLEL BITS INTERLEAVING

УСТРОЙСТВО И СПОСОБ ОБРАБОТКИ ДАННЫХ

Устройство обработки данных отображает входные символы, предназначенные для передачи, в заданное количество сигналов поднесущей ортогонального мультиплексированного с частотным разделением (ОМЧР) символа. Процессор обработки данных включает в себя запоминающее устройство перемежителя, которое считывает заданное количество символов данных для отображения на сигналы поднесущей ОМЧР. Запоминающее устройство перемежителя считывает символы данных на поднесущие ОМЧР для выполнения отображения, причем считывание из запоминающего устройства выполняют в другом порядке, чем считывание в запоминающее устройство, порядок определяют из набора адресов, в результате чего символы данных перемежают на сигналы поднесущей. Набор адресов генерируют из генератора адреса, который содержит линейный сдвиговый регистр с обратной связью и схему перестановок. Полином генератора для линейного сдвигового регистра с обратной связью предусмотрен с порядком перестановок, который был установлен путем анализа на основе ...

DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD

Deinterlacing device

Fault correcting mechanism for CD player

An error correction mechanism of optical disc playing system is featured as utilizing a fetching device to fetch content, a control device to judge whether there is defect in content or not and to transmit download request to network for downloading defect part, a receiving device to receive downloaded defect part; adding received defect part in fetched content for obtaining corrected content; using a decoding device to decode the corrected content and to play it. The system can correct errors quickly and effectively since it is connected on network.

串行链接卷积码编码器及其中的交错器和交错方法

... 公开了一种串行链接卷积码(SCCC)编码器及用于该编码器中的交错器和交错方法。该交错器具有带m行组和n列组的存储器，和该存储器在各个组中存储串行输入码元。该交错器随机选择m个行组之一，然后随机选择在所选行中的位置之一，最后输出存储在所选行中的所选位置上的码元，以便产生交错码元。该SCCC编码器包括用于编码来自交错器的交错码元的分编码器。该分编码器具有被编码的码的有效自由距离。当串行输入码元的数量是k时，选择存储器中的m行组和n列组，使得m×n≥k，并且m大于有效自由距离。 ...

PROCESS AND DEVICE OF CODING, PROCESS AND DEVICE OF DECODING, AND SYSTEMESLES IMPLEMENTING

PROCEEDED OF TURBOCODAGE ENTRELACEURS BOLTS HAS, AND SYSTEMS FOR THEIR MISEEN WORKS

Apparatus and method for processing interleaving/de-interleaving with address generator and channel encoder system using it

방송 신호 전송 장치, 방송 신호 수신 장치, 방송 신호 전송 방법 및 방송 신호 수신 방법

... 본 발명의 실시예에 따르면, 서비스 데이터를 인코딩하는 인코더; 상기 인코딩된 데이터를 심볼로 매칭하는 심볼 매퍼; 신호 프레임을 생성하는 프레임 빌더; 프리퀀시 인터리빙 시퀀스를 이용하여 상기 신호 프레임 내에 데이터를 프리퀀시 인터리빙하는 프리퀀시 인터리버; 여기서, 상기 프리퀀시 인터리빙 시퀀스는, 메인 시퀀스 및 심볼 오프셋 시퀀스에 기초하여 생성되고, 상기 프리퀀시 인터리빙 시퀀스가 생성되는 과정은, FFT (fast fourier transform )모드에 기반하여 상기 메인 시퀀스를 생성하는 단계; 두 개의 OFDM 심볼들에 대응한 상기 심볼 오프셋 시퀀스를 생성하는 단계; 및 상기 메인 시퀀스와 상기 심볼 오프셋 시퀀스를 이용하여 생성된 제 1 시퀀스의 어드레스를 체크하고, 상기 제 1 시퀀스의 어드레스가 유효한 범위에 있는 경우 상기 유효한 어드레스 범위의 제 1 시퀀스를, 상기 프리퀀시 인터리빙 시퀀스로 출력하는 단계; 를 포함하고, 상기 프레퀀시 인터리빙된 데이터를 OFDM 스킴에 따라 변조하는 변조부; 및 상기 변조된 데이터를 포함하는 방송 신호를 전송하는 전송부;를 포함하는 방송 신호 전송 장치를 제공한다.

비트 인터리버

... 수신 성능의 향상을 도모하기 위한 본 발명의 비트 인터리브 방법은 의사 순회 저밀도 패리티체크 부호화 방식으로 생성된 부호어의 비트를 재배열하는 비트 인터리브 방법으로, 각 순회블록의 비트의 콘스테레이션 어 중의 위치를 결정하는 순회블록 퍼뮤테이션 규칙에 따라서 부호어의 순회블록을 재배열하는 순회블록 퍼뮤테이션 처리와, 순회블록의 재배열 후의 부호어의 비트를 재배열하는 비트 퍼뮤테이션 처리를 포함한다.

Interleaving method for short burst error correction control in the high density DVD

LDPC 코드워드 인터리빙 매핑 방법 및 디인터리빙 디매핑 방법

... 일종의 LDPC 코드워드 인터리빙 매핑 방법 및 디인터리빙 디매핑 방법으로서, LDPC 코드워드 중 검증 부분에 대해 제1차 비트 인터리빙을 수행하여 검증 비트 스트림을 얻는 절차; 당해 코드워드 중 정보 비트 부분과 검증 비트 스트림을 결합하여 제1차비트 인터리빙 후의 LDPC 코드워드를 얻는 절차; 제1차 비트 인터리빙 후의 코드워드를 예정된 길이로 연속된 복수의 비트 서브 블록으로 분리하고, 대응하는 비트 교환 패턴으로 상기 비트 서브 블록의 배열순서를 변화시켜 제2차 비트 인터리빙 후의 코드워드를 형성하는 절차; 제2차 비트 인터리빙 후의 코드워드를 2개 부분으로 분리하고, 이 2개 부분을 모두 열 순서로 기록하고 행 순서로 판독하여 제3차비트 인터리빙 후의 코드워드를 얻는 절차; 제3차 비트 인터리빙 후의 코드워드를 대응하는 성상도에 따라 성상도 매핑을 수행하여 심볼 스트림을 얻으며, 그 중, 상이한 코드 길이 및 코드 레이트의 LDPC 코드 테이블에 대하여 이론 분석 및 최적화를 통해 디자인한 비트 교환 패턴과 성상도를 이용하여 인터리빙 매핑 처리를 수행하는 절차를 포함하는 LDPC 코드워드의 인터리빙 매핑 방법. 본 기술방안은 수신단의 수신 임계값을 저하시킨다.

데이터 처리 장치 및 데이터 처리 방법

... 본 기술은, 양호한 에러율의 LDPC 부호를 제공할 수 있도록 하는 데이터 처리 장치 및 데이터 처리 방법에 관한 것이다. LDPC 인코더는, 부호 길이가 16200비트이고, 부호화율이 10/15인 LDPC 부호에 의한 부호화를 행한다. LDPC 부호는, 정보 비트와 패리티 비트를 포함하고, 검사 행렬 H는, LDPC 부호의 정보 비트에 대응하는 정보 행렬부와 패리티 비트에 대응하는 패리티 행렬부로 구성된다. 검사 행렬 H의 정보 행렬부는, 그 정보 행렬부의 1의 요소의 위치를 360열마다 나타내는 검사 행렬 초기값 테이블에 의해 표시된다. 본 기술은, LDPC 부호화 및 LDPC 복호를 행하는 경우에 적용할 수 있다.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

방송 신호 송신 장치, 방송 신호 수신 장치, 방송 신호 송신 방법 및 방송 신호 수신 방법

... 본 발명은 방송 신호를 송신하는 장치를 제공한다. 장치는, 서비스 데이터를 인코딩하기 위한 인코더, 적어도 하나의 신호 프레임을 빌드하기 위해 인코딩된 서비스 데이터를 복수의 OFDM 심볼들로 매핑하기 위한 매퍼, OFDM (Orthogonal Frequency Division Multiplex) 방법에 의해 상기 빌드된 적어도 하나의 신호 프레임 내 데이터를 변조하기 위한 모듈레이터, 변조된 데이터를 갖는 방송 신호를 송신하기 위한 송신기를 포함한다.

방송 신호 송신 장치, 방송 신호 수신 장치, 방송 신호 송신 방법 및 방송 신호 수신 방법

... 본 발명은 방송 신호를 송신하는 방법을 제공한다. 방송 신호 송신 방법은 서비스 데이터를 인코딩하는 단계, 상기 인코딩된 서비스 데이터를 맵핑함으로써 적어도 하나의 신호 프레임을 빌드(build)하는 단계, 빌드된 신호 프레임 내의 데이터를 OFDM(orthogonal frequency division multiplexing) 방법에 의해 변조하는 단계 및 상기 변조된 데이터를 갖는 방송 신호를 송신하는 단계를 포함할 수 있다.

PHYSICAL LAYER PROCESSING APPARATUS FOR CDMA WIRELESS COMMUNICATION SYSTEM AND METHOD THEREFOR

PURPOSE: A physical layer processing apparatus for a CDMA(Code Division Multiple Access) wireless communication system and a method therefor are provided to process data in a physical layer of the CDMA communication system. CONSTITUTION: A read/write controller(78) connects to the first interleaver buffer(82) and a physical channel buffer(84), reads bits from the first address of the first interleaver buffer(82), and writes the read bits in the second address of the physical channel buffer(84). A push address generating engine(86) connects to the read/write controller(78), and determines the second address with respect to the bits of the first address by the first address. The push address generating engine(86) has a rate matching engine(88). The rate matching engine(88) processes a turbo coding bit as one bit of regular string, parity 1 string and parity 2 string, and determines an address of the bits after rate matching. A control parameter block(102) outputs variables(e-ini,e-plus and ...

METHOD AND DEVICE OF INTERCALATION FOR USE IN CODER OF CODE CONVOLUCIONAL CONCATENATED IN SERIES IN A SYSTEM OF MOBILE COMMUNICATION

DEVICE AND METHOD FOR INTERLACED ENCODING RS CODE

A device and method for interlaced encoding RS code, the RS code used being RS (N, K, S). The method comprises: firstly, writing the data in the data packet to be RS interlaced encoded into the information region of the RS code byte interlacer column-by-column in turn; then, constructing the data of each row of the check region based on the data written into the information region; finally, performing circular shifting process on the data of the check region, and read out the data of the check region in the RS code byte interlacer column-by-column in turn.

BLOCK INTERLEAVING FOR TURBO CODING

Cette invention concerne un entrelaceur qui reçoit des trames de données entrantes de taille N. L'entrelaceur indexe les éléments de la trame au moyen d'une matrice d'indexation N¿1 x N¿2. Il ré-agence ensuite les données en permutant les rangées de la matrice. Il utilise l'équation I(j,k) = I(j,('alpha'¿jk + 'beta'¿j)modP) pour permuter les colonnes (indexées par k) de chaque rangée (indexée par j.) P est au moins égal à N¿2, 'beta'¿j est une constante qui peut être différente pour chaque rangée et chaque 'alpha'¿j est un nombre premier relatif par rapport à P. Après permutation, l'entrelaceur restitue les données dans un ordre autre que celui dans lequel il les a reçues (en d'autres termes, réception séquentielle rangée par rangée, sortie séquentielle colonne par colonne).

METHOD AND ARRANGEMENT FOR IMPLEMENTING INTRA-FRAME INTERLEAVING

A method and radio device are provided for interleaving a stream of data (201) consisting of digital information symbols prior to transmission over a radio interface. A permutation is performed (202, 203, 401, 402) to the stream of digital data, thus producing a permutated stream of digital data (204). From the permutated stream of digital data there are provided at least two component streams (404) for mapping each component stream into a spreading code (406). The order of information symbols is reversed (405) in at least one component stream prior to mapping it into a spreading code.

DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD

The present technology relates to a data processing apparatus and a data processing method that are able to secure good communication quality in data transmission using an LDPC code. One symbol is mapped to one of 16 signal points prescribed in 16APSK, with code bits of four bits of an LDPC code having a code length of 16200 bits and a code rate of 7/15 as one symbol. 16 signal points prescribed in 16APSK are four signal points on an inner circle and 12 signal points on an outer circle, and a radius ratio of the inner circle and the outer circle is 5.25. The present technology may be applied to, for example, a case of performing data transmission using an LDPC code.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 12/15, 6/15, or 8/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.

Block de-interleaving system

The block de-interleaving system includes an input for receiving a set of time-aligned blocks or interleaved data, physical memory unit, and a de-interleaving block for writing the blocks in the memory in a first predetermined manner and reading the blocks from the memory in a second predetermined manner to de-interleave the data of the blocks. The physical memory unit may include several different physical memories, and the de-interleaving block is adapted to completely write and read a block into and from one physical elementary memory.

Data processing method and apparatus, recording medium, reproducing method and apparatus using the same method

A burst error-correcting capability is largely improved. At least the even-number row and at least the odd-number row of the data block which is a set of data sectors are separated. An outer parity is created for each column and an inner parity is created for each row. Then, the outer parity is scattered with respect to each of the sectors of the data block to be interleaved.

Bit reverse interleaving methods for QAM modulation in a wireless communication system

In a communication method, a sequence of information bits is encoded into systematic bits and parity bits. The systematic bits and the parity bits are grouped in output blocks, each output block to be assigned to an address of a constellation scheme. The addresses include addresses that are more prone to error and address that are less prone to error so that the symbols are grouped such that bits in groups of consecutive bits of the sequence of information bits are not all assigned to addresses that are more prone to error.

APPARATUS FOR TRANSMITTING BROADCAST SIGNALS, APPARATUS FOR RECEIVING BROADCAST SIGNALS, METHOD FOR TRANSMITTING BROADCAST SIGNALS AND METHOD FOR RECEIVING BROADCAST SIGNALS

The present invention provides a method of transmitting broadcast signals. The method includes, encoding Data Pipe, DP, data according to a code rate, wherein the encoding further includes Low-Density Parity-Check, LDPC, encoding the DP data, Bit interleaving the LDPC encoded DP data, and mapping the bit interleaved DP data onto constellations; building at least one signal frame by mapping the encoded DP data; and modulating data in the built signal frame by an Orthogonal Frequency Division Multiplexing, OFDM, method and transmitting the broadcast signals having the modulated data.

Method of interleaving/deinterleaving in a communication system

A method of performing interleaving or deinterleaving in a communication system having at least one interleaver at the transmitter and at least one deinterleaver at the receiver. The method includes interleaving or deinterleaving the input bit sequence x_n as follows: y_n=x_pin, n=0, . . . , N-1, using a bridge function between pi_n and n, n=0, . . . , N-1, based on a spline linear model. When the system includes a first and a second interleaving or deinterleaving, the method is performed for both. When the second interleaving or deinterleaving includes adding padding bits, the location in the interleaved or deinterleaved bit sequence of the padding bits is determined and interleaving or deinterleaving for the determined locations is skipped.

Apparatus comprising a circular buffer and method for assigning redundancy versions to a circular buffer

During operation of a transmitter a circular buffer is created where only column tops of the circular buffer are defined as a starting position for a redundancy version. Where the circular buffer is in sequence format, all possible redundancy versions are at positions Kstream/32(12×i+), i=0, 1, . . . , 7 where indicates the column index of the starting position of the first RV (RV0).

DATA PROCESSING METHOD AND APPARATUS, RECORDING MEDIUM, REPRODUCING METHOD AND APPARATUS USING THE SAME METHOD

A burst error-correcting capability is largely improved. At least the even-number row and at least the odd-number row of the data block which is a set of data sectors are separated. An outer parity is created for each column and an inner parity is created for each row. Then, the outer parity is scattered with respect to each of the sectors of the data block to be interleaved.

Encoding and decoding apparatus and method

An interleaver and method of interleaving operate on data represented in a sequence of symbols to produce an interleaved sequence of symbols. The interleaver performs intra-block and inter-block permutations on the sequence of symbols. An encoder and method of encoding operate on data represented in a source sequence of symbols. The source sequence of symbols is encoded into a first sequence of codewords and interleaved using intra-block and inter-block permutations to produce a sequence of interleaved symbols. The sequence of interleaved symbols is encoded into a second sequence of codewords. A decoder and method of decoding operate on data represented in a sequence of received symbols. The sequence of received symbols comprises a formatted copy of the source sequence of symbols and the first and the second sequence of codewords.

Method and arrangement for implementing intra-frame interleaving

A method and radiod device are provided for interleaving a stream of data (201) consisting of digital information symbols prior to transmission over a radio interface. A permutation is performed (202, 203, 401, 402) to the stream of digital data, thus producing a permutated stream of digital data (204). From the permutated stream of digital data there are provided at least two component streams (404) for mapping each component stream into a spreading code (406). The order of information symbols is reversed (405) in at least one component stream prior to mapping it into a spreading code.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 64800 bits and an encoding rate r is 7/15, 9/15, 11/15, or 13/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.

TRANSMITTER APPARATUS AND SIGNAL PROCESSING METHOD THEREOF

A transmitter apparatus and a receiver apparatus are provided. The transmitter apparatus includes: an encoder configured to generate a low density parity check (LDPC) by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol. The modulator maps a bit included in a predetermined group from among a plurality of groups constituting the LDPC codeword onto a predetermined bit in the modulation symbol. 2. The receiving method of claim 1 , wherein each of the plurality of groups comprises 360 values.3. The receiving method of claim 1 , further comprises:deinterleaving one or more values from among the values of the deinterleaved plurality of groups, andwherein the decoding is performed by decoding the values of the deinterleaved plurality of groups comprising the deinterleaved one or more values.5. The transmitting method of claim 4 , wherein each of the plurality of bit groups comprises 360 bits. This is a Continuation of U.S. application Ser. No. 16/424,481 filed May 29, 2019, which is a Continuation of U.S. application Ser. No. 15/264,057 filed Sep. 13, 2016, now U.S. Pat. No. 10,367,606 issued on Jul. 30, 2019, which is a Continuation of U.S. application Ser. No. 14/324,436 filed Jul. 7, 2014, now U.S. Pat. No. 9,484,957 issued on Nov. 1, 2016, which claims the benefit under 35 U.S.C. § 119 from U.S. Provisional Application 61/843,114 filed on Jul. 5, 2013, U.S. Provisional Application 61/864,758 filed on Aug. 12, 2013, and U.S. Provisional Application 61/897,480 filed on Oct. 30, 2013, in the United States Patent and Trademark Office, and Korean Patent Application 10-2013-0125664 filed on Oct. 21, 2013, Korean Patent Application 10-2014-0026298 filed on Mar. 5, 2014, and Korean Patent Application 10-2014-0083647 filed on Jul. 4, 2014, in the Korean Intellectual Property Office, the disclosures of which are incorporated herein by reference in their ...

Transmitting apparatus and interleaving method thereof

The transmitting apparatus includes: an encoder configured to generate a Low Density Parity Check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a plurality of modulation symbols, wherein the modulator is configured to map bits included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of each of the modulation symbols.

TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding of input bits based on a parity check matrix including information word bits and parity bits, the LDPC codeword including a plurality of bit groups each including a plurality of bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the interleaver is further configured to interleave the LDPC codeword such that a bit included in a predetermined bit group from among the plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. 2. The receiving method of claim 1 , wherein each of the plurality of groups comprises 360 values.3. The receiving method of claim 1 , wherein π(j) is determined based on at least one of the code length claim 1 , a modulation method for the signal claim 1 , and the code rate.5. The transmitting method of claim 4 , wherein each of the plurality of bit groups comprises 360 bits. This is a Continuation of U.S. application Ser. No. 16/443,321 filed Jun. 17, 2019, which is a Continuation of U.S. application Ser. No. 15/783,162 filed Oct. 13, 2017, which issued as U.S. Pat. No. 10,367,533, which is a Continuation of U.S. application Ser. No. 14/716,132 filed May 19, 2015, which issued as U.S. Pat. No. 9,800,269 on Oct. 24, 2017, and which claims priority from U.S. Provisional Application No. 62/001,155 filed on May 21, 2014 and Korean Patent Application No. 10-2015-0000697 filed on Jan. 5, 2015, the disclosures of which are incorporated herein by reference in their entirety.Apparatuses and methods consistent with exemplary embodiments relate to a transmitting apparatus which processes and transmits data, and an interleaving method thereof.In the 21st century information-oriented society, broadcasting communication services are ...

Method of and device for communication

A turbo encoder (1) includes an interleaver (32, 33) which stores 289-bit information bit sequences in an input buffer of 17 (abscissa M: prime number) x 17 (ordinate N: natural number), generates random sequences of 16 types by shifting a specific 16-bit random sequence generated by using the prime number bit by bit in units of rows, maps information bit sequences of an interleave length (289 bits) on the 17 (M) x 17 (N) mapping pattern generated from the random sequences of 16 types, and reads the mapped information bit sequences in units of columns.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present invention relates to a data processing device and a data processing method capable of improving the resistance to error of data. An LDPC encoder 115 performs encoding using an LDPC code having a code length of 4320 bits and a coded rate of one of four types including 1/2, 7/12, 2/3, 3/4. A parity check matrix H of the LDPC code is configured by arranging elements of 1's of an information matrix, which are determined based on a parity check matrix initial value table of the parity check matrix H representing positions of elements of 1's of the information matrix corresponding to an information length according to the code length and the coded rate for every 72 columns, in a column direction at a period of 72 columns. The parity check matrix initial value table, for example, is used for digital broadcasting for mobile terminals. The present invention can be applied in a case where LDPC encoding is performed.

BLOCK INTERLEAVING FOR TURBO CODING

УСТРОЙСТВО ОБРАБОТКИ ДАННЫХ И СПОСОБ ОБРАБОТКИ ДАННЫХ

Изобретение относится к технике связи и предназначено для обработки данных. Технический результат – обеспечение хорошего качества связи при передаче данных, используя код LDCP. В устройстве передачи данных, при взаимном обмене для взаимного обмена бита кода для кода LDPC, в котором длина кода составляет 16200 битов и скорость кодирования равна 8/15, на символьный бит для символа, соответствующего любой из 8 точек сигнала, определенных 8PSK, когда 3 бита из битов кода, сохраненные в трех модулях хранения, имеющих емкость хранения 16200/3 битов, и считываемые поразрядно из модулей хранения, выделяют для одного символа, бит b0, бит b1 и бит b2 взаимно заменяют с битом y1, битом y0 и битом y2, соответственно. Положение взаимно замененного бита кода, переданного устройством передачи данных, возвращают в исходное положение. 4 н.п. ф-лы, 79 ил.

УСТРОЙСТВО ОБРАБОТКИ ДАННЫХ И СПОСОБ ОБРАБОТКИ ДАННЫХ

Изобретение относится к устройствам и способам обработки данных. Технический результат - повышение устойчивости к ошибкам данных. Для этого когда заданный код LDPC (проверки четности с низкой плотностью), имеющий длину кода 16200 битов и скорость кода равную 8/15, отображают на 256 точек сигналов, при этом (#i+1)-ый бит, отсчитанный от самого верхнего бита из 8×1 знаковых битов, a (#i+1)-ый бит, отсчитанный от самого верхнего бита из 8×1 символьных битов одного символа выражены в качестве бита b#i и бита y#i соответственно, причем демультиплексор выполнен с возможностью перестановки для назначения бита b0 в качестве бита y2, бита b1 в качестве бита y6, бита b2 в качестве бита y1, бита b3 в качестве бита y0, бита y4 в качестве бита y7, бита b5 в качестве бита y5, бита b6 в качестве бита y3 и бита b7 в качестве бита y4. Настоящая технология может применяться, например, в системах передачи, которые передают коды LDPC. 4 н.п. ф-лы, 75 ил.

УСТРОЙСТВО ОБРАБОТКИ ДАННЫХ И СПОСОБ ОБРАБОТКИ ДАННЫХ

Группа изобретений относится к области передачи данных и может быть использована для кодирования/декодирования с использованием LDPC-кода. Техническим результатом является повышение устойчивости к ошибке данных. LDPC-код, имеющий кодовую длину, равную 16200 битов, и скорость кодирования, равную 1/3, модулируется с помощью 16QAM, если кодовый бит из 4×2 битов и (i+1)-ый бит из наиболее значимого бита символьных битов из 4×2 битов двух последовательных символов установлены в битах b#i и y#i, при этом демультиплексор выполняет перестановку для назначения битов b0, b1, b2, b3, b4, b5, b6 и b7 битам y6, y0, y3, y4, y5, y2, y1 и y7 соответственно. 8 н.п. ф-лы, 178 ил.

Method for encoding data with double-interlaced parity symbols, for a radio infrastructure, and associated codec

A method is dedicated to encoding data that must be transmitted by means of a wave-based transmission infrastructure, and comprises i) a step consisting of creating in parallel M first matrices having T rows and C columns with subsets of data from B successive received bursts, the subsets of data from each burst being distributed within at least two successive first matrices, ii) a step consisting of creating in parallel M second matrices each having T rows and N columns with parity symbols resulting from encoding the data that is respectively contained in the rows of each of the M first matrices, iii) a step consisting of creating in parallel M first matrices having K rows and C columns with parity symbols resulting from encoding the data that is respectively contained in the columns of each of the M first matrices, and iv) a step consisting of distributing by interlacing, firstly, J subsets of parity symbols from each second matrix into J successive sets, and secondly P subsets of parity symbols from each third matrix into P of these successive sets, and of placing into each of the successive sets the respective data from the successive received bursts.

Apparatus and method for transmitting and receiving data in a communication or broadcasting system using linear block code

Provided is a method for transmitting data in a communication or broadcasting system using a linear block code by generating a codeword by encoding input information data bits, interleaving the codeword; outputting modulation signal-constituting bits by bit-mapping the interleaved codeword using a bit-mapping table predetermined depending on a modulation scheme and a coding rate, outputting a modulation signal by modulating the modulation signal-constituting bits and transmitting the modulation signal via a transmit antenna.

Encoding module, apparatus and method for determining a position of a data bit within an interleaved data stream

An encoding module comprises an inverse interleaving module arranged to: determine an initial location index within an interleaving matrix for a data bit; and perform bit reverse ordering (BRO) on a column index value for the initial location index for the data bit to obtain a BRO column index value for the data bit. The inverse interleaving module is further arranged to calculate a number of valid interleaving matrix addresses preceding a location index for the data bit following bit reverse ordering; and determine a position of the data bit within the interleaved data stream based on the calculated number of valid addresses.

Method and apparatus for interleaving data in a mobile communication system

An interleaving method to which time-first-mapping is applied in a mobile communication system is provided. The interleaving method includes writing coded bits into an interleaver on a row-by-row basis, and reading the coded bits written in the interleaver on a column-by-column basis, wherein the coded bits are written by groups having a size according to a modulation order

Transmitter and method for transmitting data block in wireless communication system

Provided are a transmitter and a method for transmitting a data block in a wireless communication system. The method comprises the following steps: deciding the number of bits (s) and encoders (NES) to allocate to one axis of a signal constellation; encoding an information bit based on the s and the NES and generating a coded block; parsing the coded block based on the s and the NES and generating a plurality of frequency sub-blocks; and transmitting the plurality of frequency sub-blocks to a receiver.

Transmitter and method for transmitting data block in wireless communication system

Provided are a transmitter and a method for transmitting a data block in a wireless communication system. The method comprises the following steps: encoding an information bit and generating a block coded with an NCBPSS bit; generating two sub-blocks by parsing the coded block; and transmitting the two sub-blocks to the transmitter. By preventing the bits that are contiguous to the encoding block from having continuous identical reliabilities on a signal constellation, the deterioration of the decoding performance of the transmitter can be prevented.

Time varying data permutation apparatus and methods

Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations.

System and method for frequency diversity

A system and method for frequency diversity uses interleaving in a wireless communication system utilizing orthogonal frequency division multiplexing (OFDM) with various FFT sizes. Subcarriers of one or more interlaces are interleaved in a bit reversal fashion and the one or more interlaces are interleaved in the bit reversal fashion.

Interleaving method and deinterleaving method

An interleaving method performed by a transmitter for a communication system with quasi-cyclic low-density parity-check codes, spatial multiplexing, and T transmit antennas is used for applying permutation to N cyclic blocks of a codeword in order to map bits of the permutated cyclic blocks onto T constellation words constituting multiple spatial-multiplexing blocks from the codeword. Each cyclic block consists of Q bits.

Combined group ecc protection and subgroup parity protection

A method and system are disclosed for providing combined error code protection and subgroup parity protection for a given group of n bits. The method comprises the steps of identifying a number, m, of redundant bits for said error protection; and constructing a matrix P, wherein multiplying said given group of n bits with P produces m redundant error correction code (ECC) protection bits, and two columns of P provide parity protection for subgroups of said given group of n bits. In the preferred embodiment of the invention, the matrix P is constructed by generating permutations of m bit wide vectors with three or more, but an odd number of, elements with value one and the other elements with value zero; and assigning said vectors to rows of the matrix P.

Rate Matching And Channel Interleaving For A Communications System

A method, an apparatus, and a computer program product for matching a rate of data bits to a desired rate by deletion of redundant data bits or repetition of data bits are disclosed. In a non-interleaved matrix of the data bits, a pattern of bits to be deleted or repeated to provide the desired data rate is determined. An address of each bit in the pattern in a manner inverse to the interleaving process is decoded to produce a respective address of the bit in the matrix. The respective bit in the interleaved data bits is deleted or repeated depending upon the respective address. The address decoding is performed in the same manner as a coding of addresses for producing the interleaved data bits from the non-interleaved matrix of the data bits.

Method and apparatus for interleaving data in a mobile communication system

An interleaving method in a mobile communication system is provided. The interleaving method includes encoding a plurality of bits to output encoded bits in a sequence, interleaving the encoded bits based on a modulation order to generate interleaved encoded bits comprising consecutive bits having a size based on the modulation order, the consecutive bits corresponding to consecutive bits of the encoded bits, scrambling the interleaved encoded bits with a scrambling code to generate scrambled bits, and modulating the scrambled bits based on the modulation order to output at least one symbol.

DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD

A data processing apparatus and a data processing method which enable provision of an LDPC code that achieves good error-rate performance. An LDPC encoding unit performs encoding using an LDPC code having a code length of 64800 bits and a code rate of 24/30, 25/30, 26/30, 27/30, 28/30, or 29/30. The LDPC code includes information bits and parity bits, and a parity check matrix H is composed of an information matrix portion corresponding to the information bits of the LDPC code, and a parity matrix portion corresponding to the parity bits. The information matrix portion of the parity check matrix H is represented by a parity check matrix initial value table that shows positions of elements of 1 in the information matrix portion in units of 360 columns. The present technology apparatus and method may be applied to LDPC encoding and LDPC decoding. 1an encoding unit configured to encode information bits into an LDPC (Low Density Parity Check) code having a code length of 64800 bits and a code rate of 24/30 on the basis of a parity check matrix of the LDPC code, whereinthe LDPC code includes information bits and parity bits,the parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits,the information matrix portion is represented by a parity check matrix initial value table, andthe parity check matrix initial value table is a table showing positions of elements of 1 in the information matrix portion in units of 360 columns, including{'b': 1504', '2103', '2621', '2840', '3869', '4594', '5246', '6314', '7327', '7364', '10425', '11934', '12898', '12954}{'b': 27', '1903', '3923', '4513', '7812', '8098', '8428', '9789', '10519', '11345', '12032', '12157', '12573', '12930}{'b': 17', '191', '660', '2451', '2475', '2976', '3398', '3616', '5769', '6724', '8641', '10046', '11552', '12842}{'b': 13', '1366', '4993', '6468', '7689', '8563', '9131', '10012', '10914', '11574', '11837', ' ...

TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. 2. The receiving apparatus of claim 1 , wherein each of the plurality of groups comprises 360 values.3. The receiving apparatus of claim 1 , wherein π(j) is determined based on at least one of the code length claim 1 , a modulation method and the code rate. This is a continuation of U.S. patent application Ser. No. 15/435,042, filed Feb. 16, 2017, which is a continuation of U.S. patent application Ser. No. 15/130,204, filed on Apr. 15, 2016, issued as U.S. Pat. No. 9,692,454 on Jun. 27, 2017, which is a continuation of U.S. patent application Ser. No. 14/625,862, filed Feb. 19, 2015, issued as U.S. Pat. No. 9,602,137 on Mar. 21, 2017, which claims priority from U.S. Provisional Application No. 61/941,676 filed on Feb. 19, 2014, U.S. Provisional Application No. 62/001,170 filed on May 21, 2014, and Korean Patent Application No. 10-2015-0000671 filed on Jan. 5, 2015. The entire disclosures of the prior applications are considered part of the disclosure of this continuation application, and are hereby incorporated by reference.Apparatuses and methods consistent with exemplary embodiments relate to a transmitting apparatus and an interleaving method thereof, and more particularly, to a transmitting apparatus which processes data and transmits the data, and an interleaving method thereof.In the 21st century information-oriented society, broadcasting communication services are moving into the era of digitalization, ...

TRANSMITTING APPARATUS AND NON-UNIFORM CONSTELLATION MAPPING METHOD THEREOF

A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme. 2. The apparatus as claimed in claim 1 , wherein the constellation points as defined in the list comprises constellation points in one quadrant claim 1 , andwherein constellation points in remaining quadrants are obtained by indicating each constellation point a which is defined in the list as a*, −a*, and −a, respectively, * indicating complex conjugation. This is a continuation of U.S. application Ser. No. 15/726,806 filed Oct. 6, 2017, which is a continuation of U.S. application Ser. No. 14/715,817 filed on May 19, 2015, now U.S. Pat. No. 9,847,851, the disclosures of which is incorporated herein by reference in its entirety.Apparatuses and methods consistent with exemplary embodiments of the inventive concept relate to transmitting and receiving date using broadcasting, more particularly, to the design of non-uniform constellations used in a Bit Interleaved Coded Modulation (BICM) mapping bits at an output of an encoder and interleaver to complex constellations.The current broadcasting systems consistent with the Digital Video Broadcasting Second Generation Terrestrial (DVB-T2) use a Bit Interleaved and Coded Modulation (BICM) chain in order to encode bits to be transmitted. The BICM chain includes a channel encoder like a Low Density Parity Check (LDPC) encoder followed by a Bit Interleaver and a Quadrature Amplitude Modulation (QAM) mapper. The role of the QAM mapper is to map different bits output from the channel encoder and interleaved using the Bit Interleaver to QAM cells. Each cell represents a complex number having real ...

PARALLEL BIT INTERLEAVER

A bit interleaving method involves applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword, after the bit permutation process, into a plurality of constellation words each imade up of M bits, the codeword being divided into N/M sections, each constellation word being associated with one of the N/M sections, and the bit permutation process being performed such that each of the constellation words includes one bit from each of M different cyclic blocks associated with a given section. 1. A transmitting method for transmitting a codeword generated based on a quasi-cyclic low-density parity check coding scheme , the transmitting method comprising:a cyclic block permutation step of applying a cyclic block permutation process to a codeword made up of N cyclic blocks each consisting of Q bits, to reorder the cyclic blocks in accordance with a cyclic block permutation rule defining a reordering of the cyclic blocks;a bit permutation step of applying a bit permutation process to the codeword after the cyclic block permutation process, to reorder the bits of the codeword in accordance with a bit permutation rule defining a reordering of the bits;a dividing step of dividing the codeword after the bit permutation process into a plurality of constellation words, each of the constellation words being made up of M bits,a modulating step of mapping each constellation word to a modulated signal, anda transmitting step of transmitting a transmitting signal generated from the constellation words, whereinN is a multiple of M,the bit permutation rule defines the reordering of the bits of the codeword after the cyclic block permutation process, the reordering of the bit permutation rule being equivalent to a column-row permutation process including a writing process and a reading process, the bits of the N cyclic blocks being written into a matrix row-by-row during the writing process, the written bits being ...

APPARATUS FOR TRANSMITTING BROADCAST SIGNALS, APPARATUS FOR RECEIVING BROADCAST SIGNALS, METHOD FOR TRANSMITTING BROADCAST SIGNALS AND METHOD FOR RECEIVING BROADCAST SIGNALS

A method and an apparatus for transmitting broadcast signals thereof are disclosed. The apparatus for transmitting broadcast signals comprises an encoder for encoding service data, a mapper for mapping the encoded service data into a plurality of OFDM (Orthogonal Frequency Division Multiplex) symbols to build at least one signal frame, a frequency interleaver for frequency interleaving data in the at least one signal frame by using a different interleaving-seed which is used for every OFDM symbol pair comprised of two sequential OFDM symbols, a modulator for modulating the frequency interleaved data by an OFDM scheme and a transmitter for transmitting the broadcast signals having the modulated data, wherein the different interleaving-seed is generated based on a cyclic shifting value and wherein an interleaving seed is variable based on an FFT size of the modulating. 120-. (canceled)21. A method comprising:at an electronic device with one or more processors for processing broadcast signals:encoding data for one or more services of the broadcast signals;building a signal frame carrying the encoded data; generating a main sequence, a same main sequence being used for two consecutive symbols to be processed by an OFDM (Orthogonal Frequency Division Multiplexing) scheme;', 'generating a symbol offset, a value of the symbol offset being constant for the two consecutive symbols;', 'generating a sequence based on the main sequence and the symbol offset; and', 'checking a validity of address of the generated sequence to output the interleaving sequence that corresponds to one or more valid addresses;, 'frequency interleaving data in the signal frame by a interleaving sequence that applies to a symbol in the data signal, wherein the interleaving sequence is generated bymodulating frequency interleaved data by the OFDM scheme; andtransmitting broadcast signals carrying modulated data.22. The method of claim 21 , wherein when the frequency interleaving applies to a signal ...

INTERLEAVING AND MAPPING METHOD AND DEINTERLEAVING AND DEMAPPING METHOD FOR LDPC CODEWORD

An interleaving and mapping method and a deinterleaving and demapping method for an LDPC codeword are provided. The interleaving and mapping method comprises: performing first bit interleaving on a parity bits part of the LDPC codeword to obtain interleaved parity bits; splicing an information bit part of the codeword and the interleaved parity bits into a codeword after the first bit interleaving; dividing the codeword after the first bit interleaving into multiple consecutive bit subblocks in a predetermined length, and changing the order of the bit subblocks according to a corresponding permutation order (bit-swapping pattern) to form a codeword after second bit interleaving; dividing the codeword after the second bit interleaving into two parts, and writing the two parts into storage space in a column order respectively and reading the two parts from the storage space in a row order respectively to obtain a codeword after third bit interleaving. 1. A transmitter , comprising:an encoder configured to encode, based on a low-density parity-check (LDPC) code with a code rate of 4/15 and a code length of 64,800 bits, input information bits to generate an LDPC codeword, wherein the LDPC codeword comprises an information bit part and a check bit part;an interleaver dividing the LDPC codeword into multiple bit subblocks, and changing an order of the bit subblocks according to a permutation order, so as to provide a bit-interleaved LDPC codeword; anda modulator mapping bits of the bit-interleaved LDPC codeword onto constellation points for irregular 16-quadrature amplitude modulation (QAM);the permutation order is defined as follows:165 8 136 2 58 30 127 64 38 164 123 45 78 17 47 105 159 134 124 147 148 109 67 98 157 57 156 170 46 12 172 29 9 3 144 97 83 151 26 52 10 39 50 104 92 163 72 125 36 14 55 48 1 149 33 110 6 130 140 89 77 22 171 139 112 113 152 16 7 85 11 28 153 73 62 44 135 116 4 61 117 53 111 178 94 81 68 114 173 75 101 88 65 99 126 141 43 15 18 90 35 24 142 ...

Protection Against Side-Channel Attacks

A method is proposed for copying a source array into a target array, wherein both the source array and the target array have at least two elements, wherein each element has a value, in which the elements of the source array are copied into the target array in the sequence of a random permutation, wherein, after a step of copying an element of the source array into the target array, the source array, the target array or the source array and the target array are rotated. A device is also indicated accordingly. 1. A method for copying a source array into a target array , wherein both the source array and the target array have at least two elements , wherein each element has a value , the method comprising:copying the elements of the source array into the target array in the sequence of a permutation, andafter copying an element of the source array into the target array, the source array, the target array or the source array and the target array are permutated.2. The method of claim 1 , in which at least one cyclic shift register is provided for the source array and the target array to store the at least two elements.3. The method of claim 1 , in which a loop is provided which predefines a number of iterations which corresponds to the number of the at least two elements claim 1 , wherein claim 1 , for each iteration claim 1 ,the value is copied from the source array into the target array according to the sequence of the random permutation,the source array and the target array are rotated through a predefined position.4. The method of claim 1 , in which a loop is provided which predefines a number of iterations which corresponds to the number of the at least two elements claim 1 , wherein claim 1 , for each iteration claim 1 ,the value is copied from the source array into the target array according to the sequence of the permutation,the source array is rotated through a first number of positions, wherein the first number is defined by a first digit,the target array is ...

Transmitting method including bit group interleaving

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

TIME VARYING DATA PERMUTATION APPARATUS AND METHODS

Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations. 1. A data encoder system comprising:a first permutation apparatus comprising a first time-varying permutation element, the first permutation apparatus being configured to generate a first time-varying stream;a Forward Error Correction (FEC) encoder configured to encode the first time-varying stream to generate an encoded stream; anda second permutation apparatus comprising a second time-varying permutation element, the second time-varying permutation element being configured to generate a second time-varying stream based on the encoded stream.2. The data encoder system of wherein the first permutation apparatus further comprising a block interleaver configured to generate an interleaved data stream claim 1 , the first-time varying stream being generated based on the interleaved data stream.3. The data encoder of wherein the second permutation apparatus comprises a de-interleaver configured to de-interleave the second time-varying stream.4. The data encoder of wherein the first permutation apparatus is configured to process an input data stream.5. The data encoder of wherein the second permutation apparatus is configured to generate an encoded output data stream based on the second-time varying stream.6. The data encoder of wherein the second permutation apparatus further comprises a third time-varying permutation element for performing inverse permutation.7. The data encoder of wherein the first time-varying permutation ...

ERROR CORRECTION DEVICE AND ERROR CORRECTION METHOD

Provided is an error correction device including an encoding circuit configured to encode a plurality of error correction code sequences, in which the encoding circuit includes a plurality of encoding circuits connected in parallel, and is configured to execute encoding processing for the plurality of error correction code sequences through use of all the plurality of encoding circuits by adjusting an output bus width and a frequency of an operation clock with respect to a difference in transmission rate for any payloads input in one or more systems. 1. An error correction device , comprising at least one of:an encoder configured to encode a plurality of error correction code sequences; anda decoder configured to decode the plurality of error correction code sequences,wherein the encoder includes a predetermined plurality of encoders connected in parallel, and is configured to execute encoding processing for the plurality of error correction code sequences through use of all the predetermined plurality of encoders by adjusting an output bus width and a frequency of an operation clock with respect to a difference in transmission rate for any one of a payload input in one system and payloads input in two or more systems, andwherein the decoder includes a predetermined plurality of decoders connected in parallel, and is configured to execute decoding processing for the plurality of error correction code sequences through use of all the predetermined plurality of decoders by adjusting an output bus width and a frequency of an operation clock with respect to a difference in transmission rate for any one of a payload input in one system and payloads input in two or more systems.2. The error correction device according to claim 1 , wherein the plurality of error correction code sequences are subjected to interleaving in units of bit or symbol with respect to a transmission order among data buses to which the plurality of error correction code sequences are input.3. The ...

TRANSMITTER APPARATUS AND BIT INTERLEAVING METHOD THEREOF

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding of input bits based on a parity check matrix including information word bits and parity bits, the LDPC codeword including a plurality of bit groups each including a plurality of bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the interleaver is further configured to interleave the LDPC codeword such that a bit included in a predetermined bit group from among the plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. 2. The transmitting method of claim 1 , wherein each of the plurality of bit groups comprises 360 bits.3. The transmitting method of claim 1 , wherein the interleaving further comprises:interleaving the interleaved plurality of bit groups.4. The transmitting method of claim 1 , wherein the π(j) is determined based on at least one of the code length claim 1 , a modulation method for the mapping claim 1 , and the code rate.6. The method of claim 5 , wherein each of the plurality of groups comprises 360 values.7. The method of claim 5 , wherein the π(j) is determined based on at least one of the code length claim 5 , a modulation method for the mapping claim 5 , and the code rate. This is a Continuation of U.S. application Ser. No. 16/460,305 filed Jul. 2, 2019, which is a Continuation of U.S. application Ser. No. 15/686,280 filed Aug. 25, 2017, which is a Continuation of application Ser. No. 14/716,503 filed May 19, 2015, and claims priority from U.S. Provisional Application No. 62/001,160 filed on May 21, 2014 and Korean Patent Application No. 10-2015-0069924 filed on May 19, 2015, the disclosures of which are incorporated herein by reference in their entirety.Apparatuses and methods consistent with exemplary embodiments ...

APPARATUS FOR TRANSMITTING BROADCAST SIGNALS, APPARATUS FOR RECEIVING BROADCAST SIGNALS, METHOD FOR TRANSMITTING BROADCAST SIGNALS AND METHOD FOR RECEIVING BROADCAST SIGNALS

A method and an apparatus for transmitting broadcast signals thereof are disclosed. The apparatus for transmitting broadcast signals, the apparatus comprises an encoder for encoding service data corresponding to each of a plurality of data transmission path, wherein each of the data transmission path carries at least one service component for broadcast services, an encoder for encoding signaling data, wherein the signaling data includes static data and dynamic data, a frame builder for building signal frames, wherein each of signal frames includes the encoded service data and the encoded signaling data, wherein each of signal frames belongs to one of the broadcast services, wherein the static data remain constant in the signal frames belonging to the broadcast service in a duration of a super frame and the dynamic data changes by the signal frames, a modulator for modulating the signal frames by an OFDM (Orthogonal Frequency Division Multiplex) scheme and a transmitter for transmitting the broadcast signals carrying the modulated signal frames. 120-. (canceled)21. A Method For Transmitting Broadcast Signals , Comprising:encoding service data corresponding to each of a plurality of data transmission paths;encoding signaling data;padding zero bits to the encoded signaling data, wherein a size of the padded zero bits is related to the variable size of the signaling data;LDPC encoding the zero padded signaling data by appending parity bits;building signal frames, wherein each of signal frames includes the encoded service data and the LDPC encoded signaling data;modulating the signal frames by an OFDM (Orthogonal Frequency Division Multiplex) scheme; andtransmitting the broadcast signals carrying the modulated signal frames.22. The method of claim 21 , wherein the method further comprises:segmenting the signaling data for the encoding.23. The method of claim 22 , wherein the method further comprises:scrambling the segmented signaling data.24. The method of claim 21 , ...

TRANSMITTER AND PARITY PERMUTATION METHOD THEREOF

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to perform parity permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups including the interleaved parity bits; and a puncturer configured to select some of the parity bits in the group-wise interleaved bit groups, and puncture the selected parity bits, wherein the parity permutator group-wise interleaves the bit groups such that some of the bit groups are positioned at predetermined positions, respectively, and a remainder of the bit groups are positioned without an order within the group-wise interleaved bit groups so that the puncturer selects parity bits included in the some of the bit groups positioned at the predetermined positions sequentially and selects parity bits included in the remainder of the bit groups without an order. 2. The receiving method of claim 1 , wherein the transmitting apparatus encodes 6480 information bits according to the code rate of 6/15 to generate 9720 parity bits.3. The receiving apparatus of claim 1 , wherein the plurality of groups comprise 45 groups including 0to 44groups.5. The transmitting method of claim 4 , wherein the encoding comprises encoding 6480 information bits based on the code rate of 6/15 to generate 9720 parity bits. This application is a continuation of U.S. application Ser. No. 16/390,393, filed on Apr. 22, 2019, which is a continuation of U.S. application Ser. No. 15/058,318, filed on Mar. 2, 2016, which claims priority from Korean Patent Application No. 10-2015-0137185, filed on Sep. 27, 2015, and U.S. Provisional Application No. 62/127,056, filed on Mar. 2, 2015, the disclosures of which are incorporated herein in by reference in their entireties.Apparatuses and methods consistent with the exemplary embodiments of the inventive concept relate to a transmitter and a parity permutation ...

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 64800 bits and an encoding rate r is 7/15, 9/15, 11/15, or 13/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code. 1. A method for generating a digital television broadcast signal , and for decreasing a signal-to-noise power ratio of the generated digital television broadcast signal , the method comprising:receiving data to be transmitted in a digital television broadcast signal; wherein the LDPC code word includes information bits and parity bits, the parity bits being processed by the receiving device to recover information bits corrupted by transmission path errors,', 'the parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits,', 'the information matrix portion is represented by a parity check matrix initial value table, and', 'the parity check matrix initial value table, having each row indicating positions of elements ‘1’ in corresponding 360 columns of the information matrix portion as a subset of information bits used in calculating the parity bits in the LDPC encoding, is as follows, 'performing low density parity check (LDPC) encoding in an LDPC encoding circuitry, on input bits of the received data according to a parity check matrix of an LDPC code having a code length N of 64800 bits and an encoding rate r of 9/15 to generate an LDPC code word, the LDPC code enabling error correction processing to correct errors generated in a transmission path of ...

Turbo Product Polar Coding with Hard Decision Cleaning

An encoder for encoding source information into an encoded codeword used in a communication channel includes a data input to receive source data, a processor, and a memory to store an encoder program. The encoder program makes the processor to encode the source data into a turbo product coding (TPC) structure, and the TPC structure comprises a data block corresponding to the source data, a first parity block including a first column part, a first corner part and a first bottom part, the first parity block being arranged so as to cover a right end column of the data block, a right bottom corner of the data block and a bottom row of the data block by the first column part, the first corner part and the first bottom part, and a second parity block having a row parity block, a joint parity block and a column parity block. 1. An encoder for encoding source information into an encoded codeword to be used in a communication channel , comprising:a data input to receive source data to be encoded;a processor; anda memory to store an encoder program executable by the processor, wherein the encoder program makes the processor to encode the source data into a turbo product coding (TPC) structure, wherein the TPC structure comprises:a data block corresponding to the source data;a first parity block including a first column part, a first corner part and a first bottom part, the first parity block being arranged so as to cover a right end column of the data block, a right bottom corner of the data block and a bottom row of the data block by the first column part, the first corner part and the first bottom part; anda second parity block having a row parity block, a joint parity block and a column parity block, the second parity block being arranged to cover the first parity block using the row parity block, the joint parity block and the column parity block.2. The encoder of claim 1 , wherein the first parity block is composed of parity bits based on Bose claim 1 , Chaudhuri claim 1 ...

TRANSMISSION METHOD AND RECEPTION DEVICE

The present technology relates to a transmission method and a reception device capable of ensuring good communication quality in data transmission by using an LDPC code. In group-wise interleaving, an LDPC code with a code length N of 69120 bits is interleaved in units of bit groups of 360 bits. In group-wise deinterleaving, an arrangement of the LDPC code after the group-wise interleaving is returned to an original arrangement. The present technology can be applied, for example, to the case of performing data transmission by using an LDPC code or the like. The present technology relates to a transmission method and a reception device, and more particularly, to a transmission method and a reception device that can ensure good communication quality, for example, in data transmission using an LDPC code.Low density parity check (LDPC) codes have high error correction capability, and in recent years, have been widely adopted in transmission schemes such as digital broadcasting, for example, digital video broadcasting (DVB)-S.2, or DVB-T.2, DVB-C.2, in Europe or the like or advanced television systems committee (ATSC) 3.0 or the like in the United States or the like (refer to, for example, Non-Patent Document 1).With recent researches, it has been found that, similarly to turbo codes and the like, in LDPC codes, performance close to the Shannon limit is obtained as the code length is increased. In addition, since the LDPC code has the property that the minimum distance is proportional to the code length, features that a block error probability characteristic is good and so-called error floor phenomenon observed in a decoding characteristic of turbo code or the like hardly occurs are also mentioned as an advantage.In data transmission using an LDPC code, for example, the LDPC code becomes a symbol of quadrature modulation (digital modulation) such as quadrature phase shift keying (QPSK) (that is, the LDPC code is symbolized), and the symbol is mapped to a signal point of ...

TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method. 1. A transmitting apparatus comprising:an interleaver configured to interleave a codeword; anda constellation mapper configured to map bits of the interleaved codeword onto constellation points for 256-quadrature amplitude modulation (QAM),wherein the interleaver comprises:a block interleaver configured to interleave bits of the codeword using a plurality of containers, each of the plurality of containers comprising a first part and a second part, andwherein if a length of the codeword is 64800 bits, a number of bits to be written in the first part of the each of the plurality of containers is 7920, and a number of bits to be written in the second part of the each of the plurality of containers is 180, andwherein if the length of the codeword is 16200 bits, the number of the bits to be written in the first part of the each of the plurality of containers is 1800 and the number of the bits to be written in the second part of the each of the plurality of containers is 225.2. The transmitting apparatus claimed in claim 1 , wherein the codeword comprises input bits and parity bits claim 1 , andwherein the parity bits are generated by encoding the input bits based on a low density parity check (LDPC) code.3. A receiving apparatus comprising:a demodulator configured to demodulate a signal received from a ...

PARITY INTERLEAVING APPARATUS FOR ENCODING VARIABLE-LENGTH SIGNALING INFORMATION AND PARITY INTERLEAVING METHOD USING SAME

A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit. 1. A parity interleaving apparatus , comprising:a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; andmemory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.2. The parity interleaving apparatus of claim 1 , wherein the LDPC codeword includes zero-padded variable length signaling information as information bits.3. The parity interleaving apparatus of claim 2 , wherein the parity bits correspond to 12960 bits claim 2 , the groups correspond to 36 groups each of which is composed of 360 bits.4. The parity interleaving apparatus of claim 3 , wherein the LDPC codeword includes an LDPC information bit string generated by filling all bits of information bit groups selected by using a shortening pattern order with 0.5. The parity interleaving apparatus of claim 4 , wherein the order of group-wise interleaving corresponds to a sequence of 36 numbers which indicate the order of the 36 groups.6. The parity interleaving apparatus of claim 5 , wherein the order of group-wise interleaving corresponds to a sequence [16 22 27 30 37 44 20 23 25 32 38 41 9 10 17 18 21 33 35 14 28 12 15 19 11 24 29 34 36 13 40 43 31 26 39 42].7. The parity ...

TIME INTERLEAVER, TIME DEINTERLEAVER, TIME INTERLEAVING METHOD, AND TIME DEINTERLEAVING METHOD

A convolutional interleaver included in a time interleaver, which performs convolutional interleaving includes: a first switch that switches a connection destination of an input of the convolutional interleaver to one end of one of a plurality of branches; a FIFO memories provided in some of the plurality of branches except one branch, wherein a number of FIFO memories is different among the plurality of branches; and a second switch that switches a connection destination of an output of the convolutional interleaver to another end of one of the plurality of branches. The first and second switches switch the connection destination when the plurality of cells as many as the codewords per frame have passed, by switching a corresponding branch of the connection destination sequentially and repeatedly among the plurality of branches. 1. A convolutional interleaver that performs the convolutional interleaving comprises:a first switch that switches a first connection destination of an input terminal of the convolutional interleaver to one end of one of a plurality of branches, a number of which is same as a number of interleaving units on which a cell to be interleaved is disposed;a plurality of FIFO (first in, first out) registers provided in some of the plurality of branches except the first branch, wherein a number of FIFO registers is different among the plurality of branches and each lower branch adds an additional FIFO register anda second switch that switches a second connection destination of an output terminal of the convolutional interleaver to another end of one of the plurality of branches, andwherein the topmost branch does not include an FIFO (first in, first out) registers, the branch lower than the topmost branch adds another FIFO (first in, first out) registers to the branch at one higher stage, and the branch includes FIFO (first in, first out) registers, such as 1, 2, 3, and 4, toward the bottom, andwherein the first switch switches the first connection ...

APPARATUS AND METHOD FOR SENDING AND RECEIVING BROADCAST SIGNALS

A device for processing a broadcast signal, includes a tuner configured to receive the broadcast signal carrying a bootstrap prefixed to the beginning of a signal frame, the bootstrap including one or more bootstrap symbols, a last bootstrap symbol immediately followed by a preamble of the signal frame including bootstrap termination information, the bootstrap including first information for representing a structure of the preamble; a demodulator configured to demodulate the broadcast signal; a de-framer configured to de-frame the signal frame in the broadcast signal to output the preamble and PLP data, the preamble carrying Layer 1 (L1) signaling data for the signal frame; a signaling decoder configured to decode the L1 signaling data; and a decoder to decode the PLP data based on the L1 signaling data. 1. A device for processing a broadcast signal , comprising:a tuner configured to receive the broadcast signal carrying a bootstrap prefixed to the beginning of a signal frame,the bootstrap including one or more bootstrap symbols, a last bootstrap symbol immediately followed by a preamble of the signal frame including bootstrap termination information, the bootstrap including first information for representing a structure of the preamble;a demodulator configured to demodulate the broadcast signal;a de-framer configured to de-frame the signal frame in the broadcast signal to output the preamble and PLP data, the preamble carrying Layer 1 (L1) signaling data for the signal frame, wherein: a foremost preamble symbol of the preamble symbols includes second information for indicating a number of remaining preamble symbols, and', 'the foremost preamble symbol uses a minimum number of carriers (NoC) and the foremost preamble symbol further includes third information related to NoC for the remaining preamble symbols;, 'the preamble includes a plurality of preamble symbols,'}a signaling decoder configured to decode the L1 signaling data; anda decoder to decode the PLP data ...

METHOD AND APPARATUS FOR GRID MAPPING IN A WIRELESS COMMUNICATION SYSTEM

The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). Methods and apparatuses for grid mapping are described. A method for operating a base station comprises configuring grid mapping patterns for a plurality of terminals, transmitting, to the plurality of terminals, the grid mapping patterns, receiving, from the plurality of terminals, information on which a grid mapping is performed based on the grid mapping patterns, and identifying data of the information corresponding to each of the plurality of terminals based on the grid mapping patterns. Therefore, the terminal can hold a low peak-to-average power ratio, and the power consumption can be effectively saved. The base station can complete signal detection in a moderate detection complexity by multi-terminal joint detection. The detection complexity and the performance are balanced. 1. A method for operating a base station , the method comprising:configuring grid mapping patterns for a plurality of terminals;transmitting, to the plurality of terminals, the grid mapping patterns;receiving, from the plurality of terminals, information on which a grid mapping is performed based on the grid mapping patterns; andidentifying data of the information corresponding to each of the plurality of terminals based on the grid mapping patterns.2. The method of claim 1 , wherein each of the plurality of terminals are identified based on a bit-level interleaving pattern configured by the base station.3. The method of claim 1 , wherein each of the plurality of terminals are identified based on a scrambling code sequence for a bit-level scrambling configured by the base station.4. The method of claim 1 , wherein the information is allocated across subcarriers having an equal distance between each subcarrier.5. The method of claim 1 , further comprising:if a network load is ...

APPARATUS AND METHOD FOR SENDING AND RECEIVING BROADCAST SIGNALS

A broadcast signal receiver includes a tuner configured to receive a broadcast signal; a pilot detector configured to detect pilots included in the broadcast signal; a de-framer configured to de-frame a signal frame of the broadcast signal and to extract Physical Layer Pipe (PLP) data from the signal frame; and a decoder configured to decode the PLP data, wherein the signal frame comprises a bootstrap, a preamble, and the PLP data, wherein the bootstrap comprises first information for indicating system bandwidth, second information for emergency alert wake up, and third information for indicating structure of the preamble, wherein the preamble comprises a plurality of preamble symbols, the preamble carrying Layer 1 (L1) signaling data for the signal frame, and wherein the foremost preamble symbol comprises fourth information indicating a number of at least one remaining preamble symbol. 1. A broadcast signal receiver , comprising:a tuner to receive a broadcast signal;a pilot detector to detect pilots included in the broadcast signal;a de-framer to de-frame a signal frame of the broadcast signal and to extract Physical Layer Pipe (PLP) data from the signal frame;wherein the signal frame comprises a bootstrap, a preamble, and the PLP data,the bootstrap comprises first information for indicating system bandwidth, second information for emergency alert wake up, and third information for indicating structure of the preamble,the preamble comprises a plurality of preamble symbols, the preamble carrying Layer 1 (L1) signaling data for the signal frame,wherein a foremost preamble symbol comprises fourth information for indicating a number of remaining preamble symbols,the foremost preamble symbol uses a minimum number of carriers (NoC) and the foremost preamble symbol comprises fifth information related to NoC for the remaining preamble symbols;a signaling decoder to decode the fourth information and the fifth information from the foremost preamble, and the de-framer to de- ...

TRANSMITTING APPARATUS AND MAPPING METHOD THEREOF

A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme. 2. The receiving apparatus as claimed in claim 1 , wherein the decoder is configured to decode the deinterleaved values based on the LDPC code having a code rate of 4/15.3. The receiving apparatus as claimed in claim 1 , wherein the constellation points in the table comprise constellation points in one quadrant claim 1 , andwherein constellation points in remaining quadrants are obtained by indicating each constellation point a of the constellation points in the table as a*, −a*, and −a, respectively, * indicating complex conjugation. This is a Continuation of U.S. application Ser. No. 15/412,991 filed Jan. 23, 2017, which is a Continuation of U.S. application Ser. No. 14/715,780 filed May 19, 2015 in the United States Patent and Trademark Office, the disclosure of which is incorporated herein by reference in its entirety.Apparatuses and methods consistent with exemplary embodiments of the inventive concept relate to transmitting and receiving date using broadcasting, more particularly, to the design of non-uniform constellations used in a Bit Interleaved Coded Modulation (BICM) mapping bits at an output of an encoder and interleaver to complex constellations.The current broadcasting systems consistent with the Digital Video Broadcasting Second Generation Terrestrial (DVB-T2) use a Bit Interleaved and Coded Modulation (BICM) chain in order to encode bits to be transmitted. The BICM chain includes a channel encoder like a Low Density Parity Check (LDPC) encoder followed by a Bit Interleaver and a Quadrature Amplitude Modulation (QAM) ...

SYSTEM, METHOD, AND APPARATUS FOR INTERLEAVING DATA

A method, system, and apparatus for interleaving data including creating a buffer, writing input data, and reading output data out of the buffer. 1. A method for interleaving data comprising:creating a buffer having a number of metrics arranged into an N by 8 array of 16 by 16 blocks, wherein N is an even number; wherein the buffer is partitioned into at least 2 subsets of rows;populating data into each of the 16 by 16 blocks of arrays according to a table; wherein the table specifies the location for each metric in the 16 by 16 block; andreading data out of the buffer in groups of 8 metrics; wherein each of the groups of 8 metrics are taken in turn from each subset, in a column by column ordering.2. The method of wherein the 16 by 16 table includes values that form a Latin square.4. The method of wherein symbol bits in each reliability class are balanced in each constituent codeword.5. An apparatus comprising:an interleaver; the interleaving containing logic enabling the interleaver to:create a buffer having a number of metrics arranged into an N by 8 array of 16 by 16 blocks, wherein N is an even number; wherein the buffer is partitioned into at least 2 subsets of rows;populate data into each 16 by 16 block of arrays according to a table; wherein the table specifies the location of each metric in the 16 by 16 block; andread data out of the buffer in groups of 8 metrics; wherein each of the groups of 8 metrics are taken in turn from each subset, in a column by column ordering.6. The apparatus of wherein the 16 by 16 table include values that form a Latin square.8. The apparatus of wherein symbol bits in each reliability class are balanced in each constituent codeword.9. A system comprising:one or more encoder; create a buffer having a number of metrics arranged into an N by 8 array of 16 by 16 blocks, wherein N is an even number; wherein the buffer is partitioned into at least 2 subsets of rows;', 'populate data into each 16 by 16 block of arrays according to a ...

METHOD FOR POLAR CODE TRANSMISSION WITH PARTIAL INFORMATION AND DEVICES USING THE SAME

The disclosure provides a method and devices for transmitting information using polar code. In an exemplary embodiment in accordance with the disclosure, the disclosure is directed to a method of transmitting information using polar code. The method would include not limited to: generating a first data packet with a predetermined size and comprising data of multiple applications or multiple users; performing an interleaving operation which maps the first data packet based on a mapping algorithm to average the reliability of the data of multiple applications or multiple users; and generating a second data packet comprising interleaved first data packet. 1. A method of transmitting information using polar code , the method comprising:generating a first data packet with a predetermined size and comprising data of multiple applications or multiple users;performing an interleaving operation which maps the first data packet based on a mapping algorithm to average the reliability of the data of multiple applications or multiple users; andgenerating a second data packet comprising interleaved first data packet.2. The method of claim 1 , wherein the method further comprises:selecting a frozen set of indexes from a polar sequence, the polar sequence comprising a plurality of indexes;assigning the indexes of the frozen set to frozen bits of the polar code;selecting an unfrozen set of indexes from the polar sequence; andassigning the indexes of the unfrozen set to the first data packet.3. The method of claim 2 , wherein assigning the indexes of the unfrozen set to the first data packet comprises:reversing the order of the indexes of the unfrozen set; andassigning the reversed indexes of the unfrozen set to bits of the first packet data.4. The method of claim 1 , wherein performing the interleaving operation which maps the first data packet is based on a S-interleaving mapping algorithm.5. The method of claim 1 , wherein performing the interleaving operation which maps the first ...

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 10/15 or 12/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code. 1. A receiving device for use in an environment where a signal-to-noise power ratio of a received digital broadcast signal can be reduced , the receiving device comprising:a receiver configured to receive a digital broadcast signal including a mapped group-wise interleaved low density parity check (LDPC) code word from a transmitting device; and process the mapped group-wise interleaved LDPC code word to obtain a group-wise interleaved LDPC code word, wherein each unit of 4 bits of the group-wise interleaved LDPC code word is mapped to one of 16 signal points of a modulation scheme,', 'process the group-wise interleaved LDPC code word in units of bit groups of 360 bits to obtain an LDPC code word,', 'decode the LDPC code word, and', 'process the decoded LDPC code word for presentation of the digital broadcast signal, wherein', 'input bits of data to be transmitted in the digital broadcast signal are LDPC encoded according to a parity check matrix initial value table of an LDPC code having code length N of 16200 bits and a coding rate r of 12/15 to generate the LDPC code word, the LDPC code enabling error correction processing to correct errors generated in a transmission path of the digital broadcast signal, and, 'circuitry configured to'}the parity check matrix initial value table of the LDPC code according to which the input bits are LDPC encoded is as ...

DATA PROCESSING APPARATUS AND METHOD

A data processing apparatus includes a group-wise interleaving unit that performs group-wise interleaving; and a block interleaving unit that performs block interleaving in such a manner that an LDPC code obtained by performing the group-wise interleaving is written in m number of columns as storage regions arranged in the row direction. A type of the block interleaving includes a type A and a type B. A MODCOD which is a combination of the LDPC code and the modulation scheme includes a MODCOD-A which is a MODCOD based on the assumption that the block interleaving of the type A is performed, and a MDOCOD-B which is a MDOCOD based on the assumption that the block interleaving of the type B is performed. 1. A transmitting apparatus comprising:circuitry configured toperform group-wise interleaving which interleaves an LDPC code word to obtain a group-wise interleaved LDPC code word;perform block interleaving which interleaves the group-wise interleaved LDPC code word to obtain a block interleaved and group-wise interleaved LDPC code word in such a manner that the group-wise interleaved LDPC code word obtained by performing the group-wise interleaving is written in m number of columns as storage regions arranged in a row direction, m bits are obtained by respectively reading the LDPC code word from m number of columns bit by bit,perform mapping the block interleaved and group-wise interleaved LDPC code word to any one of 2m number of signal points defined by a modulation scheme; andperform transmitting a digital broadcast signal including the mapped block interleaved and group-wise interleaved LDPC code word obtained by performing the group-wise interleaving, performing the block interleaving, and performing the mapping,wherein a type of the block interleaving includes a type A in which writing of the group-wise interleaved LDPC code word obtained by performing the group-wise interleaving in a column direction of the columns is iteratively performed on m number of ...

Data processing apparatus and data processing method

The present technology relates to a data processing apparatus and a data processing method that are able to secure good communication quality in data transmission using an LDPC code. One symbol is mapped to one of 16 signal points prescribed in 16APSK, with code bits of four bits of an LDPC code having a code length of 16200 bits and a code rate of 7/15 as one symbol. 16 signal points prescribed in 16APSK are four signal points on an inner circle and 12 signal points on an outer circle, and a radius ratio of the inner circle and the outer circle is 5.25. The present technology may be applied to, for example, a case of performing data transmission using an LDPC code.

TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. 2. The method of claim 1 , wherein each of the plurality of bit groups comprises 360 bits.3. The method of claim 1 , wherein the π(j) is determined based on at least one of the code length claim 1 , a modulation method of the mapping and the code rate. This application is a Continuation of application Ser. No. 14/715,941 filed May 19, 2015, the disclosure of which is incorporated herein by reference in its entirety.Apparatuses and methods consistent with exemplary embodiments relate to a transmitting apparatus and an interleaving method thereof, and more particularly, to a transmitting apparatus which processes data and transmits the data, and an interleaving method thereof.In the 21st century information-oriented society, broadcasting communication services are moving into the era of digitalization, multi-channel, wideband, and high quality. In particular, as high quality digital televisions and portable multimedia player and portable broadcasting equipments are increasingly used in recent years, there is an increasing demand for methods for supporting various receiving methods of digital broadcasting services.In order to meet such demand, standard groups are establishing various standards and are providing a variety of services to satisfy users' needs. Therefore, there is a need for a method for providing improved services to users with high decoding and receiving performance.Exemplary embodiments may overcome ...

Encoding Method and Apparatus

An encoding method and apparatus are provided. The method by a transmit end includes: performing check encoding on to-be-encoded information to obtain a check encoding codeword that comprises K information bits and J check bits; performing an interleaving operation on the check encoding codeword with an interleaving sequence including J subsequences, and an isubsequence includes a position index of an element 1 in an intermediate result vector Tand a value of (K+i), where 1≤i≤J, i is an integer, T=(˜M)&(V), M=M|(V), M is a masked vector, Vis a column vector of a checking part matrix P, P is a submatrix of a generator matrix G for check encoding, ˜ represents a bit-by-bit NOT operation, & represents a bit-by-bit AND operation, and | represents a bit-by-bit OR operation; and performing polar encoding on a check encoding codeword obtained after the interleaving operation. 1. An encoding method , comprising:performing, by a transmit end, check encoding on to-be-encoded information to obtain a check encoding codeword, wherein the check encoding codeword comprises an information bit and a check bit, a length of the information bit is K, and a length of the check bit is J;performing, by the transmit end, an interleaving operation on the check encoding codeword, wherein{'sup': 'th', 'sub': i', 'i', 'i', 'i', 'i, 'an interleaving sequence S used in the interleaving operation comprises J subsequences, and an isubsequence comprises a position index of an element 1 in an intermediate result vector Tand a value of (K+i), wherein 1≤i≤J, i is an integer, T=(˜M)&(V), M=M|(V), M is a masked vector, Vis a column vector of a checking part matrix P, P is a submatrix of a system-form generator matrix G for check encoding, ˜ represents a bit-by-bit NOT operation, & represents a bit-by-bit AND operation, and | represents a bit-by-bit OR operation; and'}performing, by the transmit end, polar encoding on a check encoding codeword obtained after the interleaving operation.2. The method ...

PARALLEL BIT INTERLEAVER

A bit interleaving method applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks of Q bits each, dividing the processed codeword into constellation words of M bits each, and applying an intra-cyclic-block permutation process to the cyclic blocks, where the codeword is divided into F×N/M folding sections of M/F cyclic blocks each and the constellation words are each associated with one of the folding sections, and the bit permutation process is applied such that the constellation words are each made up of F bits from each of M/F different cyclic blocks in the associated section, after the permutation process. 1. A transmission method comprising:generating a codeword according to a low density parity check coding scheme such that the codeword includes N bit groups each consisting of Q bits, a parity check matrix of the low density parity check coding scheme having a quasi-cyclic structure;reordering bits in the codeword;dividing the codeword into constellation words each consisting of M bits after the bits in the codeword are reordered; andgenerating a transmission signal based on the constellation words,wherein a first part of the N bit groups is constituted by K bit groups and bits of the K bit groups are written into an M by Q matrix row-by-row and the written bits of the K bit groups are read from the M by Q matrix column-by-column in order to reorder the bits in the codeword, andwherein a second part of the N bit groups is constituted by L bit groups, and bits of the L bit groups are mapped onto the constellation words in a state where bits in the L bit groups are not reordered.2. A transmission device comprising:generating circuitry configured to generate a codeword according to a low density parity check coding scheme such that the codeword includes N bit groups each consisting of Q bits, a parity check matrix of the low density parity check coding scheme having a quasi-cyclic structure;reordering circuitry connected to the ...

Soft Bit Computation Unit for MIMO Detection and Error Correction

A method, system, and apparatus are provided for computing soft bits in a non-linear MIMO detector which decodes a signal received at a plurality of receive antennas using channel estimate information and a decoding tree to produce output data for a bit estimation value which includes a maximum likelihood solution along with a naturally ordered vector identifying all explored node metrics and node indices, where soft bits are computed for each bit estimation value by determining a set of bit-masks through repetition and indexing operations applied on the explored node indices, masking the naturally ordered vector with the set of bit-masks to generate masked node metrics, determining candidate soft bit values by subtracting metrics of all nodes that form the maximum likelihood solution from the masked node metrics, and determining a final soft bit value by identifying which of the candidate soft bit values has a lowest value. 1. A method for computing soft bits at a wireless Multiple Input Multiple Output (MIMO) receiver system , comprising:receiving a signal at a plurality of receive antennas of the MIMO receiver system;performing, at a MIMO detector, a first decoding operation on the signal using a channel estimate information and a decoding tree to produce output data for a bit estimation value comprising a maximum likelihood solution along with a naturally ordered vector identifying all explored node metrics and node indices; andgenerating, at a soft bit computation engine, soft bit values for each bit estimation value by:determining a set of bit-masks through repetition and indexing operations applied on the explored node indices;masking the naturally ordered vector with the set of bit-masks to generate masked node metrics;determining candidate soft bit values by subtracting metrics of all nodes that form the maximum likelihood solution from the masked node metrics; anddetermining a final soft bit value by identifying which of the candidate soft bit values has a ...

TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver is formed of a plurality of columns including a plurality of rows, respectively, and comprises: a block interleaver configured to divide each of the plurality of columns into a first part and a second part, and interleave a plurality of bit groups constituting the LDPC codeword, all bit groups interleaved by the first part are interleaved as bits included in a same bit group are written in a same column of the first part, at least one bit group interleaved by the second part is interleaved as bits included in the at least one bit group are divided and written in at least two columns constituting the second part. 1. A transmitting apparatus comprising:an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding;an interleaver configured to interleave the LDPC codeword; anda modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol,wherein the interleaver is formed of a plurality of columns including a plurality of rows, respectively, and comprises:a block interleaver configured to divide each of the plurality of columns into a first part and a second part, and interleave a plurality of bit groups constituting the LDPC codeword,wherein all bit groups interleaved by the first part are interleaved as bits included in a same bit group are written in a same column of the first part,wherein at least one bit group interleaved by the second part is interleaved as bits included in the at least one bit group are divided and written in at least two columns ...

TRANSMITTER AND PARITY PERMUTATION METHOD THEREOF

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to group-wise interleave a plurality of bit groups including the parity bits; and a puncturer configured to select some of the parity bits in the group-wise interleaved bit groups and puncture the selected parity bits, wherein the parity permutator group-wise interleaves the bit groups such that some of the bit groups at predetermined positions in the bit groups before the group-wise interleaving are positioned serially after the group-wise interleaving and a remainder of the bit groups before the group-wise interleaving are positioned without an order after the group-wise interleaving so that the puncturer selects parity bits included in the some of the bit groups sequentially and selects parity bits included in the remainder of the bit groups without an order. 2. The transmitting method of claim 1 , wherein each of the plurality of bit groups comprises 360 bits.3. The transmitting method of claim 1 , wherein the encoding encodes 3240 information bits to generate 12960 parity bits. This is a continuation of U.S. application Ser. No. 15/058,348 filed Mar. 2, 2016, which claims priority from Korean Patent Application No. 10-2015-0137188 filed on Sep. 27, 2015 and U.S. Provisional Application No. 62/127,014 filed on Mar. 2, 2015, the disclosures of which are incorporated herein in their entirety by reference.Apparatuses and methods consistent with the exemplary embodiments of the inventive concept relate to a transmitter and a parity permutation method thereof, and more particularly, to a transmitter performing parity permutation on parity bits and a parity permutation method thereof.Broadcast communication services in information oriented society of the 21century are entering an era of digitalization, multi-channelization, bandwidth broadening, and high quality. In particular, as a high ...

DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD

The present technology relates to a data processing apparatus and a data processing method that are able to secure good communication quality in data transmission using an LDPC code. One symbol is mapped to one of 16 signal points prescribed in 16APSK, with code bits of four bits of an LDPC code having a code length of 16200 bits and a code rate of 7/15 as one symbol. 16 signal points prescribed in 16APSK are four signal points on an inner circle and 12 signal points on an outer circle, and a radius ratio of the inner circle and the outer circle is 5.25. The present technology may be applied to, for example, a case of performing data transmission using an LDPC code. 1a mapping unit that maps a symbol to any one of 16 signal points prescribed in 16APSK, with code bits of four bits of an LDPC code having a code length of 16200 bits and a code rate of 7/15 as one symbol,wherein the 16 signal points prescribed in 16APSK are four signal points on an inner circle and 12 signal points on an outer circle, andwherein a radius ratio of the inner circle and the outer circle is 5.25.. A data processing apparatus comprising: This application is a continuation of U.S. application Ser. No. 14/782,713, filed Oct. 6, 2015, which is a National Stage of PCT/JP2014/061154, filed Apr. 21, 2014, and claims the benefit of priority under 35 U.S.C. § 119 of Japanese Patent Application No.2013-096994, filed May 2, 2013. The entire contents of each application is incorporated herein by reference.The present invention relates to a data processing apparatus and a data processing method, and in particular, relates to a data processing apparatus and a data processing method which are able to secure good communication quality in data transmission using, for example, an LDPC code.A low density parity check (LDPC) code has a high error correction ability, and has been widely adopted in a transmission scheme including satellite digital broadcasting such as, for example, digital video broadcasting ( ...

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present technology relates to a data processing device and a data processing method capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code having a code length N of 64800 bits and a coding rate r of 9/15, 11/15, or 13/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of LDPC codes after the group-wise interleave is returned to an original sequence. The present technology, for example, can be applied to a case where data transmission using an LDPC code or the like is performed. 19-. (canceled)10. A data processing method comprising:a coding step of performing LDPC coding on the basis of a parity check matrix of an LDPC code having a code length N of 64800 bits and a coding rate r of 13/15;a group-wise interleaving step of performing group-wise interleave interleaving the LDPC code in units of bit groups of 360 bits; anda mapping step of mapping the LDPC code into one of 1024 signal points determined according to a modulation scheme in units of 10 bits,wherein, in the group-wise interleave, by using an (i+1)-th bit group from a head of the LDPC code as a bit group i, a sequence of bit groups 0 to 179 of the LDPC code of 64800 bits is interleaved into a sequence of bit groups49, 2, 57, 47, 31, 35, 24, 39, 59, 0, 45, 41, 55, 53, 51, 37, 33, 43, 56, 38, 48, 32, 50, 23, 34, 54, 1, 36, 44, 52, 40, 58, 122, 46, 42, 30, 3, 75, 73, 65, 145, 71, 79, 67, 69, 83, 85, 147, 63, 81, 77, 61, 5, 26, 62, 64, 74, 70, 82, 149, 76, 4, 78, 84, 80, 86, 66, 68, 72, 6, 60, 154, 103, 95, 101, 143, 9, 89, 141, 128, 97, 137, 133, 7, 13, 99, 91, 93, 87, 11, 136, 90, 88, 94, 10, 8, 14, 96, 104, 92, 132, 142, 100, 98, 12, 102, 152, 139, 150, 106, 146, 130, 27, 108, 153, 112, 114, 29, 110, 134, 116, 15, 127, 125, 123, 120, 148, 151, 113, 126, 124, 135, 129, 109, 25, 28, 158, 117, 105, 115, 111, 131, 107, 121, 18, 170, 164, 20, 140, 160, 166, 162, 119, 155, 168, 178, 22, 174, ...

TIME VARYING DATA PERMUTATION APPARATUS AND METHODS

Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations. 1. A Forward Error Correction (FEC) coding system comprising:a FEC coding device;an error decorrelator, operatively coupled to the FEC coding device, to apply multiple permutation operations to an encoded data stream in respective different dimensions.2. The FEC coding system of claim 1 , the error decorrelator comprising:a first permutation element to apply a time varying first permutation to the encoded data stream to generate a first permuted data stream;a block interleaver operatively coupled to the first permutation element, to interleave the first permuted data stream to generate an interleaved data stream; anda second permutation element operatively coupled to the block interleaver, to apply a time varying second permutation to the interleaved data stream to generate a second permuted data stream.3. The FEC coding system of claim 1 , the first permutation element comprising a first plurality of serially coupled permutation stages claim 1 , and the second permutation element comprising a second plurality of serially coupled permutation stages.4. The FEC coding system of claim 3 , each of the first plurality of serially coupled permutation stages and the second plurality of serially coupled permutation stages comprising at least one controllable permutation stage claim 3 , each controllable permutation stage being controllable to select claim 3 , from a plurality of different permutation maps claim 3 , a respective ...

Transmitting apparatus and signal processing method thereof

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver is formed of a plurality of columns each including a plurality of rows and includes a block interleaver configured to divide each of the plurality of columns into a first part and a second part and interleave the LDPC codeword, the number of rows constituting each column divided into the first part is determined differently depending upon the modulation method, wherein the number of rows constituting each column divided into the second part is determined depending upon the number of rows constituting each column divided into the first part.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 64800 bits and an encoding rate r is 6/15, 7/15, 8/15, or 9/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code. 1. A data processing device , comprising:encoding circuitry that performs low-density parity check (LDPC) encoding based on a parity check matrix of an LDPC code in which a code length N is 64800 bits and an encoding rate r is 6/15;group-wise interleaving circuitry that performs a group-wise interleave of an interleaving of the LDPC code, encoded by the encoding circuitry, in units of bit groups of 360 bits; andmapping circuitry that maps the LDPC code, from the group-wise interleaving circuitry, to any of 4096 signal points decided in a modulation scheme in units of 12 bits, whereinin the group-wise interleave, when an (i+1)-th bit group from a head of the LDPC code is indicated by a bit group i, a sequence of bit groups 0 to 179 of the LDPC code of 64800 bits is interleaved into a sequence of bit groups71, 38, 98, 159, 1, 32, 28, 177, 125, 102, 83, 17, 121, 151, 66, 92, 140, 6, 165, 23, 75, 91, 87, 108, 163, 50, 77, 39, 110, 128, 73, 148, 14, 5, 68, 37, 53, 93, 149, 26, 166, 48, 79, 10, 122, 150, 103, 178, 119, 101, 61, 34, 8, 86, 36, 138, 146, 72, 179, 143, 147, 89, 4, 107, 33, 144, 141, 40, 100, 29, 118, 63, 46, 20, 153, 90, 152, 124, 7, 30, 31, 43, 78, 120, 85, 25, 52, 47, 64, 81, 175, 94, 115, 15, 112, 99, 13, 21, 42, 169, 76, 19, 168, 16, 27, 162, 167, 164, 97, 82, 44, 106, 12, 109, 132, 145, 161, 174, 95, 0, 105, 134, 173, 84, 9, 65, 88, 54, ...

Data processing apparatus and data processing method

The present technology relates to a data processing apparatus and a data processing method which enable provision of an LDPC code that achieves good error-rate performance. An LDPC encoding unit performs encoding using an LDPC code having a code length of 64800 bits and a code rate of 18/30, 19/30, 20/30, 21/30, 22/30, or 23/30. The LDPC code includes information bits and parity bits, and a parity check matrix H is composed of an information matrix portion corresponding to the information bits of the LDPC code, and a parity matrix portion corresponding to the parity bits. The information matrix portion of the parity check matrix H is represented by a parity check matrix initial value table that shows positions of elements of 1 in the information matrix portion in units of 360 columns. The present technology may be applied to LDPC encoding and LDPC decoding.

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 6/15, 8/15, or 10/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code. 1an encoding unit configured to perform LDPC encoding based on a parity check matrix of an LDPC code in which a code length N is 16200 bits and an encoding rate r is 6/15;a group-wise interleaving unit configured to perform group-wise interleave of interleaving the LDPC code in units of bit groups of 360 bits; anda mapping unit configured to map the LDPC code to any of 4 signal points decided in a modulation scheme in units of 2 bits, whereinin the group-wise interleave, when an (i+1)-th bit group from a head of the LDPC code is indicated by a bit group i, a sequence of bit groups 0 to 44 of the LDPC code of 16200 bits is interleaved into a sequence of bit groups21, 41, 15, 29, 0, 23, 16, 12, 38, 43, 2, 3, 4, 20, 31, 27, 5, 33, 28, 30, 36, 8, 40, 13, 6, 9, 18, 24, 7, 39, 10, 17, 37, 1, 19, 22, 25, 26, 14, 32, 34, 11, 35, 42, and 44,the LDPC code includes an information bit and a parity bit,the parity check matrix includes an information matrix portion corresponding to the information bit and a parity matrix portion corresponding to the parity bit,the information matrix portion is represented by a parity check matrix initial value table, andthe parity check matrix initial value table is a table in which a position of a 1 element of the information matrix portion is indicated for every 360 columns, and includes27 430 519 828 1897 1943 2513 2600 2640 3310 ...

Methods, apparatus, and systems for coding with constrained interleaving

Serially-concatenated codes are formed in accordance with the present invention using a constrained interleaver. The constrained interleaver cause the minimum distance of the serial concatenated code to increase above the minimum distance of the inner code alone by adding a constraint that forces some or all of the distance of the outer code onto the serially-concatenated code. This allows the serially-concatenated code to be jointly optimized in terms of both minimum distance and error coefficient to provide significant performance advantages. Constrained interleaving can be summarized in that it: 1) uses an outer code that is a block code or a non-recursive convolutional code, and as such, there are multiple codewords present in the constrained interleaver, 2) selects a desired MHD, 3) selects an interleaver size and a set of predefined interleaver constraints to prevent undesired (low-distance) error events so as to achieve the desired MHD, and 4) performs uniform interleaving among the allowable (non-constrained) positions, to thereby maximize or otherwise improve the interleaver gain subject to the constraints imposed to maintain the desired MHD.

Resource Allocation Method And Device

Example resource allocation methods and apparatus are described to resolve a problem of resource congestion and collision occurring in a communications system when virtual resource blocks (VRBs) scheduled for different terminal devices are mapped to physical resource blocks (PRBs). In one example method, system bandwidth of the communications system is divided into a plurality of fixed interleaving regions. Therefore, a network device can indicate a type of a virtual resource unit in a form of a frequency domain range occupied by one interleaving region. Using the foregoing solution can enable the network device to set the type of the virtual resource unit more conveniently. 1. A resource allocation method , the method comprising:determining one or more bandwidth regions in system bandwidth that are used by a terminal device, wherein the terminal device receives or sends a data channel in the one or more bandwidth regions, wherein the system bandwidth comprises at least one interleaving region, wherein each interleaving region comprises at least one physical resource unit contiguous in frequency domain, wherein each bandwidth region comprises at least one first frequency domain region non-overlapping in frequency domain, wherein each first frequency domain region completely overlaps at least one interleaving region in frequency domain, wherein the at least one first frequency domain region is in a one-to-one correspondence with at least one first set, and wherein each first set comprises at least one virtual resource unit; andreceiving indication information sent by a network device, wherein the indication information is used to indicate a type of a virtual resource unit in the at least one first set.2. The method according to claim 1 , wherein the type of the virtual resource unit in the first set is a localized virtual resource unit or a distributed virtual resource unit.3. The method according to claim 1 , wherein a quantity of virtual resource units in each ...

System, method, and apparatus for interleaving data

A method, system, and apparatus for interleaving data including creating a buffer, writing input data, and reading output data out of the buffer.

TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. 2. The transmitting apparatus of claim 1 , wherein each of the plurality of bit groups comprises 360 bits.4. The receiving apparatus of claim 3 , wherein each of the plurality of groups comprises 360 values. This application is a Continuation of U.S. application Ser. No. 16/431,247 filed Jun. 4, 2019, which is a Continuation of U.S. application Ser. No. 14/715,908 filed May 19, 2015 which issued U.S. Pat. No. 10,447,428 on Oct. 15, 2019, the disclosure of which is incorporated herein in its entirety by reference.Apparatuses and methods consistent with exemplary embodiments relate to a transmitting apparatus and an interleaving method thereof, and more particularly, to a transmitting apparatus which processes and transmits data, and an interleaving method thereof.In the 21st century information-oriented society, broadcasting communication services are moving into the era of digitalization, multi-channel, wideband, and high quality. In particular, as high quality digital televisions, portable multimedia players and portable broadcasting equipment are increasingly used in recent years, there is an increasing demand for methods for supporting various receiving methods of digital broadcasting services.In order to meet such demand, standard groups are establishing various standards and are providing a variety of services to satisfy users' needs. Therefore, there is a need for a method for providing improved services to ...

TRANSMITTING APPARATUS AND BIT INTERLEAVING METHOD THEREOF

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding of input bits based on a parity check matrix including information word bits and parity bits, the LDPC codeword including a plurality of bit groups each including a plurality of bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the interleaver is further configured to interleave the LDPC codeword such that a bit included in a predetermined bit group from among the plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. 2. The transmitting method of claim 1 , wherein each of the plurality of bit groups comprises 360 bits.3. The transmitting method of claim 1 , wherein the π(j) is determined based on at least one of the code length claim 1 , a modulation method for the mapping claim 1 , and the code rate.5. The receiving method of claim 4 , wherein each of the plurality of groups comprises 360 values.6. The receiving method of claim 4 , wherein the π(j) is determined based on at least one of the code length claim 4 , a modulation method for mapping claim 4 , and the code rate. This is a Continuation of U.S. application Ser. No. 17/060,682 filed Oct. 1, 2020, which is a Continuation of U.S. application Ser. No. 16/460,305 filed Jul. 2, 2019, which is a Continuation of U.S. application Ser. No. 15/686,280 filed Aug. 25, 2017, which is a Continuation of application Ser. No. 14/716,503 filed May 19, 2015, and claims priority from U.S. Provisional Application No. 62/001,160 filed on May 21, 2014 and Korean Patent Application No. 10-2015-0069924 filed on May 19, 2015, the disclosures of which are incorporated herein by reference in their entirety.Apparatuses and methods consistent with exemplary embodiments relate to a transmitting apparatus and an ...

Encoding and decoding using constrained interleaving

Serially-concatenated codes are formed in accordance with the present invention using a constrained interleaver. The constrained interleaver cause the minimum distance of the serial concatenated code to increase above the minimum distance of the inner code alone by adding a constraint that forces some or all of the distance of the outer code onto the serially-concatenated code. This allows the serially-concatenated code to be jointly optimized in terms of both minimum distance and error coefficient to provide significant performance advantages. These performance advantages allow a noise margin target to be achieved using simpler component codes and a much shorter interleaver than was needed when using prior art codes such as Turbo codes. Decoders are also provided. Both encoding and decoding complexity can be lowered, and interleavers can be made much shorter, thereby shortening the block lengths needed in receiver elements such as equalizers and other decision-directed loops. Also, other advantages are provided such as the elimination of a error floor present in prior art serially-concatenated codes. That allows the present invention to achieve much higher performance at lower error rates such as are needed in optical communication systems.

TRANSMITTING APPARATUS AND NON-UNIFORM CONSTELLATION MAPPING METHOD THEREOF

A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme. 2. The apparatus as claimed in claim 1 , wherein the constellation points represented as the table comprises constellation points in one quadrant claim 1 , andwherein constellation points in remaining quadrants are obtained by indicating each constellation point a which is defined in the table as a*, −a*, and −a, respectively, * indicating complex conjugation.4. The method as claimed in claim 3 , wherein the constellation points represented as the table comprises constellation points in one quadrant claim 3 , andwherein constellation points in remaining quadrants are obtained by indicating each constellation point a which is defined in the table as a*, −a*, and −a, respectively, * indicating complex conjugation. This is a continuation of U.S. application Ser. No. 16/100,490 filed Aug. 10, 2018, which is a continuation of U.S. application Ser. No. 15/726,806 filed Oct. 6, 2017, now U.S. Pat. No. 10,050,742, which is a continuation of U.S. application Ser. No. 14/715,817 filed on May 19, 2015, now U.S. Pat. No. 9,847,851, the disclosures of which is incorporated herein by reference in its entirety.Apparatuses and methods consistent with exemplary embodiments of the inventive concept relate to transmitting and receiving date using broadcasting, more particularly, to the design of non-uniform constellations used in a Bit Interleaved Coded Modulation (BICM) mapping bits at an output of an encoder and interleaver to complex constellations.The current broadcasting systems consistent with the Digital Video Broadcasting Second Generation ...

TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method. 1. An interleaving method comprising:encoding input bits to generate parity bits;interleaving a codeword comprising the input bits and the parity bits; andmapping the interleaved codeword onto constellation points for 256-QAM,wherein the interleaving comprises:splitting the codeword into a plurality of bit groups;interleaving the plurality of bit groups; andinterleaving the interleaved plurality of bit groups using a plurality of containers, each of the plurality of containers comprising a first part and a second part, andwherein if a code length of the codeword is 64800, a number of bits to be written in the first part of each of the plurality of containers is 7920, and a number of bits to be written in the second part of each of the plurality of containers is 180, and if a code length of the codeword is 16200, a number of bits to be written in the first part of each of the plurality of containers is 1800 and a number of bits to be written in the second part of each of the plurality of containers is 225.2. The method as claimed in claim 1 , wherein each of the plurality of bit groups comprises 360 bits.3. The method as claimed in claim 1 , wherein the interleaving the codeword further comprises:interleaving the parity bits,wherein the splitting the codeword into a plurality of bit groups comprises ...

TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. 2. The receiving method of claim 1 , wherein each of the plurality of groups comprises 360 values.3. The receiving method of claim 1 , further comprising:deinterleaving one or more values from among the values of the deinterleaved plurality of groups, andwherein the decoding comprises decoding the values of the deinterleaved plurality of groups comprising the deinterleaved one or more values.5. The transmitting method of claim 4 , wherein each of the plurality of bit groups comprises 360 values. This is a continuation application of U.S. application Ser. No. 16/510,405, filed on Jul. 12, 2019, which is a continuation of U.S. application Ser. No. 14/625,795 filed Feb. 19, 2015, now U.S. Pat. No. 10,425,110, issued on Sep. 24, 2019, which claims priority from U.S. Provisional Application No. 61/941,708 filed on Feb. 19, 2014 and Korean Patent Application No. 10-2015-0024183 filed on Feb. 17, 2015, the disclosures of which are incorporated herein by reference in their entirety.Apparatuses and methods consistent with exemplary embodiments relate to a transmitting apparatus and an interleaving method thereof, and more particularly, to a transmitting apparatus which processes and transmits data, and an interleaving method thereof.In the 21st century information-oriented society, broadcasting communication services are moving into the era of digitalization, multi-channel, wideband, and high quality. In particular, as ...

DEINTERLEAVER

A method, apparatus, and system for a deinterleaver. 120-. (canceled)21. A method for deinterleaving data comprising:writing data into a buffer having a number of metrics, wherein each metric of the number of metrics includes a decision about a bit being correct and a probability of the reliability of the decision, arranged into an N by 8 array of 16 by 16 metric blocks, wherein N is an even number;wherein the buffer is partitioned into at least 2 subsets of rows according to a predetermined write sequence;applying a mapping table to change data in each of the 16 by 16 metric blocks of the array according to a table; wherein the table specifies a mapping of the location for a bit corresponding to each metric in the 16 by 16 metric blocks; andreading the data out of the buffer to serve as input for a first decoder and a second decoder.22. The method of where the first elements of the 16 by 16 table entries form a Latin square.23. The method of wherein the method is for deinterleaving data encoded using a 16 QAM modulation.25. The method of wherein the method is for deinterleaving data encoded using QPSK modulation.26. The method of wherein symbol bits in each reliability class are balanced in each constituent codeword.27. The method of wherein the indices of transmission of the metrics on the line claim 26 , taken modulo N claim 26 , where N is twice the number of metrics per symbol claim 26 , are the same in each metric block.28. An apparatus comprising:a deinterleaver; the deinterleaver containing logic enabling:writing into a buffer having a number of metrics, wherein each metric of the number of metrics includes a decision about a bit being correct and a probability of the reliability of the decision, arranged into an N by 8 array of 16 by 16 metric blocks, wherein N is an even number; wherein the buffer is partitioned into at least 2 subsets of rows; by writing data into the buffer in groups of 8 metrics; wherein each of the groups of 8 metrics are written in ...

Data processing apparatus, data processing method, and program

A data processing apparatus, a data processing method, and a program are disclosed. They improve communication performance by performing bit interleaving suitable for a modulation method that is a non-uniform constellation. One example of a data processing apparatus includes a mapping unit configured to generate a second bit sequence by mapping a first bit sequence to any symbol on a complex plane corresponding to a NUC modulation method, an inter-symbol interleaving unit configured to generate a third bit sequence by performing inter-symbol interleaving to the second bit sequence, an intra-symbol interleaving unit configured to generate a fourth bit sequence by performing intra-symbol interleaving for shifting M bits as a whole of the third bit sequence per a same number of M bits as the bit number M representing the symbol, and a modulation unit configured to wirelessly transmit the fourth bit sequence according to the NUC modulation method.

Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals

A method and an apparatus for transmitting broadcast signals thereof are disclosed. The apparatus for transmitting broadcast signals, the apparatus comprises an encoder for encoding service data corresponding to each of a plurality of data transmission path, wherein each of the data transmission path carries at least one service component for broadcast services, an encoder for encoding signaling data, wherein the signaling data includes static data and dynamic data, a frame builder for building signal frames, wherein each of signal frames includes the encoded service data and the encoded signaling data, wherein each of signal frames belongs to one of the broadcast services, wherein the static data remain constant in the signal frames belonging to the broadcast service in a duration of a super frame and the dynamic data changes by the signal frames, a modulator for modulating the signal frames by an OFDM (Orthogonal Frequency Division Multiplex) scheme and a transmitter for transmitting the broadcast signals carrying the modulated signal frames.

PARITY INTERLEAVING APPARATUS FOR ENCODING VARIABLE-LENGTH SIGNALING INFORMATION AND PARITY INTERLEAVING METHOD USING SAME

A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit. 1. A signaling information transmission apparatus , comprising:a parity permutation unit configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of bit groups, and by group-wise interleaving the bit groups using an order of group-wise interleaving;a parity puncturing unit configured to generate parity punctured parity bits by performing the parity puncturing using the parity bit string;a modulation unit configured to perform quadrature phase shift keying (QPSK) modulation for generating a transmission signal by using an input signal corresponding to the parity punctured parity bits; andan antenna configured to transmit the transmission signal over a physical channel to a reception device,wherein the bit groups correspond to 36 bit groups each of which is composed of 360 bits, and the 36 bit groups indexed by 36 integer numbers from 9 to 44.2. The signaling information transmission apparatus of claim 1 ,wherein the order of group-wise interleaving corresponds to a sequence of 36 numbers which indicate the order of the 36 bit groups,wherein the order of group-wise interleaving corresponds to a sequence [16 22 27 30 37 44 20 23 25 32 38 41 9 10 17 18 21 33 35 14 28 12 15 19 11 24 29 34 36 13 40 43 31 26 39 42].3. The signaling information transmission apparatus of claim 2 , ...

TIME VARYING DATA PERMUTATION APPARATUS AND METHODS

Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations. 1. A data transmission system comprising:an interleaver configured to generate a first time-varying stream from data frames;a Forward Error Correction (FEC) encoder configured to encode the first time-varying stream to generate an encoded stream; anda de-interleaver configured to generate a second time-varying stream based on the encoded stream.2. The data transmission system of wherein the interleaver comprises a block interleaver configured to generate an interleaved data stream claim 1 , the first-time varying stream being generated based on the interleaved data stream.3. The data transmission system of further comprising a frame generator for generating data frames.4. The data transmission system of wherein the interleaver is configured to process the data frames.5. The data transmission system of wherein the de-interleaver is configured to generate an encoded output data stream based on the second-time varying stream.6. The data transmission system of wherein the de-interleaver comprises a third time-varying permutation element for performing inverse permutation.7. The data transmission system of wherein the first time-varying permutation stream is generated at a plurality of permutation stages.8. The data transmission system of further comprising a controller coupled to the plurality of permutation stages.9. The data transmission system of wherein the interleaver is configured to apply a 64-bit permutation process.10. ...

Transmitting apparatus and interleaving method thereof

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to perform a low-density parity check (LDPC) encoding on input bits using a parity check matrix to generate an LDPC codeword comprising information word bits and parity bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

TIME INTERLEAVER, TIME DEINTERLEAVER, TIME INTERLEAVING METHOD, AND TIME DEINTERLEAVING METHOD

A convolutional interleaver included in a time interleaver, which performs convolutional interleaving includes: a first switch that switches a connection destination of an input of the convolutional interleaver to one end of one of a plurality of branches; a FIFO memories provided in some of the plurality of branches except one branch, wherein a number of FIFO memories is different among the plurality of branches; and a second switch that switches a connection destination of an output of the convolutional interleaver to another end of one of the plurality of branches. The first and second switches switch the connection destination when the plurality of cells as many as the codewords per frame have passed, by switching a corresponding branch of the connection destination sequentially and repeatedly among the plurality of branches. 1. A convolutional interleaver that performs convolutional interleaving , the convolutional interleaver comprising:a first switch that switches a first connection destination of an input terminal of the convolutional interleaver to one end of one of a plurality of branches, a number of which is same as a number of interleaving units on which a cell to be interleaved is disposed;a plurality of first in, first out (FIFO) registers provided in some of the plurality of branches except a first branch, wherein a number of FIFO registers is different among the plurality of branches and each lower branch adds an additional FIFO register; anda second switch that switches a second connection destination of an output terminal of the convolutional interleaver to another end of one of the plurality of branches,wherein the first switch switches the first connection destination of the input terminal when a plurality of cells as many as codewords per frame has passed, by switching a corresponding branch of the first connection destination sequentially and repeatedly among the plurality of branches,wherein the second switch switches the second connection ...

TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. 1. A data processing apparatus , comprising:an interleaver configured to split a codeword comprising information bits and parity bits into a plurality of bit groups and interleave the plurality of bit groups to provide an interleaved codeword;a demultiplexer configured to demultiplex the interleaved codeword to generate data cells; anda mapper configured to map the data cells onto constellation points for quadrature phase shift keying modulation,wherein the parity bits are generated based on the information bits and a forward error correction code according to a code rate of 5/15 and a code length of 16200, and {'br': None, 'i': Y', '=X', 'j Подробнее

Methods, apparatus, and systems for coding with constrained interleaving

Serially-concatenated codes are formed in accordance with the present invention using a constrained interleaver. The constrained interleaver cause the minimum distance of the serial concatenated code to increase above the minimum distance of the inner code alone by adding a constraint that forces some or all of the distance of the outer code onto the serially-concatenated code. This allows the serially-concatenated code to be jointly optimized in terms of both minimum distance and error coefficient to provide significant performance advantages. Constrained interleaving can be summarized in that it: 1) uses an outer code that is a block code or a non-recursive convolutional code, and as such, there are multiple codewords present in the constrained interleaver, 2) selects a desired MHD, 3) selects an interleaver size and a set of predefined interleaver constraints to prevent undesired (low-distance) error events so as to achieve the desired MHD, and 4) performs uniform interleaving among the allowable (non-constrained) positions, to thereby maximize or otherwise improve the interleaver gain subject to the constraints imposed to maintain the desired MHD.

Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals

The present invention provides an apparatus of transmitting broadcast signals, the apparatus including, an encoder for encoding service data, a frame builder for building at least one signal frame by mapping the encoded service data, a modulator for modulating data in the built at least one signal frame by an Orthogonal Frequency Division Multiplexing, OFDM, scheme and a transmitter for transmitting the broadcast signals having the modulated data.

DATA PROCESSING APPARATUS AND METHOD

A data processing apparatus includes a group-wise interleaving unit that performs group-wise interleaving; and a block interleaving unit that performs block interleaving in such a manner that an LDPC code obtained by performing the group-wise interleaving is written in m number of columns as storage regions arranged in the row direction. A type of the block interleaving includes a type A and a type B. A MODCOD which is a combination of the LDPC code and the modulation scheme includes a MODCOD-A which is a MODCOD based on the assumption that the block interleaving of the type A is performed, and a MDOCOD-B which is a MDOCOD based on the assumption that the block interleaving of the type B is performed. 1. A data processing apparatus comprising:a group-wise interleaving unit that performs group-wise interleaving which interleaves an LDPC code having a code length (N) of 16,200 bits or 64,800 bits for every bit group of 360 bits; and{'sup': 'm', 'a block interleaving unit that performs block interleaving in such a manner that an LDPC code obtained by performing the group-wise interleaving is written in m number of columns as storage regions arranged in the row direction, m bits are obtained by respectively reading the LDPC code from m number of columns bit by bit, and the m bits are interleaved into one symbol corresponding to any one of 2number of signal points defined by a modulation scheme,'}wherein a type of the block interleaving includes a type A in which the writing of an LDPC code obtained by performing the group-wise interleaving in the column direction of the columns is iteratively performed on m number of columns, and a type B in which the writing of an LDPC code obtained by performing the group-wise interleaving in the row direction of m number of columns for every bit group is iteratively performed,wherein a MODCOD which is a combination of the LDPC code and the modulation scheme includes a MODCOD-A which is a MODCOD based on the assumption that the block ...

Parallel bit interleaver

A bit interleaving method applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks of Q bits each, dividing the processed codeword into constellation words of M bits each, and applying an intra-cyclic-block permutation process to the cyclic blocks, where the codeword is divided into F×N/M folding sections of M/F cyclic blocks each and the constellation words are each associated with one of the folding sections, and the bit permutation process is applied such that the constellation words are each made up of F bits from each of M/F different cyclic blocks in the associated section, after the permutation process.

Data transmission method and apparatus based on unequal error protection and device

Embodiments of the present invention relate to a data transmission method and apparatus based on unequal error protection and a device. The method includes: segmenting, according to a quantity of symbol bits in a constellation diagram, a code block corresponding to data, to obtain segmented code blocks; performing rate matching on the segmented code blocks obtained by channel encoding, to obtain output code blocks; cascading the output code blocks according to the quantity of symbol bits in the constellation diagram, to obtain cascaded code blocks; and sending the cascaded code blocks to a terminal device.

FFT ENGINE HAVING COMBINED BIT-REVERSAL AND MEMORY TRANSPOSE OPERATIONS

A data processing device includes: 1) Fast Fourier Transform (FFT) logic configured to generate FFT output samples for each of a plurality of digital input signals; 3) a first memory device with a plurality of banks; 4) a second memory device; 5) a bit-reversed address generator and first set of circular shift components configured to shift between the plurality of banks when writing the generated FFT output samples in bit-reversed address order to the first memory device; and 6) a second set of circular shift components configured to shift between the plurality of banks when reading FFT output samples in linear address order from the first memory device for storage in the second memory device, wherein the first and second set of circular shift components together are configured to read FFT output samples in transpose order using combined bit-reversal and memory transpose operations. 1. A data processing device that comprises:Fast Fourier Transform (FFT) logic configured to generate FFT output samples for each of a plurality of digital input signals;a first memory device with a plurality of banks;a second memory device;a bit-reversed address generator and first set of circular shift components configured to shift between the plurality of banks when writing the generated FFT output samples in bit-reversed address order to the first memory device; anda second set of circular shift components configured to shift between the plurality of banks when reading FFT output samples in linear address order from the first memory device for storage in the second memory device, wherein the first and second set of circular shift components together are configured to read FFT output samples in transpose order using combined bit-reversal and memory transpose operations.2. The data processing device of claim 1 , wherein the first set of circular shift components are configured to write FFT output samples corresponding to each digital input signal across the plurality of banks of the ...

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 6/15, 8/15, or 10/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code. 1. A transmitting device for generating a terrestrial digital television broadcast signal , the device decreasing a signal-to-noise power ratio per symbol for a selected bit error rate of the generated terrestrial digital television broadcast signal and/or expanding reception range of the terrestrial digital television broadcast signal at which the data is decodable by a receiving device for presentation to a user , the device comprising: receive data to be transmitted in a terrestrial digital television broadcast signal;', 'perform low density parity check (LDPC) encoding on input bits of the received data according to a parity check matrix of an LDPC code having a code length N of 16200 bits and an encoding rate r of 10/15 to generate an LDPC code word, the LDPC code enabling error correction processing to correct errors generated in a transmission path of the terrestrial digital television broadcast signal;, 'circuitry configured to'}wherein the LDPC code word includes information bits and parity bits, the parity bits being processed by the receiving device to recover information bits corrupted by transmission path errors,the parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits,the information matrix portion is represented by a parity check matrix ...

Apparatus and methods for administering treatment within a bodily duct of a patient

Apparatus and methods for administering treatment within a bodily duct of a patient. According to one implementation a treatment catheter having an expandable structure disposed at an end thereof is provided that includes an elongate hollow shaft having a one or more first through holes and one or more second through holes spaced axial apart, the one or more first through holes residing beneath the expandable structure. A sleeve positioned along an outer surface of the hollow shaft is moveable between first and second axial positions to respectively permit or inhibit the flow of a treatment agent through the one or more second through holes into the bodily duct. An elongate wire having a seal unit is positioned within an inner lumen of the hollow shaft. The seal unit is moveable between first and second axial positions to respectively permit or inhibit the flow of an inflation medium between a cavity of the expandable structure and the inner lumen of the hollow shaft through the one or more first through holes.

RECEIVING APPARATUS AND DE-INTERLEAVING METHOD THEREOF

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol. 2. The broadcast signal receiving apparatus of claim 1 , wherein each of the plurality of groups comprises 360 values.3. The broadcast signal receiving apparatus of claim 1 , wherein π(j) is determined based on at least one of the code length claim 1 , a modulation method and the code rate.5. The broadcast signal transmitting apparatus of claim 4 , wherein each of the plurality of bit groups comprises 360 bits. This is a continuation of U.S. patent application Ser. No. 16/505,226, filed on Jul. 8, 2019, which is a continuation of U.S. patent application Ser. No. 16/042,628, filed on Jul. 23, 2018, issued as U.S. Pat. No. 10,382,063 on Aug. 13, 2019, which is a continuation of U.S. patent application Ser. No. 15/435,042, filed on Feb. 16, 2017, issued as U.S. Pat. No. 10,033,409 on Jul. 24, 2018, which is a continuation of U.S. patent application Ser. No. 15/130,204, filed on Apr. 15, 2016, issued as U.S. Pat. No. 9,692,454 on Jun. 27, 2017, which is a continuation of U.S. patent application Ser. no. 14/625,862, filed on Feb. 19, 2015, issued as U.S. Pat. No. 9,602,137 on Mar. 21, 2017, which claims priority from U.S. Provisional Application 61/941,676 filed on Feb. 19, 2014, U.S. Provisional Application 62/001,170 filed on May 21, 2014, and Korean Patent Application 10-2015-0000671 filed on Jan. 5, 2015. The entire disclosures of the prior applications are considered part of the ...

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present technology relates to a data processing device and a data processing method so that an LDPC code with a good bit error rate is provided. 1. A transmitting device for generating a digital television broadcast signal , the device comprising: receive data to be transmitted in a digital television broadcast signal;', 'perform LDPC (low density parity check) encoding on input bits of the received data according to a parity check matrix initial value table of an LDPC code having a code length of 16200 bits and a code rate of 10/15 to generate an LDPC code word, the LDPC code enabling error correction processing to correct errors generated in a transmission path of the digital television broadcast signal; wherein, 'circuitry configured tothe LDPC code word includes information bits and parity bits, the parity bits being processed by the receiving device to recover information bits corrupted by transmission path errors,the parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits,the information matrix portion is represented by a parity check matrix initial value table, andthe parity check matrix initial value table, having each row indicating positions of elements ‘1’ in corresponding 360 columns of the information matrix portion as a subset of information bits used in calculating the parity bits in the LDPC encoding, is as follows352 747 894 1437 1688 1807 1883 2119 2159 3321 3400 3543 3588 3770 3821 4384 4470 4884 5012 5036 5084 5101 5271 5281 5353505 915 1156 1269 1518 1650 2153 2256 2344 2465 2509 2867 2875 3007 3254 3519 3687 4331 4439 4532 4940 5011 5076 5113 5367268 346 650 919 1260 4389 4653 4721 4838 5054 5157 5162 5275 5362220 236 828 1590 1792 3259 3647 4276 4281 4325 4963 4974 5003 5037381 737 1099 1409 2364 2955 3228 3341 3473 3985 4257 4730 5173 524288 771 1640 1737 1803 2408 2575 2974 3167 3464 3780 4501 4901 5047749 1502 2201 31892873 3245 ...

Transmitter apparatus and interleaving method thereof

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

APPARATUS FOR TRANSMITTING BROADCAST SIGNALS, APPARATUS FOR RECEIVING BROADCAST SIGNALS, METHOD FOR TRANSMITTING BROADCAST SIGNALS AND METHOD FOR RECEIVING BROADCAST SIGNALS

The present invention provides an apparatus of transmitting broadcast signals, the apparatus including, an encoder for encoding service data, a frame builder for building at least one signal frame by mapping the encoded service data, a modulator for modulating data in the built at least one signal frame by an Orthogonal Frequency Division Multiplexing, OFDM, scheme and a transmitter for transmitting the broadcast signals having the modulated data. 14-. (canceled)5. An apparatus for transmitting broadcast signals , the apparatus including:an encoder to encode service data according to a 16200 bits codeword and a 6/15 code rate based on addresses in a parity check matrix, wherein the encoded service data comprises information bits and parity bits;a frame builder to build at least one signal frame by mapping the encoded service data;a modulator to modulate data in the built at least one signal frame by an Orthogonal Frequency Division Multiplexing, OFDM, scheme; anda transmitter to transmit the broadcast signals having the modulated data,wherein the service data is encoded by:adding the information bits in groups of 360 information bits corresponding to each row of the parity check matrix to the parity bits of which addresses are based on values of entries in each row of the parity check matrix, wherein the parity check matrix is27 430 519 828 1897 1943 2513 2600 2640 3310 3415 4266 5044 5100 5328 5483 5928 6204 6392 6416 6602 7019 7415 7623 8112 8485 8724 8994 9445 966727 174 188 631 1172 1427 1779 2217 2270 2601 2813 3196 3582 3895 3908 3948 4463 4955 5120 5809 5988 6478 6604 7096 7673 7735 7795 8925 9613 967027 370 617 852 910 1030 1326 1521 1606 2118 2248 2909 3214 3413 3623 3742 3752 4317 4694 5300 5687 6039 6100 6232 6491 6621 6860 7304 8542 8634990 1753 7635 8540933 1415 5666 874527 6567 8707 92162341 8692 9580 9615260 1092 5839 6080352 3750 4847 77264610 6580 9506 95972512 2974 4814 93481461 4021 5060 70091796 2883 5553 83061249 5422 70573965 6968 94221498 2931 ...

Transmitting apparatus and signal processing method thereof

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.

TRANSMITTER AND METHOD FOR TRANSMITTING DATA BLOCK IN WIRELESS COMMUNICATION SYSTEM

Provided are a transmitter and a method for transmitting a data block in a wireless communication system. The method comprises the following steps: deciding the number of bits (s) and encoders (N) to allocate to one axis of a signal constellation; encoding an information bit based on the s and the Nand generating a coded block; parsing the coded block based on the s and the Nand generating a plurality of frequency sub-blocks; and transmitting the plurality of frequency sub-blocks to a receiver. 1{'sub': 'ES', 'determining a number of bits assigned to a single axis of a signal constellation, s, and a number of encoders, N;'}{'sub': CBPSS', 'ES, 'encoding information bits to generate a coded block of Nbits based on s and N;'}{'sub': 'ES', 'parsing the coded block to generate a plurality of frequency subblocks based on s and N; and'}transmitting the plurality of frequency subblocks to a receiver.. A method of transmitting a data block in a wireless communication system, comprising: The present invention relates to wireless communication, and more particularly, to a method of transmitting a data block in a wireless communication system, and a transmitter.Recently, various wireless communication technologies are under development in accordance with the advancement of information communication technology. Among them, a wireless local area network (WLAN) is a technique allowing mobile terminals such as personal digital assistants (PDAs), lap top computers, portable multimedia players (PMPs), and the like, to wirelessly access the Internet at homes, in offices, or in a particular service providing area, based on a radio frequency technology.As a technology specification that has been relatively recently legislated in order to overcome a limitation in a communication speed that has been pointed out as a weak point in the WLAN, there is the IEEE (Institute of Electrical and Electronics Engineers) 802.11n. An object of the IEEE 802.11n is to increase a speed and reliability of ...

Apparatus and method for sending and receiving broadcast signals

A broadcast signal transmitter is presented. The broadcast signal transmitter includes a Forward Error Correction (FEC) encoder configured to perform error correction processing on Physical Layer Pipe (PLP) data, a bit interleaver configured to bit-interleave the PLP data, a mapper configured to perform constellation mapping on the PLP data, a framer configured to generate a signal frame comprising the PLP data, and a waveform generator configured to generate a transmission signal comprising the signal frame. The signal frame of the transmission signal comprises a bootstrap, a preamble, and a data part. The bootstrap comprises preamble structure information about the preamble. The preamble comprises at least one preamble symbol. The at least preamble symbol carries Layer 1 (L1) signaling data for the signal frame. The first preamble symbol comprises preamble_symbol_number information, and the preamble_symbol_number information indicates a number of preamble symbols other than the first preamble symbol.

TRANSMITTING APPARATUS AND MAPPING METHOD THEREOF

A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme. 2. The apparatus as claimed in claim 1 , wherein the constellation points as defined in the table comprise constellation points in one quadrant claim 1 , andwherein constellation points in remaining quadrants are obtained by indicating each constellation point a which is defined in the table as a*, −a*, and −a, respectively, * indicating complex conjugation.4. The method as claimed in claim 3 , wherein the constellation points as defined in the table comprise constellation points in one quadrant claim 3 , andwherein constellation points in remaining quadrants are obtained by indicating each constellation point a which is defined in the table as a*, −a*, and −a, respectively, * indicating complex conjugation. This application is a Continuation of Ser. No. 15/813,722 filed Nov. 15, 2017, which is a Continuation of U.S. application Ser. No. 14/715,892, filed May 19, 2015, issued as U.S. Pat. No. 9,853,771 on Dec. 26, 2017, the disclosures of which are incorporated herein in their entirety by reference.Apparatuses and methods consistent with exemplary embodiments of the inventive concept relate to transmitting and receiving date using broadcasting, more particularly, to the design of non-uniform constellations used in a Bit Interleaved Coded Modulation (BICM) mapping bits at an output of an encoder and interleaver to complex constellations.The current broadcasting systems consistent with the Digital Video Broadcasting Second Generation Terrestrial (DVB-T2) use a Bit Interleaved and Coded Modulation (BICM) chain in order to encode bits to ...

TRANSMITTING APPARATUS AND MAPPING METHOD THEREOF

A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme. 14-. (canceled)61. The apparatus as claimed in claim , wherein the decoder is configured to decode the deinterleaved values based on a low density parity check (LDPC) code having a code rate of 4/15.83. The method as claimed in claim , wherein the decoding decodes the deinterleave values based on a low density parity check (LDPC) code having a code rate of 4/15. This is a continuation of U.S. application Ser. No. 15/661,653 filed on Jul. 27, 2017, which is a continuation of U.S. application Ser. No. 14/716,427 filed on May 19, 2015. The disclosures of which are incorporated herein by reference in their entirety.Apparatuses and methods consistent with exemplary embodiments of the inventive concept relate to transmitting and receiving date using broadcasting, more particularly, to the design of non-uniform constellations used in a Bit Interleaved Coded Modulation (BICM) mapping bits at an output of an encoder and interleaver to complex constellations.The current broadcasting systems consistent with the Digital Video Broadcasting Second Generation Terrestrial (DVB-T2) use a Bit Interleaved and Coded Modulation (BICM) chain in order to encode bits to be transmitted. The BICM chain includes a channel encoder like a Low Density Parity Check (LDPC) encoder followed by a Bit Interleaver and a Quadrature Amplitude Modulation (QAM) mapper. The role of the QAM mapper is to map different bits output from the channel encoder and interleaved using the Bit Interleaver to QAM cells. Each cell represents a complex number having real and imaginary ...

TRANSMITTING APPARATUS AND MAPPING METHOD THEREOF

A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme. 2. The receiving apparatus as claimed in claim 1 , wherein the constellation points as defined in the table comprises constellation points in one quadrant claim 1 , andwherein constellation points in remaining quadrants are obtained by indicating each constellation point a which is defined in the table as a*, −a*, and −a, respectively, * indicating complex conjugation.4. The receiving method apparatus as claimed in claim 3 , wherein the constellation points as defined in the table comprises constellation points in one quadrant claim 3 , andwherein constellation points in remaining quadrants are obtained by indicating each constellation point a which is defined in the table as a*, −a*, and −a, respectively, * indicating complex conjugation. This is a continuation of U.S. application Ser. No. 15/893,250 filed Feb. 9, 2018, which is a continuation of U.S. application Ser. No. 15/426,832 filed Feb. 7, 2017, which is a continuation of U.S. application Ser. No. 14/715,873 filed May 19, 2015. The entire disclosures of which are incorporated herein by reference in their entireties.Apparatuses and methods consistent with exemplary embodiments of the inventive concept relate to transmitting and receiving date using broadcasting, more particularly, to the design of non-uniform constellations used in a Bit Interleaved Coded Modulation (BICM) mapping bits at an output of an encoder and interleaver to complex constellations.The current broadcasting systems consistent with the Digital Video Broadcasting Second Generation Terrestrial (DVB-T2) use a ...

INTERMEDIATE TRANSFER UNIT THAT BUFFERS TENSION THAT BACKUP ROLLER RECEIVES FROM INTERMEDIATE TRANSFER BELT, AND IMAGE FORMING APPARATUS

An intermediate transfer unit includes a drive roller, a tension roller, a backup roller, an intermediate transfer belt having an endless shape, a tension roller support part, a first elastic member, a backup roller support part, and a second elastic member. The backup roller support part supports the backup roller in a state of applying tension to the intermediate transfer belt in a second outward direction different from the first outward direction. The second elastic member is provided at the backup roller support part and receives, through the backup roller, the tension that the backup roller receives from the intermediate transfer belt to thereby buffer the tension. 1. An intermediate transfer unit comprising:a drive roller;a tension roller;a backup roller;an intermediate transfer belt that has an endless shape, is stretched over the drive roller, the tension roller, and the backup roller, and moves circularly;a tension roller support part that freely movably supports the tension roller in inner and outer directions of the intermediate transfer belt;a first elastic member that urges the tension roller in a first outward direction of the intermediate transfer belt and applies tension to the intermediate transfer belt through the tension roller;a backup roller support part that supports the backup roller in a state of applying tension to the intermediate transfer belt in a second outward direction different from the first outward direction; anda second elastic member that is provided at the backup roller support part and receives, through the backup roller, the tension that the backup roller receives from the intermediate transfer belt to thereby buffer the tension.2. The intermediate transfer unit according to claim 1 , whereinthe backup roller support part includes a bearing of the backup roller and a stopper fixed to a fixed position, andthe second elastic member is provided in a state of being sandwiched between the bearing and the stopper.3. The intermediate ...

APPARATUS FOR TRANSMITTING BROADCAST SIGNALS, APPARATUS FOR RECEIVING BROADCAST SIGNALS, METHOD FOR TRANSMITTING BROADCAST SIGNALS AND METHOD FOR RECEIVING BROADCAST SIGNALS

The present invention provides a method of transmitting broadcast signals. The method includes, encoding, by an encoder, PLP (Physical Layer Pipe) data; time interleaving, by a time interleaver, the encoded PLP data; frame mapping, by a framer, the time interleaved PLP data onto at least one signal frames; frequency interleaving, by a frequency interleaver, data in the at least one signal frames; and waveform modulating, by a waveform module, the frequency interleaved data in the at least one signal frame and transmitting, by the waveform module, broadcast signals having the modulated data, wherein the frequency interleaving is conducted according to an interleaving mode, wherein the interleaving mode is determined based on a FFT (Fast Fourier Transform) size. 128-. (canceled)29. A frequency de-interleaver used in a broadcast signal receiver , the frequency de-interleaver comprising: a signal frame including a number of OFDM (Orthogonal Frequency Division Multiplexing) symbols,', 'the number of OFDM symbols is an even number,', 'the number of OFDM symbols include a symbol carrying physical layer signalling data and one or more symbols carrying PLP data,', 'the deinterleaving sequence of which addresses are within a range of a number of cells in an OFDM symbol is generated based on a toggle bit and a symbol offset sequence,', 'the symbol offset sequence is generated for every OFDM symbol pair including two consecutive OFDM symbols,', 'the symbol offset sequence is reset on the symbol carrying physical layer signalling data that is followed by the one or more symbols carrying the PLP data; and, 'a memory index generator configured to generate a de-interleaving sequence that is used to de-interleave data in one or more signal frames, whereina memory.30. The frequency de-interleaver of claim 29 ,wherein the frequency de-interleaver operates on an OFDM symbol, the frequency de-interleaver is configured to write a first OFDM symbol of an OFDM symbol pair on the memory and ...

TRANSMISSION DEVICE, TRANSMISSION METHOD, RECEPTION DEVICE, AND RECEPTION METHOD

The present technology relates to a transmission device, a transmission method, a reception device, and a reception method for securing good communication quality in data transmission using an LDPC code. LDPC coding for information bits with an information length K=N×r is performed on the basis of an extended parity check matrix having rows and columns extended by a predetermined puncture length L with respect to a parity check matrix of an LDPC code with a code length N of 69120 bits and a coding rate r of 14/16, so that an extended LDPC code having parity bits with a parity length M=N+L−K is generated. A head of the information bits of the extended LDPC code is punctured by L, so that a punctured LDPC code with the code length N of 69120 bits and the coding rate r is generated. The extended parity check matrix includes an A matrix of M1 rows and K columns expressed by a predetermined value M1 and the information length K=N×r, a B matrix of M1 rows and M1 columns, a Z matrix of M1 rows and N+L−K−M1 columns, a C matrix of N+L−K−M1 rows and K+M1 columns, and a D matrix of N+L−K−M1 rows and N+L−K−M1 columns. The present technology can be applied to data transmission and the like using an LDPC code. 1. A transmission device comprising:an encoding unit configured toperform LDPC coding for information bits with an information length K=N×r to generate an extended LDPC code having parity bits with a parity length M=N+L−K on a basis of an extended parity check matrix having rows and columns each extended by a predetermined puncture length L with respect to a parity check matrix of an LDPC code with a code length N of 69120 bits and a coding rate r of 2/16, andpuncture a head of the information bits of the extended LDPC code by the puncture length L to generate a punctured LDPC code with the code length N of 69120 bits and the coding rate r of 2/16, whereinthe extended parity check matrix includesan A matrix of M1 rows and K columns expressed by a predetermined value M1 and ...

Transmitter and parity permutation method thereof

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to perform parity permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups including the interleaved parity bits; and a puncturer configured to select some of the parity bits in the group-wise interleaved bit groups, and puncture the selected parity bits, wherein the parity permutator group-wise interleaves the bit groups such that some of the bit groups are positioned at predetermined positions, respectively, and a remainder of the bit groups are positioned without an order within the group-wise interleaved bit groups so that the puncturer selects parity bits included in the some of the bit groups positioned at the predetermined positions sequentially and selects parity bits included in the remainder of the bit groups without an order.

Transmitter and parity permutation method thereof

A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate parity bits; a parity permutator configured to perform parity permutation by interleaving the parity bits and group-wise interleaving a plurality of bit groups including the interleaved parity bits; and a puncturer configured to select some of the parity bits in the group-wise interleaved bit groups, and puncture the selected parity bits, wherein the parity permutator group-wise interleaves the bit groups such that some of the bit groups are positioned at predetermined positions, respectively, and a remainder of the bit groups are positioned without an order within the group-wise interleaved bit groups so that the puncturer selects parity bits included in the some of the bit groups positioned at the predetermined positions sequentially and selects parity bits included in the remainder of the bit groups without an order.

PARALLEL BIT INTERLEAVER

A bit interleaving method involves applying a bit permutation process to a QC LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword, after the bit permutation process, into a plurality of constellation words each made up of M bits, the codeword being divided into N/M sections, each constellation word being associated with one of the N/M sections, and the bit permutation process being performed such that each of the constellation words includes one bit from each of M different cyclic blocks associated with a given section. 1. A transmitting method comprising:generating a codeword according to a low-density parity check coding scheme such that the codeword includes N bit groups each consisting of Q bits, a parity-check matrix of the low-density parity check coding scheme having a quasi-cyclic structure;reordering the N bit groups;reordering bits of the codeword after the N bit groups are reordered;dividing the codeword into constellation words, the constellation words each consisting of M bits after the bits of the codeword are reordered;generating a transmission signal based on the constellation words after the codeword is divided; andtransmitting the transmission signal through an antenna, whereinN is a multiple of M, andthe bits of the codeword are written into an M by Q matrix row-by-row and the written bits of the codeword are read from the M by Q matrix column-by-column in order to reorder the bits of the codeword.2. The transmission method according to claim 1 , wherein the bits of the codeword are written into the M by Q matrix from a topmost row and the written bits of the codeword are read from the M by Q matrix from a leftmost column.3. The transmission method according to claim 1 , wherein the N bit groups are reordered according to a reordering table.4. A transmitter comprising:generating circuitry generating a codeword according to a low-density parity check coding scheme such that the codeword includes N bit groups ...

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD FOR IMPROVING RESISTANCE TO ERROR OF DATA

A data processing device and a data processing method capable of improving resistance to error of data. An LDPC encoder encodes by an LDPC code whose code length is 16200 bits and code rate is 4/15, 7/15, or 8/15. A parity check matrix of the LDPC code is composed by arrangement of an element of an information matrix determined by a parity check matrix initial value table indicating a position of the element of the information matrix corresponding to an information length corresponding to the code length and the code rate for each 360 columns of the parity check matrix with a period of 360 columns in a column direction. The parity check matrix initial value table is for digital broadcasting for a mobile terminal, for example. This technology may be applied to a case in which LDPC encoding and LDPC decoding are performed. 4. The data processing device according to claim 1 , further comprising:a parity interleaver, which interleaves only the parity bit of the LDPC code.5. The data processing device according to claim 1 , further comprising:a column twist interleaver, which performs column twist interleave by recording a code bit of the LDPC code while shifting in a column direction.6. The data processing device according to claim 1 , whereina 2+360×(i−1)-th column of the parity check matrix is a column obtained by cyclic shift of a 1+360×(i−1)-th column indicated by the parity check matrix initial value table downward by q=M/360 (i represents the number of rows of the parity check matrix initial table and M represents a parity length).7. The data processing device according to claim 6 , whereinq is set to 33.8. The data processing device according to claim 1 , whereinas for a 1+360×(i−1)-th column of the parity check matrix,an i-th row of the parity check matrix initial value table indicates a row number of an element 1 of the 1+360×(i−1)-th column of the parity check matrix,as for each column from a 2+360×(i−1)-th column to a 360×i-th column other than the 1+360×(i−1 ...

DATA PROCESSING DEVICE AND DATA PROCESSING METHOD

The present technology relates to a data processing device and a data processing method so that an LDPC code with a good bit error rate is provided. 1: A transmitting device for generating a digital television broadcast signal , the transmitting device comprising: receive data to be transmitted in a digital television broadcast signal;', 'perform low density parity check (LDPC) encoding on input bits of the received data according to a parity check matrix of an LDPC code whose code length is 16200 bits and code rate is 8/15 to generate an LDPC code word, the LDPC code enabling error correction processing to correct errors generated in a transmission path of the terrestrial digital television broadcast signal, wherein, 'circuitry configured to'}the LDPC code word includes information bits and parity bits, the parity bits being processed by the receiving device to recover information bits corrupted by transmission path errors,the parity check matrix including an information matrix part corresponding to the information bits and a parity matrix part corresponding to the parity bits,the information matrix part being represented by a parity check matrix initial value table, andthe parity check matrix initial value table, having each row indicating positions of elements ‘1’ in corresponding 360 columns of the information matrix part corresponding to a subset of information bits used in calculating the parity bits in the LDPC encoding, is as follows5 519 825 1871 2098 2478 2659 2820 3200 3294 3650 3804 3949 4426 4460 4503 4568 4590 4949 5219 5662 5738 5905 5911 6160 6404 6637 6708 6737 6814 7263 741281 391 1272 1633 2062 2882 3443 3503 3535 3908 4033 4163 4490 4929 5262 5399 5576 5768 5910 6331 6430 6844 6867 7201 7274 7290 7343 7350 7378 7387 7440 7554105 975 3421 3480 4120 4444 5957 5971 6119 6617 6761 6810 7067 73536 138 485 1444 1512 2615 2990 3109 5604 6435 6513 6632 6704 750720 858 1051 2539 3049 5162 5308 6158 6391 6604 6744 7071 7195 72381140 5838 6203 67486282 6466 ...

PARITY INTERLEAVING APPARATUS FOR ENCODING VARIABLE-LENGTH SIGNALING INFORMATION AND PARITY INTERLEAVING METHOD USING SAME

A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit. 1. A method of transmitting signaling information , comprising:segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups;generating a parity bit string for parity puncturing by group-wise interleaving the groups using an order of group-wise interleaving;generating parity punctured parity bits by performing the parity puncturing using the parity bit string;performing quadrature phase shift keying (QPSK) modulation for generating a transmission signal by using an input signal corresponding to the parity punctured parity bits; andtransmitting the transmission signal over a physical channel to a reception device.2. The method of claim 1 , wherein the LDPC codeword includes zero-padded variable length signaling information as information bits.3. The method of claim 1 , wherein the parity bits correspond to 12960 bits claim 1 , the groups correspond to 36 groups each of which is composed of 360 bits.4. The method of claim 2 , wherein the LDPC codeword includes an LDPC information bit string generated by filling all bits of at least one of information bit groups selected by using a shortening pattern order with 0.5. The method of claim 3 , wherein the order of group-wise interleaving corresponds to a sequence of 36 numbers which indicate the order of the 36 groups.6. The method of claim 5 , wherein the order of group-wise interleaving ...

BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 2/15 AND 16-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping. 1. A broadcast signal reception method , comprising:performing, by a demodulator, demodulation corresponding to 16-symbol mapping;performing, by a deinterleaver, group-unit deinterleaving on interleaved values, the interleaved values generated after the demodulation; andrestoring, by a decoder, information bits by LDPC-decoding deinterleaved values generated based on the group-unit deinterleaving, the deinterleaved values corresponding to a LDPC codeword having a length of 64800 and a code rate of 2/15,wherein the group-unit deinterleaving is performed on a group basis, the size of the group corresponding to a parallel factor of the LDPC codeword.2. The broadcast signal reception method of claim 1 , wherein the group-unit deinterleaving corresponds to a reverse process of a interleaving performed by using permutation order claim 1 , and {'br': None, 'interleaving sequence={5 58 29 154 125 34 0 169 80 59 13 42 77 167 32 87 24 92 124 143 114 120 166 138 64 136 149 57 18 101 119 35 33 113 75 108 104 3 27 39 172 159 129 62 146 142 19 147 111 70 74 79 10 132 1 161 155 90 15 133 47 112 84 28 160 117 150 49 7 81 44 63 118 4 158 148 82 69 36 162 86 71 22 26 61 40 126 170 177 23 91 68 56 110 21 93 107 85 20 128 109 66 83 12 179 141 97 78 157 72 130 99 165 45 11 152 168 14 16 2 137 140 121 173 50 55 94 144 73 51 98 174 178 17 100 9 122 54 38 156 131 127 164 102 116 176 30 37 139 95 43 135 53 89 ...