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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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05-01-2012 дата публикации

Method And Apparatus For A Power-Efficient Framework to Maintain Data Synchronization of a Mobile Personal Computer to Simulate A Connected Scenario

Номер: US20120005511A1
Автор: Mandar Joshi, Prashant Gandhi, Shobhit Varshney, Shreekant Thakkar, Uttam Sengupta
Принадлежит: Individual

An apparatus and method for a power-efficient framework to maintain data synchronization of a mobile personal computer (MPC) are described. In one embodiment, the method includes the detection of a data synchronization wakeup event while the MPC is operating according to a sleep state. Subsequent to wakeup event, at least one system resource is disabled to provide a minimum number of system resources required to re-establish a network connection. In one embodiment, user data from a network server is synchronized on the MPC without user intervention; the mobile platform system resumes operation according to the sleep state. In one embodiment, a wakeup alarm is programmed according to a user history profile regarding received e-mails. In a further embodiment, data synchronizing involves disabling a display, and throttling the system processor to operate at a reduced frequency. Other embodiments are described and claimed.

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Номер записи: 1
19-01-2012 дата публикации

Information Handling System with Processing System, Low-power Processing System and Shared Resources

Номер: US20120013795A1
Автор: Andrew T. Sultenfuss, Steven L. Belt
Принадлежит: Dell Products LP

An information handling system includes a processing system, a low-power processing system, and a chipset. The processing system is configured to operate using a power system configured to power a shared resource of the processing system and a non-shared resource of the processing system, and to disable the non-shared resource during a reduced operating state of the processing system. The low-power processing system is configured to access the shared resource of the processing system during operation of the low-power processing system, wherein the operation of the low-power processing system is separate from the operation of the processing system. The chipset includes a processor of the processing system and operable to be enabled during operation of the processing system, wherein the processor is configured to be disabled during operation of the low-power processing system.

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Номер записи: 2
02-02-2012 дата публикации

Method, Mobile Terminal and Computer Program Product for Sharing Storage Device

Номер: US20120030433A1
Автор: Chunhui Sun, Fuliang Zhang, Jinmei Yang, Wenying Shan
Принадлежит: Lenovo Beijing Ltd

The invention discloses a method of sharing a storage device and a mobile terminal. The mobile terminal comprises a first processor, a second processor and a readable and writable nonvolatile storage device. A processing capacity of the first processor is different from that of the second processor. A state in which the first processor is operating and using the storage device is a second state. A state in which the second processor is operating and using the storage device is a third state. The method comprising: the first processor receiving a switch instruction; the first processor controlling the storage device to enter the second state or the third state according to the switch instruction. As compared with the prior art, by controlling the sharing of the storage device by the first processor, the invention reduces the elements in the mobile terminal and saves the hardware cost of the mobile terminal; moreover, the physical connection between the components in the mobile terminal is simple and easily controlled.

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Номер записи: 3
02-02-2012 дата публикации

Electrical apparatus and power supply control method

Номер: US20120030491A1
Автор: Shigeharu Itou
Принадлежит: Kyocera Mita Corp

An electrical apparatus has a controller for switching between a normal power mode and power saving modes. A receiver receives instructions for a manipulation on the apparatus. A switch controller switches to a first power saving mode when no instruction for manipulation is received within a first standby time in the normal power mode, switches to a second and lower power saving mode when no instruction for manipulation is received and the time reaches a preset second standby time in the first power saving mode, switches to the normal power mode when an instruction for manipulation is received when the apparatus is in the first or second power saving mode, and switches to the second or a third power saving mode for supplying less power than the first power saving mode but more than the second when the time reaches the first standby time if a predetermined condition is satisfied.

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Номер записи: 4
09-02-2012 дата публикации

Method for optimizing the operation of a multiprocessor integrated circuit, and corresponding integrated circuit

Номер: US20120036375A1
Автор: Diego Puschini Pascual, Fabien Clermidy, Pascal Benoit
Принадлежит: Commissariat a lEnergie Atomique et aux Energies Alternatives CEA

A method for optimizing operation which is applicable to a multiprocessor integrated circuit chip. Each processor runs with a variable parameter, for example its clock frequency, and the optimization includes determination, in real time, of a characteristic data value associated with the processor (temperature, consumption, latency), transfer of the characteristic data to the other processors, calculation by each processor of various values of an optimization function depending on the characteristic data value of the block, on the characteristic data values of the other blocks, and on the variable parameter, the function being calculated for the current value of this parameter and for other possible values, selection, from among the various parameter values, of that which yields the best value for the optimization function, and application of this variable parameter to the processor for the remainder of the execution of the task.

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Номер записи: 5
09-02-2012 дата публикации

Computer system with enhanced user interface for images

Номер: US20120036438A1
Автор: Chris Guzak, Franc Camara, Michael G. Sheldon, Rajesh Ganesan, Todd Ouzts
Принадлежит: Microsoft Corp

A computer system and method are presented that enhance a user experience when viewing images displayed on the computer. The system includes a user interface for the computer that displays a number of thumbnail images that are small representations of image files existing on the computer. The thumbnail images are arranged in alignment with one another, such as at the bottom of a viewing window. An enlarged preview image is positioned adjacent the thumbnail images. The enlarged preview image corresponds to a selected thumbnail image and is a larger representation of an image file corresponding with the selected thumbnail image. A control is displayed in the window that enables the user to iterate through the thumbnail images in at least one direction. As the user iterates through the thumbnail images, the enlarged preview image changes correspondingly.

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Номер записи: 6
16-02-2012 дата публикации

3-d rendering for a rotated viewer

Номер: US20120038635A1
Автор: Steven Osman, Vlad Stamate
Принадлежит: Sony Computer Entertainment Inc

Methods and systems for displaying a three dimensional image to a rotated viewer are presented. The roll and yaw of a viewer's eyes, with respect to a display, is tracked and used to adjust the orientation of a pair of stereoscopic images so as to maintain a three dimensional image when a viewer is rotated. Adjustment to the orientation of the pair of stereoscopic images may also factor in the orientation of a plurality of viewers, each viewer with a potentially different orientation with respect to the display.

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Номер записи: 7
16-02-2012 дата публикации

Fan speed control system and method

Номер: US20120041597A1
Автор: Chao-Ke Wei, Yao-Ting Chang
Принадлежит: Hon Hai Precision Industry Co Ltd

A fan speed control system includes a fan, a hardware device, and a basic input/output system (BIOS) module. The BIOS module includes a memory unit, an initial power detecting unit, a searching unit, and a control unit. The memory unit stores a matching table between of initial power ranges and corresponding fan speed control curves. The initial power detecting unit is operable to detect the initial power of the hardware device. The searching unit is operable to read the matching table and search which fan speed control curve matches with the initial power of the hardware device. The control unit is operable to select the matching fan speed control curve to control a speed of the fan.

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Номер записи: 8
16-02-2012 дата публикации

Adjustable finite impulse response transmitter

Номер: US20120042104A1
Автор: Charles Wang, Karen Tucker
Принадлежит: Advanced Micro Devices Inc

Apparatus and methods are provided for generating output signals representative of bits of serial data. A transmitter comprises a plurality of delay elements, driver circuitry, and bypass logic coupled between the plurality of delay elements and the driver circuitry. The plurality of delay elements delay serialized data, resulting in delayed serialized data, and the driver circuitry generates an output signal representative of a first bit of the delayed serialized data. The bypass logic is configured to selectively bypass one or more delay elements of the plurality of delay elements to provide the first bit of the delayed serialized data to the driver circuitry.

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Номер записи: 9
16-02-2012 дата публикации

Scatter-Gather Intelligent Memory Architecture For Unstructured Streaming Data On Multiprocessor Systems

Номер: US20120042121A1
Автор: Christopher J. Hughes, Daehyun Kim, Partha Kundu, Yen-Kuang Chen
Принадлежит: Individual

A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory access overhead by supporting address calculation, data shuffling, and format conversion.

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Номер записи: 10
16-02-2012 дата публикации

Intelligent cache management

Номер: US20120042123A1
Автор: Curt Kolovson
Принадлежит: Curt Kolovson

An exemplary storage network, storage controller, and methods of operation are disclosed. In one embodiment, a method of managing cache memory in a storage controller comprises receiving, at the storage controller, a cache hint generated by an application executing on a remote processor, wherein the cache hint identifies a memory block managed by the storage controller, and managing a cache memory operation for data associated with the memory block in response to the cache hint received by the storage controller.

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Номер записи: 11
16-02-2012 дата публикации

Information processing apparatus and power supply control circuit

Номер: US20120042187A1
Автор: Daisuke Kawamoto, Takaaki Morimura, Takeshi Endo, Takeshi Masuda, Zhongchao Lv
Принадлежит: Sony Corp

Provided is an information processing apparatus including: a power supply control portion that performs control of a power supply; a detection signal emitting portion that, when a connection of an external power source is detected in an operation stand-by state in which power consumption is suppressed and an operation is on stand-by, emits a detection signal only for a certain time period, in accordance with the detection; and a power supply portion that supplies power to the power supply control portion based on the detection signal emitted by the detection signal emitting portion and also stops the power supply to the power supply control portion after a certain time period elapses from the connection in the operation stand-by state.

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Номер записи: 12
23-02-2012 дата публикации

Power Managers for an Integrated Circuit

Номер: US20120043812A1
Автор: Barry Alan Hoberman, Daniel L. Hillman, Jon Shiell
Принадлежит: Individual

A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.

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Номер записи: 13
23-02-2012 дата публикации

Fail safe adaptive voltage/frequency system

Номер: US20120044005A1
Автор: Chittoor Parthasarathy, Kallol Chatterjee, Nitin Chawla, Promod Kumar
Принадлежит: STMICROELECTRONICS PVT LTD

A system on chip (SoC) has a digital domain. An adaptive voltage/frequency scaling circuit includes a critical path replica circuit with respect to that digital domain. The critical path replica circuit generates a margin signal, and the adaptive voltage scaling circuit responds to the margin signal by decreasing bias voltage (and/or increasing clock frequency) applied to the digital domain of the system on chip so as to recover available margin. A fail-safe timing sensor is included within the digital domain of the system on chip. The timing sensor generates a flag signal when timing criteria within the digital domain are violated. The adaptive voltage scaling circuit responds to the flag signal by increasing the bias voltage (and/or decreasing the clock frequency) applied to the digital domain of the system on chip so as to implement a recovery operation.

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Номер записи: 14
23-02-2012 дата публикации

Semiconductor integrated circuit

Номер: US20120047376A1
Автор: Hiroyuki Nakajima
Принадлежит: Renesas Electronics Corp

In a semiconductor LSI that sequentially performs predetermined processing on data input successively, a host CPU, a plurality of sequencers, and a data engine are connected in a hierarchical manner with the host CPU at top and the data engine at bottom. Each sequencer includes a memory that stores a parameter for execution of the sequencer, a memory controller, a loop counter, a sequence controller, and an interface unit that handles transmission and reception of signals with an external unit of the sequencer. The interface units of the plurality of sequencers have the same specifications.

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Номер записи: 15
01-03-2012 дата публикации

Information processing apparatus and method for environmental analysis

Номер: US20120053885A1
Автор: Kazunori Kato
Принадлежит: Canon Inc

An information processing apparatus counts as a result the number of sheets output by an image forming apparatus with reference to collected job history information and obtains the amount of electric power consumed by the image forming apparatus based on the job history information. When the information processing apparatus generates display data required to display a screen indicating an emission amount of greenhouse effect gases, the information processing apparatus analyzes the number of sheets that is output if a saving setting is applied to a job corresponding to a history included in the job history information. The information processing apparatus generates the display data required to display the screen in such a way as to indicate an emission amount of the greenhouse effect gas obtained based on the analyzed number of sheets.

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Номер записи: 16
01-03-2012 дата публикации

Database Rebalancing in Hybrid Storage Environment

Номер: US20120054248A1
Автор: Abhinay Ravinder Nagpal, Gaurav Mehrotra, Rulesh Felix Rebello, Sandeep Ramesh Patil
Принадлежит: International Business Machines Corp

A method, computer program product, and system for rebalancing database table space in a hybrid storage environment of heterogeneous storage units used by a plurality of users to store associated extents. The storage units are ranked according to various performance characteristics such as IOPS rates and power consumption, and the users are ranked according to various characteristics such as whether they have subscribed to standard or premium storage subscriptions. Upon detection of a change in the relative ranking of the users or the storage units, the stored extents are mapped, characterized as standard or priority extents, and redistributed across the storage units if needed to provide higher ranked storage for priority extents and for higher ranked users.

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Номер записи: 17
01-03-2012 дата публикации

Memory device and operating method thereof

Номер: US20120054419A1
Автор: CHEN Xiu, LIANG Chen
Принадлежит: Via Technologies Inc

The invention provides a memory device. In one embodiment, the memory device comprises a flash memory, a memory, and a controller. The flash memory comprises a plurality of blocks for data storage. The memory stores an address mapping table recording relationships between logical addresses and physical addresses of the blocks therein. The controller divides the address mapping table stored in the memory to a plurality of mapping table units, updates relationships between the logical addresses and the physical addresses stored in the mapping table units, determines whether data access performed to the flash memory fulfills the conditions of a first specific requirement, and when the data access fulfills the conditions of the first requirement, the controller selects a target mapping table unit from the mapping table units, and stores the target mapping table unit and a corresponding time stamp as a mapping table unit data to the flash memory.

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Номер записи: 18
01-03-2012 дата публикации

Multi-Port Interface Circuit and Associated Power Saving Method

Номер: US20120054517A1
Автор: Jin-Chyuan Fuh, Pin-Chieh Huang, Shu-Rung Li
Принадлежит: MStar Semiconductor Inc Taiwan

In one aspect, a multi-port interface circuit applied to a playback apparatus which is able to switch among a plurality of input ports coupled to a plurality of source devices for playing back. Each input port has a receiver, the receiver including a front-end for receiving and processing a data stream from the source device and providing a data enable signal, and further including a content protection circuit for performing content protection according to the data enable signal. Each receiver records data enable information associated with the data enable signal of the data stream in an initial status. When one input port is selected, receivers of the other input ports operate in a power saving mode, the front-end circuits stop receiving the data stream, and the content protection circuit maintains operation according to a regenerated enable signal, which is regenerated according to the data enable information.

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Номер записи: 19
01-03-2012 дата публикации

Electronic device with sleep mode and method for awaking electronic device

Номер: US20120054522A1
Автор: Bo-Ching Lin, Hsien-Chung Shih, Sha-Sha Hu, Yan-Xiang Huang, Yu-Liang Yang
Принадлежит: Hon Hai Precision Industry Co Ltd, Hongfujin Precision Industry Shenzhen Co Ltd

An electronic device with a sleep mode includes a CPU and a monitoring unit. The monitoring unit includes a testing module, a storage module, a comparing module, and a signal generating module. The CPU falls into standby mode when the electronic device is in the sleep mode. When the comparing module determines any one of one or more parameters of a battery which supplies power to the electronic device measured by the testing module is not within a corresponding predetermined range stored in the storage module, the signal generating module generates signals to awake the CPU. The awaked CPU executes protection operation to protect the electronic device. A related method is also provided.

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Номер записи: 20
08-03-2012 дата публикации

Memory Device Having Multiple Power Modes

Номер: US20120057424A1
Автор: Craig E. Hampel, Donald C. Stark, Ely K. Tsern, Richard M. Barth
Принадлежит: Individual

A memory device having a memory core is described. The memory device includes a clock receiver circuit, a first interface to receive a read command, a data interface, and a second interface to receive power mode information. The data interface is separate from the first interface. The second interface is separate from the first interface and the data interface. The memory device has a plurality of power modes, including a first mode in which the clock receiver circuit, first interface, and data interface are turned off; a second mode in which the clock receiver is turned on and the first interface and data interface are turned off; and a third mode in which the clock receiver and first interface are turned on. In the third mode, the data interface is turned on when the first interface receives the command, to output data in response to the command.

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Номер записи: 21
08-03-2012 дата публикации

Method and apparatus for improving computer system performance by isolating system and user data

Номер: US20120059974A1
Автор: Sai Krishna Mylavarapu
Принадлежит: Intel Corp

An apparatus comprising a logic unit to separate system data and user data from host data to be processed by a processor; a first memory to store the system data separated by the logic unit; and a second memory to store the user data separated by the logic unit, wherein the first memory is a non-volatile memory which is physically located closer to the processor than the second memory.

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Номер записи: 22
15-03-2012 дата публикации

Mobile terminal and operation control method thereof

Номер: US20120064948A1
Автор: Jinwook Choi, Jungsu LEE, Seungcheon Baek, Seungwon Lee
Принадлежит: LG ELECTRONICS INC

Disclosed herein is a mobile terminal and an operation control method thereof in which a delay time of the screen lock execution is controlled according to the type of application, thereby improving the inconvenience of a user interface and effectively managing a battery according to an interrupt when required to continuously receive an input from the user or continuously provide visual information to the user. For this purpose, a mobile terminal according to an embodiment of the present disclosure may include an input unit configured to receive a user input; an execution controller configured to execute screen lock if the user input is not received for a predetermined time; and a change controller configured to change the predetermined time based on a type of application.

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Номер записи: 23
15-03-2012 дата публикации

Apparatus, system, and method for managing lifetime of a storage device

Номер: US20120066439A1
Автор: Jeremy Fillingim
Принадлежит: Fusion IO LLC

An apparatus, system, and method are disclosed for managing lifetime for a data storage device. A target module determines a write bandwidth target for a data storage device. An audit module monitors write bandwidth of the data storage device relative to the write bandwidth target. A throttle module adjusts execution of one or more write operations on the data storage device in response to the write bandwidth of the data storage device failing to satisfy the write bandwidth target.

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Номер записи: 24
15-03-2012 дата публикации

Memory Architecture with Policy Based Data Storage

Номер: US20120066473A1
Автор: Robert B. Tremaine, Robert W. Wisniewski
Принадлежит: International Business Machines Corp

A computing system and methods for memory management are presented. A memory or an I/O controller receives a write request where the data two be written is associated with an address. Hint information may be associated with the address and may relate to memory characteristics such as an historical, O/S direction, data priority, job priority, job importance, job category, memory type, I/O sender ID, latency, power, write cost, or read cost components. The memory controller may interrogate the hint information to determine where (e.g., what memory type or class) to store the associated data. Data is therefore efficiently stored within the system. The hint information may also be used to track post-write information and may be interrogated to determine if a data migration should occur and to which new memory type or class the data should be moved.

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Номер записи: 25
15-03-2012 дата публикации

Apparatus for detecting presence or absence of oscillation of clock signal

Номер: US20120066557A1
Автор: Kimiharu Eto
Принадлежит: Renesas Electronics Corp

A semiconductor apparatus includes an arithmetic circuit that executes a program based on an operating clock signal input through a clock transfer node, an internal oscillator that generates an internal clock signal to be used internally, a watch dog timer that counts the internal clock signal, detect that a count value reaches a predetermined value of an execution time of the program in the arithmetic circuit and output a notification signal, and a clock monitor circuit that detects presence or absence of the operating clock signal in response to the notification signal.

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Номер записи: 26
22-03-2012 дата публикации

Systems and methods for optimizing the configuration of a set of performance scaling algorithms

Номер: US20120071216A1
Автор: Brian J. Salsbery, Norman S. Gargash
Принадлежит: Qualcomm Inc

Systems and methods for optimizing performance scaling algorithms designated for operation on a mobile device are disclosed. A system memory includes program, use case, and results stores in addition to test logic. The program store contains a set of programs defined by the combination of a performance scaling algorithm and a set of parameters. The use case store contains information that identifies expected tasks to be performed by end users of the mobile device over time. The results store organizes a respective merit value determined after each of the set of programs has been executed for tasks defined by each use case. When executed, the test logic adjusts the mobile device and associates a select program for each of the use cases in response to the stored merit values. The merit values are determined as a function of a performance metric and a power metric.

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Номер записи: 27
22-03-2012 дата публикации

Different types of memory integrated in one chip by using a novel protocol

Номер: US20120072647A1
Автор: Fu-Chang Hsu, Peter Wung Lee
Принадлежит: Aplus Flash Technology Inc

A semiconductor chip contains four different memory types, EEPROM, NAND Flash, NOR Flash and SRAM, and a plurality of major serial/parallel interfaces such as I 2 C, SPI, SDI and SQI in one memory chip. The memory chip features write-while-write and read-while-write operations as well as read-while-transfer and write-while-transfer operations. The memory chip provides for eight pins of which two are for power and up to four pins have no connection for specific interfaces and uses a novel unified nonvolatile memory design that allow the integration together of the aforementioned memory types integrated together into the same semiconductor memory chip.

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Номер записи: 28
29-03-2012 дата публикации

Cache with Multiple Access Pipelines

Номер: US20120079204A1
Автор: Abhijeet Ashok Chachad, Jonathan (Son) Hung Tran, Raguram Damodaran, Sanjive Agarwala, Timothy David Anderson
Принадлежит: Texas Instruments Inc

Parallel pipelines are used to access a shared memory. The shared memory is accessed via a first pipeline by a processor to access cached data from the shared memory. The shared memory is accessed via a second pipeline by a memory access unit to access the shared memory. A first set of tags is maintained for use by the first pipeline to control access to the cache memory, while a second set of tags is maintained for use by the second pipeline to access the shared memory. Arbitrating for access to the cache memory for a transaction request in the first pipeline and for a transaction request in the second pipeline is performed after each pipeline has checked its respective set of tags.

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Номер записи: 29
29-03-2012 дата публикации

Application migration and power consumption optimization in partitioned computer system

Номер: US20120079227A1
Автор: Tomohiko Suzuki
Принадлежит: Individual

A storage device including a migration source logical volume of an application copies data stored in the logical volume into a migration destination logical volume of the application. After the copy process is started, the storage device stores data written into the migration source logical volume as differential data without storing the data into the migration source logical volume. When the copy process is completed for the data stored in the migration source logical volume, a management computer starts copying of the differential data, and in a time interval after the copying of the data stored in the migration source logical volume is completed but before the copying of the differential data is completed, a computer being a migration destination of the application is turned ON, thereby reducing power consumption at the time of application migration.

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Номер записи: 30
29-03-2012 дата публикации

Scalable and programmable processor comprising multiple cooperating processor units

Номер: US20120079236A1
Автор: Adriaan J. De Lind Van Wijngaarden, Dusan Suvakovic, Man Fai LAU
Принадлежит: Alcatel Lucent USA Inc

A processor comprises a plurality of processor units arranged to operate concurrently and in cooperation with one another, and control logic configured to direct the operation of the processor units. At least a given one of the processor units comprises a memory, an arithmetic engine and a switch fabric. The switch fabric provides controllable connectivity between the memory, the arithmetic engine and input and output ports of the given processor unit, and has control inputs driven by corresponding outputs of the control logic. In an illustrative embodiment, the processor units may be configured to perform computations associated with a key equation solver in a Reed-Solomon (RS) decoder or other type of forward error correction (FEC) decoder.

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Номер записи: 31
29-03-2012 дата публикации

Providing per core voltage and frequency control

Номер: US20120079290A1
Автор: Christopher Houghton, David A. Biermann, Hang Nguyen, Pankaj Kumar
Принадлежит: Intel Corp

In one embodiment, the present invention includes a processor having a plurality of cores and a control logic to control provision of a voltage/frequency to a first core of the plurality of cores independently of provision of a voltage/frequency to at least a second core of the plurality of cores. In some embodiments, the voltages may be provided from one or more internal voltage regulators of the processor. Other embodiments are described and claimed.

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Номер записи: 32
29-03-2012 дата публикации

Energy efficient heterogeneous systems

Номер: US20120079298A1
Автор: Abhinandan Majumdar, Srihari Cadambi, Srimat Chakradhar
Принадлежит: NEC Laboratories America Inc

Low-power systems and methods are disclosed for executing an application software on a general purpose processor and a plurality of accelerators with a runtime controller. The runtime controller splits a workload across the processor and the accelerators to minimize energy. The system includes building one or more performance models in an application-agnostic manner; and monitoring system performance in real-time and adjusting the workload splitting to minimize energy while conforming to a target quality of service (QoS).

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Номер записи: 33
05-04-2012 дата публикации

Automatic replication of virtual machines

Номер: US20120084414A1
Автор: Ronald Leaton Skeoch, Scott L. Brock, Sumit Kumar Bose
Принадлежит: Unisys Corp

Systems and methods are disclosed herein to automatically replicate virtual machine image (VM) files on secondary VM computing devices, from a primary VM computing device. The secondary VM computing devices are automatically selected by constantly reviewing the operating parameter values (e.g., cost of resources, power consumption, etc.) of a number of secondary VM computing devices available of storing VM image replicas. The replica of the primary VM image is stored in the secondary VM computing devices in geographically disparate cloud locations. The primary VM image is automatically broken into constituent data blocks stored in an active index, which is compared against a stale index of data blocks. When an update is detected in the primary VM image, the comparison of indices will indicate that there is new data. Only the new data is used to update the secondary VM images, thereby reducing network traffic and latency issues.

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Номер записи: 34
05-04-2012 дата публикации

Dynamically adjusting pipelined data paths for improved power management

Номер: US20120084540A1
Автор: Pascal A. Nsame, Sebastian T. Ventrone, Susan K. Lichtensteiger
Принадлежит: International Business Machines Corp

A design structure embodied in a machine readable, non-transitory storage medium used in a design process includes a system for dynamically varying the pipeline depth of a computing device. The system includes a state machine that determines an optimum length of a pipeline architecture based on a processing function to be performed. A pipeline sequence controller, responsive to the state machine, varies the depth of the pipeline based on the optimum length. A plurality of clock splitter elements, each associated with a corresponding plurality of latch stages in the pipeline architecture, are coupled to the pipeline sequence controller and adapted to operate in a functional mode, one or more clock gating modes, and a pass-through flush mode. For each of the clock splitter elements operating in the pass-through flush mode, data is passed through the associated latch stage without oscillation of clock signals associated therewith.

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Номер записи: 35
05-04-2012 дата публикации

Information processing apparatus and power supply control method

Номер: US20120084576A1
Автор: Kazuhiro Yoshioka, Tooru MAMATA
Принадлежит: Toshiba Corp

According to one embodiment, an information processing apparatus includes: an optical disk apparatus; a receiver which receives a command indicating that a tray provided in the optical disc apparatus is ejected; a power supply module which supplies electric-power to each of modules of the information processing apparatus; and a power supply controller which controls supply of electric-power to each of the modules from the power supply module. When the supply of electric-power to each of the modules is stopped, the power supply controller continues the supply of electric-power to the optical disc apparatus during a certain time. When the power supply controller receives the command within the certain time, the power supply controller ejects the tray and stops the supply of electric-power to the optical disc apparatus.

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Номер записи: 36
05-04-2012 дата публикации

Power Budget Allocation in Multi-Processor Systems

Номер: US20120084580A1
Автор: Anshul Gandhi, Jeffrey Kephart, Mor Harchol-Balter, Rajarshi Das
Принадлежит: CARNEGIE MELLON UNIVERSITY, International Business Machines Corp

Systems, apparatuses, methods, and software that implement power budget allocation optimization algorithms in multi-processor systems, such as server farms. The algorithms are derived from a queuing theoretic model that minimizes the mean response time of the system to the jobs in the workload while accounting for a variety of factors. These factors include, but are not necessarily limited to, the type of power (frequency) scaling mechanism(s) available within the processors in the system, the power-to-frequency relationship(s) of the processors for the scaling mechanism(s) available, whether or not the system is an open or closed loop system, the arrival rate of jobs incoming into the system, the number of jobs within the system, and the type of workload being processed.

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Номер записи: 37
05-04-2012 дата публикации

Implementing sleep lines in commodity ethernet hardware

Номер: US20120084590A1
Автор: Brian Mckean, Ross E. Zwisler
Принадлежит: LSI Corp

A first Network Interface Controller operates in a low power mode. The first Network Interface Controller transitions from low power mode to a power-up sequence if a sleep packet in not received from a second Network Interface Controller at the first Network Interface Controller within a predetermined time threshold.

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Номер записи: 38
12-04-2012 дата публикации

Context-based adaptations of video decoder

Номер: US20120087415A1
Автор: Khosro M. Rabii
Принадлежит: Qualcomm Inc

A receive device receives video data in the form of an encoded video bit stream. A video decoder of the receive device identifies a portion of the video data corresponding to a first scene and determines a complexity for this first scene and also determines a quality of service for the receive device. If the complexity of the first portion of video data is greater than a complexity threshold value or the quality of service is less than a quality of service threshold value, then the video decoder uses a hardware accelerator to decode the portion of video data. If, however, the complexity of the portion of video data is less than the complexity threshold value and the quality of service is greater than the quality of service threshold value, then the video decoder may use software decoding to decode the portion of video data.

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Номер записи: 39
12-04-2012 дата публикации

Distributed processing system, operation device, operation control device, operation control method, method of calculating completion probability of operation task, and program

Номер: US20120089430A1
Автор: Atsushi Okamori, Masakazu Ukita, Masanobu Katagi, Shiho Moriai
Принадлежит: Sony Corp

A distributed processing system includes a plurality of operation devices that perform an operation using power derived from natural energy; and an operation control device that includes a task assigning unit that assigns the same operation task to the plurality of operation devices, and an operation control unit that controls the plurality of operation devices to perform the operation task assigned by the task assigning unit.

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Номер записи: 40
12-04-2012 дата публикации

Method of adjusting transfer speed after initialization of SATA interface

Номер: US20120089755A1
Автор: Hsieh-Huan Yen, Huei-Chiang Shiu, Teng-Chuan Hsieh
Принадлежит: Individual

In a method of adjusting transfer speed after initialization of a SATA interface, a SATA link device transmits a first predetermined primitive to a SATA link partner for requesting to change a first transfer speed of the SATA link device from a first speed to a second speed, the SATA link partner replies to the SATA link device with a second predetermined primitive according to the first predetermined primitive, and the SATA link device and the SATA link partner respectively adjust the first transfer speed of the SATA link device and a second transfer speed of the SATA link partner according to the second predetermined primitive.

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Номер записи: 41
12-04-2012 дата публикации

Energy optimization techniques in a computing system

Номер: US20120089852A1
Автор: Kalyan Muthukumar, Mukesh Gangadhar, Raghavendra S. Hebbalalu, Rama Kishan V. Malladi, Seshadri Harinarayanan
Принадлежит: Intel Corp

A computing platform may include components to determine performance loss values and energy savings values for each of the plurality of regions and/or the memory boundedness value of each of a plurality of regions within an application. The computing platform may provide a user interface for a user to provide a user input, which provides an indication of an acceptable performance loss. For the provided performance loss value, the frequency values may be determined and the processing element may be operated at the frequency values while processing each of the plurality of regions.

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Номер записи: 42
19-04-2012 дата публикации

Method, Apparatus, and System for Energy Efficiency and Energy Conservation Through Dynamic Management of Memory and Input/Output Subsystems

Номер: US20120095607A1
Автор: Avinash N. Ananthakrishnan, Eric C. Samson, Inder Sodhi, Joydeep Ray, Ryan D. Wells
Принадлежит: Ananthakrishnan Avinash N, Inder Sodhi, Joydeep Ray, Samson Eric C, Wells Ryan D

According to one embodiment of the invention, an integrated circuit device comprises an interconnect, at least one compute engine and a control unit. Coupled to the at least one compute engine via the interconnect, the control unit to analyze heuristic information from the at least one compute engine and to increase or decrease a bandwidth of the interconnect based on the heuristic information.

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Номер записи: 43
19-04-2012 дата публикации

Management of a USB Host Device

Номер: US20120096197A1
Автор: Nathalie Ballot
Принадлежит: Individual

A host device is managed that communicates with a peripheral device via an interface on the basis of a high frequency clock; the host device is in a suspended state in which the high frequency clock is deactivated. At the host device, an activation state of the peripheral device is detected ( 21 ) on the interface. Then the duration of a period of time (T 1 ) since the detection of the activation state is counted, on the basis of a low frequency clock. Then this activation state is maintained on the interface ( 23 ) by means of hardware before the period of time expires.

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Номер записи: 44
19-04-2012 дата публикации

Storage apparatus and power control method

Номер: US20120096289A1
Автор: Hajime Mori, Hiroshi Hirayama, Norihiko Kawakami
Принадлежит: HITACHI LTD

To enable power saving control by putting storage areas of the same attribute together in a specific RAID group in a storage apparatus that includes storage areas of different access patterns. The storage apparatus manages attributes of the RAID groups, which form a pool area, and attributes of the respective storage areas, based on an access log for each of the storage areas allocated to virtual volumes. The apparatus enables a power saving operation for each RAID group by putting the storage areas of each attribute together in a specific RAID group.

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Номер записи: 45
26-04-2012 дата публикации

Resilient Integrated Circuit Architecture

Номер: US20120098565A1
Автор: Brian A. Box, Charles A. Furciniti, Enno Wein, Jaime C. Cummins, John L. Watson, Robert Plunkett, Stephen L. Wasson, Steven Hennick Kelem
Принадлежит: Element CXI LLC

The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. In response to detection of a fault or failure, the state machine element re-assigns the first configuration to another composite circuit element and creates a second data link for performance of the same function. The assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation.

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Номер записи: 46
26-04-2012 дата публикации

Transitioning from mimo to siso to save power

Номер: US20120099497A1
Автор: Harish Vaidya, Manoj Raveendranath Kamath, Rakesh Raman
Принадлежит: Broadcom Corp

Various example embodiments are disclosed. According to an example embodiment, an apparatus may include at least one processor and at least one memory. The at least one memory may include computer-executable code that, when executed by the processor, is configured to cause the apparatus to send a message to a node in wireless communication with the apparatus, the message indicating a transition by the apparatus from multiple-input multiple-output (MIMO) to single-input single-output (SISO), and transition from wireless MIMO communication with the node to wireless SISO communication with the node after sending the message to the node.

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Номер записи: 47
26-04-2012 дата публикации

Managing data delivery based on device state

Номер: US20120102139A1
Автор: Anh P. Tran, John Mark Miller, Lloyd Alfred Moore, Steven Oliver Elliott
Принадлежит: Microsoft Corp

Managing power-consuming resources on a first computing device by adjusting data delivery from a plurality of second computing devices based on a state of the first computing device. The state of the first computing device is provided to the second computing devices to alter the data delivery. In some embodiments, the first computing device provides the second computing devices with actions or commands relating to data delivery based on the device state. For example, the second computing devices are instructed to store the data, forward the data, forward only high priority data, or perform other actions. Managing the data delivery from the second computing devices preserves battery life of the first computing device.

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Номер записи: 48
26-04-2012 дата публикации

Disabling outbound drivers for a last memory buffer on a memory channel

Номер: US20120102256A1
Автор: Dennis W. Brzezinski, Pete D. Vogt, Warren R. Morrow
Принадлежит: Individual

Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory device or interface, and a fail-over circuit coupled between the plurality of bit lanes and the memory device or interface.

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Номер записи: 49
26-04-2012 дата публикации

Stall propagation in a processing system with interspersed processors and communicaton elements

Номер: US20120102299A1
Автор: Craig M. Chase, David A. Gibson, Michael B. Doerr, William H. Hallidy
Принадлежит: Individual

A processing system includes processors and dynamically configurable communication elements (DCCs) coupled together in an interspersed arrangement. A source device may transfer a data item through an intermediate subset of the DCCs to a destination device. The source and destination devices may each correspond to different processors, DCCs, or input/output devices, or mixed combinations of these. In response to detecting a stall after the source device begins transfer of the data item to the destination device and prior to receipt of all of the data item at the destination device, a stalling device is operable to propagate stalling information through one or more of the intermediate subset towards the source device. In response to receiving the stalling information, at least one of the intermediate subset is operable to buffer all or part of the data item.

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Номер записи: 50
03-05-2012 дата публикации

Image formation apparatus and image formation system using the same

Номер: US20120105887A1
Автор: Fumihito OSAKI
Принадлежит: Oki Data Corp

An image formation apparatus configured to execute print processing, includes an information storage configured to store print-limit information and notification-destination information set for each user. The print-limit information includes at least one of a print condition and a limit on a printable amount. A user-information acquisition unit is configured to acquire print-instructing-user information, which is information on a print-instructing user instructing a print-executing user to execute printing. An information-acquisition unit is configured to acquire, from the information storage, the print-limit information and the notification-destination information corresponding to the print-instructing-user information acquired by the user-information acquisition unit, and a notification unit is configured to notify the print-instructing user of a result of print control by the print controller, based on the notification-destination information acquired by the information-acquisition unit.

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Номер записи: 51
03-05-2012 дата публикации

Electric energy consumption control system, electric energy consumption control method, and storage medium storing control program therefor

Номер: US20120105899A1
Автор: Tomohiro Tachikawa
Принадлежит: Canon Inc

An electric energy consumption control system that is capable of maximizing convenience to users while controlling the system so that the electric energy consumption of the entire system in a period falls within a target electric energy. An electrical apparatus transmits electric energy consumption of a job with a user name to a control apparatus through the network. A restrictive period setting unit of the control apparatus starts a restrictive period when the electric energy consumption of the entire system is beyond a restriction starting value, and finishes it when the electric energy consumption of the entire system is below a restriction release value. A job restriction unit restricts the job of the user concerned when the accumulated electric energy consumption of the user is beyond the reference value in the restrictive period.

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Номер записи: 52
03-05-2012 дата публикации

Motherboard

Номер: US20120106097A1
Автор: Ming-Chih Hsieh
Принадлежит: Hon Hai Precision Industry Co Ltd

A motherboard includes a power circuit, a system power supply, and a central processor unit (CPU). The power circuit includes a direct current (DC) voltage input terminal. A first control circuit receives a direct current (DC) voltage through the DC voltage input terminal and outputs a first control signal. A second control circuit receives the first control signal and outputs a second control signal to the CPU and output a third control signal. A switching circuit includes a number of switches. The second control signal controls the corresponding switches to be on or off. A voltage converting circuit receives the third control signal and converts the DC voltage from the DC voltage input terminal, and outputs the converted DC voltage to the system power supply. The CPU receives the second control signal and controls the motherboard operation.

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Номер записи: 53
03-05-2012 дата публикации

Application-specific power management

Номер: US20120110360A1
Автор: FAN LI, JIANG LI, Qingwei Lin
Принадлежит: Microsoft Corp

An application-specific power management technique may establish a separate power-down interval for one or more applications based on user interaction with the one or more applications. In some implementations, during use of a particular application, when a management component determines that a period of user inactivity has become greater than or equal to the particular power-down interval established for the particular application, the management component may initiate a power down of one or more components, such as a display.

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Номер записи: 54
03-05-2012 дата публикации

Device For Controlling The Power Supply Of A Computer

Номер: US20120110361A1
Автор: Nicolas Marchand, Sylvain Durand
Принадлежит: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE CNRS, Institut National de Recherche en Informatique et en Automatique INRIA

The invention relates to a device for controlling a computer ( 4 ) capable of being powered with a plurality of voltage levels, including a controller ( 2 ) arranged so as to receive charge data (Ci), deadline data (Ni), and instantaneous speed data (w) for said computer ( 4 ), in order to calculate a reference speed that enables said computer to nm an amount of calculations drawn from the charge data (Ci) in a period drawn from the deadline data (Ni), and to calculate a control voltage level (V_lvl ) and operating frequency (f_op) for said computer from said reference speed. At least one element from among the reference speed and the operating frequency (f_op) is calculated using the instantaneous speed data (w).

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Номер записи: 55
10-05-2012 дата публикации

Low power dual processor architecture for multi mode devices

Номер: US20120115456A1
Автор: Albert S. Ludwin, Ranganathan Krishnan, William R. Gardner
Принадлежит: Qualcomm Inc

A mobile computing device with multiple modes, for example, wireless communication and personal computing, has an application processor and a communication processor. In the computing mode, the application processor is the master processor. In the communication mode, the application processor is deenergized to conserve battery power, with the communication processor functioning as the master processor by accessing the device's peripheral bus using the memory interface of the communication processor.

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Номер записи: 56
17-05-2012 дата публикации

Dynamic Voltage and Frequency Management

Номер: US20120119777A1
Автор: Vincent R. von Kaenel
Принадлежит: Individual

In one embodiment, an integrated circuit includes a self calibration unit configured to iterate a test on a logic circuit in the integrated circuit at respectively lower supply voltage magnitudes until the test fails. A lowest supply voltage magnitude at which the test passes is used to generate a requested supply voltage magnitude for the integrated circuit. In an embodiment, an integrated circuit includes a series connection of logic gates physically distributed over an area of the integrated circuit, and a measurement unit configured to launch a logical transition into the series and detect a corresponding transition at the output of the series. The amount of time between the launch and the detection is used to request a supply voltage magnitude for the integrated circuit.

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Номер записи: 57
17-05-2012 дата публикации

Semiconductor memory device and method of controlling the same

Номер: US20120120739A1
Автор: Koichi Nishimura, Kotoku Sato, Shinya Fujioka, Tomohiro Kawakubo
Принадлежит: Fujitsu Semiconductor Ltd

An internal voltage generator when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator consumes a predetermined amount of the power. In response to a control signal from the exterior, an entry circuit inactivates the internal voltage generator. When the internal voltage generator is inactivated, the internal voltage is not generated, thereby reducing the power consumption. By the control signal from the exterior, therefore, a chip can easily enter a low power consumption mode. The internal voltage generator is exemplified by a booster for generating the boost voltage of a word line connected with memory cells, a substrate voltage generator for generating a substrate voltage, or a precharging voltage generator for generating the precharging voltage of bit lines to be connected with the memory cells.

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Номер записи: 58
17-05-2012 дата публикации

Conversion of a single-wire bus communication protocol

Номер: US20120124258A1
Автор: Francois Tailliet
Принадлежит: STMICROELECTRONICS ROUSSET SAS

A method of transmission-reception over a serial bus placed, when idle, in a first state at a first voltage, including: a transmit circuit capable of coding a transmission according to a first protocol in which the respective states of the bits are conditioned by time periods of fixed levels, indifferently in the first state or in a second state at a second voltage smaller than the first one; a receive circuit capable of interpreting a communication according to the first protocol; and a protocol converter, interposed between the bus and the transmit and receive circuits, to convert the signals to be transmitted to a second protocol in which the respective states of the bits are conditioned by respective time periods of fixed levels in the first state, and to convert the received signals from the second protocol to the first protocol.

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Номер записи: 59
24-05-2012 дата публикации

Input command

Номер: US20120131229A1
Автор: John Briden, John McCarthy
Принадлежит: Hewlett Packard Development Co LP

A method for detecting an input command including configuring a sensor to determine whether a user is within a proximity of a computing machine, configuring an input device to detect an input command entered by the user when the user is within the proximity of the computing machine, and transmitting the input command for the computing machine to process.

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Номер записи: 60
31-05-2012 дата публикации

Memory Modules and Devices Supporting Configurable Core Organizations

Номер: US20120134084A1
Автор: Craig E. Hampel, Donald C. Stark, Ely K. Tsern, Frederick A. Ware, Richard E. Perego
Принадлежит: RAMBUS INC

Described are memory apparatus organized in memory subsections and including configurable routing to support multiple data-width configurations. Relatively narrow width configurations load fewer sense amplifiers, resulting in reduced power usage for relatively narrow memory configurations. Also described are memory controllers that convey width selection information to configurable memory apparatus and support point-to-point data interfaces for multiple width configurations.

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Номер записи: 61
31-05-2012 дата публикации

Dma (direct memory access) coalescing

Номер: US20120137029A9
Автор: Chih-Fan Hsin, Jr-Shian Tsai, Tsung-Yuan C. Tai
Принадлежит: Individual

In general, in one aspect, a method includes determining a repeated, periodic DMA (Direct Memory Access) coalescing interval based, at least in part, on a power sleep state of a host platform. The method also includes buffering data received at the device in a FIFO (First-In-First-Out) queue during the interval and DMA-ing the data enqueued in the FIFO to a memory external to the device after expiration of the repeated, periodic DMA coalescing interval.

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Номер записи: 62
31-05-2012 дата публикации

Electronic systems supporting multiple operation modes and opearation methods thereof

Номер: US20120137038A1
Автор: Chung-Ching Huang, Donna Lim, Yeh Cho
Принадлежит: Via Technologies Inc

Electronic systems supporting multiple operation modes are provided, wherein the electronic system includes a portable device and a docking system. The portable device at least includes one processing unit and a first operation module, wherein the processing unit includes a plurality of operation frequencies and is operable in a plurality of operation modes, and each operation mode corresponds to an operation frequency. The docking system includes a container for containing the portable device and a second operation module. When the portable device is plugged into the container of the docking system, the portable device receives a signal from the docking system, determines an operation mode of the portable device according to the received signal, adjusts the operation frequency of the processing unit corresponding to the operation mode and selectively applies the first modules or second modules to control the electronic system.

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Номер записи: 63
07-06-2012 дата публикации

Controlling runtime execution from a host to conserve resources

Номер: US20120139929A1
Автор: Akhilesh Kaza, Alan C.T. Liu, Gunjan A. Shah, Jonathan D. Sheller, Nimesh I. Amin, Randal J. Ramig, Shawn T. Oster
Принадлежит: Microsoft Corp

A runtime management system is described herein that allows a hosting layer to dynamically control an underlying runtime to selectively turn on and off various subsystems of the runtime to save power and extend battery life of devices on which the system operates. The hosting layer has information about usage of the runtime that is not available within the runtime, and can do a more effective job of disabling parts of the runtime that will not be needed without negatively affecting application performance or device responsiveness. The runtime management system includes a protocol of communication between arbitrary hosts and underlying platforms to expose a set of options to allow the host to selectively turn parts of a runtime on and off depending on varying environmental pressures. Thus, the runtime management system provides more effective use of potentially scarce power resources available on mobile platforms.

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Номер записи: 64
07-06-2012 дата публикации

Data transmission apparatus, printer, information processing apparatus, and control method therefor

Номер: US20120140286A1
Автор: Koichi Ueda
Принадлежит: Canon Inc

To reduce power consumption, a data transmission apparatus comprises: a memory; a timing instruction unit which indicates a start timing of outputting data from the memory; a first interface which outputs data stored in the memory according to the timing instruction unit; a second interface which transfers the data from the first interface to a buffer; and a control unit which issues a command to perform transition of the first interface and the second interface to a power saving state based on the data output start timing indicated by the timing instruction unit, and a sum of a time required to perform transition of the first interface and the second interface to the power saving state and a time required to return from the power saving state.

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Номер записи: 65
07-06-2012 дата публикации

Monitoring processes in a computer

Номер: US20120144028A1
Автор: Andrew Hawkins, Geoff Collins, Mark Blackburn
Принадлежит: 1E Ltd

A monitoring program is run on a computer to identify a process running on the computer, and, for the identified process, determine whether or not one or more predetermined characteristics of the process complies with respective reference characteristics. This allows the program to automatically distinguish whether the process is likely to be a productive process or a non-productive process. For each characteristic a certainty value is incremented or decremented depending on whether the characteristic complies with the reference characteristic. Examples of characteristics are the time pattern of running of a process and the use of hardware resources by the process. Other characteristics include receiving input from a user and connections to known IP addresses. The monitoring process may be used to control power consumption to detect and run non-productive processes in a low power state.

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Номер записи: 66
07-06-2012 дата публикации

Usb hub and power management method thereof

Номер: US20120144213A1
Автор: Chen-Chao Chang, Chih-Chiang Chang, Ling-Sheng Yang
Принадлежит: WISTRON NEWEB CORP

A USB HUB is provided. The USB HUB comprises a wireless communication module, a storage module, a USB interface connected to a host outside of the USB HUB and a HUB controller. The storage module stores a driver program of the wireless communication module. The USB interface transfers data with the host. The HUB controller is coupled to the USB interface, the wireless communication module and the storage module. The HUB controller disables the storage module and enables the wireless communication module when the driver program has been installed in the host.

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Номер записи: 67
07-06-2012 дата публикации

Load step mitigation method and apparatus

Номер: US20120144221A1
Автор: John P. Petry, Kiran Bondalapati, Samuel D. Naffziger
Принадлежит: Advanced Micro Devices Inc

A method and apparatus for load step, or instantaneous current spike, mitigation are provided. In the method and apparatus, load steps are mitigated if a computer system a whole is lightly load, which may be determined by the power consumption of the computer system. Further, load steps are mitigated if a number of processor cores capable of inducing a load step is higher than a threshold. The Advanced Configuration and Power Interface (ACPI) performance state of the cores is used to determine a core's potential for generating a load step. A processor core is instructed to mitigate load steps if conditions are met for the mitigation.

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Номер записи: 68
07-06-2012 дата публикации

Information processing system

Номер: US20120144222A1
Автор: Daisuke Ito
Принадлежит: Canon Inc

An information processing system including a Web server and an information processing apparatus with a Web browser stores information indicative of a power consumed in execution of a function with respect to each of functions, wherein the information processing apparatus sets an upper limit of a power consumed by executing at least any one of the functions, determines whether or not the power consumed by the execution of the function exceeds the power set by a setting unit with respect to each of functions, and performs control such that a function determined as consuming the power beyond the set power is not executed.

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Номер записи: 69
14-06-2012 дата публикации

Human presence detection

Номер: US20120146803A1
Автор: Gavin Michael Gear, Jason Scott, Kevin Phillip Paulson, Milos Petrbok, Nikhil Subramanian
Принадлежит: Microsoft Corp

Methods and a computing device are disclosed. A computing device may aggregate a number of inputs indicative of a presence or an absence of a human being within a proximity of the computing device. A source of at least one of the inputs may be a human presence sensor. A source of other inputs may provide an indication of the presence of a human being with corresponding estimated probabilities or corresponding estimated reliabilities which may provide an estimate of an accuracy of respective indications. In some embodiments, if any of the number of inputs indicate the presence of a human being, the computing device may determine that a human being is present. In other embodiments, if a corresponding estimated probability or reliability of an input is less than a predetermined value, then the input may be discarded when determining whether a human being is present.

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Номер записи: 70
14-06-2012 дата публикации

Low Energy Mobile Information Delivery

Номер: US20120151055A1
Автор: Aman Kansal, Dimitrios Lymperopoulos, Jie Liu
Принадлежит: Microsoft Corp

The subject disclosure is directed towards delivering information to mobile devices in an energy and bandwidth efficient manner by sending information only when the device user is likely to use the information. The information is delivered proactively based on user attention being paid to the device or the user's anticipated attention, corresponding to sensed state data and other state data. Also described is a proxy that interfaces with legacy information servers or the like, such as to emulate the mobile device, so that information delivery from such sources can be deferred until needed by the user. Device energy is conserved and user disruptions reduced by computing an inference as to when the user is likely to be interested in the communicated information, and downloading based upon the inference.

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Номер записи: 71
14-06-2012 дата публикации

Cache Line Fetching and Fetch Ahead Control Using Post Modification Information

Номер: US20120151150A1
Автор: Alexander Rabinovitch, Leonid Dubrovin
Принадлежит: LSI Corp

A method is provided for performing cache line fetching and/or cache fetch ahead in a processing system including at least one processor core and at least one data cache operatively coupled with the processor. The method includes the steps of: retrieving post modification information from the processor core and a memory address corresponding thereto; and the processing system performing, as a function of the post modification information and the memory address retrieved from the processor core, cache line fetching and/or cache fetch ahead control in the processing system.

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Номер записи: 72
14-06-2012 дата публикации

Apparatus and method for adaptive back bias control of an integrated circuit

Номер: US20120151227A1
Автор: Darius D. Gaskins
Принадлежит: Via Technologies Inc

An apparatus includes an adaptive bias generator and a state processor. The adaptive bias generator is disposed on the integrated circuit, and is configured to generate a variable bias voltage according to a value received over a bias bus, where the variable bias voltage is applied to the substrate. The state processor is coupled to the adaptive bias generator, and is configured to receive one or more power management states, and is configured to provide the value over the bias bus, where the value is a function of the one or more power management states.

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Номер записи: 73
14-06-2012 дата публикации

Electronic device and power management method thereof

Номер: US20120151237A1
Автор: Chao-Jui Huang
Принадлежит: Hon Hai Precision Industry Co Ltd

A method for managing power of an electronic device receives a power signal of a peripheral device of the electronic device, determines if a data signal of the peripheral device is received at a preset time interval, and sends a time record command to a timer of the electronic device if the data signal is not received to obtain a recorded time of the electronic device. The method further displays an idle status of the peripheral device if the recorded time is greater than a first preset value, and stops supplying power to the peripheral device if the recorded time is greater than a second preset value.

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Номер записи: 74
14-06-2012 дата публикации

Power-Saving Device for Universal Serial Bus Modem Apparatus and Method Thereof

Номер: US20120151239A1
Автор: Wei Wang
Принадлежит: ZTE Corp

A power-saving apparatus for universal serial bus (USB) modem equipment is disclosed in the present invention, which includes: a personal computer and USB Modem equipment. Accordingly, a power-saving method for USB Modem equipment is provided in the present invention, which includes: regularly detecting whether selective suspending is allowed, if not allowed, processing a received request from an application program, and if allowed, transmitting an instruction for entering the selective suspending state to the USB Modem equipment; after receiving the instruction for entering the selective suspending state, the USB Modem equipment entering the selective suspending state. Thus, the present invention can realize that the USB Modem equipment enters the power-saving state in the idle period and resumes the work state when receiving a service request.

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Номер записи: 75
14-06-2012 дата публикации

System and method for maintaining a data redundancy scheme in a solid state memory in the event of a power loss

Номер: US20120151253A1
Автор: Robert L. Horn
Принадлежит: Western Digital Technologies Inc

Embodiments of the invention are directed to systems and methods for reducing an amount of backup power needed to provide power fail safe preservation of a data redundancy scheme such as RAID that is implemented in solid state storage devices where new write data is accumulated and written along with parity data. Because new write data cannot be guaranteed to arrive in integer multiples of stripe size, a full stripe's worth of new write data may not exist when power is lost. Various embodiments use truncated RAID stripes (fewer storage elements per stripe) to save cached write data when a power failure occurs. This approach allows the system to maintain RAID parity data protection in a power fail cache flush case even though a full stripe of write data may not exist, thereby reducing the amount of backup power needed to maintain parity protection in the event of power loss.

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Номер записи: 76
21-06-2012 дата публикации

Element Controller for a Resilient Integrated Circuit Architecture

Номер: US20120153989A1
Автор: Brian A. Box, Steven Hennick Kelem
Принадлежит: Element CXI LLC

The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of communication elements. Each composite circuit element comprises an element controller, an element interface and a selected circuit element which may vary by element type, and which may be configurable. The state machine element assigns various functions based on element type, such as assigning a first configuration to a first element type, assigning a second configuration to a second element type, and providing a first data link for the corresponding assignments. The element controller controls the execution of data operations by the circuit element. Function assignment, routing, fault detection, and re-assignment and data re-routing can occur in real time for a wide variety of programs and algorithms, providing for the IC to continue the same functioning despite defects which may arise during operation.

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Номер записи: 77
21-06-2012 дата публикации

Personal Energy Management System

Номер: US20120158203A1
Автор: George Feldstein
Принадлежит: Crestron Electronics Inc

Presented is a system for managing energy usage of a user. The system includes a database storing a preferred energy profile associated with the user and a minimum energy profile, an automation control system that controls at least one device associated with the user, a presence detecting apparatus for detecting when the user is present, and a system control computer. The system control computer instructs the automation control system to operate the one device according to the preferred energy profile associated with the user in response to the presence detecting apparatus detecting the presence of the user. The system control computer further instructs the automation control system to operate the one device according to the minimum energy profile in response to the presence detecting apparatus detecting the absence of the user.

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Номер записи: 78
21-06-2012 дата публикации

Memory Module With Reduced Access Granularity

Номер: US20120159061A1
Автор: Craig E. Hampel, Frederick A. Ware
Принадлежит: RAMBUS INC

A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.

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Номер записи: 79
21-06-2012 дата публикации

Direct Access To Cache Memory

Номер: US20120159082A1
Автор: Eric F. Robinson, Jason A. Cox, Kevin C. Lin, Nadav Levison, Omer Heymann
Принадлежит: International Business Machines Corp

Methods and apparatuses are disclosed for direct access to cache memory. Embodiments include receiving, by a direct access manager that is coupled to a cache controller for a cache memory, a region scope zero command describing a region scope zero operation to be performed on the cache memory; in response to receiving the region scope zero command, generating a direct memory access region scope zero command, the direct memory access region scope zero command having an operation code and an identification of the physical addresses of the cache memory on which the operation is to be performed; sending the direct memory access region scope zero command to the cache controller for the cache memory; and performing, by the cache controller, the direct memory access region scope zero operation in dependence upon the operation code and the identification of the physical addresses of the cache memory.

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Номер записи: 80
21-06-2012 дата публикации

Method and apparatus to configure thermal design power in a microprocessor

Номер: US20120159201A1
Автор: Eric Distefano, Guy M. Therien, II James Hermerding, Jeremy Shrall, Ryan D. Wells, Steven H. Gunther, Tawfik Rahal-Arabi, Vasudevan Srinivasan, Venkatesh Ramani
Принадлежит: Intel Corp

A technique to change a thermal design power (TDP) value. In one embodiment, one or more environmental or user-driven changes may cause a processor's TDP value to be changed. Furthermore, in some embodiments a change in TDP may alter a turbo mode target frequency.

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Номер записи: 81
21-06-2012 дата публикации

Efficient power management and optimized event notification in multi-processor computing devices

Номер: US20120159218A1
Автор: Keyur C. Shah, Uppinder S. BABBAR, Venkata Satish Kumar Vangala
Принадлежит: Qualcomm Inc

Methods and devices for reducing power consumption in a multi-processor computing device include filtering indications from the second processor intended for the first processor while the first processor is in a low power state, so that only selected, such as significant, indications are transmitted. The second processor may be informed when the first processor is in a low power state. Indications generated by the second processor may be compared to indication filtering criteria to determine whether each should be transmitted to the first processor. Those indications satisfying the indication filtering criteria may be sent to the first processor, causing it to return to a normal power state. In mobile computing device the first processor may be an applications processor and the second processor may be a modem. Filtering of indications may be accomplished in the second processor or in a power controller in some implementations.

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Номер записи: 82
21-06-2012 дата публикации

Variable increment real-time status counters

Номер: US20120159502A1
Автор: Moshe E. Matsa, Oleg Levin, Sonjeev Jahagirdar
Принадлежит: International Business Machines Corp

Processes, devices, and articles of manufacture having provisions to monitor and track multi-core Central Processor Unit resource allocation and deallocation in real-time are provided. The allocation and deallocation may be tracked by two counters with the first counter incrementing up or down depending upon the allocation or deallocation at hand, and with the second counter being updated when the first counter value meets or exceeds a threshold value.

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Номер записи: 83
21-06-2012 дата публикации

Task management system, task management method, and program

Номер: US20120159508A1
Автор: Atsushi Okamori, Masakazu Ukita, Masanobu Katagi, Shiho Moriai
Принадлежит: Sony Corp

A task management system includes a capacity information acquisition section which acquires, from a computation device which executes a computation using electrical power derived from renewable energy, capacity information which shows the computation capacity of the computation device which is predicted based on weather information of a region where the computation device is disposed, and a task management section which allocates a computation task to a plurality of the computation devices based on the capacity information which is acquired from the plurality of computation devices using the capacity information acquisition section.

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Номер записи: 84
28-06-2012 дата публикации

Image forming apparatus

Номер: US20120162692A1
Автор: Daisuke Orikasa, Kouichi Nobushima, Tsutomu Kurose, Yuuki AIDA
Принадлежит: Riso Kagaku Corp

An image forming machine transitions into a sleep mode at a preset time of day, and keeps the sleep mode for a prescribed interval. The image forming machine includes an I/O interface, a printer, a memory, and a controller. The interface inputs a print job. The printer executes a printing of the print job. The memory stores therein an entirety or part of the print job overlapping the interval of the sleep mode, as a hold job. The controller works to have the memory store the hold job therein, and to have the printer operate after an end of the interval of the sleep mode to execute a printing of the hold job stored in the memory

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Номер записи: 85
28-06-2012 дата публикации

Power and thermal optimization of processor and cooling

Номер: US20120166015A1
Автор: Casey R. Winkel, Robin A. Steinbrecher, Sandeep Ahuja
Принадлежит: Intel Corp

In some embodiments a processor is adapted to store a relationship of power as a function of temperature and voltage, wherein the stored relationship data is to be used for managing power in a system including the processor. Other embodiments are described and claimed.

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Номер записи: 86
28-06-2012 дата публикации

Method and manager physical machine for virtual machine consolidation

Номер: US20120166644A1
Автор: Che-Lun Hung, Hsiao-Fei Liu, Jui-Hao Chiang, Tzi-cker Chiueh
Принадлежит: Industrial Technology Research Institute ITRI

A method and a manager physical machine (PM) for virtual machine (VM) consolidation are provided. The method is performed by the manager PM. A network connects the manager PM and a plurality of server PMs. A plurality of VMs is running on the server PMs. The method includes the following steps. The manager PM classifies the server PMs into redundant PMs and surviving PMs. The manager PM determines migration paths of the VMs running on the redundant PMs to the surviving PMs. The manager PM determines a parallel migration sequence of the VMs running on the redundant PMs based on the migration paths. The manager PM migrates the VMs running on the redundant PMs to the surviving PMs in parallel according to the parallel migration sequence.

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Номер записи: 87
28-06-2012 дата публикации

Method, apparatus and system to save processor state for efficient transition between processor power states

Номер: US20120166779A1
Автор: Bruce L. Fleming, Harinarayanan Seshadri, Rajeev D. Muralidhar, Vishwesh M. Rudramuni
Принадлежит: Intel Corp

Techniques to provide processor state for implementing a power state transition of a processor. In an embodiment, an operating system executing on a processor detects an opportunity to transition the processor to an idle processor power state. In particular embodiments, the operating system initiates the transition by invoking a task switch, wherein information describing a state of the processor is saved to a task switch segment.

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Номер записи: 88
28-06-2012 дата публикации

Bus-handling

Номер: US20120166826A1
Автор: Victor Flachs
Принадлежит: Nuvoton Technology Corp

A processor, comprising a processing unit having an active state and a sleep state in which at least one of its sub-sections is inactive and a communication port adapted to receive signals from external units over a bus, which is configured to be not fully operative when the processor is in the sleep state. The processor additionally includes a bus monitoring unit configured to stall the bus responsive to identifying transmissions on the bus directed to the communication port, while the processing unit is in the sleep state and to indicate to the communication port that a transmission started while it was in the sleep state.

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Номер записи: 89
28-06-2012 дата публикации

Method and system for managing a storage network to reduce power consumption

Номер: US20120166829A1
Автор: Hiroyuki Miyoshi, Hiroyuki Tanaka, Mitsutoshi Jinno, Yoshihiko Terashita
Принадлежит: International Business Machines Corp

Methods, computer systems, and computer program products are provided for managing a storage network system is provided. The storage network system includes a plurality of zones. Each of the plurality of zones includes at least one storage network device. A link-down event associated with one of the storage network devices is detected. One of the plurality of zones is identified is identified as being unused if the zone is not accessed by another of the storage network devices in another of the plurality of zones and if the zone does not access another of the storage network devices in another of the plurality of zones.

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Номер записи: 90
28-06-2012 дата публикации

Power management in electronic systems

Номер: US20120166844A1
Автор: Bryan C. Morgan, Marlon A. Moncrieffe, Premanand Sakarda, Priya N. Vaidya
Принадлежит: Individual

In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.

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Номер записи: 91
05-07-2012 дата публикации

Wireless mouse

Номер: US20120169599A1
Автор: Chun-Xiao Wu, Yan Li
Принадлежит: Hon Hai Precision Industry Co Ltd, Hongfujin Precision Industry Shenzhen Co Ltd

A wireless mouse includes a case, a mouse circuit received in the case, and a battery control circuit to power the mouse circuit. The battery control circuit includes a battery, a touch switch positioned on the case, and a switch circuit connected to the battery, the touch switch, and the mouse circuit. When the touch switch is touched, the touch switch is turned on, the switch circuit outputs a high level signal to the mouse circuit. When the touch switch is not touched, the touch switch is turned off, the switch circuit outputs a low level signal to the mouse circuit.

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Номер записи: 92
05-07-2012 дата публикации

Mobile device and method for proximity detection verification

Номер: US20120172085A1
Автор: Chris Grivas, Hong Zhao, Sandeep VUPPU
Принадлежит: MOTOROLA MOBILITY LLC

A mobile device includes a touch screen display and touch screen circuit for receiving touch inputs. A camera configured to acquire one or more images in front of the display. A proximity sensor configured to provide an indication that a user is in close proximity to the touch screen display. A processor being effective to determine, in response to the indication of the proximity sensor, whether the user is in a position to view the display based on the one or more images of the camera. If the proximity sensor provides an indication that the user is in close proximity to the display and the processor determines, based on the one or more images, that the user is in a position to view the display, then at least one of the display and the touch screen circuit are not disabled.

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Номер записи: 93
05-07-2012 дата публикации

Method, apparatus, and system for energy efficiency and energy conservation including balancing power among multi-frequency domains of a processor based on efficiency rating scheme

Номер: US20120173895A1
Автор: Jay D. Schwartz, Jeremy Shrall, SeongWoo Kim, Stephen H. Gunther, Travis C. Furrer
Принадлежит: Intel Corp

The efficiency rating (ER) of each domain, in a processor, may be compared and then the power budget may be allocated, effectively, among the domains based on the ERs of the domains. The ER may indicate relative advantage among domains in terms of performance return for a given power budget, i.e., a higher effectiveness may be expected in power utilization if the ER is higher for a domain. The ER of a domain may be defined as (scalability factor/cost factor*alpha). The scalability factor may be defined as a performance increase (in %) brought about by an increase in the clock frequency (in %) provided to the domain. The cost factor may be defined as a power budget value required in bringing about an increase in the clock frequency provided to the domain and alpha is an adjustment factor.

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Номер записи: 94
12-07-2012 дата публикации

Mobile information apparatus and display control method

Номер: US20120176353A1
Автор: Junichi Ishii
Принадлежит: NEC Corp

Multiple displays are arranged such that their display surfaces are arrayed side by side. A measurement section measures orientation information about apparatus orientation. A control section determines the display surface a user is viewing from among multiple displays, based on the orientation information measured by the measurement section. The control section causes the display surface of displays, other than the display surface determined as being viewed by the user, to become darker than the display surface of the display determined as being viewed by the user.

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Номер записи: 95
12-07-2012 дата публикации

Method and system for managing thermal policies of a portable computing device

Номер: US20120179416A1
Автор: Bohuslav Rychlik, Jeffrey A. NIEMANN, Jon James Anderson, Sumit Sur
Принадлежит: Qualcomm Inc

A method and system for managing one or more thermal policies of a portable computing device (PCD) includes monitoring temperature of the portable computing device with internal thermal sensors and external thermal sensors. If a change in temperature has been detected by at least one thermal sensor, then a thermal policy manager may increase a frequency in which temperature readings are detected by the thermal sensors. The thermal policy manager may also determine if a current temperature of the portable computing device as detected by one or more of the thermal sensors falls within one or more predetermined thermal states. Each thermal state may be assigned a unique set of thermal mitigation techniques. Each set of thermal mitigation techniques may be different from one another. The sets of thermal mitigation techniques may differ according to quantity of techniques and impacts on performance of the PCD.

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Номер записи: 96
12-07-2012 дата публикации

Method, apparatus, and system for energy efficiency and energy conservation including autonomous hardware-based deep power down in devices

Номер: US20120179927A1
Автор: Alon Naveh, Doron Rajwan, Eric C. Samson, Inder M. Sodhi, Ryan D. Wells
Принадлежит: Intel Corp

Embodiments of systems, apparatuses, and methods for energy efficiency and energy conservation including enabling autonomous hardware-based deep power down of devices are described. In one embodiment, a system includes a device, a static memory, and a power control unit coupled with the device and the static memory. The system further includes a deep power down logic of the power control unit to monitor a status of the device, and to transfer the device to a deep power down state when the device is idle. In the system, the device consumes less power when in the deep power down state than in the idle state.

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Номер записи: 97
12-07-2012 дата публикации

Optimizing energy use in a data center by workload scheduling and management

Номер: US20120180055A1
Автор: Brad L. Brech, Bret W. Lehman, Murthy V. Devarakonda, Stacey Ramos
Принадлежит: International Business Machines Corp

Techniques are described for scheduling received tasks in a data center in a manner that accounts for operating costs of the data center. Embodiments of the invention generally include comparing cost-saving methods of scheduling a task to the operating parameters of completing a task—e.g., a maximum amount of time allotted to complete a task. If the task can be scheduled to reduce operating costs (e.g., rescheduled to a time when power is cheaper) and still be performed within the operating parameters, then that cost-saving method is used to create a workload plan to implement the task. In another embodiment, several cost-saving methods are compared to determine the most profitable.

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Номер записи: 98
19-07-2012 дата публикации

Automation Device

Номер: US20120181866A1
Автор: Arnold Klamm, Michael Abert, Michael Cyron, Valentin Kort
Принадлежит: SIEMENS AG

An automation device having a plurality of modules, where at least one first module is configured to supply the other modules electrical power and a second module is configured to determine the total power requirement of the automation device, wherein the second module determines the total power requirement from the information relating to the power requirement of the respective module, which information is stored in the other modules, and compares the total power requirement with a threshold value and initiates measures for reducing the power requirement of at least one of the other modules based on the comparison result to prevent an overload due to improper or inappropriate installation of the automation device in a switchgear cabinet and resultant reduced air convection.

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Номер записи: 99
19-07-2012 дата публикации

Mouse

Номер: US20120182219A1
Автор: Mou-Ming Ma, Shui-I Chen, Yen-Bo Lai
Принадлежит: Giga Byte Technology Co Ltd

A mouse, activated by a touch medium, is provided. The mouse includes a mouse body, a sensor, a power source and a mouse circuit. The sensor is disposed on the body, wherein the sensor sends a switch signal according to a distance between the touch medium and the sensor. The mouse circuit is electrically connected to the power source and the sensor, wherein the mouse circuit activates or deactivates the mouse according to the switch signal.

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Номер записи: 100