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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Применить Всего найдено 32. Отображено 30.
09-05-2013 дата публикации

METHOD FOR FORMING RUTHENIUM OXIDE FILM

Номер: US20130115367A1
Принадлежит: TOKYO ELECTRON LIMITED

A method for forming a ruthenium oxide film includes: providing a substrate in a processing chamber; supplying a ruthenium compound having a structure of the following formula (1) in which two β-diketons and two groups selected among olefin, amine, nitril, and carbonyl are coordinate-bonded to Ru in a vapor state onto the substrate; supplying oxygen gas onto the substrate; and forming a ruthenium oxide film on the substrate by reaction between the ruthenium compound gas and the oxygen gas. 2. The method of claim 1 , wherein the oxygen gas is supplied at a flow rate that allows the ruthenium compound to be reduced to metal ruthenium and the reduced metal ruthenium to be oxidized.3. The method of claim 2 , wherein the oxygen gas is supplied such that an oxygen gas partial pressure in the processing chamber becomes about 5 Torr or above.4. The method of claim 2 , wherein the ruthenium compound and the oxygen gas are supplied such that a partial pressure ratio of the oxygen gas to the Ru compound gas in the processing chamber becomes about 20 or above.5. The method of claim 1 , wherein the β-diketons of the ruthenium compound are any one of 2 claim 1 ,4-hexanedione claim 1 , 5-methyl-2 claim 1 ,4-hexanedione claim 1 , 2 claim 1 ,4-heptanedione claim 1 , 5-methyl-2 claim 1 ,4-heptanedione claim 1 , 6-methyl-2 claim 1 ,4-heptanedione claim 1 , and 2 claim 1 ,4-octanedione.8. The method of claim 1 , wherein the ruthenium compound gas and the oxygen gas are simultaneously supplied into the processing chamber.9. The method of claim 1 , wherein the ruthenium compound gas and the oxygen gas are alternately supplied into the processing chamber with a purge process therebetween.10. A storage medium that stores a program for execution on a computer to control a film forming apparatus claim 1 , wherein the program claim 1 , when executed claim 1 , controls the film forming apparatus such that the method of is performed. The present application claims priority under 35 U.S.C. §119 ...

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24-01-2019 дата публикации

THREE-DIMENSIONAL MEMORY DEVICE HAVING ON-PITCH DRAIN SELECT GATE ELECTRODES AND METHOD OF MAKING THE SAME

Номер: US20190027489A1
Принадлежит:

An array of memory stack structures extends through an alternating stack of insulating layers and electrically conductive layers over a substrate. An array of drain select level assemblies including cylindrical electrode portions is formed over the alternating stack with the same periodicity as the array of memory stack structures. A drain select level isolation strip including dielectric materials can be formed between a neighboring pair of drain select level assemblies employing the drain select level assemblies as a self-aligning template. Alternatively, cylindrical electrode portions can be formed around an upper portion of each memory stack structure. Strip electrode portions are formed on the cylindrical electrode portions after formation of the drain select level isolation strip. 120.-. (canceled)21. A method of forming a three-dimensional memory device , comprising:forming an alternating stack of insulating layers and spacer material layers over a substrate, wherein the spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers;forming an array of memory stack structures extending through the alternating stack and arranged as rows that extend along a first horizontal direction and are spaced along a second horizontal direction, wherein each of the memory stack structures comprises a memory film and a memory level channel portion contacting an inner sidewall of the memory film;forming a first dielectric template layer over the alternating stack;forming an array of cylindrical openings through the first dielectric template layer; and depositing and anisotropically etching a gate electrode material layer in the array of cylindrical openings, wherein remaining portions of the gate electrode material layer comprise the plurality of cylindrical electrode portions;forming an array of drain select level assemblies having a same periodicity as the array of memory stack structures along the first horizontal direction and ...

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25-09-2014 дата публикации

RUTHENIUM FILM FORMATION METHOD AND STORAGE MEDIUM

Номер: US20140287585A1
Принадлежит: TOKYO ELECTRON LIMITED

A ruthenium film formation method including: forming a ruthenium oxide film on a substrate; and reducing the ruthenium oxide film into a ruthenium film, wherein the reducing the ruthenium oxide film comprises at least supplying a ruthenium compound gas containing hydrogen as a reducing agent. 1. A ruthenium film formation method , comprising:forming a ruthenium oxide film on a substrate; andreducing the ruthenium oxide film into a ruthenium film,wherein the reducing the ruthenium oxide film comprises at least supplying a ruthenium compound gas containing hydrogen as a reducing agent.2. The method of claim 1 , wherein the forming the ruthenium oxide film comprises forming the ruthenium oxide film by a CVD method using the ruthenium compound gas.4. The method of claim 3 , wherein the forming the ruthenium oxide film is performed by simultaneously supplying the ruthenium compound gas and the oxygen gas.5. The method of claim 3 , wherein the forming the ruthenium oxide film is performed by alternately supplying the ruthenium compound gas and the oxygen gas with purge performed therebetween.6. The method of claim 2 , wherein the ruthenium compound gas containing hydrogen supplied as the reducing agent in the reducing the ruthenium oxide film is the same as the ruthenium compound gas used in forming the ruthenium oxide film.8. The method of claim 1 , wherein the reducing the ruthenium oxide film is performed by supplying the ruthenium compound gas containing hydrogen as a the reducing agent and then supplying a reaction gas for decomposing the ruthenium compound gas containing hydrogen.9. The method of claim 1 , wherein the reducing the ruthenium oxide film is performed by alternately supplying claim 1 , a plurality of times claim 1 , the ruthenium compound gas containing hydrogen as a the reducing agent and a reaction gas for decomposing the ruthenium compound gas containing hydrogen with purge performed therebetween.11. The method of claim 10 , wherein the reducing the ...

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06-08-2020 дата публикации

Three-dimensional memory device with drain-select-level isolation structures and method of making the same

Номер: US20200251488A1
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, and memory pillar structures extending through the alternating stack. Each of the memory pillar structures includes a respective memory film and a respective vertical semiconductor channel Dielectric cores contact an inner sidewall of a respective one of the vertical semiconductor channels. A drain-select-level isolation structure laterally extends along a first horizontal direction and contacts straight sidewalls of the dielectric cores at a respective two-dimensional flat interface. The memory pillar structures may be formed on-pitch as a two-dimensional periodic array, and themay drain-select-level isolation structure may cut through upper portions of the memory pillar structures to minimize areas occupied by the drain-select-level isolation structure. maymay

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01-10-2015 дата публикации

Microwave Heating Method and Microwave Heating Apparatus

Номер: US20150279705A1
Автор: Takaaki IWAI
Принадлежит: Takaaki IWAI, Tokyo Electron Ltd

A microwave heating method includes: heating an object to be treated by irradiation of microwaves onto the object to be treated, the object to be treated having a film to be annealed and a substrate body on which the film to be annealed is formed; and stopping the irradiation of the microwaves, wherein the film to be annealed has a temperature rising rate by the irradiation of the microwaves higher than that of the substrate body. Switching from the heating the object to be treated to the stopping the irradiation of the microwaves is performed, after a temperature T 1 of the film to be annealed reaches a temperature equal to or greater than a target temperature T of the film to be annealed by the irradiation of the microwaves, and before a temperature T 2 of the substrate body reaches a steady state.

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01-10-2020 дата публикации

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING EYE-SHAPED CONTACT VIA STRUCTURES LOCATED IN LATERALLY-UNDULATING TRENCHES AND METHOD OF MAKING THE SAME

Номер: US20200312863A1
Принадлежит:

A three-dimensional memory device includes alternating stacks of insulating layers and electrically conductive layers located over a semiconductor material layer, and memory stack structures extending through one of the alternating stacks. Laterally-undulating backside trenches are present between alternating stacks, and include a laterally alternating sequence of straight trench segments and bulging trench segments. Cavity-containing dielectric fill structures and contact via structures are present in the laterally-undulating backside trenches. The contact via structures are located within the bulging trench segments. The contact via structures are self-aligned to sidewalls of the alternating stacks. Additional contact via structures may vertically extend through a dielectric alternating stack of a subset of the insulating layers and dielectric spacer layers laterally adjoining one of the alternating stacks. 1. A three-dimensional memory device , comprising:alternating stacks of insulating layers and electrically conductive layers located over a semiconductor material layer;a group of memory stack structures extending through a first alternating stack selected from the alternating stacks that is located within a memory array region;laterally-undulating backside trenches located between neighboring pairs of the alternating stacks and laterally extending along a first horizontal direction, wherein each of the laterally-undulating backside trenches comprises a laterally alternating sequence of straight trench segments having a uniform trench width and bulging trench segments having a variable trench width that is greater than the uniform trench width;cavity-containing dielectric fill structures located within a respective one of the laterally-undulating backside trenches, wherein each of the cavity-containing dielectric fill structures comprises vertically-extending cavities within each region of bulging trench segments within the respective one of the laterally- ...

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01-10-2020 дата публикации

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING EYE-SHAPED CONTACT VIA STRUCTURES LOCATED IN LATERALLY-UNDULATING TRENCHES AND METHOD OF MAKING THE SAME

Номер: US20200312864A1
Принадлежит:

A three-dimensional memory device includes alternating stacks of insulating layers and electrically conductive layers located over a semiconductor material layer, and memory stack structures extending through one of the alternating stacks. Laterally-undulating backside trenches are present between alternating stacks, and include a laterally alternating sequence of straight trench segments and bulging trench segments. Cavity-containing dielectric fill structures and contact via structures are present in the laterally-undulating backside trenches. The contact via structures are located within the bulging trench segments. The contact via structures are self-aligned to sidewalls of the alternating stacks. Additional contact via structures may vertically extend through a dielectric alternating stack of a subset of the insulating layers and dielectric spacer layers laterally adjoining one of the alternating stacks. 1. A three-dimensional memory device , comprising:alternating stacks of insulating layers and electrically conductive layers located over a semiconductor material layer;memory stack structures extending through a first alternating stack selected from the alternating stacks;laterally-undulating backside trenches located between neighboring pairs of the alternating stacks and laterally extending along a first horizontal direction;cavity-containing dielectric fill structures located within a respective one of the laterally-undulating backside trenches;first contact via structures located within vertically-extending cavities of the cavity-containing dielectric fill structures and contacting the semiconductor material layer;a dielectric alternating stack of a subset of the insulating layers and dielectric spacer layers laterally adjoining one of the alternating stacks; andlaterally-insulated contact via structures extending through the dielectric alternating stack, wherein each of the laterally-insulated contact via structures comprises a respective tubular ...

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14-11-2019 дата публикации

THREE-DIMENSIONAL MEMORY DEVICE HAVING DOUBLE-WIDTH STAIRCASE REGIONS AND METHODS OF MANUFACTURING THE SAME

Номер: US20190348435A1
Принадлежит:

Memory openings and backside openings are formed through an alternating stack of insulating layers and sacrificial material layers with patterned stepped surfaces and an overlying retro-stepped dielectric material portion. The backside openings may be formed in rows with shape modifications in staircase regions to provide more lateral elongation in areas with lesser layers of the alternating stack. Non-circular horizontal cross-sectional shapes for the backside openings in the staircase regions allow formation of the backside opening with less shape distortion. Memory opening fill structures are formed in the memory openings, and the sacrificial material layers are replaced with electrically conductive layers using the backside openings as conduits for an etchant and for a deposition precursor material. The electrically conductive layers are isotropically recessed around each backside opening to form width-modulated cavities, which is filled with width-modulated insulating wall structures. 1. A three-dimensional memory device , comprising:an alternating stack of insulating layers and electrically conductive strips located over a substrate;a width-modulated insulating wall structure that laterally extends along a first horizontal direction and vertically extends through each layer in the alternating stack; andgroups of memory stack structures extending through the alternating stack,wherein each insulating layer is a continuous perforated insulating layer that laterally extends around pillar structures of the width-modulated insulating wall structure along a second horizontal direction that is perpendicular to the first horizontal direction, and the width-modulated insulating wall structure includes a laterally alternating sequence of bulging regions and neck regions.2. The three-dimensional memory device of claim 1 , further comprising a staircase region in which a first electrically conductive strip within the alternating stack has a greater lateral extent than a ...

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12-11-2020 дата публикации

A three-dimensional memory device having a backside contact via structure with a laterally bulging portion at a level of source contact layer

Номер: US20200357815A1
Принадлежит: SanDisk Technologies LLC

A lower source layer, a sacrificial source-level material layer, and an upper source layer are formed over a substrate. The lower source layer includes a recess trench in which a recessed surface of the lower source layer is vertically recessed relative to a topmost surface of the lower source layer. An alternating stack of insulating layers and spacer material layers is subsequently formed. Memory stack structures are formed through the alternating stack. A backside trench is formed through the alternating stack such that a bottom surface of the backside trench is formed within an area of the recess trench in a thickened portion of the sacrificial source-level material layer. The sacrificial source-level material layer is replaced with a source contact layer.

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07-09-2021 дата публикации

Three-dimensional memory device containing width-modulated connection strips and methods of forming the same

Номер: US11114459B2
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device includes alternating stacks of insulating layers and electrically conductive layers located over a substrate, a first memory array region and a second memory array region that are laterally spaced apart along the first horizontal direction by an inter-array region therebetween, and memory stack structures extending through the alternating stacks in the first or second memory array region. Each of the alternating stacks includes a respective terrace region in which layers of a respective alternating stack have variable lateral extents within an area of the inter-array region, and a respective array interconnection region laterally offset from the respective terrace region and which continuously extends from the first memory array region to the second memory array region. Each of the alternating stacks has a width modulation along a second horizontal direction that is perpendicular to the first horizontal direction within the area of the inter-array region.

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27-07-2023 дата публикации

Three-dimensional memory device containing self-aligned isolation strips and methods for forming the same

Номер: WO2023140877A1
Принадлежит: SanDisk Technologies LLC

A semiconductor structure includes an alternating stack of insulating layers and composite layers. Each of the composite layers includes a plurality of electrically conductive word line strips laterally extending along a first horizontal direction and a plurality of dielectric isolation strips laterally extending along the first horizontal direction and interlaced with the plurality of electrically conductive word line strips. Rows of memory openings are arranged along the first horizontal direction. Each row of memory openings vertically extends through each insulating layer within the alternating stack and one electrically conductive strip for each of the composite layers. Rows of memory opening fill structures are located within the rows of memory openings. Each of the memory opening fill structures includes a respective vertical stack of memory elements and a respective vertical semiconductor channel.

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13-08-2020 дата публикации

Three-dimensional memory device with vertical semiconductor channels having semi-tubular sections at the drain-select-level and methods for making the same

Номер: WO2020163007A1
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device is provided, which comprises an alternating stack: of insulating layers 32 and electrically conductive layers 46 located over a substrate (9, 10); first memory opening fill structures 58A extending through the alternating stack: (32, 46), wherein each of the first memory opening fill structures (58 A) includes a respective first memory film (50), a respective first vertical semiconductor channel (60) contacting an inner sidewall of the respective first memory film (50), and a respective first dielectric core (62) having a circular or an elliptical horizontal cross-sectional shape at a lower portion thereof and having a semi-circular or a semi -elliptical horizontal cross-sectional shape at an upper portion thereof.

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12-10-2023 дата публикации

Three-dimensional memory device containing source rails and method of making the same

Номер: US20230328976A1
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device includes a source-level structure located over a substrate, an alternating stack of insulating layers and electrically conductive layers located over the source-level structure, memory openings vertically extending through the alternating stack, and memory opening fill structures located in the memory openings. The source-level structure includes a lower source-level semiconductor layer including elongated grooves in an upper portion thereof, doped semiconductor source rails located within the elongated grooves, and an upper source-level semiconductor layer. The doped semiconductor source rails are laterally spaced apart from each other along a first horizontal direction and laterally extend along a second horizontal direction. Each of the memory opening fill structures includes a respective vertical stack of memory elements and a respective vertical semiconductor channel that contacts a respective one of the doped semiconductor source rails.

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09-11-2023 дата публикации

Three-dimensional memory device containing isolation structures and methods for forming the same

Номер: US20230363165A1
Принадлежит: SanDisk Technologies LLC

A semiconductor structure includes an alternating stack of insulating layers and composite layers, each of the composite layers includes a plurality of electrically conductive word line strips and a plurality of dielectric isolation structures, and each of the insulating layers has an areal overlap with each electrically conductive word line strip and each dielectric isolation structure within the composite layers within a memory array region in a plan view along a vertical direction, rows of memory openings arranged along the first horizontal direction, where each row of memory openings of the rows of memory openings vertically extends through each insulating layer within the alternating stack and one electrically conductive strip for each of the composite layers, and rows of memory opening fill structures located within the rows of memory openings, where each of the memory opening fill structures includes a vertical stack of memory elements and a vertical semiconductor channel.

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30-05-2024 дата публикации

Stairless three-dimensional memory device and method of making thereof by forming replacement word lines through memory openings

Номер: US20240178129A1
Принадлежит: SanDisk Technologies LLC

A memory device includes an alternating stack of insulating layers and composite layers, where each of the composite layers contains an electrically conductive layer and a dielectric material plate, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, where each of the memory opening fill structures includes a respective vertical stack of memory elements and a vertical semiconductor channel and a plurality of integrated line-and-via structures. Each of the plurality of integrated line-and-via structures includes a conductive plate portion that contacts the electrically conductive layer of a respective one of the composite layers, and a conductive via portion that is adjoined to a top surface of the conductive plate portion and vertically extends through a respective overlying subset of the insulating layers and a subset of the dielectric material plates of the composite layers.

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30-05-2024 дата публикации

Stairless three-dimensional memory device and method of making thereof by forming replacement word lines through memory openings

Номер: US20240179905A1
Принадлежит: SanDisk Technologies LLC

A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers, memory openings vertically extending through the alternating stack, and memory opening fill structures located in the memory openings and including a respective vertical semiconductor channel and a respective vertical stack of memory cells. An integrated line-and-via structure is provided, which is a unitary structure including a metallic plate portion that is a portion of or laterally contacts an electrically conductive layer, and a metallic via portion that vertically extends through dielectric material plates that overlie the metallic plate portion.

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09-12-2021 дата публикации

Three-dimensional memory device including through-memory-level via structures and methods of making the same

Номер: US20210384207A1
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device can include at least one alternating stack of insulating layers and electrically conductive layers located over a semiconductor material layer, memory stack structures vertically extending through the at least one alternating stack, and a vertical stack of dielectric plates interlaced with laterally extending portions of the insulating layers of the at least one alternating stack. A conductive via structure can vertically extend through each dielectric plate and the insulating layers, and can contact an underlying metal interconnect structure. Additionally or alternatively, support pillar structures can vertically extend through the vertical stack of dielectric plates and into an opening through the semiconductor material layer, and can contact lower-level dielectric material layers embedding the underlying metal interconnect structure to enhance structural support to the three-dimensional memory device during manufacture.

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20-10-2022 дата публикации

Three-dimensional memory device with isolated source strips and method of making the same

Номер: WO2022220897A1
Принадлежит: SanDisk Technologies LLC

A memory die includes source-select-level electrically conductive strips laterally spaced apart by source-select-level dielectric isolation structures, an alternating stack of word-line-level electrically conductive layers and insulating layers; and source strips located on an opposite side of the source-select-level electrically conductive strips. Each of the source strips has an areal overlap with only a respective one of the source-select-level electrically conductive strips. Memory stack structures vertically extend through the alternating stack and a respective subset of the source-select-level electrically conductive strips. A logic die may be bonded to the memory die on an opposite side of the source strips. Each source strip is electrically connected to a respective group of memory stack structures laterally surrounded by a respective source-select-level electrically conductive strip.

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13-06-2024 дата публикации

Three-dimensional memory devices with lateral block isolation structures and methods of forming the same

Номер: US20240194262A1
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device includes alternating stacks of insulating strips and electrically conductive strips, backside trenches located between neighboring pairs of alternating stacks, memory openings vertically extending through the alternating stacks, and memory opening fill structures located within the memory openings. In some embodiments, dielectric etch stop structures may be located within or outside the backside trenches such that each of the dielectric etch stop structures includes a respective pair of dielectric sidewalls that are located within a pair of lengthwise sidewalls of the respective one of the backside trenches. In some other embodiments, a dielectric isolation structure can laterally contact each of the insulating strips within the alternating stacks. Laterally insulated contact via structures can be provided to provide electrical contact to a respective one of the electrically conductive strips.

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13-06-2024 дата публикации

Three-dimensional memory devices with lateral block isolation structures and methods of forming the same

Номер: US20240196612A1
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device includes alternating stacks of insulating strips and electrically conductive strips, backside trenches located between neighboring pairs of alternating stacks, memory openings vertically extending through the alternating stacks, and memory opening fill structures located within the memory openings. In some embodiments, dielectric etch stop structures may be located within or outside the backside trenches such that each of the dielectric etch stop structures includes a respective pair of dielectric sidewalls that are located within a pair of lengthwise sidewalls of the respective one of the backside trenches. In some other embodiments, a dielectric isolation structure can laterally contact each of the insulating strips within the alternating stacks. Laterally insulated contact via structures can be provided to provide electrical contact to a respective one of the electrically conductive strips.

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06-06-2024 дата публикации

Stairless three-dimensional memory device and method of making thereof by forming replacement word lines through memory openings

Номер: WO2024118177A1
Принадлежит: SanDisk Technologies LLC

A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers, memory openings vertically extending through the alternating stack, and memory opening fill structures located in the memory openings and including a respective vertical semiconductor channel and a respective vertical stack of memory cells. An integrated line-and-via structure is provided, which is a unitary structure including a metallic plate portion that is a portion of or laterally contacts an electrically conductive layer, and a metallic via portion that vertically extends through dielectric material plates that overlie the metallic plate portion.

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06-08-2024 дата публикации

Three-dimensional memory device with isolated source strips and method of making the same

Номер: US12058854B2
Принадлежит: SanDisk Technologies LLC

A memory die includes source-select-level electrically conductive strips laterally spaced apart by source-select-level dielectric isolation structures, an alternating stack of word-line-level electrically conductive layers and insulating layers; and source strips located on an opposite side of the source-select-level electrically conductive strips. Each of the source strips has an areal overlap with only a respective one of the source-select-level electrically conductive strips. Memory stack structures vertically extend through the alternating stack and a respective subset of the source-select-level electrically conductive strips. A logic die may be bonded to the memory die on an opposite side of the source strips. Each source strip is electrically connected to a respective group of memory stack structures laterally surrounded by a respective source-select-level electrically conductive strip.

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13-06-2024 дата публикации

Three-dimensional memory devices with lateral block isolation structures and methods of forming the same

Номер: WO2024123438A1
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device includes alternating stacks of insulating strips and electrically conductive strips, backside trenches located between neighboring pairs of alternating stacks, memory openings vertically extending through the alternating stacks, and memory opening fill structures located within the memory openings. In some embodiments, dielectric etch stop structures may be located within or outside the backside trenches such that each of the dielectric etch stop structures includes a respective pair of dielectric sidewalls that are located within a pair of lengthwise sidewalls of the respective one of the backside trenches. In some other embodiments, a dielectric isolation structure can laterally contact each of the insulating strips within the alternating stacks. Laterally insulated contact via structures can be provided to provide electrical contact to a respective one of the electrically conductive strips.

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29-08-2024 дата публикации

Three-dimensional memory device containing insulated gate located over a top source layer for applying gidl erase voltage and method for manufacturing the same

Номер: US20240292616A1
Принадлежит: SanDisk Technologies LLC

A memory device includes a source layer, an alternating stack of insulating layers and electrically conductive layers located over a proximal horizontal surface of the source layer, a memory opening vertically extending through the alternating stack, a memory opening fill structure located in the memory opening and containing a memory film and a vertical semiconductor channel, a source-control-gate dielectric located over a distal horizontal surface of the source layer which is opposite to the proximal surface of the source layer, and a source-control electrode located over the source-control-gate dielectric.

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09-12-2021 дата публикации

Three-dimensional memory device including through-memory-level via structures and methods of making the same

Номер: US20210384206A1
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device can include at least one alternating stack of insulating layers and electrically conductive layers located over a semiconductor material layer, memory stack structures vertically extending through the at least one alternating stack, and a vertical stack of dielectric plates interlaced with laterally extending portions of the insulating layers of the at least one alternating stack. A conductive via structure can vertically extend through each dielectric plate and the insulating layers, and can contact an underlying metal interconnect structure. Additionally or alternatively, support pillar structures can vertically extend through the vertical stack of dielectric plates and into an opening through the semiconductor material layer, and can contact lower-level dielectric material layers embedding the underlying metal interconnect structure to enhance structural support to the three-dimensional memory device during manufacture.

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03-10-2024 дата публикации

Three-dimensional memory device including a source structure surrounded by inner sidewalls of vertical semiconductor channels and methods of forming the same

Номер: WO2024205709A1
Принадлежит: Sandisk Technologies Llc.

A three-dimensional memory device includes a source structure having a portion surrounded by inner sidewalls of cylindrical vertical semiconductor channels.

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03-10-2024 дата публикации

Three-dimensional memory device including a source structure surrounded by inner sidewalls of vertical semiconductor channels and methods of forming the same

Номер: US20240334698A1
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device includes a source structure having a portion surrounded by inner sidewalls of cylindrical vertical semiconductor channels.

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03-10-2024 дата публикации

Three-dimensional memory device including a source structure surrounded by inner sidewalls of vertical semiconductor channels and methods of forming the same

Номер: US20240334697A1
Принадлежит: SanDisk Technologies LLC

A three-dimensional memory device includes a source structure having a portion surrounded by inner sidewalls of cylindrical vertical semiconductor channels.

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22-10-2024 дата публикации

Three-dimensional memory device containing self-aligned isolation strips and methods for forming the same

Номер: US12127406B2
Принадлежит: SanDisk Technologies LLC

A semiconductor structure includes an alternating stack of insulating layers and composite layers. Each of the composite layers includes a plurality of electrically conductive word line strips laterally extending along a first horizontal direction and a plurality of dielectric isolation strips laterally extending along the first horizontal direction and interlaced with the plurality of electrically conductive word line strips. Rows of memory openings are arranged along the first horizontal direction. Each row of memory openings vertically extends through each insulating layer within the alternating stack and one electrically conductive strip for each of the composite layers. Rows of memory opening fill structures are located within the rows of memory openings. Each of the memory opening fill structures includes a respective vertical stack of memory elements and a respective vertical semiconductor channel.

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14-11-2024 дата публикации

Three-dimensional memory device with layer contact via structures located in a memory array region and methods of forming the same

Номер: US20240381639A1
Принадлежит: Western Digital Technologies Inc

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, an array of memory openings vertically extending through the alternating stack, memory-opening-free areas located in the array of the memory openings in a plan view, an array of memory opening fill structures located in the array of memory openings, and layer contact assemblies located within the memory-opening-free areas in the plan view. Each of the memory opening fill structures includes a respective vertical semiconductor channel and respective memory elements located at levels of the electrically conductive layers. Each of the layer contact assemblies includes a respective layer contact via structure contacting a respective one of the electrically conductive layers, and a respective insulating spacer that laterally surrounds the respective layer contact via structure.

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