FUNCTIONAL VERIFICATION SYSTEM FOR SEMICONDUCTOR INTEGRATED CIRCUIT, AND FUNCTIONAL VERIFICATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT.

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FUNCTIONAL VERIFICATION SYSTEM FOR SEMICONDUCTOR INTEGRATED CIRCUIT, AND FUNCTIONAL VERIFICATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT

FUNCTIONAL VERIFICATION SYSTEM FOR SEMICONDUCTOR INTEGRATED CIRCUIT, AND FUNCTIONAL VERIFICATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT

Номер патента: US20130031520A1
Опубликовано: 31-01-2013
Автор(ы): ASAO Yoji
Принадлежит: KABUSHIKI KAISHA TOSHIBA
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FUNCTIONAL VERIFICATION SYSTEM FOR SEMICONDUCTOR INTEGRATED CIRCUIT, AND FUNCTIONAL VERIFICATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT

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