POWER CONTROL CIRCUIT OF DISPLAY DEVICE

Advantages and features of the present invention, achieve the appended drawing method and an electronic component connected to the reference surface with specifically carry activitycopyright will in the embodiment. In the embodiment in the present invention refers to hereinafter however limited to various different rather than the disclosure are embodied in the form of percussion, in the embodiment of the present invention disclosure is completely only the are and can be utilized, the present invention is provided to a target area of the invention completely for alerting the person with skill in the art in categories to which ball number, defined by category of the present invention refers to claim only disclosed. Thus, in some in the embodiment, well-known process steps, well-known element structure and the present invention is the well-known techniques to avoid ambiguous interpretation does not specifically described. Throughout the specification the same references refer to the same components.

Drawing the different layers in order by increasing a thickness and area unambiguously shown. The portion throughout a drawing code is configured to receive a specification similar are identical. Layer, film, region, such as when that plate parts which are "on", "directly on" as well as any other portion when intermediate when another portion comprises a unit. Some parts which are "directly on" when it opposite intermediate free portion and a portion of motor vehicle is started substrate. In addition, layer, film, region, such as when that plate parts which are "under", "beneath" as well as any other portion when intermediate when another portion comprises a unit. Some parts which are opposite "beneath" when it without other parts intermediate the motor vehicle is started substrate.

Spatially relative terms a "below (below)", "(beneath) below", "lower (lower)", "(above) on", "upper (upper)" or the like is shown on the drawing as one component or components described hereinafter for correlation with another component or components can be used. Spatially relative term are shown in the drawing in use or operation in addition to the outer direction of different terms including should it will. For example, when forming the calculator shown on the drawing, another element of "below (below)" or "(beneath) below" described in a device of the other element "(above) on" can be placed. Thus, the exemplary term "below" can include both the direction of above and below. Element even can be oriented in another direction, the film substrate can be interpreted according to spatially relative terms.

The specification that any portion when connected to other, this when connected directly as well as, its intermediate between when electrically connected to another element comprises a unit. In addition, when that any portion of any components, particularly the opposite substrate and other components without number but further can include other components which means that the other.

In the specification number 1, number 2, number 3 describes various components such as term can be used but, with these components defined by the terms are not correct. Components are mounted to one of said terms are used with the object of distinguished from other components. For example, deviates from the scope of the invention of the present invention without, components such as number 2 or number 3 component can be designated number 1, number 2 or number 3 of the elements alternately can be similarly designated.

In the absence of other definitions, all terms used in the specification is provided to the present invention (including the techniques and the treatment) is in common sense can be understood to a person with skill in the art to can be used are disclosed. It is apparent that a term generally used in a pre-defined are not specially defined is not ideally or overly interpreted.

Figure 1 shows a configuration of the present invention indicating one in the embodiment according to display device also are disclosed.

As shown in fig. 1, of the present invention display device includes a display panel (100), pixel areas (110), data driver (120), the gate driving unit (130), timing controller (Timing Controller, T-a CON, 150), comprising the power management circuit (Power Management IC, PMIC, 210).

Not shown but, display panel (100) when the liquid crystal panel, said display panel (100) including a liquid crystal display device includes a display panel (100) (not shown) number light backlight unit further comprises a pair of polarizing plates (not shown) and can be. In addition, the liquid crystal panel has VA (Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, IPS (In-a Plane Switching) mode, FFS (Fringe provided Field Switching) mode, and PLS (Plane to Line Switching) may be either of two panel, not one particular mode panel number.

Display panel (100) includes a plurality of gate lines (GL1 to GLn), a plurality of gate lines (GL1 to GLn) formed against a plurality of data lines (DL1 to DLm), said plurality of gate lines (GL1 to GLn) and said plurality of data lines (DL1 to DLm) comprising the electrically connected to a plurality of pixels (PX). Said plurality of gate lines (GL1 to GLn) is said gate driver (130) connected to, said plurality of data lines (DL1 to DLm) is said data driver (120) coupled with each other.

Data driver (120) comprises a plurality of data driving integrated circuit for (not shown) consists of into. The data driving integrated circuit for which a thin-film transistor display panel (100) mounted directly on can be disclosed. Data driver (120) the TV receiver controller (150) digital Image data signal (RGB) from a signal (DDC) number LIFD and data lines. Data driver (120) a signal (DDC) causes the driving number after sampling a digital Image data signal (RGB), latched data signals corresponding to every one horizontal period wave to a minimum sampling Image, Image data signals latched (DL1 to DLm) is supplied to the data lines.

The gate driving unit (130) includes a power source management circuit unit (210) from a gate (VON), gate-off voltage is receiving (VOFF) and gate driving voltage (VGH, VGL), timing controller (150) from a signal (GDC) gate driving number gate shift clock (GSC) available. The gate driving unit (130) includes a number of the display signals (GDC) and gate shift clock (GSC) in response to gate pulse signal outputs are supplied to the gate lines (GL1 to GLn).

Timing controller (150) digital Image data signal (RGB) is also supplied from the data driver (120) are formed by supplying, clock signal (CLK) horizontal/vertical synchronous signal (H, V) according to the data driving signals (DDC) number on each data driver generates a signal (GDC) gate driving number (120) to the gate driving unit (130) is supplied to the. Wherein, a signal (DDC) number data driver comprises a source shift clock, source start pulse, and data output enable signal or the like can be, gate start pulse and gate output enable signal is a signal (GDC) gate driving number can be like.

Power management circuit (210) includes a data driver (120) for converting a signal reference voltage Image analog driving voltage (AVDD) and gamma voltage supplied a (VGMA). Data driver (120) includes a power source management circuit unit (210) (AVDD) analog driving voltage inputted from the timing controller is receiving and gamma voltage (VGMA) (150) (RGB) analog video data signals from digital Image data signal to the data lines (DL1 to DLm) to receive a supply can be supplied.

Figure 2 shows a configuration of power management circuit according to an embodiment of the present invention also are disclosed.

The reference 2 also, timing controller (150) the interface communication (151), memory block number 1 (152), memory block number 2 (153), memory block number 3 (154), memory block number 4 (155), Image pattern detector (156) and temperature detector (157) comprises. Image pattern detector (156) of an input Image is selectively 3D stereo-scopic Image display, display panel displays an Image operating condition detected by a thermal increase of power consumption. Temperature detector (157) is detected by a temperature for driving display device. Image pattern detector (156) and temperature detector (157) through a device operating condition can be collectively detecting.

Memory block number 1 to number 4 (152, 153, 154, 155) are optimal power according to operating conditions of display device comprise a set value. The form of a look-up table memory block can be optimum power setting value. Power setting is power management circuit (210) decodes the output voltage of the drive power source output number. Input video condition or temperature detected by a change in operating conditions of the power setting display of selecting comprising memory block, output voltages to the display device and power supplies can be compensating.

The reference 2 also, power management circuit (210) includes a number control unit (230), number 1 storage bank (241), number 2 storage bank (242) and power creation part (250) consists of to.

Number control unit (230) the TV receiver controller (150) on I2C (Inter Integrated Circuit) interface and enable signal (EN) through connected thereto. I2C interface SLC (serial clock) signal lines SDA 2 line signaling interface for transmitting and receiving data through the signal line (serial data) are disclosed. I2C interface Serial communication interface through SLC for synchronizing clock signal line, the internal combustion engine out input and output data SDA signal lines a plurality of hierarchies. Only a line memory for bi-directional communication impossible to transmit simultaneously, in pivotably 400kHz 100kHz to the transmission rate. Enable signal line connection lines (EN) 1 is low (Low) or high (High) holds the state. 1 Bit of digital codes corresponding to the state of the enable signal (EN) can be. Timing controller (150) the value of all data is transmitted from a power source through a I2C interface, enable signal (EN) status information is switched with each other. Power management circuitry may enable signal (EN) power setting values in memory banks according to a state change of a switching substrate.

Number control unit (230) the TV receiver controller (150) memory block (152,153,154,155) power set value stored paging, number 1 storage bank (241) and number 2 storage bank (242) store during inactive storage bank. Active storage banks power creation part (250) driving voltage output corresponding to the conventional measurement storage bank big power setting. All other inactive storage banks active storage bank is not big storage bank.

For example, power creation part (250) number 1 in storage bank (241) power to a predeterminable set value stored during voltage and outputs driving power when, active storage banks number 1 storage bank (241) are disclosed. Number control unit (230) is adapted to receive power setting is inactive storage bank number 2 storage bank (242) and stored in a. Number control unit (230) is number 2 storage bank (242) value of power storage is complete, enable signal (EN) output state of toggle (toggle) conditional as follows. I.e., enable signal is high (High) (EN) (Low) converted into low state to an off-state, high state to low state (Low) (High) from outside. By enable signal (EN) conditions change sensed by the edge (rising edge) or falling edge (falling edge) is generated. Number control unit (230) is enable signal (EN) at a rising edge (rising edge) or falling edge (falling edge) is detected, active storage bank number 1 storage bank (241) number 2 in storage bank (242) changing substrate. Number control unit (230) received from the TV receiver controller power setting stored number 2 storage bank (242) decides the paging power from the driving voltage set value. Number control unit (230) based on a drive voltage determined by power creation part (250) a drive voltage data driver (120) driving unit (130) applies.

Number 1 storage bank (241) includes a display device is applicable initial operation initial power-set value and timing controller (150) can be storing power received from the set value. Number 1 storage bank (241) for storage of data is not EPROM (EPROM) back off power and hereinafter after number or EEPROM (EEPROM) can be composed. If, number 1 storage bank (241) (RAM) if composed in a desired, initial power setting is stored in a separate ROM (ROM), immediately after turn-on number 1 storage bank (241) may be uploaded to 2000.

Power creation part (250) is stored in storage bank references the set value determines the insulating power output value. Power creation part (250) includes a gate (VON), gate-off voltage (VOFF), analog driving voltage (AVDD), analog driving high voltage (HAVDD), gamma voltage (VGMA), common voltage (VCOM) and gate driving voltage (VGH, VGL) power applied to the first and second panel to produce outputs.

3A and 3b output driving voltage according to an embodiment of the present invention also includes a number word also example also among others.

Display device operating temperature which affects the operating conditions of an operating state display panel, video and 3D 2D integrates the three-dimensional Image, Image pattern conditions etc..

E.g. in the case of its use environment temperature on liquid crystal display device display Image appears to be hereinafter can be generator. In addition appears to be low at room temperature and at high temperature room temperature contrast in display Image appears to be white contrast display Image gum generator airway as follows. Digital video distortion due to temperature of a thin film transistor according to operating characteristics and a drain charge rate, low charge rate in the surface films are reduced in opposite charge rate exceeded coated films are hot exceeded since also are disclosed. This compensating method at room temperature set lower than the high power operation voltage gate pivotably.

In another example, the display device displays images when 2D 3D optimum power settings can differ each other if stereoscopic images. 3D stereoscopic images is leaking if display device configured phenoxyethanol by alternating higher and higher frame rate video. To implement high frame rate increasing common voltage (VCOM) which influence the entire liquid crystal device, displaying gradation so as to high gamma voltage (VGMA) may be filled. Each voltage is inputted from the setup can be, according to the magnitude of the voltage can be a predetermined structure of and operating conditions.

Another detects a pattern of an input operation conditions can be. Display device when the display panel LCD device driver influenced. E.g. black - white horizontal stripes if repeated picture and video driving conditions corresponding to the condition of the input signal a control signal generator malonyl can. The expected increase in the power consumption of an Image frequency component analog driving voltage (AVDD) voltage data driving pulse width and is disposed radially reduced the power consumption is increased in this region.

The reference 3a also, display device initial off an output voltage analog driving voltage (AVDD), holds the potential common voltage (VCOM) and enable signal (EN) is 0.

A wrong turn (Turn provided on) Image from the outside input, analog driving voltage (AVDD) and common voltage (VCOM) for driving power is determined based on the voltage value applied. A driving voltage to the initial turn-on operation output value is power management circuit (210) of number 1 storage bank (241) initial power stored references the set value can be output. 3A only to exemplify the common voltage (VCOM) analog-to-driving voltage (AVDD) and also a real, furthermore other are both outputs various power supply voltages are disclosed.

The reference 3a also, display device when operating conditions of varying, timing controller (150) is optimum power setting I2C interface power management circuit (210) components in the. For example, input Image is analog driving voltage (AVDD) drives a large load can be Image (VCOM) acting as high power consumption. Low voltage power settings can reduce power consumption to a predeterminable set value may be filled. Power transmission set value on completion of the timing controller (150) is enable signal (EN) (toggle) to toggle the state of switching, power management circuit which receives it and (210) receives an output power update power to a predeterminable set value changing substrate.

The reference also 3b, operation of the display device continuously varies with temperature, the hot (High Temp) or 50 °C (Low Temp) conditions in low temperature 0 °C hereinafter can be disclosed. Timing controller (150) is optimum power setting I2C interface power management circuit (210) components in the. The timing controller transmits power set value (150) to toggle the state of the enable signal is (EN) (toggle) to turn, correspondingly power management circuit (210) an output power to transmitted power to a predeterminable set value changing substrate. The gate driver also 3b temperature of an area to be formed (130) (VON) applied to a gate and gate-off voltage (VOFF) number of status as an example but are, other than drive voltage can be changed.

Figure 4 shows a setting example of look-up tables including power also are disclosed.

The reference also 4, timing controller (150) includes at least two or more set value and power by operation of the look-up table (voltage lookup table) with each other.

The reference 2 also and also 4, memory block number 1 (152) backlight is of a conventional operating conditions include thin film 2D Image analog driving voltage (AVDD), analog driving high voltage (HAVDD), common voltage (VCOM), gamma voltage (VGMA), a gate (VON), gate-off voltage (VSS) (VOFF) and low potential power supply voltage set value of comprise a set value.

Memory block number 1 (152) is provided to convert input analog driving voltage in 2D Image (AVDD), analog driving high voltage (HAVDD), common voltage (VCOM), gamma voltage (VGMA), a gate (VON), gate-off voltage (VSS) (VOFF) and low power setting values comprises a hot electron. Memory block number 1 (152) the power management circuit (210) of number 1 storage bank (241) initial power stored in the power store same value set value.

Memory block number 2 (153) provides a 3D stereoscopic Image when displaying the analog driving voltage (AVDD), analog driving high voltage (HAVDD), common voltage (VCOM), gamma voltage (VGMA), a gate (VON), gate-off voltage (VSS) (VOFF) and low electron power set value store. Memory block number 2 (153) of the display panel to produce the conditions rise rate analog driving voltage (AVDD) be somewhat is set higher.

Memory block number 3 (154) power consumption when a number of display screen number plower analog driving voltage (AVDD) analog driving voltage (AVDD), analog driving high voltage (HAVDD), common voltage (VCOM), gamma voltage (VGMA), a gate (VON), gate-off voltage (VSS) (VOFF) and low electron power set value store. Memory block number 3 (154) in test conditions of display screen for analog driving voltage (AVDD) and gamma voltage (VGMA) etc. to the low setting.

Memory block number 4 (155) is metallic and temperature conditions in the gate can apply analog driving voltage (AVDD), analog driving high voltage (HAVDD), common voltage (VCOM), gamma voltage (VGMA), a gate (VON), gate-off voltage (VSS) (VOFF) and low potential power supply voltage set value of set value store. Memory block number 4 (155) under these conditions take into account to a gate of the transistor pixel with altered (VON) etc. to the low setting.

Figure 4 descriptions to said 4 conditions for facilitating a power set value only a real example, display device according to the voltage level of process from characteristics of use environment conditions. In addition, power settings can comprise voltage and voltage conversion time (Ttr). The voltage conversion time (Ttr) by variation of the operating conditions when the power setting, display device can prevent fallen short of driving voltage change.

5A is also stored power set value updating operation wave shape among others.

Number 1 in section 5b also includes a timing controller (150) and power management circuit (210) diagram of operation are disclosed.

The 5a and 5b also reference also, display device is common in 2D number 1 section displays other. Initial start-up phase after the turn-on period is number 1 are disclosed. Number 1 period Image pattern detector (156) detecting the allelic pattern of input Image (IMAGE), temperature detector (157) is display device of varies (TEMP) detecting substrate. However, in an initial operating state Image pattern detector (156) and temperature detector (157) operating conditions of not reflect.

Power management circuit (210) number of control section (230) is number 1 storage bank (241) initial power set value embedded in a plurality of substrate. Number control unit (230) includes a power source generation unit (250) output voltage based on the driving voltage determines call power set value.

5C section also includes a timing controller of number 2 (150) and power management circuit (210) diagram of operation are disclosed.

5D also includes a timing controller of number 3 section (150) and power management circuit (210) diagram of operation are disclosed.

The reference also 5c and 5a also, display device is number 2 receives three-dimensional Image 3D period the display substrate. Timing controller (150) includes a memory block number 2 (153) 3D stereoscopic images from optimal power set value used to indicate the construction of the other. Communication interface (151) is memory block number 2 (153) power setting I2C interface power management circuit (210) components in the. Power management circuit (210) number of control section (230) is adapted to receive power setting is inactive storage bank number 2 storage bank (242) and stored in a.

The reference also 5d and 5a also, timing controller (150) includes a memory block number 2 (153) is used in both power setting, number 3 section in an initial step of enable signal (EN) row (Low) state high (High) switch from a state with other. Power management circuit (210) number of control section (230) is enable signal (EN) against a rise edge (rising edge) is detected, the inactive storage bank number 2 storage bank (242) to specify other active bank. Number 2 storage bank (242) to the gate driver applies 3D stored power setting is designed to have the optimal value. Power creation part (250) is number 2 storage bank (242) altering the value of the driving voltage supplied power set value so as to correspond to each other. Display device during operation, a change in output value and power momentarily change can be visible from one side of the user. To prevent this voltage change time can be via a power supply settings comprising (voltage transition time). Voltage change time current regulated voltage value (voltage transition time) output a voltage is converting a value of a is sampled. Voltage change time (voltage transition time) can be determined according to high voltage variation width, preferably less than about 100 mV/s slope of an.

Number 4 section also includes a timing controller of 5e (150) and power management circuit (210) diagram of operation are disclosed.

5F also includes a timing controller of number 4 section (150) and power management circuit (210) diagram of operation are disclosed.

The reference also 5e and 5a also, display device has high power consumption for displaying an Image substrate. Timing controller (150) includes a memory block number 3 (154) high power consumption optimal power set value used to indicate the Image from the construction of the other. Communication interface (151) is memory block number 3 (154) power setting I2C interface power management circuit (210) components in the. Power management circuit (210) number of control section (230) is adapted to receive a power inactive state setting number 1 storage bank (241) and stored in a.

Also 5a and 5f also reference the, timing controller (150) includes a memory block number 3 (154) is used in both power setting, number 5 section in an initial step of enable signal (EN) high (High) state low (Low) switch from a state with other. Power management circuit (210) number of control section (230) according to falling edge (falling edge) is enable signal (EN) switching detection, number 1 storage bank (241) active storage bank change, number 2 storage bank (242) inert storage bank to specify other. Number 1 storage bank (241) low power settings stored in analog driving voltage (AVDD) adjusted to reduce power consumption by predetermined voltage in value. Power creation part (250) is number 1 storage bank (241) power outputs driving voltages corresponding to the preset values.

Also in the embodiment according to Figure 6 shows a power management circuit of another of the present invention are disclosed.

The reference also 6, timing controller (150) the interface communication (151), memory block number 1 (152), memory block number 2 (153), memory block number 3 (154), memory block number 4 (155), Image pattern detector (156) and temperature detector (157) comprises.

Power management circuit (210) includes a number control unit (230), number 1 storage bank (241), number 2 storage bank (242), power creation part (250) consists of to. Number control unit (230) the TV receiver controller (150) on I2C (Inter Integrated Circuit) connected thereto via an interface. I2C interface Serial communication interface through SLC for synchronizing clock signal line, the internal combustion engine out input and output data SDA signal lines a plurality of hierarchies. Number control unit (230) is enabling register (EN Reg) without using a tool.

Number control unit (230) the TV receiver controller (150) with power from the power setting value other. In addition number control unit (230) is enabling register (EN Reg) setting value as follows. Enabling register (EN Reg) includes a power source management circuitry portion (210) of number 1 storage bank (241) and number 2 storage bank (242) comprises activating either number. Enabling register (EN Reg) the interface communication (151) can be produced by.

For example power management circuit (210) is number 1 storage bank (241) is activated I2C interface is not activated when power set value received via the number 2 storage bank (242) and stored in a. Communication interface (151) includes a power source setting is performed after enabling register (EN Reg) both to the information transmission. Enabling register (EN Reg) simply is '0', '1' bit information in the disclosed. Previously transmitted enabling register (EN Reg) has a value of '0' when, communication interface (151) is '1' the number 1 a data storage bank (241) and deactivating, number 2 storage bank (242) can be activated. If, previously transmitted enabling register (EN Reg) has a value of '1' in otherwise would have to be, communication interface (151) is '0' value components.

According to an embodiment of the present invention power management circuit (210) is of storage bank 2 (241, 242) bit of digital codes as configured as a selecting process from storage bank.

Analog-to-driving voltage that reflects the wave shape also 7a among others.

I also 7a 7b also includes analog driving voltage for the enlargement region of wave shape of among others.

The reference also 7a and 7b also, general number 1 interval has input a mark display section are disclosed. Number 2 section includes a display device at a high level power consumption immediately after section of input Image are disclosed. Timing controller (150) for imaging pattern detector (156) high power consumption Image through power-off, communication interface (151) to analog driving voltage (AVDD) transmits power set to a set value. Both transmitted after the power setting, the first signal timing controller number 3 section (150) includes a row address enable signal (EN) (Low) to high (High) is converted into a state of outputs. Power management circuit (210) is enable signal (EN) after detecting a rise (Rising edge) updated power to a predeterminable set value driving voltages to other. Power settings can comprise a voltage conversion time (Ttr). Voltage conversion time (Ttr) output produces a voltage change abruptly switching time preventing are disclosed. Display device corresponding first level voltage of output Image can be flickering is sensed. A cap made at or higher than the specified voltage conversion time (Ttr) servicing the sharp changes of driving voltage. Voltage conversion time (Ttr) sets up the variation of the driving voltage changes can be. According to an embodiment of the present invention is 100 mV/s change of voltage conversion time (Ttr) but the driving voltage to the control now. Also shown in 7b such as 1. 5V voltage change (Ttr) is preferably about 15 seconds when voltage conversion time.

Figure 8 shows a power management circuit according to an embodiment of the present invention also operation of order disclosed.

The reference also 8, display device is connected to receive the, timing controller (150) includes a power source management circuit unit (210) to output the power number (S1001) decodes.

Power management circuit (210) is number 1 storage bank (241) initial power embedded references the set value other (S2001). Power management circuit (210) of power creation part (250) corresponding to an initial set value power outputs from the gate driving voltage (S2002). The driving voltage analog driving voltage (AVDD), analog driving high voltage (HAVDD), common voltage (VCOM), gamma voltage (VGMA), a gate (VON), gate-off voltage (VSS) (VOFF) and low electron can be like.

Timing controller (150) includes a display device continuously during operation of Image pattern detector (156) and temperature detector (157) an indication from a device operating condition swashplate (S1002). Timing controller (150) setting an output power under operating condition detected by a set value and another power applied (S1003).

Timing controller (150) is changed operating conditions of the power management circuit for fitted power set value from the memory block 127 (210) using interface I2C to outputs (S1004).

Power management circuit (210) the TV receiver controller (150) power setting value outputted from the non-active state number 2 storage bank (242) and stored in a (S2004).

Timing controller (150) includes a power source set value is used both to a low-state of enable signal (EN) (Low) to high (High) is changed to another substrate (S1005).

Power management circuit (210) is enable signal (EN) after detecting the change of a, number 2 storage bank (242) activate a stored power set value the data substrate (S2004).

Power management circuit (210) of power creation part (250) is updated power to a predeterminable set value to adjust the output voltage outputs (S2005).

Automatic output voltage subsequent to a timing controller (150) includes a display device operating condition swashplate.