High-accuracy capacitor digital-to-analog converter

A capacitor digital-to-analog converter for N-bit digital-to-analog conversion comprises a converter capacitor network comprising 2^N capacitors and 2^N+1 MOS switches and an output buffer. The MOS switches are connected in a series chain at their respective source/drain, and each of the capacitors has a first electrode connected to a corresponding joining node between two consecutive MOS switches in the series chain and a second electrode connected together to a common node. The output buffer comprises a differential amplifier and an output amplifier, the differential amplifier has 2^N discrete inputs each connected to a corresponding one of the first electrodes of the capacitors in the converter capacitor network.

Multi-level signaling data transfer system and method for matrix type display