Elektrostatischer Kapazitätsbeschleunigungssensor

Elektrostatischer Kapazitätsbeschleunigungssensor mit einem Substrat (1), das einen Beschleunigungsdetektor (3) enthält, der ein bewegliches Teil (6) zum Erfassen einer Beschleunigung aufweist, einem Bondrahmen (7), der aus einer Schichtung besteht, die polykristallines Silizium und eine Isolierschicht enthält, und der auf dem Substrat so befestigt ist, dass er den Beschleunigungsdetektor umgibt, einer Kappe (8), die auf dem Substrat bereitgestellt ist, wobei die Fläche der Kappe, die dem Substrat zugewandt ist, aus einem Randbereich, der an dem Bondrahmen befestigt ist, und zusätzlich zu dem Randbereich aus einem Mittelbereich aufgebaut ist, und einer leitenden Abschirmschicht (9), die zumindest auf der gesamten Oberfläche des Mittelbereichs der Kappe ausgebildet ist, wobei die Abschirmschicht elektrisch mit dem beweglichen Teil verbunden ist, wobei ein Teil der Abschirmschicht (9) so ausgebildet ist, dass er sich auf die Oberfläche des Randbereichs erstreckt, und der Teil der Abschirmschicht ...

Verfahren zum Herstellen eines Gehäuses für einen Chip mit einer mikromechanischen Struktur

MEMS Sensor für schwierige Umgebungen und Medien

Die Erfindung betrifft einen typischerweise CMOS prozessierten mikromechanischen Sensor (3) aus Silizium, mit einer Sensorzelle und mindestens einem mikromechanischen Funktionselement, das mit seiner CMOS-Oberfläche in direkten Kontakt mit einem aggressiven Medium stehen kann. Dabei weist der dass der mikromechanische Sensor (3) auf der CMOS prozessierten Oberfläche zumindest einem ersten Bereich (A) auf, der die Sensorzelle umfasst und der für den direkten Kontakt mit dem Medium verwendet werden kann. Wesentlich ist, dass dieser erste Bereich (A) keine Metallisierung aufweist und somit nicht korrosionsanfällig ist. Des Weiteren weist der erfindungsgemäße Sensor einen zweiten Bereich (B) auf, der ebenfalls keine Metallisierung aufweist. Es ist die Funktion des zweiten Bereiches (B), zusammen mit einer ersten Dichtung oder Moldmasse (77) den Durchtritt des Mediums in einen dritten Bereich (C) des mikromechanischen Sensors abzudichten und damit zu verhindern. Das Bondsystem und alle eine ...

MEMS-Baustein

Ein MEMS-Baustein 100 umfasst ein Gehäuse 130 mit einem Innenvolumen V, wobei das Gehäuse 130 eine Schallöffnung 132 zu dem Innenvolumen V aufweist, ein MEMS-Bauelement 110 in dem Gehäuse 130 benachbart zu der Schallöffnung 132, und ein Schichtelement 138, das zumindest bereichsweise an einem dem Innenvolumen V zugewandten Oberflächenbereich 134-1, 136-1 des Gehäuses 130 angeordnet ist, wobei das Schichtelement 138 ein Schichtmaterial aufweist, das eine niedrigere Wärmeleitfähigkeit und optional eine höhere Wärmekapazität als das an das Schichtelement 138 angrenzende Gehäusematerial des Gehäuses 130 aufweist.

Packaging for MEMS transducers

Packaging for MEMS transducers

A MEMS transducer device has a first integrated circuit die which has an integrated MEMS transducer and integrated electronic circuitry for operation of the MEMS transducer. The die further comprises metallic via and wiring structures 1004 arranged around the periphery of the die that screen the device from EMI and light.

SEALING ELECTRICAL FEEDTHROUGH

Mems package

PACKAGING FUER POLARIZED MEMS RELAY AND PROCEDURE FOR THE PACKAGING

ELEMENT AND PROCEDURE FOR THE PRODUCTION OF A MICROENCAPSULATION

Moisture-resistant nano-particle material and its applications

Method of and apparatus for sealing a hermetic lid to a semicond uctor die

HYBRID MICROPACKAGING OF MICRODEVICES

Chip package and method for forming the same

The present invention provides a chip package and a method for forming the same. The chip package includes a semiconductor substrate having a first surface and a second surface; a device region formed in the semiconductor substrate; a dielectric layer disposed on the first surface; and a conducting pad structure disposed in the dielectric layer and electrically connected to the device region; a cover substrate disposed between the chip and the cover substrate, wherein the spacer layer, a cavity is created an surrounded by the chip and the cover substrate on the device region, and the spacer layer is in direct contact with the chip without any adhesion glue disposed between the chip and the spacer layer. The chip package technology provided in the invention can reduce the size of the chip package, facilitate large-scale production of chip packages, and ensure the quality of the chip packages, and/or reduce the process cost and time.

Cavity package design

VACUUM PACKAGE FABRICATION OF MICROELECTROMECHANICAL SYSTEM DEVICES WITH INTEGRATED CIRCUIT COMPONENTS

A method for vacuum packaging MEMS devices is provided that comprises forming a plurality of MEMS devices (12) on a device wafer (10). A first sealing ring (16) is formed surrounding one of the MEMS devices (12) and any associated mating pads (70). A plurality of integrated circuit devices (80) is formed on a lid wafer (30) where each integrated circuit device (80) has one or more associated mating pads (82) and one or more associated bonding pads (86). A plurality of second sealing rings (32) is formed on the lid wafer (30) where each of the second sealing rings (32) surrounds one of the integrated circuit devices (80) and any associated bonding pads (82). The second sealing ring (32) is positioned between the perimeter of the integrated circuit device (80) and the associated bonding pads (86). A sealing layer is formed on either each first sealing ring (16) or each second sealing ring (32). The device wafer (10) is mated with the lid wafer (30) in a vacuum environment to form a plurality ...

WAFER-PAIR HAVING DEPOSITED LAYER SEALED CHAMBERS

A wafer-pair having at least one recess in one wafer forms at least one chamber with the attaching of the other wafer which has at least one port which is plugged with a deposited layer on its external surface. The deposition of the layer may be performed in a very low pressure environment, thus assuring the same kind of environment in the sealed chamber. The chamber may enclose at least one device such as a thermoelectric sensor, bolometer, emitter or other kind of device. The wafer-pair typically will have numerous chambers, and may be divided into chips.

Electronic system comprising a microelectromechanical system and a box encapsulating this microelectromechanical system

The present invention relates to an electronic system comprising an electronic system comprising an electromechanical microsystem and a hermetic box encapsulating said microsystem. The box includes a fastening plane. The electromechanical microsystem includes a sensitive part and at least two beams connecting the sensitive part to the fastening plane. The beams are thermally coupled to the sensitive part and are electrically coupled to one another. The system further includes a thermal regulator of the electromechanical microsystem including an electrical circuit including at least two ends connected to the beams, and a circuit controller able to generate an electrical current in the electrical circuit to modify the temperature of the sensitive part.

Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates

A projection system, a spatial light modulator, and a method for forming a MEMS device is disclosed. The spatial light modulator can have two substrates bonded together with one of the substrates comprising a micromirror array. The two substrates can be bonded at the wafer level after depositing a getter material andlor solid or liquid lubricant on one or both of the wafers. The wafers can be bonded together hermetically if desired, and the pressure between the two substrates can be below atmosphere.

Z offset MEMS device

A microelectromechanical system (MEMS) device with a mechanism layer having a first part and a second part, and at least one cover for sealing the mechanism layer. The inner surface of at least one of the covers is structured such that a protruding structure is present on the inner surface of the cover and wherein the protruding structure mechanically causes the first part to be deflected out of a plane associated with the second part.

Method of creating a predefined internal pressure within a cavity of a semiconductor device

A method of creating a predefined internal pressure within a cavity of a semiconductor device, the method including providing the semiconductor device, the semiconductor device including a semiconductor oxide area which is continuously arranged between the cavity of the semiconductor device and an external surface of the semiconductor device, exposing the semiconductor device to an ambient atmosphere with a noble gas at a first temperature for a predetermined time period, and setting a second temperature, which is different from the first, after the predetermined time period has expired, the semiconductor oxide area exhibiting a higher permeability for the noble gas at the first temperature than at the second temperature.

MEMS sensor with cap electrode

A MEMS sensor includes a substrate having a MEMS structure movably attached to the substrate, a cap attached to the substrate and encapsulating the MEMS structure, and an electrode formed on the cap that senses movement of the MEMS structure.

FORCE SENSOR AND MANUFACTURE METHOD THEREOF

A force sensor comprises a first substrate, a second substrate, a third substrate, and a package body. The first substrate includes a fixed electrode, at least one first conductive contact, and at least one second conductive contact. The second substrate is disposed on the first substrate and electrically connected to the first conductive contact of the first substrate. The second substrate includes a micro-electro-mechanical system (MEMS) element corresponding to the fixed electrode. The third substrate is disposed on the second substrate and includes a pillar connected to the MEMS element. The package body covers the third substrate. The foregoing force sensor has better reliability.

ELECTRONIC DEVICE, PHYSICAL QUANTITY SENSOR, PRESSURE SENSOR, VIBRATOR, ALTIMETER, ELECTRONIC APPARATUS, AND MOVING OBJECT

A physical quantity sensor includes a substrate, a piezoresistive element that is arranged on one face side of the substrate, a wall portion that is arranged to surround the piezoresistive element on the one face side of the substrate in a plan view of the substrate, a ceiling portion that is arranged on the opposite side of the wall portion from the substrate and constitutes a cavity portion with the wall portion, and an inside beam portion that is arranged on the substrate side of the ceiling portion and includes a material of which the thermal expansion rate is smaller than the thermal expansion rate of the ceiling portion.

BONDED WAFER STRUCTURES

The present disclosure includes bonded wafer structures and methods of forming bonded wafer structures. One example of a forming a bonded wafer structure includes providing a first wafer (202, 302) and a second wafer (204, 304) to be bonded together via a bonding process that has a predetermined wafer gap (216, 316) associated therewith, and forming a mesa (215, 315, 415) on the first wafer (202, 302) prior to bonding the first wafer (202, 302) and the second wafer (204, 304) together, wherein a height (220, 320, 420) of the mesa (215, 315, 415) is determined based on a target element gap (217, 317) associated with the bonded wafer structure.

Hermetically sealed package for optical, electronic, opto-electronic and other devices

Techniques are disclosed for hermetically sealing one or more devices within a package. According to one aspect, a lid is attached to a substrate on which one or more devices are provided such that the devices are encapsulated within an area defined by the substrate and the lid. A substance, such as a lubricant or gas, is introduced via one or more through-holes in the lid to a region that is separated from the devices by a wall having at least one opening through which the substance can pass to the devices. The through-hole then may be hermetically sealed, for example, using a local heating process that does not degrade the lubricant or other substance.

Bond Wave Optimization Method and Device

A semiconductor device and method of manufacturing the device that includes a growth die and a dummy die. The method includes patterning, on an integrated circuit wafer, at one least growth die, and patterning at least one dummy die that is positioned on at least a portion of a circumference of the integrated circuit wafer. The patterned growth and dummy dies are etched on the wafer. A bond wave is initiated at a starting point on the integrated circuit wafer. The starting point is positioned on an edge of the integrated circuit wafer opposite the portion on which the at least one dummy die is patterned. Upon application of pressure at the starting point, a uniform bond wave propagates across the wafers, bonding the two wafers together.

Mems Flip-Chip Packaging

Packaging of MEMS and other devices, and in some cases, devices that have vertically extending structures. Robust packaging solutions for such devices are provided, which may result in superior vacuum performance and/or increased protection in some environments such as high-G environments, while also providing high volume throughput and low cost during the fabrication process.

Verfahren zur Herstellung eines mikromechanischen Bauelements mit einem volumenelastischen Medium und mikromechanischen Bauelement

Es wird ein Verfahren zur Herstellung eines mikromechanischen Bauelements vorgeschlagen, wobei das mikromechanische Bauelement ein Medium aufweist. Das Medium besitzt einstellbare und veränderbare volumenelastische Eigenschaften und umschließt ein Sensormodul und/oder ein Modulgehäuse im Wesentlichen vollständig. Das Medium weist bevorzugt ein Tiefpassverhalten auf.

Sensor-Gehäuse für die direkte Montage

Gehäuse für eine integrierte elektronische Schaltung mit Montagehilfen, wobei das besagte Gehäuse umfasst:Einen Gehäusekörper (1) aus einem ersten Material mit einer Symmetrieachse (37),Montagehilfen (Gewinde 1),einen Schaltungsträger (35) der die integrierte Schaltung trägt, wobei der Schaltungsträger (37) die elektrischen Kontakte zum elektrischen Anschluss der integrierten Schaltung bereitstellt, um die Energieversorgung und/oder die Kommunikation der integrierten Schaltung zu ermöglichen gekennzeichnet dadurch, dass• mindestens eine elektronische Komponente (3, 67, 79)• mit einem ersten Bereich (A) der elektronischen Komponente (3, 67, 79) aus einer Gehäuseoberfläche aus dem Gehäusekörper (1) hervorragt und• die elektronische Komponente sich zumindest mit einem dritten (C) und zweiten Bereich (B) innerhalb des Gehäuses befindet und• die elektronische Komponente (3, 67, 79) sich zumindest mit dem ersten Bereich (A) außerhalb des Gehäusekörpers (1, 65) befindet ...

Verfahren zur Verkappung eines Bauelements mit einer Kavernenstruktur

Elektromechanisches Bauelement und Verfahren zur Herstellung desselben

Ein elektromechanisches Bauelement besteht aus einem Polymerkörper, der einen mechanisch aktiven Teil und einen Rahmen aufweist, und aus einer Metallschicht, die den mechanisch aktiven Teil zur mechanischen Stabilisierung desselben zumindest teilweise bedeckt. Das elektromechanische Bauelement kann ein Beschleunigungssensor, ein Drehratensensor, ein Mikroventil, eine Mikropumpe, ein Drucksensor oder ein Kraftsensor sein. Das elektromechanische Bauelement verursacht bei seiner Herstellung im Gegensatz zu elektromechanischen Bauelementen, die durch eine Silizium-Technologie hergestellt werden, drastisch reduzierte Kosten, da zur Herstellung statt der aufwenigen Silizium-Technologie einfache Spritzguß- und/oder Prägeverfahren eingesetzt werden können.

VERFAHREN ZUM PRODUZIEREN EINES HALBLEITERMODULS

Das Verfahren umfasst Herstellen einer Halbleiterplatte, die eine Vielzahl von Halbleitervorrichtungen umfasst, Herstellen einer Kappenplatte, die eine Vielzahl von Kappen umfasst, Binden der Kappenplatte auf die Halbleiterplatte, so dass jede der Kappen eine oder mehrere der Halbleitervorrichtungen abdeckt, und Vereinzeln der verbundenen Platten zu einer Vielzahl von Halbleitermodulen.

Packaging for Mems transducers

MEMS package

A MEMS device 56 is situated in a recess 54 in a substrate to reduce the height of the package. The substrate may be a multilayer PCB comprising alternating insulating layers and metallization layers 52. The recess may extend through varying numbers of layers, and there may be a photoresist layer or solder resist layer on the surface of the substrate, through which the recess extends. The MEMS device may be a transducer, for example a capacitative microphone. A cover 76 over the recess and MEMS device and includes an aperture 78 to allow acoustic transmission to the device. The cover may be metallic, and electrically connected to a metallic layer of the substrate, for example for EM shielding.

Processes for hermetically packaging wafer level microscopic structures

MOISTURE-RESISTANT NANO-PARTICLE MATERIAL AND ITS APPLICATIONS

ENCAPSULATING STRUCTURE COMPRISES A HOOD AND MECHANICALLY REINFORCED GETTERING HAS

기밀 밀봉용 덮개재 및 전자 부품 수납용 패키지

... 이 기밀 밀봉용 덮개재는, 전자 부품 수납용 패키지에 사용되는 기밀 밀봉용 덮개재이다. 기밀 밀봉용 덮개재(1)는, Ni와 Cr과 Fe를 함유하는 Ni-Cr-Fe 합금, 또는, Ni와 Cr과 Co와 Fe를 함유하는 Ni-Cr-Co-Fe 합금에 의해 구성된 기재층과, 기재층의 전자 부품 수납 부재측의 한쪽 표면에 접합되고, Ni, 또는, Ni 합금에 의해 구성된 표면층을 구비하는 클래드재에 의해 구성되어 있다.

BIOSENSOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

MICROMECHANICAL COMPONENT HAVING A CAP WITH A CLOSURE

The invention relates to a micromechanical component which comprises a substrate, a cavity (10) and a cap delimiting the cavity (10). The cap has an access opening (160, 161, 162) to the cavity (10). The invention is characterized in that the cap has a membrane (2b) for obturating the access opening (160, 161, 162).

MEMS PACKAGE

The present invention provides a MEMS package, the MEMS package comprising a substrate which comprises a recess, and a MEMS device, situated in the recess.

Method and system for locally sealing a vacuum microcavity, Methods and systems for monitoring and controlling pressure and method and system for trimming resonant frequency of a microstructure therein

A method and system for locally sealing a vacuum microcavity, methods and systems for monitoring and controlling pressure in the microcavity and method and system for trimming resonant frequency of a microstructure in the microcavity are provided. The microcavity has an initial base pressure therein after the microcavity is locally sealed at an access passageway. The monitoring and control methods include measuring pressure in the microcavity and providing a signal when the pressure exceeds a maximum desired level. The control method also includes reducing the pressure in the microcavity to a pressure at or below the maximum desired level in response to the signal to compensate for vacuum degradation within the vacuum microcavity.

SENSOR SYSTEM

A sensor system, in particular an acceleration sensor system, includes a sensor element and a cover element, at least one side of the sensor element having a covering provided by the cover element, and the cover element being at least partially designed as an infrared-protection element.

Integrated circuit package including in-situ formed cavity

A flip chip packaged component includes a die having a first surface and a dielectric barrier disposed on the first surface of the die. The dielectric barrier at least partially surrounds a designated location on the first surface of the die. A plurality of bumps is disposed on the first surface of the die on an opposite side of the dielectric barrier from the designated location. The flip chip packaged component further includes a substrate having a plurality of bonding pads on a second surface thereof. A cavity is defined by the first surface of the die, the dielectric barrier, and the substrate. A molding compound encapsulates the die and at least a portion of the substrate.

ENCLOSED CAVITY STRUCTURES

An example of a cavity structure comprises a cavity substrate comprising a substrate surface, a cavity extending into the cavity substrate, the cavity having a cavity bottom and cavity walls, and a cap disposed on a side of the cavity opposite the cavity bottom. The cavity substrate, the cap, and the one or more cavity walls form a cavity enclosing a volume. A component can be disposed in the cavity and can extend above the substrate surface. The component can be a piezoelectric or a MEMS device. The cap can have a tophat configuration. The cavity structure can be micro-transfer printed from a source wafer to a destination substrate.

Manufacture of MEMS structures in sealed cavity using dry-release MEMS device encapsulation

The disclosed fabrication methodology addresses the problem of creating low-cost micro-electro-mechanical devices and systems, and, in particular, addresses the problem of delicate microstructures being damaged by the surface tension created as a wet etchant evaporates. This disclosure demonstrates a method for employing a dry plasma etch process to release encapsulated microelectromechanical components.

Microstructured component and method for its manufacture

A microstructured component having a layered construction may allow implementation of component structures having a layer thickness of more than 50 mum, e.g., more than 100 mum. Capping of the component structure may allow vacuum enclosure of the component structure with a hermetically sealed electrical connection. The layered construction of the microstructured component includes a carrier including at least one glass layer, e.g., a PYREX(TM) layer, a component structure, arranged in a silicon layer, which is bonded to the glass layer, and a cap, which is positioned over the component structure and is also bonded to the glass layer.

Mikromechanische Vorrichtung mit überdeckendem Bondrahmen

Die Erfindung geht aus von einer mikromechanischen Vorrichtung mit einem Substrat (10), einer Funktionsschicht (20) und einer Kappe (30), welche parallel zu einer Haupterstreckungsebene (40) übereinander angeordnet sind, wobei in der Funktionsschicht (20) eine Kaverne (50) ausgebildet ist, welche von einem Bondrahmen (60) umgeben ist, der parallel zur Haupterstreckungsebene (40) verläuft, wobei die Kappe (30) mit dem Bondrahmen (60) verbunden ist. Der Kern der Erfindung besteht darin, dass in einer Richtung (45) senkrecht zur Haupterstreckungsebene (40) die Kaverne (50) teilweise zwischen Bondrahmen (60) und Substrat (10) angeordnet ist.Die Erfindung betrifft auch ein Verfahren zur Herstellung einer mikromechanischen Vorrichtung.

Bauelement und Verfahren zum Herstellen eines Bauelements

Bauelement- mit einem Substrat (S),- mit einem Chip (CH),- mit einem Rahmen (MF), der mit dem Substrat (S) verbunden ist und auf dem der Chip (CH) aufliegt, und- mit einer Verschlussschicht (SL) zwischen dem Rahmen und dem Chip, die dazu eingerichtet ist, ein von dem Substrat (S), dem Chip (CH) und dem Rahmen (MF) umschlossenes Volumen hermetisch abzudichtenbei dem die Verschlussschicht (SL) eine Tintenstrahldruck-Struktur darstellt und Metallpartikel (NP) oder eine Mischung aus Polymer und Metallpartikeln (P, NP) aufweist, bei dem die Verschlussschicht (SL) nach dem Aufbringen metallische Nano-Partikel mit Durchmessern kleiner als 10 nm aufweist.

Wafer packaging and singulation method

A method for packaging and singulating a wafer (122) having a plurality of micro devices (24) includes providing a multi-lid substrate (136) having a trench (156) having intersection portions (158) and non-intersection portions (160) formed on a first side (150) of the multi-lid substrate (136). The multi-lid substrate (136) is coupled to the wafer (122) such that the intersection portions (158) of the trench pattern (154) extend adjacent to at least three micro devices (24). Portions of the multi-lid substrate (136) between a second side (152) of the multi-lid substrate (136) and the trench pattern (154) are removed while the multi-lid substrate (136) is coupled to the wafer (122).

Mems package

Mems device with integral packaging

ELECTRONIC SYSTEM COMPRISING AN ELECTROMECHANICAL MICROSYSTEM AND A HOUSING ENCAPSULATING SAID ELECTROMECHANICAL MICROSYSTEM

METHOD FOR SURFACE-MOUNTABLE CHIP SCALE PACKAGE OF ELECTRONIC DEVICE AND MICROELECTROMECHANICAL SYSTEM DEVICE

PURPOSE: A method for a surface-mountable chip scale package of an electronic device and a microelectromechanical system(MEMS) device is provided to form an electrode extracted to a substrate, by easily surface-mounting a chip scale package on a printed circuit board(PCB) as a flip chip type. CONSTITUTION: An interconnection and sealing structure pattern is formed on the second substrate(12) for a cover having conductivity by using a semiconductor process technique and a microprocess technique. A pattern groove of the second substrate for the cover is filled with an insulation material like a glass or ceramic material(13). After the second substrate for the cover is planarized by a chemical mechanical polishing(CMP) process, a metal thin film is evaporated and patterned. The second substrate for the cover is precisely aligned in a wafer level and is adhered to the first substrate(6) for a device wherein the electronic device and the MEMS device are manufactured at one time. The upper portion ...

공기 압력 센서를 갖는 반도체 패키지

... 공기 압력 센서를 갖는 반도체 패키지 및 공기 압력 센서를 갖는 반도체 패키지를 형성하는 방법이 기술된다. 예를 들어, 반도체 패키지는 복수의 빌드업 층을 포함한다. 공동이 하나 이상의 빌드업 층에 배치된다. 공기 압력 센서가 복수의 빌드업 층에 배치되고, 공동 및 공동 위에 배치된 전극을 포함한다. 또한, 밀폐 실링된 영역을 갖는 반도체 패키지를 제조하는 다양한 방안들이 기술된다.

ELECTROSTATIC-CAPACITANCE-TYPE ACCELERATION SENSOR

ENERGY STORAGE STRUCTURE, METHOD OF MANUFACTURING A SUPPORT STRUCTURE FOR SAME, AND MICROELECTRONIC ASSEMBLY AND SYSTEM CONTAINING SAME

Micropackaging method and devices

The invention relates in one aspect to a method of micro-packaging a component. At least a first and a second semi-conductor substrate are provided, one of which has electrical through wafer connections (vias). A depression in either one of said substrates or in both is etched. A component is provided above vias and connected thereto. The substrates are joined to form a sealed package. The invention also relates to a micro-packaged electronic or micromechanic device, comprising a thin-walled casing of a semi-conductor material having electrical through connections through the bottom of the casing. An electronic or micromechanic component is attached to said electrical through connections, and the package is hermetically sealed for maintaining a desired atmosphere, suitably vacuum inside the box.

MEMS PACKAGE

The present invention provides a MEMS package, the MEMS package comprising a substrate which comprises a recess, and a MEMS device, situated in the recess.

APPARATUS FOR DOWNHOLE FLUIDS ANALYSIS UTILIZING MICRO ELECTRO MECHANICAL SYSTEMS (MEMS) OR OTHER SENSORS

The present invention provides packaging for MEMS devices and other sensors for downhole application. The MEMS devices and/or other sensors may aid in characterizing formation fluids in situ. The packaging facilitates high temperature, high pressure use, which is often encountered in downhole environments.

PACKAGED ACOUSTIC AND ELECTROMAGNETIC TRANSDUCER CHIPS

Various embodiments of packaged chips and ways of fabricating them are disclosed herein. One such packaged chip disclosed herein includes a chip having a front face, a rear face opposite the front face, and a device at one of the front and rear faces, the device being operable as transducer of at least one of acoustic energy and electromagnetic energy, and the chip including a plurality of bond pads exposed to one of the front and rear faces. The packaged chip includes a package element having a dielectric element and a metal layer disposed on the dielectric element, the package element having an inner surface facing the chop and an outer surface facing away from the chip. The metal layer includes a plurality of contacts exposed at at least one of the inner and outer surfaces, the contacts conductively connected to the bond pads. The metal layer further includes a first opening for passage of the at least one of acoustic energy and electromagnetic energy in a direction of at least one of ...

HERMETICALLY SEALED HOUSING FOR ELECTRONIC COMPONENTS AND MANUFACTURING METHOD

Frames (3) attached to a wafer (1) are planarized and covered with a cover film so that housings for component structures (5), in particular for filter or MEMS structures, can be formed that are sealed against gases. Interior columns (4) can be provided for supporting the housing and for grounding; exterior columns (4) can be provided for electrical connection and can be connected to the component structures by way of conduction paths (6) that are electrically insulated from the frame (3).

MICROMECHANICAL CAPACITIVE ACCELERATION SENSOR

The invention relates to a micromechanical capacitive acceleration sensor for detecting the acceleration of an object. The sensor comprises a sensor housing (1), which is stationary with regard to the object, and an inert sensor mass (2), which is mounted in a manner that permits to elastically move around a starting position in relation to the sensor housing (1) and which is surrounded by said housing. The sensor also comprises a detection device for generating an output signal, which represents the acceleration of the object, based on the position of the sensor mass (2) relative to the sensor housing (1). The detection device has first capacitor electrodes, which are provided on the sensor mass (2), and second capacitor electrodes which, inside the sensor housing (1), are arranged opposite the first capacitor electrodes in a slightly interspaced manner while forming a narrow gap (3, 4). According to the invention, drainage structures (5; 6; 7; 8) are provided on one or more surfaces, ...

Electronic device and method for manufacturing the same

An Al film is formed on a cap wafer and the Al film is patterned into a ring-shaped film. Dry etching is performed by using the ring-shaped film as a mask to form a drum portion enclosing a recess portion to provide a vacuum dome. After forming a depth of cut into the substrate portion of the cap wafer, the cap wafer is placed on a main body wafer having an infrared area sensor formed thereon. Then, the ring-shaped film of the cap wafer and the ring-shaped film of the main body wafer are joined to each other by pressure bonding to form a ring-shaped joining portion.

Terminal assembly structure of MEMS microphone

The present disclosure provides a terminal assembly structure of a MEMS microphone, including a signal let out board disposed at a terminal and a silicon microphone disposed on the signal let out board. The silicon microphone includes a housing, a substrate forming an accommodation space with the housing, an MEMS chip and a waterproof member. The substrate is configured with a sound inlet connected to the outside. The waterproof member is sandwiched between the MEMS chip and the substrate. A position where the signal let out board corresponds to the silicon microphone is configured with an accommodation hole. The housing is accommodated in the accommodation hole. The substrate abuts a surface of the signal let out board and covers the accommodation hole. A surface of the substrate where the housing is assembled, is provided with at least one pad electrically connected with the signal let out board.

MEMS DEVICE

According to one embodiment, a MEMS device includes a MEMS element including a movable portion and provided on a substrate, a first protective film provided above the substrate and the MEMS element while shaping a cavity to accommodate the MEMS element, a sealing layer configured to cover the first protective film and a second protective film provided on the sealing layer. An outer end of the protective film is located on an outer side of an end of the cavity on the substrate, and the ratio between distance A defined from the outer end of the sealing layer to the end of the cavity and thickness B of the first protective film, B/A, is set in a range of 0.25 to 0.52.

Stacked die package for MEMS resonator system

In a packaging structure for a microelectromechanical-system (MEMS) resonator system, a resonator-control chip is mounted on a lead frame having a plurality of electrical leads, including electrically coupling a first contact on a first surface of the resonator-control chip to a mounting surface of a first electrical lead of the plurality of electrical leads through a first electrically conductive bump. A MEMS resonator chip is mounted to the first surface of the resonator-control chip, including electrically coupling a contact on a first surface of the MEMS resonator chip to a second contact on the first surface of the resonator-control chip through a second electrically conductive bump. The MEMS resonator chip, resonator-control chip and mounting surface of the first electrical lead are enclosed within a package enclosure that exposes a contact surface of the first electrical lead at an external surface of the packaging structure.

Multiple silicon trenches forming method for MEMS sealing cap wafer and etching mask structure thereof

A multiple silicon trenches forming method and an etching mask structure, the method comprises: step S11, providing a MEMS sealing cap silicon substrate (100); step S12, forming n stacked mask layers (101, 102, 103) on the MEMS sealing cap silicon substrate (100), after forming each mask layer, photolithographing and etching the mask layer and all other mask layers beneath the same to form a plurality of etching windows (D1, D2, D3); step S13, etching the MEMS sealing cap silicon substrate by using the current uppermost mask layer and a layer of mask material beneath the same as a mask; step S14, removing the current uppermost mask layer; step S15, repeating the step S13 and the step S14 until all the n mask layers are removed. The present invention can form a plurality of deep trenches with high aspect ratio on the MEMS sealing cap silicon substrate using conventional semiconductor processes, avoiding the problem that the conventional spin coating cannot be conducted on a sealing cap wafer ...

Energy storage structure, method of manufacturing a support structure for same, and microelectronic assembly and system containing same

An energy storage structure includes an energy storage device containing at least one porous structure (110, 120, 510, 1010) that contains multiple channels (111, 121), each one of which has an opening (112, 122) to a surface (115, 116, 515, 516, 1015, 1116) of the porous structure, and further includes a support structure (102, 402, 502, 1002) for the energy storage device. In a particular embodiment, the porous structure and the support structure are both formed from a first material, and the support structure physically contacts a first portion (513, 813, 1213) of the energy storage device and exposes a second portion (514, 814, 1214) of the energy storage device.

CMOS ultrasonic transducers and related apparatus and methods

CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.

Chip package and method for forming the same

Embodiments of the present invention provide a chip package including: a semiconductor substrate having a first surface and a second surface; a device region formed in the semiconductor substrate; a dielectric layer disposed on the first surface; and a conducting pad structure disposed in the dielectric layer and electrically connected to the device region; a cover substrate disposed between the chip and the cover substrate, wherein the spacer layer, a cavity is created an surrounded by the chip and the cover substrate on the device region, and the spacer layer is in direct contact with the chip without any adhesion glue disposed between the chip and the spacer layer.

Verfahren zum Versiegeln einer elektrischen Verbindung in einer Halbleiteranordnung

Mikrostrukturbauelement und Verfahren zu dessen Herstellung

Es wird ein Konzept für ein Mikrostrukturbauelement mit einem Schichtaufbau vorgeschlagen, das die Realisierung von Bauelementstrukturen mit einer Schichtdicke von mehr als 50 mum und sogar mehr als 100 mum ermöglicht. Dieses Konzept sieht außerdem eine Verkappung der Bauelementstruktur vor, die einen Vakuumeinschluss der Bauelementstruktur bei hermetisch dichter elektrischer Anbindung ermöglicht. DOLLAR A Dazu umfasst der Schichtaufbau des Mikrostrukturbauelements einen Träger (1) mit mindestens einer Glasschicht, insbesondere einer Pyrex-Schicht, eine in einer Siliziumschicht ausgebildete Bauelementstruktur (10), die mit der Glasschicht verbunden ist, und eine Kappe (20), die über der Bauelementstruktur (10) angeordnet ist und ebenfalls mit der Glasschicht verbunden ist.

Packaging for MEMS transducers

PROCEDURE FOR PRODUCING A GIVEN INTERNAL PRESSURE IN A CAVITY OF A SEMICONDUCTOR COMPONENT

Methods for producing packaged integrated circuit devices and packaged integrated circuit devices produced thereby

Methods and apparatus for a vertically-integrated sensor structure

Transducer module, including the device of this module and method for making the module

Gas-tight sealing material for the lid and the electronic component housing package for

PROCESS AND ZONE OF SEALING BETWEEN TWO SUBSTRATES Of a MICROSTRUCTURE

PROCESS OF CONDITIONING OF MICROCOMPONENTS AND TOGETHER OF MICROCOMPONENTS WHILE RESULTING

WAFER LEVEL MICROELECTRONIC PACKAGING WITH DOUBLE ISOLATION

A microelectronic package may include front and rear covers (46', 60') overlying the front and rear surfaces of a microelectronic element (22') such as an infrared sensor and spaces between the microelectronic element and the covers to provide thermal isolation. A sensing unit including a microelectronic package may include a reflector (76) spaced from the front cover to provide an analyte space, and the microelectronic element may include an emitter (28) and a detector (30) so that radiation directed from the emitter will be reflected by the sensor to the detector, and such radiation will be affected by the properties of the analyte in the analyte space. Such a unit provides a compact, economical chemical sensor. Other packages include elements such as valves (515, 521) for passing fluids into and out of the spaces within the package itself.

A METHOD FOR MAKING A MICROMECHANICAL DEVICE BY USING A SACRIFICIAL SUBSTRATE

A method is disclosed for forming a micromechanical device. The method includes fully or partially forming one or more micromechanical structures multiple times on first substrate (5a). A second substrate is bonded onto the first substrate so a to cover the multiple areas each having one or more micromechanical structures, so as to form a substrate assembly. The substrate assembly is then separated into individual dies, each die having the one or more micromechanical structures held on a portion (21) of the first substrate, with a portion of the second substrate bonded to the first substrate portion. Finally, the second substrate portion is removed from each die (3a-3d) to expose the one or more micromechanical structures on the first substrate portion. The invention is also directed to a method for forming a micromechanical device, including: forming one or more micromechanical structures in one or more areas on a first substrate; bonding caps onto the first substrate so as to cover the ...

FLEXIBLE SKIN INCORPORATING MEMS TECHNOLOGY

A flexible skin formed of silicon islands (222) encapsulated in a polyimide film (214, 224). The silicon islands (222) preferably include a MEMS device and are connected together by a polyimide film (214, 222) (preferably about 1-100 'mu'm thick). To create the silicon islands (222), silicon wafers (202) are etched to a desirable thickness (preferably about 10-500 'mu'm) by Si wet etching and then patterned from the back side (200) by reactive ion etching (RIE).

HERMETICALLY SEALED PACKAGE FOR OPTICAL, ELECTRONIC, OPTO-ELECTRONIC AND OTHER DEVICES

Techniques are disclosed for hermetically sealing one or more devices within a package. According to one aspect, a lid is attached to a substrate on which one or more devices are provided such that the devices are encapsulated within an area defined by the substrate and the lid. A substance, such as a lubricant or gas, is introduced via one or more through-holes in the lid to a region that is separated from the devices by a wall having at least one opening through which the substance can pass to the devices. The through-hole then may be hermetically sealed, for example, using a local heating process that does not degrade the lubricant or other substance.

MINIATURE MICRODEVICE PACKAGE AND PROCESS FOR MAKING THEREOF

The present invention is concerned with a miniature microdevice package (37) and a process of making thereof. The package (37) has a miniature frame substrate (38) made of a material selected form the group including: ceramic, metal and a combination of ceramic and metal. The miniature frame substrate (38) has a spacer (39) delimiting a hollow (40). The package (37) also includes a microdevice die (41) having a microdevice substrate (44), a microdevice (45) integrated on the microdevice substrate (44), bonding pads (49) integrated on the microdevice substrate (44), and electrical conductors integrated in the microdevice substrate (44) for electrically connecting the bonding pads (49) with the microdevice (45). The microdevice die (41) is mounted on the spacer (39) to form a chamber (48). The microdevice (45) is located within the chamber (48). The bonding pads (49) are located outside of the chamber (48).

Method and structure of MEMS PLCSP fabrication

A method and structure for a PLCSP (Package Level Chip Scale Package) MEMS package. The method includes providing a MEMS chip having a CMOS substrate and a MEMS cap housing at least a MEMS device disposed upon the CMOS substrate. The MEMS chip is flipped and oriented on a packaging substrate such that the MEMS cap is disposed above a thinner region of the packaging substrate and the CMOS substrate is bonding to the packaging substrate at a thicker region, wherein bonding regions on each of the substrates are coupled. The device is sawed to form a package-level chip scale MEMS package.

SEMICONDUCTOR DEVICE PACKAGE

The present invention relates to a semiconductor device package, comprising a carrier, a first semiconductor device, a second semiconductor device, a plurality of conductive elements, a pre-mold and a lid. The first semiconductor device is electrically connected to the carrier. The second semiconductor device is disposed above the first semiconductor device. The conductive elements are used for electrically connecting the second semiconductor device and the carrier. The pre-mold and the carrier form an accommodating space for accommodating the first semiconductor device, the second semiconductor device and the conductive elements. The lid is adhered to the pre-mold for covering the opening of the pre-mold. As a result, the pre-mold is formed by molding, the manufacture process of the present invention is simpler than that of the conventional semiconductor device package.

Pressure sensor structure

A pressure sensor including a substrate having a diaphragm portion. A diaphragm-defining recess is recessed inwardly from one surface of the substrate to define the diaphragm portion between a bottom surface of the recess and an opposite surface of the substrate. A recess is disposed within the diaphragm portion. A pressure sensitive arrangement is disposed in the substrate, a detector portion of which is disposed within the recess formed within the diaphragm portion.

Micromachine package fabrication method

Micromachine chips are tested for validity while the micromachine chips are still in wafer form. Any defective micromachine chips are marked or otherwise identified. Coupons are attached to the micromachine chips. The coupons are attached only to the micromachine chips which have been tested and found to be good. In this manner, waste of coupons is avoided and labor associated with attaching the coupons to defective micromachine chips is saved.

DEVICE WITH TERMINAL-CONTAINING SENSOR

An apparatus includes a sensor assembly and a housing assembly. The sensor assembly may have (i) a package surrounding a sensor and (ii) a plurality of terminals integrated with the package. The housing assembly may have (i) a first cavity configured to receive the sensor assembly, (ii) a second cavity configured to receive an electrical connector, (iii) a plurality of ports in communication between the first cavity and the second cavity and (iv) a location feature configured to orient the housing assembly while the housing assembly is mounted to a structure. At least one rib may apply at least one force on the sensor assembly to hold the sensor assembly in the first cavity. The sensor may be outside a plane of the force. The terminals may extend through the ports from the first cavity to the second cavity.

Latching micro magnetic relay packages and methods of packaging

A method of forming a hermetically sealed MEMS package includes a step of providing a supporting GaAs substrate with at least one contact for the MEMS device on the surface of the supporting substrate and forming a cantilever on the surface of the supporting substrate positioned to come into electrical engagement with the contact in one orientation. A metal seal ring is fixed to the surface of the supporting substrate circumferentially around the contact and the cantilever. A cavity is etched in a silicon chip to form a cap member. A metal seal ring is fixed to the cap member around the cavity. The package is hermetically sealed by reflowing a solder alloy, positioned between the two seal rings, in an inert environment without the use of flux.

Methods for producing packaged integrated circuit devices & packaged integrated circuit devices produced thereby

This invention discloses a crystalline substrate based device including a crystalline substrate having formed thereon a microstructure; and at least one packaging layer which is sealed over the microstructure by means of an adhesive and defines therewith at least one gap between the crystalline substrate and the at least one packaging layer. A method of producing a crystalline substrate based device is also disclosed.

Encapsulation structure including a mechanically reinforced cap and with a getter effect

A microdevice encapsulation structure arranged in at least one cavity formed between a substrate and a cap rigidly attached to the substrate is provided, the cap including one layer of a first material, one face of which forms an inner wall of the cavity, and mechanical reinforcement portions rigidly attached at least to and partly covering said face, having gas absorption and/or adsorption properties, in which the Young's modulus of a second material of the mechanical reinforcement portions is higher than that of the first material, wherein each of said portions includes at least one first layer of the second material, and at least one second layer of a third metallic getter material such that the first layer of the second material is arranged between the layer of the first material and the second layer of the third material and/or is covered by the second layer of the third material.

Packaged acoustic and electromagnetic transducer chips

Various embodiments of packaged chips and ways of fabricating them are disclosed herein. One such packaged chip disclosed herein includes a chip having a front face, a rear face opposite the front face, and a device at one of the front and rear faces, the device being operable as a transducer of at least one of acoustic energy and electromagnetic energy, and the chip including a plurality of bond pads exposed at one of the front and rear faces. The packaged chip includes a package element having a dielectric element and a metal layer disposed on the dielectric element, the package element having an inner surface facing the chip and an outer surface facing away from the chip. The metal layer includes a plurality of contacts exposed at at least one of the inner and outer surfaces, the contacts conductively connected to the bond pads. The metal layer further includes a first opening for passage of the at least one of acoustic energy and electromagnetic energy in a direction of at least one ...

ENCLOSED CAVITY STRUCTURES

An example of a cavity structure comprises a cavity substrate comprising a substrate surface, a cavity extending into the cavity substrate, the cavity having a cavity bottom and cavity walls, and a cap disposed on a side of the cavity opposite the cavity bottom. The cavity substrate, the cap, and the one or more cavity walls form a cavity enclosing a volume. A component can be disposed in the cavity and can extend above the substrate surface. The component can be a piezoelectric or a MEMS device. The cap can have a tophat configuration. The cavity structure can be micro-transfer printed from a source wafer to a destination substrate. 1. A cavity structure , comprising:a cavity substrate comprising a substrate surface;a cavity extending into the cavity substrate away from the substrate surface, the cavity having one or more cavity walls; anda cap disposed on or over the cavity substrate, wherein (i) the cap is disposed on the substrate surface, or (ii) the cap is disposed on a structure disposed on the substrate surface,wherein the cavity substrate, the cap, and the one or more cavity walls form at least a portion of an enclosed cavity that encloses a volume.2. The cavity structure of claim 1 , wherein the cavity comprises a cavity bottom disposed in the cavity substrate that claim 1 , in part claim 1 , encloses the volume.3. The cavity structure of claim 1 , wherein at least a portion of the one or more cavity walls are disposed on and extend away from the substrate surface toward the cap.4. The cavity structure of claim 1 , comprising a destination substrate claim 1 , the cavity substrate is disposed on the destination substrate claim 1 , and wherein the cavity extends through the cavity substrate to the destination substrate and at least a portion of the destination substrate forms a cavity bottom.5. The cavity structure of claim 4 , wherein the cap is disposed on the destination substrate or a layer disposed on the destination substrate.6. The cavity structure of ...

Low cost window production for hermetically sealed optical packages

Disclosed embodiments demonstrate batch processing methods for producing optical windows for microdevices. The windows protect the active elements of the microdevice from contaminants, while allowing light to pass into and out of the hermetically sealed microdevice package. Windows may be batch produced, reducing the cost of production, by fusing multiple metal frames to a single sheet of glass. In order to allow windows to be welded atop packages, disclosed embodiments keep a lip of metal without any glass after the metal frames are fused to the sheet of glass. Several techniques may accomplish this goal, including grinding grooves in the glass to provide a gap that prevents fusion of the glass to the metal frames along the outside edges in order to form a lip. The disclosed batch processing techniques may allow for more efficient window production, taking advantage of the economy of scale.

3d integrated electronic device structure including increased thermal dissipation capabilities

A microelectronic device structure including increased thermal dissipation capabilities. The structure including a three-dimensional (3D) integrated chip assembly that is flip chip bonded to a substrate. The chip assembly including a device substrate including an active device disposed thereon. A cap layer is phsyically bonded to the device substrate to at least partially define a hermetic seal about the active device. The microelectronic device structure provides a plurality of heat dissipation paths therethrough to dissipate heat generated therein.

Component and Method for Producing a Component

A component includes a substrate, a chip and a frame. The frame is bonded to the substrate and the chip rests on the frame. A sealing layer on parts of the frame and the chip is designed to hermetically seal a volume enclosed by the substrate, the chip and the metal frame. 117-. (canceled)18. A component comprising:a substrate;a frame connected to the substrate;a chip disposed on the frame; anda sealing layer on parts of the frame and parts of the chip, sealing layer hermetically sealing a volume enclosed by the substrate, the chip and the frame.19. The component according to claim 18 , wherein the sealing layer constitutes an inkjet printing structure and comprises a polymer or metal particles or a mixture of polymer and metal particles.20. The component according to claim 18 , wherein the sealing layer comprises metallic nanoparticles having diameters of less than 10 nm.21. The component according to claim 18 , wherein the sealing layer completely encompasses a connection of the frame and of the chip.22. The component according to claim 18 , wherein the frame has a planar surface so that the chip bears homogeneously on the frame.23. The component according to claim 18 , wherein the chip is interconnected with the substrate via a bump connection.24. The component according to claim 23 , wherein the bump connection has a coefficient of thermal expansion that is greater than a coefficient of thermal expansion of the frame.25. The component according to claim 18 , wherein the substrate and/or the chip has a functionalized surface.26. The component according to claim 25 , wherein the functionalized surface comprises functional silane groups.27. The component according to claim 19 , wherein the sealing layer comprises claim 19 , in sections claim 19 , only the polymer or the metal particles.28. The component according to claim 19 , wherein the sealing layer comprises only the polymer or only the metal particles.29. The component according to claim 18 , wherein the chip ...

CAVITY PACKAGE DESIGN

A semiconductor device. The device including a substrate having electrical traces, at least one of a MEMS die and a semiconductor chip mounted on the substrate, and a spacer. The spacer has a first end connected to the substrate and includes electrical interconnects coupled to the electrical traces. The at least one MEMS die and a semiconductor chip are contained within the spacer. The spacer and substrate form a cavity which contains the at least one MEMS die and a semiconductor chip. The cavity forms an acoustic volume when the semiconductor device is mounted to a circuit board via a second end of the spacer. 1. A semiconductor device , the device comprising:a substrate having electrical traces;at least one of a MEMS die and a semiconductor chip mounted on the substrate; anda spacer having a first end connected to the substrate and including electrical interconnects coupled to the electrical traces, the at least one MEMS die and a semiconductor chip contained within the spacer;wherein the spacer and substrate form a cavity which contains the at least one MEMS die and a semiconductor chip, the cavity forming an acoustic volume when the semiconductor device is mounted to a circuit board via a second end of the spacer, the second end opposite the first end.2. The semiconductor device of claim 1 , wherein the electrical interconnects are embedded in the spacer.3. The semiconductor device of claim 1 , further comprising a cover mounted on the second end of the spacer.4. The semiconductor device of claim 3 , wherein the substrate claim 3 , the spacer claim 3 , and the cover form an acoustic volume.5. The semiconductor device of claim 4 , wherein when a MEMS microphone is mounted in the cavity claim 4 , the semiconductor device is capable of being tested without mounting the semiconductor device to a circuit board.6. The semiconductor device of claim 1 , wherein a height of the spacer is only as large as necessary to cover the at least one of a MEMS die and a ...

Package structure and packaging method

A package structure and a packaging method for manufacturing the package structure are provided. The package structure comprises a cover wafer, a device wafer and a bonding material. The cover wafer has an optical element, and a surface of the cover wafer is defined with a height difference that is greater than 20 micrometers. The bonding material has a width and continuously surrounds the optical device, and is disposed between the cover wafer and the device wafer, in which the width is between 10 micrometers and 150 micrometers. The bonding material hermetically bonds the cover wafer and the device wafer to make a leakage rate of the package structure less than 5e −8 atm-cc/sec.

ENERGY STORAGE STRUCTURE, METHOD OF MANUFACTURING A SUPPORT STRUCTURE FOR SAME, AND MICROELECTRONIC ASSEMBLY AND SYSTEM CONTAINING SAME

An energy storage structure includes an energy storage device containing at least one porous structure () that contains multiple channels (), each one of which has an opening () to a surface () of the porous structure, and further includes a support structure () for the energy storage device. In a particular embodiment, the porous structure and the support structure are both formed from a first material, and the support structure physically contacts a first portion () of the energy storage device and exposes a second portion () of the energy storage device. 132-. (canceled)33. An energy storage structure comprising:an energy storage device comprising at least one porous structure, wherein the porous structure contains multiple channels, each one of which has an opening to a surface of the porous structure; anda support structure for the energy storage device.34. The energy storage structure of wherein:at least some of the channels extend from the surface of the porous structure and completely through the porous structure to an opposing second surface of the porous structure.35. An energy storage structure comprising:an energy storage device comprising at least one porous structure, the porous structure being formed from a first material, wherein the porous structure contains multiple channels, each one of which has an opening to a first surface of the porous structure; anda support structure for the energy storage device, the support structure formed from the first material, wherein the support structure physically contacts a first portion of the energy storage device and exposes a second portion of the energy storage device.36. The energy storage structure of wherein:at least some of the channels extend from the first surface of the porous structure and completely through the porous structure to an opposing second surface of the porous structure.37. The energy storage structure of wherein:the support structure physically contacts the second surface of the porous ...

Chip embedded packages and methods for forming a chip embedded package

A chip embedded package is provided, the chip embedded package including: a plurality of dies; wherein a first die of the plurality of dies is a chip implementing a first sensor technology, and wherein a second die of the plurality of dies is a chip implementing a second sensor technology; and wherein the plurality of dies are molded with an encapsulation material; wherein at least one of the first die and the second die includes a film interconnect.

Chip package and method for forming the same

An embodiment of the invention provides a chip package including: a first semiconductor substrate; a second semiconductor substrate disposed on the first semiconductor substrate, wherein the second semiconductor substrate includes a lower semiconductor layer, an upper semiconductor layer, and an insulating layer located between the lower semiconductor layer and the upper semiconductor layer, and a portion of the lower semiconductor layer electrically contacts with at least a pad on the first semiconductor substrate; a signal conducting structure disposed on a lower surface of the first semiconductor substrate, wherein the signal conducting structure is electrically connected to a signal pad on the first semiconductor substrate; and a conducting layer disposed on the upper semiconductor layer of the second semiconductor substrate and electrically contacted with the portion of the lower semiconductor layer electrically contacting with the at least one pad on the first semiconductor substrate.

BONDED WAFER STRUCTURES

The present disclosure includes bonded wafer structures and methods of forming bonded wafer structures. One example of a forming a bonded wafer structure includes providing a first wafer () and a second wafer () to be bonded together via a bonding process that has a predetermined wafer gap () associated therewith, and forming a mesa () on the first wafer () prior to bonding the first wafer () and the second wafer () together, wherein a height () of the mesa () is determined based on a target element gap () associated with the bonded wafer structure. 1. A method of forming a bonded wafer structure , the method comprising:providing a first wafer and a second wafer to be bonded together via a bonding process that has a predetermined wafer gap associated therewith; andforming a mesa on the first wafer prior to bonding the first wafer and the second wafer together, wherein a height of the dielectric mesa is determined based on a target element gap associated with the bonded wafer structure.2. The method of claim 1 , including forming a number of electrode elements on the mesa.3. The method of claim 1 , including forming a conductive connection between at least one of the number of electrode elements and a conductive element located below a bottom surface of the mesa without using a via formed through the mesa.4. The method of claim 1 , including a number of standoff elements associated with the bonding process claim 1 , and wherein the method includes forming at least one of the number of standoff elements on the mesa.5. The method of claim 1 , including forming an electrode array on the mesa.6. The method of claim 1 , wherein increasing the height of the mesa increases the target element gap.7. The method of claim 1 , wherein increasing the height of the mesa decreases the target element gap.8. The method of claim 1 , wherein forming the mesa includes:forming an etch stop material on a surface of the first wafer;forming a dielectric material on the etch stop material, a ...

PACKAGED DEVICE EXPOSED TO ENVIRONMENTAL AIR AND LIQUIDS AND MANUFACTURING METHOD THEREOF

A packaged device, wherein at least one sensitive portion of a chip is enclosed in a chamber formed by a package. The package has an air-permeable area having a plurality of holes and a liquid-repellent structure so as to enable passage of air between an external environment and the chamber and block the passage of liquids. 1. A packaged device , comprising:a chip; anda package body delimiting a chamber, at least a portion of the chip being located in the chamber, the package body including an air-permeable area having a plurality of holes and a liquid-repellent structure that together enable passage of air between an external environment and the chamber and block passage of liquids.2. The packaged device according to claim 1 , wherein the plurality of holes have a maximum width between 0.1 and 100 μm and have a pitch between 0.3 and 300 μm.3. The packaged device according to claim 1 , wherein the package includes a protective cap delimiting an upper portion the chamber and defines an outer surface.4. The packaged device according to claim 3 , wherein the liquid-repellent structure includes a rough nanostructure on the outer surface of the protective cap.5. The packaged device according to claim 4 , wherein the rough nanostructure has a roughness value between 1 and 3 μm and a maximum deviation between 2 and 20 μm.6. The packaged device according to claim 3 , wherein the outer surface of the protective cap has a plurality of microreliefs claim 3 , the microreliefs having a regular structure and being uniformly arranged on the outer surface of the protective cap.7. The packaged device according to claim 1 , wherein the liquid-repellent structure includes a hydrophobic/lipophobic layer that covers the protective cap and is provided with openings overlying the holes.8. The packaged device according to claim 7 , wherein the hydrophobic/lipophobic layer includes at least one of Teflon claim 7 , silicon carbide claim 7 , resist claim 7 , metal claim 7 , polymer claim 7 , ...

Electronic systems with through-substrate interconnects and mems device

Disclosed are systems, methods, and computer program products for electronic systems with through-substrate interconnects and mems device. An interconnect formed in a substrate having a first surface and a second surface, the interconnect includes: a bulk region; a via extending from the first surface to the second surface; an insulating structure extending through the first surface into the substrate and defining a closed loop around the via, wherein the insulating structure comprises a seam portion separated by at least one solid portion; and an insulating region extending from the insulating structure toward the second surface, the insulating region separating the via from the bulk region, wherein the insulating structure and insulating region collectively provide electrical isolation between the via and the bulk region.

MICROPHONE AND MANUFACTURING METHOD THEREOF

A microphone includes a substrate having a first sound hole formed therein, a sound-sensing module mounted on the substrate so as to be aligned with the first sound hole, a signal-processing chip mounted on the substrate so as to be electrically connected to the sound-sensing module, a cover mounted on the substrate so as to accommodate the sound-sensing module therein and including a filter accommodation portion having a second sound hole formed therein, and a sound delay filter elastically accommodated in the filter accommodation portion so as to be aligned with the second sound hole. The microphone has a simplified structure, and can be manufactured to as to improve the stability and reliability thereof. 1. A microphone , comprising:a substrate having a first sound hole formed therein;a sound-sensing module mounted on the substrate, the sound-sensing module being aligned with the first sound hole;a signal-processing chip mounted on the substrate, the signal-processing chip being electrically connected to the sound-sensing module;a cover mounted on the substrate, the cover accommodating the sound-sensing module therein, the cover comprising a filter accommodation portion having a second sound hole formed therein; anda sound delay filter elastically accommodated in the filter accommodation portion, the sound delay filter being aligned with the second sound hole.2. The microphone according to claim 1 , wherein the sound delay filter comprises:a filter substrate having a filter hole formed therein; andan elastic pattern integrally formed with at least one end portion of the filter substrate, the elastic pattern being elastically disposed between an inner wall of the filter accommodation portion and the filter substrate.3. The microphone according to claim 2 , wherein the elastic pattern comprises:a contact pattern spaced apart from the end portion of the filter substrate, the contact pattern being in contact with the inner wall of the filter accommodation portion; ...

METHOD FOR PRODUCING A SEMICONDUCTOR MODULE

The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules. 1. A method for producing a semiconductor module , the method comprising:fabricating a semiconductor panel comprising a plurality of semiconductor devices;fabricating a cap panel comprising a plurality of caps;bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices; andsingulating the bonded panels into a plurality of semiconductor modules.2. The method according to claim 1 , further comprising:fabricating the cap panel comprises forming.3. The method according to claim 2 , whereinfabricating the cap panel comprises molding.4. The method according to claim 1 , whereineach one of the semiconductor devices comprises a sensor device.5. The method according to claim 4 , whereineach one of the semiconductor devices comprises one or more of a pressure sensor, a shock sensor, an acceleration sensor, a temperature sensor, a gas sensor, a humidity sensor, a magnetic field sensor, an electric field sensor, or an optical sensor.6. The method according to claim 1 , whereineach one of the semiconductor devices comprises a MEMS device.7. The method according to claim 1 , whereinthe semiconductor panel is a reconfigured wafer obtained by processing a plurality of semiconductor chips in a semiconductor wafer, dicing out the semiconductor chips, and embedding the semiconductor chips in an encapsulant.8. The method according to claim 1 , further comprising:fabricating the cap panel comprises providing the caps or portions thereof with an electrical conductivity.9. A semiconductor module claim 1 , comprising:a semiconductor device;anda cap disposed above ...

Trapped Sacrificial Structures And Methods Of Manufacturing Same Using Thin-Film Encapsulation

Trapped sacrificial structures and thin-film encapsulation methods that may be implemented to manufacture trapped sacrificial structures such as relative humidity sensor structures, and spacer structures that protect adjacent semiconductor structures extending above a semiconductor die substrate from being contacted by a molding tool or other semiconductor processing tool in an area of a die substrate adjacent the spacer structures. 1. A method of forming a trapped sacrificial structure , comprising:providing a MEMS region over a substrate, the MEMS region including a MEMS structural layer;forming a first sacrificial layer over the MEMS structural layer;removing a part of the first sacrificial layer to leave at least a remaining portion of the first sacrificial layer disposed over the MEMS structural layer;forming a second sacrificial layer over the remaining portion of the first sacrificial layer;removing a part of the second sacrificial layer to leave a portion of the second sacrificial layer;forming an upper microshell layer over the remaining portions of the first and second sacrificial layers;creating one or more upper release holes in the upper microshell layer; andremoving at least a part of the remaining portions of the first and/or second sacrificial layers through the upper release holes without removing a first sacrificial layer portion and/or a second sacrificial layer portion under the upper microshell layer to form at least one trapped sacrificial structure under the upper microshell layer.2. The method of claim 1 , further comprising:forming the first sacrificial layer over and in contact with the MEMS structural layer;forming the second sacrificial layer over and in contact with the remaining portion of the first sacrificial layer;removing a part of the second sacrificial layer to leave a portion of the second sacrificial layer over and contacting the remaining portion of the first sacrificial layer;forming the upper microshell layer over the ...

SELF-DESTRUCTING CHIP

Embodiments herein provide for a self-destructing chip including at least a first die and a second die. The first die includes an electronic circuit, and the second die is composed of one or more polymers that disintegrates at a first temperature. The second die defines a plurality of chambers, wherein a first subset of the chambers contain a material that reacts with oxygen in an exothermic manner. A second subset of the chambers contain an etchant to etch materials of the first die. In response to a trigger event, the electronic circuit is configured to expose the material in the first subset of chambers to oxygen in order to heat the second die to at least the first temperature, and is configured to release the etchant from the second subset of the chambers to etch the first die. 1. A self-destructing chip comprising:a first die including an electronic circuit;a second die composed of one or more polymers that disintegrate at a first temperature, the second die defining a plurality of chambers, wherein a first subset of the chambers contain a material that reacts with oxygen in an exothermic manner, wherein a second subset of the chambers contain an etchant to etch materials of the first die, expose the material in the first subset of chambers to oxygen in order to heat the second die to at least the first temperature; and', 'release the etchant from the second subset of the chambers to etch the first die., 'wherein in response to a trigger event, the electronic circuit is configured to2. The self-destructing chip of claim 1 , wherein each of the first subset of chambers has an oxygen and humidity barrier sheet (OHBS) covering an opening of each of the first subset of chambers claim 1 , the OHBS coupled between two electrodes claim 1 , such that each of the first subset of chambers can be opened by passing current through the OHBS between the two electrodes causing the OHBS to delaminate or crack.3. The self-destructing chip of claim 2 , wherein each OHBS is ...

ENCAPSULATION STRUCTURE INCLUDING A MECHANICALLY REINFORCED CAP AND WITH A GETTER EFFECT

A structure () for encapsulating at least one microdevice () produced on and/or in a substrate () and positioned in at least one cavity () formed between the substrate and a cap () rigidly attached to the substrate, in which the cap includes at least: 1. The structure for encapsulating at least one microdevice produced on and/or in a substrate and positioned in at least one cavity formed between the substrate and a cap rigidly attached to the substrate , in which the cap includes at least:one layer of a first material, one face of which forms an inner wall of the cavity, andmechanical reinforcement portions rigidly connected to at least the said face of the layer of the first material, partly covering the said face of the layer of the first material, and having gas absorption and/or adsorption properties, where these mechanical reinforcement portions include at least one second material, the Young's modulus of which is higher than that of the first material.2. An encapsulation structure according to claim 1 , in which the second material is a metallic getter material.3. An encapsulation structure according to claim 1 , in which each of the mechanical reinforcement portions includes at least one first layer of the second material claim 1 , and at least one second layer of a third metallic getter material such that the first layer of the second material is positioned between the layer of the first material and the second layer of the third material and/or is covered by the second layer of the third material.4. An encapsulation structure according to claim 1 , in which each of the mechanical reinforcement portions includes a stack of layers of which at least two of the said layers form a bimetallic strip exerting on the cap a force directed to the exterior of the cavity.5. An encapsulation structure according to claim 1 , in which the material is made of Si and/or silica and/or silicon nitride claim 1 , and the second material is made of Cr and/or Ti and/or Co and/or ...

MEMS isolation structures

A device may comprise a substrate formed of a first semiconductor material and a trench formed in the substrate. A second semiconductor material may be formed in the trench. The second semiconductor material may have first and second portions that are isolated with respect to one another and that are isolated with respect to the first semiconductor material. 1. A device comprising:a substrate having a first outer surface and a second outer surface opposite said first outer surface;a channel formed in said substrate, said channel having a first opening defined by said first outer surface of said substrate;circuitry material disposed in said channel; anda gap formed in said circuitry material in said channel, said gap separating said circuitry material into a first region and a second region; and whereinsaid first region of said circuitry material is mechanically isolated from said second region of said circuitry material such that said first region of said circuitry material is moveable relative to said second region of said circuitry material.2. The device of claim 1 , wherein at least one of said first region of said circuitry material and said second region of said circuitry material extends over said first outer surface of said substrate.3. The device of claim 1 , wherein said first region of said circuitry material and said second region of said circuitry material are electrically isolated from one another.4. The device of claim 1 , wherein said first region of said circuitry material is mechanically isolated from at least a portion of said substrate.5. The device of claim 1 , wherein said channel includes a second opening defined by said second outer surface of said substrate.6. The device of claim 5 , wherein said second opening of said channel is formed by thinning said substrate from said second outer surface.7. The device of claim 5 , wherein:said substrate includes a first region and a second region;said first region of said substrate defines a portion of ...

SEMICONDUCTOR PACKAGE STRUCTURE

A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity. 1. A semiconductor package structure , comprising:a substrate having a first surface;a first chip over the first surface of the substrate; anda first spacer disposed between a backside surface of the first chip and the first surface of the substrate, wherein the backside surface of the first chip has a first portion connected to the first spacer and a second portion exposed from the first spacer.2. The semiconductor package structure of claim 1 , wherein the second portion of the backside surface of the first chip is exposed to an air cavity.3. The semiconductor package structure of claim 2 , wherein the first chip has a heat source region claim 2 , and the air cavity overlaps with a vertical projection area of the heat source region.4. The semiconductor package structure of claim 1 , further comprising:a second chip over the first chip and thermally conducting with a heat source region of the first chip.5. The semiconductor package structure of claim 4 , wherein the air cavity overlaps with a vertical projection area of the second chip.6. The semiconductor package structure of claim 4 , wherein the first chip is a control chip claim 4 , and the second chip is a microelectromechanical system (MEMS) oscillator chip.7. The semiconductor package structure of claim 1 , further comprising a second spaced disposed between the backside surface of the first chip and the first surface of the substrate claim 1 , wherein the first spacer and the second spacer are separated from each other.8. The semiconductor package structure of claim 7 , wherein the first spacer and the second spacer ...

METHOD FOR PRODUCING A SEMICONDUCTOR MODULE

The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules. 1. A semiconductor module comprising:a semiconductor device comprising a semiconductor body embedded within a first mold compound that defines molded sidewalls that surround an inner space, the semiconductor body including a membrane extending across a bottom of the inner space; anda cap connected to the molded sidewalls and extending across a top of the inner space, the cap including an electrically conductive material to electrically shield the semiconductor device.2. The semiconductor module of claim 1 , the cap comprising a mold compound claim 1 , wherein a surface of the cap forming an upper surface of the inner space are covered with a layer of electrically conductive material.3. The semiconductor module of claim 1 , where the cap is formed from and electrically conductive material.4. The semiconductor module of claim 1 , the semiconductor device comprising a microphone with the membrane comprising a microphone membrane such that the inner space forms a back volume of the microphone.5. The semiconductor module of claim 4 , the cap having a thickness claim 4 , wherein the thinner the cap the greater the volume of the back volume and a greater a signal-to-noise ratio of the microphone package.6. The semiconductor module of claim 1 , the semiconductor device comprising a sensor claim 1 , the sensor comprising one of a pressure sensor claim 1 , a shock sensor claim 1 , an acceleration sensor claim 1 , a temperature sensor claim 1 , a gas sensor claim 1 , a humidity sensor claim 1 , a magnetic field sensor claim 1 , an electric field sensor claim 1 , and an optical sensor.7. A microphone package comprising ...

SENSOR PACKAGE AND METHOD OF FORMING SAME

A method () of forming sensor packages () entails providing a sensor wafer () having sensors () formed on a side () positioned within areas () delineated by bonding perimeters (), and providing a controller wafer () having control circuitry () at one side () and bonding perimeters () on an opposing side (). The bonding perimeters () of the controller wafer () are bonded to corresponding bonding perimeters () of the sensor wafer () to form a stacked wafer structure () in which the control circuitry () faces outwardly. The controller wafer () is sawn to reveal bond pads () on the sensor wafer () which are wire bonded to corresponding bond pads () formed on the same side () of the wafer () as the control circuitry (). The structure () is encapsulated in packaging material () and is singulated to produce the sensor packages (). 120-. (canceled)21. A sensor package comprising:a sensor element die having a first side and a second side opposite said first side, said first side including a first sensor positioned within an area on said first side delineated by a first bonding perimeter, and said first side further including first bond pads positioned outside of said area;a controller element die having a third side and a fourth side opposite said third side, said third side including control circuitry and second bond pads, and said fourth side including a second bonding perimeter and sensor features, wherein said second bonding perimeter is bonded to said first bonding perimeter to form a stacked structure, and wherein said sensor features comprise functional components of said first sensor; andbond wires attached between corresponding ones of said first bond pads on said first side of said sensor element die and said second bond pads on said third side of said controller element die.22. The sensor package of wherein said sensor features include a cavity claim 21 , said cavity extending into said controller wafer from said fourth side such that said cavity is aligned with ...

TERMINAL ASSEMBLY STRUCTURE OF MEMS MICROPHONE

A terminal assembly structure of a MEMS microphone, including a signal let out board disposed at a terminal and a silicon microphone disposed at the signal let out board. The silicon microphone includes a housing, a substrate forming an accommodation space with the housing, and an MEMS chip accommodated in the accommodation space. A position of the substrate corresponding to the MEMS chip is disposed with a sound inlet connected to the outside, wherein a position where the signal let out board corresponding to the silicon microphone is disposed with an accommodation hole. The housing is accommodated in the accommodation hole. The substrate abuts a surface of the signal let out board and covers the accommodation hole. A surface of the substrate disposed with the housing is provided with a pad which is electrically connected with the signal let out board. 1. A terminal assembly structure of a MEMS microphone , comprising: a signal let out board disposed at a terminal and a silicon microphone disposed on the signal let out board , the silicon microphone comprising a housing , a substrate which form an accommodation space cooperatively with the housing , an ASIC chip and an MEMS chip both accommodated in the accommodation space , the ASIC chip being electrically connected to the substrate , the ASCI chip being electrically connected to the MEMS chip , a sound inlet communicated to outside is configured at a position of the substrate corresponding to the MEMS chip , wherein an accommodation hole is configured at a position of the signal let out board corresponds to the silicon microphone , the housing is accommodated in the accommodation hole , the substrate abuts a surface of the signal let out board and covers the accommodation hole , at least one pad is configured on a surface of the substrate where the housing is assembled , and the pad is electrically connected to the signal let out board.2. The terminal assembly structure of the MEMS microphone according to claim 1 ...

MEMS Devices and Methods of Forming Same

A microelectromechanical system (MEMS) device may include a MEMS structure over a first substrate. The MEMS structure comprises a movable element. Depositing a first conductive material over the first substrate and etching trenches in a second substrate. Filling the trenches with a second conductive material and depositing a third conductive material over the second conductive material and the second substrate. Bonding the first substrate and the second substrate and thinning a backside of the second substrate which exposes the second conductive material in the trenches. 1. A method of forming a microelectromechanical systems (MEMS) device comprising:forming a first dielectric layer on a first substrate;bonding a first wafer to the first dielectric layer;forming a first set of conductive electrodes over the first wafer;patterning the first wafer to have a movable element and a static element, the movable element capable of free movement in at least one axis;forming a first recess in a second substrate;forming a second set of conductive electrodes over the second substrate, at least one of the second set of conductive electrodes extending laterally into the first recess of the second substrate;bonding the second substrate to the first substrate using the first and second sets of conductive electrodes, wherein after the bonding, the first recess in the second substrate being interposed between the second substrate and the movable element in a plane orthogonal to a major surface of the first substrate; andforming a conductive via extending through the second substrate, the conductive via electrically coupled to at least one of the conductive electrodes of the first and second sets of conductive electrodes, the conductive via comprising polysilicon.2. The method of further comprising:forming a redistribution layer on a backside of the second substrate, the redistribution layer being in electrical and physical contact with the conductive via; andforming a contact bump on ...

USE OF METAL NATIVE OXIDE TO CONTROL STRESS GRADIENT AND BENDING MOMENT OF A RELEASED MEMS STRUCTURE

A MEMS device is formed by forming a sacrificial layer over a substrate and forming a first metal layer over the sacrificial layer. Subsequently, the first metal layer is exposed to an oxidizing ambient which oxidizes a surface layer of the first metal layer where exposed to the oxidizing ambient, to form a native oxide layer of the first metal layer. A second metal layer is subsequently formed over the native oxide layer of the first metal layer. The sacrificial layer is subsequently removed, forming a released metal structure. 1. A microelectronic-mechanical systems (MEMS) device , comprising:a substrate; a first metal layer;', 'a first native oxide layer of said first metal layer disposed at a top surface of said first metal layer; and', 'a second metal layer disposed on said first native oxide layer., 'a released metal structure attached to said substrate, in which a portion of said released metal structure is free of any direct contact with solid elements of said MEMS device, said released metal structure comprising2. The MEMS device of claim 1 , in which said released metal structure further comprises:a second native oxide layer of said second metal layer disposed at a top surface of said second metal layer; anda third metal layer disposed on said second native oxide layer.3. The MEMS device of claim 1 , in which said second metal level has a same composition as said first metal level.4. The MEMS device of claim 1 , in which said second metal level has a different composition from said first metal level.5. The MEMS device of claim 1 , in which said portion of said released metal structure which is free of any direct contact with solid elements of said MEMS device has a substantially flat shape.6. The MEMS device of claim 1 , in which said portion of said released metal structure which is free of any direct contact with solid elements of said MEMS device has a substantially convex shape.7. The MEMS device of claim 1 , in which said portion of said released ...

WAFER LEVEL PACKAGING OF MEMS

A MEMS device is formed by applying a lower polymer film to top surfaces of a common substrate containing a plurality of MEMS devices, and patterning the lower polymer film to form a headspace wall surrounding components of each MEMS device. Subsequently an upper polymer dry film is applied to top surfaces of the headspace walls and patterned to form headspace caps which isolate the components of each MEMS device. Subsequently, the MEMS devices are singulated to provide separate MEMS devices. 1. A microelectronic mechanical systems (MEMS) device , comprising:a substrate;a component disposed on the substrate;a headspace wall disposed on the substrate, surrounding the component, the headspace wall comprising a polymer material; anda headspace cap disposed on the headspace wall, the headspace cap comprising a dry film polymer material, the headspace wall and the headspace cap isolating the component in a headspace.2. The MEMS device of claim 1 , further comprising a pillar of the polymer material claim 1 , the pillar being disposed inside the headspace wall and separate from the headspace wall.3. The MEMS device of claim 1 , further comprising a fin of the polymer material claim 1 , the pillar being disposed inside the headspace wall and contiguous with the headspace wall.4. The MEMS device of claim 1 , wherein the headspace wall comprises epoxy.5. The MEMS device of claim 1 , wherein the headspace wall comprises polyimide.6. The MEMS device of claim 1 , wherein the headspace cap comprises epoxy.7. The MEMS device of claim 1 , further comprising mold compound disposed on the substrate claim 1 , the headspace wall and the headspace cap.8. A method of forming a first MEMS device claim 1 , comprising the steps of:forming a scribe line in a substrate, wherein the scribe line separates an area for said first MEMS device from an area for a second MEMS device;forming a first component of the first MEMS device on a top surface of the substrate in the area for the first MEMS ...

Hollow Package And Method For Manufacturing Same

A hollow package () includes a substrate (), an element (), a partition wall (), and a top plate () and has one or more closed hollow parts () that are covered by the substrate (), the partition wall (), and the top plate (), and the substrate (), the partition wall (), and the top plate () are sealed with a cured product of a sealing resin composition. The top plate () and the partition wall () are composed of an organic material, and the thickness of the top plate (), the thickness of the partition wall (), the width of the partition wall, and the maximum width of the hollow part () are each within respective predetermined ranges. The sealing resin composition comprises (A) an epoxy resin that includes one or more selected from the group consisting of an epoxy resin containing two epoxy groups in the molecule and an epoxy resin containing three or more epoxy resins in the molecule and (B) an inorganic filler. 1. A hollow package comprising:a substrate;one or more elements selected from the group consisting of a semiconductor element, a micro-electronic-mechanical systems (MEMS) component, and an electronic component and mounted on the substrate;a partition wall provided on an upper part of the substrate and surrounding an outer periphery of the one or more elements; anda top plate provided in contact with an upper surface of the partition wall and covering an upper part of the one or more elements,wherein one or more closed hollow parts that are each covered with the substrate, the partition wall, and the top plate are provided, and the substrate, the partition wall, and the top plate are sealed with a cured product of a sealing resin composition, andwherein the top plate and the partition wall are both comprised of an organic material,the top plate has a thickness of 10 μm or more and 50 μm or less,the partition wall has a thickness of 5 μm or more and 30 μm or less and has a width of 5 μm or more and 200 μm or less,the one or more closed hollow parts each have a ...

ENCLOSED CAVITY STRUCTURES

An example of a cavity structure comprises a cavity substrate comprising a substrate surface, a cavity extending into the cavity substrate, the cavity having a cavity bottom and cavity walls, and a cap disposed on a side of the cavity opposite the cavity bottom. The cavity substrate, the cap, and the one or more cavity walls form a cavity enclosing a volume. A component can be disposed in the cavity and can extend above the substrate surface. The component can be a piezoelectric or a MEMS device. The cap can have a tophat configuration. The cavity structure can be micro-transfer printed from a source wafer to a destination substrate. 170-. (canceled)71. A cavity structure , comprising:a component support forming walls defining sides of a volume;a component disposed in or over the volume and physically connected to the component support; andat least a portion of a structure tether physically connected to the component support exterior to the volume.72. The cavity structure of claim 71 , comprising a cavity substrate claim 71 , wherein the component support is disposed on the cavity substrate and the cavity substrate encloses a bottom of the volume.73. The cavity structure of claim 72 , comprising a cap disposed over the component and component support on a side of the component opposite the cavity substrate and adhered to the cavity substrate such that the component is enclosed in or over the volume.74. The cavity structure of claim 72 , wherein the cavity substrate comprises a cavity that forms a bottom portion of the volume.75. The cavity structure of claim 73 , wherein a cross section of the cavity is triangular.76. The cavity structure of claim 71 , wherein the component is suspended at least partially within the volume.77. The cavity structure of claim 71 , comprising a cap disposed over the component and component support and adhered to the component support.78. The cavity structure of claim 71 , comprising a cap having a tophat structure disposed over the ...

MEMS ISOLATION STRUCTURES

A device may comprise a substrate formed of a first semiconductor material and a trench formed in the substrate. A second semiconductor material may be formed in the trench. The second semiconductor material may have first and second portions that are isolated with respect to one another and that are isolated with respect to the first semiconductor material. 120-. (canceled)21. A microelectromechanical systems (MEMS) device comprising:a substrate having a first outer surface and a second outer surface opposite said first outer surface;a channel formed in said substrate, said channel having a first opening defined by said first outer surface of said substrate, said channel being at least partially bounded by a first side wall and an opposite facing second side wall, said first side wall and said second side wall extending from said first outer surface toward said second outer surface; anda first body of circuitry material having a first portion disposed in said channel and a second portion extending over said first outer surface of said substrate, said second portion of said first body of circuitry material extending from said first portion of said first body of circuitry material.21. The MEMS device of claim 21 , wherein:said first portion of said first body of circuitry material is spaced apart from said first side wall of said channel, defining a first gap between said first portion of said first body of circuitry material and said first sidewall of said channel;said first portion of said first body of circuitry material is spaced apart from said second side wall of said channel, defining a second gap between said first portion of said first body of circuitry material and said second sidewall of said channel; andsaid second portion of said first body of circuitry material is spaced apart from said first outer surface of said substrate, defining a third gap between said second portion of said first body of circuitry material and said first outer surface of said ...

MEMS Devices and Methods of Forming Same

A microelectromechanical system (MEMS) device may include a MEMS structure over a first substrate. The MEMS structure comprises a movable element. Depositing a first conductive material over the first substrate and etching trenches in a second substrate. Filling the trenches with a second conductive material and depositing a third conductive material over the second conductive material and the second substrate. Bonding the first substrate and the second substrate and thinning a backside of the second substrate which exposes the second conductive material in the trenches. 1. A microelectromechanical systems (MEMS) device comprising:a densified dielectric layer on a first substrate;a densified etch stop layer on the densified dielectric layer;a densified sacrificial layer on the densified etch stop layer;a wafer bonded to the densified sacrificial layer, the wafer comprising a movable element and a static element;a densified oxide layer on the wafer;polysilicon material extending through the densified oxide layer, the wafer, and the densified sacrificial layer to the densified etch stop layer;a first set of conductive electrodes over the densified oxide layer, the first set of conductive electrodes directly adjoining the polysilicon material;a second substrate and a second set of conductive electrodes, the second set of conductive electrodes being bonded to the first set of conductive electrodes; anda chamber surrounding the movable element, the chamber being between the first substrate and the second substrate.2. The MEMS device of further comprising: 'at least one via through the second substrate, the at least one via being filled with a first conductive material, the at least one via being electrically coupled to at least one of the second set of conductive electrodes.', 'a vertical interconnection structure comprising3. The MEMS device of claim 2 , wherein the first conductive material comprises polysilicon.4. The MEMS device of claim 2 , wherein the vertical ...

Barriers for Flexible Substrates and Methods of Making the Same

Embodiments of the disclosure pertain to a multi-layer barrier for a flexible substrate supporting electronic and/or microelectromechanical system (MEMS) devices. Apparatuses including a substrate, a first metal nitride layer, a first oxide layer on or over the first metal nitride layer, a second metal nitride layer and a second oxide layer on or over the first oxide layer, and a device layer on or over the first oxide layer or both the first and second oxide layers are disclosed. When the device layer is on or over the first oxide layer, the second metal nitride layer is on or over the device layer, and the second oxide layer is on or over the on or over the second metal nitride layer. When the device layer is on or over both the first and second oxide layers, the second metal nitride layer is on or over the second oxide layer. A method of making the same is also disclosed. 1. An apparatus , comprising:a substrate;a first metal nitride layer;a first oxide layer on or over the first metal nitride layer;a second metal nitride layer and a second oxide layer on or over the first oxide layer; and when the device layer is on or over the first oxide layer, the second metal nitride layer is on or over the device layer, and the second oxide layer is on or over the on or over the second metal nitride layer, and', 'when the device layer is on or over both the first and second oxide layers, the second metal nitride layer is on or over the second oxide layer., 'a device layer on or over the first oxide layer or both the first and second oxide layers, wherein2. The apparatus of claim 1 , wherein the substrate is flexible.3. The apparatus of claim 2 , wherein the substrate comprises a polyimide claim 2 , polyethylene naphthalate [PEN] claim 2 , polyethylene terephthalate [PET] claim 2 , copper claim 2 , steel claim 2 , aluminum claim 2 , a glass claim 2 , a silicone claim 2 , or a flexible ceramic.4. The apparatus of claim 1 , wherein each of the first and second metal nitride ...

SEMICONDUCTOR GAS SENSOR DEVICE AND MANUFACTURING METHOD THEREOF

A semiconductor gas sensor device includes a first cavity that is enclosed by opposing first and second semiconductor substrate slices. At least one conducting filament is provided to extend over the first cavity, and a passageway is provided to permit gas to enter the first cavity. The sensor device may further including a second cavity that is hermetically enclosed by the opposing first and second semiconductor substrate slices. At least one another conducting filament is provided to extend over the second cavity. 2. The method according to claim 1 , with respect to the first semiconductor slice claim 1 , further comprises:forming parts of the first cavity and a second cavity inside said first insulating layer and said doped semiconductor substrate so that said parts of the first and second cavities extend inside said doped semiconductor substrate to the first depth,forming a first pair of conductive filaments and a second pair of conductive filaments inside said respective first and second cavities in a bridge way, said first and second pairs of conductive filaments being respectively the variable resistors and the reference resistors of a Wheatstone bridge,forming the first metal layer on the first and second ends of each filament of the first and second pairs of conductive filaments for making electrical contact,forming other parts of said first and second cavities with said another doped semiconductor substrate,forming at least one hole only in correspondence of said other part of the first cavity for the inlet of gas to detect,placing the second semiconductor slice above said first semiconductor slice so as to form said first and second cavities and hermetically close the second cavity and close the first cavity.3. The method according to claim 2 , with respect to the another doped semiconductor substrate claim 2 , further comprising forming two holes in correspondence only of the first cavity for the inlet of the gas to detect.4. The method according to ...

Integrated circuit having varying substrate depth and method of forming same

A semiconductor device is formed such that a semiconductor substrate of the device has a non-uniform thickness. A cavity is etched at a selected side of the semiconductor substrate, and the selected side is then fusion bonded to another substrate, such as a carrier substrate. After fusion bonding, the side of the semiconductor substrate opposite the selected side is ground to a defined thickness. Accordingly, the semiconductor substrate has a uniform thickness except in the area of the cavity, where the substrate is thinner. Devices that benefit from a thinner substrate, such as an accelerometer, can be formed over the cavity.

Chip with a Micro-Electromechanical Structure and Covering Element, and a Method for the Production of Same

A micro-electromechanical chip includes a substrate, a micro-electromechanical structure formed in the substrate, and a covering element that is positioned on a surface of the substrate and that is configured to protect the micro-electromechanical structure from at least one of outside contaminants and mechanical influences. 1. A microelectromechanical chip , comprising:a substrate;a microelectromechanical structure formed in the substrate; anda covering element disposed on a surface of the substrate and configured to protect the microelectromechanical structure from at least one of contaminants and mechanical influences from outside.2. The microelectromechanical chip as claimed in claim 1 , wherein the microelectromechanical structure comprises a microelectromechanical loudspeaker structure or a microelectromechanical microphone structure.3. The microelectromechanical chip as claimed in claim 1 , wherein the covering element is acoustically transparent.4. The microelectromechanical chip as claimed in claim 3 , wherein the covering element comprises a film claim 3 , a metal grid claim 3 , a plastic grid claim 3 , or a filter layer.5. The microelectromechanical chip as claimed in claim 1 , wherein the covering element is laminated or adhesively bonded on the substrate.6. The microelectromechanical chip as claimed in claim 1 , wherein the covering element forms claim 1 , with the microelectromechanical structure claim 1 , a cavity within the substrate.7. A chip package claim 1 , comprising: a substrate;', 'a microelectromechanical structure formed in the substrate; and', 'a covering element positioned on a surface of the substrate and configured to protect the microelectromechanical structure from at least one of contaminants and mechanical influences from outside; and, 'a microelectromechanical chip that includes'}a control chip coupled to the microelectromechanical chip and configured to drive the microelectromechanical chip.8. The chip package as claimed in claim 7 ...

MULTIPLE SILICON TRENCHES FORMING METHOD FOR MEMS SEALING CAP WAFER AND ETCHING MASK STRUCTURE THEREOF

A multiple silicon trenches forming method and an etching mask structure, the method comprises: step S, providing a MEMS sealing cap silicon substrate (); step S, forming n stacked mask layers () on the MEMS sealing cap silicon substrate (), after forming each mask layer, photolithographing and etching the mask layer and all other mask layers beneath the same to form a plurality of etching windows (D, D, D); step S, etching the MEMS sealing cap silicon substrate by using the current uppermost mask layer and a layer of mask material beneath the same as a mask; step S, removing the current uppermost mask layer; step S, repeating the step S and the step S until all the n mask layers are removed. The present invention can form a plurality of deep trenches with high aspect ratio on the MEMS sealing cap silicon substrate using conventional semiconductor processes, avoiding the problem that the conventional spin coating cannot be conducted on a sealing cap wafer with deep trenches using photoresist. 1. A multiple silicon trenches forming method for MEMS sealing cap wafer , characterized in comprising:{'b': '11', 'step S, providing a MEMS sealing cap silicon substrate;'}{'b': '12', 'step S, forming n stacked mask layers on the MEMS sealing cap silicon substrate, after forming each mask layer, photolithographing and etching the mask layer and all other mask layers beneath the same to form multiple etching windows, wherein n is a positive integer greater than or equal to 2, and any two adjacent mask layers are made of different materials;'}{'b': '13', 'step S, etching the MEMS sealing cap silicon substrate by using a current uppermost mask layer in the n mask layers as a mask, with an etching selectivity ratio of the MEMS sealing cap silicon substrate to the current uppermost mask layer greater than or equal to 10:1;'}{'b': '14', 'step S, removing the current uppermost mask layer;'}{'b': 15', '13', '14, 'step S, repeating the step S and the step S until all the n mask layers ...

MEMS DEVICE

A MEMS device includes a substrate, a MEMS element portion disposed on a surface of the substrate, a cap having a cavity formed to oppose the MEMS element portion, and a diffusion prevention layer formed on at least a portion of the cap, wherein at least one of the cap and the substrate includes a bonding layer disposed outside of the cavity, and wherein the cap includes a spreading prevention portion disposed between the bonding layer and the cavity and having a V-shape in cross-section. 1. A MEMS device comprising:a substrate;a MEMS element portion disposed on a surface of the substrate;a cap having a cavity formed to oppose the MEMS element portion; anda diffusion prevention layer formed on at least a portion of the cap,wherein at least one of the cap and the substrate comprises a bonding layer disposed outside of the cavity, andwherein the cap comprises a spreading prevention portion disposed between the bonding layer and the cavity and comprising a V-shape in cross-section.2. The MEMS device according to claim 1 , wherein the diffusion prevention layer is formed at least within the spreading prevention portion and around the bonding layer.3. The MEMS device according to claim 1 , wherein the cap is formed of a material containing silicon claim 1 , and the bonding layer is formed of a metal material.4. The MEMS device according to claim 3 , wherein the bonding layer is formed of a material containing at least one of gold (Au) claim 3 , tin (Sn) claim 3 , chromium (Cr) claim 3 , titanium (Ti) claim 3 , aluminum (Al) claim 3 , copper(Cu) claim 3 , Germanium(Ge).5. The MEMS device according to claim 1 , wherein the diffusion prevention layer is formed of an oxide film.6. The MEMS device according to claim 1 , wherein the spreading prevention portion has an inclined surface having an angle of 50° to 60° by a crystal plane (111).7. The MEMS device according to claim 6 , wherein the spreading prevention portion has an inclined surface having an angle of about 54.74° ...

NON-MAGNETIC PACKAGE AND METHOD OF MANUFACTURE

A non-magnetic hermetic package includes walls that surround an open cavity, with a generally planar non-magnetic and metallic seal ring disposed in a continuous loop around upper edges of the walls; a sensitive component that is bonded within the cavity; and a non-magnetic lid that is sealed to the seal ring to close the cavity by a metallic seal. 1. A non-magnetic hermetic package comprising:a package body comprising a floor and a wall extending upward from the floor;a seal ring extending around an upper edge of the wall, the seal ring consisting of non-magnetic metallic elements;a lid;a hermetic seam seal between the lid and the seal ring; anda sensitive component disposed within a hermetically-sealed cavity defined between the package body and the lid.2. The package of wherein the seal ring comprises a fillet that extends up over an outer edge of the lid.3. The package of wherein the seal ring comprises:a tungsten layer bonded to the upper edge of the wall;a copper layer bonded to the tungsten layer; anda gold layer bonded to the copper layer and to the lid.4. The package of further comprising an indium solder preform bonding the sensitive component to the floor of the package body within the cavity.5. The package of wherein the cavity is filled with clean dry air.6. The package of wherein the clean dry air comprises at least one of 1) oxygen at approximately atmospheric concentration and 2) a dew point of less than −40° C. or a particulate concentration of less than 10 claim 5 ,000 ppm.7. The package of wherein the lid consists of non-magnetic metallic elements.8. The package of wherein the sensitive component comprises a micro-electro-mechanical (MEMS) device.9. A micro-electro-mechanical (MEMS) package comprising:a package body comprising a floor and a wall extending upward from the floor;a seal ring on an upper surface of the wall of the package body;a lid;a hermetic seam seal that couples the lid to the seal ring; anda MEMS device mounted within a ...

METHOD AND APPARATUS FOR USING UNIVERSAL CAVITY WAFER IN WAFER LEVEL PACKAGING

An electronics module assembly is described herein that packages dies using a universal cavity wafer that is independent of electronics module design. In one embodiment, the electronics module assembly can include a cavity wafer having a single frontside cavity that extends over a majority of a frontside surface area of the cavity wafer and a plurality of fillports. The assembly can also include at least one group of dies placed in the frontside cavity and encapsulant that secures the position of the at least one group of dies relative to the cavity wafer. Further, a layer of the encapsulant can cover a backside of the cavity wafer. 2. The electronics module assembly of wherein the dies in the at least one group of dies are interconnected to form an electronic module.3. The electronics module assembly of wherein the frontside cavity is bounded by a full thickness perimeter rim of the cavity wafer.4. The electronics module assembly of where the plurality of fillports are distributed throughout a fillport area that is an area corresponding to the frontside cavity.5. The electronics module assembly of wherein the cavity wafer is made of any rigid material that tolerates 230.degree. C. process temperature.6. The electronics module assembly of claim 4 , wherein a portion of the fillport area is further cut out and the frontside cavity extends to the space formed by cutting out the portion of the fillport area.7. An electronics module assembly claim 4 , comprising:a cavity wafer having a single frontside cavity that extends over a majority of a frontside surface area of the cavity wafer and a plurality of fillports;at least one group of dies, where the dies are placed in the frontside cavity; andencapsulant that fills the frontside cavity and the fillports, wherein the encapsulant secures the position of the at least one group of dies relative to the cavity wafer,wherein a uniform layer of the encapsulant covers a backside of the cavity wafer.8. The electronics module ...

LOW-PROFILE STACKED-DIE MEMS RESONATOR SYSTEM

A low-profile packaging structure for a microelectromechanical-system (MEMS) resonator system includes an electrical lead having internal and external electrical contact surfaces at respective first and second heights within a cross-sectional profile of the packaging structure and a die-mounting surface at an intermediate height between the first and second heights. A resonator-control chip is mounted to the die-mounting surface of the electrical lead such that at least a portion of the resonator-control chip is disposed between the first and second heights and wire-bonded to the internal electrical contact surface of the electrical lead. A MEMS resonator chip is mounted to the resonator-control chip in a stacked die configuration and the MEMS resonator chip, resonator-control chip and internal electrical contact and die-mounting surfaces of the electrical lead are enclosed within a package enclosure that exposes the external electrical contact surface of the electrical lead at an external surface of the packaging structure. 1. A microelectromechanical-system (MEMS) resonator system packaging structure having a low cross-sectional profile , the packaging structure comprising:a lead frame including an electrical lead having internal and external electrical contact surfaces at respective first and second heights within the cross-sectional profile of the packaging structure, and a die-mounting surface at a third height between the first and second heights;a resonator-control chip mounted to the die-mounting surface of the electrical lead and wire-bonded to the internal electrical contact surface of the electrical lead;a MEMS resonator chip mounted to the resonator-control chip in a stacked die configuration and electrically coupled to the resonator-control chip; anda package enclosure that encloses the MEMS resonator chip, resonator-control chip and internal electrical contact and die-mounting surfaces of the electrical lead, and that exposes the external contact ...

System and Method for a MEMS Transducer

An embodiment as described herein includes a microelectromechanical system (MEMS) with a first MEMS transducer element, a second MEMS transducer element, and a semiconductor substrate. The first and second MEMS transducer elements are disposed at a top surface of the semiconductor substrate and the semiconductor substrate includes a shared cavity acoustically coupled to the first and second MEMS transducer elements. 1. A microelectromechanical system (MEMS) comprising:a first MEMS transducer element;a second MEMS transducer element; anda semiconductor substrate comprising a shared cavity, wherein the first MEMS transducer element and the second MEMS transducer element are disposed at a top surface of the semiconductor substrate and are acoustically coupled to the shared cavity.2. The MEMS of claim 1 , further comprising:an amplifier having input terminals coupled to the first and second MEMS transducer elements, and having output terminals configured to provide a differential output signal; anda bias generator coupled to the first and second MEMS transducer elements.3. The MEMS of claim 2 , wherein the bias generator comprises:a first bias generator coupled to the first MEMS transducer element and configured to provide a first bias voltage; anda second bias generator coupled to the second MEMS transducer element and configured to provide a second bias voltage.4. The MEMS of claim 2 , wherein the amplifier and the bias generator are disposed on an integrated circuit (IC) and are electrically coupled to the first and second MEMS transducer elements.5. The MEMS of claim 2 , wherein the amplifier and the bias generator are integrated on the substrate.6. The MEMS of claim 1 , wherein the first MEMS transducer element comprises a plurality of first MEMS transducer elements and the second MEMS transducer element comprises a plurality of second MEMS transducer elements.7. The MEMS of claim 1 , further comprising a single sound port coupled to the shared cavity.8. A ...

MULTI-CHAMBER MULTI-DEVICE TRANSDUCER MODULE, APPARATUS INCLUDING THE TRANSDUCER MODULE AND METHOD OF MANUFACTURING THE TRANSDUCER MODULE

Method of manufacturing a transducer module, comprising the steps of: forming, on a substrate, a first MEMS transducer, in particular a gyroscope, and a second MEMS transducer, in particular an accelerometer, having a suspended membrane; forming, on the substrate, a conductive layer and defining the conductive layer in order to provide, simultaneously, at least one conductive strip electrically coupled to the first MEMS transducer and the membrane of the second MEMS transducer. 1. A method comprising:forming a conductive layer on a substrate, the conductive layer including at least a first portion and a second portion that are electrically isolated from each other;forming, over the substrate and the first portion of the conductive layer, a first MEMS transducer subjected, in use, to a first environmental stimulus and configured to generate a first transduced signal as a function of the first environmental stimulus, the first portion of the conductive layer being a conductive strip that is electrically coupled to the first MEMS transducer;forming, over the substrate and the second portion of the conductive layer, a second MEMS transducer having a membrane suspended over the substrate and configured to detect an environmental quantity and generate a second transduced signal as a function of the environmental quantity detected, the second portion of the conductive layer forming the membrane; andcoupling a cap to the substrate, the cap having a recess that forms a first chamber with the substrate, the first chamber housing the first and second MEMS transducers.2. The method according to claim 1 , wherein the first MEMS transducer is an inertial sensor claim 1 , and the second MEMS transducer is a pressure sensor.3. The method according to claim 2 , wherein the pressure sensor is a capacitive sensor including a conductive plate capacitively coupled to the membrane.4. The method according to claim 1 , wherein forming the conductive layer includes:depositing doped ...

PACKAGING FOR MEMS TRANSDUCERS

This application describes methods and apparatus relating to packaging of MEMS transducers and to MEMS transducer packages. The application describes a MEMS transducer package () having a first integrated circuit die () which has an integrated MEMS transducer () and integrated electronic circuitry () for operation of the MEMS transducer. The package is arranged such that the footprint of the MEMS transducer package is substantially the same size as the footprint of the integrated circuit die. At least part of the first integrated circuit die () may form a sidewall of the package. The package may be formed by a first package cover () which overlies the MEMS transducer and a second package cover () on the other side of the first integrated circuit die. 2. A MEMS transducer package as claimed in further comprising a first package cover which overlies the MEMS transducer claim 1 , wherein at least part of the outer surface of the MEMS transducer package is formed by the first package cover.3. A MEMS transducer package as claimed in wherein a barrier is provided around the MEMS transducer between the first package cover and the first integrated circuit die.4. A MEMS transducer package as claimed in wherein there is a first volume defined by the first integrated circuit die claim 3 , the barrier and the first package cover.5. A MEMS transducer package as claimed in wherein the barrier comprises a layer of an adhesive material.6. A MEMS transducer package as claimed in wherein the first package cover comprises an aperture.7. A MEMS transducer package as claimed in further comprising a sealing ring on the outer surface of the first package cover surrounding the aperture.8. A MEMS transducer package as claimed in further comprising a water-resistant membrane disposed across said aperture.9. A MEMS transducer package as claimed in comprising a package substrate which is electrically connected to the first integrated circuit die.10. A MEMS transducer package as claimed in ...

WAFER-LEVEL FAN-OUT PACKAGE WITH ENHANCED PERFORMANCE

The present disclosure relates to a packaging process to enhance performance of a wafer-level package. The disclosed package includes multiple mold compounds, a multilayer redistribution structure, and a thinned die with a device layer and die bumps underneath the device layer. The multilayer redistribution structure includes package contacts at a bottom of the multilayer redistribution structure and redistribution interconnects connecting the die bumps to the package contacts. A first mold compound resides around the thinned die to encapsulate sidewalls of the thinned die, and extends beyond a top surface of the thinned die to define an opening over the thinned die. A second mold compound resides between the multilayer redistribution structure and the first mold compound to encapsulate a bottom surface of the device layer and each die bump. A third mold compound fills the opening and is in contact with the top surface of the thinned die. 1. A method comprising: the first intact die comprises a first device layer, a first dielectric layer over the first device layer, a first silicon substrate over the first dielectric layer, and a plurality of first die bumps underneath the first device layer;', 'the first mold compound resides around the first intact die to encapsulate sidewalls of the first intact die, wherein a backside of the first silicon substrate is exposed;', 'the second mold compound is formed underneath the first mold compound to cover a bottom surface of the first device layer and encapsulate each of the plurality of first die bumps;, 'providing a mold package that includes a first intact die, a first mold compound, and a second mold compound, whereinremoving substantially the first silicon substrate of the first intact die to provide a first thinned die and form an opening within the first mold compound and over the first thinned die, wherein the first thinned die has a top surface exposed at a bottom of the opening;applying a third mold compound to ...

MEMS DEVICE AND METHOD FOR PRODUCING SAME

A MEMS device that includes a lower substrate having an element region on a surface thereof; an upper substrate opposed to the lower substrate; and a bonding section that bonds the lower substrate and the upper substrate to each other around the periphery of the element region. The bonding section has a first region, a second region, and a third region which are sequentially provided in this order from a side closer to the element region to a side farther from the element region. At least one of the first region and the third region contains a hyper-eutectic alloy of one of a first component and a second component, and the second region contains a eutectic alloy of the first component and the second component. 1. A MEMS device comprising:a first substrate having an element region on a surface thereof;a second substrate opposed to the first substrate; anda bonding section that bonds the first substrate and the second substrate to each other around a periphery of the element region,whereinthe bonding section has a first region, a second region, and a third region which are sequentially provided in this order from a first side of the bonding section closest to the element region to a second side of the bonding section farthest from the element region,at least one of the first region and the third region contains a hyper-eutectic alloy of one of a first component and a second component which has a higher melting point than a eutectic point of the first component and the second component, andthe second region contains a eutectic alloy of the first component and the second component.2. The MEMS device according to claim 1 , wherein the first region and the third region include the hyper-eutectic alloy.3. The MEMS device according to claim 2 , whereinthe first component and the second component have a eutectic point at 400° C. to 600° C., andone of the first component and the second component has a melting point higher than 600° C.4. The MEMS device according to claim 3 , ...

MICROPHONE PACKAGE AND MOUNTING STRUCTURE THEREOF

There are provided a microphone package and a mounting structure thereof, allowing for an increase in a back volume, the microphone package including: a package substrate; an acoustic element mounted on the package substrate and having a space formed in a lower portion thereof; and at least one electronic component mounted on the package substrate and having a space formed in a lower portion thereof, wherein the package substrate includes an acoustic volume connecting the space of the acoustic element and the space of the electronic component. 1. A microphone package comprising:a package substrate;an acoustic element mounted on the package substrate and having a space formed in a lower portion thereof; andat least one electronic component mounted on the package substrate and having a space formed in a lower portion thereof,wherein the package substrate includes an acoustic volume connecting the space of the acoustic element and the space of the electronic component.2. The microphone package of claim 1 , wherein the acoustic volume is formed in a tunnel shape in the package substrate.3. The microphone package of claim 1 , wherein the acoustic volume includes:a tunnel portion formed in the package substrate; andtunnel entrances extending from both ends of the tunnel portion and opened to the outside of the package substrate.4. The microphone package of claim 2 , wherein the acoustic element and the electronic component are mounted on the package substrate to block the tunnel entrances claim 2 , respectively.5. The microphone package of claim 4 , wherein the space formed in the acoustic element and the space formed in the electronic component claim 4 , and the acoustic volume formed in the package substrate are connected to form a back volume.6. The microphone package of claim 1 , wherein the acoustic volume includes a plurality of through holes penetrating through the package substrate.7. The microphone package of claim 6 , wherein the acoustic element and the ...

Cmos ultrasonic transducers and related apparatus and methods

CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.

Cmos ultrasonic transducers and related apparatus and methods

CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.

METHOD OF RAPID ENCAPSULATION OF MICROELECTRONIC DEVICES

A method of encapsulating at least one object in a polymer shell includes (a) providing a carrier having a release surface and at least one object releasably secured thereto, each object having a heighth dimension and a width dimension; (b) providing a light polymerizable resin, the resin supported on a light transmissive window; (c) advancing each object on the carrier into the light polymerizable resin to a position spaced away from the window by a distance sufficient to maintain a dead zone or release layer of unpolymerized resin directly on the window; (d) forming a first portion of the polymer shell around each object by projecting patterned light through the window; (e) forming a subsequent portion of a polymer shell on or around each object by advancing the object on the carrier away from the window and projecting patterned light through the window; and (f) repeating step (e) until each object is encapsulated in a polymer shell. 1. A method of encapsulating at least one object in a polymer shell , comprising:(a) providing a carrier having a release surface and at least one object releasably secured thereto, each said object having a heighth dimension and a width dimension;(b) providing a light polymerizable resin, said resin supported on a light transmissive window;(c) advancing each said object on the carrier into the light polymerizable resin to a position spaced away from said window by a distance sufficient to maintain a dead zone or release layer of unpolymerized resin directly on said window;(d) forming a first portion of said polymer shell around each said object by projecting patterned light through said window;(e) forming a subsequent portion of a polymer shell on or around each said object by advancing said object on the carrier away from the window and projecting patterned light through said window; and(f) repeating step (e) until each said object is encapsulated in a polymer shell.2. The method of claim 1 , wherein said object comprises a ...

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

There is provided a semiconductor package including: an application specific integrated circuit (ASIC) chip including a first bump ball and a second bump ball formed inwardly of the first bump ball; a micro electro mechanical system (MEMS) sensor electrically connected to the second bump ball; a lead frame electrically connected to the first bump ball and including a through hole formed therein; and a molded part covering the ASIC chip, the MEMS sensor, and the lead frame, wherein the ASIC chip is disposed above the lead frame. 1. A semiconductor package comprising:an application specific integrated circuit (ASIC) chip including a first bump ball and a second bump ball formed inwardly of the first bump ball;a micro electro mechanical system (MEMS) sensor electrically connected to the second bump ball;a lead frame electrically connected to the first bump ball and including a through hole formed therein; anda molded part covering the ASIC chip, the MEMS sensor, and the lead frame,wherein the ASIC chip is disposed above the lead frame.2. The semiconductor package of claim 1 , wherein the ASIC chip has a size larger than that of the MEMS sensor.3. The semiconductor package of claim 1 , wherein the second bump ball is formed on one surface of the ASIC chip facing one surface of the MEMS sensor.4. The semiconductor package of claim 1 , wherein the first bump ball is formed on a portion of one surface of the ASIC chip protruding outwardly of the MEMS sensor.5. The semiconductor package of claim 1 , wherein the MEMS sensor is received in the through hole of the lead frame.6. The semiconductor package of claim 5 , wherein the through hole has a size larger than that of the MEMS sensor and smaller than that of the ASIC chip.7. The semiconductor package of claim 1 , wherein upper surfaces of the ASIC chip and the molded part are positioned on the same plane.8. The semiconductor package of claim 1 , wherein an upper surface of the ASIC chip is exposed to the outside of the ...

COMPOSITE WAFERS

A composite wafer includes a first silicon die with a first top surface; and a polymer substrate with a top surface and a bottom surface. The silicon die is embedded in the polymer substrate such that the top surface of the substrate and the first top surface of the first silicon die are coplanar and the bottom surface of the polymer substrate is planar. 1. A composite wafer , the wafer comprising:a first silicon die with a top surface; anda polymer substrate with a top surface and a bottom surface, the silicon die embedded in the polymer substrate such that the top surface of the substrate and the first top surface of the first silicon die are coplanar and the bottom surface of the polymer substrate is planar.2. The wafer of claim 1 , further comprising a layer of photosensitive polymer applied over the top surface of the silicon die and the top surface of the polymer substrate.3. The wafer of claim 2 , wherein the layer of photosensitive polymer is patterned.4. The wafer of claim 1 , wherein the first silicon die comprises a component of a microfluidics device.5. The wafer of claim 1 , further comprising a second die with a top surface.6. The wafer of claim 5 , wherein the top surface of the second die is coplanar with the top surface of the first silicon die.7. The wafer of claim 5 , wherein the top surface of the second die is coplanar with the bottom surface of the polymer substrate.8. The wafer of claim 5 , further comprising an electrical connection between the first silicon die and the second die through the polymer substrate.9. The wafer of claim 5 , wherein the first silicon die and the second die have different thicknesses.10. A method of forming a composite die claim 5 , the method comprising:applying a tape to a first surface of a silicon die;forming a polymer substrate around the silicon die, the polymer substrate have a first surface coplanar with the first surface of the silicon die; andremoving the tape from the first surface of the silicon die.11. ...

Wafer level encapsulation for mems device

A microelectromechanical system (MEMS) device is disclosed. The MEMS device includes a device substrate having a MEMS component in a device region. A top cap is fusion bonded to the top surface of the device substrate and a bottom cap is fusion bonded to the bottom surface of the device substrate. The top and bottom caps encapsulate the MEMS components. A cap includes a via isolation which extends a thickness of the cap and surrounds the device region.

STACKED-DIE MEMS RESONATOR

A low-profile packaging structure for a microelectromechanical-system (MEMS) resonator system includes an electrical lead having internal and external electrical contact surfaces at respective first and second heights within a cross-sectional profile of the packaging structure and a die-mounting surface at an intermediate height between the first and second heights. A resonator-control chip is mounted to the die-mounting surface of the electrical lead such that at least a portion of the resonator-control chip is disposed between the first and second heights and wire-bonded to the internal electrical contact surface of the electrical lead. A MEMS resonator chip is mounted to the resonator-control chip in a stacked die configuration and the MEMS resonator chip, resonator-control chip and internal electrical contact and die-mounting surfaces of the electrical lead are enclosed within a package enclosure that exposes the external electrical contact surface of the electrical lead at an external surface of the packaging structure. 1. (canceled)2. A multi-die package comprising:a control die having a first surface;electrically conductive structures extending perpendicularly from the first surface of the control die to a first exterior surface of the multi-die package to enforce a structural offset of the control die from the first exterior surface;a microelectromechanical system (MEMS) die mounted to the control die;at least one electrical connection between the MEMS die and the control circuit die to provide for electrical communication therebetween; andencapsulation material disposed between and in contact with the electrically conductive structures and encapsulating the MEMS die;wherein the control die further comprises circuitry to sense a temperature of the MEMS die and to generate correction information to adjust an electrical output of the MEMS die in dependence on sensed temperature;wherein the first surface and the MEMS die are mounted in a manner coupled by a ...

MEMS Devices and Methods of Forming Same

A microelectromechanical system (MEMS) device may include a MEMS structure over a first substrate. The MEMS structure comprises a movable element. Depositing a first conductive material over the first substrate and etching trenches in a second substrate. Filling the trenches with a second conductive material and depositing a third conductive material over the second conductive material and the second substrate. Bonding the first substrate and the second substrate and thinning a backside of the second substrate which exposes the second conductive material in the trenches.

SURFACE CHARGE MITIGATION LAYER FOR MEMS SENSORS

A semiconductor device includes a substrate. At least one transducer is provided on the substrate. The at least one transducer includes at least one electrically conductive circuit element. A dielectric layer is deposited onto the substrate over the at least one transducer. A surface charge mitigation layer formed of a conductive material is deposited onto the outer surface of the dielectric layer with the surface charge mitigation layer being electrically coupled to ground potential. The surface charge mitigation layer may be deposited to a thickness of 10 nm or less, and the transducer may comprise a microelectromechanical systems (MEMS) device, such as a MEMS pressure sensor. The surface charge mitigation layer may be patterned to include pores to enhance the flexibility as well as the optical properties of the mitigation layer. 1. A semiconductor device comprising:a substrate;at least one transducer provided on the substrate, the at least one transducer including at least one electrically conductive circuit element; anda dielectric layer deposited onto the substrate over the at least one transducer, the dielectric layer including an outer surface that faces away from the substrate; anda surface charge mitigation layer formed of a conductive material deposited onto the outer surface of the dielectric layer, the surface charge mitigation layer being electrically coupled to ground potential.2. The device of claim 1 , wherein the surface charge mitigation layer has a thickness of approximately 10 nm or less.3. The device of claim 2 , wherein the surface charge mitigation layer has a thickness of 5 nm or less.4. The device of claim 2 , wherein the surface charge mitigation layer is deposited using an atomic layer deposition (ALD) process.5. The device of claim 2 , wherein the surface charge mitigation layer is formed of one of platinum claim 2 , aluminum claim 2 , titanium claim 2 , and titanium nitride.6. The device of claim 2 , wherein the surface charge mitigation ...

LOW-PROFILE STACKED-DIE MEMS RESONATOR SYSTEM

A low-profile packaging structure for a microelectromechanical-system (MEMS) resonator system includes an electrical lead having internal and external electrical contact surfaces at respective first and second heights within a cross-sectional profile of the packaging structure and a die-mounting surface at an intermediate height between the first and second heights. A resonator-control chip is mounted to the die-mounting surface of the electrical lead such that at least a portion of the resonator-control chip is disposed between the first and second heights and wire-bonded to the internal electrical contact surface of the electrical lead. A MEMS resonator chip is mounted to the resonator-control chip in a stacked die configuration and the MEMS resonator chip, resonator-control chip and internal electrical contact and die-mounting surfaces of the electrical lead are enclosed within a package enclosure that exposes the external electrical contact surface of the electrical lead at an external surface of the packaging structure. 1. A microelectromechanical-system (MEMS) resonator system packaging structure having a low cross-sectional profile , the packaging structure comprising:a lead frame including an electrical lead having internal and external electrical contact surfaces at respective first and second heights within the cross-sectional profile of the packaging structure, and a die-mounting surface at a third height between the first and second heights;a resonator-control chip mounted to the die-mounting surface of the electrical lead and wire-bonded to the internal electrical contact surface of the electrical lead;a MEMS resonator chip mounted to the resonator-control chip in a stacked die configuration and electrically coupled to the resonator-control chip; anda package enclosure that encloses the MEMS resonator chip, resonator-control chip and internal electrical contact and die-mounting surfaces of the electrical lead, and that exposes the external contact ...

LASER RESEAL INCLUDING AN ADDITIONAL LAYER AND ALLOY FORMATION

A method for manufacturing a micromechanical component including a substrate and a cap, which is connected to the substrate and, together with the substrate, encloses a cavity, a pressure prevailing and gas mixture having a chemical composition being enclosed in the cavity. An access opening connecting the to surroundings of the micromechanical component is formed in the substrate or in the cap. The pressure and/or chemical composition are/is adjusted in the cavity. The access opening is sealed by introducing energy or heat into an absorbing part of the substrate or of the cap with the aid of a laser. A layer is deposited on or grown on a surface of the substrate or of the cap in the area of the access opening for mixing with a material area of the substrate or of the cap, which is converted into a liquid aggregate state. 1. A method for manufacturing a micromechanical component including a substrate , and a cap which is connected to the substrate , and , together with the substrate , encloses a first cavity , a first pressure prevailing and a first gas mixture having a first chemical composition being enclosed in the first cavity , the method comprising:in a first method step, forming, in one of the substrate or the cap, an access opening connecting the first cavity to surroundings of the micromechanical component;in a second method step, adjusting at least one of the first pressure and the first chemical composition in the first cavity;in a third method step, sealing the access opening by introducing energy or heat into an absorbing part of the substrate or the cap, with the aid of a laser; andin a fourth method step, depositing or growning a layer on a surface of the substrate or of the cap in the area of the access opening for mixing with a material area of the substrate or of the cap, which is converted into a liquid aggregate state in the third method step.2. The method as recited in claim 1 , wherein the layer is deposited on or grown on a surface of the ...

System and method for a mems transducer

An embodiment as described herein includes a microelectromechanical system (MEMS) with a first MEMS transducer element, a second MEMS transducer element, and a semiconductor substrate. The first and second MEMS transducer elements are disposed at a top surface of the semiconductor substrate and the semiconductor substrate includes a shared cavity acoustically coupled to the first and second MEMS transducer elements.

MEMS PACKAGE WITH ROUGHEND INTERFACE

A method includes: providing a first substrate on which a plurality of first semiconductor devices is formed; providing a second substrate on which a plurality of second semiconductor devices is formed; and coupling the first and second substrates by contacting respective dummy pads of the first and second substrates, wherein at least one of the dummy pads of the first and second substrates comprises plural peaks and valleys. 1. A method , comprising:providing a first substrate on which a plurality of first semiconductor devices is formed;providing a second substrate on which a plurality of second semiconductor devices is formed; andcoupling the first and second substrates by contacting respective dummy pads of the first and second substrates,wherein at least one of the dummy pads of the first and second substrates comprises plural peaks and valleys.2. The method of claim 1 , wherein the first semiconductor device comprises a micro-electro-mechanical system (MEMS) device.3. The method of claim 1 , wherein the second semiconductor device comprises a complementary metal-oxide-semiconductor (CMOS) circuit.4. The method of claim 1 , wherein before coupling the first and second substrates claim 1 , the method further comprises:forming a first plurality of peaks and valleys on a top surface of the dummy pads of the first substrate;forming a second plurality of peaks and valleys on a top surface of the dummy pads of the second substrate; andflipping the second substrate and aligning the first semiconductor device with the second semiconductor device.5. The method of claim 1 , wherein the dummy pad of the first substrate is disposed in a non-active region on the first substrate where the first semiconductor devices are absent.6. The method of claim 1 , wherein the dummy pad of the second substrate is disposed in a non-active region on the second substrate where the second semiconductor devices are absent.7. The method of claim 1 , wherein the dummy pad of the first ...

ENCLOSED CAVITY STRUCTURES

An example of a cavity structure comprises a cavity substrate comprising a substrate surface, a cavity extending into the cavity substrate, the cavity having a cavity bottom and cavity walls, and a cap disposed on a side of the cavity opposite the cavity bottom. The cavity substrate, the cap, and the one or more cavity walls form a cavity enclosing a volume. A component can be disposed in the cavity and can extend above the substrate surface. The component can be a piezoelectric or a MEMS device. The cap can have a tophat configuration. The cavity structure can be micro-transfer printed from a source wafer to a destination substrate. 170-. (canceled)71. A cavity structure , comprising:a component support; anda component extending from and suspended by the component support; anda structure tether extending from the component support.72. The cavity structure of claim 71 , wherein the component comprises piezoelectric material and component electrodes disposed on the piezoelectric material.73. The cavity structure of claim 72 , wherein the component electrodes comprise a component top electrode disposed on a top of the piezoelectric material and a component bottom electrode disposed on a bottom of the piezoelectric material.74. The cavity structure of claim 71 , wherein the component support surrounds the component.75. The cavity structure of claim 71 , wherein the component support has a top surface in a common plane with at least a portion of the component.76. The cavity structure of claim 71 , wherein the component support has a bottom surface in a plane claim 71 , and the component is suspended over the plane.77. The cavity structure of claim 71 , comprising a cap disposed over the component.78. The cavity structure of claim 77 , wherein the cap comprises a broken or separated cap tether.79. The cavity structure of claim 77 , wherein the cap is disposed on the component support.80. The cavity structure of claim 79 , comprising a cavity substrate comprising a ...

SEMICONDUCTOR DEVICES WITH CAVITIES AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICES WITH CAVITIES

Semiconductor devices with enclosed cavities and methods for fabricating semiconductor devices with enclosed cavities are provided. In an embodiment, a method for fabricating a semiconductor device with a cavity includes forming a sacrificial structure in and/or over a substrate. The method includes depositing a permeable layer over the sacrificial structure and the substrate. Further, the method includes etching the sacrificial structure through the permeable layer to form the cavity bounded by the substrate and the permeable layer. 1. A method for fabricating a semiconductor device with a cavity , the method comprising:forming a sacrificial structure in and/or over a substrate;forming a device structure overlying a lower portion of the sacrificial structure and underlying an upper portion of the sacrificial structure;depositing a permeable layer over the sacrificial structure, the device structure and the substrate; andetching the sacrificial structure through the permeable layer to form the cavity, wherein the cavity has an outer surface completely bounded by the substrate, the device structure, and the permeable layer.2. The method of wherein etching the sacrificial structure through the permeable layer to form the cavity results in encapsulating the cavity with the substrate claim 1 , the device structure claim 1 , and the permeable layer upon formation.3. The method of further comprising:depositing a capping layer over the permeable layer; andetching an opening through the capping layer and through the permeable layer to open the cavity at a selected location.4. The method of wherein:depositing the permeable layer over the sacrificial structure and the substrate comprises depositing a permeable material having a bottom surface in contact with the sacrificial structure and with the substrate and having a top surface; andetching the sacrificial structure through the permeable layer to form the cavity comprises contacting the top surface of the permeable material ...

Microphone package with integrated substrate

MEMS microphone packages are described that include an ASIC integrated in the base substrate of the package housing. Methods of manufacturing the same and methods for separating individual microphone packages from wafer form assembly arrays are also described.

SOUND PORT ADAPTER FOR MICROPHONE ASSEMBLY

A one-piece sound port adapter for a microphone assembly includes a body member configured to be fitted over a sound port of the microphone assembly. The body member includes an acoustic channel defined in part by a cavity having a sound inlet and a sound outlet, where the sound outlet is acoustically coupled to the sound port. A wall portion of the body member extends into the cavity and configured to modify an acoustic property of the acoustic channel. When mounted, the one-piece sound port adapter converts the microphone assembly from a top or bottom port microphone assembly to a side-port microphone assembly. 1. A sound port adapter for a microphone assembly comprising an acoustic transducer disposed in a housing having a sound port , the sound port adapter comprising:a body member having a mounting surface configured to mount on the housing of the microphone assembly;an acoustic channel disposed through the body member, the acoustic channel defined in part by a cavity having a sound inlet and a sound outlet disposed on the mounting surface of the body member;a wall portion of the body member extending into the cavity, the wall portion configured to modify an acoustic property of the acoustic channel, wherein the sound outlet of the sound port adapter is acoustically coupled to a sound port of the microphone assembly when the sound port adapter is mounted over the sound port of the microphone assembly.2. The sound port adapter of claim 1 , the wall portion configured to modify an inertance of the acoustic channel claim 1 , wherein the inertance acoustically tunes sound propagating through the acoustic channel.3. The sound port adapter of claim 1 , the wall portion configured to form a tortuous acoustic channel.4. The sound port adapter of claim 1 , the wall portion configured to form a snail tube acoustic channel.5. The sound port adapter of claim 1 , the wall portion configured to acoustically tune a frequency of sound propagating through the acoustic channel.6 ...

LOW COST WINDOW PRODUCTION FOR HERMETICALLY SEALED OPTICAL PACKAGES

Disclosed embodiments demonstrate batch processing methods for producing optical windows for microdevices. The windows protect the active elements of the microdevice from contaminants, while allowing light to pass into and out of the hermetically sealed microdevice package. Windows may be batch produced, reducing the cost of production, by fusing multiple metal frames to a single sheet of glass. In order to allow windows to be welded atop packages, disclosed embodiments keep a lip of metal without any glass after the metal frames are fused to the sheet of glass. Several techniques may accomplish this goal, including grinding grooves in the glass to provide a gap that prevents fusion of the glass to the metal frames along the outside edges in order to form a lip. The disclosed batch processing techniques may allow for more efficient window production, taking advantage of the economy of scale. 1. A method of making a package window , comprising:forming a plurality of metal frames, each frame having an aperture surrounded by a lip;coating at least one side of the lip with an anti-fusing substance; andfusing the plurality of metal frames to a glass member such that the substance prevents the lip from fusing to the glass.2. The method of claim 1 , wherein the joining comprises forcing portions of the sheet of glass from a first side of the metal frame through at least one of the apertures to a second side of the metal frame.3. The method of claim 2 , wherein the joining comprises heating the sheet of glass at least to a transition temperature and forcing portions of the sheet of glass from a first side of the metal frame through at least one of the apertures to a second side of the metal frame.4. A method of making a package window claim 2 , comprising:forming a plurality of metal frames, each frame having an aperture surrounded by a lip;coating at least one side of the lip with an anti-fusing substance; andfusing the plurality of metal frames to a glass member such that ...

Membrane transducer structures and methods of manufacturing same using thin-film encapsulation

Membrane transducer structures and thin-film encapsulation methods for manufacturing the same are provided. In one example, the thin film encapsulation methods may be implemented to co-integrate processes for thin-film encapsulation and formation of microelectronic devices and microelectromechanical systems (MEMS) that include the membrane transducers.

COVER FOR A MEMS MICROPHONE

A microphone assembly includes a base, a cover, and a microelectromechanical system (MEMS) die. The cover extends at least partially over and is coupled to the base. The cover and the base form a cavity. The MEMS die is coupled to the base and disposed within the cavity. At least a portion of the cover is constructed of a copper-nickel-zinc alloy that is effective in preventing solder from moving from a first portion of the cover to a second portion of the cover. 1. A microphone assembly , the assembly comprising:a base;a cover extending at least partially over and coupled to the base, the cover and the base forming a cavity;a microelectromechanical system (MEMS) die coupled to the base and disposed within the cavity;wherein at least a portion of the cover is constructed of a copper-nickel-zinc alloy that is effective in preventing solder from moving from a first portion of the cover to a second portion of the cover.2. The assembly of claim 1 , wherein the copper-nickel-zinc alloy covers the entire cover.3. The assembly of claim 1 , wherein the copper-nickel-zinc alloy covers approximately half of the cover nearest to the base.4. The assembly of claim 3 , wherein the remaining portion of the cover is constructed of brass.5. The assembly of claim 1 , wherein the cover comprises a lip in proximity to the base and the lip is constructed of the copper-nickel-zinc alloy.6. The assembly of claim 1 , wherein the copper-nickel-zinc alloy has a composition that is approximately 55 percent copper claim 1 , approximately 18 percent nickel claim 1 , and approximately 27 percent zinc.7. The assembly of claim 1 , wherein a port extends through the base.8. The assembly of claim 1 , wherein a port extends through the cover. This patent claims benefit under 35 U.S.C. §119 (e) to U.S. Provisional Application No. 61/804,087 entitled “Cover for a MEMS Microphone” filed Mar. 21, 2013, and Application No. 61/804,004 entitled “Cover for a MEMS Microphone” filed Mar. 21, 2013, the contents ...

MICROELECTROMECHANICAL SYSTEMS PACKAGES AND METHODS FOR PACKAGING A MICROELECTROMECHANICAL SYSTEMS DEVICE

A microelectromechanical systems (MEMS) package may include a wafer having a MEMS device; a metal cap partially anchored to the wafer where at least one point between the cap and the wafer is unanchored, the metal cap at least substantially extending over the MEMS device; an electrical contact pad electrically coupled to the MEMS device; and a sealing layer disposed over the metal cap and the wafer, such that the sealing layer seals a gap between an unanchored portion of the metal cap and the wafer to encapsulate the MEMS device; wherein the electrical contact pad and the metal cap include the same composition. 1. A microelectromechanical systems (MEMS) package comprising:a wafer having a MEMS device;a metal cap partially anchored to the wafer where at least one point between the cap and the wafer is unanchored, the metal cap at least substantially extending over the MEMS device;an electrical contact pad electrically coupled to the MEMS device; anda sealing layer disposed over the metal cap and the wafer, such that the sealing layer seals a gap between an unanchored portion of the metal cap and the wafer to encapsulate the MEMS device;wherein the electrical contact pad and the metal cap comprise the same composition.2. The MEMS package of claim 1 , wherein the unanchored portion of the metal cap extends beyond the MEMS device.3. The MEMS package of claim 1 , wherein the MEMS package comprises an upper cavity between the metal cap and the MEMS device.4. The MEMS package of claim 1 , wherein the MEMS package comprises a lower cavity at a lower surface of the MEMS device claim 1 , the lower surface opposing an upper surface of the MEMS device facing the metal cap.5. The MEMS package of claim 1 , wherein an upper surface of the MEMS device facing the metal cap has an indentation claim 1 , wherein the metal cap is anchored to the wafer at the indentation.6. The MEMS package of claim 1 , wherein the electrical contact pad and the metal cap are identical in thickness.7. A ...

Chip package and chip packaging method

A chip package and a chip packaging method are provided. A MEMS chip and an ASIC chip are packaged by using a packaged circuit board. The packaged circuit board is provided with a receiving hole. The MEMS chip and the ASIC chip are respectively attached to two surfaces of the packaged circuit board and cover receiving hole. The MEMS chip and the ASIC chip are connected with each other via the packaged circuit board, and are connected to an external circuit via the packaged circuit board, thereby facilitating a circuit interconnection between the package and an electronic component.

Method for Improving Manufacturability of Cavity Packages for Direct Top Port MEMS Microphone

A MEMS device for use in some embodiments in a microphone or pressure sensor and method of making the same wherein a portion of the package surrounding the acoustic port is deformed either away from, towards, or both away from and towards the interior of the package. By providing this raised area proximate the acoustic port, external debris is less likely to enter the acoustic port and damage the fragile MEMS die. Further, internal attachment material holding the MEMS die to the inside of the package is prevented by flowing into and obscuring the acoustic port. The advantages of this design include longer operation lifetimes for the MEMS device, greater design freedom, and increases in production yield.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

A semiconductor device includes a substrate, a movable portion provided on the substrate, a junction frame provided on the substrate to surround the movable portion, a cap bonded to the junction frame, the cap having a recessed portion and covering a space over the movable portion with the recessed portion facing the movable portion, the cap having an inside wall provided with irregularities, and a prevention film formed on the inside wall of the cap, the prevention film having irregularities on a surface thereof. 1. A semiconductor device comprising:a substrate;a movable portion provided on the substrate;a junction frame provided on the substrate to surround the movable portion;a cap bonded to the junction frame, the cap having a recessed portion and covering a space over the movable portion with the recessed portion facing the movable portion, the cap having an inside wall provided with irregularities; anda prevention film formed on the inside wall of the cap, the prevention film having irregularities on a surface thereof.2. The semiconductor device according to claim 1 , wherein a surface roughness of the inside wall and a surface roughness of the prevention film are equal.3. The semiconductor device according to claim 1 , wherein the cap and the junction frame are bonded by covalent bonding.4. The semiconductor device according to claim 1 , wherein the prevention film is made of metal.5. The semiconductor device according to claim 1 , wherein a space surrounded by the recessed portion and the substrate contains inert gas.6. The semiconductor device according to claim 1 , wherein a space surrounded by the recessed portion and the substrate is a vacuum.7. A semiconductor device manufacturing method claim 1 , comprising the steps of:forming a device structure on a substrate, the device structure including a movable portion, a fixed portion, and a junction frame surrounding the movable portion and the fixed portion;forming a prevention film having irregularities on ...

ENCLOSED CAVITY STRUCTURES

An example of a cavity structure comprises a cavity substrate comprising a substrate surface, a cavity extending into the cavity substrate, the cavity having a cavity bottom and cavity walls, and a cap disposed on a side of the cavity opposite the cavity bottom. The cavity substrate, the cap, and the one or more cavity walls form a cavity enclosing a volume. A component can be disposed in the cavity and can extend above the substrate surface. The component can be a piezoelectric or a MEMS device. The cap can have a tophat configuration. The cavity structure can be micro-transfer printed from a source wafer to a destination substrate. 170-. (canceled)71. A cavity structure , comprising:a cavity substrate comprising a substrate surface;a component support disposed on the substrate surface, wherein the cavity substrate and component support form at least a portion of an enclosing volume; anda component physically attached to the component support and suspended within the at least a portion of an enclosing volume.72. The cavity structure of claim 71 , comprising a cavity extending into the cavity substrate in a direction away from the substrate surface claim 71 , the cavity forming a portion of the enclosing volume.73. The cavity structure of claim 71 , wherein the component support is non-native to the cavity substrate.74. The cavity structure of claim 71 , comprising a cap disposed over the cavity substrate claim 71 , the cap forming a portion of the enclosing volume.75. The cavity structure of claim 74 , wherein the cap is adhered to the cavity substrate.76. The cavity structure of claim 74 , wherein the cap is adhered to the component support.77. The cavity structure of claim 71 , wherein the component support surrounds the component in a direction parallel to the substrate surface.78. The cavity structure of claim 71 , comprising a structure tether physically attached to and extending from the component support.79. The cavity structure of claim 78 , wherein the ...

ENCLOSED CAVITY STRUCTURES

An example of a cavity structure comprises a cavity substrate comprising a substrate surface, a cavity extending into the cavity substrate, the cavity having a cavity bottom and cavity walls, and a cap disposed on a side of the cavity opposite the cavity bottom. The cavity substrate, the cap, and the one or more cavity walls form a cavity enclosing a volume. A component can be disposed in the cavity and can extend above the substrate surface. The component can be a piezoelectric or a MEMS device. The cap can have a tophat configuration. The cavity structure can be micro-transfer printed from a source wafer to a destination substrate. 170-. (canceled)71. A method of making a micro-module structure , comprising:providing a substrate, the substrate comprising (i) a cavity in or on the substrate, the cavity having a cavity floor and one or more cavity walls, and (ii) substrate post protruding from the cavity floor; anddisposing a component on the substrate post, the component having a component top side and a component bottom side opposite the component top side, the component bottom side disposed on the substrate post, the component extending over at least one edge of the substrate post; andproviding one or more component electrodes disposed on the component.72. The method of claim 71 , comprising etching the substrate to form the one or more cavity walls and the cavity floor.73. The method of claim 72 , comprising forming the substrate post on the cavity floor.74. The method of claim 71 , comprising disposing a cap over the cavity.75. The method of claim 74 , comprising laminating the cap over the cavity.76. The method of claim 74 , comprising printing the cap to dispose the cap over the cavity.77. The method of claim 71 , comprising:etching the substrate to form a cavity with one or more side walls and a substrate post layer;depositing component material over the substrate;patterning the component material to form the component; andetching the substrate post layer to ...

Microphone Module and Method of Manufacturing Thereof

A microphone module includes a package including a semiconductor chip and having a recess on an upper surface and a micro-electro-mechanical microphone being electrically connected to the package. Further, the micro-electro-mechanical microphone is arranged on the upper surface of the package. The recess forms an acoustic back volume of the micro-electro-mechanical microphone. 1. A microphone module , comprising:a package body having a recess on an upper surface;a semiconductor chip embedded in the package body; anda micro-electro-mechanical microphone chip comprising an electro-mechanical element arranged over the recess and electrically connected to the semiconductor chip.2. The microphone module of claim 1 , wherein the recess forms an acoustic back volume of the micro-electro-mechanical microphone chip.3. The microphone module of claim 1 , wherein the semiconductor chip is an application specific integrated circuit.4. The microphone module of claim 1 , wherein the package body comprises through-contacts for electrically connecting the micro-electro-mechanical microphone chip to the semiconductor chip.5. The microphone module of claim 1 , wherein the semiconductor chip is positioned beneath the recess.6. The microphone module of claim 1 , further comprising:an electrical redistribution structure arranged at a bottom surface of the package body.7. The microphone module of claim 1 , further comprising:an acoustic seal arranged between the micro-electro-mechanical microphone chip and the package body.8. The microphone module of claim 1 , further comprising:a shielding layer arranged on the upper surface of the package body.9. The microphone module of claim 1 , wherein the package body and the micro-electro-mechanical microphone chip have an equal lateral dimension in at least one lateral direction.10. The microphone module of claim 1 , wherein the micro-electro-mechanical microphone chip is arranged at least partially within the recess of the package body.11. The ...

Cover material for hermetic sealing and package for containing electronic component

This cover material for hermetic sealing is a cover material for hermetic sealing employed for a package for containing an electronic component. The cover material 1 for hermetic sealing is constituted of a clad material including a base material layer made of an Ni—Cr—Fe alloy containing Ni, Cr and Fe or an Ni—Cr—Co—Fe alloy containing Ni, Cr, Co and Fe, and a surface layer bonded to one surface of the base material layer on a side of an electronic component containing member and made of Ni or an Ni alloy.

Layer structure for a micromechanical component

A layer structure for a micromechanical component, having: a first layer, which is usable both for an electrical wiring of the component and as electrode of the component; and a second layer which is resistant to oxide etching and is disposed below the first layer, the second layer being formed essentially in one plane.

CMOS ULTRASONIC TRANSDUCERS AND RELATED APPARATUS AND METHODS

CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided. 1. A method , comprising:forming a cavity in a first wafer above a complementary metal oxide semiconductor (CMOS) circuit in the first wafer, the first wafer including a metal electrode structure disposed within an insulating layer of the first wafer, wherein forming the cavity comprises etching an upper surface of the first wafer down to an etch stop layer of the first wafer in which the electrode structure is disposed;directly bonding the first wafer and a second wafer to seal the cavity of the first wafer with the second wafer to form a sealed cavity; andforming an ultrasonic transducer membrane from the second wafer.2. The method of claim 1 , wherein forming the ultrasonic transducer membrane from the second wafer comprises thinning a backside of the second wafer distal the cavity.3. The method of claim 2 , wherein the second wafer defines an SOI wafer including a buried insulator layer claim 2 , and wherein thinning the backside of the second wafer comprises etching a base silicon layer of the second wafer until substantially reaching the buried insulator layer.4. The method of claim 3 , wherein etching the base silicon layer further comprises using a selective etch for which the buried insulator layer functions as an etch stop layer of the second wafer.5. The method of claim 3 , wherein the buried insulator layer is SiO.6. The method of claim 2 , wherein the second wafer further comprises a bulk silicon wafer having a degeneratively doped layer claim 2 , and wherein the degeneratively doped layer is proximate the cavity of the first wafer claim 2 , and wherein thinning the backside of the second wafer comprises etching the second wafer until the ...

MICRO-TRANSFER-PRINTED COMPOUND SENSOR DEVICE

A compound sensor device includes a semiconductor substrate having an active electronic circuit formed in or on the semiconductor substrate. A sensor comprising a sensor substrate including a sensor circuit having an environmental sensor or actuator formed in or on the sensor substrate is micro-transfer printed onto the semiconductor substrate. One or more electrical conductors electrically connects the active electronic circuit to the sensor circuit. The semiconductor substrate comprises a first material and the sensor substrate comprises a second material different from the first material. 1. A compound sensor device , comprising:a semiconductor substrate;an active electronic circuit formed in or on the semiconductor substrate;one or more circuit connection pads connected to the active electronic circuit for providing signals to the active electronic circuit or receiving signals from the active electronic circuit; a sensor substrate separate, distinct, and independent from the semiconductor substrate, the sensor micro-transfer printed onto the semiconductor substrate,', 'a sensor circuit formed in or on the sensor substrate, the sensor circuit comprising an environmental sensor or actuator, and', 'one or more sensor connection pads connected to the sensor circuit for providing signals to the sensor circuit or receiving signals from the sensor circuit; and, 'a sensor comprisingone or more electrical conductors electrically connecting one or more of the circuit connection pads to one or more of the sensor connection pads, wherein the semiconductor substrate comprises a first material and the sensor substrate comprises a second material different from the first material.2. The compound sensor device of claim 1 , wherein the sensor substrate is a semiconductor substrate.3. The compound sensor device of claim 2 , wherein the first material is a silicon semiconductor and the second material is a compound semiconductor.4. The compound sensor device of claim 1 , wherein ...

SYSTEMS AND METHODS FOR ACOUSTIC HOLE OPTIMIZATION

A microphone assembly includes an acoustic transducer having a back plate and a diaphragm, such that a surface of the back plate includes a plurality of holes. At least a portion of the plurality of holes are arranged in a non-uniform pattern. The non-uniform pattern includes holes of varying sizes spaced apart from neighboring holes by varying distances. The microphone assembly further includes an audio signal electrical circuit configured to receive an acoustic signal from the acoustic transducer. 1. A microphone assembly comprising:an acoustic transducer having a back plate and a diaphragm, wherein a surface of the back plate comprises a plurality of holes, wherein at least a portion of the plurality of holes are arranged in a non-uniform pattern, and wherein the non-uniform pattern comprises holes of varying sizes and spaced apart from neighboring holes by varying distances; andan audio signal electrical circuit configured to receive an acoustic signal from the acoustic transducer.2. The microphone assembly of claim 1 , wherein at least one of the plurality of holes near a perimeter of the back plate is larger than at least one of the plurality of holes near a center of the back plate.3. The microphone assembly of claim 2 , wherein spacing between the neighboring holes is larger near the perimeter of the back plate than near the center of the back plate.4. The microphone assembly of claim 1 , wherein at least one of the plurality of holes near a perimeter of the back plate and at least one of the plurality of holes near a center of the back plate are larger than at least one of the plurality of holes in between the perimeter and the center.5. The microphone assembly of claim 1 , wherein a portion of the surface of the back plate comprises an electrode area claim 1 , and wherein at least one hole outside the electrode area is larger than at least one hole within the electrode area.6. The microphone assembly of claim 5 , wherein the portion of the plurality of ...

WATER PROOFING AND WATER DETECTION SCHEMES FOR MEMS-BASED ENVIRONMENTAL SENSING DEVICES

A waterproofed environmental sensing device with water detection provisions includes an environmental sensor to sense one or more environmental properties. The device further includes an electronic integrated circuit implemented on a substrate and coupled to the environmental sensor via a wire bonding. An air-permeable cap structure is formed over the environmental sensor, and a protective layer is formed over the wire bonding to protect the wire bonding against damage. 1. A device comprising:an environmental sensor embedded in an electro-mechanical system (MEMS) structure;an electronic integrated circuit (IC); andone or more passive elements, the device is partially enclosed in an enclosure,', 'the enclosure is at least partially filled with a sensor gel, and', 'the one or more passive elements are at least partially exposed above the sensor gel., 'wherein2. The device of claim 1 , wherein the one or more passive elements comprise capacitive elements and are coupled to the electronic IC claim 1 , and wherein the passive elements are configured to detect presence of at least water and oil above the sensor gel.3. The device of claim 2 , wherein the electronic IC includes a strain isolation provision claim 2 , and wherein the electronic IC includes resistive routings configured to allow TCO calibration.4. The device of claim 2 , further comprising a membrane configured to provide strain isolation claim 2 , wherein the membrane is made of a material including silicone rubber.5. The device of claim 4 , wherein the environmental sensor is coupled to the electronic IC via a wire bonding claim 4 , and wherein the membrane is formed between the MEMS structure and the electronic IC.6. The device of claim 4 , further comprising a land grid array (LGA) layer claim 4 , wherein the MEMS structure is wire bonded to the LGA layer.7. The device of claim 6 , wherein at least one of the LGA layer or the electronic integrated circuit includes resistive-routing for TCO calibration.8. A ...

Cmos ultrasonic transducers and related apparatus and methods

CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.

OPTICAL POWER ATTENUATOR

An optical power attenuator includes: a MEMS package storing a MEMS element that can control a reflection angle of light by a mirror; a capillary member provided to one end of a two-core optical fiber that transmits the light and that has an end surface on a side that inputs/outputs the light to the two-core optical fiber tilted at a predetermined angle relative to an optical axis of the two-core optical fiber; and a lens that causes a light emitted from one of the optical fibers of the two-core optical fiber to become incident on the MEMS element via the capillary member and guides the reflected light reflected by the mirror of the MEMS element to the other optical fiber of the two-core optical fiber. 1. An optical power attenuator , comprising:a MEMS package storing a MEMS element that can control a reflection angle of a light by a mirror;a capillary member that is provided to one end of a two-core optical fiber that transmits the light and has an end surface on a side that inputs/outputs the light to the two-core optical fiber tilted at a predetermined angle relative to an optical axis of the two-core optical fiber; anda lens that causes a light emitted from one of the optical fibers of the two-core optical fiber to become incident on the MEMS element via the capillary member and guides the reflected light reflected by the mirror of the MEMS element to the other optical fiber of the two-core optical fiber; whereinthe capillary member and the MEMS package interpose the lens and are disposed so centers are aligned with a center axis of the lens, andin the MEMS package, the MEMS element is disposed in a position where a center position of the mirror is off from the center axis of the lens and where the incident light from the lens can be reflected toward the lens.2. The optical power attenuator according to claim 1 , wherein the MEMS package is configured so no wiring component that inputs a control signal to the MEMS element is included in a mounting space of the ...

MEMS isolation structures

A device may comprise a substrate formed of a first semiconductor material and a trench formed in the substrate. A second semiconductor material may be formed in the trench. The second semiconductor material may have first and second portions that are isolated with respect to one another and that are isolated with respect to the first semiconductor material. 1. A device comprising:a substrate formed of a first material;a trench formed in the substrate; anda second material formed in the trench, the second material having first and second portions isolated with respect to one another and isolated with respect to the first material.2. The device as recited in claim 1 , wherein the first and second portions are mechanically isolated with respect to one another and are mechanically isolated with respect to the first material.3. The device as recited in claim 1 , wherein the first and second materials are conductors or semiconductors and wherein the first and second portions are electrically isolated with respect to one another and are electrically isolated with respect to the first material.4. The device as recited in claim 1 , further comprising a pinch formed in the trench to facilitate isolation of the first and second portions of the second material.5. The device as recited in claim 4 , wherein the pinch is defined by a narrowing of the trench.6. The device as recited in claim 1 , wherein the trench becomes more narrow from a top of the substrate to a bottom of the substrate.7. The device as recited in claim 1 , wherein the second material extends over at least a portion of a top of the first material.8. The device as recited in claim 1 , wherein the first material comprises single crystalline silicon and the second material comprises polysilicon.9. An electronic device comprising the device of .10. A system comprising:an actuator device having a substrate formed of a first material;a trench formed in the substrate; anda second material formed in the trench, the ...

CHIP ARRANGEMENT AND METHOD FOR MANUFACTURING A CHIP ARRANGEMENT

A chip arrangement may include: a mold compound; and a microelectromechanical systems device at least partially embedded in the mold compound. 1. A chip arrangement , comprising:a mold compound; anda microelectromechanical systems device at least partially embedded in the mold compound.2. The chip arrangement of claim 1 , wherein the mold compound comprises a plastic material.3. The chip arrangement of claim 1 , wherein the mold compound comprises a resin.4. The chip arrangement of claim 3 , wherein the resin comprises an epoxy resin.5. The chip arrangement of claim 1 , wherein the mold compound has a first side and a second side opposite the first side claim 1 , the chip arrangement further comprising:at least one electrical connector disposed at the first side of the mold compound.6. The chip arrangement of claim 5 , wherein the at least one electrical connector comprises at least one solder ball.7. The chip arrangement of claim 5 , wherein the at least one electrical connector comprises a ball grid array of solder balls.8. The chip arrangement of claim 5 , further comprising:an interconnect structure configured to electrically couple the microelectromechanical systems to the at least one electrical connector.9. The chip arrangement of claim 8 , wherein the interconnect structure comprises at least one through-via extending through at least a part of the microelectromechanical systems device.10. The chip arrangement of claim 8 , wherein the interconnect structure comprises a redistribution structure disposed at the first side of the mold compound claim 8 , the second side of the mold compound claim 8 , or both.11. The chip arrangement of claim 8 , wherein the interconnect structure comprises at least one through-via extending through at least a part of the mold compound.12. The chip arrangement of claim 11 , wherein the at least one through-via extends from the first side of the mold compound to the second side of the mold compound.13. The chip arrangement of ...

DEVICE PACKAGING METHOD AND DEVICE PACKAGE USING THE SAME

A device packaging method and a device package using the same may be provided. The device packaging method includes forming a package sacrificial layer by applying a first material on a substrate on which a device has been formed; forming a package cap by applying a second material on the package sacrificial layer; generating gas molecules from the package sacrificial layer by applying external stimuli such as light or heat to the package sacrificial layer; and heating the gas molecule and forming a cavity between the device and the package cap. 1. A device packaging method comprising:{'b': '10', 'forming a package sacrificial layer by applying a first material on a substrate on which a device has been formed (S );'}{'b': '20', 'forming a package cap by applying a second material on the package sacrificial layer (S);'}{'b': '30', 'generating gas molecules from the package sacrificial layer by applying external stimuli such as light or heat to the package sacrificial layer (S); and'}{'b': '40', 'heating the gas molecule and forming a cavity between the device and the package cap (S).'}2111020. The device packaging method of claim 1 , further comprising controlling the degree of response of the package sacrificial layer to the external stimuli such as light or heat by heating the package sacrificial layer (S) between the step (S) of forming the package sacrificial layer and the step (S) of forming the package cap.34041. The device packaging method of claim 1 , wherein the step (S) of forming the cavity further comprises developing the package cap (S).4. The device packaging method of claim 1 , wherein the first material generates gas by the external stimuli claim 1 , and wherein the second material passes the external stimuli through the first material.5. The device packaging method of claim 2 , wherein the first material generates gas by the external stimuli claim 2 , and wherein the second material passes the external stimuli through the first material.6. The device ...

Mems assembly

A MEMS assembly includes a housing having an internal volume V, wherein the housing has a sound opening to the internal volume V, a MEMS component in the housing adjacent to the sound opening, and a layer element arranged at least regionally at a surface region of the housing that faces the internal volume V, wherein the layer element includes a layer material having a lower thermal conductivity and a higher heat capacity than the housing material of the housing that adjoins the layer element.

VERTICAL MOUNT PACKAGE AND WAFER LEVEL PACKAGING THEREFOR

Vertical mount packages and methods for making the same are disclosed. A method for manufacturing a vertical mount package includes providing a device substrate with a plurality of device regions on a front surface, and a plurality of through-wafer vias. MEMS devices or integrated circuits are formed or mounted onto the device regions. A capping substrate having recesses is mounted over the device substrate, enclosing the device regions within cavities defined by the recesses. A plurality of aligned through-wafer contacts extend through the capping substrate and the device substrate. The device substrate and capping substrate can be singulated by cutting through the aligned through-wafer contacts, with the severed through-wafer contacts forming vertical mount leads. A vertical mount package includes a device sealed between a device substrate and a capping substrate. At least of the side edges of the package includes exposed conductive elements for vertical mount leads.

ELECTRONIC SYSTEM COMPRISING A MICROELECTROMECHANICAL SYSTEM AND A BOX ENCAPSULATING THIS MICROELECTROMECHANICAL SYSTEM

The present invention relates to an electronic system comprising an electronic system comprising an electromechanical microsystem and a hermetic box encapsulating said microsystem. The box includes a fastening plane. The electromechanical microsystem includes a sensitive part and at least two beams connecting the sensitive part to the fastening plane. 1. An electronic system comprising an electromechanical microsystem and a hermetic box under vacuum encapsulating said electromechanical microsystem;the box including a fastening plane;the electromechanical microsystem including:a sensitive part; andat least two beams connecting the sensitive part to the fastening plane, each beam being made from an at least partially conductive material;wherein the beams are thermally coupled to the sensitive part and are electrically coupled to one another; andwherein the system further includes a thermal regulator of the electromechanical microsystem including an electrical circuit including at least two ends connected to the beams, and a circuit controller able to generate an electrical current in the electrical circuit to modify the temperature of the sensitive part.2. The system according to claim 1 , wherein the thermal regulator further includes an elementary sensor able to measure at least one parameter of the sensitive part varying as a function of the temperature thereof;the circuit controller being able to generate an electrical current in the electrical circuit as a function of the measurements supplied by the elementary sensor.3. The system according to claim 1 , wherein each beam is connected to the fastening plane via a fastening element integrated into said plane at a point of contact;each end of the electrical circuit being electrically connected to one of the points of contact.4. The system according to claim 1 , wherein the fastening plane forms the inner surface of a face of the box.5. The system according to claim 1 , wherein the fastening plane is attached to ...

WAFER LEVEL CHIP SCALE PACKAGED MICRO-ELECTRO-MECHANICAL-SYSTEM (MEMS) DEVICE AND METHODS OF PRODUCING THEREOF

Packaged MEMS devices are described. One such device includes a substrate having an active surface with an integrated circuit. Two substrate pads are formed on the substrate; one pad is a closed ring pad. The device also includes a cap wafer with two wafer pads. One of these wafer pads is also a closed ring pad. A hermetic seal ring is formed by a first bonding between the two ring pads. The device has a gap between the substrate and the cap wafer. This gap may be filled with a pressurized gas. An electrical connection is formed by a second bonding between one substrate pad and one wafer pad. An electrical contact is disposed over the cap wafer. The device also includes an insulation layer between the electrical contact and the cap wafer. Methods of producing the packaged MEMS devices are also described. 1. A packaged micro-electro-mechanical-system (MEMS) device comprising:a silicon substrate having a first general planar surface;at least two substrate pads formed on said first general planar surface, wherein at least one substrate pad is a first closed ring pad;at least one silicon cap wafer having a second general planar surface with at least two wafer pads, wherein at least one wafer pad is a second closed ring pad, said at least one silicon cap wafer also having a third slanted surface with an angle to said second general planar surface, said at least one silicon cap wafer also having a fourth general planar surface wherein said fourth general planar surface is opposite to the second general planar surface;at least one hermetic seal ring formed between the first general planar surface and the second general planar surface by a first bonding between said first closed ring pad and said second closed ring pad;at least one gap formed between said silicon substrate and said at least one silicon cap wafer, wherein said at least one gap is filled with a pressurized gaseous species;at least one electrical connection formed by a second bonding between at least one of ...

Cmos ultrasonic transducers and related apparatus and methods

CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.

Package Structure For Micromechanical Resonator

A low-profile packaging structure for a microelectromechanical-system (MEMS) resonator system includes an electrical lead having internal and external electrical contact surfaces at respective first and second heights within a cross-sectional profile of the packaging structure and a die-mounting surface at an intermediate height between the first and second heights. A resonator-control chip is mounted to the die-mounting surface of the electrical lead such that at least a portion of the resonator-control chip is disposed between the first and second heights and wire-bonded to the internal electrical contact surface of the electrical lead. A MEMS resonator chip is mounted to the resonator-control chip in a stacked die configuration and the MEMS resonator chip, resonator-control chip and internal electrical contact and die-mounting surfaces of the electrical lead are enclosed within a package enclosure that exposes the external electrical contact surface of the electrical lead at an external surface of the packaging structure. 120-. (canceled)21. A package structure , comprising:one or more leads to electrically connect the package structure to an external circuit;a device chip having a micromechanical resonator;a control chip in electrical communication with the one or more leads and in electrical communication with the device chip, the control chip having a temperature sensor; anda conductive epoxy coupling the control chip and the device chip.22. The package structure of claim 21 , wherein:the device chip and the control chip are bonded together in a stacked relationship by the conductive epoxy, with the conductive epoxy therebetween;the package structure further comprises a lead frame, the lead frame structurally fixing the one or more leads, the lead frame defining an inset cavity;the lead frame has a first thickness, the device chip has a second thickness, and the control chip has a third thickness; andat least one of the device chip or the control chip is ...

SENSOR INTEGRATION WITH AN OUTGASSING BARRIER AND A STABLE ELECTRICAL SIGNAL PATH

The present disclosure relates to a structure and method of forming a MEMS-CMOS integrated circuit with an outgassing barrier and a stable electrical signal path. An additional poly or metal layer is embedded within the MEMS die to prevent outgassing from the CMOS die. Patterned conductors formed by a damascene process and a direct bonding between the two dies provide a stable electrical signal path.

ELECTRONIC DEVICE AND CORRESPONDING MANUFACTURING METHOD

An electronic integrated circuit (IC) component is mounted to a substrate. A cap member is applied onto the substrate and covers the electronic IC component. The cap member includes an outer wall defining an opening and an inner wall surrounding the electronic IC component. The inner wall extends from a proximal end at the substrate towards a distal end facing the opening in the outer wall to provide a reception chamber for the electronic IC component and a peripheral chamber between the inner wall and the outer wall of the cap member. An encapsulant material is provided in the reception chamber to seal the electronic IC component without being present in the peripheral chamber. 1. A device , comprising:an electronic integrated circuit (IC) component arranged on a substrate; 'an outer wall having a first opening therein and an inner wall surrounding the electronic IC component, said inner wall extending from a proximal end at the substrate towards a distal end facing said first opening in the outer wall to provide a reception chamber for the electronic IC component within the inner wall and further provide a peripheral chamber between the inner wall and the outer wall of the cap member, wherein the peripheral chamber of the cap member surrounds the reception chamber; and', 'a cap member applied onto the substrate and covering the electronic IC component, wherein the cap member comprisesan encapsulant material in the cap member, the encapsulant material provided in the reception chamber to sealingly encapsulate the electronic IC component arranged on the substrate.2. The device of claim 1 , wherein the inner wall has a tapered shape with said proximal end wider than said distal end.3. The device of claim 1 , wherein the distal end of the inner wall is arranged to form a second opening facing said first opening in the outer wall and having a gap between the first and second openings.4. The device of claim 1 , wherein the encapsulant material filling the reception ...

METHOD OF MANUFACTURING ELECTRONIC DEVICES AND CORRESPONDING ELECTRONIC DEVICE

A first electronic component, such as a sensor having opposed first and second surfaces and a first thickness, is arranged on a support member with the second surface facing towards the support member. A second electronic component, such as an integrated circuit mounted on a substrate and having a second thickness less than the first thickness, is arranged on the support member with a substrate surface opposed the second electronic component facing towards the support member. A package molding material is molded onto the support member to encapsulate the second electronic component while leaving exposed the first surface of the first electronic component. The support member is then removed to expose the second surface of the first electronic component and the substrate surface of the substrate. 1. A method , comprising:arranging a first electronic component on a support member, wherein the first electronic component has opposed first and second surfaces with the second surface facing towards the support member, wherein the first electronic component has a first thickness between the opposed first and second surfaces;arranging a second electronic component that is mounted to a substrate on said support member, wherein the substrate has a substrate surface opposed the second electronic component and facing towards the support member, wherein the substrate and the second electronic component combined have a second thickness which is less than the first thickness;molding a package molding material onto the support member to encapsulate the second electronic component while leaving exposed the first surface of the first electronic component; andremoving the support member to expose the second surface of the first electronic component and the substrate surface of the substrate.2. The method of claim 1 , further comprising claim 1 , prior to molding claim 1 , providing electrically-conductive formations between the second electronic component and the substrate claim 1 , ...

Mold material architecture for package device structures

Embodiments include a microelectronic device package structure having a die on a substrate, where a first side of the die is electrically coupled to the substrate, and a second side of the die is covered with a first material having a first thermal conductivity. A second material is adjacent to a sidewall of the die and adjacent to a sidewall of the first material. The second material has second thermal conductivity, smaller than the first thermal conductivity. The second material may have mechanical and/or underfill properties superior to those of the first material. Together, the two materials may provide a package structure having enhanced thermal and mechanical performance.

Chip package and manufacturing method thereof

A chip package includes a chip having an upper surface and a lower surface. A sensing element is disposed on the upper surface of the chip, and a thermal dissipation layer is disposed below the lower surface of the chip. A plurality of thermal dissipation external connections are disposed below the thermal dissipation layer and in contact with the thermal dissipation layer.

MEMS STRUCTURE, CAP SUBSTRATE AND METHOD OF FABRICATING THE SAME

A micro electro mechanical system (MEMS) structure is provided, which includes a first substrate, a second substrate, a MEMS device and a hydrophobic semiconductor layer. The first substrate has a first portion. The second substrate is substantially parallel to the first substrate and has a second portion substantially aligned with the first portion. The MEMS device is between the first portion and the second portion. The hydrophobic semiconductor layer is made of germanium (Ge), silicon (Si) or a combination thereof on the first portion, the second portion or the first portion and the second portion and faces toward the MEMS device. A cap substrate for a MEMS device and a method of fabricating the same are also provided. 1. A micro electro mechanical system (MEMS) structure , comprising:a first substrate having a first portion;a second substrate substantially parallel to the first substrate, and having a second portion substantially aligned with the first portion;a MEMS device between the first portion and the second portion; anda hydrophobic semiconductor layer made of germanium (Ge), silicon (Si) or a combination thereof on the first portion, the second portion or the first portion and the second portion and facing toward the MEMS device.2. The MEMS structure of claim 1 , wherein the hydrophobic semiconductor layer is crystallized.3. The MEMS structure of claim 1 , wherein the hydrophobic semiconductor layer further comprises a dopant selected from the group consisting of Group IIIA elements and Group VA elements.4. The MEMS structure of claim 3 , wherein the hydrophobic semiconductor layer is made of Ge claim 3 , and the dopant is antimony (Sb).5. The MEMS structure of claim 1 , wherein the first substrate is comprised in a cap substrate claim 1 , and the cap substrate further comprises a first bonding pad on the first substrate claim 1 , and the first bonding pad is composed of the same material as the hydrophobic semiconductor layer.6. The MEMS structure of ...

MEMS PACKAGE WITH ROUGHEND INTERFACE

A method includes: providing a first substrate on which a plurality of first semiconductor devices is formed; providing a second substrate on which a plurality of second semiconductor devices is formed; and coupling the first and second substrates by contacting respective dummy pads of the first and second substrates, wherein at least one of the dummy pads of the first and second substrates comprises plural peaks and valleys. 1. A method , comprising:providing a first substrate on which a first semiconductor device is formed;providing a second substrate on which a second semiconductor device is formed;roughening a top surface of a first dummy pad extending outwardly from the first substrate;roughening a top surface of a second dummy pad extending outwardly from the second substrate;providing a first bonding pad extending outwardly from the first substrate; andproviding a second bonding pad extending outwardly from the second substrate, wherein the first and second bonding pads are located so as to be bonded with each other when the first and second substrates are coupled to one another;coupling the first and second substrates by contacting the roughened top surfaces of the first and second dummy pads with each other so as to limit a lateral shift between the first and second substrates; andproviding a metal plate around an edge of a top surface of the second substrate so as to prevent lateral shifting between the first and second substrates after they are coupled to one another.2. The method of claim 1 , wherein the first semiconductor device comprises a micro-electro-mechanical system (MEMS) device.3. The method of claim 1 , wherein the second semiconductor device comprises a complementary metal-oxide-semiconductor (CMOS) circuit.4. The method of claim 1 , wherein before coupling the first and second substrates claim 1 , the method further comprises:flipping the second substrate and aligning the first semiconductor device with the second semiconductor device.5. The ...

Methods and structures for thin-film encapsulation and co-integration of same with microelectronic devices and microelectromechanical systems (mems)

Methods and structures that may be implemented in one example to co-integrate processes for thin-film encapsulation and formation of microelectronic devices and microelectromechanical systems (MEMS) such as sensors and actuators. For example, structures having varying characteristics may be fabricated using the same basic process flow by selecting among different process options or modules for use with the basic process flow in order to create the desired structure/s. Various process flow sequences as well as a variety of device design structures may be advantageously enabled by the various disclosed process flow sequences.

SEMICONDUCTOR GAS SENSOR DEVICE AND MANUFACTURING METHOD THEREOF

A semiconductor gas sensor device includes a first cavity that is enclosed by opposing first and second semiconductor substrate slices. At least one conducting filament is provided to extend over the first cavity, and a passageway is provided to permit gas to enter the first cavity. The sensor device may further including a second cavity that is hermetically enclosed by the opposing first and second semiconductor substrate slices. At least one another conducting filament is provided to extend over the second cavity. 1. A semiconductor gas sensor device , comprising:a doped semiconductor substrate of a first semiconductor slice,a first insulating layer placed above said doped semiconductor substrate,a part of at least one first cavity formed inside said first insulating layer and said doped semiconductor substrate and extending inside said doped semiconductor substrate to a first depth,at least one conductive filament placed over said part of the at least one first cavity in a bridge way,a conductive metal layer placed at the ends of at least one filament for making electrical contact,another doped semiconductor substrate of a second semiconductor slice comprising another part of the at least one first cavity and being placed above said first semiconductor slice so as to form and close said at least one first cavity, said another doped semiconductor substrate comprising at least one hole in correspondence of the first cavity for the inlet of gas to detect.2. The semiconductor gas sensor device according to claim 1 , wherein the first semiconductor slice comprises:parts of the first cavity and a second cavity formed inside said first insulating layer and said doped semiconductor substrate and extending inside said doped semiconductor substrate to the first depth,a first pair of conductive filaments and a second pair of conductive filaments placed inside said respective first and second cavities in a bridge way, said first and second pairs of conductive filaments being ...

MULTIPLE SILICON TRENCHES FORMING METHOD FOR MEMS SEALING CAP WAFER AND ETCHING MASK STRUCTURE THEREOF

A multiple silicon trenches forming method and an etching mask structure, the method comprises: step S, providing a MEMS sealing cap silicon substrate (); step S, forming n stacked mask layers () on the MEMS sealing cap silicon substrate (), after forming each mask layer, photolithographing and etching the mask layer and all other mask layers beneath the same to form a plurality of etching windows (D, D, D); step S, etching the MEMS sealing cap silicon substrate by using the current uppermost mask layer and a layer of mask material beneath the same as a mask; step S, removing the current uppermost mask layer; step S, repeating the step S and the step S until all the n mask layers are removed. The present invention can form a plurality of deep trenches with high aspect ratio on the MEMS sealing cap silicon substrate using conventional semiconductor processes, avoiding the problem that the conventional spin coating cannot be conducted on a sealing cap wafer with deep trenches using photoresist. 1. A multiple silicon trenches forming method for MEMS sealing cap wafer , characterized in comprising:{'b': '11', 'step S, providing a MEMS sealing cap silicon substrate;'}{'b': '12', 'step S, forming n stacked mask layers on the MEMS sealing cap silicon substrate, after forming each mask layer, photolithographing and etching the mask layer and all other mask layers beneath the same to form multiple etching windows, wherein n is a positive integer greater than or equal to 2, and any two adjacent mask layers are made of different materials;'}{'b': '13', 'step S, etching the MEMS sealing cap silicon substrate by using a current uppermost mask layer in the n mask layers as a mask, with an etching selectivity ratio of the MEMS sealing cap silicon substrate to the current uppermost mask layer greater than or equal to 10:1;'}{'b': '14', 'step S, removing the current uppermost mask layer;'}{'b': 15', '13', '14, 'step S, repeating the step S and the step S until all the n mask layers ...