Многоканальная самодиагностируемая вычислительная система с резервированием замещением и способ повышения ее отказоустойчивости (варианты)

Изобретение относится к вычислительной технике и может быть использовано в ракетно-космической и авиационной технике. Технический результатом заключается в повышении надежности и отказоустойчивости многоканальной вычислительной системы. Технический результат достигается за счет диагностирования работоспособности активного канала процессором самого канала, формировании импульсов исправности активного канала, по результатам анализа которых и периода их следования формируют последовательность логических сигналов, преобразования их в логические сигналы противоположной полярности, которые затем преобразуют в синусоидальное напряжение и в постоянное напряжение для управления ключом отключения напряжения вторичного источника питания резервного канала. По результатам анализа импульсов исправности и периода их следования формируют последовательность логических сигналов, преобразуют их в токовые сигналы противоположного направления, затем в логические сигналы противоположной полярности, которые затем ...

СПОСОБ И УСТРОЙСТВО ДОСТУПА К ДАННЫМ

Изобретение относится к области информационных технологий. Технический результат заключается в уменьшении потери данных и сокращении времени прерывания доступа, когда данные успешно не считываются. В способе при получении запроса на считывание данных для группы первых дисков осуществляют перенос адреса считывания; определение диапазона местоположений первой полосы группы первых дисков согласно адресу считывания; последовательное считывание данных из первых полос в пределах диапазона местоположений первой полосы, задание результата считывания данных для первой полосы, данные которой успешно не считываются, как предварительно установленных дополняющих данных, осуществляют продолжение считывания данных из следующей первой полосы до тех пор, как данные не будут считаны из всех первых полос. Осуществляют возврат результата считывания данных для каждой первой полосы. 2 н. и 12 з.п. ф-лы, 12 ил.

СПОСОБ ОБНАРУЖЕНИЯ ОШИБКИ ПРИ ЧТЕНИИ ЭЛЕМЕНТА ДАННЫХ

Изобретение относится к способу обнаружения ошибки при считывании элемента данных, содержащему этапы, на которых: а) сохраняют первую копию элемента данных в первой области электронной памяти и сохраняют вторую копию элемента данных во второй области электронной памяти, b) считывают значения первой и второй копий элемента данных соответственно в первой и второй областях, с) сравнивают считанные значения первой и второй копий элемента данных, е) если считанные значения первой и второй копий не совпадают, то повторяют предыдущие этапы b) и с), и f) если считанные значения на этапе е) совпадают, обнаруживают ошибку считывания указанного элемента данных, а в противном случае не обнаруживают ошибки считывания указанного элемента данных. Заявленный способ позволяет отличить ошибку считывания от ошибки, вызванной искажением данных, таким образом позволяет избежать нерационального использования компьютерных ресурсов при проведении мер по устранению ошибок. 4 н. и 7 з.п. ф-лы, 5 ил.

Optimierte Stricherkennung für redundante Speicherplattenanordnung

Speichergerät und Verfahren zu seiner Steuerung

Schreiben neuer Daten einer ersten Blockgröße in einen RAID-Array, der sowohl die Parität als auch die Daten in einer zweiten Blockgröße speichert

Verfahren implementiert in einer Vorrichtung, wobei das Verfahren umfasst:Empfangen neuer Daten, durch einen „Redundante Anordnung unabhängiger Platten“ (RAID)-Controller (102), die geschrieben werden sollen, wobei die neuen Daten in Blöcken einer ersten Blockgröße angegeben werden;Lesen alter Daten (606) und alter Parität (608) durch den RAID-Controller (102), die den alten Daten entspricht, gespeichert in Blöcken einer zweiten Blockgröße, die größer ist als die erste Blockgröße;Berechnen einer neuen Parität (610) durch den RAID-Controller (102), basierend auf den neuen Daten, den alten Daten, und der alten Parität; undSchreiben der neuen Daten und der neuen Parität durch den RAID-Controller (102), ausgerichtet auf die Blöcke der zweiten Blockgröße, wobei Teile der alten Daten, die nicht durch den RAID-Controller (102) überschrieben werden, ebenfalls in die Blöcke der zweiten Blockgröße geschrieben werden, wobei der RAID-Controller (102) Platten steuert, die als RAID-5 konfiguriert sind ...

Raid-Array-Zugriff durch ein das Raid-Array nicht kennendes Betriebssystem

Ein System, das folgende Merkmale aufweist: einen Prozessor, der konfiguriert ist, um ein erstes Betriebssystem und ein zweites Betriebssystem auszuführen; eine Mehrzahl an Speicherlaufwerken; wobei das zweite Betriebssystem die Mehrzahl von Speicherlaufwerken als ein RAID-Array konfiguriert und das erste Betriebssystem ohne Kenntnis dessen, dass die Speicherlaufwerke als ein RAID-Array konfiguriert sind, auf die Speicherlaufwerke zugreift.

Netzwerkplattenanordnung.

Ausgleich nachlassender Funktionsfähigkeit von Halbleiterdatenträgern auf der Grundlage der von einer RAID-Steuereinheit empfangenen Daten- und Paritätsnutzungsinformationen

Verfahren, das folgende Schritte umfasst:Konfigurieren einer Vielzahl von Halbleiterdatenträgern (solid state disks) als redundante Anordnung unabhängiger Datenträger/Laufwerke (RAID), wobei in der Vielzahl von Halbleiterdatenträgern eine Vielzahl von Blöcken gespeichert sind und wobei die geschätzte Lebenserwartung von Speicherbereichen der Vielzahl von Halbleiterdatenträgern, die mindestens einigen der Vielzahl von Blöcken entsprechen, unterschiedlich hoch ist;Einbeziehen einer Anzeige durch eine Steuereinheit in Datenstrukturen, die einem in den Speicherbereichen der Vielzahl von Halbleiterdatenträgern zu speichernden Block zugehörig sind, dass der Block der RAID entsprechende Paritätsinformationen enthält, wobei die Paritätsinformationen Informationen umfassen, die einem Fehlerkorrekturmechanismus zum Schutz vor Datenträgerausfall entsprechen; undSenden der Datenstrukturen durch die Steuereinheit an die Vielzahl von Halbleiterdatenträgern,wobei die Vielzahl von Halbleiterdatenträgern ...

Elektronisches Steuergerät

Die Erfindung betrifft ein elektronisches Steuergerät mit einem hochgradig zuverlässigen Speicher und einer möglichst geringen Menge an verwendetem Speicher. In dem elektronischen Steuergerät gemäß der vorliegenden Erfindung werden die Daten nach der Fehlerkorrektur in einem zweiten Speicherbereich gespeichert, der sich von dem ersten Speicherbereich, in dem der Datenfehler detektiert wird, unterscheidet, wobei die Daten in dem zweiten Speicherbereich zur Ablaufsteuerung verwendet werden und Daten von dem ersten Speicherbereich ebenfalls kontinuierlich zur Ablaufsteuerung verwendet werden.

Ein Informationsverarbeitungsgerät mit einer Fehlerprüf- und Korrekturschaltung

Mehrfachanwenderpersonalisierung bei einer Sprachschnittstellenvorrichtung

Ein Verfahren bei einer elektronischen Vorrichtung mit einem oder mehreren Mikrofonen und einem Lautsprecher enthält ein Empfangen einer ersten Spracheingabe in freier Form; ein Vergleichen der ersten Spracheingabe mit einer Gruppe von Sprachmodellen, die mit einer Vielzahl von Anwendern assoziiert sind, die mit der elektronischen Vorrichtung assoziiert sind, wobei die Sprachmodelle zur elektronischen Vorrichtung trainiert werden; basierend auf dem Vergleichen Bestimmen, dass die erste Spracheingabe einem ersten Anwender der Vielzahl von Anwendern entspricht; und Präsentieren einer Antwort gemäß der Bestimmung.

SPEICHERANORDNUNG UND VERFAHREN ZUM VERIFIZIEREN EINES SPEICHERZUGRIFFS

Gemäß einer Ausführungsform wird eine Speicheranordnung beschrieben, die ein Speicherzellenfeld mit Spalten und Zeilen von beschreibbaren Speicherzellen, eine Speichersteuereinrichtung, die eingerichtet ist, einen Zugriff auf eine erste Gruppe von Speicherzellen einer Zeile von Speicherzellen zu veranlassen und zusammen mit dem Zugriff auf die erste Gruppe von Speicherzellen einen Lesezugriff auf eine zweite Gruppe von Speicherzellen der Zeile von Speicherzellen zu veranlassen und eine Verifizierungsschaltung aufweist, die eingerichtet ist, zu überprüfen, ob der Zugriff auf die erste Gruppe von Speicherzellen auf die korrekte Zeile von Speicherzellen durchgeführt wurde, basierend darauf, ob bei dem Lesezugriff auf die zweiten Gruppe von Speicherzellen gelesenen Werte mit zuvor von der zweiten Gruppe von Speicherzellen gespeicherten Werten übereinstimmen.

Fehlertolerantes Datenspeicherungsverfahren

Prioritizing data reconstruction in distributed storage systems

A hybrid distributed storage system

A method of operating a distributed object storage system includes selecting a set of storage elements 34, e.g. hard drives, upon each of which are stored a number of level-1 encoding fragments 730 of an object to be stored 520. The number of storage elements is equal to the basic number of storage devices 812 which are necessary to reconstruct the data object, plus the desired number of redundant storage devices 822. A second set of storage elements 36 is selected, being fewer than the basic number of storage elements of the level-1 storage set, upon which a group of level-2 fragments 750 is stored. The stored object may be reconstructed from the level one or level two fragments, or a combination of both. By encoding the object twice, additional redundancy can be obtained. The encoding of the fragments may be based on an erasure code.

Data management in solid state storage systems

Arrangement and method for detection of write errors in a storage system

An arrangement for detection of write errors in a disk storage system 100 by using phase fields F, to improve data integrity and have a low impact on disk performance. User data blocks D are divided into groups 120 and a check block P is inserted after each group. The check block P contains the phase field F and is updated each time the group is written. The phase field F could be a single bit field which is inverted after each write or it could be a multi-bit counter which is incremented after each write. The check block P may also contain an XOR combination of the data blocks D or it may also contain an XOR combination of the logical block address or LBA 220 of the group.

Data storage array rebuild

A method is provided for preventing data loss during data reconstruction from a failed data storage device to a replacement data storage device in a redundant data storage array including a plurality N of data storage devices. In the array, data is arranged on the devices in multi-block stripes each of which comprises N-1 data blocks and a parity block, with one block from each stripe being located on each of the N devices. The normal reconstruction process includes reconstructing each data block of the failed storage device for each stripe in the array and storing the reconstructed data block on the replacement storage device. If during the rebuild process, a write I/O request to modify a data block is received and the request does not require access to the replacement disk, the write request is blocked, the data stripe which includes the data block to be modified is determined, the replacement data block for the determined data stripe is reconstructed for storage on the replacement disk ...

Data access apparatus and distributed data base system

Methods and systems for hierarchical management of distributed data

Data storage and transmission using parity data

A method of storing or transmitting data comprises separating the data, such as a web page, into a plurality of data subsets. Parity data is then generated from the plurality of data subsets (e.g. using XOR) such that any one or more of the plurality of data subsets may be recreated from the remaining data subsets and the parity data. These steps are then repeated on any one or more of the plurality of data subsets and parity data providing further data subsets and further parity data. Each of the further data subsets and further parity data are stored in separate storage locations or transmitted. This system ensures that if data on a particular device is lost, it may be recreated from the data sets stored in separate locations.

Selectively disabling error repair circuitry in an integrated circuit

Integrated circuit 2 comprises sequential pipeline stages 6, 8 within a processing pipeline, error detection circuitry 10, 12 and error repair circuitry 14. Shadow latch 10 samples and stores an output value of pipeline stage 6 at a time subsequent to the output signal captured by register 4 being applied to pipeline stage 8. When a difference is detected between the output signals stored within register 4 and shadow latch 10, an error is detected and error tolerance circuitry 16 determines, in dependence upon a control parameter, whether to selectively disable error repair circuitry 14. If error repair is performed, an error signal controls multiplexer 14 to switch the value stored in shadow latch 10 for storage in register 4. If a detected error is a tolerable error then error repair circuit 14 remains disabled despite detection of the error. Disabling error repair circuitry may be performed under program control by setting a fault-tolerance mode flag.

Memory error correction

Memory error correction.

An EEPROM comprises a memory array (100) including a plurality of bit lines, a plurality of memory cells respectively connected with the bit lines and parity cells, and an error check and correction circuit with a column gate (120) connected with the plurality of bit lines for loading input data in respective page buffers (900) and processing memory data in multiple byte units of the input data so as to generate parity data consisting of a plurality of bits randomly written into the page buffers, wherein the page buffers are connected between the plurality of bit lines and the column gate. A separation means (600) is preferably provided for controlling the connection between the page buffers and plurality of bit lines. ...

Real time raid for a continuous media server system

A method and apparatus for providing real time reconstruction of corrupted disk from a redundant array of disks. Each parcel is divided into "N" blocks of data. An "N+1st" parity block for each parcel is derived based on the content of the "N" blocks of data. The "N" blocks of data and the parity block for each parcel are stored in stripes in the blocks in a redundancy group consisting of "N+1" data storage units. Data is read in "N+1" whole block reads (600, 610, 620). If none of the received blocks are parity then the data is copied to a buffer (630,650). If parity exists in some of the received blocks, then if the "N+1" block has been received the data is copied to a buffer if not then XOR blocks are received (630,635,640,650). ...

Method and controller for processing data multiplication in raid system

Error Code Management In Systems Permitting Partial Writes

Disclosed is an apparatus and method of generating error codes for a data block having a set of data values, the error code dependent on the data values. The apparatus has error code generating circuitry and a memory to store the data values and the error codes. The circuitry is configured to when some of the data values within the data block are stored in the memory to generate an updated value of the error code for the data block. When some of the data values in the data block are written to the memory and proper subset of the data in the data block are stored in the memory the error code generating circuitry marks as invalid the error code for the data block. The memory may be a cache line in a cache memory and the circuitry generates error codes for a plurality of lines in the cache.

Error-correction encoding and decoding

Encoding data supplied to a data channel using a quarter product code CQ, having identical row and column codes and being reversible, whereby a codeword corresponds to a triangular sub-array of a square matrix confined between its diagonal and anti-diagonal. K input data symbols are stored for encoding. The K input data symbols are assigned to respective symbol locations in a notional square array, having n rows and n columns of symbol locations, to define a plurality of k-symbol words in respective rows of the array. The k-symbol words are encoded by encoding rows and columns of the array in dependence on a product code C having identical row and column codes, each being a reversible error-correction code of dimension k and length n=2n. This encoding is performed so as to define a codeword, having n2 code symbols corresponding to respective locations of said array, of a quarter product code CQ defined by CQ = { X − XT − (X − XT)F } where X is an (n by n)-symbol matrix defining a ...

Data access apparatus and distributed data base system

In a distributed data-base system, an access apparatus 90 is coupled by a network 91 to a manager sub-system 70 and a plurality of member sub-systems 80, 81 managed by the manager sub-system in response to requests from the access apparatus 90.

Writing version checking data for a data file onto two data storage systems.

Data is written to a storage system with associated version checking data, at the same time another copy of the version checking data is stored in a second storage system. When the data is rewritten or updated the version checking data on the first storage device is incremented and copied to the second storage system. The method may include the writing of checksum data to the first storage system. The second storage device may be in a storage controller coupled to the first storage system and it may be a non-volatile memory. When the data is read, the data is validated by comparing the two copies of the version checking data.

Storage system comprising a controller which performs a read-after-write check

Two dimensional storage array with prompt parity in one dimension and delayed parity in a second dimension

A storage system is described including a two dimensional array of disk drives having multiple logical rows of drives and multiple logical columns of drives, and at least one drive array controller configured to store data in stripes (e.g.. across the logical rows). A given drive array controller calculates and stores: row error correction data for each stripe of data across each one of the logical rows on one of the drives for each row, and column error correction data for column data grouped (i.e.. striped) across each one of the logical columns on one of the drives for each column. The drive array controller may respond to a write transaction involving a particular row data stripe by calculating and storing row error correction data for the row data stripe before completing the write transaction. In this case, the drive array controller delays calculating and storing the column error correction data for each column data stripe modified by the write transaction until after completion ...

Distributed data storage and recovery

Data is divided into two component blocks. An exclusive OR (XOR) parity block is generated, which can recreate one of the component blocks. The component and parity blocks are each divided into two sub-blocks. An XOR parity sub-block is generated for each block, which can recreate one of the sub-blocks in the block. A sub-block in the parity block can also recreate one of the sub-blocks in a component block. The sub-blocks may be further divided and further parity may be generated. The sub-blocks are then stored in different locations, such as separate remote physical devices. The data may be encrypted. The sub-blocks may be transmitted over different transmission channels. The channels may be different radio frequencies.

Raid array access by a raid array-unaware operating system

Systematic erasure coding technique

Data is stored in a redundant data storage system with n data storage nodes. Source data is stored on k of the nodes di and redundant data is stored on the remaining r nodes pi. Each stripe of data is divided into α sub-stripes, where 1 < α < rm and m = ceiling( k / r ). The redundant data stored in a sub-stripe on the first redundant node p1 is generated from the data in that sub-stripe. The data stored in a sub-stripe on the remaining redundant nodes p2pn is calculated using data from that sub-stripe and other sub-stripes. The data stored in a sub stripe of one of the nodes may be generated using data from k sub-stripes. The redundant data may be produces using linear combinations of the source data in a finite field.

Repair-optimal parity code

Two parities are generated using repair-optimal maximum-distance-separable (MDS) code, eg. Monarch code. First parity P1 (530) has three parts. First part 532 is a horizontal parity generated by XOR-ing data elements in the same row of content stores 502-508. Second and third parts 534, 536 are based on orthogonal permutations of content from the content stores, e.g. butterfly code, and update the first part. Second part is based, for example, on subset 508, while the third part on subsets 502-506. Second parity P2 (540) has two parts: the first (542) is an orthogonal permutation of content stores 502-508 where contributions of 508 to correcting factors are omitted. The second (544) updates 542 and comprises a subset, e.g. even row selection, of the data elements used for the second and third parts of P1. The problem of using less of remaining data to repair from failures of data storages is addressed.

Autonomic parity exchange in data storage systems

A computer-implemented method is provided for increasing the failure tolerance of an array of storage elements in a storage system. The computer-implemented method includes configuring an array to include a plurality of storage elements in n > 1 sets of storage elements. The computer-implemented method also includes configuring an erasure-correcting code such that at least one column of the storage elements of the array stores row parity information, and at least one row of the storage elements of the array stores column parity information. Still yet, the computer-implemented method includes, subsequent to a failure of one of the storage elements storing data, selecting a recipient storage element from the array, and rebuilding at least a portion of the data onto the recipient storage element by performing a parity exchange operation that retains a failure tolerance of the set of storage elements containing the failed storage element.

Method for partial updating data content in a distributed storage network

SEMICONDUCTOR MEMORY DEVICE

A hybrid distributed storage system

Disk array data storage

Recording apparatus

An apparatus and method for triggering action performance

Storing data sequentially in zones in a dispersed storage network

PROCEDURE FOR THE DATA PROTECTION AND EQUIPMENT FOR ITS EXECUTION

DATA PROCESSING DEVICE, PROCEDURE FOR THE CONTROLLING OF THE DATA PROCESSING DEVICE AND RECORDING MEDIUM

MEMORY SYSTEM UNDER USE OF A DIRECT CURRENT-ACHIEVEMENT-FREE GATE FIELD TO THE ERROR CORRECTION.

MEMORY FOR DISK UNIT.

MEMORY SYSTEM FROM SEVERAL DATA STORAGE UNITS EXISTS, WITH DIFFERENT ERRORTOLERANT PROCEDURE

LOAD-COMPENSATORY CONFIGURATION FOR MEMORY ARRANGEMENTS THE REFLECTION AND STRIP USES

DATA RECOVERY USING ERROR STRIP IDENTIFIERS

A secure storage appliance is disclosed, along with methods of storing and reading data in a secure storage 5 network. The secure storage appliance is configured to present to a client a virtual disk, the virtual disk mapped to the plurality of physical storage devices. The secure storage appliance is capable of executing program instructions configured to generate a plurality of 10 secondary data blocks by performing splitting and encrypting operations on a primary data block received from the client for storage on the virtual disk and reconstitute the primary data block from at least a portion of the plurality of secondary data blocks stored 15 in shares on corresponding physical storage devices in response to a request from the client. Write counters written with the secondary data blocks are used to determine whether the secondary data blocks were stored correctly.

Link error correction in memory system

Conventional link error correction techniques in memory subsystems include either widening the I/O width or increasing the burst length. However, both techniques have drawbacks. In one or more aspects, it is proposed to incorporate link error correction in both the host and the memory devices to address the drawbacks associated with the conventional techniques. The proposed memory subsystem is advantageous in that the interface architecture of conventional memory systems can be maintained. Also, the link error correction is capability is provided with the proposed memory subsystem without increasing the I/O width and without increasing the burst length.

METHOD AND MEANS FOR TOLERATING MULTIPLE DEPENDENT OR ARBITRARY DOUBLE DISK FAILURES IN A DISK ARRAY

Improved processes for making opioids including 14-hydroxycodeinone and 14-hydroxymorphinone

Improved processes for making opioid products having low impurity levels including making 14-hydroxycodeinone and 14-hydroxymorphinone from thebaine and oripavine, respectively.

Data integrity detection and correction

The proposed technology provides methods, devices and computer programs for performing data error detection and correction. It is provided a method for performing data error detection and correction. The method comprises the step S1 of providing multiple Mojette transform projections (pi,q,) obtained by applying an encoding Mojette transform on an input, or original, block of data elements or values. The method also comprises decoding S2 the multiple Mojette transform projections to form a reconstructed block of data elements or values. The method also comprises investigating S3 whether any of the decoded Mojette transform projections comprises at least one bin≠ 0 following generation of the reconstructed block, thus providing an indication that a data error has been detected in the reconstructed block. The method also comprises determining S4, if at least one bin≠ 0, a corrected reconstructed block of data elements or values based on the decoded Mojette transform projections. The proposed ...

Distributed secure data storage and transmission of streaming media content

Disclosed is a method for the distributed storage and distribution of data. Original data is divided into fragments and erasure encoding is performed on it. The divided fragments are dispersedly stored on a plurality of storage mediums, preferably that are geographically remote from one another. When access to the data is requested, the fragments are transmitted through a network and reconstructed into the original data. In certain embodiments, the original data is media content which is steamed to a user from the distributed storage.

Quantum error correction

A quantum error correction method including correcting a stream of syndrome measurements produced by a quantum computer comprises receiving a layered representation of error propagation through quantum error detection circuits, the layered representation comprises a plurality of line circuit layers that each represent a probability of local detection events in a quantum computer associated with one or more potential error processes in the execution of a quantum algorithm; during execution of the quantum algorithm: receiving one or more syndrome measurements from quantum error detection circuits; converting the syndrome measurements into detection events written to an array that represents a patch of quantum error correction circuits at a sequence of steps in the quantum algorithm; determining one or more errors in the execution of the quantum algorithm from the detection events in dependence upon the stored line circuit layers; and causing correction of the syndrome measurements based on ...

Redundant disc computer having targeted data broadcast

Data storage system with parity reads and writes only on operations requiring parity information

Computer system and process for transferring multiple high bandwidth streams of data between multiple storage units and multiple applications in a scalable and reliable manner

ARRAYED DISK DRIVE SYSTEM AND METHOD

CONTROL STORE CHECKING SYSTEM AND METHOD

ARCHIVAL DATA PROTECTION

DISK DRIVE MEMORY

DISK DRIVE MEMORY The disk drive memory of the present invention uses a large plurality of small form factor disk drives to implement an inexpensive, high performance, high reliability disk drive memory that emulates the format and capability of large form factor disk drives. The plurality of disk drives are switchably interconnectable to form parity groups of N+1 parallel connected disk drives to store data thereon. The N+1 disk drives are used to store the N segments of each data word plus a parity segment. In addition, a pool of backup disk drives is maintained to automatically substitute a replacement disk drive for a disk drive in a parity group that fails during operation.

SLOW RESPONSES IN REDUNDANT ARRAYS OF INEXPENSIVE DISKS

A redundant array includes a plurality of disks, a bus coupling the disks, a receiving device, and a device to reconstruct a block stored in one of the disks. The device reconstructs the block with associated data parity blocks from other disks. The device transmits the reconstructed block to the receiving device (110) in response to the one of the disks being slowly responding (106). A method includes requesting a first disk to transmit a first block (104), reconstructing, when necessary, the first block from associated data stored in other disks of a RAID configuration, and transmitting the reconstructed block directly to a receiving device. The transmitting is in response to the first disk not transmitting the block in a predetermined time.

QUANTUM ERROR CORRECTION

A quantum error correction method including correcting a stream of syndrome measurements produced by a quantum computer comprises receiving a layered representation of error propagation through quantum error detection circuits, the layered representation comprises a plurality of line circuit layers that each represent a probability of local detection events in a quantum computer associated with one or more potential error processes in the execution of a quantum algorithm; during execution of the quantum algorithm: receiving one or more syndrome measurements from quantum error detection circuits; converting the syndrome measurements into detection events written to an array that represents a patch of quantum error correction circuits at a sequence of steps in the quantum algorithm; determining one or more errors in the execution of the quantum algorithm from the detection events in dependence upon the stored line circuit layers; and causing correction of the syndrome measurements based on ...

SYSTEM AND METHOD FOR DATA PROTECTION WITH MULTIDIMENSIONAL PARITY

A high availability, high reliability storage system (215) that leverages rapid advances in commodity computing devices and the robust nature of internetwork technology such as the Internet (213). A system of parity distribution (505) in accordance with the present invention allows for greater fault tolerance and levels of storage efficiency than possible with conventional RAID (levels 0-5) paradigms. Data can be recovered or made available even in the case of loss of N, N+1, or more devices or storage elements (215) over which stripes of the data set have been distributed or partitioned. The present invention provides a parity distribution that can be used to distribute data stored in a single storage device or across multiple connected or otherwise networked devices.

STORING PARITY INFORMATION FOR DATA RECOVERY

DATA STORAGE ARRAY

A data storage subsystem that includes three data storage units, three check storage units, and an array controller coupled to the three data and three check storage units can tolerate failure of any three data and check storage units failures can be occur before data stored on the data storage subsystem is lost. Information is stored on the data storage subsystem as a symmetric Maximum Distance Separation code, such as Winograd code, a Reed Solomon code, an EVENODD code or a derivative of an EVENODD code. The array controller determines the contents of the check storage units so that any three erasures of the data storage units and the check storage units can be corrected by the array controller. The array controller updates a block of data contained in any one of the data storage units and the check storage units using only six IO operations.

GENERATING STORAGE SYSTEM COMMANDS

Systems and methods for generating storage system commands are presented. Logical volumes comprise one or more storage areas. The methods include providing a map of the logical volume from information relating to the types of the storage areas composing the volume. Storage commands referencing the logical volume map are converted to storage area commands by command handlers associated with the type of the storage areas in the logical volume. The storage system comprises clients that access the storage areas by using a command stacks associated with the logical volumes.

CACHING METHOD FOR DISTRIBUTED STORAGE SYSTEM, A LOCK SERVER NODE, AND A LOCK CLIENT NODE

The present invention provides a caching method for a distributed storage system, a lock server node, and a lock client node. When the lock server node receives a first lock request sent by the first lock client node for locking a first data stripe, if the lock server node determines that the first lock request is a read lock request received for the first time on the first data stripe or a write lock request on the first data stripe, the lock server node records the owner of the first data stripe is the first lock client node in recorded attribute information of data stripes, and returns to the first lock client node a first response message indicating that the owner of the first data stripe is the first lock client node, and instructing the first lock client node to cache the first data stripe.

BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 3/15 AND QUADRATURE PHASE SHIFT KEYING, AND BIT INTERLEAVING METHOD USING SAME

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.

PARTIAL REVERSE CONCATENATED MODULATION CODES FOR RECORDING

In one embodiment, a data storage system includes a write channel for writing data to a storage medium, the write channel configured to utilize a partial reverse concatenated modulation code. The write channel includes logic adapted for encoding data sets using a C2 encoding scheme, logic adapted for adding a header to each subunit of the data sets, logic adapted for encoding the headers of the data sets with a first modulation encoding scheme, logic adapted for encoding data portions of the data sets with a second modulation encoding scheme, logic adapted for encoding portions of the one or more C2-encoded data sets using a C1 encoding scheme, logic adapted for combining the C1-encoded portions with the modulation-encoded headers of the C2-encoded data sets using a multiplexer, and logic adapted for writing the one or more combined C1- and C2-encoded data sets to data tracks.

DISK DRIVE CONTROLLER WITH A POSTED WRITE CACHE MEMORY

DISK DRIVE CONTROLLER WITH A POSTED WRITE CACHE MEMORY A disk array controller includes a local microprocessor, a bus master interface, a compatible interface, buffer memory and a disk interface. The controller includes a DMA controller between the microprocessor, the bus master interface, the compatibility interface and the buffer memory DMA controllers are also provided between the disk interface and the buffer memory. One of these DMA channels includes an XOR engine used to develop parity information used with the disk array. The various DMA controllers are cycled to allow access to the buffer memory and the disk interface. A posted write memory system is connected as a selectable disk drive to the disk interface. The posted write memory system includes mirrored, parity checked and battery backed semiconductor memory to allow posted write data to be retained during power down conditions with only a very small change of data loss.

HIGH SPEED, SMALL DIAMETER DISK STORAGE SYSTEM

HIGH AVAILABILITY DISK ARRAYS

A method for handling data in a plurality of data storage disks having user data sectors and corresponding parity sectors, the method being used when the disks are being operated in a non-degraded or a degraded mode wherein a non-volatile RAM is used in an array control processor which controls the operation of such disks. When new data is to be written into the array, the non-volatile RAM stores information identifying the array, the starting sector into which data is to be written and the number of sectors to be used for writing the new data so that parity and data entries in corresponding sectors can be matched when a power failure occurs. Further, when opening a new array, the data and parity entries in corresponding sectors can be matched and verified, the operation for such matching being performed in between other operations that are being performed by the control processors (i.e., in the "background" thereof).

HIGH PERFORMANCE DATA PATH WITH XOR ON THE FLY

A high performance data path for performing XOR on the fly. A first memory is connected to a first bus and a second memory is connected to a second bus selectively coupled to the first bus. Logic for performing an XOR can be switched into connection with the first and second bus for XORing data in a buffer with the data passed from one of the memories to the other memory. The result is replaced into the buffer to permit successive XORing. When reading from an interrelated group of disks such as a RAID 3 group, the data path permits an N-1 and go mode in which a read does not wait for data from the last disk to retrieve its data sector. If the last disk contains data (as opposed to parity) the data is obtained from the XORed data in the XOR buffer of the high performance data path. For writing data, the XOR on the fly generates the parity sector for writing at the completion of a write to an interrelated group of disks.

Method of generating check words from a bit sequence

For checking data transmission systems or memory devices, a check word (P) is added to the bit sequences (D) to be stored or transmitted. The check word (P) is formed by modulo-2 addition of specified bit positions of the associated bit sequence (D). For this purpose, the bit sequence (D) is divided into at least two bit blocks (D1, D2). These are each passed to a memory (SP1, SP2), to address partial check words (TP1, TP2) which are stored in it. These partial check words (TP1, TP2) are read out and then combined into a complete check word (P) by position-by-position modulo-2 addition. The check code can be simply changed by changing the contents of the memories (SP1, SP2). ...

DISTRIBUTED PROTECTED STORAGE OF DATA AND TRANSMISSION STREAM MULTIMEDIA CONTENT

Data storage method, recovery method, related device and system

MANAGING REDUNDANCY INFORMATION IN A NON-VOLATILE MEMORY

Data access methods and storage subsystems thereof

Method to establish redundancy and fault tolerance better than raid level 6 without using parity

Electronic control device

Storage system and control method thereof

PROCEDE ET DISPOSITIF DE DISCRIMINATION D'ERREURS DANS DES RESEAUX DE M PROCEDE ET DISPOSITIF DE DISCRIMINATION D'ERREURS DANS DES RESEAUX DE MEMOIRE ORGANISES EN MOTS

Procédé pour faire la discrimination entre les erreurs systématiques et les erreurs induites par du bruit dans des mots extraits d'une mémoire. Dans une mémoire 14 à bulles magnétiques du type à boucles principale/secondaires organisée par mots, la distinction entre l'origine des erreurs se fait en associant un syndrome de vérification d'erreurs non nul et l'indication des emplacements de mémoire défectueux emmagasinés dans une table de concordance. Application aux mémoires à bulles magnétiques.

SEMICONDUCTOR MEMORY HAS FUNCTION OF CORRECTION OF ERRONEOUS BITS

Microprocesseur pourvu d'une mémoire ayant une fonction de correction d'erreurs

L'invention concerne un microprocesseur pourvu d'une mémoire et ayant une fonction de correction d'erreurs. Ce microprocesseur comprend un circuit de test de chiffre binaire déficient pour effectuer un test de chiffre binaire déficient en successivement engendrant un motif prédéterminé de quatre types de motifs de données de test comprenant toutes les configurations de chiffres binaires qui peuvent se produire habituellement dans une mémoire, dans le but d'écrire les motifs de données de test ainsi engendrés dans la mémoire, l'unité centrale de celle-ci ne fonctionnant seulement pour déterminer des conditions. L'invention est utilisable pour des mémoires ayant une fonction de test de chiffre binaire déficient.

MASS MEMORY AT THE SOLID STATE HAS AUTOCORRECTION, ORGANISEE IN WORDS, FOR CONTROL SYSTEM OF PROGRAMS RECORD

SYSTEM AND PROCESS OF PERENNIAL SAFEGUARD DISTRIBUEE

La présente invention se rapporte au domaine des réseaux informatiques et de la sauvegarde des données numériques sur de tels réseaux. La présente invention se rapporte à un procédé de sauvegarde distribuée d'un bloc B de données numériques sur un réseau informatique comprenant une table de hashage distribuée DHT et au moins trois noeuds NO, les noeuds NO étant connectés audit réseau, ledit procédé comprenant une étape de division dudit bloc B en r fragments F de données numériques, ledit procédé comprenant, en outre, les étapes suivantes : - une étape de stockage d'un fragment F dans les ressources mémoires d'un noeud NOF ; - une étape d'enregistrement dans les parties de la DHT contenues sur au moins deux noeuds, des couples (bloc B, noeud NOF) et (noeud NOF, fragment F) ; et, lors dudit procédé, aucune opération sur la DHT ou opération de stockage n'est réalisée sur un serveur centralisé.

MICROPROCESSOR EQUIPPED With a MEMORY HAVING a FUNCTION OF CORRECTION Of ERRORS

SYSTEM FOR EXPANDED DETECTION AND CORRECTION OF ERRORS IN PARALLEL BINARY DATA PRODUCED BY DATA TRACKS

DETECTION CIRCUIT Of ERROR ABLE LESS RECENTLY TO DETECT ERRORS OF TRANSFER BY GUSTS IN a MEMORY UTILISEE

에러 교정을 기초로 디폴트 판독 신호를 설정하기 위한 방법 및 장치

... 본 발명은 에러 교정을 기초로 디폴트 판독 신호를 설정하는 것과 관련된 장치 및 방법을 포함한다. 복수의 방법은 제 1 이산 판독 신호에 의해 메모리 셀의 그룹으로부터 데이터의 페이지를 판독하는 단계 및 상기 제 1 이산 판독 신호에 의해 판독된 데이터의 페이지의 적어도 하나의 코드워드를 에러 교정하는 단계를 포함한다. 방법은 상기 제 1 이산 판독 신호와 상이한 제 2 이산 판독 신호에 의해 메모리 셀의 그룹으로부터 데이터의 페이지를 판독하는 단계 및 상기 제 2 이산 판독 신호에 의해 판독된 데이터의 페이지의 적어도 하나의 코드워드를 에러 교정하는 단계를 포함할 수 있다. 제 1 이산 판독 신호 및 제 2 이산 판독 신호 중 하나가 각각의 에러 교정을 적어도 부분적으로 기초로 하여 디폴트 판독 신호로서 설정될 수 있다.

SYSTEM AND METHOD FOR ENHANCED ERROR DETECTION IN MEMORY PERIPHERALS

RAID Controller and Parity Operator Method having Disk Cash Memory Controller and Parity Operator Device

Apparatus for reallocating logical to physical disk devices using a storage controller and method of the same

A storage controller calculates an access frequency of each logical disk; that is selects a first logical disk device of which the access frequency exceeds a first predetermined value, the first logical disk device being allocated to a first physical disk device; selects a second logical disk device which has the access frequency equal to or less than a second predetermined value, the second logical disk device being allocated to a second physical disk device; and reallocates the first and second logical device; and reallocates the first and second logical devices to the second and the first physical disk device, respectively.

Rule based aggregation of files and transactions in a switched file system

A switched file system, also termed a file switch, is logically positioned between client computers and file servers in a computer network. The file switch distributes user files among multiple file servers using aggregated file, transaction and directory mechanisms. The file switch distributes and aggregates the client data files in accordance with a predetermined set of aggregation rules. Each rule can be modified independently of the other rules. Different aggregation rules can be used for different types of files, thereby adapting the characteristics of the switched file system to the intended use and to the expected or historical access patterns for different data files.

Memory systems and memory modules

One embodiment of the present invention sets forth a memory module that includes at least one memory chip, and an intelligent chip coupled to the at least one memory chip and a memory controller, where the intelligent chip is configured to implement at least a part of a RAS feature. The disclosed architecture allows one or more RAS features to be implemented locally to the memory module using one or more intelligent register chips, one or more intelligent buffer chips, or some combination thereof. Such an approach not only increases the effectiveness of certain RAS features that were available in prior art systems, but also enables the implementation of certain RAS features that were not available in prior art systems.

Redundant array of independent clouds

A computing device executing a reliable cloud storage module divides data into a first data block and a second data block. The computing device stores the first data block in a first storage cloud provided by a first storage service, and stores the second data block in a second storage cloud provided by a second storage service. The computing device thereafter receives a command to read the data. In response, the computing device retrieves the first data block from the first storage cloud and the second data block from the second storage cloud. The computing device then reproduces the original data from the first data block and the second data block.

Object File System

An object based file system for storing and accessing objects is disclosed. The file system may be implemented as a method in hardware, firmware, software, or a combination thereof. The method may include receiving from an application program an object write request. A selected storage node on which to store the object may be selected, including identifying a least busy storage node and/or a least full storage node. The object and the object write request may be sent to the selected storage node. A write success message may be received from the selected storage node. The successful writing of the object may be reported to the application program. An object identifier and object data may be stored in a database.

Method and system for placement of data on a storage device

Embodiments of systems and methods for a storage system are disclosed. More particularly, in certain embodiments locations of storage devices may be allocated to store data when commands pertaining to that data are received. Specifically, in one embodiment a distributed RAID system comprising a set of data banks may be provided where the different performance characteristics associated with different areas of disks in the data bank may be taken into account when allocating physical segments to corresponding logical segments of a volume by allocating certain physical segments to a particular logical segment based upon a location of the physical segment or criteria associated with the logical segment.

Intra-device data protection in a raid array

A system and method for intra-device data protection in a RAID array. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to identify a unit of data stored in the data storage subsystem, wherein said unit of data is stored across at least a first storage device and a second storage device of the plurality of storage devices, each of the first storage device and the second storage device storing intra-device redundancy data corresponding to the unit of data; and change an amount of intra-device redundancy data corresponding to the unit of data on only the first storage device.

Reconstruct reads in a raid array with dynamic geometries

A system and method for dynamic RAID geometries. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to configure a first subset of the storage devices for use in a first RAID layout, the first RAID layout including a first set of redundant data. The controller further configures a second subset of the storage devices for use in a second RAID layout, the second RAID layout including a second set of redundant data. Additionally, the controller configure an additional device not included in either the first subset or the second subset to store redundant data for both the first RAID layout and the second RAID layout. The controller is further configured to initiate a reconstruct read corresponding to a given read request directed to a particular storage device of the plurality of storage devices, in response to determining the particular storage device is exhibiting a non-error related relatively slow read response.

Data archiving using data compression of a flash copy

Embodiments of the disclosure relate to archiving data in a storage system. An exemplary embodiment comprises making a flash copy of data in a source volume, compressing data in the flash copy wherein each track of data is compressed into a set of data pages, and storing the compressed data pages in a target volume. Data extents for the target volume may be allocated from a pool of compressed data extents. After each stride worth of data is compressed and stored in the target volume, data may be destaged to avoid destage penalties. Data from the target volume may be decompressed from a flash copy of the target volume in a reverse process to restore each data track, when the archived data is needed. Data may be compressed and uncompressed using a Lempel-Ziv-Welch process.

Method and system for protecting against multiple failures in a raid system

Embodiments of methods of protecting RAID systems from multiple failures and such protected RAID systems are disclosed. More particularly, in certain embodiments of a distributed RAID system each data bank has a set of associated storage media and executes a similar distributed RAID application. The distributed RAID applications on each of the data banks coordinate among themselves to distribute and control data flow associated with implementing a level of RAID in conjunction with data stored on the associated storage media of the data banks. Furthermore, one or more levels of RAID may be implemented within one or more of the data banks comprising the distributed RAID system.

Method and System for Initializing Storage in a Storage System

Embodiments of systems and methods for a high availability storage system are disclosed. More particularly, in certain embodiments desired locations of storage devices may be zeroed out during operation of the storage system and areas that have been zeroed out allocated to store data when commands pertaining to that data are received. Specifically, in one embodiment a distributed RAID system comprising a set of data banks may be provided where each data bank in the set of data banks may execute a background process which zeroes areas of the storage devices of the data bank. When a command pertaining to a logical location is received a zeroed area of the physical storage devices on the data bank may be allocated to store data associated with that logical location.

System and method for handling io to drives in a raid system

A system and method for handling IO to drives in a RAID system is described. In one embodiment, the method includes providing a multiple disk system with a predefined strip size. IO request with a logical block address is received for execution on the multiple disk system. A plurality of sub-IO requests with a sub-strip size is generated, where the sub-strip size is smaller than the strip size. The generated sub-IO commands are executed on the multiple disk system. In one embodiment, a cache line size substantially equal to the sub-strip size is assigned to process the IO request.

Dram address protection

In one embodiment, a system includes a memory, and a memory controller coupled to the memory via an address bus, a data bus, and an error code bus. The memory stores data at an address and stores an error code at the address. The error code is generated based on a function of the corresponding data and address.

Configurable pipeline based on error detection mode in a data processing system

A method includes providing a data processor having an instruction pipeline, where the instruction pipeline has a plurality of instruction pipeline stages, and where the plurality of instruction pipeline stages includes a first instruction pipeline stage and a second instruction pipeline stage. The method further includes providing a data processor instruction that causes the data processor to perform a first set of computational operations during execution of the data processor instruction, performing the first set of computational operations in the first instruction pipeline stage if the data processor instruction is being executed and a first mode has been selected, and performing the first set of computational operations in the second instruction pipeline stage if the data processor instruction is being executed and a second mode has been selected.

Storage device and storage-device control method

A generation-code storage unit stores therein a generation code in association with identification information for identifying the block datum. A generation-code managing unit assigns a new generation code to a detected consecutive data set and any block datum included in writing data other than the consecutive data set and stores the assigned generation code in the generation-code storage unit. A data writing unit adds the new generation code to the block datum or consecutive data set included in the writing data and writes it to a storage unit. A determining unit determines whether the generation code added to a read block datum or consecutive data set is accordant with the generation code of the read block datum or consecutive data set stored in the generation-code storage unit. A data transmitting unit transmits, when the generation codes are accordant, the read block datum or consecutive data set.

System and Method for Fault Tolerant Computing Using Generic Hardware

A dual redundant process controller is provided. The controller comprises a process control application that executes on a first and a second module. When executed by the first module, a first application instance writes a first synchronization information to the second module, reads a second synchronization information from the first module, and, when the second disagrees with the first synchronization information after passage of a time-out interval, performs a resynchronization function; and wherein, when executed by the second module, the second application instance writes the second synchronization information to the first module, reads the first synchronization information from the second module, and, when the first disagrees with the second synchronization information after passage of the time-out interval, performs the resynchronization function. The first application instance calls the synchronization function provided by the multitasking real-time operating system before invoking a set events function provided by a multitasking real-time operating system.

Appending data to existing data stored in a dispersed storage network

A method begins by a processing module receiving a request to store data in dispersed storage network (DSN) memory and determining whether the data is to be appended to existing data. When the data is to be appended, the method continues with the processing module encoding, using an append dispersed storage error coding function, the data to produce a set of encoded append data slices, generating a set of append commands, wherein an append command of the set of append commands includes an encoded append data slice of the set of encoded append data slices and identity of one of a set of dispersed storage (DS) units, and outputting at least a write threshold number of the set of append commands to at least a write threshold number of the set of DS units.

Method and apparatus for dispersed storage memory device selection

A method begins when a dispersed storage (DS) processing unit of a DS unit has at least one of DS unit operational data and DS unit operating system algorithm to store. The method continues with the DS processing unit encoding at least a portion of the at least one of DS unit operational data and DS unit operating system algorithm in accordance with an error coding dispersal storage function to produce a plurality of data slices. The method continues with the DS processing unit storing at least some of the plurality of data slices in memory devices of the DS unit in accordance with the error coding dispersal storage function.

Disk array apparatus and control method thereof

Proposed are a disk array apparatus and a control method thereof which facilitate data processing such as write processing and read processing even if the block sizes handled by a host computer are different. If a first write command is received from the host computer, the controller of the disk array apparatus divides first write data into a plurality of second write data, and adds a first guarantee code and writes this data to the plurality of first storage devices; if a first read command is received from the host computer, the controller reads a plurality of first read data from the plurality of first storage devices, generates second read data which is obtained by combining [the plurality of first read data], and adds a second guarantee code [to the second read data] and transmits this data to the host computer; if a second write command is received from the host computer, the controller generates fourth write data based on third write data, adds a third guarantee code [to the fourth write data] and writes this data to the plurality of second storage devices and, if the second read command is received from the host computer, the controller reads third read data from the plurality of second storage devices, divides this data into fourth read data, and adds a fourth guarantee code and transmits the data to the host computer

Data management in solid state storage systems

Methods and apparatus are provided for controlling data management operations including storage of data in solid state storage of a solid state storage system. Input data is stored in successive groups of data write locations in the solid state storage. Each group comprises a set of write locations in each of a plurality of logical subdivisions of the solid state storage. The input data to be stored in each group is encoded in accordance with first and second linear error correction codes. The encoding is performed by constructing from the input data to be stored in each group a logical array of rows and columns of data symbols. The rows and columns are respectively encoded in accordance with the first and second linear error correction codes to produce an encoded array in which all rows correspond to respective first codewords and columns correspond to respective second codewords.

Distributed storage network including memory diversity

A dispersed storage (DS) unit a processing module and a plurality of hard drives. The processing module is operable to maintain states for at least some of the plurality of hard drives. The processing module is further operable to receive a memory access request regarding an encoded data slice and identify a hard drive of the plurality of hard drives based on the memory access request. The processing module is further operable to determine a state of the hard drive. When the hard drive is in a read state and the memory access request is a write request, the processing module is operable to queue the write request, change from the read state to a write state in accordance with a state transition process, and, when in the write state, perform the write request to store the encoded data slice in the hard drive.

Storage system that executes performance optimization that maintains redundancy

One storage area is selected from two or more storage areas of a high load physical storage device, a physical storage device with a lower load than that of the physical storage device is selected, and it is judged whether the redundancy according to the RAID level corresponding to the logical volume decreases when the data elements stored in the selected storage area are transferred to the selected low load physical storage device. If the result of this judgment is that the redundancy does not decrease, the data elements stored in the selected storage area are transferred to a buffer area of the selected low load physical storage device and the logical address space of the logical volume that corresponds to the selected storage area is associated with the buffer area.

Method and system for data migration in a distributed raid implementation

Embodiments of the systems and methods disclosed provide a distributed RAID system comprising a set of data banks. More particularly, in certain embodiments of a distributed RAID system each data bank has a set of associated storage media and executes a similar distributed RAID application. The distributed RAID applications on each of the data banks coordinate among themselves to distribute and control data flow associated with implementing a level of RAID in conjunction with a volume stored on the associated storage media of the data banks. Migration of this volume, or a portion thereof, from one configuration to another configuration may be accomplished such that the volume, or the portion thereof, and corresponding redundancy data may be stored according to this second configuration.

Systems and methods for storing parity groups

A system and method for dynamic redistribution of parity groups is described. The system and method for dynamic redistribution of parity groups operates on a computer storage system that includes a plurality of disk drives for storing parity groups. Each parity group includes storage blocks. The storage blocks include one or more data blocks and a parity block that is associated with the data blocks. Each of the storage blocks is stored on a separate disk drive such that no two storage blocks from a given parity set reside on the same disk drive. The computer system further includes a redistribution module to dynamically redistribute parity groups by combining some parity groups to improve storage efficiency.

Populating strides of tracks to demote from a first cache to a second cache

Provided are a computer program product, system, and method for populating strides of tracks to demote from a first cache to a second cache. A first cache maintains modified and unmodified tracks from a storage system subject to Input/Output (I/O) requests. A determination is made to demote tracks from the first cache. A determination is made as to whether there are enough tracks ready to demote to form a stride, wherein tracks are written to a second cache in strides defined for a Redundant Array of Independent Disk (RAID) configuration. A stride is populated with tracks ready to demote in response to determining that there are enough tracks ready to demote to form the stride. The stride of tracks, to demote from the first cache, are promoted to the second cache. The tracks in the second cache that are modified are destaged to the storage system.

Configuring a generic computing device utilizing specific computing device operation information

A method begins with the specific computing device token sending a distributed storage network (DSN) access request to DSN memory via the generic computing device. The DSN access request identifies specific computing device operation information that is stored as one or more of-sets of encoded data slices in the DSN memory. The method continues with the specific computing device token receiving the one or more of sets of encoded data slices from the DSN memory via the generic computing device and decoding the one or more of sets of encoded data slices to retrieve the specific computing device operation information. The method continues with enabling the generic computing device to function as a specific computing device in accordance with the specific computing device operation information.

Efficient and scalable cyclic redundancy check circuit using galois-field arithmetic

Embodiments of the present disclosure describe methods, apparatus, and system configurations for cyclic redundancy check circuits using Galois-field arithmetic.

Identifying a slice error in a dispersed storage network

A method begins by a dispersed storage (DS) processing module identifying a set of collections of records corresponding to a data segment that is stored in a dispersed storage network (DSN) as a set of encoded data slices, wherein a collection of records includes an event record including information regarding an event, a first record including information regarding a dispersed storage (DS) processing module processing an event request to produce a plurality of sub-event requests, and a plurality of records including information regarding a set of DS units processing the plurality of sub-event requests. The method continues with the DS processing module determining whether an error exists for one of the set of encoded data slices based on at least some of the set of collections of records and when the error exists, flagging the one of the set of encoded data slices for potential rebuilding.

Video server, video recording method and method for controlling rebuilding process

According to one embodiment, a video server including a recording device configured to encode a received video signal based on a predetermined encoding method into video data; a write controller configured to divide the video data in order to generate a plurality of divided data, generate a redundant data for restoring either of the divided data of the number of setup when the divided data of the number of setup in advance, perform write-in controlling of the plurality of divided data and the plurality of redundant data; a plurality of storage devices configured to record the number of setup of divided data and the redundant data based on the divided data of the number of setup by distributing herein according to the write-in controlling; and a main controller configured to record management information on the video data recorded on each storage device.

Disk array device and disk array device control method

A disk array device includes hard disks from which RAID groups are configured. Therein, a volume setting unit sets one or more used areas. A data check control unit determines, on the basis of the state into which the used areas have been set, which areas in the RAID groups are subject to a diagnosis. A data check execution unit that executes a cyclical diagnosis on the areas determined, by the data check control unit, to be those subject to a diagnosis.

DISTRIBUTED STORAGE AND COMMUNICATION

Apparatus and method of storing, retrieving, transmitting and receiving data comprising a) separating the data into a plurality of data elements, b) matching the position of each data element according to its position in the data with a storage location, c) storing each data element at its matched storage location, d) generating parity data from groups of data elements such that any one or more of the data elements within a group may be recreated from the remaining data elements within the group and the parity data for that group, e) generating further parity data from further groups of data elements formed from the same data elements used in step d) in different combinations and f) storing the parity data and further parity data in separate storage locations. 1. A method of storing data comprising the steps of:a) separating the data into a plurality of data elements;b) matching the position of each data element according to its position in the data with a storage location;c) storing each data element at its matched storage location;d) generating parity data from groups of data elements such that any one or more of the data elements within a group may be recreated from the remaining data elements within the group and the parity data for that group;e) generating further parity data from further groups of data elements formed from the same data elements used in step d) in different combinations; andf) storing the parity data and further parity data in separate storage locations.2. The method according to further comprising the steps of:e) allocating each element of the parity data to a separate storage location; andf) storing each parity data element in a separate storage location.3. The method according to further comprising the steps of:e) allocating each element of the further parity data to a separate storage location; andf) storing each further parity data element in a separate storage location.4. The method according to claim 1 , wherein the matching is based on ...

Updating data stored in a dispersed storage network

A method begins by a dispersed storage (DS) processing module receiving a modified data object, wherein the modified data object is a modified version of a data object and the data object is divided into a plurality of data segments and stored in the DSN. The method continues with the DS processing module mapping portions of the modified data object to the plurality of data segments that includes creating a middle data segment of a second plurality of data segments based on a corresponding middle data segment of the plurality of data segments when the a portion of the portions corresponds to middle data of the modified data object. The method continues with the DS processing module encoding the middle data segment using a dispersed storage error coding function to produce an encoded data segment and overwriting the corresponding middle data segment with the encoded data segment in the DSN.

Data protection system

The present invention provides systems and methods for logically organizing data for storage and recovery on a data storage medium using a multi-level format. The present invention also provides systems and methods for protecting data stored on data storage medium so that the data may be recovered without errors.

Acquiring a Trusted Set of Encoded Data Slices

A method begins by a dispersed storage (DS) processing module receiving a decode threshold number of encoded data slices of a set of encoded data slices. The method continues with the DS processing module determining whether to evoke a trust verification function and when the trust verification function is to be evoked, selecting one or more encoded data slices of the set of encoded data slices for trust verification to produce one or more selected encoded data slices. The method continues with the DS processing module sending, to a trusted source, a request to receive the one or more selected encoded data slices and when the one or more selected encoded data slices are received from the trusted source, determining that a trusted set of encoded data slices is available based on the decode threshold number of encoded data slices and the received one or more selected encoded data slices.

Redundant File System

Some embodiments of the invention shift the responsibility for creating parity and error correction blocks from the hardware or software RAID units or modules to the computer system's file system, allowing the file system's existing mechanisms of write atomicity to be used to help ensure consistency of the on-disk information throughout all or increasing portions of the information saving and/or updating cycle. 1. An article comprising a non-transitory medium storing instructions that enable a processor based-system to perform operations comprising:writing first data to a first data block and second data to a second data block;writing first parity information that corresponds to the first and second data;updating the first data with updated first data; andwriting second parity information, to third and fourth parity blocks, that corresponds to the first updated data and the second data;wherein the first and second data blocks are included in separate disks and the third and fourth parity blocks are included in separate disks;wherein the first parity data is resident in fifth and sixth parity blocks at the same time the second parity data is resident in the third and fourth parity blocks.2. The article of claim 1 , the operations comprising claim 1 , after writing the second parity information claim 1 , overwriting the first parity information claim 1 , wherein the first parity information and the second parity information are included in different physical stripes.3. The article of claim 1 , the operations comprising writing the second parity information to the third parity block claim 1 , wherein the third parity block and the first data block are included in different physical stripes.4. The article of claim 1 , the operations comprising atomically updating file system allocation information to reflect writing the second parity information to the third and fourth parity blocks based on the first parity data being resident in the fifth and sixth parity blocks at ...

ERROR CHECKING ADDRESSABLE BLOCKS IN STORAGE

Provided are a method, system, and article of manufacture for error checking addressable blocks in storage. Addressable blocks of data are stored in a storage in stripes, wherein each stripe includes a plurality of data blocks for one of the addressable blocks and at least one checksum block including checksum data for the addressable block. A write request is received to modify data in one of the addressable blocks. The write and updating the checksum are performed in the stripe having the modified addressable block. An indication is made to perform an error checking operation on the stripe for the modified addressable block in response to the write request, wherein the error checking operation reads the data blocks and the checksum in the stripe to determine if the checksum data is accurate. An error handling operation is initiated in response to determining that the checksum data is not accurate. 1. An article of manufacture comprising a non-transitory computer readable storage medium having code executed to cause operations with respect to a storage device and a memory and to cause operations comprising:storing addressable blocks of data in the storage device in stripes, wherein each stripe includes a plurality of data blocks for one of the addressable blocks and at least one checksum block including checksum data derived from the data blocks for the addressable block;receiving a write request to modify data in one of the addressable blocks in the storage device;performing the write and updating the checksum in the stripe having the modified addressable block, wherein the modified data and the updated checksum resulting from the write are destaged to the storage device;indicating in a recently modified list in the memory addressable blocks recently modified in response to write requests;after the write is performed, performing an error checking operation on the stripes of the addressable blocks indicated in the recently modified list by reading the data blocks ...

Parallel Reed-Solomon RAID (RS-RAID) Architecture, Device, and Method

The parallel RS-RAID data storage architecture can aggregate that data and checksums within each cluster into intermediate or partial sums that are transferred or distributed to other clusters. The use of intermediate data symbols, intermediate checksum symbols, cluster configuration information on the assignment of data storage devices to clusters and the operational status of data storage devices, and the like, can reduce the computational burden and latency for the error correction calculations while increasing the scalability and throughput of the parallel RS-RAID distributed data storage architecture.

Computing Core Application Access Utilizing Dispersed Storage

A computing core includes a processing module, main memory, and a memory controller. The memory controller receives a request to fetch an instruction from the processing module and determines whether the instruction is currently stored in the main memory. When the instruction is not currently stored in the main memory, the memory controller determines whether the instruction is stored in a distributed storage network (DSN) memory as one or more sets of encoded instruction slices; and, when it is, the memory controller addresses the DSN memory to retrieve the one or more sets of encoded instruction slices. When at least a threshold number of encoded instruction slices are retrieved for each of the one or more sets of encoded instruction slices, the one or more sets of encoded instruction slices are decoded using a dispersed storage error coding function to reconstruct the instruction, which is provided to the processing module.

Securing Data in a Dispersed Storage Network Using Shared Secret Slices

A method begins by dividing a data segment into data segment portions. The method continues by encoding the data segment portions to produce a plurality of sets of encoded data segment portions. A data segment portion is encoded by, first, selecting an encoding equation and an encoding constant(s). The encoding continues by setting a first variable to the data segment portion. The encoding continues by setting a second variable to one of a set of pillar numbers. The encoding continues by executing the encoding equation using the encoding constant, the first variable, and the second variable to produce one of the plurality of sets of encoded data segment portions. The method continues by arranging the plurality of sets of encoded data segment portions into a plurality of encoded data slices. The method continues by sending the plurality of encoded data slices to distributed storage units of a distributed storage network.

Remote copy system and remote copy control method

A first storage system comprises a first RAID group comprising multiple first storage devices, which constitute the basis of a first logical volume. A second storage system comprises a second RAID group comprising multiple second storage devices, which constitute the basis of a second logical volume. The RAID configuration of the first RAID group and the RAID configuration of the second RAID group are the same, and the type of a compression/decompression function of the respective first storage devices and the type of a compression/decompression function of the respective second storage devices are the same. Compressed data is read from a first storage device without being decompressed with respect to the data inside a first logical volume, and the read compressed data is written to a second storage device, which is in the same location in RAID in the second RAID group as the location in RAID of this first storage device.

USING PARITY DATA FOR CONCURRENT DATA AUTHENTICATION, CORRECTION, COMPRESSION, AND ENCRYPTION

A system for software error-correcting code (ECC) protection or compression of original data using ECC data in a first memory is provided. The system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The software ECC protection or compression includes: a data matrix for holding the original data in the first memory; a check matrix for holding the ECC data in the first memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the ECC data; and a thread for executing on the processing core. The thread includes a Galois Field multiplier for multiplying entries of the data matrix by an entry of the encoding matrix, and a sequencer for ordering operations using the Galois Field multiplier to generate the ECC data. 1. A system for software error-correcting code (ECC) protection or compression of original data using ECC data in a first memory , comprising:a processing core for executing computer instructions and accessing data from a main memory; anda non-volatile storage medium for storing the computer instructions, a data matrix for holding the original data in the first memory;', 'a check matrix for holding the ECC data in the first memory;', 'an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the ECC data; and', a Galois Field multiplier for multiplying entries of the data matrix by an entry of the encoding matrix; and', 'a sequencer for ordering operations through the data matrix and the encoding matrix using the Galois Field multiplier to generate the ECC data., 'a thread for executing on the processing core and comprising], 'wherein the processing core, the storage medium, and the computer instructions are configured to implement the software ECC protection or compression of the original data ...

Storage apparatus

A storage apparatus 10 that writes data to a storage drive 20 or reads data from a storage drive 20 in response to an I/O request sent from a server apparatus 2, and includes a plurality of AC-DC power supplies to supply the storage drive 20 with drive power is provided with a plurality of power supply paths provided for the respective AC-DC power supplies 22 configured to supply the storage drive 20 with drive power from the AC-DC power supplies 22, respectively and a plurality of gate units provided to the respective power supply paths and configured to stop supplying drive power to the storage drive 20 through the corresponding power supply path when detecting voltage abnormality in the drive power supplied from the AC-DC power supply 22 to the storage drive 20. For example, the power supply paths are provided to allow each of the storage drives 20 belonging to a same RAID group 51 to receive the supply of the drive power from the AC-DC power supplies 22 through different power supply paths, respectively.

Symbol Flipping Data Processor

Various embodiments of the present invention provide systems and methods for a symbol flipping data processor. For example, a symbol flipping data processor is disclosed that includes a data decoder in the symbol flipping data processor operable to perform error checking calculations, and a data detector in the symbol flipping data processor operable to perform symbol flipping in the data detector based at least in part on the error checking calculations, wherein the output of the data processor is generated at least in part based on the symbol flipping in the data detector.

Apparatus and method for converting replication-based file into parity-based file in asymmetric clustering file system

Disclosed herein are an apparatus and method for converting a replication-based file into a parity-based file in an asymmetric clustering file system. The apparatus includes a reception unit, a control unit, a parity computation unit, and a chunk conversion unit. The reception unit receives a parity-based conversion request, information about the size of a stripe, and a list of new chunks from a metadata server. The control unit divides a replication chunk, selected from among a plurality of replication chunks corresponding to an original chunk of the replication-based file, into a plurality of data segments. The parity computation unit generates at least one parity segment by performing a parity operation on the plurality of data segments. The chunk conversion unit selects one of different data segments from the original chunk or one of the plurality of replication chunks, the different data segments having locations different from one another.

Controlling nonvolatile memory device and nonvolatile memory system

A method for controlling a nonvolatile memory device includes reading a sub stripe including a plurality of sub pages stored in a first region, writing data stored in valid sub pages of the sub stripe to a second region different from the first region, and generating parity data using the data written to the second region and constituting a new sub stripe.

TRIPLE PARITY ENCODING TO FACILITATE DATA RECOVERY

Examples are disclosed for facilitating recovery from failures associated with a storage array having a plurality of storage devices. 1. A method for facilitating recovery from failures associated with a storage array having a plurality of storage devices that includes a plurality of data storage devices , a first row parity storage device , a second row parity storage device , a first diagonal parity storage device and a second diagonal parity storage device , the method comprising:determining first row parities for the plurality of data storage devices, the first row parities spanning the plurality of data storage devices and being stored on the first row parity storage device;determining first diagonal parities along first diagonal parity sets, the first diagonal parities spanning all except for one of the plurality of data storage devices and the first row parity storage device, the determined first diagonal parities being stored on the first diagonal parity storage device;determining second diagonal parities along second diagonal parity sets, the second diagonal parities spanning all except for one of the plurality of data storage devices and the first row parity storage device, the determined second diagonal parities being stored on the second diagonal parity storage device; anddetermining second row parities for the plurality of data storage devices, the second row parities spanning the plurality of data storage devices and being stored on the second row parity storage device, wherein at least a portion of one or more rows of the second row parities includes determined second row parities based on a portion of the plurality of data storage devices.2. The method of claim 1 , wherein the plurality of storage devices comprises n data storage devices claim 1 , where n=p−1 and p is a prime number greater than 3.3. The method of claim 2 , further comprising:dividing each of the plurality of storage devices into chunks; and{'sup': '2', 'organizing each of the ...

Apparatuses and methods for combining error coding and modulation schemes

Methods and apparatuses for combining error coding and modulation schemes are described herein. One or more methods include encoding data using linear error correcting code, modulating the encoded data, writing the modulated data to memory, and decoding the written data using a Viterbi algorithm and a linear error correcting code decoder.

DATA DISTRIBUTION UTILIZING UNIQUE READ PARAMETERS IN A DISPERSED STORAGE SYSTEM

A centralized DVR includes a dispersed storage error encoding module, storage nodes, and a distribution module. The dispersed storage error encoding module encodes a broadcast of data in accordance with an error coding dispersal storage function to produce a plurality of sets of encoded data slices, which is stored in the storage nodes. For a first playback request, the distribution module determines a first unique combination and retrieves, as a first unique copy of the broadcast data from the storage nodes, encoded data slices of the plurality of sets of encoded data slices in accordance with the first unique combination. For a second playback request, the distribution module determines a second unique combination and retrieves, as a second unique copy of the broadcast data from the storage nodes, encoded data slices of the plurality of sets of encoded data slices in accordance with the second unique combination. 1. A method for execution by a dispersed storage processing module , the method comprises:storing a broadcast of data in accordance with an error coding dispersal storage function, wherein the broadcast of data is stored as a plurality of sets of encoded data slices;receiving a plurality of playback requests for the broadcast of data; determining a first unique combination for retrieving the plurality of sets of encoded data slices;', 'retrieving, as a first unique copy of the broadcast data, encoded data slices of the plurality of sets of encoded data slices in accordance with the first unique combination; and, 'for a first playback request of the plurality of playback requests determining a second unique combination for retrieving the plurality of sets of encoded data slices; and', 'retrieving, as a second unique copy of the broadcast data, encoded data slices of the plurality of sets of encoded data slices in accordance with the second unique combination., 'for a second playback request of the plurality of playback requests2. The method of further ...

INFORMATION PROCESSING APPARATUS, PROGRAM, AND DATA ALLOCATION METHOD

In an information processing apparatus, a first selecting unit selects, as a source stripe, a stripe in which at least one of blocks stores a data item and another one of the blocks stores an error-correcting code for the data item, among a plurality of stripes each including a group of storage areas of a plurality of blocks that are located one on each of a plurality of storage devices. A second selecting unit selects, as a destination stripe, a stripe in which at least one of blocks stores a data item and in which the number of available blocks is equal to or greater than the number of blocks of the source stripe which store data items, among the stripes other than the source stripe. A moving unit moves the data item stored in the source stripe to the available block of the destination stripe. 1. An information , processing apparatus comprising:a processor configured to perform a procedure including:first selecting, as a source stripe, a stripe in which at least one of blocks stores a data item and another one of the blocks stores an error-correcting code for the data item, among a plurality of stripes each including a group of storage areas of a plurality of blocks that are located one on each of a plurality of storage devices,second selecting, as a destination stripe, a stripe in which at least one of blocks stores a data item and in which the number of available blocks is equal to or greater than the number of blocks of the source stripe which store data items, among the stripes other than the source stripe, andmoving the data item stored in the source stripe to the available block of the destination stripe.2. The information processing apparatus according to claim 1 , wherein the first selecting selects claim 1 , as the source stripe claim 1 , a stripe in which the number of blocks storing data items is less than half of the number of blocks that are configured to store data items.3. The information processing apparatus according to claim 1 , wherein the first ...

Storage control apparatus, storage system, and storage control method

A storage control apparatus writes n pieces of data (here, n is an integer greater than 1) in a first memory apparatus, and reads the n pieces of written data from the first memory apparatus. A parity calculation unit calculates parity based on divided data extracted from each of the n pieces of data for each certain size, and stores the calculated parity in a second memory apparatus. A read control unit restores, in reading the n pieces of data from the first memory apparatus, at least one of the n pieces of data instead of reading it from the first memory apparatus but using other data having been read from the first memory apparatus among the n pieces of data and the parity stored in the second memory apparatus.

Systems and methods for securing data in motion

The systems and methods of the present invention provide a solution that makes data provably secure and accessible—addressing data security at the bit level—thereby eliminating the need for multiple perimeter hardware and software technologies. Data security is incorporated or weaved directly into the data at the bit level. The systems and methods of the present invention enable enterprise communities of interest to leverage a common enterprise infrastructure. Because security is already woven into the data, this common infrastructure can be used without compromising data security and access control. In some applications, data is authenticated, encrypted, and parsed or split into multiple shares prior to being sent to multiple locations, e.g., a private or public cloud. The data is hidden while in transit to the storage location, and is inaccessible to users who do not have the correct credentials for access.

Systems and Methods for Variable Rate Coding in a Data Processing System

The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for variable rate coding in a data processing system.

RAID MEMORY SYSTEM

A redundant array of inexpensive or independent disks (RAID) memory system comprises a nonvolatile memory device and a memory controller. The nonvolatile memory comprises a stripe block. The memory controller determines a value based on at least one of a program/erase (P/E) cycle and a read error frequency of the stripe block and determines whether to change a size of the stripe block based on the determined value. 1. A redundant array of inexpensive disks (RAID) memory system comprising:a nonvolatile memory device comprising a stripe block; anda memory controller configured to determine a value based on at least one of a program/erase (P/E) cycle and a read error frequency of the stripe block and determine whether to change a size of the stripe block based on the determined value.2. The RAID memory system of claim 1 , wherein the memory controller determines a reliability of data stored in the stripe block using the determined value claim 1 , and determines whether to change the size of the stripe block based on the determined reliability.3. The RAID memory system of claim 2 , wherein the memory controller determines whether to change the size of the stripe block based on the determined reliability and a degree to which the size of the stripe block is to be changed.4. The RAID memory system of claim 1 , wherein the stripe block comprises a first RAID parity and the memory controller generates a second RAID parity corresponding to the stripe block of the changed size.5. The RAID memory system of claim 4 , wherein a first number of RAID parity parities stored in the nonvolatile memory device before the change of size is different from a second number of RAID parity parities stored in the nonvolatile memory device after the change of size.6. The RAID memory system of claim 2 , wherein the size of the stripe block is reduced when the determined reliability is increased.7. The RAID memory system of claim 1 , wherein the nonvolatile memory device comprises a plurality of ...

Distributed object storage system comprising performance optimizations

A distributed object storage system includes several performance optimizations with respect to storing very small data objects, very large data objects and CRC calculations.

Backup and storage system

A computer-implemented method of backing up data comprises selecting a local file stored on a client device to be backed-up, encoding the file into multiple fragments, transmitting the multiple fragments from the client device to a plurality of remote storage areas, storing the multiple fragments at the remote storage areas.

REBUILDING A DATA REVISION IN A DISPERSED STORAGE NETWORK

A method begins by a processing module identifying a set of encoded data slices that have been created in accordance with a dispersed storage error encoding function having a decode threshold equal to or less than half of a number encoded data slices in the set of encoded data slices. The method continues with the processing module identifying a first sub-set of encoded data slices having a non-current revision level and identifying a second sub-set of encoded data slices having a more-current revision level. When a number of encoded data slices of the second sub-set of encoded data slices is greater than or equal to the decode threshold and when a number of encoded data slices of the first sub-set of encoded data slices is less than the decode threshold, the method continues with the processing module facilitating rebuilding of the first sub-set of encoded data slices. 1. A method for execution by a processing module of a computing device , the method comprises:identifying a set of encoded data slices that have been created by encoding a data segment in accordance with a dispersed storage error encoding function having a decode threshold equal to or less than half of a number encoded data slices in the set of encoded data slices;identifying a first sub-set of encoded data slices of the set of encoded data slices having a non-current revision level;identifying a second sub-set of encoded data slices of the set of encoded data slices having a more-current revision level; andwhen a number of encoded data slices of the second sub-set of encoded data slices is greater than or equal to the decode threshold and when a number of encoded data slices of the first sub-set of encoded data slices is less than the decode threshold, facilitating rebuilding of the first sub-set of encoded data slices using at least a decode threshold number of encoded data slices of the second sub-set of encoded slices.2. The method of further comprises:when the number of encoded data slices of ...

Combined group ecc protection and subgroup parity protection

A method and system are disclosed for providing combined error code protection and subgroup parity protection for a given group of n bits. The method comprises the steps of identifying a number, m, of redundant bits for said error protection; and constructing a matrix P, wherein multiplying said given group of n bits with P produces m redundant error correction code (ECC) protection bits, and two columns of P provide parity protection for subgroups of said given group of n bits. In the preferred embodiment of the invention, the matrix P is constructed by generating permutations of m bit wide vectors with three or more, but an odd number of, elements with value one and the other elements with value zero; and assigning said vectors to rows of the matrix P.

DISTRIBUTED STORAGE NETWORK MEMORY ACCESS BASED ON MEMORY STATE

A storage device of a DSN includes a plurality of memory devices, an interface, and a processing module. The storage device receives an encoded data slice of a set of encoded data slices, wherein a data segment is dispersed storage error encoded to produce the set of encoded data slices. The dispersed storage error encoding includes arranging the data segment into a data matrix of data blocks, generating an encoded data matrix from the data matrix and an encoding matrix, and arranging encoded data blocks of the encoded data matrix into the set of encoded data slices. The storage unit then divides the encoded data slice into encoded data slice partitions and generates a parity data partition therefrom. The storage device then stores the encoded data slice partitions and the parity data partition in separate memory devices. 1. A method for execution by one or more devices of a distributed storage network (DSN) , the method comprises:dispersed storage error encoding a data segment to produce a set of encoded data slices, wherein the dispersed storage error encoding includes arranging the data segment into a data matrix of data blocks, generating an encoded data matrix from the data matrix and an encoding matrix, and arranging encoded data blocks of the encoded data matrix into the set of encoded data slices;receiving, by a storage device of the DSN, an encoded data slice of the set of encoded data slices;dividing, by the storage device, the encoded data slice into encoded data slice partitions;generating, by the storage device, a parity data partition based on the encoded data slice partitions;storing, by the storage device, the encoded data slice partitions in separate memory devices of a plurality of memory devices of the storage unit; andstoring, by the storage device, the parity data partition in another separate memory of the plurality of memory devices.2. The method of further comprises:maintaining, by the storage device, memory states of the plurality of memory ...

Storage system, control method thereof, and program

A RAID control unit forms a redundant configuration of RAID with respect to a physical device including a plurality of disk devices. A cache control unit processes data in page units corresponding to a stripe of the disk devices. A cache area placement unit, when it receives a write request from an upper-level device, places, in a cache memory, a cache area which is provided with a plurality of page areas and has the same size as the stripe area. When new data in the cache memory which is newer than the data in the physical device is to be written back to the storage device, a write-back processing unit generates new parity data by use of an unused area in the cache stripe area, and then writes the new data and the new parity to the corresponding storage devices.

Distributed System for Fault-Tolerant Data Storage

Fault-tolerant storage is provided using a distributed data storage system that receives input data from clients and divides that data into data blocks for storage. The data blocks are processed using a coding scheme that generates redundant level one error correction blocks (L1EC Blocks). The L1EC blocks enable the reconstruction of one or more damaged or inaccessible data blocks, so long as sufficient undamaged elements are still accessible. The L1EC blocks and the data blocks are divided into distribution sets and these sets are stored at a plurality of data storage locations. At each data storage location additional level two error correction blocks (L2EC blocks) are generated that provide local data redundancy. The L2EC blocks enable reconstruction of damaged elements at a data storage location without requiring communication with the other data storage locations.

Distributed storage network for modification of a data object

A distributed storage network generates a plurality of data segments from a data object and stores each of the plurality of data segments as a plurality of encoded data slices generated from an error encoding dispersal function. When the distributed storage network receives a modification request for the data object, it determines a size of the plurality of data segments of the data object from a segment size field and identifies one of the plurality of data segments requiring modification. The identified data segment is reconstructed from the plurality of encoded data slices and modified in accordance with the modification request.

Data Processing System with Failure Recovery

Various embodiments of the present invention provide systems and methods for a data processing system with failure recovery. For example, a data processing system is disclosed that includes a data processing circuit operable to process a block of data from an input and to yield a plurality of possible results based on the block of data, and an error detection circuit operable to test the plurality of possible results for errors and to report to the data processing circuit whether the plurality of possible results contain errors. The data processing system is operable to output any of the possible results in which the error detection circuit found no errors.

Switchable on-die memory error correcting engine

Subject matter disclosed herein relates to a user-switchable error correction coding (ECC) engine residing on a memory die.

Resiliency to memory failures in computer systems

A resiliency system detects and corrects memory errors reported by a memory system of a computing system using previously stored error correction information. When a program stores data into a memory location, the resiliency system executing on the computing system generates and stores error correction information. When the program then executes a load instruction to retrieve the data from the memory location, the load instruction completes normally if there is no memory error. If, however, there is a memory error, the computing system passes control to the resiliency system (e.g., via a trap) to handle the memory error. The resiliency system retrieves the error correction information for the memory location and re-creates the data of the memory location. The resiliency system stores the data as if the load instruction had completed normally and passes control to the next instruction of the program.

Computer system and process for transferring multiple high bandwidth streams of data between multiple storage units and multiple applications in a scalable and reliable manner

Multiple applications request data from multiple storage units over a computer network. The data is divided into segments and each segment is distributed randomly on one of several storage units, independent of the storage units on which other segments of the media data are stored. At least one additional copy of each segment also is distributed randomly over the storage units, such that each segment is stored on at least two storage units. This random distribution of multiple copies of segments of data improves both scalability and reliability. When an application requests a selected segment of data, the request is processed by the storage unit with the shortest queue of requests. Random fluctuations in the load applied by multiple applications on multiple storage units are balanced nearly equally over all of the storage units. This combination of techniques results in a system which can transfer multiple, independent high-bandwidth streams of data in a scalable manner in both directions between multiple applications and multiple storage units.

CHUNK REDUNDANCY ARCHITECTURE FOR MEMORY

An integrated circuit (IC) includes addressable blocks of memory, and at least one redundant block of memory. A block of memory includes two or more chunks of memory. The IC also includes redundancy control cells. Control circuitry is included to access a first chunk of a redundant block of memory in place of a first remapped chunk one of the addressable blocks of memory, and a second chunk of a redundant block of memory in place of a second remapped chunk one of the addressable blocks of memory, based on the redundancy control cells. 1. An integrated circuit comprising:two or more addressable blocks of memory, and at least one redundant block of memory, wherein blocks of memory respectively comprise at least a first chunk of memory of a first tile and a second chunk of memory of a second tile;redundancy control cells;control circuitry to access a first redundant chunk of the at least one redundant block of memory in place of a first remapped chunk of one of the two or more addressable blocks of memory, and a second redundant chunk of the at least one redundant block of memory in place of a second remapped chunk of one of the two or more addressable blocks of memory, based on information stored in the redundancy control cells.2. The integrated circuit of claim 1 , wherein the first chunk of a given block and the second chunk of the given block are concurrently accessed.3. The integrated circuit of claim 1 , wherein a chunk of memory comprises a three-dimensional array of memory cells.4. The integrated circuit of claim 1 , wherein the redundancy control cells comprise:one or more cells to store a first block address;a cell to store a first enable bit to enable remapping an access of the first remapped chunk indicated by the first block address to the first redundant chunk;one or more cells to store a second block address; anda cell to store a second enable bit to enable remapping an access of the second remapped chunk indicated by the second block address to the ...

NON-TEMPORARILY STORING TEMPORARILY STORED DATA IN A DISPERSED STORAGE NETWORK

A method begins by a dispersed storage (DS) processing module receiving data from a plurality of sources and queuing the data for storage in a dispersed storage network (DSN). The method continues with the DS processing module utilizing temporary dispersed storage error encoding parameters for efficient and reliable error encoded temporary storage of the data in the DSN. For a data object of the data temporarily stored in the DSN, the method continues with the DS processing module determining non-temporary storage parameters for the data object, retrieving first encoded data slices regarding the data object from the DSN, reconstructing the data object from the first encoded data slices in accordance with the temporary dispersed storage error encoding parameters, encoding the reconstructed data object in accordance with the non-temporary storage parameters for the data object to produce second encoded data slices, and storing the second encoded data slices in the DSN. 1. A method for execution by processing module of one or more computing devices , the method comprises:receiving data from a plurality of sources;queuing the data for storage in a dispersed storage network (DSN);utilizing temporary dispersed storage error encoding parameters for efficient and reliable error encoded temporary storage of the data in the DSN; within a time period corresponding to reliability of the temporary dispersed storage error encoding parameters, determining non-temporary storage parameters for the data object;', 'retrieving first encoded data slices regarding the data object from the DSN, wherein the data object was error encoded in accordance with the temporary dispersed storage error encoding parameters to produce the first encoded data slices;', 'reconstructing the data object from the first encoded data slices in accordance with the temporary dispersed storage error encoding parameters;', 'encoding the reconstructed data object in accordance with the non-temporary storage ...

Antipodal-mapping-based encoders and decoders

Examples of the present invention include an electronic-memory-system component. The electronic-memory-system component includes an array of data-storage elements and an encoder that receives input data, processes the input data as a two-dimensional array of bits by carrying out two passes, in one pass subjecting a portion of each row of the two-dimensional array of bits having more than a threshold weight to a first weight-reduction operation, and, in another pass, subjecting a portion of each considered column of the two-dimensional array of bits having more than a threshold weight to a second weight-reduction operation, one of the first and second weight-reduction operations employing an antipodal mapping and the other of the first and second weight-reduction operations employing bit inversion, generates a codeword corresponding to the input data, and stores the codeword in the array of data-storage elements.

SYSTEM FOR INJECTING PROTOCOL SPECIFIC ERRORS DURING THE CERTIFICATION OF COMPONENTS IN A STORAGE AREA NETWORK

An apparatus comprising an initiator circuit and a target circuit. The initiator circuit may be configured to (i) communicate with a network through a first interface and (ii) generate testing sequences to be sent to the network. The target circuit may be configured to (i) receive the testing sequences from the network through a second network interface and (ii) respond to the testing sequences. 1. An apparatus comprising:an initiator circuit configured to (i) communicate with a network through a first interface, (ii) generate a plurality of testing sequences from a plurality of values stored in a file, (iii) create one or more errors in said testing sequences by altering one or more of said values in said file and (iv) transmit said file including said testing sequences on said network; anda target circuit configured to (i) receive said file including said testing sequences from said network through a second network interface, (ii) generate a plurality of responses to said testing sequences and (iii) transmit said responses on said network to said initiator circuit, wherein said initiator circuit is further configured to verify that said target properly responded to said errors transmitted in said testing sequences.2. The apparatus according to claim 1 , wherein said target circuit comprises a RAID controller.3. The apparatus according to claim 1 , wherein said initiator circuit comprises a testing section configured to (i) generate said testing sequences in a first state and (ii) generate error-free sequences from said values in a second state.4. The apparatus according to claim 1 , wherein said errors introduced in said testing sequences comprise protocol specific error sequences configured to simulate protocol specific errors.5. The apparatus according to claim 4 , wherein said protocol specific errors simulate errors in a network environment.6. The apparatus according to claim 4 , wherein said protocol specific errors comprise simulated errors in an Internet ...

COMPUTING SYSTEM UTILIZING DISPERSED STORAGE

A computing system comprises at least a processing module, a main memory, a memory controller, and a plurality of memory components. A method begins by the memory controller receiving a memory access request regarding a data segment. The method continues with the memory controller interpreting the memory access request to determine whether an error encoding dispersal function of the data segment is applicable. The method continues with the memory controller identifying at least a threshold number of memories based on the memory access request, wherein the threshold number of memories includes at least one of the main memory and/or one or more of the plurality of memory components, when the error encoding dispersal function is applicable. The method continues with the memory controller addressing the at least a threshold number of memories to facilitate the memory access request. 1. A memory controller comprises:an input unit operable to receive a read request regarding a data segment; and interpret the read request to determine whether the data segment is encoded using an error encoding dispersal function and stored as a set of encoded data slices;', [ a main memory; and', 'one or more of the plurality of memory components; and, 'identify one or more memories that are storing at least a threshold number of encoded data slices of the set of encoded data slices, wherein memories of the one or more memories includes at least one of, 'address the one or more memories to retrieve the at least the threshold number of encoded data slices;, 'when the data segment is stored as the set of encoded data slices, identify one of the one or more memories; and', 'address the one of the one or more memories to retrieve the data segment., 'when the data segment is not encoded], 'a processing unit operable to2. The memory controller of claim 1 , wherein the processing unit is further operable to interpret the read request by:interpreting information of the read request, wherein the ...

Validating a certificate chain in a dispersed storage network

A method begins by a processing module receiving a certificate chain and determining whether at least one of one or more signed certificates of the chain has a valid signature. When the at least one of the one or more signed certificates has a valid signature, the method continues with the processing module identifying one or more certificate authorities (CA) to produce identified CAs, accessing registry information that includes one or more realm identifiers (IDs) and a plurality of trusted CA IDs, determining whether one or more of the identified CAs is a trusted CA, and when the one or more of the identified CAs is a trusted CA, indicating that the certificate chain is valid, identifying a realm ID based on a trusted CA ID, and generating certificate chain validation information to include the realm ID, trusted CAs, and the indication of the validity of the certificate chain.

Storage control apparatus and error correction method

A controller of a storage control apparatus creates a fixed value, which is one or higher values conforming to a prescribed data pattern, with respect to first data, which is smaller than the size of a storage area of a storage device, creates a guarantee code related to a data area comprising the first data and the fixed value, and writes the data group comprising the data area and the guarantee code to the storage area. The controller reads a data group from the storage area, and determines whether or not more errors than the number of errors correctable by the guarantee code are included in this data group. In a case where the result of this determination is affirmative, the controller determines whether or not an error exists in the fixed value inside the data group. In a case where the result of this determination is affirmative, the controller corrects the fixed value, in which there is an error, to a correct fixed value, and in a case where the number of errors included in the data group is equal to or less than the number of errors correctable by the guarantee code, uses the guarantee code to correct errors in the data group.

MEMORY SELECTION FOR SLICE STORAGE IN A DISPERSED STORAGE NETWORK

A method begins by a dispersed storage (DS) processing module determining that a plurality of sets of encoded data slices is to be stored in a set of storage units of a dispersed storage network (DSN) and identifying one or more devices of the DSN that will potentially issue a read request for at least some sets of encoded data slices. The method continues with the (DS) processing module determining transmission times between the one or more devices and the set of storage units and determining a storage strategy for storing the plurality of sets of encoded data slices in the set of storage units based on the transmission times and memory devices of the set of storage units such that, from set to set of encoded data slices, at least a threshold number of encoded data slices are retrievable with comparable read response times. 1. A method for execution by one or more processing modules of one or more computing devices of a dispersed storage network (DSN) , the method comprises:determining that a plurality of sets of encoded data slices is to be stored in a set of storage units of the DSN, wherein a data object is dispersed storage error encoded to produce the plurality of sets of encoded data slices and wherein a storage unit of the set of storage units includes a plurality of memory devices that includes one or more solid state memory devices and disk drive memory devices;identifying one or more devices of the DSN that will potentially issue a read request for at least a portion of the data object;determining one or more sets of transmission times between the one or more devices and the set of storage units; anddetermining a storage strategy for storing the plurality of sets of encoded data slices in the set of storage units based on the one or more sets of transmission times and the pluralities of memory devices of the set of storage units, wherein the storage strategy indicates whether storage units of the set of storage units are to store encoded data slices of ...

PESSIMISTIC DATA READING IN A DISPERSED STORAGE NETWORK

A method begins by a processing module receiving a data retrieval request and determining a read threshold number of dispersed storage (DS). The method continues with the processing module sending read request messages to DS units and receiving encoded data slices to produce received encoded data slices. The method continues with the processing module determining an incremental number of encoded data slices based on the number of received encoded data slices, determining an incremental number of DS units, and sending a read request message to each of the incremental number of DS units when the number of received encoded data slices compares unfavorably to a decode threshold number. The method continues with the processing module dispersed storage error decoding the received encoded data slices to produce data when the number of received encoded data slices compares favorably to the decode threshold number of encoded data slices. 1. A method comprises:receiving a data retrieval request;determining a read threshold number of encoded data slices in response to the data retrieval request;sending read request messages regarding the read threshold number of encoded data slices to storage units of a dispersed storage network; receiving encoded data slices of the read threshold number of encoded data slices within a time period to produce received encoded data slices;', determining an incremental number of encoded data slices based on the number of received encoded data slices and the decode threshold number;', 'sending a read request message regarding the incremental number of encoded data slices to other storage units of the dispersed storage network; and', 'repeating the loop; and, 'when a number of received encoded data slices compares unfavorably to a decode threshold number, 'when the number of received encoded data slices compares favorably to the decode threshold number of encoded data slices, exiting the loop; and, 'entering a loop, wherein the loop ...

MANAGING A STORAGE ARRAY

The present invention provides a method and apparatus of managing a storage array. The method comprises: striping the storage array to form a plurality of stripes; selecting F storage chunks from each stripe as local parity chunks, and selecting another L storage chunks from the storage array as global parity chunks; performing (F+L) fault tolerant erasure coding on all data chunks in a stripe to generate (F+L) groups of parity data, and storing F groups of parity data therein into the F local parity chunks; performing cross-stripe operation on another L groups of parity data to generate L groups of global parity data, and storing them into the L global parity chunks, respectively. The apparatus corresponds to the method. With the invention, a plurality of errors in the storage array can be detected and/or recovered to improve fault tolerance and space utilization of the storage array. 1. A method of managing a storage array consisting of n storage devices , the method comprising:striping the storage array to form m stripes, wherein each stripe contains n storage chunks from the n storage devices respectively;selecting F storage chunks from each stripe as local parity chunks, selecting another L storage chunks from the storage array as global parity chunks, and using at least a part of storage chunks in the storage array except the local parity chunks and global parity chunks as data chunks;performing (F+L) fault tolerant erasure coding on data in all data chunks in a stripe to generate (F+L) groups of parity data, and storing F groups of parity data therein respectively into F local parity chunks of this stripe;performing cross-stripe operation on L groups of parity data of the (F+L) groups of parity data to generate L groups of global parity data, and storing the L groups of global parity data respectively into the L global parity chunks.2. The method according to claim 1 , wherein selecting F storage chunks from each stripe as local parity chunks comprises: ...

STORING ENCODED DATA SLICES IN A DISPERSED STORAGE UNIT

A method begins with a processing module receiving an access request for the data object. The method continues by ascertaining that the data object is divided into a plurality of data segments and that plurality of data segments are dispersed storage error encoded to produce a plurality of sets of encoded data slices. The method continues by ascertaining batching of the plurality of sets of encoded data slices, wherein the plurality of sets of encoded data slices are arranged into a set of batched encoded data slices. The method continues by outputting a set of access requests for the set of batched encoded data slices to storage units of the DSN. The present U.S. Utility Patent Application claims priority pursuant to 35 U.S.C. §120, as a continuation, to the following U.S. Utility Patent Application which is hereby incorporated herein by reference in its entirety and made part of the present U.S. Utility Patent Application for all purposes:1. U.S. Utility application Ser. No. 13/252,340, entitled “STORING ENCODED DATA SLICES IN A DISPERSED STORAGE UNIT,” (Attorney Docket No. CS00828), filed Oct. 4, 2011, pending.This invention was made with Government support under Contract No. 2009*0674524*000 awarded by the Central Intelligence Agency. The Government has certain rights in the invention.Not Applicable1. Technical Field of the InventionThis invention relates generally to computing systems and more particularly to data storage solutions within such computing systems.2. Description of Related ArtComputers are known to communicate, process, and store data. Such computers range from wireless smart phones to data centers that support millions of web searches, stock trades, or on-line purchases every day. In general, a computing system generates data and/or manipulates data from one form into another. For instance, an image sensor of the computing system generates raw picture data and, using an image compression program (e.g., JPEG, MPEG, etc.), the computing system ...

OPTIMISTIC DATA WRITING IN A DISPERSED STORAGE NETWORK

A method begins by a processing module dispersed storage error encoding data to produce a set of encoded data slices and sending a set of write request messages to a set of dispersed storage (DS) units, wherein each of the set of write request messages includes an encoded data slice of the set of encoded data slices. The method continues with the processing module determining whether a pillar width number of favorable write response messages has been received within a write acknowledgement (ACK) time period. The method continues with the processing module executing a retry write process to at least one DS unit of the set of DS units from which a favorable write response message was not received during the write ACK time period when the pillar width number of favorable write response messages has not been received within the write ACK time period. 1. A method for execution by a computer , the method comprises:dispersed storage error encoding a data segment of data to produce a set of encoded data slices;sending write request messages regarding the set of encoded data slices to dispersed storage (DS) units of a dispersed storage network;receiving favorable write response messages from at least some of the DS units;determining a number of favorable write response messages received within a write acknowledgement (ACK) time period; and sending write commit request messages to the at least some of the DS units; and', 'sending a retry write message for each encoded data slice of the set of encoded data slices for which a favorable write response message was not received within the write ACK time period., 'when the number of favorable write response messages is equal to or greater than a write threshold number but less than all for the set of encoded data slices2. The method of further comprises at least one of:sending the retry write message for each encoded data slice of the set of encoded data slices for which a favorable write response message was not received to each ...

PROGRAMMING ERROR CORRECTION CODE INTO A SOLID STATE MEMORY DEVICE WITH VARYING BITS PER CELL

Memory devices that, in a particular embodiment, receive and transmit analog data signals representative of bit patterns of two or more bits such as to facilitate increases in data transfer rates relative to devices communicating data signals indicative of individual bits. Programming error correction code (ECC) and metadata into such memory devices includes storing the ECC and metadata at different bit levels per cell based on an actual error rate of the cells. The ECC and metadata can be stored with the data block at a different bit level than the data block. If the area of memory in which the block of data is stored does not support the desired reliability for the ECC and metadata at a particular bit level, the ECC and metadata can be stored in other areas of the memory array at different bit levels. 1. An electronic system , comprising:a host processor;a communication bus coupled to the host processor;a bulk storage device having a bus interface for communication with the communication bus; and an array of memory cells; and', 'control circuitry coupled to the array of memory cells wherein the control circuitry is configured to calibrate a controller to a reliability of an area of the array of memory cells and change a bit level of ECC data and/or metadata programmed into the area of the array of memory cells based on the calibration and a desired level of reliability., 'a memory device, comprising2. The system of claim 1 , wherein the control circuitry is further configured to control calibration of the controller by controlling writing a first voltage to a center memory cell of the array of memory cells claim 1 , writing a second voltage to memory cells surrounding the center memory cell claim 1 , reading the center memory cell at a first time claim 1 , varying threshold voltages of the surrounding memory cells claim 1 , reading the center memory cell at a second time claim 1 , and generating a table comprising an indication of an ability of the center memory ...

Free space collection in log structured storage systems

A mechanism is provided for optimizing free space collection in a storage system having a plurality of segments. A collection score value is calculated for least one of the plurality of segments. The collection score value is calculated by determining a sum, across tracks in the segment, of the amount of time over a predetermined period of time during which the track has been invalid due to a more recent copy being written in a different segment. Segments are chosen for free space collection based on the determined collection score value.

Information processing device, information processing method, and information storage medium

Recording failure area information includes information indicating an optical disk having a recording failure area in which data is missing, and indicating a position of the recording failure area in the optical disk, out of the optical disks constituting a disk array. A controller ( 110 ) includes a recording controller ( 121 ) which records data in data blocks of the optical disks by striping the data, and records, in at least one parity block, at least one parity data for use in recovering data in a data block in which the data is missing, out of the data blocks; and a management information updater ( 125 ) which records recording failure area information in a management information area of at least one of the optical disks, in the case where data is missing in at least one of optical disk drives at the time of data recording.

Method and server for managing redundant arrays of independent disks cards

In a method for managing redundant arrays of independent disks (RAID) cards and a server for executing the method, the server calculates a theoretical percentage of a load of each RAID card according to a number of the RAID cards, and loads an actual percentage of the load of each RAID card through a multi input output (MIO) interface, and detects peripheral component interconnect-express (PCI-E) bandwidth of each RAID card. When the load of each RAID card is unbalanced or the PCI-E bandwidth of the RAID card is saturated, the server transfers the load from a RAID card having a greater actual percentage of the load into a RAID card having a less actual percentage of the load, and transfers the load from a RAID card whose PCI-E bandwidth is saturated into a RAID card whose PCI-E bandwidth is unsaturated according to differential signals through the MIO interface.

METHOD OF PERFORMING WRITE OPERATION OR READ OPERATION IN MEMORY SYSTEM AND SYSTEM THEREOF

A method of performing a write operation or a read operation in a memory system includes compressing data of a first size unit, generating a plurality of types of Error Checking and Correction (ECC) information based on the compressed data, combining the compressed data and the plurality of types of ECC information in units of a second size, and writing the information combined in units of the second size into a memory device. 1. A method of performing a write operation in a memory system , comprising:compressing data of a first size unit;generating a plurality of types of Error Checking and Correction (ECC) information based on the compressed data;combining the compressed data and the plurality of types of ECC information in units of a second size; andwriting the information combined in units of the second size into a memory device.2. The method of claim 1 , wherein the first size unit is determined as an ECC encoding processing size unit in the memory system.3. The method of claim 1 , wherein the generating of the plurality of types of ECC information comprises:dividing the compressed data into a plurality of pieces of divided compressed data;generating first parity information by firstly performing ECC encoding processing of a portion of the plurality of pieces of divided compressed data; andgenerating second parity information by secondly performing ECC encoding processing of information, which includes the portion of the plurality of pieces of divided compressed data for which the first parity information has been generated, the first parity information, and another portion of the plurality of pieces of divided compressed data for which the first parity information has not been generated.4. The method of claim 3 , wherein the generating of the first parity information comprises:generating first information of the first size unit by adding initially set padding information to the portion of the plurality of pieces of divided compressed data; andgenerating the ...

RETRIEVING DATA IN A DISPERSED STORAGE NETWORK

A method for execution by a dispersed storage and task (DST) processing unit operates to receive a retrieve data object request from a requesting entity; initiate retrieval of the data object from a DST execution unit; receive one or more slices from the DST execution unit; determine whether the data object is being deleted; and when determined that the data object is being deleted, output an error message to the requesting entity. 1. A method for execution by a processing system of a dispersed storage and task (DST) processing unit that includes a processor , the method comprises:receiving, at the processing system, a retrieve data object request from a requesting entity;initiating, via the processing system, retrieval of the data object from a DST execution unit;receiving, via the processing system, one or more slices from the DST execution unit;determining, via the processing system, whether the data object is being deleted; andwhen determined that the data object is being deleted, outputting, via the processing system, an error message to the requesting entity.2. The method of wherein the retrieve data object request includes one or more of: a data object identifier (ID) claim 1 , a source name claim 1 , and a plurality of slice names corresponding to a data object of the retrieve data object request.3. The method of wherein the initiating includes one or more of: generating a plurality of sets of read slice requests and outputting the plurality of sets of read slice requests to the DST execution unit.4. The method of wherein generating of the plurality of sets of read slice requests includes generating a plurality of sets of slice names corresponding to a data object ID.5. The method of wherein the determining is based on extracting a deletion in progress indicator that indicates the data object is currently being deleted from at least one of the one or more slices.6. The method of wherein the determining is based on one or more of accessing a list of data ...

Multi-stage slice recovery in a dispersed storage network

A method for use by a computing device in a dispersed storage network (DSN) to recover corrupt encoded data slices. In response to a request to storage units of the DSN for encoded data slices corresponding to a data segment, the computing device of a receives less than a decode threshold number of valid encoded data slices and at least one integrity error message that provides an indication of a corrupt encoded data slice. The computing device requests and receives at least one corrupt encoded data slice corresponding to the integrity error message(s). Utilizing at least one correction approach involving stored integrity data, the computing device then corrects the corrupt slice(s) to produce a decode threshold number of encoded data slices in order to decode the corresponding data segment. A variety of correction approaches may be employed, including a multi-stage approach that utilizes data from both valid and invalid slices.

ACCELERATING SLICE TRANSFERS UTILIZING MULTIPLE INTERFACES

Based on a detected data transfer instruction, a computing device within a dispersed storage network (DSN) determines a data transfer synchronization protocol that substantially maintains synchronization of at least the write threshold number of first associated slices (e.g., a first row of encoded data slices) to be transferred from the first set of storage units (SUs) to a second set of SUs based on a substantially same first transfer rate and substantially maintains synchronization of at least the write threshold number of second associated slices (e.g., a second row of encoded data slices) to be transferred from the first set of SUs to the second set of SUs based on a substantially same second transfer rate. The computing device then executes the data transfer synchronization protocol to perform substantially synchronized transfer of respective sets of the plurality of sets of encoded data slices from the first set of SUs to the second set of SUs. 1. A computing device comprising:an interface for interfacing with a dispersed storage network (DSN);memory that stores operational instructions; and [ a data object is segmented into a plurality of data segments that includes a first data segment corresponding to a first row and a second data segment corresponding to a second row;', 'the first data segment is dispersed error encoded to produce a first row of encoded data slices, a read threshold number of the first row of encoded data slices provides for reconstruction of the first data segment, and a write threshold number of the first row of encoded data slices provides for a successful transfer of the first row of encoded data slices;', 'the second data segment is dispersed error encoded to produce a second row of encoded data slices, the read threshold number of the second row of encoded data slices provides for reconstruction of the second data segment, and the write threshold number of the second row of encoded data slices provides for the successful transfer of ...

METHOD AND SYSTEM FOR PROCESSING DATA ACCESS REQUESTS DURING DATA TRANSFERS

A method for execution by a storage unit of a dispersed storage network, the method comprises transitioning storage of one or more groups of encoded data slices from storage based on a previous version of a distributed agreement protocol to storage based on a new version of the distributed agreement protocol. While transitioning storage of the one or more groups of encoded data slices, receiving, from a requesting computing device, a data access request regarding an encoded data slice of the one or more groups of encoded data slices. Determining whether the encoded data slice has been transferred as a result of the transitioning. When the storage unit is currently storing the encoded data slice, processing the data access request. When the storage unit is not currently storing the encoded data slice, functioning as a proxy for the requesting computing device to fulfill the data access request. 1. A method for execution by a storage unit of a dispersed storage network (DSN) , the method comprises:transitioning storage of one or more groups of encoded data slices from storage based on a previous version of a distributed agreement protocol to storage based on a new version of the distributed agreement protocol; and receiving, from a requesting computing device, a data access request regarding an encoded data slice of the one or more groups of encoded data slices;', 'determining whether the encoded data slice has been transferred as a result of the transitioning;', 'when the storage unit is currently storing the encoded data slice, processing the data access request; and', 'when the storage unit is not currently storing the encoded data slice, functioning as a proxy for the requesting computing device to fulfill the data access request., 'while transitioning storage of the one or more groups of encoded data slices2. The method of further comprises:receiving the data access request based on the previous version of the distributed agreement protocol, wherein the encoded ...

SYSTEM AND METHOD OF RELIABLE DISTRIBUTED DATA STORAGE WITH CONTROLLED REDUNDANCY

A system and method is disclosed for data storage in a distributed data storage system. An exemplary method includes generating derivatives of a file using an (n,k) algorithm, such that k number of derivatives can be used to restore the file. Moreover, the derivatives are stored in nodes in a multilevel tree representing the distributed data storage system and a rank is calculated that indicates a fault tolerance of the file. The method further determines whether the rank is greater than or equal to k to ensure reliability of recoverability of the file. If the rank less than k, the method reorders one or more derivatives to a different node and/or store one or more additional derivative from the file. 1. A method for data storage in a distributed data storage system , the method comprising:generating a plurality of derivatives from a file using an (n,k) algorithm, wherein the (n,k) algorithm provides that minimum number k of the derivatives is required to restore the file;storing the derivatives in a plurality of nodes in a multilevel tree representing the distributed data storage system, wherein the multilevel tree includes at least L levels;{'sub': l,m', 'l,m, 'determining a rank rindicating a fault tolerance of the file, wherein the rank rrepresents a number of derivatives available after a failure on at least one level l of the L levels with a number of failed nodes m in the level l, wherein m>0;'}{'sub': 'l,m', 'determining whether the rank r≧k; and'}{'sub': 'l,m', 'if the rank r Подробнее

SLICE STORAGE IN A DISPERSED STORAGE NETWORK

A method for use in a dispersed storage network (DSN) operates to output at least a write threshold number of write slice requests to a set of storage units of the DSN and receive write slice responses from the set of storage units. When the write threshold number of favorable write slice responses is received, the method includes generating a corresponding number of commit requests and outputting the number of commit requests to associated storage units corresponding to the write threshold number of favorable write slice responses received. 1. A method for execution by a dispersed storage and task (DST) processing unit that includes a processor , the method comprises:receiving, at a processing system, a data object for storage in a dispersed storage and task network (DSTN);determining, by the processing system, a retrieval reliability level associated with the data object;determining, by the processing system, baseline dispersal parameters for storage of the data object utilizing a dispersed storage error coding function;determining, by the processing system, a write threshold value for storage of the data object utilizing the dispersed storage error coding function based on the retrieval reliability level;encoding, by the processing system, the data object utilizing the dispersed storage error coding function in accordance with the baseline dispersal parameters to produce a plurality of sets of encoded data slices;for each set of encoded data slices of the plurality of sets of encoded data slices, generating, by the processing system, a set of write slice requests that includes the set of encoded data slices;outputting, by the processing system, at least a write threshold number of write slice requests to a set of DST execution units of the DSTN;receiving, by the processing system, write slice responses from the set of DST execution units; generating, by the processing system, a corresponding number of commit requests; and', 'outputting, by the processing system, ...

List request processing during a dispersed storage network configuration change

A method includes identifying resources that are affiliated with a range of slice names of a listing request. The method further includes creating an ordered classification of the resources. The method further includes a resource determining whether it is in a last class of the ordered classification. When the resource is in the last class, it processes the listing request to generate a listing response and sends the listing response to another resource in a next lower class. When the resource is not in the last class, it identifies a second resource for proxying of the listing request and sends the listing request to the second resource. The method further includes receiving a cumulated listing response from the second resource. The method further includes processing the listing request to generate the listing response. The method further includes combining the listing response with the cumulated listing response.

Memory Controller With Error Detection And Retry Modes Of Operation

A memory system includes a link having at least one signal line and a controller. The controller includes at least one transmitter coupled to the link to transmit first data, and a first error protection generator coupled to the transmitter. The first error protection generator dynamically adds an error detection code to at least a portion of the first data. At least one receiver is coupled to the link to receive second data. A first error detection logic determines if the second data received by the controller contains at least one error and, if an error is detected, asserts a first error condition. The system includes a memory device having at least one memory device transmitter coupled to the link to transmit the second data. A second error protection generator coupled to the memory device transmitter dynamically adds an error detection code to at least a portion of the second data. 1. A memory controller , comprising:a plurality of transmitters to transmit write data and an error detection code to a memory device, the error detection code encoded by the memory controller in connection with the write data, wherein the plurality of transmitters are operable to transmit the write data in accordance with one of a plurality of modes, a first mode including data comprising symbols respectively transferred on rising and falling edges per clock cycle of a clock signal, and a second mode including data transferred with one symbol per clock cycle;circuitry to identify if the transmitted write data as received by the memory device reflects an error condition dependent on at least one error in the write data; andthe memory controller to re-transmit the write data to the memory device in the event that the circuit identifies that the error condition exists.2. The memory controller of claim 1 , wherein the error detection code transmitted from the memory controller is a cyclic code.3. The memory controller of claim 1 , wherein claim 1 , in the event of the error condition ...

Storage Controller and Method for Managing Modified Data Flush Operations From a Cache

A storage controller maintaining a cache manages modified data flush operations. A set-associative map or relationship between individual cache lines in the cache and a corresponding portion of the host managed or source data store is generated in such a way that a quotient can be used to identify modified data in the cache in the order of the source data's logical block addresses. The storage controller uses a collision bitmap, a dirty bit map and a flush table when flushing data from the cache. The storage controller selects a quotient and identifies modified cache lines in the cache identified by the quotient. As long as the quotient remains the same, the storage controller flushes or transfers the modified cache lines to the data store. Otherwise, when the quotient is not the same, the data in the cache is skipped. A linked list is used to traverse skipped cache lines.

Accessing data in a dispersed storage network during write operations

A method includes sending data access requests to storage units regarding a set of encoded data slices. The method further includes, when a write transaction is pending for the set of encoded data slices, receiving proposal records from the storage units. The method further includes interpreting the proposal records to determine an ordering of visible versions of the set of encoded data slices stored by the storage units. The method further includes determining whether a threshold number of encoded data slices of a desired version of the set of encoded data slices is visible. The method further includes, when the threshold number of encoded data slices is visible, determining whether to proceed with the data access request. The method further includes, when determined to proceed with the data access request, sending a request to proceed with the data access request to the storage units.

Processing incomplete data access transactions

A method includes obtaining a set of pending transaction information from a set of storage units regarding a plurality of pending transactions. A pending transaction information includes information regarding an encoded data slice and a computing device issuing a data access request. The method further includes identifying an incomplete transaction based on the set of pending transaction information. The method further includes determining whether to complete the incomplete transaction based on information regarding the requesting computing device. The method further includes, when the incomplete transaction is not to be completed, instructing the storage units to discard a corresponding data access request associated with the incomplete transaction. The method further includes, when the incomplete transaction is to be completed, determining what aspects of the corresponding data access request have not been completed and instructing at least one storage unit to complete the aspects of the corresponding data access request.

CHANGING OF MEMORY COMPONENTS TO BE USED FOR A STRIPE BASED ON AN ENDURANCE CONDITION

Memory components can be determined to store one or more stripes of data. Data for one or more stripes of data can be stored based on the determined memory components. An indication that an endurance condition of the memory components has satisfied an endurance condition threshold can be received. In response to receiving the indication that the endurance condition of the memory components has satisfied the endurance condition threshold, the memory components that are to store a subsequent stripe of data can be changed. Data for the subsequent stripe of data can be stored based on the changed memory components. 1. A method comprising:determining a set of memory components to store one or more stripes of data;storing data for the one or more stripes of data on the set of memory components;receiving an indication that an endurance condition of the set of memory components has satisfied an endurance condition threshold; removing a first memory component from the set of memory components that are to store a subsequent stripe of data; and', 'adding a second memory component to the set of memory components to replace the first memory component within a changed set of memory components; and, 'in response to receiving the indication that the endurance condition of the set of memory components has satisfied the endurance condition thresholdstoring data for the subsequent stripe of data based on the changed set of memory components.2. The method of claim 1 , wherein the endurance condition corresponds to a bit error rate and the endurance condition threshold corresponds to a bit error rate threshold claim 1 , and wherein the indication is received in response to the first memory component having a bit error rate that satisfies the bit error rate threshold.3. The method of claim 1 , wherein changing the set of memory components comprises switching the first memory component with the second memory component that has not stored data for the one or more stripes claim 1 , the ...

DATA OBJECT RECOVERY FOR STORAGE SYSTEMS

A method comprising: receiving an I/O request for object data; determining one or more data fragments wherein the object data is stored; determining that one or more of the data fragments are unavailable; determining, from within the one or more unavailable data fragments, a set of slices storing the object data, each slice comprising k small data fragments and m coded fragments; for each slice, retrieving at least k small data and coded fragments within the slice from storage; and recovering a segment of the object data using the retrieved small data and coded fragments. A related system and computer program product are also described. 1. A method comprising:receiving an I/O request for object data;determining one or more data fragments wherein the object data is stored;determining that one or more of the data fragments are unavailable;determining, from within the one or more unavailable data fragments, a set of slices storing the object data, each slice comprising k small data fragments and m coded fragments;for each slice, retrieving at least k small data and coded fragments within the slice from storage; andrecovering a segment of the object data using the retrieved small data and coded fragments.2. The method of further comprising:determining that one or more of the data fragments is available;retrieving the one or more available data fragments;extracting a segment of the object data from the retrieved available data fragments; andgenerating the object data using the recovered segment of the object data and the retrieved segment of the object data.3. The method of wherein recovering the segment of the object data using the retrieved small data and coded fragments comprises performing erasure decoding on each slice using the at least k small data and coded fragments within the slice.4. The method of wherein claim 1 , for each slice claim 1 , retrieving the at least k small data and coded fragments within the slice from storage comprises retrieving at least k ...

METHOD OF RECOVERING DATA AND MEMORY SYSTEM AND RAID STORAGE SYSTEM USING THE SAME

A method and system of recovering data includes reading reference codewords, which have code correlation with a target codeword, from a memory device when an error-correcting code (ECC) decoding process for a decoder input of the target codeword has failed. A decoder input of a corrected target codeword is generated based on an operation process using the target codeword and the reference codewords. An ECC decoding process is performed again on the decoder input of the corrected target codeword. 1. A method of recovering data , the method comprising:reading reference codewords, which have a code correlation with a target codeword, from a memory device when an error-correcting code (ECC) decoding process for a decoder input of the target codeword has failed;generating a decoder input of a corrected target codeword, based on an operation process using the target codeword and the reference codewords; andperforming the ECC decoding process again on the decoder input of the corrected target codeword.2. The method of claim 1 , wherein the reference codewords comprise codewords read from a storage region which forms the same stripe as the target codeword.3. The method of claim 1 , wherein the generating of the decoder input of the corrected target codeword comprises:performing the ECC decoding process on each of the reference codewords; andcorrecting the decoder input of the target codeword, based on the operation process according to the code correlation, by using a decoding result of a reference codeword that has succeeded in the ECC decoding process, a soft input of a reference codeword that has failed in the ECC decoding process, and a soft input of the target codeword that has failed in the ECC decoding process.4. The method of claim 3 , further comprising correcting the decoder input of the target codeword when the ECC decoding process for at least one of the reference codewords has failed claim 3 , and recovering the target codeword by using decoding results of the ...

METHOD OF CORRECTING ERRORS IN A MEMORY ARRAY AND A SYSTEM FOR IMPLEMENTING THE SAME

A method of correcting errors in a memory array. The method includes configuring a first memory array with a first error correction code (ECC) to provide error correction of data stored in the first memory array, configuring a second memory array with a second ECC to provide error correction of the data stored in the first memory array, performing a reflow process on the first and second memory array, and correcting data stored in the first memory array based on at least the first ECC or the second ECC. The first memory array includes a first set of memory cells arranged in rows and columns. The second memory array includes a second set of memory cells arranged in rows and columns. 1. A method of correcting errors in a memory array , the method comprising:configuring a first memory array with a first error correction code (ECC) to provide error correction of data stored in the first memory array, the first memory array including a first set of memory cells arranged in rows and columns, a row of memory cells in the first set of memory cells includes a first set of memory words, each word of the first set of memory words includes a first set of bits;configuring a second memory array with a second ECC to provide error correction of the data stored in the first memory array, the second memory array including a second set of memory cells arranged in rows and columns, a row of memory cells in the second set of memory cells includes a second set of memory words, each word of the second set of memory words includes a second set of bits;performing a reflow process on the first memory array and the second memory array; andcorrecting data stored in the first memory array based on at least the first ECC or the second ECC.2. The method of claim 1 , whereinthe first memory array is a first portion of the memory array; andthe second memory array is a second portion of the memory array.3. The method of claim 1 , whereinthe first ECC is an N-bit ECC, where N is a positive integer ...

SYSTEM AND METHOD FOR PERFORMING SIMULTANEOUS READ AND WRITE OPERATIONS IN A MEMORY

A network device includes: a set of content memory banks including a first memory bank; a parity memory bank; a first memory interface; and a second memory interface. The first memory interface is configured to perform a write operation to write new content data to a location in a first content memory bank in a plurality of partial write operations that are spread over two or more clock cycles, including: generating new parity information for the new content data using old content data at the location in the first content memory bank, and storing the new parity information to the parity memory bank. The second memory interface is configured to perform a read operation at the location in the first content memory bank concurrently while the first memory interface is performing at least one of the plurality of partial write operations. 1. A network device , comprising:a set of content memory banks configured to store content data, the set of content memory banks including a first memory bank;a parity memory bank corresponding to the set of content memory banks configured to store parity information; perform a write operation to write new content data to a location in a first content memory bank in a plurality of partial write operations that are spread over two or more clock cycles, the plurality of partial write operations including:', 'reading old content data from the location in the first content memory bank during a first clock cycle,', 'generating new parity information for the new content data using the old content data, and', 'storing the new parity information to the parity memory bank in a second clock cycle after the first clock cycle; and, 'a first memory interface configured toa second memory interface configured to perform a read operation, independently of reading old content data of the plurality of partial write operations, at the location in the first content memory bank concurrently while the first memory interface is performing at least one of the ...

Adaptive rebuilding rates based on sampling and inference

A method for execution by one or more processing modules of a dispersed storage network (DSN), the method begins by monitoring an encoded data slice access rate to produce an encoded data slice access rate for an associated rebuilding rate of a set of rebuilding rates. The method continues by applying a learning function to the encoded data slice access rate based on a previous encoded data slice access rate associated with the rebuilding rate to produce an updated previous encoded data slice access rate of a set of previous encoded data slice access rates. The method continues by updating a score value associated with the updated previous encoded data slice access rate and the rebuilding rate and selecting a slice access scheme based on the updated score value where a rebuild rate selection will maximize a score value associated with an expected slice access rate.

MEMORY DEVICE SYSTEM

A memory device system includes: a first memory that has m lines of addresses and in which different pieces of data are respectively stored at the m lines of addresses, and a parity bit; a second memory that has m lines of addresses and in which same pieces of data as the pieces of data stored in the first memory are stored in an initial state; a first register that is connected with the first memory; a second register that is connected with the second memory; a comparator; a transfer register that stores the piece of data of the first memory; an error data register that stores the piece of data of the second register; an error address register that stores an address of the second memory; a parity calculation portion that calculates parity of all pieces of data; and a controller that performs a predetermined control. 1. A memory device system comprising:a first memory that has m lines (m is an integer not smaller than 2) of addresses and in which different pieces of data are respectively stored at the m lines of addresses, and a parity bit detecting an error of data is stored;a second memory that has m lines (m is an integer not smaller than 2) of addresses and in which same pieces of data as the pieces of data stored in the first memory are stored in an initial state;a first register that is connected with the first memory and stores only one piece of data divided into m pieces and stored in the first memory, in an order of the addresses in the first memory;a second register that is connected with the second memory and stores one piece of data divided into m pieces and stored in the second memory, the one piece of data having an address same as the address of the data of the first memory stored in the first register;a comparator that compares the piece of data stored in the first memory with the piece of data stored in the second memory;a transfer register that stores the piece of data of the first memory compared by the comparator;an error data register that ...