METHODS OF FORMING STRAINED-SEMICONDUCTOR-ON-INSULATOR DEVICE STRUCTURES

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

Etching method

An object of this invention is to suppress the amount of etchant used. A liquid etchant is stored in an etchant vessel, and vaporized by a vaporization unit. A fragile layer such as a porous layer is selectively etched with the vaporized etchant.

Multifunctional metallic bonding

Methods are provided for producing a transfer layer of a semiconductor material on a final substrate. In some embodiments, the transfer layer is produced on the final substrate by forming a layer of semiconductor material on an initial support, assembling that layer and a final substrate by metal bonding, and mechanically separating the initial support from the layer at a weak interface that initially attached the layer to the initial support. An intermediate substrate can be obtained which can be used to fabricate a variety of components such as light-emitting diodes or laser diodes. These techniques can produce a transfer layer on a final substrate and a recyclable initial support that can be detached from the transfer layer for recycling by dint of non-destructive mechanical release.

SOI annealing method and SOI manufacturing method

The HF defect density in an SOI is reduced. After annealing step (S2) of annealing an SOI at a temperature between the melting point (e.g., 993° C.) of a semiconductor metal compound (e.g., nickel silicide) formed from a metal and the semiconductor material of the crystal semiconductor of the SOI (inclusive) and the melting point of the semiconductor material (inclusive), the temperature is reduced such that the cooling rate within the temperature range from the melting point of the semiconductor metal compound and the production temperature (e.g., 775° C.) of the semiconductor metal compound becomes 0.12° C./sec or more.

Process for producing semiconductor substrate by heat treating

A process for producing a semiconductor substrate comprises heat-treating a substrate having a monocrystal thereon in a reducing atmosphere.

Substrate processing method and manufacturing method, and anodizing apparatus

A porous layer is formed on an Si substrate using an anodizing apparatus having a conductive partition inserted between a cathode and an anode. First, the cathode and Si substrate are brought into electrical contact through a first electrolyte, and the conductive partition and Si substrate are brought into electrical contact through a second electrolyte. A current is flowed between the cathode and the anode to form a porous layer on the Si substrate. As the first electrolyte, an electrolyte capable of forming a porous structure on the Si substrate is used. As the second electrolyte, an electrolyte substantially incapable of forming a porous structure on the conductive partition is used.

Semiconductor structure and methods for fabricating same

A semiconductor structure and methods for fabricating are disclosed. In an implementation, a method of fabricating a semiconductor structure includes forming a first semiconductor material substrate with a first dielectric area having a first thickness and a second dielectric area having a second thickness, bonding the first substrate to a second semiconductor substrate, and thinning at least one of the first and second substrates. The invention also pertains to a semiconductor structure. The structure includes a semiconductor substrate having a surface layer of semiconductor material, a first dielectric layer of a first dielectric material buried under the surface layer, and a second dielectric layer buried under the surface layer. In an embodiment, the thickness of the first dielectric layer is different than the thickness of the second dielectric layer.

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE

There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained. 1. (canceled)2. A semiconductor device comprising:an island-like single crystalline semiconductor layer over a silicon substrate with a bonded interface interposed between the island-like single crystalline semiconductor layer and the silicon substrate, the island-like single crystalline semiconductor layer comprising part of a single crystalline silicon substrate different from the silicon substrate and having at least a channel formation region and source and drain regions;an insulating film formed on the island-like single crystalline semiconductor layer;a gate electrode formed over the channel formation region with the insulating film interposed therebetween;side walls formed adjacent to side surfaces of the gate electrode; andan interlayer insulating film comprising silicon nitride formed over the gate electrode and the side walls, wherein a top face of the island-like single crystalline semiconductor layer under the gate electrode is thermally oxidized to form the insulating film,wherein a bottom face of the island-like single crystalline semiconductor layer is thermally oxidized to form a silicon oxide layer in contact with the bottom face,wherein each of the source and drain regions includes at least a portion that extends through an entire thickness of the island-like single crystalline semiconductor layer such that the source and drain regions contact the silicon oxide layer, ...

Method for releasing a thin semiconductor substrate from a reusable template

The present disclosure relates to methods and apparatuses template. The method involves forming a mechanically weak layer conformally on a semiconductor template. Then forming a thin for releasing a thin semiconductor substrate from a reusable semiconductor substrate conformally on the mechanically weak layer. The thin semiconductor substrate, the mechanically weak layer and the template forming a wafer. Then defining the border of the thin-film semiconductor substrate to be released by exposing the peripheral of the mechanically weak layer. Then releasing the thin-film semiconductor substrate by applying a controlled air flow parallel to said mechanically weak layer wherein the controlled air flow separates the thin semiconductor substrate and template according to lifting forces.

Combined wafer production method with laser treatment and temperature-induced stresses

A method for the production of layers of solid material is contemplated. The method may include the steps of providing a solid body for the separation of at least one layer of solid material, generating defects by means of at least one radiation source, in particular a laser, in the inner structure of the solid body in order to determine a detachment plane along which the layer of solid material is separated from the solid body, and applying heat to a polymer layer disposed on the solid body in order to generate, in particular mechanically, stresses in the solid body, due to the stresses a crack propagating in the solid body along the detachment plane, which crack separates the layer of solid material from the solid body.

Systems and methods for laser splitting and device layer transfer

Methods and systems are provided for the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, micro-electro-mechanical system (MEMS), or optoelectronic devices, from a thicker donor wafer using laser irradiation.

Method for making thin film devices intended for solar cells or SOI applications

The present invention is related to a method for manufacturing a semiconductor device, the method comprising the following subsequent steps: (a) formation of a porous semiconductor layer (1,2) in the form of a thin film (10) on an original substrate (3), the formation being immediately followed by the step of (b) separation of the thin film by a lift-off process from the original substrate (3); (c) the transfer of the thin film to a dummy support (4), the thin film not being attached to the dummy support; (d) fabrication of a device (11) on top of the thin film (10); (e) transfer and attachment of said device on said thin film (12=10+11) on a foreign substrate (8).

RECYCLING OF A WAFER COMPRISING A MULTI-LAYER STRUCTURE AFTER TAKING-OFF A THIN LAYER

Method of recycling a donor wafer (10) after having taken off a useful layer comprising a material chosen from semiconductor materials, the donor wafer (10) comprising successively a substrate (1) and a multi-layer structure (I), the multi-layer structure (I), before taking-off, comprising the useful layer to take off, the process comprising removal of substance on the side where the taking-off took place, characterized in that, after the removal of substance, at least a part of the multi-layer structure (I') remains, this at least part of the buffer structure (I') including at least one other useful layer that can be taken off, without a supplementary step of reforming a useful layer. This document also relates to: methods of taking-off a thin layer from at least one recyclable donor wafer (10) according to the invention, recyclable donor wafers (10) according to the invention.

A method of producing a semiconductor layer on a substrate

A method of producing a semiconductor layer onto a semiconductor substrate, comprising the steps of : Providing a first semiconductor substrate (1), Providing a second semiconductor substrate (5), Producing a porous layer (2,3) on top of said first semiconductor substrate (1), said layer having a porosity profile, Producing a porous layer (6,7,8) on top of said second semiconductor substrate (5), said layer having a porosity profile, Bringing said porous layer of said second substrate (5) into contact with said porous layer of said first substrate (1), so as to form a bond between said two substrates, Performing a thermal annealing step, and Lifting off of said second substrate, leaving a layer of said second substrate's semiconductor material attached to said first substrate.

STRAINED SOI STRUCTURE AND METHOD OF MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To provide a strained SOI structure having a small parasitic capacitance and high carrier mobility, and a method of manufacturing the same. SOLUTION: The strained SOI structure comprises an insulating substrate 10, a protective layer 12 formed on all surfaces of the insulating substrate and composed of AlN, a bonding layer 14 formed on the protective layer 12 and composed of SiO2 or polycrystalline silicon, an SiO2 layer 28 formed on the bonding layer 14, and a strained silicon layer formed on the SiO2 layer 28. COPYRIGHT: (C)2006,JPO&NCIPI ...

CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same

PROCEDURE FOR THE DISTANCE OF A POROUS SEMICONDUCTOR REGION AND PROCEDURE FOR THE PRODUCTION OF A SEMICONDUCTING SUBSTRATE

RECYCLING OF A DISK, WHICH CONTAINS A BUFFER LAYER, AFTER THE DISTANCE OF A THIN LAYER FROM THERE

PROCEDURE FOR THE TRANSMISSION OF A SEMICONDUCTOR LAYER OF MEANS SILICON UP INSULATOR (SOI) TECHNOLOGY

DEVICE FOR THE ANODIC OXIDATION AND PROCEEDING AND POROUS SUBSTRATE

Thin film forming process

PROCESS FOR PRODUCING SEMICONDUCTOR ARTICLE

A novel process for producing a semiconductor article is disclosed which comprises steps of preparing a first substrate constituted of a silicon substrate, a nonporous semiconductor layer formed on the silicon substrate, and an ion implantation layer formed in at least one of the silicon substrate and the nonporous semiconductor layer; bonding the first substrate to a second substrate to obtain a multiple layer structure with the nonporous semiconductor layer placed inside; separating the multiple layer structure at the ion implantation layer; and removing the ion implantation layer remaining on the separated second substrate.

Method for manufacturing semiconductor device

POROUS SEMICONDUCTOR LAYER TRANSFER FOR AN INTEGRATED CIRCUIT STRUCTURE

太阳能电池组件和其生产方法

... 提供一种高品质的薄膜单晶太阳能电池组件，亦即耐久性和挠性优良的薄膜单晶太阳能电池组件和其生产方法。该薄膜单晶从衬底上的剥离是按照使根据薄膜单晶最容易劈裂的那些平面比如{111}的表象形成在薄膜单晶的表面的所有直线的方向，均不同于已剥离单晶前方线的方向的方式进行的。该薄膜单晶可用来生产太阳能电池和图象显示部件的驱动电路器件。具有挠性且包含有以薄膜单晶作为其至少一部分的光电元件的太阳能电池组件，是按照使组件固有的容易弯曲的方向不同于薄膜单晶最容易劈裂的方向的方式制造的。 ...

Semiconductor substrate and its mfg. method

公开了一种具有非多孔单晶层的多孔硅层的晶体缺陷减少的半导体基片,及形成该基片的方法。该形成方法包括下列步骤:在不包含非多孔单晶层的源气体的气氛中对多孔硅层进行热处理,以及在多孔硅层上生长非多孔单晶层,其中的热处理步骤在一定条件下进行,使得蚀去的硅厚度为2纳米或更小,且由(热处理后的表面孔密度)/(热处理前的表面孔密度)定义的多孔硅层的表面孔密度的变化率r满足关系式(1/10000)≤r≤1。

含硅锗层的互补金属氧化物半导体器件和基片及形成方法

CMOS集成电路器件包括电绝缘层和在电绝缘层上的未形变的硅有源层。并在未形变的硅有源层表面上设置绝缘栅电极。在电绝缘层和未形变的硅有源层之间还设置Si#-[1-x]Ge#-[x]层。Si#-[1-x]Ge#-[x]层与未形变的硅有源层形成第一结，并具有沿从峰值朝未形变的硅有源层的表面延伸的第一方向单调地降低的渐变Ge浓度。 ...

半导体产品的制造方法

... 提供一种生产半导体产品的工艺，包括下列步骤，把膜粘接到具有多孔半导体层的衬底上，通过在剥离方向对膜施加力，在多孔半导体层从衬底上剥离该膜。 ...

MULTIFUNCTION METAL SEALING

MANUFACTORING PROCESS Of a DISMOUNTABLE SUBSTRATE

TRANSISTOR MANUFACTURES STARTING FROM A PLATE

RECYCLING Of a PLATE INCLUDING/UNDERSTANDING a PLUG LAYER, AFTER THERE HAVING TAKES a THIN LAYER

RELIEVING HAS HIGH TEMPERATURE Of a THIN LAYER AFTER TRANSFER

L'invention concerne un procédé de formation sur un substrat d'une couche relaxée ou pseudo-relaxée, la couche relaxée étant en un matériau choisi parmi les matériaux semiconducteurs, caractérisé en ce qu'il comprend les étapes suivantes :(a) faire croître sur un substrat donneur (1) une couche contrainte (2) (2) élastiquement constituée du matériau choisi parmi les matériaux semiconducteurs ;(b) former sur la couche contrainte (2) ou sur un substrat récepteur (7), une couche vitreuse (4) constituée d'un matériau visqueux à partir d'une température de viscosité supérieure à environ 900°C ;(c) coller le substrat récepteur (7) à la couche contrainte (2) par l'intermédiaire de la couche vitreuse (4) formée à l'étape (b) ;(d) enlever le substrat donneur (1), pour former une structure (20) comprenant le substrat récepteur, la couche vitreuse (4) et la couche contrainte (2) ;(e) traiter thermiquement la structure à une température voisine ou supérieure à la température de viscosité. The invention relates to a method of forming on a substrate a relaxed or pseudo-relaxed layer, the relaxed layer being made of a material selected from semiconductor materials, characterized in that it comprises the following steps: (a) growing on a donor substrate (1) an elastically strained layer (2) (2) consisting of the material chosen from among semiconductor materials; (b) forming on the strained layer (2) or on a receiving substrate (7), a vitreous layer ( 4) made of a viscous material from a viscosity temperature greater than about 900 ° C; (c) bonding the receiving substrate (7) to the strained layer (2) through the vitreous layer (4) ) formed in step (b); (d) removing the donor substrate (1), to form a structure (20) comprising the receiving substrate, the vitreous layer (4) and the strained layer (2); (e) heat treating the structure at a temperature close to or above the viscosity temperature.

METHOD FOR REALIZATION OF STRUCTURE HETEROGENEOUS AND STRUCTURE OBTAINED BY PROCEEDED SO-AND-SO

Method for transfer of silicon layer towards substrate support to form silicon on insulator wafer of backside illumination image forming device, involves making doped layer and layer of p-type silicon substrate to be porous

L'invention concerne un procédé de transfert de couche comprenant : doper une région superficielle d'un substrat de silicium de type p pour former une couche dopée ; rendre poreuse la couche dopée et une couche du substrat de type p sous-jacente à la couche dopée ; former, par croissance épitaxiale, une couche de silicium monocristallin sur la couche poreuse dopée ; et fixer un substrat support à la couche de silicium monocristallin et séparer la couche de silicium monocristallin du substrat de silicium au sein des couches rendues poreuses.

PROCEEDED Of DEVELOPMENT OF MIXED STRUCTURES EMPILEES, HAS ZONES ISOLANTESDIVERSES AND/OR LOCALISED ZONES OF VERTICAL ELECTRIC CONDUCTION.

L'invention concerne un procédé de réalisation d'une structure semi-conductrice, sur un substrat semi-conducteur dont une surface présente une topologie, ce procédé comportant : a) - une étape de formation d'une première couche (24) en un premier matériau isolant sur ladite surface, b) - une étape de formation d'une deuxième couche en un deuxième matériau isolant (28), moins dense que le premier matériau isolant, d'épaisseur comprise entre 2,5p et 3,5p, c) - une étape de planarisation de l'ensemble.

METHOD OF SEPARATING COMPOSITE MEMBER AND PROCESS FOR PRODUCING THIN FILM

Method of a releasing target layer using a two-dimensional exfoliation layer

본 발명은 2차원 박리층을 이용하여 화학적 경화에 의해 형성된 대상층을 기판에서 박리하는 방법에 관한 것으로, 본 발명의 방법은 기판 위에 2차원 소재를 합성하여 박리층을 형성하는 단계(S1); 상기 S1 단계에서 형성된 박리층에 대상물질을 코팅한 후, 화학적 경화를 통해 대상층을 형성하는 단계(S2); 및 상기 S2 단계에서 대상층이 형성된 박리층을 분리하는 단계(S3)를 포함하는 것으로, 상기 방법을 이용할 경우 대상물질의 특성 변화를 주지 않고 용이하게 박리가 가능한 장점이 있다. The present invention relates to a method of peeling a target layer formed by chemical curing from a substrate using a two-dimensional release layer, the method of the present invention comprises the steps of forming a release layer by synthesizing a two-dimensional material on the substrate (S1); After coating the target material on the release layer formed in step S1, forming a target layer through chemical curing (S2); And separating the release layer in which the target layer is formed in the step S2 (S3), and when using the method, there is an advantage in that the separation can be easily performed without changing the properties of the target material.

MICROTECHNOLOGY PROVEN FOR TRANSFERRING AT LEAST ONE LAYER

A microtechnology proven for transferring at least one layer comprising steps in which: a first substrate 20 is prepared comprising a porous layer 11 buried under a useful surface at a non-zero distance; a weakened region 13 is formed by ion implantation between this porous layer and this useful surface; the first substrate is bonded to a supporting substrate 30; a mechanical stress is applied to cause separation at the porous layer so as to obtain, on the one hand, a remnant of the first substrate and, on the other hand, a separated layer rigidly connected to the supporting substrate and comprising a bared surface; processing steps are carried out on the bared surface of the separated layer; the separated layer is bonded, by way of the surface to which the processing steps were applied, to a second supporting substrate ; and a heat treatment is applied to cause separation at the weakened region so as to obtain, on the one hand, a remnant of the separated layer which is rigidly connected ...

PRODUCTION OF A STRUCTURE COMPRISING A PROTECTIVE LAYER AGAINST CHEMICAL TREATMENT

The invention relates to a method for producing a multi-layer structure which comprises a buried layer and is used for electronic, optic and optoelectronic engineering consisting in a) forming the layers of the structure including the buried layer, and in b) chemically treating said structure using chemical species for substantially engraving the buried layer material. The stage a) consists in forming, a buried protective layer which is arranged on the buried layer and made of a material selected such that it is sufficiently resistant to the chemical attack of the treating chemical species used at the stage b), thereby blocking possible access of said chemical species to the buried layer therethrough. The use of said method for producing structure for electronic, optic and optoelectronic engineering is also disclosed.

Member separating apparatus and processing apparatus

This invention is to prevent a substrate from dropping when it is transferred/received to/from a separating apparatus. The support surfaces of substrate holding portions (22, 23) are made horizontal, and a substrate (21) to be separated is mounted on one substrate holding portion (22) in a horizontal state (2A). The substrate holding portions (22, 23) are pivoted about rotary shafts (26, 27), respectively, to make the support surfaces of the substrate holding portions (22, 23) vertical so that the substrate (21) is sandwiched by the substrate holding portions (22, 23) (2B) The substrate holding portions (22, 23) are rotated about rotary shafts (24, 25), respectively, and simultaneously, high-pressure, high-speed water is ejected from an ejection nozzle (28) to separate the substrate (21) into two substrates (21a, 21c). The substrate holding portions (22, 23) are pivoted about the rotary shafts (26, 27), respectively, to make the support surfaces horizontal (2C). With this arrangement, the ...

Compliant substrate for a heteroepitaxial structure and method for making same

The present invention relates to a compliant substrate having a top surface for receiving a heteroepitaxial structure or heteroepitaxial layer. This substrate comprises a carrier substrate, a top single-crystalline layer, a buried layer located between the carrier substrate and the top layer, and a weakened region located in the top layer or between the top layer and the buried layer such that the compliant substrate facilitates relaxed growth of a heteroepitaxial layer or structure upon the top surface. The invention also relates to the combination of the compliant substrate and a heteroepitaxial layer provided thereon, as well as to a method of making the compliant substrate and combination.

Strained germanium-on-insulator device structures

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

Strained-semiconductor-on-insulator device structures with elevated source/drain regions

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

Fabrication process of semiconductor substrate

SOI substrates are fabricated with sufficient quality and with good reproducibility. At the same time, conservation of resources and reduction of cost are realized by reuse of the wafer and the like.Carried out to achieve the above are a step of bonding a principal surface of a first substrate to a principal surface of a second substrate, the first substrate being a Si substrate in which at least one layer of non-porous thin film is formed through a porous Si layer, a step of exposing the porous Si layer in a side surface of a bonding substrate comprised of the first substrate and the second substrate, a step of dividing the porous Si layer by oxidizing the bonding substrate, and a step of removing the porous Si and oxidized porous Si layer on the second substrate separated by the division of the porous Si layer.

Method for making thin film devices intended for solar cells or silicon-on-insulator (SOI) applications

In one inventive aspect, a thin film device is manufactured by (a) forming a porous semiconductor layer in the form of a thin film on an original substrate, the formation being immediately followed by (b) separation of the thin film by a lift-off process from the original substrate; (c) transfer of the thin film to a dummy support, the thin film not being attached to the dummy support; (d) fabrication of a device on top of the thin film; and (e) transfer and attachment of said device on said thin film on a foreign substrate.

Method for manufacturing composite piezoelectric substrate and piezoelectric device

A piezoelectric device is manufactured in which the material of a supporting substrate can be selected from various alternative materials. Ions are implanted into a piezoelectric substrate to form an ion-implanted portion. A temporary supporting substrate is formed on the ion-implanted surface of the piezoelectric substrate. The temporary supporting substrate includes a layer to be etched and a temporary substrate. The piezoelectric substrate is then heated to be divided at the ion-implanted portion to form a piezoelectric thin film. A supporting substrate is then formed on the piezoelectric thin film. The supporting substrate includes a dielectric film and a base substrate. The temporary supporting substrate is made of a material that produces a thermal stress at the interface between the temporary supporting substrate and the piezoelectric thin film less than the thermal stress at the interface between the supporting substrate and the piezoelectric thin film.

RECYCLING A WAFER COMPRISING A BUFFER LAYER, AFTER HAVING TAKEN OFF A THIN LAYER THEREFROM

Method of recycling a donor wafer (10) after taking off at least one useful layer, the donor wafer (10) comprising successively a substrate (1), a buffer structure (1) and, before taking-off, a useful layer. The method comprises removal of substance relating to part of the donor wafer (10) on the side where the taking-off took place, such that, after removal of substance, there remains at least part of the buffer structure (1) capable of being reused as at least part of a buffer structure (1) during a subsequent taking-off of a useful layer. The present document also relates to: - a method of producing a donor wafer (10) which can be recycled according to the invention; - methods of taking a thin layer off a donor wafer (10) which can be recycled according to the invention; - donor wafers (10) which can be recycled according to the invention.

Method and apparatus for processing composite member

A bonded substrate stack formed by bonding first and second substrates is appropriately separated at a porous layer. The first and second substrates are brought into tight contact with each other while shifting their central positions. The bonded substrate stack (30) has a projecting portion at which the peripheral edge of the first substrate projects outside that of the second. The projecting portion is positioned to a reference position by a positioning apparatus (1000). After that, the bonded substrate stack (30) is transferred to a separating apparatus, and separation starts from the projecting portion. Positioning is done by detecting the shift amount between the peripheral edge of the first substrate and that of the second substrate throughout the perimeter of the bonded substrate stack (30), determining the position of the projecting portion on the basis of the shift amount, and rotating a substrate rotating table (1010) to make the projecting portion match the reference position ...

SUBSTRATE PROCESSING METHOD AND APPARATUS THEREOF, AND SOI SUBSTRATE

PROBLEM TO BE SOLVED: To provide a substrate processing method which includes a step of suitably being able to each and remove a porous silicon layer. SOLUTION: A method includes an anodizing step (a) for forming a porous silicon layer 52 on a major surface of a single crystalline silicon substrate 51, a step (b) for growing a single crystalline silicon film (non-porous layer) 53 on the porous silicon layer 52, a removal step (e) of bonding a first substrate (preferably made up of the non-porous layer 53 and an SiO2 layer 54 formed thereon) obtained by oxidizing a surface of the silicon film 53 to a second substrate 55 as a carrier substrate and removing a single crystalline part from a rear side of the first substrate to expose the porous silicon layer 52, and an etching step (f) of etching the exposed porous silicon layer 52 for removing the porous silicon layer 52 from the film 53. In washing after the anodizing step, an air exposure time after the immersion of the first substrate in ...

Recycling wafers with multilayer structure after thin layer removal

Verfahren zur Herstellung eines Halbleitersubstrats

Verfahren zum Ablösen einer Schicht

Die vorliegende Erfindung betrifft ein Verfahren zum Ablösen einer abzulösenden Schicht (12) von einem Spender-Substrat (11), das die folgenden Schritte umfasst: a) Montieren des Spender-Substrats (11) und eines porösen Substrats (13); b) Anwenden einer Behandlung (E) mit einer chemischen Modifikation der Kristallite, wobei die chemische Modifikation ausgebildet ist, um eine Variation des Volumens der Kristallite zu erzeugen, wobei die Volumenvariation eine Druck- oder Zugverformung des porösen Substrats (13) veranlasst, wobei die Druck- oder Zugverformung eine Zug- oder Druckspannung in dem Spender-Substrat (11) erzeugt, die einen Bruch in einer Bruchebene (14) verursacht, wobei die Bruchebene (14) die abzulösende Schicht (12) begrenzt und wobei die mechanische Spannung zu einer Ablösung der abzulösenden Schicht (12) von dem Spender-Substrat (11) führt.

CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same

CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of making same

CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-xGex layer is also disposed between the electrically insulating layer and the unstrained silicon active layer. The Si1-xGex layer forms a first junction with the unstrained silicon active layer and has a graded concentration of Ge therein that decreases monotonically in a first direction extending from a peak level towards the surface of the unstrained silicon active layer. The peak Ge concentration level is greater than x=0.15 and the concentration of Ge in the Si1-xGex layer varies from the peak level to a level Less than about x=0.1 at the first junction. The concentration of Ge at the first junction may be abrupt. More preferably, the concentration of Ge in the Si1-xGex layer varies from the peak level where 0.2 Подробнее

PROCEDURE FOR THE PRODUCTION OF A SEMICONDUCTOR ARTICLE

LAYER TRANSMISSION METHOD

SEMICONDUCTING STRUCTURE ON A SUBSTRATE WITH STRONG ROUGHNESS

PROCEDURE FOR THE TRANSFER OF A LAYER STRAINED ONE OF SEMICONDUCTOR MATERIAL

Method for manufacturing semiconductor article

THIN FILM FORMING PROCESS

A process for producing an SOI substrate is disclosed which is useful for saving resources and lowering production cost. Further, a process for producing a photoelectric conversion device such as a solar cell is disclosed which can successfully separate a substrate by a porous Si layer, does not require a strong adhesion between a substrate and a jig, and can save resources and lower production cost. In a substrate having a porous layer on a nonporous layer and further having on the porous layer a layer small in porosity, the nonporous layer and the layer small in porosity are separated by the porous layer to form a thin film. A metal wire is wound around a side surface of the substrate, and a current is made to flow into the metal wire to generate a heat from the metal wire and transfer the heat preferentially to the porous layer, thus conducting the separation. The separated substrate is used for producing an SOI substrate and the separated nonporous Si layer is reutilized in a process ...

THIN FILM FORMING PROCESS

A process for producing an SOI substrate is disclosed which is useful for saving resources and lowering production cost. Further, a process for producing a photoelectric conversion device such as a solar cell is disclosed which can successfully separate a substrate by a porous Si layer, does not require a strong adhesion between a substrate and a jig, and can save resources and lower production cost. In a substrate having a porous layer on a nonporous layer and further having on the porous layer a layer small in porosity, the nonporous layer and the layer small in porosity are separated by the porous layer to form a thin film. A metal wire is wound around a side surface of the substrate, and a current is made to flow into the metal wire to generate a heat from the metal wire and transfer the heat preferentially to the porous layer, thus conducting the separation. The separated substrate is used for producing an SOI substrate and the separated nonporous Si layer is reutilized in a process ...

PROCESS FOR PRODUCING SEMICONDUCTOR ARTICLE

A novel process for producing a semiconductor article is disclosed which comprises steps of preparing a first substrate constituted of a silicon substrate, a nonporous semiconductor layer formed on the silicon substrate, and an ion implantation layer formed in at least one of the silicon substrate and the nonporous semiconductor layer; bonding the first substrate to a second substrate to obtain a multiple layer structure with the nonporous semiconductor layer placed inside; separating the multiple layer structure at the ion implantation layer; and removing the ion implantation layer remaining on the separated second substrate.

PROCESS FOR PRODUCING SEMICONDUCTOR ARTICLE

A process for producing a semiconductor article is provided which comprises the steps of bonding a film onto a substrate having a porous semiconductor layer, and separating the film from the substrate at the porous semiconductor layer by applying a force to the film in a peeling direction.

METHOD OF MANUFACTURING SEMICONDUCTOR ARTICLE

A method of manufacturing a semiconductor article comprises steps of preparing a first substrate including a silicon substrate having a porous silicon layer and a nonporous semiconductor layer arranged on the porous silicon layer, bonding the first substrate and a second substrate to produce a multilayer structure with the nonporous semiconductor layer located inside, separating the first and second substrates of the multilayer structure from each other along the porous silicon layer by heating the multilayer structure and removing the porous silicon layer remaining on the separated second substrate.

LAYER TRANSFER METHOD

DETACHABLE STRUCTURE AND BOOM SYSTEM USING THE SAME

TRANSFER Of a THIN LAYER STARTING FROM a PLATE INCLUDING/UNDERSTANDING a COUCHETAMPON

PROCESS OF TRANSFER OF LAYER

MANUFACTORING PROCESS Of a SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR SUBSTRATE

L'invention concerne un procédé de fabrication d'un dispositif semi-conducteur , caractérisé en ce qu'il comprend : - une première étape (E1) consistant à former un substrat (1) support semi-conducteur comprenant o une première couche (2) poreuse constituée d'un matériau semi-conducteur, et o une deuxième couche (9) poreuse constituée d'un matériau semi-conducteur, présentant une porosité inférieure à la porosité de la première couche (2), - une deuxième étape (E2) consistant à fournir un substrat (4) donneur semi-conducteur, comprenant une couche utile (6) constituée d'un matériau semi-conducteur, et - une troisième étape (E3) consistant à o coller le substrat (1) support et le substrat (4) donneur, o transférer au moins une partie de la couche utile (6) du substrat (4) donneur vers le substrat (1) support, pour former un dispositif (15) semi-conducteur.

Multi-layer structure production of semiconductor materials with different mesh parameters comprises epitaxy of thin film on support substrate and adhesion on target substrate

La présente invention concerne un procédé de fabrication d'une structure multicouche en matériaux semiconducteurs, ladite structure comportant un substrat (20) en un premier matériau semiconducteur et une couche mince superficielle en un deuxième matériau semiconducteur, les deux matériaux semiconducteurs présentant des paramètres de maille sensiblement différents, caractérisé en ce que le procédé comprend les étapes suivantes : • réalisation d'une couche (110) comprenant ladite couche mince superficielle sur un substrat support (100), • création d'une zone de fragilisation dans l'ensemble (10) formé par ledit substrat support et ladite couche déposée, • collage dudit ensemble avec un substrat cible (20), • détachement au niveau de cette zone de fragilisation, • traitement de surface de la structure ainsi obtenue.

PROCEEDED OF TREATMENT OF DISMOUNTABLE SUBSTRATES, AND SUBSTRATE INTERMEDIAIREDEMONTABLE, WITH POLISHING IMPROVES

FORMATION Of a USEFUL LAYER RELAXEE STARTING FROM a PLATE WITHOUT COUCHETAMPON

Method for releasing a thin semiconductor substrate from a reusable template

The present disclosure relates to methods and apparatuses for releasing a thin semiconductor substrate from a reusable template. The method involves forming a mechanically weak layer conformally on a semiconductor template. Then forming a thin semiconductor substrate conformally on the mechanically weak layer. The thin semiconductor substrate, the mechanically weak layer and the template forming a wafer. Then defining the border of the thin-film semiconductor substrate to be released by exposing the peripheral of the mechanically weak layer. Then releasing the thin-film semiconductor substrate by applying a controlled air flow parallel to said mechanically weak layer wherein the controlled air flow separates the thin semiconductor substrate and template according to lifting forces.

METHOD FOR PRODUCING GALLIUM NITRIDE SUBSTRATES FOR ELECTRONIC AND OPTOELECTRONIC DEVICES

A method for separating a III-nitride layer from a substrate. This is done by fabricating a detachment porous region between the III-nitride layer and the substrate through etching. The porous region allows for easy detachment of the III-nitride layer from the substrate. Active layers for electronic and optoelectronic devices can then be grown on the III-nitride layer. 1. A method for separating at least one III-nitride layer from a substrate , comprising:fabricating a porous region between the III-nitride layer and the substrate through etching; andseparating the III-nitride layer from the substrate at the porous region.2. The method of claim 1 , wherein the substrate is a binary claim 1 , ternary claim 1 , or quaternary compound of the III-nitrides materials family.3. The method of claim 1 , wherein one or more active layers are grown on the III-nitride layer.4. The method of claim 1 , wherein the III-nitride layer is a single layer or is comprised of a plurality of sublayers.5. The method of claim 1 , wherein the fabricating step is performed by chemically etching the porous region in a vapor or liquid phase.6. The method of claim 1 , wherein the fabricating step is performed by electrochemically etching the porous region in a liquid phase.7. The method of claim 6 , wherein the chemically etching step is performed by photo-assisted electrochemically etching the porous region in a liquid phase.8. The method of claim 1 , wherein the fabricating step is performed by etching the porous region at a lower porosity.9. The method of claim 1 , wherein the fabricating step is performed by etching the porous region at a higher porosity after etching the etching the porous region at the lower porosity.10. The method of claim 9 , wherein the porous region includes two or more sublayers with different porosities.11. The method of claim 10 , wherein at least one of the sublayers has a higher porosity and is a preferred layer for being separated.12. The method of claim 10 , ...

SOI WAFER, MANUFACTURING METHOD THEREFOR, AND MEMS DEVICE

In order to obtain a SOI wafer having an excellent ability of gettering metal impurities, an efficient method of manufacturing a SOI wafer, and a highly reliable MEMS device using such a SOI wafer, provided is a SOI wafer including: a support wafer () and an active layer wafer () which are bonded together with an oxide film () therebetween, each of the support wafer () and the active layer wafer () being a silicon wafer; a cavity () formed in a bonding surface of at least one of the silicon wafers; and a gettering material () formed on a surface on a side opposite to the bonding surface. 1. A SOI wafer , comprising:two silicon wafers bonded together with an oxide film therebetween;a cavity formed in a bonding surface of at least one of the two silicon wafers; anda gettering material formed on a surface on a side opposite to the bonding surface.2. A SOI wafer according to claim 1 , wherein the gettering material comprises a crushed layer.3. A SOI wafer according to claim 1 , wherein the gettering material comprises a polysilicon thin film.4. A method of manufacturing a SOI wafer including a support wafer and an active layer wafer which are bonded together with an oxide film therebetween claim 1 , each of the support wafer and the active layer wafer being a silicon wafer claim 1 , the method comprising:forming a cavity in a first surface of the support wafer, the first surface being a bonding surface of the SOI wafer;forming a gettering material on a surface of one of the support wafer and the active layer wafer on a side opposite to the first surface;carrying out thermal oxidation of one of the support wafer and the active layer wafer;bonding together the first surface of the support wafer and the active layer wafer; andcarrying out bonding reinforcing heat treatment with respect to the support wafer and the active layer wafer which are bonded together.5. A method of manufacturing a SOI wafer according to claim 4 , further comprising removing the gettering material ...

Method for Manufacturing a Semiconductor Substrate, and Method for Manufacturing Semiconductor Devices Integrated in a Semiconductor Substrate

A method of manufacturing a semiconductor substrate includes providing a semiconductor wafer having a first surface and a second surface opposite the first surface, and forming, when seen in a cross-section perpendicular to the first surface, cavities in the semiconductor wafer at a first distance from the first surface. The cavities are laterally spaced from each other by partition walls formed by semiconductor material of the wafer. The cavities form a separation region. The method further includes forming a semiconductor layer on the first surface of the semiconductor wafer, and breaking at least some of the partition walls by applying mechanical impact to the partition walls to split the semiconductor wafer along the separation region. 1. A method for manufacturing a semiconductor substrate , comprising:providing a semiconductor wafer having a first surface and a second surface opposite the first surface;forming, when seen in a cross-section perpendicular to the first surface, cavities in the semiconductor wafer at a first distance from the first surface, the cavities being laterally spaced from each other by partition walls formed by semiconductor material of the wafer, the cavities forming a separation region;forming a semiconductor layer on the first surface of the semiconductor wafer; andbreaking at least some of the partition walls by applying mechanical impact to the partition walls to split the semiconductor wafer along the separation region.2. A method according to claim 1 , wherein a residual wafer remains attached to the semiconductor layer after breaking of the partition walls claim 1 , the method further comprising:processing the semiconductor layer at a side where the residual wafer remains attached, wherein the processing comprises at least one of polishing, grinding and etching.3. A method according to claim 1 , wherein the cavities have a height b and a lateral width c claim 1 , wherein the ratio c:b is between about 10:1 and about 100:1.4. A ...

ENGINEERED SUBSTRATES HAVING MECHANICALLY WEAK STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS

Engineered substrates having mechanically weak structures for separating substrates from epitaxially grown semiconductor structures and associated systems and methods are disclosed herein. In several embodiments, for example, an engineered substrate can be manufactured by forming an intermediary material at an upper surface of a structural material and forming a plurality of pores in the intermediary material. The porous intermediary material and the structural material can define a handle substrate. The method can further include bonding an epitaxial formation structure on the handle substrate such that the porous intermediary material is between the epitaxial formation structure and the structural material. In various embodiments, the porous intermediary material is configured to break under mechanical stress. 1. A method of forming an engineered substrate , comprising:forming a handle substrate having a structural material and an intermediary material at an upper surface of the structural material, wherein the intermediary material has a plurality of pores; andbonding an epitaxial formation structure on the handle substrate, wherein the porous intermediary material is between the epitaxial formation structure and the structural material, and wherein the porous intermediary material is configured to break under mechanical stress.2. The method of wherein:the intermediary material is formed at the upper surface of the structural material by depositing a silicon material on the upper surface of the structural material, the structural material comprising a polycrystalline ceramic material; andthe plurality of pores are formed in the intermediary material by wet etching the intermediary material to form the pores.3. The method of wherein bonding an epitaxial formation structure on the handle substrate includes providing an epitaxial seed material for facilitating epitaxial growth of semiconductor materials and a bonding material for bonding the seed material to the ...

Method of implantation for fragilization of substrates

The disclosure relates to a method for implantation of atomic or ionic species into a batch of substrates made of semiconductor material, in which: each substrate made of semiconductor material is positioned on a respective support of a batch implanter, each substrate comprising a thin layer of electrical insulator on its surface; and a dose of at least one ionic or atomic species is implanted over the whole surface of the substrates, through their layer of insulator, so as to form a fragilization region within each substrate and to bound there a thin layer of semiconductor material between the thin layer of insulator and the fragilization region of the substrate, the implantation method being characterized in that, during the method, each support on which a substrate is positioned has at least two separate inclinations with respect to the plane orthogonal to the direction of implantation of the species in order to improve the implantation depth of the species in the substrate. The disclosure also relates to structures of the semiconductor-on-insulator type obtained by the implementation of the implantation method.

SEMICONDUCTOR DEVICE AND STRUCTURE WITH THERMAL ISOLATION

A semiconductor device, the device including: a first level of logic circuits, the logic circuits include a plurality of first transistors interconnected by a plurality of metal layers; a thermal isolation layer overlaying the first level; a second level of memory circuits, the memory circuits include an array of memory cells, where the second level is overlaying the thermal isolation layer; and connections from the logic circuits to the memory array including vias, where the vias have a diameter of less than 400 nm, and where a majority of the thermal isolation layer includes a material with a less than 0.5 W/m·K thermal conductivity. 1. A semiconductor device , the device comprising:a first level of logic circuits, said logic circuits comprise a plurality of first transistors interconnected by a plurality of metal layers;a thermal isolation layer overlaying said first level; 'wherein said second level is overlaying said thermal isolation layer; and', 'a second level of memory circuits, said memory circuits comprise an array of memory cells,'} wherein said vias have a diameter of less than 400 nm, and', 'wherein a majority of said thermal isolation layer comprises a material with a less than 0.5 W/m·K thermal conductivity., 'connections from said logic circuits to said memory array comprising vias,'}2. The device according to claim 1 ,wherein said device has an unpackaged size less than 0.5 mm for its horizontal or vertical sides.3. The device according to claim 1 ,wherein said thermal isolation layer has a thickness of greater than 200 nm and less than 2 microns.4. The device according to claim 1 ,wherein said second level comprises at least two layers,wherein one of said at least two layers comprises a first array of memory cells,wherein another of said at least two layers comprises a second array of memory cells, andwherein said first array of memory cells overlays at least said second array of memory cells.5. The device according to claim 1 ,wherein said memory ...

POROUS SEMICONDUCTOR LAYER TRANSFER FOR AN INTEGRATED CIRCUIT STRUCTURE

An integrated radio frequency (RF) circuit structure may include an active device on a front-side surface of a semiconductor device layer. A backside surface opposite the front-side surface of the semiconductor device layer may be supported by a backside dielectric layer. The integrated RF circuit structure may also include a handle substrate on a front-side dielectric layer that is on a front-side of the active device and a least a portion of the front-side surface of the semiconductor device layer. The integrated RF circuit structure may further include the backside dielectric layer on the backside surface of the semiconductor device layer. The backside dielectric layer may be arranged distal from the front-side dielectric layer. 1. A method of fabricating an integrated circuit structure , comprising:etching a bulk semiconductor wafer to create a porous semiconductor layer;epitaxially growing a semiconductor device layer on the porous semiconductor layer;fabricating an active device on the semiconductor device layer;depositing a front-side dielectric on the active device;bonding a handle substrate to the front-side dielectric on the active device;removing at least a portion of the bulk semiconductor wafer; andselectively etching away the porous semiconductor layer, while retaining the semiconductor device layer.2. The method of claim 1 , in which the porous semiconductor layer comprises an etch stop layer.3. The method of claim 1 , in which a porosity of the porous semiconductor layer is in a range of 20% to 70%.4. The method of claim 1 , in which the porous semiconductor layer comprises a cleave plane.5. The method of claim 1 , in which etching the bulk semiconductor wafer comprises:etching the bulk semiconductor wafer to create a first porous semiconductor layer; andetching the bulk semiconductor wafer to create a second porous semiconductor layer, having a porosity that is greater than the porosity of the first porous semiconductor layer.6. The method of claim ...

Thinning in package using separation structure as stop

A method of forming a thinned encapsulated chip structure, wherein the method comprises providing a separation structure arranged within an electronic chip, encapsulating part of the electronic chip by an encapsulating structure, and thinning selectively the electronic chip partially encapsulated by the encapsulating structure so that the encapsulating structure remains with a larger thickness than the thinned electronic chip, wherein the separation structure functions as a thinning stop.

Methods of Forming Strained-Semiconductor-on-Insulator Device Structures

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

Methods for Forming Semiconductor Device Structures

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication. A structure includes a relaxed substrate including a bulk material, a strained layer directly on the relaxed substrate, where a strain of the strained layer is not induced by the relaxed substrate, and a transistor formed on the strained layer. 1. A structure comprising:a relaxed substrate comprising a bulk material;a strained layer directly on the relaxed substrate, wherein a strain of the strained layer is not induced by the relaxed substrate; anda transistor formed on the strained layer.2. The structure of claim 1 , wherein the relaxed substrate comprises a bulk dielectric material.3. The structure of claim 2 , wherein the bulk dielectric material comprises AlOor SiO.4. The structure of claim 1 , wherein the bulk material comprises a bulk semiconductor material.5. The structure of claim 1 , wherein the relaxed substrate and the strained layer comprise a same semiconductor material.6. The structure of claim 5 , wherein the same semiconductor material is silicon.7. The structure of claim 1 , wherein the strained layer and the relaxed substrate are lattice-mismatched claim 1 , the strain of the strained layer being independent of the lattice mismatch between the strained layer and the relaxed substrate.8. The structure of claim 1 , wherein the strained layer and the relaxed substrate have a same lattice constant.9. The structure of claim 1 , wherein the strained layer has a first surface opposite the relaxed substrate claim 1 , the first surface having a surface roughness of less than 20 Å.10. The structure of claim 1 , wherein the strained layer comprises an epitaxial material.11. A semiconductor structure comprising:a substrate comprising a bulk material;a strained layer on a top surface of the substrate, the strained layer and the substrate being lattice-mismatched, a strain of the strained layer being independent of the lattice mismatch ...

SEMICONDUCTOR CHIP, SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING SEMICONDUCTOR WAFER

The present disclosure relates to the technical field of semiconductors, and in particular to a semiconductor chip, a semiconductor wafer and a method for manufacturing a semiconductor wafer. The semiconductor chip comprises: a substrate, devices provided on a side of the substrate, via holes running through the substrate, conductive material filled in the via holes and contacted with the devices, and a backside metal layer provided on the other side of the substrate away from the devices, the backside metal layer coming into contact with the conductive material so as to be electrically connected to the devices via the conductive material. The semiconductor chip, the semiconductor wafer and the method for manufacturing a semiconductor wafer of the present disclosure reduce the ground resistance and improve the heat dissipation of devices with via holes structure during the operation. 1. A semiconductor chip , comprising:a substrate;a device provided on a side of the substrate;a via hole running through the substrate;conductive material filled in the via holes and contacted with the devices; anda backside metal layer provided on the other side of the substrate away from the device, the backside metal layer coming into contact with the conductive material so as to be electrically connected to the device via the conductive material.2. The semiconductor chip according to claim 1 , wherein the amount of the conductive material filled in the via hole is 50% to 98% of the volume of the via hole.3. The semiconductor chip according to claim 1 , wherein the conductive material is any one or a combination of Cu claim 1 , Ti claim 1 , Ni claim 1 , W claim 1 , Pt and Au.4. The semiconductor chip according to claim 1 , wherein the conductive material comprises a multi-portion structure claim 1 , each portion being made of one or more kinds of metal.5. The semiconductor chip according to claim 4 , wherein the multi-portion structure is a multilayer structure in a direction from an ...

Wafer Production Method

A method for producing a layer of solid material includes: providing a solid body having opposing first and second surfaces, the second surface being part of the layer of solid material; generating defects by means of multiphoton excitation caused by at least one laser beam penetrating into the solid body via the second surface and acting in an inner structure of the solid body to generate a detachment plane, the detachment plane including regions with different concentrations of defects; providing a polymer layer on the solid body; and subjecting the polymer layer to temperature conditions to generate mechanical stress in the solid body, including cooling of the polymer layer to a temperature below ambient temperature, the cooling taking place such that due to stresses a crack propagates in the solid body along the detachment plane and the layer of solid material separates from the solid body along the crack. 1. A method for producing a layer of solid material , the method comprising:providing a solid body having a first surface and a second surface opposite the first surface, the second surface being part of the layer of solid material;generating defects by means of multiphoton excitation caused by at least one laser beam penetrating into the solid body via the second surface and acting in an inner structure of the solid body to generate a detachment plane, the detachment plane comprising regions with different concentrations of defects;providing a polymer layer on the solid body; andsubjecting the polymer layer to temperature conditions to generate mechanical stress in the solid body, including cooling of the polymer layer to a temperature below ambient temperature, the cooling taking place such that due to stresses a crack propagates in the solid body along the detachment plane and the layer of solid material separates from the solid body along the crack.2. The method of claim 1 , wherein the first surface of the solid body is level claim 1 , and wherein the ...

Method for Producing a Layer of Solid Material

A method for producing a layer of solid material includes: providing a solid body having opposing first and second surfaces, the second surface being part of the layer of solid material; generating defects by means of multiphoton excitation caused by at least one laser beam penetrating into the solid body via the second surface and acting in an inner structure of the solid body to generate a detachment plane, the detachment plane including regions with different concentrations of defects; providing a polymer layer on the solid body; and generating mechanical stress in the solid body such that a crack propagates in the solid body along the detachment plane and the layer of solid material separates from the solid body along the crack.

DOUBLE LAYER TRANSFER METHOD

A method of transferring a layer including: a) providing a layer joined to an initial substrate with a binding energy E0; b) bonding a front face of the layer on an intermediate substrate according to an intermediate bonding energy Ei; c) detaching the initial substrate from the layer; e) bonding a rear face onto a final substrate according to a final bonding energy Ef; and f) debonding the intermediate substrate from the layer to transfer the layer onto the final substrate; step b) comprising a step of forming siloxane bonds Si—O—Si, step c) being carried out in a first anhydrous atmosphere and step f) being carried out in a second wet atmosphere such that the intermediate bonding energy Ei takes a first value Ei1 in step c) and a second value Ei2 in step f), with Ei1>E and Ei2E0 and Ei2 Подробнее

METHOD OF DETACHING A LAYER

The present disclosure concerns a method of detaching a layer to be detached from a donor substrate, comprising the following steps: a) assembling the donor substrate and a porous substrate, b) application of a treatment of chemical modification of the crystallites, the chemical modification being adapted to generate a variation of the volume of the crystallites, the volume variation generates deformation in compression or in tension of the porous substrate, the deformation in compression or in tension generates a stress in tension or in compression in the donor substrate, which causes fracture in a fracture plane, the fracture plane delimiting the layer to be detached, the stress leading to the detachment of the layer to be detached from the donor substrate. 111.-. (canceled)12. A method of detaching a layer to be detached from a donor substrate , the method comprising:assembling the donor substrate and a porous substrate including the layer to be detached such that the porous substrate and the layer to be detached contact one another at an interface, the porous substrate including pores and crystallites; andafter assembling the donor substrate and the porous substrate, applying a treatment to the assembly so as to chemically modify at least some surfaces of the crystallites of the porous substrate, the chemical modification generating a variation of a volume of the crystallites, the volume variation generating deformation in compression or in tension of the porous substrate essentially parallel to the interface, the deformation in compression or in tension of the porous substrate generating a stress in tension or in compression in the donor substrate, the stress in tension or in compression being greater than a mechanical strength of the donor substrate in a fracture plane essentially parallel to the interface and delimiting the layer to be detached, the stress leading to the detachment of the layer to be detached from the donor substrate along the fracture plane. ...

Methods for Forming Semiconductor Device Structures

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

COMBINED WAFER PRODUCTION METHOD WITH A MULTI-COMPONENT RECEIVING LAYER

The present invention relates to a method for producing solid body layers. The claimed method comprises at least the following steps: providing a solid body () for separating at least one solid body layer (), arranging a receiving layer () on the solid body for holding the solid body layer (), said receiving layer being made of at least one polymer and an additional material, said receiving layer, in terms of volume, be made mainly of polymer, the additional material having a greater conductivity than the polymer, and the receiving layer () is subjected to thermal stress, in particular, mechanical stress, for generating voltages in the solid body (), wherein a crack in the solid body () along a separation plane () expands due to the voltages, the solid layer () being separated from the solid body () due to the crack. 1. Method for producing solid body layers ,comprising at least the steps:{'b': 2', '4, 'providing a solid body () for separating at least one solid body layer (),'}{'b': 10', '2', '4, 'arranging a receiving layer () on the solid body () to hold the solid body layer (), wherein the receiving layer consists of at least one polymer and one further material, wherein the further material has greater thermal conductivity than the polymer,'}{'b': 10', '2', '2', '8', '4', '2, 'subjecting the receiving layer () to thermal stress to generate stresses, particularly mechanically, in the solid body (), w wherein a crack in the solid body () spreads along a separation plane () wherein solid body layer () is separated from the solid body () by a crack.'}2. Method according to claim 1 ,characterised in thatthe further material is applied to the polymer as a coating, or the polymer is applied to the further material as a coating.3. Method according to or claim 1 ,characterised in thatthe coating has local weak points, in particular it is broken to follow a deformation that is created through the polymer when the stress is generated.4. Method according to any one of the ...

Combined wafer production method with laser treatment and temperature-induced stresses

A method for the production of layers of solid material is contemplated. The method may include the steps of providing a solid body for the separation of at least one layer of solid material, generating defects by means of at least one radiation source, in particular a laser, in the inner structure of the solid body in order to determine a detachment plane along which the layer of solid material is separated from the solid body, and applying heat to a polymer layer disposed on the solid body in order to generate, in particular mechanically, stresses in the solid body, due to the stresses a crack propagating in the solid body along the detachment plane, which crack separates the layer of solid material from the solid body. 1. A method for the production of layers of solid material comprising:providing a solid body for the separation of at least one layer of solid material, the solid body having a first level surface portion and a second level surface portion, wherein the second level surface is part of the layer of solid material, wherein the layer of solid material is thinner than the remaining part of the solid body, wherein the first level surface and the second level surface are opposing main surfaces of said solid material;then generating defects by means of laser beams of multiphoton excitation caused by at least one laser acting in the inner structure of the solid body in order to determine a detachment plane along which the layer of solid material is separated from the solid body, the laser beams penetrating into the solid body via the second level surface portion;then providing a receiving layer for holding the layer of solid material on the solid body, the receiving layer being disposed on the second level surface portion and the receiving layer being in the form of a polymer layer;then subjecting the receiving layer to temperature conditions in order to generate mechanical stresses in the solid body, including cooling of the receiving layer to a ...

Combined wafer production method with laser treatment and temperature-induced stresses

The present invention relates to a method for the production of layers of solid material. The method according to the invention comprises at the very least the steps of providing a solid body ( 2 ) for the separation of at least one layer of solid material ( 4 ), generating defects by means of at least one radiation source, in particular a laser, in the inner structure of the solid body in order to determine a detachment plane along which the layer of solid material is separated from the solid body, and applying heat to a polymer layer ( 10 ) disposed on the solid body ( 2 ) in order to generate, in particular mechanically, stresses in the solid body ( 2 ), due to the stresses a crack propagating in the solid body ( 2 ) along the detachment plane ( 8 ), which crack separates the layer of solid material ( 4 ) from the solid body ( 2 ).

METHOD FOR MANUFACTURING A MULTILAYER STRUCTURE ON A SUBSTRATE

The invention relates to a method for manufacturing a multilayer structure on a first substrate made of a material having a first Young's modulus. The method includes: providing a second substrate covered with the multilayer structure, the multilayer structure having a planar surface opposite the second substrate, the second substrate being made of a material having a second Young's modulus; applying first deformations to said surface; molecularly boding the first substrate to said surface, the molecular bonding resulting in the appearance of second deformation in said surface in the absence of the first deformations, the first deformations being opposite the second deformations; and removing the second substrate, the resulting deformations in said surface being less than 5 ppm. 1. A method of manufacturing a multilayer structure on a first support made of a first material having a first Young's modulus , the method comprising the successive steps of:providing a second support covered with the multilayer structure, the multilayer structure having a planar surface opposite to the second support, the second support being made of a second material having a second Young's modulus different from the first Young's modulus;applying to said surface first deformations which vary according to the crystallographic directions of the second support;performing a molecular bonding of the first support onto said surface, the molecular bonding causing the occurrence of second deformations in said surface in the absence of the first deformations, the first deformations being opposite to the second deformations; andremoving the second support, the resulting relative deformations in said surface being smaller than 5 ppm.2. The manufacturing method of claim 1 , wherein said surface is deformed by applying the second support on a template.3. The manufacturing method of claim 1 , wherein said surface is deformed by maintaining the center of the second support fixed and by displacing the ...

FLEXIBLE, STRETCHABLE ELECTRONIC DEVICES

Fabrication methods are disclosed that facilitate the production of electronic structures that are both flexible and stretchable to conform to non-planar (e.g. curved) surfaces without suffering functional damage due to excessive strain. Electronic structures including CMOS devices are provided that can be stretched or squeezed within acceptable limits without failing or breaking The methods disclosed herein further facilitate the production of flexible, stretchable electronic structures having multiple levels of intra-chip connectors. Such connectors are formed through deposition and photolithographic patterning (back end of the line processing) and can be released following transfer of the electronic structures to flexible substrates. 1. A method comprising:forming an electronic circuitry layer having at least first and second circuitry regions on a semiconductor substrate;forming a separator layer separating the first and second circuitry regions of the circuitry layer on the substrate;forming a layer comprising electrically insulating material on the circuitry layer;forming one or more metal layers in the layer comprising the electrically insulating material;forming an electrical connector layer extending across the separator layer using deposition and patterning techniques, andremoving at least part of the separator layer to form a space beneath the electrical connector layer, the space further separating the first and second circuitry regions of the circuitry layer.2. The method of claim 1 , wherein the electronic circuitry layer comprises a plurality of CMOS devices.3. The method of claim 2 , further including the step of thinning the substrate prior to removing at least part of the separator layer.4. The method of claim 3 , further including the step of affixing the substrate to a flexible polymeric layer subsequent to the steps of thinning the substrate and forming the electrical connector layer.5. The method of claim 4 , wherein the step of removing at ...

Systems and methods for laser splitting and device layer transfer

Methods and systems are provided for the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, micro-electro-mechanical system (MEMS), or optoelectronic devices, from a thicker donor wafer using laser irradiation.

FABRICATION METHOD OF A STACK OF ELECTRONIC DEVICES

This method includes the following steps: a) providing a first structure successively including a substrate, an electronic device and a dielectric layer; b) providing a second structure successively including a substrate, an active layer, an intermediate layer, a first semiconducting layer and a porous second semiconducting layer; c) bonding the first and second structures by direct bonding between the dielectric layer and the porous second semiconducting layer; d) removing the substrate of the second structure so as to expose the active layer; e) adding dopants to the first semiconducting layer or to the active layer; f) irradiating the first semiconducting layer by a pulse laser so as to thermally activate the corresponding dopants. 1. Fabrication method of a stack of electronic devices , comprising the following steps:a) providing a first structure successively comprising a first substrate, a first electronic device, and a dielectric layer;b) providing a second structure successively comprising a second substrate, an active layer designed to form a second electronic device, an intermediate layer, a first semiconducting layer designed to form a ground plane, and a porous second semiconducting layer;c) bonding the first and second structures by direct bonding between the dielectric layer and the porous second semiconducting layer;d) removing the second substrate of the second structure so as to expose the active layer;e) adding dopants to the first semiconducting layer or the active layer;f) irradiating the first semiconducting layer or the active layer by a pulse laser so as to thermally activate the dopants.2. Method according to claim 1 , wherein the porous second semiconducting layer presents a free surface in step b) claim 1 , and wherein step b) comprises a step b) consisting in forming a dielectric layer on said free surface claim 1 , direct bonding being performed in step c) between the dielectric layer of the first structure and the dielectric layer formed ...

Method for manufacturing semiconductor device

A method for manufacturing a semiconductor device includes: bonding at least a part of the rear surface of a semiconductor wafer, and a supporting substrate in use of using a silane coupling agent; forming a functional structure on a front surface of the semiconductor wafer; placing a condensation point of laser light transmitted through the semiconductor wafer on a bonding interface between the semiconductor wafer and the supporting substrate, and irradiating the bonding interface with the laser light, thereby forming a fracture layer on at least a part of an outer circumferential section of the bonding interface; separating the bonding interface; and carrying out rear surface processing on the rear surface of the semiconductor wafer.

Methods for processing a 3D semiconductor device

A method for processing a 3D semiconductor device, the method including: providing a wafer including a plurality of first dies, the plurality of first dies including a first transistor layer and a first interconnection layer; completing a step of transferring a plurality of second dies each overlaying at least one of the first dies, where each of the plurality of second dies includes a second transistor layer, where at least one of the plurality of first dies is substantially larger in area than at least one of the plurality of second dies, and where each of the plurality of second dies has a thickness greater than six microns; and completing a step of thinning the plurality of second dies, where each of the plurality of second dies has a thickness of less than 2 microns.

Composite member separating method, thin film manufacturing method, and composite member separating apparatus

部材の分離方法及び分離装置

(57)【要約】 【課題】貼り合わせ基板のゆがみや等に関らず、貼り合 わせ基板を適正に分離する。 【解決手段】この分離装置は、流体を噴射するノズル１ ２０の位置を調整する位置調節機構１４０を備えてい る。貼り合わせ基板が所定範囲内のゆがみを有すること を前提として予め設定されたプログラムに従って、位置 調整機構１４０によりノズル１２０の高さを段階的に変 更しながら、貼り合わせ基板５０を分離する。

Manufacturing method of semiconductor substrate

반도체기판의 제조방법

충분한 품질과 우수한 재현성으로 SOI기판을 제조하는 것이며, 동시에, 웨이퍼 등의 재사용을 통해 자원절약과 비용절감을 실현하는 방법으로 비다공성박막의 적어도 한층이 다공성 Si층을 통해 형성되어 있는 제1기판(11)의 주표면을 제2기판(15)의 주표면에 결합하는 공정, 제1기판(11)과 제2기판(15)으로 이루어진 결합기판의 양면에서 다공성 Si층을 노출시키는 공정, 결합기판을 산화시켜 다공성 Si층을 분할하는 공정 및 다공성 Si층의 분할로 분리된 제2기판(15)위의 다공성 Si(12)와 산화다공성 Si층(16)을 제거하는 공정으로 이루어진다.

Soi 기판 제조 방법

본 발명은 SOI 기판 제조 방법에 관한 것으로서, (a) 제1 단결정 실리콘 기판의 일면 상에 실리콘 박리층을 형성하는 단계; (b) 실리콘 박리층 상에 제1 단결정 실리콘 에피택셜층을 형성하는 단계; (c) 제1 단결정 실리콘 에피택셜층의 일면 상에 복수의 절연 패턴을 형성하는 단계; (d) 절연 패턴의 측면에 측벽부를 형성하는 단계; (e) 제1 단결정 실리콘 에피택셜층 및 절연 패턴 상에 제2 단결정 실리콘 에피택셜층을 형성하는 단계; (f) 제2 단결정 실리콘 에피택셜층을 평탄화하는 단계; (g) 평탄화된 제2 단결정 실리콘 에피택셜층 상에 산화층이 형성된 제2 단결정 실리콘 기판을 접합하는 단계; (h) 실리콘 박리층에 에너지를 인가하여 제1 단결정 실리콘 기판을 분리 제거하는 단계; (i) 제1 단결정 실리콘 에피택셜층의 타면으로부터 일면 방향으로 두께를 감축하면서 제거하는 단계를 포함하는 것을 특징으로 한다.

層転写方法

本発明は、ソース基板（４）に由来する材料の層（４１）をサポート基板（５）に転写する方法であって、ソース基板（４）の前面とサポート基板（５）の前面の少なくとも一方に補助的な材料（６）を堆積するステップと、二つの基板（４，５）を互いに接触させるステップと、次に、機械的に発生する応力を加えることにより、転写対象の層（４１）を弱いゾーン（４３）に沿ってソース基板（４）から取り外すステップと、を少なくとも含む方法に関する。この方法は、材料（６）を堆積するステップの前に、余分な補助的な材料（６）を収容する少なくとも一つの凹部（５６）が二つの基板（４，５）のうちの少なくとも一方に形成され、凹部が基板の前面に通じている点に注目すべきである。用途はエレクトロニクス、オプトエレクトロニクスおよびオプティクスの分野における複合基板の製造である。

Soi substrate and method and system for manufacturing the same

고품질의 맞붙인 SOI기판의 제조방법을 제공한다. 2개 기판의 맞붙임면을 노출하는 공정은 Fed. St. 209D:USA IS규격에 있어서 클래스 1이상의 청정도를 가진 분위기에서 실시된다. 클래스 1의 크린룸은 0.1㎛이상의 먼지에 대해서 99.9999%(6N)이상의 포집효율을 가진 에어필터를 사용해서 얻을 수 있다. A method of manufacturing a high quality bonded SOI substrate is provided. The process of exposing the joining surfaces of two substrates is Fed. St. 209D: USA IS is conducted in an atmosphere with class 1 or higher cleanliness. Class 1 cleanrooms can be obtained using air filters with a collection efficiency of at least 99.9999% (6N) for dusts larger than 0.1 µm.

Ｓｏｉ基板及びその製造方法並びにその製造設備

(57)【要約】 【課題】高品位の貼り合わせＳＯＩ基板を製造する方法 を提供する。 【解決手段】２枚の基板の貼り合わせ面が露出する工程 を、Fed.St.209:USA IS規格におけるクラス１以上の清 浄度を有する雰囲気内において実施する。クラス１のク リーンルームは、０．１μｍ以上の塵埃に対して９９． ９９９９％（６Ｎ）以上の捕集効率を有するエアフィル タを用いることにより得ることができる。

Method for producing semiconductor base members

다공질층의 기공크기의 분포를 균일하게 하기 위해서는, 원자스텝과 테라스를 구비하는 표면은 실리콘기재의 표면위에 형성되고 스텝과 테라스를 제거하지 않고 다공화한 다음에, 비다공질 반도체 단결정막이 표면위에 형성된다. In order to uniformly distribute the pore size of the porous layer, a surface having an atomic step and a terrace is formed on the surface of the silicon substrate and porous without removing the step and the terrace, and then a non-porous semiconductor single crystal film is formed on the surface. do.

Method of producing semiconductor member

본 발명에 의한 반도체부재의 제조방법은 반도체기판상에 비다공질층을 가진 제 1부재를 준비하는 제 1공정, 및 비다공질층을 제 1부재로부터 제 2부재상에 이설하는 제 2공정을 포함하고, 제 2공정에서 비다공질층이 분리되는 반도체 기판을 제 1공정에서의 제 1부재의 구성재료로서 다시 사용하는 것을 (n-1)회 (n은 2이상의 자연수)행하고, 제 1 및 제 2공정은 n회 반복되고, 반도체기판은 제 2공정에서의 n번째 사용에서 분리되고, 그리고 분리된 반도체기판은 제 1 및 제 2공정이외의 용도에 사용된다. The method of manufacturing a semiconductor member according to the present invention includes a first step of preparing a first member having a non-porous layer on a semiconductor substrate, and a second step of moving the non-porous layer from the first member onto the second member. And reusing the semiconductor substrate from which the non-porous layer is separated in the second step as a constituent material of the first member in the first step (n-1) times (n is a natural number of two or more), The second process is repeated n times, the semiconductor substrate is separated at the nth use in the second process, and the separated semiconductor substrate is used for applications other than the first and second processes.

半导体衬底及其制造方法

生产平整、质量好SOI衬底的方法，同时包括多孔形成步骤，在硅衬底的至少一个表面上形成多孔硅层；及大孔隙率层形成步骤，在多孔硅层中形成大孔隙率层。把离子注入多孔硅层并伸入到给定区域，或者在多孔形成步骤中改变阳极氧化的电流密度，进行大孔隙率层形成步骤。在多孔硅层上面外延生长非多孔单晶硅层。把多孔硅层表面和支撑衬底连接在一起，在具有大孔隙率的多孔硅层处进行分离。接着进行选择刻蚀，以便除掉多孔硅层。通过重复利用衬底能节省资源和降低成本。

Producing method of silicon on insulator substrate

본 발명은 SOI 기판 제조 방법에 관한 것으로서, (a) 제1 단결정 실리콘 기판의 일면 상에 실리콘 박리층을 형성하는 단계; (b) 실리콘 박리층 상에 제1 단결정 실리콘 에피택셜층을 형성하는 단계; (c) 제1 단결정 실리콘 에피택셜층의 일면 상에 복수의 절연 패턴을 형성하는 단계; (d) 제1 단결정 실리콘 에피택셜층 및 절연 패턴 상에 제2 단결정 실리콘 에피택셜층을 형성하는 단계; (e) 제2 단결정 실리콘 에피택셜층을 평탄화하는 단계; (f) 평탄화된 제2 단결정 실리콘 에피택셜층 상에 산화층이 형성된 제2 단결정 실리콘 기판을 접합하는 단계; (g) 실리콘 박리층에 에너지를 인가하여 제1 단결정 실리콘 기판을 분리 제거하는 단계; (h) 제1 단결정 실리콘 에피택셜층의 타면으로부터 일면 방향으로 두께를 감축하면서 제거하는 단계를 포함하고, (d) 단계에서 절연 패턴 상부에 형성되는 제2 단결정 실리콘 에피택셜층보다, 절연 패턴 사이로 노출된 제1 단결정 실리콘 에피택셜층의 상부에 형성되는 제2 단결정 실리콘 에피택셜층을 더 두껍게 형성하는 것을 특징으로 한다.

Remove the preparation method of material on the insulator of position controllable precise

本发明提供一种剥离位置精确可控的绝缘体上材料的制备方法，包括以下步骤：S1：提供一Si衬底，在其表面外延生长一掺杂单晶层；所述掺杂单晶层厚度大于15 nm；S2：在所述掺杂单晶层表面外延生长一单晶薄膜；S3：在所述单晶薄膜表面形成一SiO 2 层；S4：进行离子注入，使离子峰值分布在所述SiO 2 层以下预设范围内；S5：提供一表面具有绝缘层的基板与所述单晶薄膜表面的SiO 2 层键合形成键合片，并进行退火以使所述键合片在预设位置剥离，得到绝缘体上材料。本发明利用较厚掺杂单晶层对注入离子的吸附作用，并控制注入深度，使剥离界面为所述掺杂单晶层的上表面、下表面或其中离子分布峰值处，从而达到精确控制剥离位置的目的。

Method of producing thin layers of semiconductor material from a double-sided donor wafer and semiconductor-on-insulator structures thereby

본 발명은, 도너웨이퍼로부터 반도체 재료들에서 선택된 재료의 박막들을 제조하는 방법에 있어서: (a) 웨이퍼 제1 표면 아래에, 박막 두께에 실질적으로 해당되는 깊이에서 제1 연약영역을 형성하는 단계, (b) 제1 연약영역 레벨에서 웨이퍼로부터, 제1 연약영역 면상에 위치하며 제1 표면에 이웃하는 웨이퍼 일부인 제1 박막을 분리하는 단계, (c) 웨이퍼 제2 표면 아래에, 박막 두께에 실질적으로 해당되는 깊이에서 제2 연약영역을 형성하는 단계, (d) 제2 연약영역 레벨에서 웨이퍼로부터, 제1 연약영역 면상에 위치하며 제2 표면에 이웃하는 웨이퍼 일부인 제2 박막을 분리하는 단계로 구성된, 중간 재활용 단계 없이 연속적으로 수행되는 방법에 관한 것이다. 본 발명은 재활용 조작을 면하게 할 수 있다. 특히 반도체-온-절연체 구조체 제조에 적용될 수 있다. The present invention provides a method of making thin films of a material selected from semiconductor materials from a donor wafer, comprising: (a) forming a first soft region below a wafer first surface at a depth substantially corresponding to the thin film thickness, (b) separating the first thin film from the wafer at the first soft region level, which is a portion of the wafer located on the first soft region plane and adjacent to the first surface, (c) below the second surface of the wafer, substantially equal to the thin film thickness. Forming a second soft region at a depth corresponding to (d) separating the second thin film, which is a portion of the wafer located on the first soft region surface and adjacent to the second surface, from the wafer at the second soft region level. It relates to a process which is carried out continuously without an intermediate recycling step constructed. The present invention can avoid the recycling operation. In particular, it can be applied to the manufacture of semiconductor-on-insulator structures.

Thin film actuated mirror array and method for manufacturing the same

화소의 포인트 결함을 방지할 수 있는 박막형 광로 조절 장치 및 그 제조 방법이 개시된다. 액티브 매트릭스의 상부에는, 지지 라인, 지지층, 제1 앵커 및 제2 앵커들을 갖는 지지 요소가 형성되며, 지지 요소의 상부에는 액츄에이터가 형성되고, 거울은 지지층의 상부에 형성된 하부 전극, 하부 전극의 일측 상부에 형성된 제1 변형층, 하부 전극의 타측 상부에 형성된 제2 변형층, 제1 변형층의 상부에 형성된 제1 상부 전극, 그리고 제2 변형층의 상부에 형성된 제2 상부 전극을 포함하는 액츄에이터의 상부에 형성되며, 제1 및 제2 상부 전극의 일측으로부터는 제1 및 제2 변형층, 하부 전극, 그리고 지지층을 관통하여 복 수 개의 에칭 홀이 형성된다. 포스트의 양측의 제1 및 제2 상부 전극으로부터 지지층을 관통하도록 각기 제1 및 제2 에칭 홀을 형성하고, 액츄에이터의 외곽부와 동시에 제1 및 제2 에칭 홀을 통하여 희생층을 제거함으로써, 지지층이 식각 방지층에 부착되는 것을 차단하여 액츄에이터가 액티브 매트릭스에 스티킹되는 현상을 방지하여 결국 화소의 포인트 결함을 방지할 수 있다. Disclosed are a thin film type optical path adjusting device capable of preventing a point defect of a pixel and a method of manufacturing the same. On top of the active matrix, a support element having a support line, a support layer, a first anchor and a second anchor is formed, an actuator is formed on the support element, and a mirror is formed on the top of the support layer, the lower electrode and the lower electrode. An actuator comprising a first strained layer formed on the upper side, a second strained layer formed on the other side of the lower electrode, a first upper electrode formed on the first strained layer, and a second upper electrode formed on the second strained layer A plurality of etching holes are formed on the upper side of the through hole, and a plurality of etching holes are formed from one side of the first and second upper electrodes through the first and second deforming layers, the lower electrode, and the support layer. The support layer is formed by forming first and second etching holes, respectively, to penetrate the support layer from the first and second upper electrodes on both sides of the post, and removing the sacrificial layer through the first and second etching holes simultaneously with the outer portion of the actuator. By preventing the adhesion to the etch stop layer, it is possible to prevent the actuator from sticking to the active matrix, thereby preventing the point ...

Producing method of silicon on insulator substrate

본 발명은 SOI 기판 제조 방법에 관한 것으로서, (a) 제1 단결정 실리콘 기판의 일면 상에 실리콘 박리층을 형성하는 단계; (b) 실리콘 박리층 상에 제1 단결정 실리콘 에피택셜층을 형성하는 단계; (c) 제1 단결정 실리콘 에피택셜층의 일면 상에 복수의 절연 패턴을 형성하는 단계; (d) 제1 단결정 실리콘 에피택셜층 및 절연 패턴 상에 제2 단결정 실리콘 에피택셜층을 형성하는 단계; (e) 제2 단결정 실리콘 에피택셜층을 평탄화하는 단계; (f) 평탄화된 제2 단결정 실리콘 에피택셜층 상에 산화층이 형성된 제2 단결정 실리콘 기판을 접합하는 단계; (g) 실리콘 박리층에 에너지를 인가하여 제1 단결정 실리콘 기판을 분리 제거하는 단계; (h) 제1 단결정 실리콘 에피택셜층의 타면으로부터 일면 방향으로 두께를 감축하면서 제거하는 단계를 포함하고, (c) 단계에서 절연 패턴은 질화 실리콘층(Silicon Nitride Layer)을 포함하는 것을 특징으로 한다.

Soi substrate and method and system for manufacturing the same

A method of manufacturing a high-quality bonded SOI substrate is provided. The step of exposing the bonding interface between two substrates is performed in an atmosphere having cleanliness of Class 1 or more in Fed. St. 209D: USA IS standard. A clean room of Class 1 can be obtained using an air filter having a collection efficiency of 99.9999% (6N) or more for dust particles of a size of 0.1 μm or more.

Semiconductor substrate and producing method thereof

生产平整、质量好SOI衬底的方法，同时包括多孔形成步骤，在硅衬底的至少一个表面上形成多孔硅层；及大孔隙率层形成步骤，在多孔硅层中形成大孔隙率层。把离子注入多孔硅层并伸入到给定区域，或者在多孔形成步骤中改变阳极氧化的电流密度，进行大孔隙率层形成步骤。在多孔硅层上面外延生长非多孔单晶硅层。把多孔硅层表面和支撑衬底连接在一起，在具有大孔隙率的多孔硅层处进行分离。接着进行选择刻蚀，以便除掉多孔硅层。通过重复利用衬底能节省资源和降低成本。

Soi structure and fabrication method

본 실시예는 SOI 기판을 제공하고, SOI 기판의 제조 방법이 제공된다. SOI 기판의 제조 방법은 제1 기판을 준비하는 단계 - 제1 유전층은 상기 제1 기판상에 형성됨 - 와, 듀테륨 이온을 상기 제1 기판으로 임플란트하는 단계 - 듀테륨-불순물층은 사전결정된 깊이에서 상기 제1 기판내에 형성됨 - 와, 제2 기판을 준비하는 단계 - 제2 유전층은 상기 제2 기판상에 형성되고 상기 제1 유전층과 경계를 이룸 - 와, 어닐링 프로세스를 수행하는 단계 - 마이크로버블(microbubble)이 듀테륨-불순물층 내에 형성됨 - 와, 및 SOI 기판을 얻기 위하여, 듀테륨-불순물층으로부터 상기 제1 기판을 커팅하는 단계를 포함한다. This embodiment provides an SOI substrate and a method of manufacturing an SOI substrate. A method of fabricating an SOI substrate includes the steps of: preparing a first substrate, wherein a first dielectric layer is formed on the first substrate, and implanting the deposition of the first substrate with the deuterium ions. The deuterium- A second dielectric layer formed on the second substrate and bounding the first dielectric layer; and performing an annealing process, wherein the microbubble is formed in the first substrate, ) Is formed in the deuterium-impurity layer, and cutting the first substrate from the deuterium-impurity layer to obtain an SOI substrate.

Thin film actuated mirror array and method for manufacturing the same

화소의 포인트 결함을 최소화할 수 있는 박막형 광로 조절 장치 및 그 제조 방법이 개시된다. 상기 장치는, 각기 식각 방지층에 접촉되는 제1 앵커 및 제2 앵커들을 포함하는 사각 고리의 형상을 갖는 지지층, 지지층과 동일한 형상을 갖는 하부 전극, 거울상의 'ㄷ'자의 형상을 갖는 변형층, 변형층과 동일한 형상을 갖는 상부 전극, 상부 전극과 하부 전극을 절연시키는 절연층, 그리고 인접하는 상부 전극들을 연결하는 상부 전극 연결 수단을 포함한다. 하부 전극을 Iso-cutting하는 단계를 배제하고 변형층을 형성한 후, 상부 전극 연결 수단과 하부 전극 사이에 절연층을 형성함으로써, 상부 전극과 하부 전극간에 전기적 단락이 발생하는 것을 방지하여 화소의 포인트 결함을 최소화할 수 있다. Disclosed are a thin film type optical path adjusting device capable of minimizing point defects of a pixel and a method of manufacturing the same. The apparatus includes a support layer having a shape of a square ring including a first anchor and a second anchor in contact with an etch stop layer, a lower electrode having the same shape as the support layer, a strained layer having a shape of a mirror-shaped 'c', and a deformation. An upper electrode having the same shape as the layer, an insulating layer for insulating the upper electrode and the lower electrode, and upper electrode connecting means for connecting adjacent upper electrodes. After forming the strained layer excluding the step of iso-cutting the lower electrode, an insulating layer is formed between the upper electrode connecting means and the lower electrode, thereby preventing the occurrence of an electrical short between the upper electrode and the lower electrode, thereby preventing The defect can be minimized.

Method for separating semiconductor layer from substrate, method for manufacturing semiconductor device, and method for manufacturing SOI substrate

Method for separating element-forming layer from gas

고변화효율의 박막태양전지 등의 고성능의 박막소자를 저코스트로 제조할 수 있는 기체(基體)로부터 소자형 성층을 분리하는 방법을 제공한다. 단결정 Si 기판(1) 상에 다공질 Si층(2)을 형성하고, 그 위에 태양전지층으로 될 p+형 Si층(3), p형 Si층(4) 및 n+형 Si층(5)을 형성한다. n+형 Si층(5)상에 보호막(6)을 형성한 후, 단결정 Si 기판(1)의 배면을 지그(10)에 접착하는 동시에, 보호막(6)의 표면에 지그(12)를 접착한다. 다음에, 지그(10), (12)를 서로 반대방향으로 인장함으로써 다공질 Si층(2)을 기계적으로 판단하여, 태양전지층을 단결정 Si기판(1)으로부터 분리한다. 이 태양전지층을 2매의 플라스틱기판의 사이에 협지하여 플렉시블한 박막태양전지를 제조한다.

Exfoliationg method of semiconducting material for preparing 2d material using silk

More particularly, the present invention relates to a method of peeling a semiconductor material using silk, and more particularly, to a method of peeling a semiconductor material by using a silk, To a method of peeling a semiconductor material capable of obtaining a sufficient peeling effect.

Semiconductor processing apparatus

본 발명은 분리장치에 기판을 수납하고, 분리장치로부터 기판을 이송하는 경우에 기판이 낙하하는 것을 방지하는 데 있다. 기판유지부(22, 23)의 지지면은 수평으로 되고, 또한 분리될 적층접착기판(21)은 수평상태에서 기판유지부(22)에 장착된다(2A). 기판유지부(22,23)는 각각 회전축(26,27)의 주위에 각각 선회하고, 기판이 기판유지부(22, 23)에 의하여 샌드위치되도록 기판유지부(22,23)의 지지면은 수직으로 된다(2B). 기판유지부(22, 23)는 각각 회전축(24, 25)을 중심으로 회전하고, 동시에, 고압, 고속의 물이 분사노즐(28)로부터 분사되어 적층접착기판(21)을 두 개의 기판(21a, 21c)으로 분리한다. 기판유지부(22, 23)는 각각 회전축(26, 27)을 중심으로 선회하여 지지면을 수평으로 한다(2C). 상기 구성에 의하여, 기판은 낮은 측으로부터 지지되어 수평상태로 이송될 수 있다. The present invention is to prevent the substrate from falling when the substrate is stored in the separator and the substrate is transferred from the separator. The supporting surfaces of the substrate holding portions 22, 23 are horizontal, and the laminated adhesive substrate 21 to be separated is mounted on the substrate holding portion 22 in the horizontal state (2A). The substrate holding portions 22 and 23 pivot around the rotation shafts 26 and 27, respectively, and the supporting surfaces of the substrate holding portions 22 and 23 are vertical so that the substrate is sandwiched by the substrate holding portions 22 and 23, respectively. (2B). The substrate holding portions 22 and 23 rotate about the rotation shafts 24 and 25, respectively, and at the same time, high pressure and high speed water is injected from the spray nozzles 28, thereby stacking the laminated adhesive substrate 21 onto the two substrates 21a. , 21c). The board | substrate holding parts 22 and 23 pivot about the rotating shafts 26 and 27, respectively, and level a support surface (2C). By the above configuration, the substrate can be supported from the lower side and transferred in a horizontal state.

Manufacturing process for a multilayer structure

본 발명은 반도체 재료로 만들어진 다층 구조의 제조 방법에 관한 것으로, 상기 다층 구조는 제 1 반도체 재료로 만들어진 기판(20)과 제 2 반도체 재료로 만들어진 피상 박막을 포함하고, 이 두 반도체 재료는 대체로 다른 격자 파라미터를 가지고 있으며, 상기 제조 방법은: 지지 기판(100)상에 피상 박막을 포함하는 층(110)을 제조하는 단계, 상기 지지 기판과 증착층에 의해 형성된 앙상블(10)내에 취성 영역을 생성하는 단계, 상기 앙상블과 타겟 기판(20)을 접착하는 단계, 이 취성 영역의 레벨에서 분리하는 단계, 결과적인 구조의 표면을 처리하는 단계를 포함하는 것을 특징으로 한다. The present invention relates to a method of manufacturing a multilayer structure made of a semiconductor material, the multilayer structure comprising a substrate 20 made of a first semiconductor material and an apparent thin film made of a second semiconductor material, the two semiconductor materials being generally different Having a lattice parameter, the manufacturing method comprises: fabricating a layer (110) comprising a thin film on a support substrate (100), creating a brittle region in the ensemble (10) formed by the support substrate and the deposition layer And adhering the ensemble and the target substrate 20, separating at the level of the brittle regions, and treating the resulting surface of the structure.

Manufacturing method of semiconductor film

Method for removing porous region and method for manufacturing semiconductor substrate

Releasing apparatus for separating a semiconductor substrate from a semiconductor template

According to one embodiment, a releasing apparatus for separating a semiconductor substrate from a semiconductor template, the releasing apparatus having an enclosed pressure chamber having at least one gas inlet and at least one gas outlet. A top vacuum chuck for securing a released semiconductor substrate or semiconductor template in the enclosed pressure chamber. A bottom vacuum chuck for securing an attached semiconductor substrate and semiconductor template in the enclosed pressure chamber. A gap between the attached semiconductor substrate and semiconductor template and the top vacuum chuck allowing gas flowing through the gap to generate lifting forces on the attached semiconductor substrate and semiconductor template.

Production method of semiconductor base material and production method of solar cell

When a semiconductor layer formed via a separation layer on a substrate is supported by a support member and a pulling force is then exerted on the support member to mechanically break the separation layer to thereby form a thin-film semiconductor, the substrate is held by vacuum and/or electrostatic attachment and separation of the thin-film epitaxial layer is initiated from an area other than an edge of the substrate. This provides a method capable of obtaining the thin-film epitaxial layer with excellent characteristics in a good yield and permitting repetitive uses of the substrate, without inducing lifting of the substrate due to the separation force overcoming the attaching force of the substrate when producing a semiconductor base material and a solar cell.

Method for producing layered structures on a substrate, substrate and semiconductor components produced according to said method

The invention relates to a method of manufacturing layer-like structures in which a material layer having hollow cavities, preferably a porous material layer, is produced on or out of a substrate consisting, for example, of monocrystalline p-type or n-type Si and in which the layer-like structure, or a part of it, is subsequently provided on the cavity exhibiting or porous material layer. The layer-like structure, or a part of it, is subsequently separated from the substrate using the layer having the hollow cavities, or porous layer, as a point of desired separation, for example through the production of a mechanical strain within or at a boundary surface of the cavity exhibiting or porous layer. The method is characterised in that the surface of the substrate is structured prior to the production of the porous layer, or in that the surface of the porous layer is structured.

Process for producing semiconductor member, and process for producing solar cell

A process for producing a semiconductor member, comprising a first step of forming a porous layer by making porous a first member at its surface portion, leaving some region or regions thereof not made porous; a second step of bonding a semiconductor layer formed on the porous layer and on the first-member surface left not made porous, to a second member to form a bonded structure; and a third step of separating the bonded structure at the part of the porous layer. The first member is made porous leaving some region or regions thereof not made porous so that the porous layer does not cause any separation at the part of the porous layer in the first and second steps. This process can make the semiconductor layer unseparable from the single-crystal silicon member before the separation for transferring the semiconductor layer to the support member side, without setting the anodizing conditions strictly. Also disclosed is a process for producing a solar cell by the above process.

Method of producing a semiconductor layer on a substrate

A method of producing a semiconductor layer onto a semiconductor substrate. The method comprises providing a first semiconductor substrate, and providing a second semiconductor substrate. The method also comprises producing a porous layer, which has a porosity profile, on top of the first semiconductor substrate, and producing a porous layer, which has a porosity profile, on top of the second semiconductor substrate. The method further comprises bringing the porous layer of the second substrate into contact with the porous layer of the first substrate, so as to form a bond between the two substrates, performing a thermal annealing step, and lifting off of the second substrate, leaving a layer of the second substrate's semiconductor material attached to the first substrate.

Method for transferring porous layer, method for making semiconductor devices, and method for making solar battery

A method for transferring a porous layer includes forming a porous layer on one side of a crystalline silicon member by anodization, fixing a supporting substrate onto the surface of the porous layer, and applying force to any one of the supporting substrate and the porous layer, whereby at least part of the porous layer is cleaved from the crystalline silicon member and is transferred onto the supporting substrate. The crystalline silicon member can be recycled and this method is suitable for mass production of semiconductor devices or solar batteries at low cost.

Method for the formation and lift-off of porous silicon layers

A method for the manufacture, formation, and removal of porous layers in a semiconductor substrate having at least a surface acting as a cathode. The method comprises applying a solution comprising negative Fluorine (F − ) ions between the surface of the semiconductor substrate and an anode. The method further comprises applying a predetermined current between the anode and the cathode. The method further comprises maintaining the predetermined current at substantially the same current value for a sufficient amount of time to obtain a low porosity layer at said surface. A high porosity layer positioned under the low porosity layer is also obtained by the method of the invention.

Process for producing semiconductor member, process for producing solar cell, and anodizing apparatus

In a process for producing a semiconductor member, and a solar cell, making use of a thin-film crystal semiconductor layer, the process includes the steps of: (1) anodizing the surface of a first substrate to form a porous layer at least on one side of the substrate, (2) forming a semiconductor layer at least on the surface of the porous layer, (3) removing the semiconductor layer at its peripheral region, (4) bonding a second substrate to the surface of the semiconductor layer, (5) separating the semiconductor layer from the first substrate at the part of the porous layer, and (6) treating the surface of the first substrate after separation and repeating the above steps (1) to (5).

Smoothing method for cleaved films made using a release layer

A method for treating a film of material, which can be defined on a substrate, e.g., silicon. The method includes providing a substrate comprising a cleaved surface, which had a porous silicon layer thereon. The substrate may have a distribution of hydrogen bearing particles defined from the cleaved surface to a region underlying said cleaved surface. The method also includes increasing a temperature of the cleaved surface to greater than about 1,000 Degrees Celsius while maintaining the cleaved surface in a etchant bearing environment to reduce a surface roughness value by about fifty percent and greater. Preferably, the value can be reduced by about eighty or ninety percent and greater, depending upon the embodiment.

Separating apparatus and processing method for plate member

This invention is to guarantee that in separating a plate member such as a bonded substrate stack, a fluid is injected to an appropriate portion of the plate member. While a bonded substrate stack ( 50 ) is rotated, the vertical position of its peripheral portion is measured throughout its perimeter by a measuring device ( 150 ). Then, while the vertical position of a nozzle ( 120 ) is dynamically adjusted on the basis of the measurement result, and at the same time, the bonded substrate stack ( 50 ) is rotated, the bonded substrate stack ( 50 ) is separated into two substrates at a porous layer by injecting a fluid ejected from the nozzle ( 120 ).

Method and apparatus for continuous formation and lift-off of porous silicon layers

A method and apparatus for slicing a semiconductor substrate. In one embodiment, the invention allows repetitive etching of a surface of the semiconductor substrate with a time dependent concentration of fluorine ions and a time dependent current I, such that multiple porous layers are obtained. The porous layer is released, and the released porous layer is removed from the surface of the substrate. The surface roughness of the porous layer is maintained within an acceptable or desired level of roughness value. The invention also provides an apparatus including a container having an etching solution. The semiconductor substrate may be protected by a tube covering at least a potion of said semiconductor substrate from said etching solution. The rate of insertion of said semiconductor substrate into the container is controlled to synchronize the lift-off with the insertion of the correct thickness of the semiconductor substrate. The anodising current is provided between two electrodes during operation.

Substrate release methods and apparatuses

The present disclosure relates to methods and apparatuses for fracturing or breaking a buried porous semiconductor layer to separate a 3-D thin-film semiconductor semiconductor (TFSS) substrate from a 3-D crystalline semiconductor template. The method involves forming a sacrificial porous semiconductor layer on the 3-D features of the template. A variety of techniques may be used to fracture and release the mechanically weak porous semiconductor layer without damaging the TFSS substrate layer or the template layer such as pressure variations, thermal stress generation, and mechanical bending. The methods also allow for processing three dimensional features not possible with current separation processes. Optional cleaning and final lift-off steps may be performed as part of the release step or after the release step.

Substrate processing method

Method for producing layered structures on a substrate, substrate and semiconductor components produced according to said method

The invention relates to a method of manufacturing layer-like structures in which a material layer having hollow cavities, preferably a porous material layer, is produced on or out of a substrate consisting, for example, of monocrystalline p-type or n-type Si and in which the layer-like structure, or a part of it, is subsequently provided on the cavity exhibiting or porous material layer. The layer-like structure, or a part of it, is subsequently separated from the substrate using the layer having the hollow cavities, or porous layer, as a point of desired separation, for example through the production of a mechanical strain within or at a boundary surface of the cavity exhibiting or porous layer. The method is characterized in that the surface of the substrate is structured prior to the production of the porous layer, or in that the surface of the porous layer is structured.

Method for producing layered structures on a substrate, substrate and semiconductor components produced according to said method

The invention relates to a method for producing layered structures, whereby a preferably porous material layer with hollow cavities is produced on or from a monocrystalline p-type or n-type Si substrate. The layered structure or a part thereof is applied to said layer and subsequently, the layered structure or a part thereof is separated from the substrate using said layer as a desired break-off point, e.g. by producing mechanical tension inside said layer or on a boundary surface of said layer. The method is characterized in that the surface of the substrate is structured before the porous layer is produced or that the surface of the porous layer is structured.

Manufacturing method of semiconductor substrate

Techniques for layer transfer processing

Techniques for the fabrication of semiconductor devices are provided. In one aspect, a layer transfer structure is provided. The layer transfer structure comprises a carrier substrate having a porous region with a tuned porosity in combination with an implanted species defining a separation plane therein. In another aspect, a method of forming a layer transfer structure is provided. In yet another aspect, a method of forming a three dimensional integrated structure is provided.

Composite member separating method, thin film manufacturing method, and composite member separating apparatus

본 발명은, 분리층(4) 및 이 분리층위의 이설층(5)을 가진 제 1부재(1)를 제 2부재(2)에 접합해서 형성된 복합부재를, 이 제 1부재(1)와 이 제 2부재(2)사이의 접합계면과는 다른 위치에서 분리하는 복합부재분리방법에 관한 것으로서, 이 방법은 접합계면에 대해서 비대칭인 힘을 상기 복합부재의 단부에 작용시켜서, 복합부재에 제 1부재(1)의 표면으로부터 이설층(5)을 개재해서 분리층(4)까지 뻗는 크랙(7A)을 형성하는 공정, 및 분리층(4)을 따라서 크랙을 성장시킴으로써 복합부재를 완전히 분리하는 공정을 가지고 있다. The present invention relates to a composite member formed by joining a first member (1) having a separation layer (4) and a separating layer (5) on the separation layer to a second member (2). A composite member separation method for separating at a position different from the joining interface between the second members (2), wherein the method is applied to the end of the composite member by applying a force asymmetrical to the joining interface. Forming a crack 7A that extends from the surface of one member 1 to the separating layer 4 via the separating layer 5, and growing the crack along the separating layer 4 to completely separate the composite member. I have a process.

Transfer method of semiconductor thin film layer and preparation method of composite wafer

本发明公开了一种半导体薄膜层的转移方法及复合晶圆的制备方法，包括：在半导体衬底的上表面上制备第一介质层、下表面上制备金属膜层；在第二半导体衬底上制备第二介质层；将第一介质层和第二介质层键合，使第一半导体衬底和第二半导体衬底相结合；在第一半导体衬底的侧面刻蚀沟槽；对第一半导体衬底的下表面金属膜层施加外力，使第一半导体衬底在沟槽处横向晶裂，晶裂后的半导体薄膜层转移到第二半导体衬底上。本发明可实现高质量、大面积、低成本的半导体单晶薄膜层在XOI衬底上的制备；同时，此方法可以重复利用剩余的第一半导体衬底，从第一半导体衬底上分离出多层半导体薄膜层，用于制备多个XOI，大大节约了工业制造成本。

Multi-purpose metallic sealing

본 발명은 최종 기판으로 명명된 기판(107) 상에 반도체 재료로 된 박층(104)을 제작하는 방법에 관한 것으로, 상기 방법은: The present invention relates to a method of fabricating a thin layer (104) of semiconductor material on a substrate (107), designated as the final substrate, which comprises: ㆍ 최초 서포트(101)로 명명된 서포트 상에 상기 반도체 재료로 된 층을 형성하는 단계; Forming a layer of the semiconductor material on a support named initial support (101); ㆍ 금속 본딩에 의해 상기 박층(104) 및 상기 최종 기판(107)을 조립하는 단계; Assembling the thin layer (104) and the final substrate (107) by metal bonding; ㆍ 상기 최초 서포트(101)를 상기 박층(107)으로부터 기계적으로 분리하는 단계를 포함한다. Mechanically separating the initial support 101 from the thin layer 107. LED 또는 LD와 같은 다양한 구성요소를 제작하는데 이용될 수 있는 중간 기판이 얻어진다. 상기 방법은 비파괴적인 기계적 릴리즈의 힘에 의해 재활용될 수 있는 처음의 기판으로부터 최종 기판 상의 박층을 형성할 수 있다. An intermediate substrate is obtained that can be used to fabricate various components, such as LEDs or LDs. The method can form a thin layer on the final substrate from the first substrate that can be recycled by the force of nondestructive mechanical release.

Method of manufacturing a semiconductor article

A method of manufacturing a semiconductor article comprises steps of preparing a first substrate including a silicon substrate having a porous silicon layer and a nonporous semiconductor layer arranged on the porous silicon layer, bonding the first substrate and a second substrate to produce a multilayer structure with the nonporous semiconductor layer located inside, separating the first and second substrates of the multilayer structure from each other along the porous silicon layer by heating the multilayer structure and removing the porous silicon layer remaining on the separated second substrate.

Multipurpose metal sealant

本発明は、最終基板と称する基板（１０７）上に半導体材料の薄層（１０４）を製造する方法であって、最初の支持体（１０１）と称する支持体上に当該半導体材料の層を形成すること；当該薄層（１０４）と、当該最終基板（１０７）とをメタルボンディングにより組み立てること；薄層（１０７）と最初の支持体（１０１）を機械的に分割すること、を含む方法に関する。 得られる中間基板は、例えば、発光ダイオード、レーザーダイオード等の各種部品の製造に使用できる。当該方法では、破壊のない機械的剥離により、リサイクル可能な出発基板から、最終基板上に薄層を製造することができる。 【選択図】図１

A kind of transfer method of semiconductor film layer and the preparation method of composite wafer

本发明公开了一种半导体薄膜层的转移方法及复合晶圆的制备方法，包括：在半导体衬底的上表面上制备第一介质层、下表面上制备金属膜层；在第二半导体衬底上制备第二介质层；将第一介质层和第二介质层键合，使第一半导体衬底和第二半导体衬底相结合；在第一半导体衬底的侧面刻蚀沟槽；对第一半导体衬底的下表面金属膜层施加外力，使第一半导体衬底在沟槽处横向晶裂，晶裂后的半导体薄膜层转移到第二半导体衬底上。本发明可实现高质量、大面积、低成本的半导体单晶薄膜层在XOI衬底上的制备；同时，此方法可以重复利用剩余的第一半导体衬底，从第一半导体衬底上分离出多层半导体薄膜层，用于制备多个XOI，大大节约了工业制造成本。

Flexible display and Method for manufacturing the same

본 발명은 플렉서블 디스플레이 및 그의 제조방법에 관한 것으로, 본 발명의 일 실시예에 따른 플렉서블 디스플레이는 글래스 기판; 상기 글래스 기판 상에 배치된 ITO층; 상기 ITO층 상에 배치된 금속박막층; 상기 금속박막층 상에 배치된 실리콘계 또는 아크릴계로 이루어진 점착체층; 및 상기 점착체층 상에 배치된 플렉서블 기판을 포함한다. The present invention relates to a flexible display and a method of manufacturing the same. A flexible display according to an embodiment of the present invention includes a glass substrate; An ITO layer disposed on the glass substrate; A metal thin film layer disposed on the ITO layer; An adhesive layer made of silicon or acrylic based on the metal thin film layer; And a flexible substrate disposed on the adhesive layer. 본 발명의 일 실시예에 따른 플렉서블 디스플레이의 제조 방법은 글래스 기판 상에 ITO층을 형성하는 단계; 상기 ITO층 상에 금속박막층을 형성하는 단계; 상기 금속박막층 상에 실리콘계 또는 아크릴계로 이루어진 점착체층을 형성하는 단계; 상기 점착체층 상에 플렉서블 기판을 형성하는 단계; 및 상기 글래스 기판 및 상기 ITO층을 상기 금속박막층에서 분리하는 단계를 포함한다. A method of manufacturing a flexible display according to an embodiment of the present invention includes forming an ITO layer on a glass substrate; Forming a metal thin film layer on the ITO layer; Forming a pressure-sensitive adhesive layer made of silicon or acrylic on the metal thin film layer; Forming a flexible substrate on the adhesive layer; And separating the glass substrate and the ITO layer from the metal thin film layer. 플렉서블 디스플레이, 점착제, 금속박막층 Flexible Display, Adhesive, Metal Thin Layer

Semiconductor subtrate and method for producing the same

There are disclosed a semiconductor substrate having a non-porous monocrystalline layer with reduced crystal defects on a porous silicon layer and a method of forming the substrate. The forming method comprises a heat treatment step of heat-treating a porous silicon layer in an atmosphere not containing a silicon-based gas and the step of growing a non-porous monocrystalline layer on the porous silicon layer, wherein the heat treatment is conducted under the conditions such that the etched thickness of the silicon layer is 2 nm or less and that the rate of change r of the surface pore density of the porous silicon layer (r = surface pore density after heat treatment/surface pore density before heat treatment) satisfies the relationship 1/10000 ≤ r ≤ 1.

Micro-technological layer i.e. thin film, transferring method, for use during manufacturing of e.g. optical component, involves carrying out detachment of embrittled zone by application of heat treatment to obtain residues of detached layer

The method involves preparing a substrate (20) comprising a porous layer (11), and forming an embrittled zone (13) between the layer and a free surface. The substrate is adhered on a support substrate (30), and detachment of the layer is carried out by applying mechanical stress to obtain a detached layer made of monocrystalline material. The detached layer is adhered to another support substrate. Detachment of the zone is carried out by applying heat treatment to obtain residues of the detached layer, which are respectively integrated into the support substrates.

SEMICONDUCTOR COMPONENTS, PARTICULARLY OF THE MIXED SOI TYPE, AND METHOD OF MAKING SAME

METHOD FOR MAKING THIN LAYERS OF SEMICONDUCTOR MATERIAL FROM A DONOR WAFER

Un procédé de réalisation de couches minces en matériau choisi parmi les matériaux semiconducteurs à partir d'une plaquette donneuse comprend les étapes suivantes :(a) formation d'une première zone de fragilisation dans la plaquette au-dessous d'une première face de celle-ci et à une profondeur correspondant sensiblement à une épaisseur de couche mince,(b) détachement d'une première couche mince à partir de la plaquette au niveau de la première zone de fragilisation, la première couche mince étant la partie de la plaquette se situant du côté de la première face par rapport à la première zone de fragilisation,(c) formation d'une deuxième zone de fragilisation dans la plaquette au-dessous de la deuxième face de celle-ci et à une profondeur correspondant sensiblement à une épaisseur de couche mince, et(d) détachement d'une deuxième couche mince à partir de la plaquette au niveau de la deuxième zone de fragilisation, la deuxième couche mince étant la partie de la plaquette se situant du côté de la deuxième face par rapport à la deuxième zone de fragilisation.Ces étapes sont enchaînées sans étape intermédiaire de recyclage, de telle sorte qu'on économise les opérations de recyclage.Application notamment à la réalisation de structures semiconducteur-sur-isolant. A process for producing thin layers of a material chosen from semiconductor materials from a donor wafer comprises the following steps: (a) forming a first weakening zone in the wafer below a first face of that here and at a depth corresponding substantially to a thin layer thickness, (b) detachment of a first thin layer from the wafer at the level of the first weakening zone, the first thin layer being the part of the wafer located on the side of the first face with respect to the first zone of weakness, (c) formation of a second zone of weakness in the wafer below the second face of the latter and at a depth corresponding substantially to a thickness thin layer, and (d) detaching a ...

METHOD FOR DETACHING A LAYER

MECHANICAL RECYCLING OF A PLATE COMPRISING A STAMP LAYER AFTER SELECTING A THIN LAYER

Smoothing outline of useful layer of material transferred onto support substrate during forming of composite substrate for, e.g. optics, by allowing receiving face of support substrate to undergo machining to form shoulder prior to bonding

Smoothing the outline of a useful layer of material transferred onto a support substrate during the fabrication of a composite substrate for electronics, optics, or optoelectronics involves, prior to a molecular bonding step, allowing a receiving face of a support substrate to undergo machining to form a shoulder over a portion of its periphery. The shoulder defines an inner projecting zone that has a top face of regular outline. Smoothing the outline of a useful layer (66) of material transferred onto a support substrate (7) during the fabrication of a composite substrate for electronics, optics, or optoelectronics involves molecular bonding of the faces, i.e. front face (600) of a source substrate (6) to the face, i.e. receiving face (700) that faces the support substrate; and transferring a useful layer derived from the source substrate onto the support substrate. Prior to the bonding step, the receiving face of the support undergoes a machining operation to form a shoulder (61) over at least a portion of its periphery. The shoulder defines an inner projecting zone (62) that has a top face (620) of regular outline such that after bonding, the useful layer is transferred to the support substrate with a regular outline.

METHOD FOR OBTAINING A STRUCTURE COMPRISING AT LEAST ONE SUBSTRATE AND AN ULTRAMINO LAYER

L'invention concerne un procédé d'obtention d'une structure comprenant au moins un substrat support (3), une couche ultramince issue d'un substrat source (1) notamment en matériau semi-conducteur et éventuellement une couche intercalaire et comprenant les étapes consistant à :a) coller par adhésion moléculaire un substrat support (3) sur la face avant (10) d'un substrat source (1) qui présente une zone de fragilisation (12) délimitant une couche utile (13) à transférer dont l'épaisseur est notablement plus grande que celle de ladite couche ultramince (130),b) détacher ledit substrat support (3) du reste (14) du substrat source (1), le long de ladite zone de fragilisation (12), de façon à obtenir une structure intermédiaire comprenant au moins ladite couche utile (13) transférée et ledit substrat support (3),c) procéder à l'amincissement de ladite couche utile (13) transférée jusqu'à obtenir ladite couche ultra mince.Application à la fabrication de substrats dans les domaines de l'électronique, l'optoélectronique ou l'optique. The invention relates to a method for obtaining a structure comprising at least one support substrate (3), an ultrathin layer resulting from a source substrate (1) in particular made of semiconductor material and optionally an intermediate layer and comprising the steps consisting of: a) bonding by molecular adhesion a support substrate (3) on the front face (10) of a source substrate (1) which has an embrittlement zone (12) delimiting a useful layer (13) to be transferred, of which the 'thickness is significantly greater than that of said ultrathin layer (130), b) detaching said support substrate (3) from the remainder (14) of the source substrate (1), along said weakening zone (12), so in obtaining an intermediate structure comprising at least said useful layer (13) transferred and said support substrate (3), c) thinning said useful layer (13) transferred until said ultra thin layer is obtained. ...

METHOD FOR SMOOTHING THE CONTOUR OF A USEFUL LAYER OF MATERIAL REFLECTED ON A SUPPORT SUBSTRATE

IMPROVING IMPROVING METHOD FOR ENHANCED SUBSTRATES

Micro-technological layer i.e. thin film, transferring method for use during formation of electronic, optical and mechanical component, involves causing detachment on porous layer so as to obtain transfer layer

The method involves gluing a free surface to an intermediate substrate (20). Detachment is caused on a level of a weakened layer by application of heat energy so as to expose a surface of an initial substrate that is mounted on an additional layer (12). Technological stages are carried out on the surface exposed by the detachment. The exposed surface is glued with a final substrate. Detachment is caused on a level of a silicon porous layer (13) by application of mechanical energy so as to obtain a transfer layer carried by the final substrate and by the intermediate substrate. The detachment is caused by the application of ultrasounds.