Поиск патентов

Настройки

Глубина выборки

Укажите год

Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

Подробнее

Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

Подробнее

Форма поиска

Ключевые слова. Может быть несколько по одной на строку

Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка

Автор

Ведите корректный номера.

Владелец

Ведите корректный номера.

Классы IPC

Ведите корректный номера.

Классы CPC

Ведите корректный номера.

Начиная с года

Укажите год

Заканчивая годом

Укажите год

Применить Всего найдено 26056. Отображено 100.

05-01-2012 дата публикации

Driving circuit and liquid crystal display device including the same

Номер: US20120002146A1

Автор: Jin-Cheol Hong, Min-Hwa Kim

Принадлежит: Individual

A tape carrier package (TCP) includes a film, a plurality of output leads and a plurality of input leads on the film, the plurality of output leads and the plurality of input leads being disposed on different sides, first and second TCP alignment marks arranged on opposing sides of the plurality of output leads, and a third TCP alignment mark at a central portion of the plurality of output leads.

Подробнее

Номер записи: 1

12-01-2012 дата публикации

System-in-a-package based flash memory card

Номер: US20120007226A1

Автор: Hem Takiar, Michael W. Patterson, Robert C. Miller, Shrikar Bhagath, Warren Middlekauff

Принадлежит: SanDisk Technologies LLC

A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to the shape of lids for a finished memory card, such as for example an SD Card. The integrated circuit package may be a system-in-a-package, a multi-chip module, or other arrangement where a complete electronic system is formed in a single package.

Подробнее

Номер записи: 2

26-01-2012 дата публикации

Switching element, variable inductor, and electronic circuit device having circuit configuration incorporating the switching element and the variable inductor

Номер: US20120018842A1

Автор: Hideo Ishihara, Kunihiko Nakajima, Yuichi Sasajima

Принадлежит: TAIYO YUDEN CO LTD

An inexpensive variable inductor has inductance value continuously changeable without reducing a Q value. When a control voltage is applied to a control terminal of a MOS transistor from a power supply, a continuity region is formed in a channel, and a region between main terminals becomes conductive. When the control voltage is changed, length of the continuity region in the channel is changed. This changes length of a path area of an induced current, flowing in an induced current film. Thus, the amount of induced current is increased or decreased. Therefore, when the control voltage of the MOS transistor is changed, the inductance value of the coil is continuously changed.

Подробнее

Номер записи: 3

02-02-2012 дата публикации

Methods of operating electronic devices, and methods of providing electronic devices

Номер: US20120028582A1

Автор: Patrick W. Tandy

Принадлежит: Round Rock Research LLC

Some embodiments include a method disposing an integrated circuit die within a housing, the integrated circuit die having integrated circuitry formed thereon, the integrated circuitry including first transponder circuitry configured to transmit and receive radio frequency signals, wherein the integrated circuit die is void of external electrical connections for anything except power supply external connections; and disposing second transponder circuitry, discrete from the first transponder circuitry, within the housing, the second transponder circuitry being configured to transmit and receive radio frequency signals, wherein the first and second transponder circuitry are configured to establish wireless communication between one another within the housing, the second transponder circuitry being disposed within 24 inches of the first transponder circuitry within the housing.

Подробнее

Номер записи: 4

09-02-2012 дата публикации

Method for fabrication of a semiconductor device and structure

Номер: US20120032294A1

Автор: Brian Cronquist, Deepak C. Sekar, Israel Beinglass, Jan Lodewijk de Jong, Zvi Or-Bach

Принадлежит: Monolithic 3D Inc

A semiconductor device comprising: a first single crystal silicon layer comprising first transistors, first alignment mark, and at least one metal layer overlying said first single crystal silicon layer, wherein said at least one metal layer comprises copper or aluminum more than other materials; a second layer overlying said at least one metal layer, said second layer comprising second transistors, second alignment mark, and a through via through said second layer, wherein said through via is a part of a connection path between said first transistors and said second transistors, wherein alignment of said through via is based on said first alignment mark and said second alignment mark and effected by a distance between said first alignment mark and said second alignment mark.

Подробнее

Номер записи: 5

09-02-2012 дата публикации

Gain Enhanced LTCC System-on-Package for UMRR Applications

Номер: US20120032836A1

Автор: Atif SHAMIM, Farhan Abdul Ghaffar, Khaled Nabil Salama, Muhammad Umair Khalid

Принадлежит: King Abdullah University of Science and Technology KAUST

An apparatus, system, and method for Gain Enhanced LTCC System-on-Package radar sensor. The sensor includes a substrate and an integrated circuit coupled to the substrate, where the integrated circuit is configured to transmit and receive radio frequency (RF) signals. An antenna may be coupled to the integrated circuit and a lens may be coupled to the antenna. The lens may be configured to enhance the gain of the sensor.

Подробнее

Номер записи: 6

16-02-2012 дата публикации

Method for molecular adhesion bonding at low pressure

Номер: US20120038027A1

Автор: Marcel Broekaart

Принадлежит: Soitec SA

The present invention relates to a method for molecular adhesion bonding between at least a first wafer and a second wafer involving aligning the first and second wafers, placing the first and second wafers in an environment having a first pressure (P 1 ) greater than a predetermined threshold pressure; bringing the first wafer and the second wafer into alignment and contact; and initiating the propagation of a bonding wave between the first and second wafer after the wafers are aligned and in contact by reducing the pressure within the environment to a second pressure (P 2 ) below the threshold pressure. The invention also relates to the three-dimensional composite structure that is obtained by the described method of adhesion bonding.

Подробнее

Номер записи: 7

16-02-2012 дата публикации

High-frequency switch

Номер: US20120038411A1

Автор: Hirotsugu Wakimoto, Masanori Ochi, Masayuki Sugiura, Noriyasu Kurihara, Toshiki Seshita, Toshiyuki Shimizu, Yoshio Itagaki, Yoshitomo Sagae

Принадлежит: Toshiba Corp

According to one embodiment, a high-frequency switch includes a high-frequency switch IC chip. The high-frequency switch IC chip has a high-frequency switching circuit section including an input terminal, a plurality of switching elements, a plurality of high-frequency signal lines, and a plurality of output terminals. The input terminal is connected to each of the plurality of output terminals via each of the plurality of switching elements with the high-frequency signal lines having the same lengths. The plurality of output terminals are arranged on a surface at an outer periphery of the high-frequency switch IC chip. The input terminal is arranged on the surface of the high-frequency switch IC chip at the center of the high-frequency switch IC circuit section.

Подробнее

Номер записи: 8

23-02-2012 дата публикации

Authentication device, authentication method, and an information storage medium storing a program

Номер: US20120045114A1

Автор: Kenta Ogawa, Yasuhiro MATSUMARU

Принадлежит: Renesas Electronics Corp

There is provided an authentication device including an authentication information storage unit that stores authentication information acquired from an authentication pattern including a part or the entirety of a mottled pattern or a dot pattern formed over an electronic component as information for indentifying each of a plurality of electronic components, an authentication information acquiring unit that acquires a first authentication information acquired from the authentication pattern formed over a first electronic component that is an object to be authenticated, a search unit that searches whether or not the authentication information storage unit stores the first authentication information by using the first authentication information as a search key, and an output unit that outputs a search result of the search unit.

Подробнее

Номер записи: 9

01-03-2012 дата публикации

Semiconductor structures

Номер: US20120049186A1

Автор: Calvin K. Li, En-Hsing Chen, Paul Wai Kie Poon, Yung-Tin Chen

Принадлежит: En-Hsing Chen, Li Calvin K, Paul Wai Kie Poon, Yung-Tin Chen

Test structures are formed during semiconductor processing with a single mask that is used in a manner that also allows alignment marks to be formed which do not interfere with one another as subsequent layers are patterned. The test structures can provide insight into performance characteristics of different types of devices as the semiconductor process proceeds.

Подробнее

Номер записи: 10

08-03-2012 дата публикации

Baluns for rf signal conversion and impedance matching

Номер: US20120056297A1

Автор: Petteri Litmanen, Richard Francis Taylor, Siraj Akhtar

Принадлежит: Texas Instruments Inc

A magnetically-coupled structure is integrated with an integrated circuit in back end-of-line (BEOL) digital CMOS fabrication processes. A differential primary (or secondary) coil is formed by patterning a thick copper (Cu) metal layer, and a single-ended secondary (or primary) coil is formed by patterning a thick aluminum (Al) top metal bonding layer. Crossovers and/or cross-unders are formed using thin metal layers. One embodiment provides a stacked balun with a differential primary input winding defined in the copper layer, directly underneath a single-ended spiral winding defined in the aluminum layer. The spiral forms the single-ended secondary output of the balun and is rotated by 90° to prevent metal shorting for its cross-under connections. Another embodiment provides a transformer with one differential primary (or secondary) coil defined in the copper layer and another differential secondary (or primary) coil defined in the aluminum layer and adding a center tap. The position of the tap is selected to compensate for phase differences and provide desired balance.

Подробнее

Номер записи: 11

15-03-2012 дата публикации

Power amplifier circuit

Номер: US20120062325A1

Автор: Joong Jin NAM, Jun Goo WON, Ki Joong KIM, Seong Geon KIM, Youn Suk Kim

Принадлежит: Samsung Electro Mechanics Co Ltd

There is provided a power amplifier circuit capable of improving cross isolation between a high frequency band power coupler and a low frequency band power coupler, by directly transmitting power to the high frequency band power coupler and the low frequency band power coupler from a power amplifier, and forming a predetermined inductance circuit or an LC resonance circuit in a line transmitting the power to the high frequency band power coupler. The power amplifier circuit may include a power amplifying unit supplied with power from the outside and amplifying an input signal, a coupling unit having a high frequency band power coupler and a low frequency band power coupler, and an isolation unit including a first power line and a second power line, wherein the first power line has an inductor blocking signal interference generated in a predetermined frequency band.

Подробнее

Номер записи: 12

15-03-2012 дата публикации

Semiconductor package integrated with conformal shield and antenna

Номер: US20120062439A1

Автор: Chi-Hong Chan, Kuo-Hsien Liao, Shih Fuyu

Принадлежит: Advanced Semiconductor Engineering Inc

A semiconductor package integrated with conformal shield and antenna is provided. The semiconductor package includes a semiconductor element, an electromagnetic interference shielding element, a dielectric structure, an antenna element and an antenna signal feeding element. The electromagnetic interference shielding element includes an electromagnetic interference shielding film and a grounding element, wherein the electromagnetic interference shielding film covers the semiconductor element and the grounding element is electrically connected to the electromagnetic interference shielding layer and a grounding segment of the semiconductor element. The dielectric structure covers a part of the electromagnetic interference shielding element and has an upper surface. The antenna element is formed adjacent to the upper surface of the dielectric structure. The antenna signal feeding element passing through the dielectric structure electrically connects the antenna element and the semiconductor element.

Подробнее

Номер записи: 13

15-03-2012 дата публикации

Thermal interface material application for integrated circuit cooling

Номер: US20120063094A1

Автор: Dong G. Kam, Duixian Liu, Michael A. Gaynes, Scott K. Reynolds

Принадлежит: International Business Machines Corp

Techniques provide improved thermal interface material application in an assembly associated with an integrated circuit package. For example, an apparatus comprises an integrated circuit module, a printed circuit board, and a heat transfer device. The integrated circuit module is mounted on a first surface of the printed circuit board. The printed circuit board has at least one thermal interface material application via formed therein in alignment with the integrated circuit module. The heat transfer device is mounted on a second surface of the printed circuit board and is thermally coupled to the integrated circuit module. The second surface of the printed circuit board is opposite to the first surface of the printed circuit board.

Подробнее

Номер записи: 14

22-03-2012 дата публикации

Massively Parallel Interconnect Fabric for Complex Semiconductor Devices

Номер: US20120068229A1

Автор: Farhang Yazdani, Majid Bemanian

Принадлежит: Individual

An embodiment of this invention uses a massive parallel interconnect fabric (MPIF) at the flipped interface of a core die substrate (having the core logic blocks) and a context die (used for in circuit programming/context/customization of the core die substrate), to produce ASIC-like density and FPGA-like flexibility/programmability, while reducing the time and cost for development and going from prototyping to production, reducing cost per die, reducing or eliminating NRE, and increasing performance. Other embodiments of this invention enable debugging complex SoC through large contact points provided through the MPIF, provide for multi-platform functionality, and enable incorporating FGPA core in ASIC platform through the MPIF. Various examples are also given for different implementations.

Подробнее

Номер записи: 15

22-03-2012 дата публикации

Multi-function and shielded 3d interconnects

Номер: US20120068327A1

Автор: Belgacem Haba, Craig Mitchell, Ilyas Mohammed, Piyush Savalia, Vage Oganesian

Принадлежит: TESSERA RESEARCH LLC

A microelectronic unit includes a semiconductor element consisting essentially of semiconductor material and having a front surface, a rear surface, a plurality of active semiconductor devices adjacent the front surface, a plurality of conductive pads exposed at the front surface, and an opening extending through the semiconductor element. At least one of the conductive pads can at least partially overlie the opening and can be electrically connected with at least one of the active semiconductor devices. The microelectronic unit can also include a first conductive element exposed at the rear surface for connection with an external component, the first conductive element extending through the opening and electrically connected with the at least one conductive pad, and a second conductive element extending through the opening and insulated from the first conductive element. The at least one conductive pad can overlie a peripheral edge of the second conductive element.

Подробнее

Номер записи: 16

22-03-2012 дата публикации

High speed digital interconnect and method

Номер: US20120068890A1

Автор: Baher S. Haroun, Marco Corsi, Nirmal C. Warke, Siraj Akhtar

Принадлежит: Texas Instruments Inc

In some developing interconnect technologies, such as chip-to-chip optical interconnect or metal waveguide interconnects, misalignment can be a serious issue. Here, however, a interconnect that uses an on-chip directional antenna (which operates in the sub-millimeter range) to form a radio frequency (RF) interconnect through a dielectric waveguide is provided. This system allows for misalignment while providing the increased communication bandwidth.

Подробнее

Номер записи: 17

22-03-2012 дата публикации

Identification circuit and method for generating an identification bit using physical unclonable functions

Номер: US20120072476A1

Автор: Marco Bucci, Raimondo Luzzi

Принадлежит: INFINEON TECHNOLOGIES AG

An embodiment of the present invention is an identification circuit installed on an integrated circuit for generating an identification bit, comprising a first circuit to generate a first output signal that is based on random parametric variations in said first circuit, a second circuit to generate a second output signal that is based on random parametric variations in said second circuit, a third circuit capable to be operated in an amplification mode and in a latch mode, wherein in said amplification mode the difference between the first output signal and the second output signal is amplified to an amplified value and, wherein in said latch mode said amplified value is converted into a digital signal.

Подробнее

Номер записи: 18

19-04-2012 дата публикации

Rf bus controller

Номер: US20120093132A1

Автор: Ahmadreza (Reza) Rofougaran

Принадлежит: Broadcom Corp

A radio frequency (RF) bus controller includes an interface and a processing module. The interface is coupled for communicating intra-device RF bus access requests and allocations. The processing module is coupled to receive an access request to an RF bus via the interface; determine RF bus resource availability; and when sufficient RF bus resources are available to fulfill the access request, allocate, via the interface, at least one RF bus resource in response to the access request.

Подробнее

Номер записи: 19

10-05-2012 дата публикации

Template, method of forming template, and method of manufacturing semiconductor device

Номер: US20120112370A1

Автор: Yoshihito Kobayashi

Принадлежит: Individual

According to one embodiment, a template includes a pattern part which is provided on a substrate and corresponds to a pattern of a semiconductor device, the pattern of the semiconductor device being to be transferred to a wafer, and an alignment mark part which is provided on the substrate, used for positioning of the substrate with respect to the wafer. The alignment mark part has a refractive index that is higher than a refractive index of the substrate.

Подробнее

Номер записи: 20

10-05-2012 дата публикации

Chemical-mechanical polishing wafer and method of use

Номер: US20120115398A1

Автор: James Bopp

Принадлежит: Individual

The present invention is directed to systems and methods for assisting personnel in discerning which side of a dummy wafer has been polished more and for differentiating one side of a dummy wafer from the other. In a preferred embodiment, dummy wafers include a first plurality of depth indicia on a first surface and a second plurality of depth indicia on a second opposing surface. In one embodiment, each of the depth indicia of the first plurality of depth indicia extends a depth into the dummy wafer beyond the first surface, and each of the depth indicia of the second plurality of depth indicia extends a depth into the dummy wafer beyond the second surface. Other embodiments include depth indicia of the first plurality of depth indicia located at depths beyond the first surface that each have a corresponding depth indicia in the second plurality of depth indicia located at a substantially similar depth beyond the second surface. In other embodiments, each of the depth indicia of the first and second pluralities of depth indicia are located at different depths.

Подробнее

Номер записи: 21

17-05-2012 дата публикации

Semiconductor Device And Method Of Manufacturing Semiconductor Device

Номер: US20120119338A1

Автор: Shintaro Yamamichi, Takahito Watanabe, Yoshitaka USHIYAMA

Принадлежит: Renesas Electronics Corp

A semiconductor chip includes a magnetic storage device and includes an electrode pad on a first face. The semiconductor chip is coated with a magnetic shield layer in a state in which at least the electrode pad is exposed. The semiconductor chip is mounted on an interconnect substrate through a bump. At least one of the semiconductor chip and the interconnect substrate includes a convex portion, and the bump is disposed over the convex portion.

Подробнее

Номер записи: 22

24-05-2012 дата публикации

System comprising a semiconductor device and structure

Номер: US20120129301A1

Автор: Brian Cronquist, Deepak C. Sekar, Israel Beinglass, Paul Lim, Ze'ev Wurman, Zvi Or-Bach

Принадлежит: Monolithic 3D Inc

A method of manufacturing a semiconductor device, the method including, providing a first monocrystalline layer including semiconductor regions, overlaying the first monocrystalline layer with an isolation layer, transferring a second monocrystalline layer comprising semiconductor regions to overlay the isolation layer, wherein the first monocrystalline layer and the second monocrystalline layer are formed from substantially different crystal materials; and subsequently etching the second monocrystalline layer as part of forming at least one transistor in the second monocrystalline layer.

Подробнее

Номер записи: 23

31-05-2012 дата публикации

Radiofrequency amplifier

Номер: US20120133442A1

Автор: Igor Blednov

Принадлежит: NXP BV

An integrated radiofrequency amplifier with an operational frequency includes first and second Doherty amplifiers each having a main device, and a peak device connected at respective inputs and outputs by respective phase shift elements configured to provide a 90 degree phase shift at the operational frequency. An input of the amplifier is connected to the input of the main device of the first Doherty amplifier, an output of the amplifier is connected to the outputs of the peak devices of the first and second Doherty amplifiers and the input of the peak device of the first Doherty amplifier is connected to the input of the main device of the second Doherty amplifier by a phase shift element providing a 90 degree phase shift at the operational frequency.

Подробнее

Номер записи: 24

14-06-2012 дата публикации

Overlay vernier mask pattern, formation method thereof, semiconductor device including overlay vernier pattern, and formation method thereof

Номер: US20120146195A1

Автор: Joon Seuk LEE

Принадлежит: Hynix Semiconductor Inc

An overlay vernier mask pattern of a semiconductor device includes a first overlay vernier mask pattern having a first opening for exposing a first area of a layer to be etched on a substrate and a second opening for exposing a second area spaced apart from the first area, and a second overlay vernier mask pattern aligned on the first overlay vernier mask pattern and the layer to be etched, and having an opening for exposing the second opening while exposing a portion of the layer to be etched in the first area.

Подробнее

Номер записи: 25

14-06-2012 дата публикации

Semiconductor device manufacturing method that allows rework rate in manufacturing step to decrease

Номер: US20120149135A1

Автор: Shinji Yanagi, Takashi Sugimura

Принадлежит: Elpida Memory Inc

A semiconductor device manufacturing method includes: forming a first pattern in a first film to be processed on a semiconductor substrate; measuring a first distance, which is a dimension in a predetermined direction in the first pattern; forming a second film to be processed on the first pattern; forming a second pattern in a photoresist formed on the second film to be processed; and measuring a second distance, which is a dimension in a predetermined direction in the second pattern. Whether or not the second pattern is defective is determined based on either the first distance or a value calculated from the first and second distances.

Подробнее

Номер записи: 26

21-06-2012 дата публикации

Integrated millimeter wave transceiver

Номер: US20120154238A1

Автор: Jean-François Carpentier, Patrice Garcia, Pierre Busson, Pierre Dautriche, Sebastien Pruvost

Принадлежит: STMICROELECTRONICS SA

A millimeter wave transceiver including a plate forming an interposer having its upper surface supporting an interconnection network and having its lower surface intended to be assembled on a printed circuit board by bumps; an integrated circuit chip assembled on the upper surface of the interposer; antennas made of tracks formed on the upper surface of the interposer; and reflectors on the upper surface of the printed circuit board in front of each of the antennas, the effective distance between each antenna and the reflector plate being on the order of one quarter of the wavelength, taking into account the dielectric constants of the interposed materials.

Подробнее

Номер записи: 27

28-06-2012 дата публикации

Semiconductor Device and Method of Forming Integrated Passive Device Over Semiconductor Die with Conductive Bridge and Fan-Out Redistribution Layer

Номер: US20120161279A1

Автор: Kai Liu, KANG Chen, Yaojian Lin

Принадлежит: Stats Chippac Pte Ltd

A semiconductor device has a first semiconductor die. A first inductor is formed over the first semiconductor die. A second inductor is formed over the first inductor and aligned with the first inductor. An insulating layer is formed over the first semiconductor die and the first and second inductors. A conductive bridge is formed over the insulating layer and electrically connected between the second inductor and the first semiconductor die. In one embodiment, the semiconductor device has a second semiconductor die and a conductive layer is formed between the first and second semiconductor die. In another embodiment, a capacitor is formed over the first semiconductor die. In another embodiment, the insulating layer has a first thickness over a footprint of the first semiconductor die and a second thickness less than the first thickness outside the footprint of the first semiconductor die.

Подробнее

Номер записи: 28

28-06-2012 дата публикации

Method of manufacturing semiconductor device including plural semiconductor chips stacked together

Номер: US20120164788A1

Автор: Akira Ide

Принадлежит: Elpida Memory Inc

Such a method is disclosed that includes preparing first and second semiconductor chips, the first semiconductor chip including a first electrode formed on one surface thereof and a second electrode formed on the other surface thereof so as to overlap the first electrode as viewed from a stacking direction, and the second semiconductor chip including a third electrode formed on one surface thereof and a fourth electrode formed on the other surface thereof so as not to overlap the third electrode as viewed from the stacking direction, and stacking the first and second semiconductor chips in the stacking direction so that the second electrode is connected to the third electrode by using a bonding tool including a concave at a position corresponding to the fourth electrode.

Подробнее

Номер записи: 29

05-07-2012 дата публикации

Rf identification device with near-field-coupled antenna

Номер: US20120171953A1

Автор: Alberto Pagani, Alessandro Finocchiaro, Giovanni Girlando, Giuseppe Ferla, Giuseppe Palmisano

Принадлежит: STMICROELECTRONICS SRL

An embodiment of a RF identification device is formed by a tag and by a reader. The tag is formed by a processing circuit and a first antenna, which has the function both of transmitting and of receiving data. The reader is formed by a control circuit and by a second antenna, which has the function both of transmitting and of receiving data. The processing circuit is formed by a resonance capacitor, a modulator, a rectifier circuit, a charge-pump circuit and a detection circuit. The antenna of the tag and the processing circuit are integrated in a single structure in completely monolithic form. The first antenna has terminals connected to the input of the rectifier circuit, the output of which is connected to the charge-pump circuit. The charge-pump circuit has an output connected to the detection circuit.

Подробнее

Номер записи: 30

12-07-2012 дата публикации

Alignment marks to enable 3d integration

Номер: US20120175789A1

Автор: Emily R. Kinser, Kevin R. Winstel, Kevin S. Patrarca, Mukta G. Farooq, Richard P. Volant, Robert Hannon, Troy L. Graves-Abe, William F. Landers

Принадлежит: International Business Machines Corp

Disclosed are a structure including alignment marks and a method of forming alignment marks in three dimensional (3D) structures. The method includes forming apertures in a first surface of a first semiconductor substrate; joining the first surface of the first semiconductor substrate to a first surface of a second semiconductor substrate; thinning the first semiconductor on a second surface of the first semiconductor substrate to provide optical contrast between the apertures and the first semiconductor substrate; and aligning a feature on the second surface of the first semiconductor substrate using the apertures as at least one alignment mark.

Подробнее

Номер записи: 31

26-07-2012 дата публикации

Integrated structures of high performance active devices and passive devices

Номер: US20120192139A1

Автор: Anthony K. Stamper, Daniel S. Vanslette, Robert M. Rassel

Принадлежит: International Business Machines Corp

Integrated structures having high performance CMOS active devices mounted on passive devices are provided. The structure includes an integrated passive device chip having a plurality of through wafer vias, mounted to a ground plane. The structure further includes at least one CMOS device mounted on the integrated passive device chip using flip chip technology and being grounded to the ground plane through the through wafer vias of the integrated passive device chip.

Подробнее

Номер записи: 32

23-08-2012 дата публикации

Microwave unit and method therefore

Номер: US20120211487A1

Автор: Bengt Madeberg, Leif Bergstedt

Принадлежит: Huawei Technologies Co Ltd

A microwave unit comprising a motherboard and a package adapted to be assembled automatically in, e.g., a Surface Mounted Device, SMD, machine is disclosed. The microwave unit preferably comprises a connecting component interconnecting the motherboard and the package, and operable to make the signal ways on a same level at both the motherboard and at the package. Furthermore, the microwave unit preferably comprises a micro-strip adapted soldering tag for soldering on two sides.

Подробнее

Номер записи: 33

30-08-2012 дата публикации

Vertical ballast technology for power hbt device

Номер: US20120218047A1

Автор: Julio Costa, Michael Carroll

Принадлежит: RF Micro Devices Inc

Power amplification devices are disclosed having a vertical ballast configuration to prevent thermal runaway in at least one stack of bipolar transistors formed on a semiconductor substrate. To provide a negative feedback to prevent thermal runaway in the bipolar transistors, a conductive layer is formed over and coupled to the stack. A resistivity of the conductive layer provides an effective resistance that prevents thermal runaway in the bipolar transistors. The vertical placement of the conductive layer allows for vertical heat dissipation and thus provides ballasting without concentrating heat.

Подробнее

Номер записи: 34

06-09-2012 дата публикации

System and method for physically detecting counterfeit electronics

Номер: US20120226463A1

Автор: Jason Galyardt, Stephen Dorn Freeman, Walter J. Keller, III

Принадлежит: Nokomis Inc

A system for inspecting or screening electrically powered device includes a signal generator inputting a preselected signal into the electrically powered device. There is also an antenna array positioned at a pre-determined distance above the electrically powered device. Apparatus collects RF energy emitted by the electrically powered device in response to input of said preselected signal. The signature of the collected RF energy is compared with an RF energy signature of a genuine part. The comparison determines one of a genuine or a counterfeit condition of the electrically powered device.

Подробнее

Номер записи: 35

27-09-2012 дата публикации

Magnetic integration double-ended converter

Номер: US20120241959A1

Автор: Leif Bergstedt

Принадлежит: Huawei Technologies Co Ltd

The present invention relates to a method of bonding a chip to an external electric circuit. The conductors of the external electric circuit for connection to the chip are formed with physical extensions and the chip is directly bonded to these extensions. The invention also relates to an electric device comprising at least one chip and an external electric circuit. The chip is directly bonded to physical extensions of conductors of the external electric circuit.

Подробнее

Номер записи: 36

04-10-2012 дата публикации

Integrated circuit package including miniature antenna

Номер: US20120249380A1

Автор: Carles Puente Baliarda, Carmen Borja Borau, Jaume Anguera Pros, Jordi Soler Castany

Принадлежит: Fractus SA

The present invention relates to an integrated circuit package comprising at least one substrate, each substrate including at least one layer, at least one semiconductor die, at least one terminal, and an antenna located in the integrated circuit package, but not on said at least one semiconductor die. The conducting pattern comprises a curve having at least five sections or segments, at least three of the sections or segments being shorter than one-tenth of the longest free-space operating wavelength of the antenna.

Подробнее

Номер записи: 37

11-10-2012 дата публикации

On-Chip RF Shields with Backside Redistribution Lines

Номер: US20120258594A1

Автор: Gottfried Beer, Hans-Joachim Barth, Heinrich Koerner, Jens Pohl

Принадлежит: Individual

Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, a method of fabricating the system on chip includes forming a through substrate opening from a back surface of a substrate, the through substrate opening disposed between a first and a second region, the first region comprising devices for RF circuitry and the second region comprising devices for other circuitry. The method further includes forming patterns for redistribution lines on a photo resist layer, the photo resist layer disposed under the back surface, and filling the through substrate opening and the patterns for redistribution lines with a conductive material.

Подробнее

Номер записи: 38

25-10-2012 дата публикации

Impedance matching arrangement for amplifier having split shunt capacitor and amplifier including the same

Номер: US20120268210A1

Автор: Kohei Fujii

Принадлежит: Avago Technologies Wireless IP Singapore Pte Ltd

An amplifier having an operating frequency includes: an input port and an output port; three gain elements, each having an input terminal and an output terminal; an input matching network; and an output matching network. The input matching network includes: a first microstrip line which is connected to the input port and is an inductor at the operating frequency; a second microstrip line extending between the input terminals of the three gain elements; and a first split shunt capacitor connecting the first microstrip line to the second microstrip line. The output matching network includes: a third microstrip line which is connected to the output port and is an inductor at the operating frequency; a fourth microstrip line extending between the output terminals of the three gain elements; and a second split shunt capacitor connecting the third microstrip line to the fourth microstrip line.

Подробнее

Номер записи: 39

08-11-2012 дата публикации

Processing Signals by Couplers Embedded in an Integrated Circuit Package

Номер: US20120280763A1

Автор: Ahmadreza Rofougaran

Принадлежит: Broadcom Corp

Methods and systems for processing signals via directional couplers embedded in a package are disclosed and may include generating via a directional coupler, one or more output RF signals that may be proportional to a received RF signal. The directional coupler may be integrated in a multi-layer package. The generated RE signal may be processed by an integrated circuit electrically coupled to the multi-layer package. The directional coupler may include quarter wavelength transmission lines, which may include microstrip or coplanar structures. The directional coupler may be electrically coupled to one or more variable capacitances in the integrated circuit. The variable capacitance may include CMOS devices in the integrated circuit. The directional coupler may include discrete devices, which may be surface mount devices coupled to the multi-layer package or may be devices integrated in the integrated circuit. The integrated circuit may be flip-chip bonded to the multi-layer package.

Подробнее

Номер записи: 40

15-11-2012 дата публикации

Apparatus and methods for electronic amplification

Номер: US20120286878A1

Автор: Alan W. Ake, David Dening

Принадлежит: Skyworks Solutions Inc

Apparatus and methods for electronic amplification are disclosed herein. In certain implementations, an amplifier is provided for amplifying a RF signal, and the amplifier includes a first transistor and a second transistor electrically connected in a Darlington configuration. The first and second transistors can be, for example, bipolar or field effect transistors and the first transistor can amplify an input signal and provide the amplified input signal to the second transistor. The first and second transistors are electrically connected to a power low node such as a ground node through first and second bias circuits, respectively. In certain implementations, the first transistor includes an inductor disposed in the path from the first transistor to the power low voltage. By including the inductor in the path from the first transistor to the ground node, the third order distortion of the amplifier can be improved.

Подробнее

Номер записи: 41

22-11-2012 дата публикации

Semiconductor device, manufacturing method thereof, and mobile telephone

Номер: US20120295668A1

Автор: Hiroshi Koguma, Takashi Kitahara

Принадлежит: Renesas Electronics Corp

Provided is a technology capable of inhibiting a shield film formed over a surface of a sealing body from peeling from the surface of the sealing body, and inhibiting a part of the shield film from bulging from the surface of the sealing body. The present invention is characterized in that a peeling-prevention-mark formation region is provided so as to surround a product-identification-mark formation region, and a plurality of peeling prevention marks are formed in the peeling-prevention-mark formation region. That is, the present invention is characterized in that the region of the surface region of the sealing body which is different from the product-identification-mark formation region is defined as the peeling-prevention-mark formation region, and the peeling prevention marks are formed in the peeling-prevention-mark formation region.

Подробнее

Номер записи: 42

29-11-2012 дата публикации

Semiconductor device

Номер: US20120299178A1

Автор: Ko Kanaya, Yoshihiro Tsukahara

Принадлежит: Mitsubishi Electric Corp

A semiconductor device includes: a main body chip; a circuit pattern on a front surface of the main body chip and including a first pad; a cap chip including a first recess in a front surface of the cap chip and a second recess in a back surface of the cap chip, the cap chip being joined to the main body chip with the first recess facing the circuit pattern; a second pad on a bottom surface of the first recess of the cap chip; a first metallic member inlaid in the second recess of the cap chip; a first through electrode electrically connecting the second pad to the first metallic member through the cap chip; and a bump electrically connecting the first pad to the second pad.

Подробнее

Номер записи: 43

27-12-2012 дата публикации

Through wafer vias and method of making same

Номер: US20120329219A1

Автор: Alvin Jose Joseph, Anthony Kendall Stamper, Hanyi Ding

Принадлежит: International Business Machines Corp

A method of forming and structure for through wafer vias and signal transmission lines formed of through wafer vias. The method of forming through wafer vias includes forming an array of through wafer vias comprising at least one electrically conductive through wafer via and at least one electrically non-conductive through wafer via through a semiconductor substrate having a top surface and an opposite bottom surface, each through wafer via of the array of through wafer vias extending from the top surface of the substrate to the bottom surface of the substrate.

Подробнее

Номер записи: 44

10-01-2013 дата публикации

Alignment mark, semiconductor having the alignment mark, and fabricating method of the alignment mark

Номер: US20130009328A1

Автор: Hung-Sheng Yu, Jia-Luen Peng, Tai-Ho Wang

Принадлежит: FocalTech Systems Co Ltd

An alignment mark with a sheet or a layer of copper, which is compatible with a copper process, is provided herein. In one embodiment, a whole sheet of copper (Cu) is used as a background of the alignment mark, by which the color of the background of the alignment mark is stable and reliable. By such arrangement, the contrast between colors of a main pattern and the background of the alignment mark can be significantly improved, without considering a problem the homogeneity of manufacturing process. If the alignment mark is applied for manufacturing of a display, a recognition successful rate of alignment to attach an integrated circuit (IC) to a panel of the display is increased.

Подробнее

Номер записи: 45

10-01-2013 дата публикации

Thermal enhanced package

Номер: US20130011964A1

Автор: Chenglin Liu, Shiann-Ming Liou

Принадлежит: MARVELL WORLD TRADE LTD

A method of manufacturing an integrated circuit package. The method includes attaching a first surface of a semiconductor die to a thermally and/or electrically conductive substrate, forming a plurality of die connectors on a second surface of the semiconductor die, and encapsulating the semiconductor die and the plurality of die connectors in an encapsulant material. The method also includes removing a portion of the encapsulant material to expose one or more of the plurality of die connectors, thereby forming a routing surface. The method further includes forming a plurality of conductive traces on the routing surface. Each of the plurality of conductive traces is characterized by a first portion in electrical communication with one of the plurality of die connectors and a second portion in electrical communication with a package connector.

Подробнее

Номер записи: 46

17-01-2013 дата публикации

Adhesive film for semiconductor device, film for backside of flip-chip semiconductor, and dicing tape-integrated film for backside of semiconductor

Номер: US20130017396A1

Автор: Fumiteru Asai, Goji Shiga, Naohide Takamoto

Принадлежит: Nitto Denko Corp

Provided is an adhesive film for a semiconductor device that is capable of having the same physical properties as these at the time of manufacture even after it is stored for a long time. The adhesive film for a semiconductor device of the present invention contains a thermosetting resin, and in which the amount of reaction heat generated in a temperature range of ±80° C. of a reaction heat peak temperature measured by a differential scanning calorimeter after the adhesive film is stored at 25° C. for 4 weeks is 0.8 to 1 time the amount of reaction heat generated before storage.

Подробнее

Номер записи: 47

07-02-2013 дата публикации

Disguising test pads in a semiconductor package

Номер: US20130033284A1

Автор: Arie Frenklakh

Принадлежит: SanDisk Technologies LLC

A method of forming a semiconductor package is disclosed including disguising the test pads. Test pads are defined in the conductive pattern of the semiconductor package for allowing electrical test of the completed package. The test pads are formed in shapes such as letters or objects so that they are less recognizable as test pads.

Подробнее

Номер записи: 48

14-02-2013 дата публикации

Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication

Номер: US20130037802A1

Автор: Luke G. England, Michel Koopmans, Paul A. Silvestri

Принадлежит: Micron Technology Inc

Methods of fabricating multi-die assemblies including a base semiconductor die bearing a peripherally encapsulated stack of semiconductor dice of lesser lateral dimensions, the dice vertically connected by conductive elements between the dice, resulting assemblies, and semiconductor devices comprising such assemblies.

Подробнее

Номер записи: 49

14-02-2013 дата публикации

Fabrication method of packaging substrate having through-holed interposer embedded therein

Номер: US20130040427A1

Автор: Dyi-chung Hu, Tzyy-Jang Tseng, Yu-Shan Hu

Принадлежит: Unimicron Technology Corp

A packaging substrate having a through-holed interposer embedded therein and a fabrication method of the packaging substrate are provided, where the packaging substrate includes: a molding layer having opposite first and second surfaces; a through-holed interposer embedded in the molding layer and flush with the second surface; a redistribution-layer structure embedded in the molding layer and disposed on the through-holed interposer and having a plurality of electrode pads exposed from the first surface of the molding layer; and a built-up structure disposed on the second surface of the molding layer and electrically connected to the through-holed interposer.

Подробнее

Номер записи: 50

28-02-2013 дата публикации

Electrically measurable on-chip ic serial identifier and methods for producing the same

Номер: US20130048981A1

Автор: Alexandre Jean-Marie Bessemoulin

Принадлежит: Individual

An apparatus comprising an integrated circuit, an interconnect layer within said integrated circuit, and one or more connections. The integrated circuit may be configured to provide an electrically measurable interconnect pattern by enabling one or more of a plurality of components. The one or more connections may each configured to enable a respective one of the components. The connections may be programmable while the apparatus is part of a wafer. The interconnect pattern may be configured to identify the apparatus after the apparatus has been manufactured.

Подробнее

Номер записи: 51

28-02-2013 дата публикации

Semiconductor Device and Method of Manufacturing a Semiconductor Device Including Grinding Steps

Номер: US20130049205A1

Автор: David O'Sullivan, Klaus Reingruber, Thorsten Meyer

Принадлежит: Intel Mobile Communications GmbH

A method of manufacturing a device includes providing a semiconductor chip having a first face and a second face opposite to the first face with a contact pad arranged on the first face. The semiconductor chip is placed on a carrier with the first face facing the carrier. The semiconductor chip is encapsulated with an encapsulation material. The carrier is removed and the semiconductor material is removed from the second face of the first semiconductor chip without removing encapsulation material at the same time.

Подробнее

Номер записи: 52

28-02-2013 дата публикации

Layer Alignment in FinFET Fabrication

Номер: US20130052793A1

Автор: Kuei-Liang Lu, Ming-Feng Shieh

Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

Methods for aligning layers more accurately for FinFETs fabrication. An embodiment of the method, comprises: forming a plurality of dummy line features and a plurality of spacer elements according to a first pattern; removing portions of the plurality of spacer elements and portions of the plurality of dummy line features according to a second pattern; defining a reference area by removing some unwanted spacer elements according to a third pattern; aligning a front-end-of-line (FEOL) layer in X direction with the reference area defined by the third pattern; and aligning the FEOL layer in Y direction with the plurality of spacer elements defined by the first pattern. The reference area may be an active area or an alignment mask. The plurality of dummy line features and the plurality of spacer elements are formed on a substrate. The FEOL layer may be a poly layer or a shield layer.

Подробнее

Номер записи: 53

07-03-2013 дата публикации

Semiconductor device

Номер: US20130056730A1

Автор: Satoshi Goto, Satoshi Sakurai, Toru Fujioka

Принадлежит: Individual

A technique capable of promoting miniaturization of an RF power module used in a mobile phone etc. is provided. A directional coupler is formed inside a semiconductor chip in which an amplification part of the RF power module is formed. A sub-line of the directional coupler is formed in the same layer as a drain wire coupled to the drain region of an LDMOSFET, which will serve as the amplification part of the semiconductor chip. Due to this, the predetermined drain wire is used as a main line and the directional coupler is configured by a sub-line arranged in parallel to the main line via an insulating film, together with the main line.

Подробнее

Номер записи: 54

04-04-2013 дата публикации

Semiconductor package including an integrated waveguide

Номер: US20130082379A1

Автор: Ahmadreza Rofougaran, Arya Reza Behzad, Jesus Alfonso Castaneda, Michael BOERS, Sam Ziqun Zhao

Принадлежит: Broadcom Corp

Methods and apparatus are disclosed for wirelessly communicating among integrated circuits and/or functional modules within the integrated circuits. A semiconductor device fabrication operation uses a predetermined sequence of photographic and/or chemical processing steps to form one or more functional modules onto a semiconductor substrate. The functional modules are coupled to an integrated waveguide that is formed onto the semiconductor substrate and/or attached thereto to form an integrated circuit. The functional modules communicate with each other as well as to other integrated circuits using a multiple access transmission scheme via the integrated waveguide. One or more integrated circuits may be coupled to an integrated circuit carrier to form Multichip Module. The Multichip Module may be coupled to a semiconductor package to form a packaged integrated circuit.

Подробнее

Номер записи: 55

04-04-2013 дата публикации

Method for producing semiconductor device and semiconductor device

Номер: US20130082408A1

Автор: Mitsufumi Naoe

Принадлежит: Fujitsu Semiconductor Ltd

A method for producing semiconductor device includes: performing first, second and third exposures of a photoresist film formed on a semiconductor wafer via a mask; wherein: first, second and third shot regions respectively defined by the first, second and third exposures are aligned in a first direction; the mask has a shot region including a peripheral scribe region having a first and second side crossing the first direction; the photoresist film is of positive type, a first pattern is formed as a light shielding pattern disposed on the first side, and a second pattern is formed as a light transmitting region disposed on the second side; the first and second exposures are performed in such a manner that the first and second patterns do not overlap each other; and the second and third exposures are performed in such a manner that the first and second patterns overlap each other.

Подробнее

Номер записи: 56

18-04-2013 дата публикации

Packaging structure and method of fabricating the same

Номер: US20130093629A1

Автор: Chao-Ya Yang, Chih-Hsien Chiu, Tsung-Hsien Tsai

Принадлежит: Siliconware Precision Industries Co Ltd

A packaging structure and a method of fabricating the same are provided. The packaging structure includes a substrate, first packaging element disposed on the substrate, a second packaging element disposed on the substrate and spaced apart from the first packaging element, a first antenna disposed on the first packaging element, and a metal layer formed on the second packaging element. The installation of the metal layer and the antenna enhances the electromagnetic shielding effect.

Подробнее

Номер записи: 57

25-04-2013 дата публикации

Antenna-printed circuit board package

Номер: US20130099006A1

Автор: ALEXANDER Goudelev, Kwang-Hyun Baek, Won-Bin Hong, Young-Hwan Kim

Принадлежит: SAMSUNG ELECTRONICS CO LTD

An antenna-printed circuit board (PCB) package is provided. The antenna-PCB package includes a PCB; an antenna portion formed on an upper surface of the PCB and inside the PCB; and a radio frequency integrated circuit (RFIC) chip bonded to a lower surface of the PCB.

Подробнее

Номер записи: 58

25-04-2013 дата публикации

Magnetic nano-multilayers for magnetic sensors and manufacturing method thereof

Номер: US20130099780A1

Автор: Houfang Liu, Qinli Ma, Xiufeng Han

Принадлежит: Institute of Physics of CAS

The invention discloses a magnetic nano-multilayers structure and the method for making it. The multilayer film includes—sequentially from one end to the other end—a substrate, a bottom layer, a magnetic reference layer, a space layer, a magnetic detecting layer and a cap layer. The, up-stated structure is for convert the information of the rotation of the magnetic moment of the magnetic detecting layer into electrical signals. The magnetic detecting layer is of a pinning structure to react to the magnetic field under detection. On the other hand, the invention sandwiches an intervening layer between the AFM and the FM to mitigate the pinning effect from the exchange bias. Moreover, the thickness of the intervening layer is adjustable to control the pinning effect from the exchange bias. The controllability ensures that the magnetic moments of the magnetic reference layer and the magnetic detecting layer remain at right angles to each other when the external field is zero. The invention achieves a GMR or TMR magnetic sensor exhibiting a linear response and by tuning the thickness of the non-magnetic metallic layer, the sensitivity as well as the detecting range of the devices can be tuned easily.

Подробнее

Номер записи: 59

25-04-2013 дата публикации

Semiconductor device and fabrication method therefore

Номер: US20130100318A1

Автор: Junji Tanaka, Kouichi Meguro, Masanori Onodera

Принадлежит: SPANSION LLC

Various embodiments of the present invention include a semiconductor device and a fabrication method therefore, the semiconductor device including a first semiconductor chip disposed on a substrate, a first sealing resin sealing the first semiconductor chip, a built-in semiconductor device disposed on the first sealing resin, and a second sealing resin sealing the first sealing resin and the built-in semiconductor device and covering a side surface of the substrate. According to an aspect of the present invention, it is possible to provide a high-quality semiconductor device and a fabrication method therefore, in which downsizing and cost reduction can be realized.

Подробнее

Номер записи: 60

02-05-2013 дата публикации

Semiconductor structure

Номер: US20130105920A1

Автор: Anthony K. Stamper, Daniel R. Miga, Russell T. Herrin

Принадлежит: International Business Machines Corp

Micro-Electro-Mechanical System (MEMS) structures, metrology structures and methods of manufacture are disclosed. The method includes forming one or metrology structure, during formation of a device in a chip area. The method further includes venting the one or more metrology structure after formation of the device.

Подробнее

Номер записи: 61

02-05-2013 дата публикации

Semiconductor Device and Method of Forming Interposer Frame Over Semiconductor Die to Provide Vertical Interconnect

Номер: US20130105989A1

Автор: Reza A. Pagaila, Seng Guan Chow, Seung Uk Yoon

Принадлежит: Stats Chippac Pte Ltd

A semiconductor device has a first semiconductor die mounted over a carrier. An interposer frame has an opening in the interposer frame and a plurality of conductive pillars formed over the interposer frame. The interposer is mounted over the carrier and first die with the conductive pillars disposed around the die. A cavity can be formed in the interposer frame to contain a portion of the first die. An encapsulant is deposited through the opening in the interposer frame over the carrier and first die. Alternatively, the encapsulant is deposited over the carrier and first die and the interposer frame is pressed against the encapsulant. Excess encapsulant exits through the opening in the interposer frame. The carrier is removed. An interconnect structure is formed over the encapsulant and first die. A second semiconductor die can be mounted over the first die or over the interposer frame.

Подробнее

Номер записи: 62

02-05-2013 дата публикации

Mask, manufacturing method thereof and mask haze monitoring method

Номер: US20130108948A1

Автор: Huayong Hu, Shijian Zhang

Принадлежит: Semiconductor Manufacturing International Beijing Corp

A mask and methods for making the mask and monitoring mask haze using the mask are provided. The mask includes chip areas that are separated by scribe lanes. A scribe lane includes a monitoring area that contains a primary pattern and an associated assist feature. The assist feature includes two parallel scattering bars. Regions in the monitoring area other than the primary pattern and the associated assist feature are covered with a phase shift layer having a transmittance smaller than that of the primary pattern and the assist feature. When the mask is exposed to a light source, the assist feature is not transferred onto a wafer but cooperates with the primary pattern to generate a primary transferred pattern on the wafer. When a region between the two scattering bars has mask haze thereon, a defect identification pattern is generated on the wafer near the primary transferred pattern following exposure.

Подробнее

Номер записи: 63

23-05-2013 дата публикации

Semiconductor Device and Method of Laser-Marking Laminate Layer Formed Over EWLB With Tape Applied to Opposite Surface

Номер: US20130127039A9

Автор: Glenn Omandam, Hin Hwa Goh, Yaojian Lin

Принадлежит: Stats Chippac Pte Ltd

A semiconductor device has a semiconductor die with a plurality of bumps formed on contact pads disposed over its active surface. An encapsulant is formed over the semiconductor die. An interconnect structure is formed over the semiconductor die and encapsulant. The semiconductor die is mounted to a translucent tape with the bumps embedded in the translucent tape. The translucent tape has layers of polyolefin, acrylic, and polyethylene terephthalate. A back surface of the semiconductor die undergoes backgrinding to reduce die thickness. The tape undergoes UV curing. A laminate layer is formed over the back surface of the semiconductor die. The laminate layer undergoes oven curing. The laminate layer is laser-marked while the tape remains applied to the bumps. The tape is removed after laser-marking the laminate layer. Alternately, the tape can be removed prior to laser-marking. The tape reduces die warpage during laser-marking.

Подробнее

Номер записи: 64

30-05-2013 дата публикации

Interposer and semiconductor package with noise suppression features

Номер: US20130134553A1

Автор: Chewn-Pu Jou, Feng Wei KUO, Huan-Neng CHEN, Hui Yu Lee, Yen-Jen Chen, Yu-Ling Lin

Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

Interposer and semiconductor package embodiments provide for the isolation and suppression of electronic noise such as EM emissions in the semiconductor package. The interposer includes shield structures in various embodiments, the shield structures blocking the electrical noise from the noise source, from other electrical signals or devices. The shields include solid structures and some embodiments and decoupling capacitors in other embodiments. The coupling structures includes multiple rows of solder balls included in strips that couple the components and surround and contain the source of electrical noise.

Подробнее

Номер записи: 65

30-05-2013 дата публикации

Structure for High-Speed Signal Integrity in Semiconductor Package with Single-Metal-Layer Substrate

Номер: US20130134579A1

Автор: Gregory E. Howard, Marie-Solange Anne Milleron, Matthew D. Romig, Souvik Mukherjee

Принадлежит: Texas Instruments Inc

A semiconductor chip ( 101 ) with bond pads ( 110 ) on a substrate ( 103 ) with rows and columns of regularly pitched metal contact pads ( 131 ). A zone comprises a first pair ( 131 a, 131 b ) and a parallel second pair ( 131 c, 131 d ) of contact pads, and a single contact pad ( 131 e ) for ground potential; staggered pairs of stitch pads ( 133 ) connected to respective pairs of adjacent contact pads by parallel and equal-length traces ( 132 a, 132 b , etc.). Parallel and equal-length bonding wires ( 120 a, 120 b , etc.) connect bond pad pairs to stitch pad pairs, forming differential pairs of parallel and equal-length conductor lines. Two differential pairs in parallel and symmetrical position form a transmitter/receiver cell for conducting high-frequency signals.

Подробнее

Номер записи: 66

06-06-2013 дата публикации

Wireless ic device

Номер: US20130140369A1

Автор: Masahiro Ozawa, Yuya DOKAI

Принадлежит: Murata Manufacturing Co Ltd

A wireless IC device that improves radiation gain without increasing substrate size and easily adjusts impedance, includes a multilayer substrate including laminated base layers. On a side of an upper or first main surface of the multilayer substrate, a wireless IC element is arranged to process a high-frequency signal. On a side of a lower or second main surface of the multilayer substrate, a first radiator is provided and is coupled to the wireless IC element via a feeding circuit including first interlayer conductors. On the side of the first main surface, a second radiator is provided and is coupled to the first radiator via second interlayer conductors.

Подробнее

Номер записи: 67

20-06-2013 дата публикации

Electrical Contact Alignment Posts

Номер: US20130157455A1

Автор: David John Russell, David Justin West

Принадлежит: International Business Machines Corp

An electronic apparatus and method of fabrication of the apparatus, the apparatus including a first electronic device having an interconnection surface with a first plurality of interconnection pads extending from the surface by a first distance and a second plurality of alignment posts extending from the surface by a second distance greater than the first distance, and a second electrical device having an interconnection surface with a first plurality of electrical interconnection pads, each pad arranged to contact a corresponding first electronic device interconnection surface pad upon assembly of the first electronic device interconnection surface upon the second electronic device interconnection surface, the second electronic device interconnection surface including a third plurality of alignment posts, each located to be adjacent to at least one of the first electronic device alignment posts upon assembly.

Подробнее

Номер записи: 68

20-06-2013 дата публикации

Integrated circuit comprising an integrated transformer of the "balun" type with several input and output channels

Номер: US20130157587A1

Автор: Christophe Arricastres, Denis Pache, Floria Blanchet

Принадлежит: STMICROELECTRONICS SA

An integrated circuit includes an integrated transformer of the balanced-to-unbalanced type with N channels, wherein N is greater than 2. The integrated transformer includes, on a substrate, N inductive circuits that are mutually inductively coupled, and respectively associated with N channels.

Подробнее

Номер записи: 69

27-06-2013 дата публикации

Semiconductor device

Номер: US20130163206A1

Автор: Narue Kobayashi, Tomoharu Fujii, Yukiharu Takeuchi

Принадлежит: Shinko Electric Industries Co Ltd

A semiconductor device includes a structure in which a semiconductor element (chip) is mounted in a cavity formed in a wiring board with an adhesive interposed between the chip and a bottom surface of the cavity, and electrode terminals of the chip are connected via wires to wiring portions formed on the board around the cavity. The chip is mounted in close contact with a side wall of the cavity, the side wall being near a region where a wiring for higher frequency compared with other wirings within the wiring portion is formed. A recessed portion is provided in a region of the bottom surface of the cavity, and a thermal via extending from the bottom surface of the recessed to the outside of the board is provided, the region being near a portion where the chip is in close contact.

Подробнее

Номер записи: 70

27-06-2013 дата публикации

Circuit substrate

Номер: US20130163212A1

Автор: Gohki NISHIMURA, Naoyuki Tasaka, Sachiko Tanaka

Принадлежит: TAIYO YUDEN CO LTD

A circuit substrate includes: a laminate substrate in which a conductive layer and an insulating layer are laminated; a filter chip that has an acoustic wave filter and is provided inside of the laminate substrate; and an active component that is provided on a surface of the laminate substrate and is connected with the filter chip, at least a part of the active component overlapping with a projected region that is a region of the filter chip projected in a thickness direction of the laminate substrate.

Подробнее

Номер записи: 71

01-08-2013 дата публикации

Devices and methods related to electrostatic discharge-protected cmos switches

Номер: US20130194158A1

Автор: Ying-Kuang Chen

Принадлежит: Skyworks Solutions Inc

Disclosed are devices and methods related to a CMOS switch for radio-frequency (RF) applications. In some embodiments, the switch can be configured to include a resistive body-floating circuit to provide improved power handling capability. The switch can further include an electrostatic discharge (ESD) protection circuit disposed relative to the switch to provide ESD protection for the switch. Such a switch can be implemented for different switching applications in wireless devices such as cell phones, including band-selection switching and transmit/receive switching.

Подробнее

Номер записи: 72

01-08-2013 дата публикации

Transmission line transition having vertical structure and single chip package using land grip array coupling

Номер: US20130194754A1

Автор: Dong-Hyun Lee, Dong-Yun Jung, Jei-Young Lee, Ji-Hoon Kim, Jung-han Choi, Sung-Tae Choi, Young-Hwan Kim

Принадлежит: SAMSUNG ELECTRONICS CO LTD

An apparatus for a single chip package using Land Grid Array (LGA) coupling is provided. The apparatus includes a multi-layer substrate, at least one integrated circuit chip, and a Printed Circuit Board (PCB). The a multi-layer substrate has at least one substrate layer, has at least one first chip region and at least one second chip region in a lowermost substrate layer, configures a transmission line transition of a vertical structure for transmitting a signal from at least one integrated circuit chip coupled in the first chip region in a coaxial shape or in a form of a Co-Planar Waveguide guide (CPW), and has an LGP coupling pad for connecting with a Printed Circuit Board (PCB) in the lowermost layer. The at least one integrated circuit chip is coupled in the first chip region and the second chip region. The PCB is connected with the multi-layer substrate using the LGA coupling via the LGA coupling pad.

Подробнее

Номер записи: 73

29-08-2013 дата публикации

Method For Processing Semiconductors Using A Combination Of Electron Beam And Optical Lithography

Номер: US20130221365A1

Автор: Kamal Tabatabaie, Paul J. Duval, William J. Davis

Принадлежит: Raytheon Co

Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the formed metal alignment mark to form a second, different feature for the semiconductor using electron beam lithography. In one embodiment, the first feature is an ohmic contact, the second feature is a Schottky contact, the metal alignment mark is a refractory metal or a refractory metal compound having an atomic weight greater than 60 such as TaN and the semiconductor device is a GaN semiconductor device. A semiconductor structure having a metal alignment mark on a zero layer of the structure, the metal alignment mark is a TaN and the semiconductor is GaN.

Подробнее

Номер записи: 74

29-08-2013 дата публикации

Semiconductor package, and information processing apparatus and storage device including the semiconductor packages

Номер: US20130222401A1

Автор: Keiju YAMADA, Koh Hashimoto, Koji Akita, Takayoshi Ito, Yukako Tsutsumi

Принадлежит: Toshiba Corp

According to the embodiments, a semiconductor package includes a semiconductor chip, a first conductive layer, a second conductive layer, and a power feeder. The semiconductor chip is provided on a substrate, is sealed with a resin, and contains a transmission/reception circuit. The first conductive layer is grounded and covers a first region on a surface of the resin. The second conductive layer is not grounded and covers a second region on the surface of the resin other than the first region. A power feeder electrically connects the semiconductor chip to the second conductive layer.

Подробнее

Номер записи: 75

12-09-2013 дата публикации

Flip-chip packaging techniques and configurations

Номер: US20130234344A1

Автор: Frank J. Juskey, Paul D. Bantz, Robert C. Hartmann

Принадлежит: Triquint Semiconductor Inc

Embodiments of the present disclosure flip-chip packaging techniques and configurations. An apparatus may include a package substrate having a plurality of pads formed on the package substrate, the plurality of pads being configured to receive a corresponding plurality of interconnect structures formed on a die and a fluxing underfill material disposed on the package substrate, the fluxing underfill material comprising a fluxing agent configured to facilitate formation of solder bonds between individual interconnect structures of the plurality of interconnect structures and individual pads of the plurality of pads and an epoxy material configured to harden during formation of the solder bonds to mechanically strengthen the solder bonds. Other embodiments may also be described and/or claimed.

Подробнее

Номер записи: 76

26-09-2013 дата публикации

Apparatus and method of separating wafer from carrier

Номер: US20130248119A1

Автор: Chien Ling Hwang, Chung-Shi Liu, Lin-Wei Wang

Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A method of separating a wafer from a carrier includes placing a wafer assembly on a platform. The wafer assembly includes the wafer, the carrier, and a layer of wax between the wafer and the carrier. A wafer frame is mounted on the wafer of the wafer assembly. The layer of wax is softened. The wafer and the wafer frame mounted thereon are separated, by a first robot arm, from the carrier.

Подробнее

Номер записи: 77

03-10-2013 дата публикации

Semiconductor wafer and semiconductor device

Номер: US20130256839A1

Автор: Haruhisa Saito, Yoshitaka Tadaki

Принадлежит: Olympus Corp

A semiconductor wafer may include: a disk-shaped wafer body made of silicon; and an identification trench section having at least one trench and provided at a periphery section of the wafer body, wherein the trench is opened in the periphery of the wafer body, and has a depth less than a thickness of the wafer body.

Подробнее

Номер записи: 78

03-10-2013 дата публикации

Stacked module

Номер: US20130257565A1

Автор: Satoshi Masuda

Принадлежит: Fujitsu Ltd

A stacked module includes a first multilayer substrate including an opening having a stepwise wall face, and a first transmission line including a first grounding conductor layer, a second multilayer substrate supported on a stepped portion of the stepwise wall face and including a second transmission line including a second grounding conductor layer, a first chip mounted on a bottom of the opening and coupled to a third transmission line provided on the first multilayer substrate, and a second chip mounted on the front face of the second multilayer substrate and coupled to the second transmission line. A face to which the second grounding conductor layer or a fourth grounding conductor layer coupled thereto is exposed is joined to the stepped portion to which the first grounding conductor layer or a third grounding conductor layer coupled thereto is exposed, and the first and second grounding conductor layers are coupled.

Подробнее

Номер записи: 79

03-10-2013 дата публикации

Power recovery circuit based on partial standing waves

Номер: US20130260708A1

Автор: Ahmadreza Rofougaran

Принадлежит: Broadcom Corp

A power recovery system includes a transmission line that is coupled to transfer an RF signal received via an antenna. The RF signal generates a partial standing wave in the transmission line and the transmission line has at least one standing wave anti-node. A power recovery circuit converts an anti-node signal from the at least one standing wave anti-node to a power signal.

Подробнее

Номер записи: 80

10-10-2013 дата публикации

Interchip communication using a dielectric waveguide

Номер: US20130265732A1

Автор: Baher S. Haroun, Hassan Ali, Juan A. Herbsommer, Marco Corsi, Robert F. Payne

Принадлежит: Texas Instruments Inc

An apparatus is provided. There is a circuit assembly with a package substrate and an integrated circuit (IC). The package substrate has a microstrip line, and the IC is secured to the package substrate and is electrically coupled to the microstrip line. A circuit board is also secured to the package substrate. A dielectric waveguide is secured to the circuit board. The dielectric waveguide has a dielectric core that extends into a transition region located between the dielectric waveguide and the microstrip line, and the microstrip line is configured to form a communication link with the dielectric waveguide.

Подробнее

Номер записи: 81

10-10-2013 дата публикации

Interchip communication using an embedded dielectric waveguide

Номер: US20130265733A1

Автор: Baher S. Haroun, Hassan Ali, Juan A. Herbsommer, Marco Corsi, Robert F. Payne

Принадлежит: Texas Instruments Inc

An apparatus is provided. There is a circuit assembly with a package substrate and an integrated circuit (IC). The package substrate has a microstrip line, and the IC is secured to the package substrate and is electrically coupled to the microstrip line. A circuit board is also secured to the package substrate. A dielectric waveguide is secured to the circuit board. The dielectric waveguide has a dielectric core that extends into a transition region located between the dielectric waveguide and the microstrip line, and the microstrip line is configured to form a communication link with the dielectric waveguide.

Подробнее

Номер записи: 82

17-10-2013 дата публикации

Wiring substrate, manufacturing method thereof, and semiconductor package

Номер: US20130269185A1

Автор: Junichi Nakamura, Kazuhiro Kobayashi

Принадлежит: Shinko Electric Industries Co Ltd

A disclosed wiring substrate includes an insulating layer, a recess formed on a surface of the insulating layer, and an alignment mark formed inside of the recess, wherein a face of the alignment mark is roughened, recessed from the surface of the insulating layer, and exposed from the recess.

Подробнее

Номер записи: 83

24-10-2013 дата публикации

Dielectric conduits for ehf communications

Номер: US20130278360A1

Автор: Emilio Sovero, Gary D. McCormack, Ian A. Kyles, Mau-Chung Frank Chang, Yanghyo Kim

Принадлежит: Keyssa Inc

Dielectric conduits for the propagation of electromagnetic EHF signals include an elongate body of a dielectric material extending continuously along a longitudinal axis between a first terminus and a second terminus. At each point along the longitudinal axis, an orthogonal cross-section of the elongate body has a first dimension along a major axis of the cross-section, where the major axis extends along the largest dimension of the cross-section. The orthogonal cross-section also has a second dimension along a minor axis of the cross-section, where the minor axis extends along a widest dimension of the cross-section that is at a right angle to the major axis. For each cross-section of the elongate body, the first dimension is greater than the wavelength of the electromagnetic EHF signals and the second dimension is less than the wavelength of the electromagnetic EHF signals.

Подробнее

Номер записи: 84

31-10-2013 дата публикации

Method for producing semiconductor device

Номер: US20130288428A1

Автор: Eiji Toyoda, Kosuke Morita, Takashi Oda

Принадлежит: Nitto Denko Corp

A method for producing a semiconductor device, including a semiconductor chip, for improving production efficiency and the flexibility of production design is provided. The method comprises: preparing a semiconductor chip having a first main surface on which an electroconductive member is formed; preparing a supporting structure in which, over a support configured to transmit radiation, a radiation curable pressure-sensitive adhesive layer and a first thermosetting resin layer are laminated in this order; arranging the semiconductor chips on the first thermosetting resin layer to face the first thermosetting resin layer to a second main surface of the semiconductor chips opposite to the first main surface; laminating a second thermosetting resin layer over the first thermosetting resin layer to cover the semiconductor chips; and curing the radiation curable pressure-sensitive adhesive layer by irradiating from the support side to peel the radiation curable pressure-sensitive adhesive layer from the first thermosetting resin layer.

Подробнее

Номер записи: 85

07-11-2013 дата публикации

Interlayer communications for 3d integrated circuit stack

Номер: US20130293292A1

Автор: Andre Schaefer, Guido Droege, Niklas Linkewitsch

Принадлежит: Intel Corp

Some embodiments provide capacitive AC coupling inter-layer communications for 3D stacked modules.

Подробнее

Номер записи: 86

21-11-2013 дата публикации

Wafer-level process for fabricating photoelectric modules

Номер: US20130309801A1

Автор: Chun-Chiang Yen, Guan-Fu LU, Hsu-Liang Hsiao

Принадлежит: CENTERA PHOTONICS Inc

A wafer-level process for fabricating a plurality of photoelectric modules is provided. The wafer-level process includes at least following procedures. Firstly, a wafer including a plurality of chips arranged in an array is provided. Next, a plurality of photoelectric devices are mounted on the chips. Next, a cover plate including a plurality of covering units arranged in an array is provided. Next, a plurality of light guiding mediums are formed over the cover plate. Next, the cover plate is bonded with the wafer by an adhesive, wherein each of the covering units covers and bonds with one of the chips, and the light guiding mediums are sandwiched between the cover plate and the wafer. Then, the wafer and the cover plate are diced to obtain the plurality of photoelectric modules.

Подробнее

Номер записи: 87

28-11-2013 дата публикации

Multi-stacked bbul package

Номер: US20130313727A1

Автор: Eng Huat Goh, Hoay Tien Teoh

Принадлежит: Intel Corp

A method including forming a first portion of a build-up carrier on at least one first die, the at least one first die; coupling at least one second die to the first portion of the build-up carrier, the at least one second die separated from the first die by the at least one layer of conductive material disposed between layers of dielectric material; and after coupling the at least one second die to the first portion of the build-up carrier, forming a second portion of the build-up carrier on the at least one second die. An apparatus including a build-up carrier including including alternating layers of conductive material and dielectric material and at least two dice therein in different planes of the build-up carrier.

Подробнее

Номер записи: 88

05-12-2013 дата публикации

Mimo antenna device, antenna and antenna package

Номер: US20130321234A1

Автор: Ken-Huang Lin, Tzu-Chun Tang, Tzyy-Sheng Horng

Принадлежит: National Sun Yat Sen University

A multi-input and multi-output antenna device is disclosed. The MIMO antenna device comprises two antennas symmetrically disposed on a substrate. Each antenna comprises a T-shaped feeding unit, a radiation unit and a ground unit. The T-shaped feeding unit and the radiation unit are disposed on a first surface of the substrate. The T-shaped feeding unit forms a strip portion and a top portion. The radiation unit has first and second ends. The radiation unit extends from the first end to the second end to form a rectangular region and a spacing. The first end extends parallel to the top portion. The ground unit is disposed along two sides of the strip portion and electrically coupled to the second end. The two strip portions of the two T-shaped feeding units are parallel to and aligned with each other. The two ground units are electrically connected to each other.

Подробнее

Номер записи: 89

26-12-2013 дата публикации

Electrical module for being received by automatic placement machines by means of generating a vacuum

Номер: US20130343006A1

Автор: Claus Reitlinger, Felix Hudlberger, Frank Rehme, Michael Gerner, Thomas Kerssebrock, Thomas Klingl

Принадлежит: EPCOS AG

The invention relates to an electrical module ( 100 ) for being received by automatic placement machines by means of generating a vacuum, comprising a carrier substrate ( 10 ), at least one component ( 20, 21 ) disposed on the carrier substrate ( 10 ), and a cover element ( 30 ) disposed above the at least one component ( 20, 21 ). A fixing component ( 40 ) by which the cover element ( 30 ) is attached to the at least one component ( 21 ) is disposed between the cover element ( 30 ) and the at least one component ( 21 ). The cover element can be implemented as a dimensionally stable, flat film by means of which it is possible to suction the module by means of vacuum for a placement method, and to place said module at a position on a circuit board.

Подробнее

Номер записи: 90

26-12-2013 дата публикации

Process-compensated hbt power amplifier bias circuits and methods

Номер: US20130344825A1

Автор: David Steven Ripley, Hongxiao Shao, Matthew Thomas Ozalas, Peter J. Zampardi, JR., Philip John Lehtola, Tin Myint Ko

Принадлежит: Skyworks Solutions Inc

The present disclosure relates to a system for biasing a power amplifier. The system can include a first die that includes a power amplifier circuit and a passive component having an electrical property that depends on one or more conditions of the first die. Further, the system can include a second die including a bias signal generating circuit that is configured to generate a bias signal based at least in part on measurement of the electrical property of the passive component of the first die.

Подробнее

Номер записи: 91

02-01-2014 дата публикации

Die Attach Pick Error Detection

Номер: US20140002128A1

Автор: Balamurugan Subramanian, Dale Ohmart, Renato Heracleo Orduna Leano, Ronald Jay V. Peralta, Sonny Evangelista Dipasupil

Принадлежит: Texas Instruments Inc

Embodiments of the invention provide a method to detect pick and place indexing errors on each manufacturing batch (lot) of semiconductor wafer processed during a die attach process using a preselected skeleton of check die. The known locations of the check skeleton die are verified during picking of die from the wafer. If the check skeleton cannot be correctly verified at the known locations, then a pick error is indicated. The embodiments may be implemented on existing die attach equipment.

Подробнее

Номер записи: 92

16-01-2014 дата публикации

Semiconductor device and manufacturing method of same

Номер: US20140015150A1

Автор: Teruhiko YATSUSHIRO

Принадлежит: Toyota Motor Corp

A semiconductor device manufacturing method includes forming a film on at least a portion of one surface of a semiconductor wafer, forming an alignment mark by providing a recessed portion on the film, and adhering a sheet to the one surface of the semiconductor wafer on which the alignment mark is formed.

Подробнее

Номер записи: 93

30-01-2014 дата публикации

Integrated circuit and display device including the same

Номер: US20140027861A1

Автор: Ho Seok HAN, Ho Suk Maeng

Принадлежит: Samsung Display Co Ltd

An integrated circuit that includes a substrate, a semiconductor layer arranged on the substrate and an insulating layer arranged on an upper portion of the semiconductor layer and including a bump provided on an upper surface thereof, wherein the semiconductor layer includes a main semiconductor area and an including an internal alignment mark including a p-type semiconductor that is overlapped by a metallic external alignment mark arranged on the upper surface of the insulating layer. The p-type semiconductor internal alignment mark can be viewed by an infrared camera during a mounting process of the integrated circuit.

Подробнее

Номер записи: 94

30-01-2014 дата публикации

Semiconductor device and manufacturing method thereof

Номер: US20140027873A1

Автор: Keiichiro Kashihara

Принадлежит: Renesas Electronics Corp

A semiconductor device and a manufacturing method thereof are provided which can suppress corrosion by chemicals in processes, while preventing generation of thermal stress on a mark. A semiconductor device includes a semiconductor layer with a front-side main surface and a back-side main surface opposed to the front-side main surface, a plurality of light receiving elements formed in the semiconductor layer for performing photoelectric conversion, a light receiving lens disposed above the back-side main surface for supplying light to the light receiving element, and a mark formed inside the semiconductor layer. The mark extends from the front-side main surface to the back-side main surface. The mark has a deeply located surface recessed toward the front-side main surface rather than the back-side main surface. The deeply located surface is formed of silicon.

Подробнее

Номер записи: 95

06-02-2014 дата публикации

Semiconductor integrated circuit and pattern layouting method for the same

Номер: US20140035108A1

Автор: Kazuya Kamon

Принадлежит: Renesas Electronics Corp

A semiconductor integrated circuit and a pattern lay-outing method for the same are disclosed, which can suppress bending or partial drop-out of a dummy pattern even when a mechanical stress acts on the dummy pattern in CMP. The semiconductor integrated circuit includes predetermined functional areas and a dummy pattern formed in a space area. The space area is positioned between predetermined functional areas. The dummy pattern includes a first metal portion formed in the shape of a frame and defining an outer edge of the dummy pattern, a second metal portion positioned on an inner periphery side of the first metal portion and formed so as to be continuous with the first metal portion, and a plurality of non-forming areas positioned in an area where the second metal portion is not formed on the inner periphery side of the first metal portion.

Подробнее

Номер записи: 96

06-02-2014 дата публикации

Semiconductor device and display device having alignment mark

Номер: US20140035171A1

Автор: chun-ping Yang, Da-Pong Zhang

Принадлежит: Fitipower Integrated Technology Inc

An exemplary display device includes a transparent substrate and a semiconductor device bonded to the transparent substrate. The transparent substrate includes a first alignment mark. The semiconductor device includes a substrate and a second alignment mark positioned on the substrate. The second alignment mark includes a first pattern structure positioned on the substrate and a second pattern structure positioned on the first pattern structure. The first pattern structure includes a plurality of first non-transparent marks. The second pattern structure includes a second pattern surrounded by the first non-transparent marks. The second pattern is an alignable shape that corresponds to a shape of the first alignment mark on the transparent substrate.

Подробнее

Номер записи: 97

13-02-2014 дата публикации

Method and Apparatus for a Clock and Signal Distribution Network for a 60 GHz Transmitter System

Номер: US20140043104A1

Автор: Jiashu Chen

Принадлежит: Tensorcom Inc

Herein is presented, a low power on-die 60 GHz distribution network for a beamforming system that can be scaled as the number of transmitters increases. The transmission line based power splitters and quadrature hybrids whose size would be proportional to a quarter wavelength (˜600 μm) if formed using transmission lines are instead constructed by inductors/capacitors and reduce the area by more than 80%. An input in-phase I clock and an input quadrature Q clock are combined into a single composite clock waveform locking the phase relation between the in-phase I clock and quadrature Q clock. The composite clock is transferred over a single transmission line formed using a Co-planar Waveguide (CPW) coupling the source and destination locations over the surface of a die. Once the individuals the in-phase I and quadrature Q clocks are required, they can be generated at the destination from the composite clock waveform.

Подробнее

Номер записи: 98

27-02-2014 дата публикации

Method of manufacturing semiconductor device

Номер: US20140054759A1

Автор: Hiroyoshi Taya, Tadatoshi Danno, Yoshiharu Shimizu

Принадлежит: Renesas Electronics Corp

A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.

Подробнее

Номер записи: 99

06-03-2014 дата публикации

Method for molecular adhesion bonding at low pressure

Номер: US20140065759A1

Автор: Marcel Broekaart

Принадлежит: Soitec SA

A method for bonding first and second wafers by molecular adhesion. The method includes placing the wafers in an environment having a first pressure (P1) greater than a predetermined threshold pressure above which initiation of bonding wave propagation is prevented, bringing the first wafer and the second wafer into alignment and contact, and spontaneously initiating the propagation of a bonding wave between the wafers after they are in contact solely by reducing the pressure within the environment to a second pressure (P2) below the threshold pressure.

Подробнее

Номер записи: 100