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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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Применить Всего найдено 1518. Отображено 100.
15-03-2012 дата публикации

Power amplifier circuit

Номер: US20120062325A1
Принадлежит: Samsung Electro Mechanics Co Ltd

There is provided a power amplifier circuit capable of improving cross isolation between a high frequency band power coupler and a low frequency band power coupler, by directly transmitting power to the high frequency band power coupler and the low frequency band power coupler from a power amplifier, and forming a predetermined inductance circuit or an LC resonance circuit in a line transmitting the power to the high frequency band power coupler. The power amplifier circuit may include a power amplifying unit supplied with power from the outside and amplifying an input signal, a coupling unit having a high frequency band power coupler and a low frequency band power coupler, and an isolation unit including a first power line and a second power line, wherein the first power line has an inductor blocking signal interference generated in a predetermined frequency band.

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31-05-2012 дата публикации

Radiofrequency amplifier

Номер: US20120133442A1
Автор: Igor Blednov
Принадлежит: NXP BV

An integrated radiofrequency amplifier with an operational frequency includes first and second Doherty amplifiers each having a main device, and a peak device connected at respective inputs and outputs by respective phase shift elements configured to provide a 90 degree phase shift at the operational frequency. An input of the amplifier is connected to the input of the main device of the first Doherty amplifier, an output of the amplifier is connected to the outputs of the peak devices of the first and second Doherty amplifiers and the input of the peak device of the first Doherty amplifier is connected to the input of the main device of the second Doherty amplifier by a phase shift element providing a 90 degree phase shift at the operational frequency.

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30-08-2012 дата публикации

Vertical ballast technology for power hbt device

Номер: US20120218047A1
Принадлежит: RF Micro Devices Inc

Power amplification devices are disclosed having a vertical ballast configuration to prevent thermal runaway in at least one stack of bipolar transistors formed on a semiconductor substrate. To provide a negative feedback to prevent thermal runaway in the bipolar transistors, a conductive layer is formed over and coupled to the stack. A resistivity of the conductive layer provides an effective resistance that prevents thermal runaway in the bipolar transistors. The vertical placement of the conductive layer allows for vertical heat dissipation and thus provides ballasting without concentrating heat.

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15-11-2012 дата публикации

Apparatus and methods for electronic amplification

Номер: US20120286878A1
Автор: Alan W. Ake, David Dening
Принадлежит: Skyworks Solutions Inc

Apparatus and methods for electronic amplification are disclosed herein. In certain implementations, an amplifier is provided for amplifying a RF signal, and the amplifier includes a first transistor and a second transistor electrically connected in a Darlington configuration. The first and second transistors can be, for example, bipolar or field effect transistors and the first transistor can amplify an input signal and provide the amplified input signal to the second transistor. The first and second transistors are electrically connected to a power low node such as a ground node through first and second bias circuits, respectively. In certain implementations, the first transistor includes an inductor disposed in the path from the first transistor to the power low voltage. By including the inductor in the path from the first transistor to the ground node, the third order distortion of the amplifier can be improved.

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29-11-2012 дата публикации

Semiconductor device

Номер: US20120299178A1
Принадлежит: Mitsubishi Electric Corp

A semiconductor device includes: a main body chip; a circuit pattern on a front surface of the main body chip and including a first pad; a cap chip including a first recess in a front surface of the cap chip and a second recess in a back surface of the cap chip, the cap chip being joined to the main body chip with the first recess facing the circuit pattern; a second pad on a bottom surface of the first recess of the cap chip; a first metallic member inlaid in the second recess of the cap chip; a first through electrode electrically connecting the second pad to the first metallic member through the cap chip; and a bump electrically connecting the first pad to the second pad.

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07-03-2013 дата публикации

Semiconductor device

Номер: US20130056730A1
Принадлежит: Individual

A technique capable of promoting miniaturization of an RF power module used in a mobile phone etc. is provided. A directional coupler is formed inside a semiconductor chip in which an amplification part of the RF power module is formed. A sub-line of the directional coupler is formed in the same layer as a drain wire coupled to the drain region of an LDMOSFET, which will serve as the amplification part of the semiconductor chip. Due to this, the predetermined drain wire is used as a main line and the directional coupler is configured by a sub-line arranged in parallel to the main line via an insulating film, together with the main line.

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03-10-2013 дата публикации

Stacked module

Номер: US20130257565A1
Автор: Satoshi Masuda
Принадлежит: Fujitsu Ltd

A stacked module includes a first multilayer substrate including an opening having a stepwise wall face, and a first transmission line including a first grounding conductor layer, a second multilayer substrate supported on a stepped portion of the stepwise wall face and including a second transmission line including a second grounding conductor layer, a first chip mounted on a bottom of the opening and coupled to a third transmission line provided on the first multilayer substrate, and a second chip mounted on the front face of the second multilayer substrate and coupled to the second transmission line. A face to which the second grounding conductor layer or a fourth grounding conductor layer coupled thereto is exposed is joined to the stepped portion to which the first grounding conductor layer or a third grounding conductor layer coupled thereto is exposed, and the first and second grounding conductor layers are coupled.

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01-01-2015 дата публикации

Semiconductor package having wire bond wall to reduce coupling

Номер: US20150002226A1
Принадлежит: FREESCALE SEMICONDUCTOR INC

A system and method for a package including a wire bond wall to reduce coupling is presented. The package includes a substrate, and a first circuit on the substrate. The first circuit includes a first electrical device, a second electrical device, and a first wire bond array interconnecting the first electrical device and the second electrical device. The package includes a second circuit on the substrate adjacent to the first circuit, the second circuit includes a second wire bond array interconnecting a third electrical device and a fourth electrical device. The package includes a wire bond wall including a plurality of wire bonds over the substrate between the first circuit and the second circuit. The wire bond wall is configured to reduce an electromagnetic coupling between the first circuit and the second circuit during an operation of at least one of the first circuit and the second circuit.

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11-01-2018 дата публикации

MULTIPLE-PATH RF AMPLIFIERS WITH ANGULARLY OFFSET SIGNAL PATH DIRECTIONS, AND METHODS OF MANUFACTURE THEREOF

Номер: US20180013391A1
Принадлежит:

An embodiment of a Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and a peaking amplifier die. The RF signal splitter divides an input RF signal into first and second input RF signals, and conveys the first and second input RF signals to first and second splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier die includes one or more second power transistors configured to amplify, along a peaking signal path, the second input RF signal to produce an amplified second RF signal. The carrier and peaking amplifier die are coupled to the substrate so that the RF signal paths through the carrier and peaking amplifier die extend in substantially different (e.g., orthogonal) directions. 1. An amplifier module comprising:a substrate with a mounting surface, wherein a plurality of non-overlapping zones is defined at the mounting surface, including a first-die mounting zone and a second-die mounting zone;a first amplifier die in the first-die mounting zone, wherein the first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal; anda second amplifier die in the second-die mounting zone, wherein the second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal, wherein the first amplifier die and the second amplifier die are coupled to the substrate so that the first and second signal paths through the first amplifier die and the second amplifier die extend in substantially different directions.2. The module of claim 1 , further comprising:a first wirebond array coupled between an RF output terminal of the first ...

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09-01-2020 дата публикации

Semiconductor power device including wire or ribbon bonds over device active region

Номер: US20200013692A1
Автор: Gabriele Formicone
Принадлежит: Integra Technologies Inc

A semiconductor power device including a base plate; an input lead; an output lead; a field effect transistor (FET) power die disposed over the base plate, wherein the FET power die includes a set of source fingers, a set of drain fingers, and a set of gate fingers disposed directly over an active region, wherein the gate fingers are configured to receive an input signal from the input lead, and wherein the FET power die is configured to process the input signal to generate an output signal at the drain fingers for routing to the output lead; and electrical conductors (wirebonds or ribbons) bonded to the source and/or drain directly over the active region of the FET power die. The electrical conductors produce additional thermal paths between the active region and the base plate for thermal management of the FET power die.

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14-01-2021 дата публикации

MULTIPLE-STAGE POWER AMPLIFIERS IMPLEMENTED WITH MULTIPLE SEMICONDUCTOR TECHNOLOGIES

Номер: US20210013837A1
Принадлежит:

A multiple-stage amplifier includes a driver stage die and a final stage die. The driver stage die includes a first type of semiconductor substrate (e.g., a silicon substrate), a first transistor, and an integrated portion of an interstage impedance matching circuit. A control terminal of the first transistor is electrically coupled to an RF signal input terminal of the driver stage die, and the integrated portion of the interstage impedance matching circuit is electrically coupled between a current-carrying terminal of the first transistor and an RF signal output terminal of the driver stage die. The second die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a second transistor. A connection, which is a non-integrated portion of the interstage impedance matching circuit, is electrically coupled between the RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die. 1. A multiple-stage amplifier comprising:a first die that includes a first type of semiconductor substrate, a first radio frequency (RF) signal input terminal, a first RF signal output terminal, a first bias voltage terminal, and a first amplification path between the first RF signal input terminal and the first RF signal output terminal, wherein the first amplification path includes a first transistor, wherein the first transistor has a control terminal and a current-carrying terminal, the control terminal of the first transistor is electrically coupled to the first RF signal input terminal, and the current-carrying terminal of the first transistor is electrically coupled to the first RF signal output terminal and to the first bias voltage terminal, and wherein the first bias voltage terminal is configured to provide a first bias voltage to the first current-carrying terminal; anda second die that is distinct from the first die and that includes a second type of semiconductor substrate that is different from the first type of ...

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14-01-2021 дата публикации

Doherty amplifier

Номер: US20210013840A1
Автор: Katsuya Kato
Принадлежит: Mitsubishi Electric Corp

A package ( 1 ) includes first and second input terminals ( 2,3 ) which are adjacent to each other, and first and second output terminals ( 4,5 ) which are adjacent to each other. A first input matching circuit ( 6 ), a first delay circuit ( 7 ), a second input matching circuit ( 8 ), a first amplifier ( 9 ), and a first output matching circuit ( 10 ) are sequentially connected between the first input terminal ( 2 ) and the first output terminal ( 4 ) inside the package ( 1 ). A third input matching circuit ( 11 ), a second amplifier ( 12 ), a second output matching circuit ( 13 ), a second delay circuit ( 14 ), and a third output matching circuit ( 15 ) are sequentially connected between the second input terminal ( 3 ) and the second output terminal ( 5 ) inside the package ( 1 ). First to fourth matching circuits ( 16 - 19 ) are respectively connected to the first input terminal ( 2 ), the second input terminal ( 3 ), the first output terminal ( 4 ) and the second output terminal ( 5 ) outside the package ( 1 ).

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09-01-2020 дата публикации

Multi-path amplifier circuit or system and methods of implementation thereof

Номер: US20200014342A1
Принадлежит: NXP USA Inc

Power amplifiers such as multi-path power amplifiers, systems employing such amplifiers, and methods of implementing amplifiers and amplifier systems are disclosed herein. In one example embodiment, a multi-path power amplifier includes a first semiconductor die with an integrated first transistor having a first source-to-drain pitch, and a second semiconductor die with an integrated second transistor having a second source-to-drain pitch, where the second source-to-drain pitch is smaller than the first source-to-drain pitch by at least 30 percent. In another example embodiment, a Doherty amplifier system includes a first semiconductor die with a first physical die area to total gate periphery ratio, and a second semiconductor die with a second physical die area to total gate periphery ratio, where the second physical die area to total gate periphery ratio is smaller than the first physical die area to total gate periphery ratio by at least 30 percent.

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10-01-2019 дата публикации

HIGH FREQUENCY MODULE

Номер: US20190014697A1
Автор: UEJIMA Takanori
Принадлежит:

A high frequency module includes an insulating substrate, a mountable element, and a shield conductor. The mountable element is mounted to a surface of the insulating substrate and includes a first mounting terminal. The shield conductor covers the mountable element in a spaced relationship to the mountable element. An exposing portion in which at least the first terminal is exposed is provided in the shield conductor, and a linear distance from the first terminal to the exposing portion is shorter than a linear distance from the first terminal to the shield conductor. 1. A high frequency module comprising:an insulating substrate;a mountable element mounted to a surface of the insulating substrate and including a first terminal for mounting; anda shield conductor covering the mountable element in a spaced relationship to the mountable element; whereinan exposing portion at which at least the first terminal is exposed is provided in the shield conductor; anda linear distance from the first terminal to the exposing portion is shorter than a linear distance from the first terminal to the shield conductor.2. The high frequency module according to claim 1 , whereinthe mountable element is a filter circuit element including a transmission terminal; andthe first terminal is the transmission terminal.3. The high frequency module according to claim 1 , whereinthe mountable element is a demultiplexing circuit element including a transmission terminal and a reception terminal; andthe first terminal is one of the transmission terminal and the reception terminal.4. The high frequency module according to claim 1 , wherein the exposing portion is overlapped with the first terminal when viewed from a front.5. The high frequency module according to claim 4 , whereinthe mountable element further includes a second terminal for mounting; andthe exposing portion is overlapped with both of the first terminal and the second terminal when viewed from the front.6. The high frequency module ...

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16-01-2020 дата публикации

CIRCUIT MODULE

Номер: US20200020645A1
Автор: NAKAJIMA Reiji
Принадлежит:

A circuit module () includes an electronic component (), a plurality of conductor posts (), a mold layer () that seals a plurality of the electronic components () and the plurality of conductor posts (), and a shield layer () on the mold layer (). The electronic components () include a first electronic component () and second electronic components (). The plurality of conductor posts () includes a group of conductor posts () traversing between the first electronic component () and the second electronic components (). The shield layer () includes a slit () that, with respect to each conductor post () included in the group () of conductor posts, in a plan view, passes and extends between the conductor post () and the first electronic component (), or between the conductor post () and the second electronic components (). 1. A circuit module , comprising:a circuit board having an electrical insulating layer and a ground layer, wherein the electrical insulating layer has a mounting surface, and the ground layer is provided on a side of the electrical insulating layer opposite to the mounting surface;a plurality of electronic components mounted on the mounting surface and including a first electronic component and a second electronic component, wherein the first electronic component acts as a source of noise and the second electronic component is an object to be protected from the noise generated in the first electronic component;a plurality of conductor posts including a group of conductor posts arranged so as to traverse between the first electronic component and the second electronic component on the mounting surface and electrically connected to the ground layer;a mold layer having electrical insulation and provided on the mounting surface so as to seal the plurality of electronic components and the plurality of conductor posts; anda shield layer covering a surface on a side of the mold layer opposite to the mounting surface,wherein the shield layer includes a slit, ...

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01-02-2018 дата публикации

ENCAPSULATED SEMICONDUCTOR DEVICE PACKAGE WITH HEATSINK OPENING

Номер: US20180034421A1
Принадлежит:

Embodiments include packaged semiconductor devices and methods of manufacturing packaged semiconductor devices. A semiconductor die includes a conductive feature coupled to a bottom surface of the die. The conductive feature only partially covers the bottom die surface to define a conductor-less region that spans a portion of the bottom die surface. The die is encapsulated by attaching the encapsulant material to the bottom die surface (e.g., including over the conductor-less region). The encapsulant material includes an opening that exposes the conductive feature. After encapsulating the die, a heatsink is positioned within the opening, and a surface of the heatsink is attached to the conductive feature. Because the heatsink is attached after encapsulating the die, the heatsink sidewalls are not directly bonded to the encapsulant material. 1. A method of manufacturing a packaged semiconductor device , the method comprising the steps of:encapsulating a semiconductor die in encapsulant material, wherein the semiconductor die has a top die surface, a bottom die surface, and a first conductive feature coupled to the bottom die surface, wherein the first conductive feature only partially covers the bottom die surface to define a first conductor-less region that spans a first portion of the bottom die surface, and wherein encapsulating includes attaching encapsulant material to the bottom die surface wherein the encapsulant material includes a first opening that exposes the first conductive feature, and wherein the first opening has encapsulant sidewalls extending from an outer surface of the encapsulant material toward the bottom die surface;after encapsulating the semiconductor die, positioning a heatsink within the first opening, wherein the heatsink has a first heatsink surface, a second heatsink surface, and heatsink sidewalls extending between the first and second heatsink surfaces; andattaching the first heatsink surface to the first conductive feature.2. The ...

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02-02-2017 дата публикации

PCB Based Semiconductor Package Having Integrated Electrical Functionality

Номер: US20170034913A1
Принадлежит: INFINEON TECHNOLOGIES AG

A semiconductor package includes a metal baseplate, a semiconductor die having a reference terminal attached to the baseplate and an RF terminal facing away from the baseplate, and a multilayer circuit board having a first side attached to the baseplate and a second side facing away from the baseplate. The multilayer circuit board includes a plurality of interleaved signal and ground layers. One of the signal layers is at the second side of the multilayer circuit board and electrically connected to the RF terminal of the semiconductor die. One of the ground layers is at the first side of the multilayer circuit board and attached to the metal baseplate. Power distribution structures are formed in the signal layer at the second side of the multilayer circuit board. RF matching structures are formed in a different one of the signal layers than the power distribution structures.

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04-02-2021 дата публикации

COMPOUND SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME AND AMPLIFIER

Номер: US20210036139A1
Принадлежит: FUJITSU LIMITED

A compound semiconductor device includes: a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from a compound semiconductor; a gate electrode, a source electrode, and a drain electrode that are provided above the electron supply layer; and an insulating layer that is provided between the source electrode and the drain electrode, over the semiconductor laminate structure, and with a gate recess formed therein, wherein the gate electrode includes: a first portion in the gate recess; and a second portion that is coupled to the first portion and is provided over the insulating layer at a position further on the drain electrode side than the gate recess, wherein the insulating layer includes an aluminum oxide film in direct contact with the semiconductor laminate structure. 1. A compound semiconductor device comprising:a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from a compound semiconductor;a gate electrode, a source electrode, and a drain electrode that are provided above the electron supply layer; andan insulating layer that is provided between the source electrode and the drain electrode, over the semiconductor laminate structure, and with a gate recess formed therein, a first portion in the gate recess; and', 'a second portion that is coupled to the first portion and is provided over the insulating layer at a position further on the drain electrode side than the gate recess,, 'wherein the gate electrode includeswherein the insulating layer includes an aluminum oxide film in direct contact with the semiconductor laminate structure,wherein the aluminum oxide film is at least located between the second portion and the semiconductor laminate structure in a thickness direction of the insulating layer, and{'sub': 'x', 'wherein, when a composition of the aluminum oxide film is expressed as AlO, a value of x is larger than 1.5.'}2. The ...

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11-02-2016 дата публикации

Semiconductor device with an isolation structure coupled to a cover of the semiconductor device

Номер: US20160043039A1
Принадлежит: FREESCALE SEMICONDUCTOR INC

A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.

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24-02-2022 дата публикации

SEMICONDUCTOR DEVICE

Номер: US20220059495A1
Автор: Tatsumi Taizo
Принадлежит:

A semiconductor device includes: a single die pad made of a metal or metal alloy and having a first surface, a second surface that is an opposite side of the first surface, and a pair of ground leads protruding from an end edge in plan view; a signal lead arranged between the ground leads; a plurality of leads arranged around the die pad in plan view; a semiconductor chip mounted on the second surface; bonding wires connecting a signal pad of the chip and the signal lead and connecting a ground pad of the chip and the ground leads; and a mold resin covering the die pad, the signal lead, the plurality of leads, the chip, and the bonding wires; wherein an interval between the signal lead and each of the ground leads is narrower than an interval between the plurality of leads. 1. A semiconductor device comprising:a single die pad having a first surface, a second surface that is an opposite side of the first surface, and a pair of ground leads protruding from an end edge in plan view, the die pad being made of a metal or a metal alloy;a signal lead that is arranged between the pair of ground leads;a plurality of leads that are arranged around the die pad in plan view;a semiconductor chip that is mounted on the second surface;a plurality of bonding wires connecting a signal pad of the semiconductor chip and the signal lead and connecting a ground pad of the semiconductor chip and the pair of ground leads; anda mold resin covering the die pad, the signal lead, the plurality of leads, the semiconductor chip, and the plurality of bonding wires;wherein an interval between the signal lead and each of the pair of ground leads is narrower than an interval between the plurality of leads.2. The semiconductor device according to claim 1 , wherein an interval between the signal lead and the die pad is narrower than an interval between the plurality of leads and the die pad.3. A semiconductor device according comprising:a single die pad having a first surface and a second surface ...

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14-02-2019 дата публикации

RADIO FREQUENCY SHIELDING WITHIN A SEMICONDUCTOR PACKAGE

Номер: US20190052301A1
Принадлежит:

Radio frequency shielding within a semiconductor package is described. In one example, a multiple chip package has a digital chip, a radio frequency chip, and an isolation layer between the digital chip and the radio frequency chip. A cover encloses the digital chip and the radio frequency chip. 1. A portable wireless device comprising:a touchscreen;a controller capable of controlling the touchscreen;an antenna;a multiple chip package having a digital chip coupled to the controller, a radio frequency chip coupled to the antenna, an isolation structure between the digital chip and the radio frequency chip, a cover enclosing the digital chip and the radio frequency chip, anda redistribution layer that couples to the digital chip and the radio frequency chip, and that contacts the isolation structure and the cover.2. The portable wireless device of claim 1 , wherein the isolation structure is a layer formed over the digital chip.3. The portable wireless device of claim 3 , further including a metal shield adjacent to the digital chip and the radio frequency chip capable of further isolating radio frequency noise sources.4. The portable wireless device of claim 1 , further including a power-management unit connected to the redistribution layer.5. The portable wireless device of claim 1 , further including a memory die claim 1 , wherein the isolation structure is between the radio frequency chip from the digital chip and the memory die.6. The portable wireless device of claim 1 , wherein one of the digital chip and the radio frequency chip extends farther from the redistribution layer than the other of the digital chip and the radio frequency chip.7. The portable wireless device of claim 1 , wherein the redistribution layer directly supports each of the digital chip and the radio frequency chip.8. The portable wireless device of claim 1 , wherein the portable wireless device further includes a camera.9. The portable wireless device of claim 1 , wherein the portable ...

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23-02-2017 дата публикации

Semiconductor device

Номер: US20170053877A1
Автор: Takeshi Hosomi
Принадлежит: Mitsubishi Electric Corp

A semiconductor device includes: a semiconductor chip including an electronic part; and a package sealing the semiconductor chip, wherein the package includes a transparent section which is opaque to visible light and transparent to near-infrared light or near-ultraviolet light, and the transparent section is disposed in such a way that the electronic part is observed from outside under the near-infrared light or the near-ultraviolet light.

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13-02-2020 дата публикации

HIGH FREQUENCY MODULE AND COMMUNICATION DEVICE

Номер: US20200051941A1
Принадлежит:

A high frequency module includes a transmission power amplifier, a bump electrode connected to a principal surface of the transmission power amplifier and having an elongated shape in a plan view of the principal surface, and a mounting board on which the transmission power amplifier is mounted, wherein the mounting board includes a via conductor having an elongated shape in the plan view, the length direction of the bump electrode and the length direction of the via conductor are aligned in the plan view, and the bump electrode and the via conductor are connected in an overlapping area where the bump electrode and the via conductor overlap at least partially in the plan view, and the overlapping area is an area elongated in the length direction. 1. A high frequency module comprising:a high frequency component;a first bump electrode connected to the high frequency component, the first bump electrode having an elongated shape in a plan view of the high frequency component; anda mounting board on which the high frequency component is mounted, whereinthe mounting board includes a via conductor having an elongated shape in a plan view of the mounting board,a length direction of the first bump electrode and a length direction of the via conductor are aligned in the plan view, and the first bump electrode and the via conductor are connected in an overlapping area where the first bump electrode and the via conductor overlap at least partially in the plan view, andthe overlapping area is an area elongated in the length direction.2. The high frequency module according to claim 1 , whereinthe high frequency component is at least one of a power amplifier, a low-noise amplifier, and a filter connected to an output terminal of a power amplifier.3. The high frequency module according to claim 1 , whereinthe high frequency component is a power amplifier and includes a bipolar transistor having a base terminal, a collector terminal, and an emitter terminal, in which a drive current ...

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13-02-2020 дата публикации

RADIO-FREQUENCY MODULE AND COMMUNICATION DEVICE

Номер: US20200051942A1
Принадлежит:

A radio-frequency module includes: a transmission power amplifier that includes first and second amplification transistors that are cascade connected to each other; and a mounting substrate that has first and second main surface that face each other, the transmission power amplifier being mounted on the first main surface. The first amplification transistor is arranged in a final stage and has a first emitter terminal. The second amplification transistor is arranged in a stage preceding the first amplification transistor and has a second emitter terminal. The mounting substrate has first to fourth ground electrode layers in order of proximity to the first main surface. The first emitter terminal and the second emitter terminal are not electrically connected to each other via an electrode on the first main surface and are not electrically connected to each other via the first ground electrode layer. 1. A radio-frequency module comprising:a power amplifier composed of a plurality of cascade-connected amplification elements; anda mounting substrate having a first main surface and a second main surface that face each other, the power amplifier being mounted on the first main surface;wherein the plurality of amplification elements includes a first amplification element arranged in a final stage of the plurality of amplification elements and having a first ground terminal, anda second amplification element arranged in a stage preceding the first amplification element and having a second ground terminal,an inside of the mounting substrate includes a plurality of ground electrode layers substantially parallel to the first main surface and having first to nth ground electrode layers in order of proximity to the first main surface, wherein n is an integer greater than or equal to 2 andthe first ground terminal and the second ground terminal are not electrically connected to each other via an electrode on the first main surface of the mounting substrate and are not ...

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13-02-2020 дата публикации

HIGH FREQUENCY MODULE AND COMMUNICATION DEVICE

Номер: US20200051943A1
Принадлежит:

A high frequency module includes a transmission power amplifier, a bump electrode connected to the transmission power amplifier, and a mounting board on which the transmission power amplifier is mounted, wherein the mounting board includes a via conductor having an elongated shape in the plan view of the mounting board, a board main part placed outside the via conductor, and an insulating part placed inside the via conductor, and the bump electrode and the via conductor are connected while at least partially overlapping each other in the foregoing plan view, and the board main part and the insulating part are each composed of an insulating material of the same kind. 1. A high frequency module comprising:a high frequency component;a connection electrode connected to the high frequency component; anda mounting board on which the high frequency component is mounted, wherein a via conductor having an elongated shape in a plan view of the mounting board,', 'a first insulating part disposed outside the via conductor, and', 'one or more second insulating parts disposed inside the via conductor,, 'the mounting board includes'}the connection electrode and the via conductor are connected while at least partially overlapping one another in the plan view, andthe first insulating part and the one or more second insulating parts are each composed of an insulating material of same kind.2. The high frequency module according to claim 1 , whereinthe high frequency component is a power amplifier, a low-noise amplifier, and/or a filter electrically connected to an output terminal of a power amplifier.3. The high frequency module according to claim 1 , whereinin the plan view, the one or more second insulating parts are disposed in a center area in a length direction of the via conductor.4. The high frequency module according to claim 1 , whereina plurality of the second insulating parts are discretely arranged along a length direction of the via conductor in the plan view.5. The high ...

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13-02-2020 дата публикации

POWER AMPLIFIER MODULE

Номер: US20200052663A1
Принадлежит:

A power amplifier module includes a first substrate and a second substrate, at least part of the second substrate being disposed in a region overlapping the first substrate. The second substrate includes a first amplifier circuit and a second amplifier circuit. The first substrate includes a first transformer including a primary winding having a first end and a second end and a secondary winding having a first end and a second end; a second transformer including a primary winding having a first end and a second end and a secondary winding having a first end and a second end; and multiple first conductors disposed in a row between the first transformer and the second transformer, each of the multiple first conductors extending from the wiring layer on a first main surface to the wiring layer on a second main surface of the substrate. 1. A power amplifier module , comprising:a first substrate having a first main surface, a second main surface, and a plurality of wiring layers; anda second substrate having a first main surface that faces the first main surface of the first substrate, at least part of the second substrate overlapping the first substrate in a direction perpendicular to the first main surface of the first substrate, a first amplifier circuit; and', 'a second amplifier circuit, each of the first amplifier circuit and the second amplifier circuit being configured to amplify power, and, 'wherein the second substrate comprises [ a primary winding having a first end to which a signal is input, and a second end electrically coupled to a first reference potential, and', 'a secondary winding having a first end electrically coupled to an input terminal of the first amplifier circuit, and a second end electrically coupled to an input terminal of the second amplifier circuit;, 'a first transformer disposed at one or more of the plurality of wiring layers, the first transformer comprising, a primary winding having a first end electrically coupled to an output ...

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23-02-2017 дата публикации

UNPACKED STRUCTURE FOR POWER DEVICE OF RADIO FREQUENCY POWER AMPLIFICATION MODULE AND ASSEMBLY METHOD THEREFOR

Номер: US20170055341A1
Автор: Ma Gordon Chiang
Принадлежит:

A power device without a package structure in a radio frequency power amplifier module and an assembly method for a radio frequency power amplifier module are provided. The radio frequency power amplification module includes the power device, a heat dissipating plate and a printed circuit board. The power device includes a carrier flange, a plurality of electronic elements and bond-wires, and the electronic elements are adhered to the carrier flange, the power device and the printed circuit board are fixed on the heat dissipating plate, the electronic elements of the power device are connected with each other through the bond-wires, and the electronic elements are directly connected to the printed circuit board through the bond-wires. The electronic elements include at least one passive device, a decoupling capacitor is disposed on the printed circuit board, and the decoupling capacitor is connected to the passive device through the bond-wires. 1. A power device without a package structure in a radio frequency power amplifier module , wherein the radio frequency power amplifier module comprises the power device , a heat dissipating plate and a printed circuit board ,wherein the printed circuit board has an opening and the printed circuit board with the opening is fixed on the heat dissipating plate,the power device comprises a carrier flange, a plurality of electronic elements and bond-wires, the electronic elements are adhered to the carrier flange, and the carrier flange adhered with the electronic elements is embedded into the opening of the printed circuit board and fixed on the heat dissipating plate,the electronic elements of the power device are connected with each other through the bond-wires, the electronic elements are directly connected to the printed circuit board through the bond-wires, and the electronic elements comprise at least one passive device; anda decoupling capacitor is disposed on the printed circuit board, and the decoupling capacitor is ...

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03-03-2016 дата публикации

Transformer

Номер: US20160064140A1
Автор: Vittorio Cuoco
Принадлежит: Samba Holdco Netherlands BV

A bond-wire transformer for an RF device is described. The primary and secondary circuits of the bond-wire transformer are formed using loops formed with a pair of normal profile and low profile bond-wires. This results in improved efficiency and higher power operation.

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27-02-2020 дата публикации

SEMICONDUCTOR PACKAGE HAVING AN ISOLATION WALL TO REDUCE ELECTROMAGNETIC COUPLING

Номер: US20200067460A1
Принадлежит:

A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented. 1. A semiconductor device comprising:a ground plane with a surface and an aperture in the surface;a first circuit on a first portion of the surface of the ground plane that is located at a first side of the aperture, wherein the first circuit comprises a first plurality of electrical components, including a first transistor, and a first wire bond array electrically coupled between the first transistor and a first lead, wherein the first lead is located at a first side of the device;a second circuit on a second portion of the ground plane that is located at a second side of the aperture that is opposite the first side, wherein the second circuit comprises a second plurality of electrical components, including a second transistor, and a second wire bond array electrically coupled between the second transistor and a second lead, wherein the second lead is located at the first side of the device; andan isolation wall formed of electrically conductive material inserted into the aperture between the first circuit and the second circuit and electrically connected to the ground plane, the isolation wall formed of a rectangular body of material that extends perpendicularly from the surface of the ground plane between the first and second wire bond arrays and above a height of the first and second wire bond arrays, the isolation wall being configured to reduce electromagnetic coupling between the first circuit and the ...

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05-03-2020 дата публикации

SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME

Номер: US20200075571A1

A semiconductor device package includes a carrier, an electronic component, a protection layer, a conductive layer and an integrated passive device (IPD). The electronic component is disposed on the carrier. The protection layer covers the carrier and the electronic component. The conductive layer is disposed on the protection layer and penetrates the protection layer to be electrically connected to the electronic component. The IPD is disposed on the conductive layer and electrically connected to the electronic component through the conductive layer. 1. A semiconductor device package , comprising:a carrier;an electronic component disposed on the carrier,a protection layer covering the carrier and the electronic component;a conductive layer disposed on the protection layer and penetrating the protection layer to be electrically connected to the electronic component; andan integrated passive device (IPD) disposed on the conductive layer and electrically connected to the electronic component through the conductive layer.2. The semiconductor device package of claim 1 , wherein the carrier is a leadframe or a substrate.3. The semiconductor device package of claim 2 , wherein the leadframe comprises a die pad and a plurality of leads spaced apart from the die pad claim 2 , and the electronic component is disposed on the die pad and electrically connected to the leads through the conductive layer.4. The semiconductor device package of claim 3 , wherein the die pad includes a cavity to accommodate the electronic component.5. The semiconductor device package of claim 1 , wherein the conductive layer defines an inductor or a transformer.6. The semiconductor device package of claim 1 , wherein the electronic component includes a power amplifier (PA).7. The semiconductor device package of claim 1 , wherein the electronic component has an active surface facing an active surface of the IPD.8. The semiconductor device package of claim 1 , further comprising a solder resist cover ...

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23-03-2017 дата публикации

Modified current mirror circuit for reduction of switching time

Номер: US20170085223A1
Принадлежит: Skyworks Solutions Inc

A current mirror circuit connectible to an amplifier circuit to set a bias point thereof includes a current mirror circuit, and a bias resistor connected thereto. The bias resistor is connectible to the amplifier circuit. A first helper circuit is connected in parallel with the bias resistor, and is selectively activated for a first predetermined duration by a first control signal. The activated first helper circuit defines a lower resistance path relative to the bias resistor to shorten a rising transient response of the amplifier circuit as the current mirror circuit is activated.

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23-03-2017 дата публикации

ENCAPSULATED SEMICONDUCTOR DEVICE PACKAGE WITH HEATSINK OPENING, AND METHODS OF MANUFACTURE THEREOF

Номер: US20170085228A1
Принадлежит:

Embodiments include packaged semiconductor devices and methods of manufacturing packaged semiconductor devices. A semiconductor die includes a conductive feature coupled to a bottom surface of the die. The conductive feature only partially covers the bottom die surface to define a conductor-less region that spans a portion of the bottom die surface. The die is encapsulated by attaching the encapsulant material to the bottom die surface (e.g., including over the conductor-less region). The encapsulant material includes an opening that exposes the conductive feature. After encapsulating the die, a heatsink is positioned within the opening, and a surface of the heatsink is attached to the conductive feature. Because the heatsink is attached after encapsulating the die, the heatsink sidewalls are not directly bonded to the encapsulant material. 1. A method of manufacturing a packaged semiconductor device , the method comprising the steps of:encapsulating a semiconductor die in encapsulant material, wherein the semiconductor die has a top die surface, a bottom die surface, and a first conductive feature coupled to the bottom die surface, wherein the first conductive feature only partially covers the bottom die surface to define a first conductor-less region that spans a first portion of the bottom die surface, and wherein encapsulating includes attaching encapsulant material to the bottom die surface wherein the encapsulant material includes a first opening that exposes the first conductive feature, and wherein the first opening has encapsulant sidewalls extending from an outer surface of the encapsulant material toward the bottom die surface;after encapsulating the semiconductor die, positioning a heatsink within the first opening, wherein the heatsink has a first heatsink surface, a second heatsink surface, and heatsink sidewalls extending between the first and second heatsink surfaces; andattaching the first heatsink surface to the first conductive feature.2. The ...

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23-03-2017 дата публикации

TRANSIENT LIQUID PHASE MATERIAL BONDING AND SEALING STRUCTURES AND METHODS OF FORMING SAME

Номер: US20170086320A1
Автор: Barber Bradley Paul
Принадлежит:

A bonding element includes a first transient liquid phase (TLP) bonding element including a first material and a second material, the first material having a higher melting point than the second material, a ratio of a quantity of the first material and the second material in the first TLP bonding element having a first value and a second TLP bonding element including the first material and the second material, a ratio of a quantity of the first material and the second material in the second TLP bonding element having a second value different from the first value. 1. A bonding element comprising:a first transient liquid phase structure including a first material and a second material, the first material having a higher melting point than the second material, a ratio of a quantity of the first material and the second material in the first transient liquid phase structure having a first value; anda second transient liquid phase structure including the first material and the second material, a ratio of a quantity of the first material and the second material in the second transient liquid phase structure having a second value different from the first value.2. The bonding element of further comprising a third transient liquid phase structure including the first material and the second material claim 1 , a ratio of a quantity of the first material and the second material in the third transient liquid phase structure having a third value claim 1 , the third value being between the first value and the second value.3. The bonding element of wherein one of the first value claim 1 , the second value claim 1 , and the third value is selected such that one of the first transient liquid phase structure claim 1 , the second transient liquid phase structure claim 1 , and the third transient liquid phase structures forms an intermetallic alloy having a melting point higher than a melting point of the second material responsive to being heated above the melting point of the second ...

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19-06-2014 дата публикации

Amplifer device

Номер: US20140167858A1
Принадлежит: NXP BV

The disclosure relates to an amplifier device comprising an integrated circuit die ( 701 a; 701 b ) having a first amplifier ( 702 a; 702 b ) and a second amplifier. A Doherty amplifier may be implemented in accordance with the present invention. The amplifier device also comprises a first connector ( 706 a; 706 b ) having a first end coupled to the first amplifier and a second end for coupling with a circuit board ( 718 a; 718 b ), a second connector ( 708 a; 708 b ) having a first end coupled to the second amplifier ( 704 a; 704 b ) and a second end for coupling with a circuit board ( 718 a; 718 b ), a shielding member ( 710 a; 710 b ) having a first end coupled to the integrated circuit die ( 701 a; 701 b ) and a second end for coupling with a circuit board ( 718 a; 718 b ), the shielding member ( 710 a; 710 b ) situated at least partially between the second connector and the first connector ( 706 a; 706 b ) and a capacitor. The capacitor has a first plate and a second plate. The first plate of the capacitor is configured to be coupled to ground when in use. The second plate of the capacitor is coupled to one of the ends of the shielding member ( 710 a; 710 b ). The other end of the shielding member ( 710 a; 710 b ) is configured to be coupled to ground when in use.

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12-03-2020 дата публикации

Multiple Band Multiple Mode Transceiver Front End Flip-Chip Architecture and Circuitry with Integrated Power Amplifiers

Номер: US20200083915A1
Принадлежит:

An integrated circuit architecture and circuitry is defined by a die structure with a plurality of exposed conductive pads arranged in a grid of rows and columns. The die structure has a first operating frequency region with a first transmit and receive chain, and a second operating frequency region with a second transmit chain and a second receive chain. There is a shared region of the die structure defined by an overlapping segment of the first operating frequency region and the second operating frequency region with a shared power supply input conductive pad connected to the first transmit chain, the second transmit chain, the first receive chain, and the second receive chain, and a shared power detection output conductive pad connected to the first transmit chain and the second transmit chain. 120-. (canceled)21. An integrated circuit architecture defined by a die structure , the integrated circuit architecture comprising:a first operating frequency region corresponding to a physical area on the die structure including a first transmit chain and a first receive chain;a second operating frequency region corresponding to a physical area on the die structure including a second transmit chain and a second receive chain; anda shared region of the die structure defined by an overlapping segment of the first operating frequency region and the second operating frequency region, the shared region including a control input conductive pad connected to both the first transmit chain and the second transmit chain.22. The integrated circuit architecture of wherein the first transmit chain includes at least one first operating frequency power amplifier.23. The integrated circuit architecture of wherein the second transmit chain includes at least one second operating frequency power amplifier.24. The integrated circuit architecture of wherein the first receive chain includes at least one first operating frequency low noise amplifier.25. The integrated circuit architecture of ...

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29-03-2018 дата публикации

Semiconductor Device Including a LDMOS Transistor, Monolithic Microwave Integrated Circuit and Method

Номер: US20180090455A1
Принадлежит: INFINEON TECHNOLOGIES AG

In an embodiment, a semiconductor device includes a semiconductor substrate including a front surface, an LDMOS transistor structure in the front surface, a conductive interconnection structure arranged on the front surface, and at least one cavity arranged in the front surface.

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19-03-2020 дата публикации

TRANSIENT LIQUID PHASE MATERIAL BONDING AND SEALING STRUCTURES AND METHODS OF FORMING SAME

Номер: US20200090951A1
Автор: Barber Bradley Paul
Принадлежит:

A method of forming a bonding element including a first transient liquid phase (TLP) bonding element including a first material and a second material, the first material having a higher melting point than the second material, a ratio of a quantity of the first material and the second material in the first TLP bonding element having a first value, and a second TLP bonding element including the first material and the second material, a ratio of a quantity of the first material and the second material in the second TLP bonding element having a second value different from the first value. 1. A method of forming a wireless module including a device and a substrate , the method comprising:forming a first bonding element on a surface of one of the device and the substrate, the first bonding element including a first alloy of a first material and a second material, the first material having a higher melting point than the second material, a ratio of a quantity of the first material and the second material in the first bonding element having a first value;forming a second bonding element on a surface of one of the device and the substrate, the second bonding element including a second alloy of the first material and the second material, a ratio of a quantity of the first material and the second material in the second bonding element having a second value different from the first value;forming at least one strut on a surface of one of the device and the substrate, the at least one strut including a third alloy of the first material and the second material, the at least one strut connecting the first bonding element and the second bonding element;contacting the device with the substrate with the first bonding element and the second bonding element disposed between the device and the substrate and in contact with both the device and the substrate; andheating the first bonding element and the second bonding element at a temperature and time sufficient for the first material and ...

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12-05-2022 дата публикации

INTEGRATED CIRCUIT, FRONT-END MODULE, AND COMMUNICATION APPARATUS

Номер: US20220148986A1
Автор: NISHIKAWA Hiroshi
Принадлежит:

An integrated circuit (IC) includes a first switch, a second switch, an amplifier electrically connected between the first switch and the second switch, and a base. The first switch, the second switch, and the amplifier are provided on the base. In a top view of the base, the amplifier is disposed between the first switch and the second switch. 1. An integrated circuit (IC) comprising:a first switch;a second switch;an amplifier electrically connected between the first switch and the second switch; anda base; whereinthe first switch, the second switch, and the amplifier are provided on the base; andin a top view of the base, the amplifier is disposed between the first switch and the second switch.2. The IC according to claim 1 , whereinin the top view of the base, the first switch and the amplifier are disposed next to each other and the amplifier and the second switch are disposed next to each other.3. The IC according to claim 2 , whereinin the top view of the base, the first switch, the amplifier, and the second switch are disposed on a straight line.4. The IC according to claim 1 , whereinan input terminal of the first switch is connected to an antenna; andthe amplifier is a low-noise amplifier.5. The IC according to claim 2 , whereinan input terminal of the first switch is connected to an antenna; andthe amplifier is a low-noise amplifier.6. The IC according to claim 3 , whereinan input terminal of the first switch is connected to an antenna; andthe amplifier is a low-noise amplifier.7. The IC according to claim 1 , further comprising:a third switch provided on the base and electrically connected between the first switch and the amplifier; whereinin the top view of the base, the third switch is disposed between the first switch and the amplifier.8. The IC according to claim 7 , whereinin the top view of the base, the first switch and the third switch are disposed next to each other, the third switch and the amplifier are disposed next to each other, and the ...

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29-04-2021 дата публикации

Doherty amplifier device

Номер: US20210126596A1
Автор: James Wong

An amplifier device includes a substrate, a composite packaged amplifier having a bottom plate and an output plate, a first amplifier and a second amplifier provided on the bottom plate, a combining node that combines an output of the first amplifier with an output of the second amplifier, an output matching circuits provided on the bottom plate, that has a first transmission line provided between the first amplifier and the combining node, and a second transmission line provided between the combining node and the second amplifier, a third transmission line having one transmission line on which the output plate is mounted and other transmission line that connects the one transmission line to the external port, and wirings connecting to one terminal of the output plate and the combining node. A length of the output plate and the other transmission line is equal or less than π/4 radian for a signal.

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26-04-2018 дата публикации

ELECTRONIC TILE PACKAGING

Номер: US20180116052A1
Автор: Mass Steven J.
Принадлежит:

An apparatus includes: electronic tile packaging, the electronic tile packaging comprising: a plurality of tile layers, at least one of the tile layers comprising a crystalline structure having high thermal conductivity. 1. An apparatus comprising:electronic tile packaging, the electronic tile packaging comprising:a plurality of tile layers, at least one of the tile layers comprising an active crystalline structure having thermal conductivity of at least approximately 300 Watts per (meter-Kelvin), wherein the electronic tile packaging comprises one or more of silicon carbide (SiC), quartz, boron, arsenic, and diamond.2. (canceled)3. The apparatus of claim 1 , wherein the electronic tile packaging provides isolation configured to support signal processing architectures operating at at least approximately 60 gigahertz (GHz).4. The apparatus of claim 1 , wherein at least two of the crystalline structures are connected through an interconnect.5. The apparatus of claim 4 , wherein the interconnect comprises one or more of a diverse accessible heterogeneous integration (DAHI) chip bonder claim 4 , a fuzz button holder claim 4 , a nanowire claim 4 , a conductive elastomer claim 4 , a spring claim 4 , a crystalline interposer claim 4 , a metallic interconnect claim 4 , a solder ball interconnect claim 4 , and another interconnect. For example claim 4 , the solder ball interconnect may comprise a gold tin solder interconnect.6. The apparatus of claim 1 , wherein at least one of the tile layers comprises a plurality of structures claim 1 , and wherein at least one of the structures comprises multiple conductor layers.7. The apparatus of claim 6 , wherein at least one of the conductor layers is configured for one or more of direct current (DC) routing and command routing.8. (canceled)9. The apparatus of claim 1 , further comprising a cavity.10. The apparatus of claim 9 , wherein the cavity has a high quality factor (Q) of at least approximately 100.11. The apparatus of claim 1 ...

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18-04-2019 дата публикации

STACK ASSEMBLY HAVING ELECTRO-ACOUSTIC DEVICE

Номер: US20190115309A1
Принадлежит:

Stack assembly having electro-acoustic device. In some embodiments, a radio-frequency (RF) module can include a packaging substrate configured to receive a plurality of components, and an electro-acoustic device mounted on the packaging substrate. The RF module can further include a die having an integrated circuit and mounted over the electro-acoustic device to form a stack assembly. The electro-acoustic device can be, for example, a filter device such as a surface acoustic wave filter. The die can be, for example an amplifier die such as a low-noise amplifier implemented on a silicon die. 1. A radio-frequency module comprising:a packaging substrate configured to receive a plurality of components;an electro-acoustic device mounted on the packaging substrate; anda die having a radio-frequency integrated circuit and mounted over the electro-acoustic device to form a stack assembly.2. The radio-frequency module of wherein the electro-acoustic device is a filter.3. The radio-frequency module of wherein the filter is a surface acoustic wave (SAW) filter.4. The radio-frequency module of wherein the radio-frequency integrated circuit is configured to amplify a signal.5. The radio-frequency module of wherein the radio-frequency integrated circuit includes a low-noise amplifier.6. The radio-frequency module of wherein the die is a silicon die.7. The radio-frequency module of wherein the radio-frequency module is a global positioning system (GPS) module.8. The radio-frequency module of further comprising a mounting layer implemented between the electro-acoustic device and the die claim 1 , and configured to secure the die to the electro-acoustic device.9. The radio-frequency module of wherein the mounting layer includes a resin.10. The radio-frequency module of further comprising an overmold implemented over the packaging substrate to encapsulate the stack assembly.11. (canceled)12. The radio-frequency module of wherein the electro-acoustic device includes a mounting side ...

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13-05-2021 дата публикации

SELECTIVELY SHIELDED RADIO FREQUENCY MODULES

Номер: US20210143542A1
Принадлежит:

Aspects of this disclosure relate to methods of selectively shielded radio frequency modules. A radio frequency module can be provided with a radio frequency component and an antenna. A shielding layer can be formed over a portion of the radio frequency module such that the radio frequency component is shielded by the shielding layer and the antenna is unshielded by the shielding layer. 1. (canceled)2. A radio frequency module comprising:an antenna on a substrate;a radio frequency component on the substrate; anda radio frequency shielding structure including a shielding layer and a wire bond, the shielding layer positioned over the radio frequency component, the wire bond positioned between the radio frequency component and the antenna, and the wire bond extending farther vertically from the substrate than the antenna.3. The radio frequency module of wherein the radio frequency shielding structure includes wire bond walls around the radio frequency component claim 2 , one of the wire bond walls including the wire bond.4. The radio frequency module of wherein the radio frequency shielding structure includes a conformal layer extending substantially perpendicular to a surface of the substrate on which the radio frequency component is positioned.5. The radio frequency module of wherein the antenna is printed on the substrate.6. The radio frequency module of wherein the substrate is a laminate substrate that includes at least one routing layer.7. The radio frequency module of further comprising a protective layer over the shielding layer.8. The radio frequency module of wherein the antenna is configured to receive a wireless local area network signal.9. The radio frequency module of wherein the antenna is configured to receive a wireless personal area network signal.10. The radio frequency module of wherein the radio frequency component includes a front end integrated circuit.11. The radio frequency module of wherein the radio frequency component includes a ...

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03-05-2018 дата публикации

Radio frequency (rf) apparatus

Номер: US20180122755A1
Принадлежит: Sumitomo Electric Industries Ltd

A radio-frequency (RF) apparatus that reduces signal reflections at input and output terminals is disclosed. The RF apparatus includes an assembly base and a semiconductor chip mounted on the assembly base in upside down. The semiconductor chip includes first to third metal layers and a top metal layer that provides a top ground layer and a pad. The pad is connected to the input or output terminals on the assembly base and extracts a signal line and a stub line in the third metal layer, where lines are transferred to the first metal layer. The semiconductor chip further includes an inner ground layer formed in the second metal line. The inner ground layer and the signal line just pulled out from the pad and formed in the third metal layer form a micro-strip line.

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04-05-2017 дата публикации

Multi-Die Package Having Different Types of Semiconductor Dies Attached to the Same Thermally Conductive Flange

Номер: US20170125362A1
Принадлежит:

A multi-die package is manufactured by attaching a first semiconductor die made of a first semiconductor material to a thermally conductive flange via a first die attach material, and attaching a second semiconductor die to the same thermally conductive flange as the first semiconductor die via a second die attach material. The second semiconductor die is made of a second semiconductor material different than the first semiconductor material. The first semiconductor die is held in place by the first die attach material during attachment of the second semiconductor die to the flange. Leads are attached to the thermally conductive flange or to an insulating member secured to the flange. The leads provide external electrical access to the first and second semiconductor dies. 1. A method of manufacturing a multi-die package , comprising:attaching a first semiconductor die made of a first semiconductor material to a thermally conductive flange via a first die attach material;attaching a second semiconductor die to the same thermally conductive flange as the first semiconductor die via a second die attach material, the second semiconductor die being made of a second semiconductor material different than the first semiconductor material, and wherein the first semiconductor die is held in place by the first die attach material during attachment of the second semiconductor die to the flange; andattaching leads to the thermally conductive flange or to an insulating member secured to the flange, the leads providing external electrical access to the first and second semiconductor dies.2. The method of claim 1 , wherein the first semiconductor die is a main amplifier of a Doherty amplifier circuit and the second semiconductor die is a peaking amplifier of the Doherty amplifier circuit.3. The method of claim 2 , wherein the first semiconductor die is made of GaN and the second semiconductor die is made of Si.4. The method of claim 1 , wherein the first semiconductor die is a ...

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09-05-2019 дата публикации

Circuits, devices and methods related to adjustment of input signal for compensation of amplifier

Номер: US20190140595A1
Принадлежит: Skyworks Solutions Inc

Circuits, devices and methods related to adjustment of input signal for compensation of amplifier. In some embodiments, a control system for an amplifier can include a control circuit configured to provide a control signal based on an operating condition associated with the amplifier. The control system can further include a power adjustment component implemented along an input path associated with the amplifier and configured to adjust power of a signal to be amplified by the amplifier.

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15-09-2022 дата публикации

Microelectronics h-frame device

Номер: US20220289559A1
Принадлежит: Northrop Grumman Systems Corp

A microelectronics H-frame device includes: a stack of two or more substrates wherein the substrate stack comprises a top substrate and a bottom substrate, wherein bonding of the top substrate to the bottom substrate creates a vertical electrical connection between the top substrate and the bottom substrate, wherein the top surface of the top substrate comprises top substrate top metallization, wherein the bottom surface of the bottom substrate comprises bottom substrate bottom metallization; mid-substrate metallization located between the top substrate and the bottom substrate; a micro-machined top cover bonded to a top side of the substrate stack; and a micro-machined bottom cover bonded to a bottom side of the substrate stack.

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04-06-2015 дата публикации

Packaged rf power transistor device having next to each other a ground and a video lead for connecting a decoupling capacitor, rf power amplifier

Номер: US20150156910A1
Принадлежит: NXP BV

A packaged Radio Frequency power transistor device is described, which comprises a component carrier a die comprising a semiconductor transistor having a source, a gate and a drain, wherein the die is mounted at the component carrier, a ground connection being electrically connected to the source, an output lead being electrically connected to the drain, a resonance circuit being electrically inserted between the output lead and the ground connection, and a video lead being electrically connected to the resonance circuit. The video lead is configured for being connected to a first contact of a decoupling capacitor. The ground connection is configured for being connected to a second contact of the decoupling capacitor. It is further described a RF power amplifier comprising such a packaged Radio Frequency power transistor device.

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07-05-2020 дата публикации

INTERPOSER CIRCUIT

Номер: US20200144190A1
Автор: Schlepple Norbert
Принадлежит:

In an example, a communication module such as an optoelectronic communication module may include an integrated circuit (IC), an electrical interconnect, and an interposer circuit. The electrical interconnect may include a radio frequency (RF) interconnect or a direct current (DC) interconnect. The interposer circuit may be electrically coupled between the IC and the electrical interconnect. 1. A communication module , comprising:an integrated circuit (IC);an electrical interconnect comprising a radio frequency (RF) interconnect or a direct current (DC) interconnect; andan interposer circuit electrically coupled between the IC and the electrical interconnect.2. The communication module of claim 1 , wherein the IC comprises an electrical IC including at least one of a driver or a transimpedance amplifier.3. The communication module of claim 1 , wherein the IC comprises an optical IC including at least one of an optical modulator or an optical receiver.4. The communication module of claim 1 , wherein the electrical interconnect comprises a first electrical interconnect claim 1 , the communication module comprising a plurality of electrical interconnects that includes the first electrical interconnect claim 1 , and wherein the interposer circuit is electrically coupled between the IC and the plurality of electrical interconnects.5. The communication module of claim 4 , wherein the plurality of electrical interconnects comprises a plurality of RF interconnects and wherein the communication module does not include any wire bonds between the IC and the plurality of RF interconnects.6. The communication module of claim 1 , wherein the communication module is devoid of wire bonds between the IC and all RF interconnects that are electrically coupled to the IC.7. The communication module of claim 1 , wherein the electrical interconnect comprises the RF interconnect claim 1 , further comprising a plurality of RF bumps claim 1 , including a first RF bump to electrically couple ...

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07-05-2020 дата публикации

MULTIPLE-PATH RF AMPLIFIERS WITH ANGULARLY OFFSET SIGNAL PATH DIRECTIONS, AND METHODS OF MANUFACTURE THEREOF

Номер: US20200144968A1
Принадлежит:

A Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and first and second peaking amplifier dies. The RF signal splitter divides an input RF signal into first, second, and third input RF signals, and conveys the input RF signals to splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier dies each include one or more additional power transistors configured to amplify, along first and second peaking signal paths, the second and third input RF signals to produce amplified second and third RF signals. The dies are coupled to the substrate so that the RF signal paths through the carrier and one or more of the peaking amplifier dies extend in substantially different (e.g., orthogonal) directions. 1. An amplifier module comprising:a substrate with a mounting surface;a first amplifier die coupled to the mounting surface, wherein the first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input radio frequency (RF) signal to produce an amplified first RF signal at a first RF output terminal;a second amplifier die coupled to the mounting surface, wherein the second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal at a second RF output terminal;a third amplifier die coupled to the mounting surface, wherein the third amplifier die includes one or more third power transistors configured to amplify, along a third signal path, a third input RF signal to produce an amplified third RF signal at a third RF output terminal, wherein the first signal path extends in a first direction, and either or both of the second and third amplifier paths extend in substantially ...

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09-06-2016 дата публикации

RADIO FREQUENCY ISOLATION STRUCTURE WITH RACETRACK

Номер: US20160163661A1
Принадлежит:

Aspects of the present disclosure relate to a racetrack that forms part of an RF isolation structure of a packaged module and wireless devices that include such a packaged module. The racetrack can be disposed in a substrate and around an RF component that is on the substrate. The racetrack can include at least one break and/or at least one narrowed section without significantly degrading the EMI performance of the RF isolation structure. 1. (canceled)2. A wireless device comprising:an antenna configured to facilitate at least one of transmitting or receiving a radio-frequency (RF) signal;a packaged module in communication with the antenna, the packaged module including a substrate configured to receive a plurality of components; a radio frequency (RF) component coupled to a major surface the substrate; a racetrack in the substrate disposed around the RF component below the major surface of the substrate, the racetrack configured at a ground potential, and the racetrack having a section that has a break or a width that is narrower than other portions of the racetrack; and a conductive layer disposed above the RF component, the conductive layer electrically connected to the racetrack such that the racetrack and the conductive layer form at least a portion of an RF isolation structure around the RF component; andan other electronic module in communication with the packaged module.3. The wireless device of wherein the section is disposed in a low radiating area of the packaged module.4. The wireless device of wherein the RF component is configured to emit less electromagnetic radiation to the low radiating area of the packaged module than to other areas of the packaged module.5. The wireless device of wherein the packaged module is configured to receive less electromagnetic radiation at the low radiating area of the packaged module from the other electronic module than at other areas of the packaged module.6. The wireless device of wherein the racetrack has at least ...

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07-06-2018 дата публикации

Integrated fan-out package and method of fabricating the same

Номер: US20180158787A1

An integrated fan-out package including an insulating encapsulation, a radio frequency integrated circuit (RF-IC), an antenna, a ground conductor, and a redistribution circuit structure is provided. The integrated circuit includes a plurality of conductive terminals. The RF-IC, the antenna, and the ground conductor are embedded in the insulating encapsulation. The ground conductor is between the RF-IC and the antenna. The redistribution circuit structure is disposed on the insulating encapsulation, and the redistribution circuit structure is electrically connected to the conductive terminals, the antenna, and the ground conductor. A method of fabricating the integrated fan-out package is also provided

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08-06-2017 дата публикации

High frequency semiconductor amplifier

Номер: US20170162525A1
Автор: Kazutaka Takagi
Принадлежит: Toshiba Corp

A high frequency semiconductor amplifier includes an input circuit, a first semiconductor element, first bonding wires, an interstage circuit, second bonding wires, a second semiconductor element, third bonding wires, an output circuit, fourth bonding wires and a package. The input circuit includes a first DC blocking capacitor, an input transmission line, a first input pad part, and a first bias circuit. The interstage circuit includes a second DC blocking capacitor, an interstage transmission line, a first output pad part, and a second bias circuit, a microstrip line divider, and a second input pad part. The output circuit includes a second output pad part, a microstrip line combiner, a third DC blocking capacitor, an output transmission line, and a fourth bias circuit. The first and second semiconductor elements, the input circuit, the interstage circuit, and the output circuit are bonded to the package.

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23-05-2019 дата публикации

Power amplifier module, frontend circuit, and communication device

Номер: US20190158036A1
Автор: Isao Takenaka
Принадлежит: Murata Manufacturing Co Ltd

A PA module includes: a multilayer substrate having a ground pattern layer connected to a ground of a power source; amplifier transistors disposed on the multilayer substrate; a bypass capacitor having one end connected to the collector of the amplifier transistor; a first wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a second wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a third wiring line connecting the other end of the bypass capacitor and the ground pattern layer to each other; and a fourth wiring line formed between the amplifier transistor and the ground pattern layer and between the bypass capacitor and the ground pattern layer and connecting the first wiring line and the third wiring line to each other.

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23-05-2019 дата публикации

HIGH-FREQUENCY AMPLIFIER UNIT AND HIGH-FREQUENCY POWER AMPLIFICATION APPARATUS

Номер: US20190158037A1
Автор: NONOMURA Hiroyuki
Принадлежит: Mitsubishi Electric Corporation

A cooler including a first surface on which a first high-frequency amplifier is installed in intimate contact therewith and a second surface which is opposite to the first surface and on which a second high-frequency amplifier is installed in intimate contact therewith. The first high-frequency amplifier amplifies a high-frequency signal and outputs an amplified high-frequency signal from an output terminal thereof. The second high-frequency amplifier amplifies a high-frequency signal and outputs an amplified high-frequency signal from an output terminal thereof. The cooler includes, on a third surface thereof, a first cooler terminal through which refrigerant flows into the cooler and a second cooler terminal through which the refrigerant flows out of the cooler. The third surface intersects the first surface and the second surface 111-. (canceled)12: A high-frequency amplifier unit comprising:a cooler having a first surface on which a first high-frequency amplifier is installed in intimate contact therewith and a second surface which is opposite to the first surface and on which a second high-frequency amplifier is installed in intimate contact therewith, the first high-frequency amplifier configured to amplify a high-frequency signal inputted from a first high-frequency signal input terminal thereof and output an amplified high-frequency signal from a first high-frequency signal output terminal thereof, the second high-frequency amplifier configured to amplify a high-frequency signal inputted from a second high-frequency signal input terminal thereof and output an amplified high-frequency signal from a second high-frequency signal output terminal thereof,the cooler including, on a third surface thereof, a first cooler terminal through which refrigerant flows into the cooler and a second cooler terminal through which the refrigerant flows out of the cooler, the third surface intersecting the first surface and the second surface,the first high-frequency signal ...

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22-09-2022 дата публикации

Electronic element, circuit board with electronic element, and electronic device

Номер: US20220304138A1
Принадлежит: Huawei Technologies Co Ltd

An electronic element, a circuit board with an electronic element, and an electronic device are provided. The electronic element includes a substrate and a first input pad, at least one chip, and a first output pad that are disposed on a first surface of the substrate, where the first input pad, the at least one chip, and the first output pad are sequentially connected, the first input pad and the first output pad are directly disposed on the first surface of the substrate, and a surface of the first input pad facing away from the substrate and a surface of the first output pad facing away from the substrate constitute a partial area of an outer surface of the electronic element.

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24-06-2021 дата публикации

WIDEBAND RF POWER SPLITTERS AND AMPLIFIERS INCLUDING WIDEBAND RF POWER SPLITTERS

Номер: US20210194434A1
Принадлежит:

A power splitter for use in an amplifier (e.g., a Doherty amplifier) includes an input terminal, and first and second output terminals. The input terminal is configured to receive an input RF signal, the first output terminal is configured to produce a first RF output signal, and the second output terminal is configured to produce a second RF output signal. The power splitter also includes a first capacitance electrically coupled between the input terminal and the first output terminal, a second capacitance electrically coupled between the input terminal and the second output terminal, a first inductance electrically coupled between the input terminal and a ground reference node, a second inductance electrically coupled between the first output terminal and the ground reference node, a third inductance electrically coupled between the second output terminal and the ground reference node, and a resistance electrically coupled between the first and second output terminals. 1. A power splitter comprising:an input terminal configured to receive an input radio frequency (RF) signal;a first output terminal configured to produce a first RF output signal;a second output terminal configured to produce a second RF output signal;a first capacitance electrically coupled between the input terminal and the first output terminal;a second capacitance electrically coupled between the input terminal and the second output terminal;a first inductance electrically coupled between the input terminal and a ground reference node;a second inductance electrically coupled between the first output terminal and the ground reference node;a third inductance electrically coupled between the second output terminal and the ground reference node; anda resistance electrically coupled between the first and second output terminals.2. The power splitter of claim 1 , wherein:the first capacitance is directly coupled, without additional intervening electrical components, to the input terminal and the first ...

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15-06-2017 дата публикации

SCATTERING PARAMETER CALIBRATION TO A SEMICONDUCTOR LAYER

Номер: US20170168132A1
Принадлежит:

A compound may include a set of integrated circuits. An integrated circuit, of the set of integrated circuits, may include calibration standards integrated at a silicon layer of the integrated circuit. The integrated circuit may be included in a package, and a calibration standard, of the calibration standards, may be available to at least one port of a set of ports of the integrated circuit. 1. A compound , comprising: the integrated circuit being included in a package, and', 'a calibration standard, of the calibration standards, being available to at least one port of a set of ports of the integrated circuit., 'an integrated circuit, of the set of integrated circuits, including calibration standards integrated at a silicon layer of the integrated circuit,'}, 'a set of integrated circuits,'}2. The compound of claim 1 , where the calibration standards permit a set of measurements claim 1 , associated with calibrating a testing instrument claim 1 , to be performed at the silicon layer of the integrated circuit.3. The compound of claim 1 , where the silicon layer of the integrated circuit is not physically accessible by a testing instrument.4. The compound of claim 1 , where a first integrated circuit claim 1 , of the set of integrated circuits claim 1 , includes a first calibration standard of a particular type at a first position associated with a first port claim 1 , and a second integrated circuit claim 1 , of the set of integrated circuits claim 1 , includes a second calibration standard of the particular type at a second position associated with a second port claim 1 , where the first position is different from the second position.5. The compound of claim 1 , where terminals of the packaged integrated circuit comprise an impedance that is other than 50 Ohms.6. The compound of claim 1 , where a package type of the package associated with the integrated circuit is a same package type as a package type of a package associated with a device-under-test (DUT).7. The ...

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14-06-2018 дата публикации

Transmit-and-receive module

Номер: US20180166387A1
Принадлежит: Murata Manufacturing Co Ltd

A transmit-and-receive module includes a wiring substrate, a low-noise amplifier, a power amplifier, an insulating resin, and a conductive shield. The wiring substrate has a first surface and a second surface which is a back side of the first surface. The low-noise amplifier includes a first signal terminal and a first ground terminal. The first signal terminal is surface-mounted on the first surface. The power amplifier includes a second signal terminal and a second ground terminal. The second signal terminal and the second ground terminal are surface-mounted on the first surface. The insulating resin covers the low-noise amplifier and the power amplifier. The conductive shield covers a surface of the insulating resin. The first ground terminal is connected to the conductive shield.

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14-06-2018 дата публикации

Structure and formation method of chip package with antenna element

Номер: US20180166405A1

Structures and formation methods of a chip package are provided. The chip package includes a semiconductor die having a conductive element and a first protective layer surrounding the semiconductor die. The chip package also includes a second protective layer over the semiconductor die and the first protective layer. The chip package further includes an antenna element over the second protective layer. The antenna element is electrically connected to the conductive element of the semiconductor die.

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21-05-2020 дата публикации

HIGH-FREQUENCY MODULE

Номер: US20200161259A1
Принадлежит:

A module that improves heat-dissipation efficiency and can prevent a warp and a deformation of the module is provided. A module includes a substrate, a first component mounted on an upper surface of the substrate, a heat-dissipation member, and a sealing resin layer that seals the first component and the heat-dissipation member. The heat-dissipation member is formed to be larger than the area of the first component when viewed in a direction perpendicular to the upper surface of the substrate and prevents heat generation of the module by causing the heat generated from the first component to move outside the module. The heat-dissipation member has through holes, and the through holes are packed with a resin, which can prevent the sealing resin layer from peeling off. 1. A high-frequency module comprising:a substrate;a first component mounted on a major surface of the substrate;a heat-dissipation member disposed in contact with a surface of the first component opposite to a surface of the first component facing the major surface of the substrate; anda sealing resin layer sealing the major surface of the substrate, the first component, and the heat-dissipation member,wherein the heat-dissipation member has an area larger than an area of the first component when viewed in a direction perpendicular to the major surface of the substrate,wherein the heat-dissipation member has a plurality of through holes in a region that does not overlap the first component when viewed in the direction perpendicular to the major surface of the substrate, andwherein a resin constituting the sealing resin layer is also packed in the plurality of through holes.2. The high-frequency module according to claim 1 , further comprising:a second component mounted on the major surface of the substrate,wherein a height of the second component from the major surface is higher than a height of the first component from the major surface,wherein one of the plurality of through holes is larger than the ...

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23-06-2016 дата публикации

SEMICONDUCTOR PACKAGE HAVING A METAL PAINT LAYER

Номер: US20160181206A1
Принадлежит:

Disclosed are devices and methods related to a conductive paint layer configured to provide radio-frequency (RF) shielding for a packaged semiconductor module. Such a module can include a packaging substrate, one or more RF components mounted on the packaging substrate, a ground plane disposed within the packaging substrate, and a plurality of RF-shielding wirebonds disposed on the packaging substrate and electrically connected to the ground plane. The module can further include an overmold structure formed over the packaging substrate and dimensioned to substantially encapsulate the RF component(s) and the RF-shielding wirebonds. The overmold structure can define an upper surface that exposes upper portions of the RF-shielding wirebonds. The module can further include a conductive paint layer having silver flakes disposed on the upper surface of the overmold structure so that the conductive paint layer, the RF-shielding wirebonds, and the ground plane form an RF-shield for the RF component(s). 1. (canceled)2. A radio-frequency (RF) module comprising:a packaging substrate;a ground plane disposed below a first surface of the packaging substrate;a plurality of shielding components disposed relative to one or more RF components mounted on the first surface, the shielding components electrically connected to the ground plane;an overmold structure formed over the surface and dimensioned to substantially encapsulate the one or more RF components and the shielding components; anda conductive paint layer disposed on an upper surface of the overmold structure so that the conductive paint layer, the shielding components, and the ground plane are electrically connected to provide RF-shielding for a region associated with the one or more RF components, the conductive paint layer including silver flakes and an organic solvent that includes acetone and does not dissolve the silver flakes.3. The module of wherein the solvent includes one or more substances chosen from the group ...

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06-06-2019 дата публикации

Radio frequency isolation structure

Номер: US20190171785A1
Принадлежит: Skyworks Solutions Inc

Aspects of the present disclosure relate to a packaged module with a radio frequency isolation structure that includes a racetrack, a conductive layer, and a conductive feature in an electrical path between the racetrack and the conductive layer. The racetrack can be disposed in a substrate and configured at a ground potential. The racetrack can include a break.

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08-07-2021 дата публикации

FLIP-CHIP SEMICONDUCTOR-ON-INSULATOR TRANSISTOR LAYOUT

Номер: US20210210429A1
Принадлежит:

A flip-chip semiconductor-on-insulator die includes a substrate layer, an active layer, an insulator layer between the substrate layer and the active layer, a first metal layer, and a first via layer between the active layer and the first metal layer. The die at least first and second contact pads and a transistor including a first terminal formed within the active layer. A first portion of the first terminal falls within a footprint of the first contact pad and a second portion of the first terminal falls within a footprint of the second contact pad. 1. A flip-chip semiconductor-on-insulator die comprising:a substrate layer, an active layer, an insulator layer between the substrate layer and the active layer, a first metal layer, and a first via layer between the active layer and the first metal layer;at least first and second contact pads; anda transistor including a first terminal, the first terminal formed within the active layer, a first portion of the first terminal falling within a footprint of the first contact pad and a second portion of the first terminal falling within a footprint of the second contact pad.2. The die of wherein at least 25 percent of the first terminal falls within the combined footprints of the at least first and second contact pads.3. The die of wherein at least 50 percent of the first terminal falls within the combined footprints of the at least first and second contact pads.4. The die of wherein the transistor is divided into generally equally sized portions claim 1 , each generally equally sized portion connected to a respective one of the at least first and second contact pads.5. The die of further comprising a conduction path extending between the first terminal and the first and second contact pads claim 1 , the conduction path including a first via segment formed within the first via layer and a first metal segment formed within the first metal layer.6. The die of further comprising a second metal layer and a second via layer ...

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08-07-2021 дата публикации

MULTI-CHIP PACKING STRUCTURE EMPLOYING MILLIMETER WAVE

Номер: US20210210443A1
Принадлежит:

A multi-chip packaging structure employing millimeter wave includes a substrate material, a first and a second substrate board and an adhesive layer. The substrate material has a first metal pad. The first substrate board has a first and a second integrated circuit, multiple first metal wirings and multiple second metal pads, which are layer-by-layer stacked and electrically connected. The first and second metal pads are electrically connected via at least one metal lead. The adhesive layer is disposed between the substrate material and the first substrate board. The second substrate board has a third and a fourth integrated circuit, multiple second metal wirings and multiple third metal pads, which are layer-by-layer stacked and electrically connected. The electro-conductive boss blocks are respectively electrically connected with the second and third metal pads. Chips and antennas are integrated to integrate signal height and avoid interference and minify the volume. 1. A multi-chip packaging structure employing millimeter wave , comprising:a substrate material having a first face and a second face, the first face having a first metal pad;a first substrate board having a first integrated circuit, a second integrated circuit, multiple first metal wirings and multiple second metal pads, which are respectively layer-by-layer stacked and electrically connected with each other, the first and second metal pads being electrically connected via at least one metal lead;an adhesive layer disposed between the substrate material and the first substrate board;a second substrate board having a third integrated circuit, a fourth integrated circuit, multiple second metal wirings and multiple third metal pads, which are respectively layer-by-layer stacked and electrically connected with each other; andmultiple electro-conductive boss blocks respectively electrically connected with the second and third metal pads.2. The multi-chip packaging structure employing millimeter wave as ...

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29-06-2017 дата публикации

DYNAMIC ERROR VECTOR MAGNITUDE CORRECTION FOR RADIO-FREQUENCY AMPLIFIERS

Номер: US20170187331A1
Принадлежит:

Dynamic error vector magnitude correction for radio-frequency amplifiers. In some embodiments, a radio-frequency amplification system can include an amplifier configured to receive an input signal through an input path and generate an amplified signal, a power adjustment component implemented along the input path and configured to adjust power of the input signal, and a control circuit configured to provide a control signal to the power adjustment component based on an operating condition associated with the amplifier, such that an impact of the operating condition on the amplifier is compensated by the adjusted power of the input signal. 1. A radio-frequency amplification system comprising:an amplifier configured to receive an input signal through an input path and generate an amplified signal;a power adjustment component implemented along the input path and configured to adjust power of the input signal; anda control circuit configured to provide a control signal to the power adjustment component based on an operating condition associated with the amplifier, such that an impact of the operating condition on the amplifier is compensated by the adjusted power of the input signal.2. The radio-frequency amplification system of wherein the operating condition includes a temperature associated with the amplifier claim 1 , such that the control circuit is configured to provide a temperature-dependent control signal.3. The radio-frequency amplification system of wherein the amplifier includes a power amplifier.4. The radio-frequency amplification system of wherein the power adjustment component includes a variable attenuator.5. The radio-frequency amplification system of wherein the variable attenuator includes one or more transistors each having a variable attenuation property dependent on a bias signal.6. The radio-frequency amplification system of wherein the transistor is a complementary metal-oxide-semiconductor transistor.7. The radio-frequency amplification system ...

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15-07-2021 дата публикации

Manufactured interconnect packaging structure

Номер: US20210217712A1
Принадлежит: Michigan State University MSU

A method of manufacturing an interconnect packaging structure is provided. In one aspect, the method includes forming a first body defining a cavity around at least one integrated circuit using an additive manufacturing machine, depositing a conductive transmission line on the first body and electrically coupling the conductive transmission line and the at least one integrated circuit with a conductive interconnect.

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15-07-2021 дата публикации

HIGH RUGGEDNESS HETERJUNCTION BIPOLAR TRANSISTOR (HBT)

Номер: US20210217881A1
Принадлежит:

Provided is a high ruggedness heterojunction bipolar transistor (HBT), including a collector layer. The collector layer includes a InGaP layer or a wide bandgap layer. The bandgap of the InGaP layer is greater than 1.86 eV. 1. A high ruggedness heterojunction bipolar transistor , comprising:a substrate;a sub-collector layer being on the substrate and comprising an N-type III-V semiconductor materiala collector layer being on the sub-collector layer and comprising a III-V semiconductor material;a base layer being on the collector layer and comprising a P-type III-V semiconductor material;an emitter layer being on the base layer and comprising an N-type III-V semiconductor material;wherein the collector layer comprises an InGaP layer that is directly or indirectly adjacent to the sub-collector layer, and wherein a bandgap of the InGaP layer is greater than 1.86 eV or a photoluminescence peak wavelength of the InGaP layer is less than 667 nm.2. The high ruggedness heterojunction bipolar transistor as claimed in claim 1 , wherein the bandgap of the InGaP layer is further greater than 1.87 eV claim 1 , 1.88 eV claim 1 , 1.89 eV or 1.90 eV claim 1 , or the photoluminescence peak wavelength of the InGaP layer is further less than 666 nm claim 1 , 664 nm or 662 nm.3. The high ruggedness heterojunction bipolar transistor as claimed in claim 1 , wherein the collector layer further comprises a GaAs layer claim 1 , and the GaAs layer is directly formed on the InGaP layer.4. The high ruggedness heterojunction bipolar transistor as claimed in claim 1 , wherein the ratio of a thickness of the InGaP layer to a thickness of the collector layer is between 1 and 0.01.5. The high ruggedness heterojunction bipolar transistor as claimed in claim 1 , wherein the collector layer further comprises a middle layer and a top layer sequentially formed on the InGaP layer claim 1 , and a doping concentration of the middle layer is higher than that of the top layer.6. The high ruggedness ...

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22-07-2021 дата публикации

SEMICONDUCTOR DEVICE PACKAGE AND THE METHOD OF MANUFACTURING THE SAME

Номер: US20210225783A1

The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer. 1. A semiconductor device package , comprising:a dielectric layer;an antenna structure disposed in the dielectric layer;a semiconductor device disposed on the dielectric layer;an encapsulant covering the semiconductor device; anda conductive pillar having a first portion and a second portion,wherein the first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.2. The semiconductor device package of claim 1 , wherein the first portion has a first lateral surface and the second portion has a second lateral surface claim 1 , and the first lateral surface and the second lateral surface are substantially coplanar.3. The semiconductor device package of claim 1 , further comprising a redistribution layer (RDL) disposed on the encapsulant claim 1 , wherein the RDL electrically connects the conductive pillar with the semiconductor device.4. The semiconductor device package of claim 1 , wherein the conductive pillar is electrically connected to the antenna structure.5. The semiconductor device package of claim 1 , further comprising a seed layer surrounding the second portion of the conductive pillar.6. The semiconductor device package of claim 1 , wherein the antenna structure comprises a plurality of antenna elements claim 1 , wherein each of the plurality of antenna elements is recessed ...

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21-07-2016 дата публикации

SEMICONDUCTOR PACKAGES HAVING WIRE BOND WALL TO REDUCE COUPLING

Номер: US20160211222A1
Принадлежит:

A device (e.g., a Doherty amplifier) housed in an air cavity package includes one or more isolation structures over a surface of a substrate and defining an active circuit area. The device also includes first and second adjacent circuits within the active circuit area, first and second leads coupled to the isolation structure(s) between opposite sides of the package and electrically coupled to the first circuit, third and fourth leads coupled to the isolation structure(s) between the opposite sides of the package and electrically coupled to the second circuit, a first terminal over the first side of the package between the first lead and the third lead, a second terminal over the second side of the package between the second lead and the fourth lead, and an electronic component coupled to the package and electrically coupled to the first terminal, the second terminal, or both the first and second terminals. 1. A method of making a device housed within a package that includes a substrate , the method comprising the steps of:defining an active circuit area over the top surface of the substrate;positioning a first lead above the substrate and proximate to a first side of the package;positioning a second lead above the substrate and proximate to a second side of the package;positioning a third lead above the substrate and proximate to the first side of the package;positioning a fourth lead above the substrate and proximate to the second side of the package;attaching a first circuit over the top surface of the substrate within the active circuit area;electrically coupling the first circuit between the first and second leads;attaching a second circuit over the top surface of the substrate within the active circuit area and adjacent to the first circuit;electrically coupling the second circuit between the third and fourth leads;coupling a plurality of connection pads over the substrate in a row between the first circuit and the second circuit;positioning a first terminal ...

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27-06-2019 дата публикации

Semiconductor package having a metal paint layer

Номер: US20190198451A1
Принадлежит: Skyworks Solutions Inc

Disclosed are devices and methods related to a conductive paint layer configured to provide radio-frequency (RF) shielding for a packaged semiconductor module. Such a module can include a packaging substrate, one or more RF components mounted on the packaging substrate, a ground plane disposed within the packaging substrate, and a plurality of RF-shielding wirebonds disposed on the packaging substrate and electrically connected to the ground plane. The module can further include an overmold structure formed over the packaging substrate and dimensioned to substantially encapsulate the RF component(s) and the RF-shielding wirebonds. The overmold structure can define an upper surface that exposes upper portions of the RF-shielding wirebonds. The module can further include a conductive paint layer having silver flakes disposed on the upper surface of the overmold structure so that the conductive paint layer, the RF-shielding wirebonds, and the ground plane form an RF-shield for the RF component(s).

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27-06-2019 дата публикации

SELECTIVELY SHIELDING RADIO FREQUENCY MODULE WITH MULTI-LAYER ANTENNA

Номер: US20190198990A1
Принадлежит:

Aspects of this disclosure relate to selectively shielded radio frequency modules. A radio frequency module can include a package substrate, a radio frequency component on the package substrate, a multi-layer antenna, a radio frequency shielding structure configured to provide shielding between the multi-layer antenna and the radio frequency component. The radio frequency shielding structure can include a shielding layer providing a shield over the radio frequency component and leaving the radio frequency module unshielded over the antenna. 1. (canceled)2. A packaged radio frequency module comprising:a package substrate having a first side and a second side, the first side opposing the second side;a radio frequency component on the first side of the package substrate;a multi-layer antenna including a first portion on the first side of the package substrate and a second portion on the second side of the package substrate, the first portion electrically connected to the second portion; anda shielding layer located such that the radio frequency component is shielded by the shielding layer and the multi-layer antenna is unshielded by the shielding layer, the radio frequency component positioned between the shielding layer and the package substrate.3. The packaged radio frequency module of further comprising a via in the package substrate claim 2 , the first portion of the multi-layer antenna electrically connected to the second portion of the multi-layer antenna by way of the via.4. The packaged radio frequency module of further comprising wire bonds on the first side of the package substrate claim 2 , the wire bonds located between the radio frequency component and the first portion of the multi-layer antenna claim 2 , the wire bonds in physical contact with the shielding layer.5. The packaged radio frequency module of further comprising a conductive conformal structure located between the radio frequency component and the first portion of the multi-layer antenna claim ...

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18-06-2020 дата публикации

RF Amplifier with Impedance Matching Components Monolithically Integrated in Transistor Die

Номер: US20200195205A1
Принадлежит:

A packaged amplifier circuit includes an RF package with a die pad, and RF input and output leads extending away from the die pad opposite directions. An RF transistor die is mounted on the die pad such that a first outer edge side of the RF transistor die faces the first RF lead and a second outer edge side of the RF transistor die faces the second RF lead. A passive electrical connector is integrally formed in the RF transistor die. The passive electrical connector includes a first end connection point closer to the first outer edge side, and a second end connection point closer to the second outer edge side. A first discrete reactive device is mounted on the die pad between the first outer edge side and the first RF lead. The passive electrical connector electrically couples the first discrete reactive device to the second RF lead. 1. A packaged amplifier circuit , comprising:an RF package comprising an electrically conductive die pad, an electrically conductive first RF lead extending away from the die pad, and an electrically conductive second RF lead extending away from the die pad in an opposite direction as the first RF lead;an RF transistor die mounted on the die pad such that a first outer edge side of the RF transistor die faces the first RF lead and a second outer edge side of the RF transistor die faces the second RF lead; anda passive electrical connector integrally formed in the RF transistor die, the passive electrical connector comprising: a first end connection point disposed closer to the first outer edge side, and a second end connection point disposed closer to the second outer edge side; anda first discrete reactive device mounted on the die pad between the first outer edge side of the RF transistor die and the first RF lead;wherein the passive electrical connector electrically couples the first discrete reactive device to the second RF lead.2. The packaged amplifier circuit of claim 1 , wherein the RF transistor die comprises an RF input ...

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29-07-2021 дата публикации

PACKAGE WITH DIFFERENT TYPES OF SEMICONDUCTOR DIES ATTACHED TO A FLANGE

Номер: US20210233877A1
Принадлежит:

A multi-die package includes a thermally conductive flange, a first semiconductor die made of a first semiconductor material attached to the thermally conductive flange via a first die attach material, a second semiconductor die attached to the same thermally conductive flange as the first semiconductor die via a second die attach material, and leads attached to the thermally conductive flange or to an insulating member secured to the flange. The leads are configured to provide external electrical access to the first and second semiconductor dies. The second semiconductor die is made of a second semiconductor material different than the first semiconductor material. Additional multi-die package embodiments are described. 117.-. (canceled)18. A multi-die package , comprising:a thermally conductive flange;a first semiconductor die made of a first semiconductor material attached to the thermally conductive flange via a first die attach material;a second semiconductor die made of a second semiconductor material different than the first semiconductor material and attached to the same thermally conductive flange as the first semiconductor die via a second die attach material; anda circuit board attached to the thermally conductive flange, the circuit board comprising a plurality of metal traces which form leads configured to provide external electrical access to the first and second semiconductor dies, and a plurality of openings through which the first and second semiconductor dies are attached to the thermally conductive flange.19. The multi-die package of claim 18 , further comprising electrical conductors which electrically connect respective ones of the metal traces to different terminals of the first and second semiconductor dies to form a circuit.20. The multi-die package of claim 18 , further comprising a passive semiconductor die attached to the thermally conductive flange through a the same opening in the circuit board as one of the first and second ...

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06-08-2015 дата публикации

Power semiconductor device and method therefor

Номер: US20150221558A1
Автор: Robert Bruce Davies
Принадлежит: Estivation Properties LLC

A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a control electrode coupled to a control electrode interconnection region overlying the first major surface, and a second electrode coupled to a second electrode interconnection region overlying a second major surface. Each transistor cell has an approximately constant doping concentration in the channel region. A dielectric platform is used as an edge termination of an epitaxial layer to maintain substantially planar equipotential lines therein. The power transistor finds particular utility in radio frequency applications operating at a frequency greater than 500 megahertz and dissipating more than 5 watts of power. The semiconductor die and package are designed so that the power transistor can efficiently operate under such severe conditions.

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05-08-2021 дата публикации

SEMICONDUCTOR DEVICE

Номер: US20210242144A1
Принадлежит: Mitsubishi Electric Corporation

A semiconductor device includes: a thick copper member in which a semiconductor chip is mounted; a printed circuit board that is disposed on a front surface of the thick copper member and provided with an opening exposing a part of the front surface of the thick copper member, a wiring pattern, and conductive vias connecting the pattern and the thick copper member; a semiconductor chip mounted on the front surface of the thick copper member exposed through the opening and connected to the pattern by a metal wire; an electronic component mounted on a front surface of the printed circuit board opposite to a side facing the thick copper member and connected to the pattern; and a cap or an epoxy resin sealing the front surface of the printed circuit board opposite to a side facing the thick copper member, the chip, the component, and the metal wire. 1. A semiconductor device in which a plurality of external electrode terminals to be connected to a mounting target apparatus to which the semiconductor device is installed are formed on a rear surface , and a semiconductor chip for processing a high frequency signal are mounted , the semiconductor device comprising:a thick copper member in which a plurality of the external electrode terminals are formed and the semiconductor chip is mounted on one of a plurality of the external electrode terminals;a printed circuit board that is disposed on a front surface of the thick copper member and provided with an opening exposing a part of the front surface of the thick copper member, a wiring pattern, and a conductive via connecting the wiring pattern and the thick copper member;a semiconductor chip that is mounted on the front surface of the thick copper member exposed through the opening and connected to the wiring pattern by a metal wire;an electronic component that is mounted on a front surface of the printed circuit board opposite to a side facing the thick copper member and connected to the wiring pattern; anda cap or an epoxy ...

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23-10-2014 дата публикации

Ka-band high power amplifier structure having minimum processing and assembling errors

Номер: US20140312988A1
Автор: Moohong Lee
Принадлежит: XMW Inc

A Ka-band high power amplifier structure having minimum processing and assembling errors, which uses a technique in which input and output waveguide flanges of individual amplifiers which are connected in parallel are connected to a waveguide divider and a waveguide combiner from above, and uses a waveguide transition patch implemented on an interconnect substrate for coupling to the individual amplifier to avoid the use of an input and output connector pin and an interconnector.

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11-07-2019 дата публикации

Switch ic, front-end module, and communication apparatus

Номер: US20190214355A1
Автор: Hiroshi Nishikawa
Принадлежит: Murata Manufacturing Co Ltd

A switch IC includes first, second and third switch units, and an amplifier. The first switch unit and the third switch unit are adjacent to each other. The third switch unit and the amplifier are adjacent to each other. The amplifier and the second switch unit are adjacent to each other. The first, second and third switch units, and the amplifier are disposed on a straight line in an order in which a signal passes through the first switch unit, the second switch unit, the third switch unit, and the amplifier.

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10-08-2017 дата публикации

Integrated 3-Way Doherty Amplifier

Номер: US20170230009A1
Принадлежит:

A die is described comprising at least one 3-way Doherty amplifier comprising a main stage, a first peak stage and a second peak stage. An input is connected to an input network which is connected to the main stage, first peak stage and second peak stage. The input network includes a first impedance connected to an input of the first peak stage and providing a −90° phase shift and a second impedance connected to an input of the second peak stage and providing a 90° phase shift. An output is connected to an output network which is connected to the main stage, first peak stage and second peak stage. The output network includes a third impedance connected to the output of the first peak stage and providing a 180° phase shift and a fourth impedance connected to the output of the main stage and providing a 90° phase shift. 1. A die comprising at least one 3-way Doherty amplifier , the 3-way Doherty amplifier comprising:a main stage;a first peak stage;a second peak stage;an input connected to an input network which is connected to the main stage, first peak stage and second peak stage, wherein the input network includes a first impedance connected to an input of the first peak stage and providing a −90° phase shift and a second impedance connected to an input of the second peak stage and providing a 90° phase shift; andan output connected to an output network which is connected to the main stage, first peak stage and second peak stage, wherein the output network includes a third impedance connected to the output of the first peak stage and providing a 180° phase shift and a fourth impedance connected to the output of the main stage and providing a 90° phase shift.2. The die of claim 1 , wherein the third impedance comprises at least one first bond wire connected between an output of the first peak stage and the output of the amplifier and the fourth impedance comprises at least one second bond wire connected between an output of the main stage and the output of the ...

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10-08-2017 дата публикации

VAPOR CHAMBER AMPLIFIER MODULE

Номер: US20170230011A1
Принадлежит:

In one embodiment, an electronic system includes a printed circuit board, one or more packaged semiconductor devices, and a vapor chamber having a top and a bottom and enclosing a sealed cavity that is partially filled with a coolant. The vapor chamber comprises a thermo-conductive and electro-conductive material. The top of the vapor chamber has one or more depressions formed therein, each depression receiving and thermo-conductively connected to at least part of a bottom of a corresponding packaged semiconductor device, which is mounted through a corresponding aperture in the PCB. A heat sink may be thermo-conductively attached to the bottom of the vapor chamber. 1. An apparatus comprising: the vapor chamber comprises a thermo-conductive material;', 'the top of the vapor chamber has at least one depression formed therein; and', 'the depression is adapted to receive and thermo-conductively connect to at least part of a bottom of a corresponding packaged semiconductor device mounted through a corresponding aperture in a corresponding printed circuit board (PCB)., 'a vapor chamber having a top and a bottom and enclosing a sealed cavity that is partially filled with a coolant, wherein2. The apparatus of claim 1 , further comprising:the PCB; andthe corresponding packaged semiconductor device mounted onto the PCB through the corresponding PCB aperture, wherein the vapor chamber depression receives and thermo-conductively connects to at least part of the bottom of the corresponding packaged semiconductor device.3. The apparatus of claim 2 , further comprising a heat sink thermo-conductively connected to the bottom of the vapor chamber.4. The apparatus of claim 3 , wherein:the PCB comprises a set of PCB holes;the vapor chamber comprises a set of vapor-chamber holes corresponding to the set of PCB holes;the heat sink comprises a set of tapped heat-sink holes corresponding to the set of PCB holes and the set of vapor-chamber holes; anda set of screws are inserted through ...

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09-07-2020 дата публикации

MOBILE OBJECT AND WIRELESS COMMUNICATION MODULE

Номер: US20200219829A1
Автор: Ogata Takumi
Принадлежит:

A wireless communication module with improved performance and a mobile object that is equipped with the wireless communication module with the improved performance are provided. The mobile object is equipped with a wireless communication module. The wireless communication module includes a substrate, a first element, and a second element. The substrate includes ground layers. The first element is arranged on the substrate and amplifies an input RF signal. The second element is arranged on the substrate and different from the first element. Each of the ground layers has a groove formed between the first element and the second element. 1. A mobile object comprising a substrate that includes one or more ground layers;', 'a first element that is arranged on the substrate and configured to amplify an input RF signal; and', 'a second element that is arranged on the substrate and is different from the first element,', 'wherein the one or more ground layers include a groove formed between the first element and the second element., 'a wireless communication module that includes2. A wireless communication module comprising:a substrate that includes one or more ground layers;a first element that is arranged on the substrate and configured to amplify an input RF signal; anda second element that is arranged on the substrate and is different from the first element,wherein the one or more ground layers include a groove formed between the first element and the second element.3. The wireless communication module according to claim 2 ,wherein the one or more ground layers include a first ground layer serving as a surface layer on which the first element is arranged, and a second ground layer serving as an inner layer.4. The wireless communication module according to or claim 2 ,wherein the groove surrounds the first element, andin each of the one or more ground layers, an inner portion surrounded by the groove and an outer portion are electrically separated.5. The wireless ...

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19-08-2021 дата публикации

DISTRIBUTED AMPLIFIERS WITH CONTROLLABLE LINEARIZATION

Номер: US20210257974A1
Автор: Wu Jonathan Xiang
Принадлежит:

Distributed amplifiers with controllable linearization are provided herein. In certain embodiments, a distributed amplifier includes a differential input transmission line, a differential output transmission line, and a plurality of differential distributed amplifier stages connected between the differential input transmission line and the differential output transmission line at different points or nodes. The distributed amplifier further includes a differential non-linearity cancellation stage connected between the differential input transmission line and the differential output transmission line and providing signal inversion relative to the differential distributed amplifier stages. The differential non-linearity cancellation stage operates with a separately controllable bias from the differential distributed amplifier stages, thereby providing a mechanism to control the linearity of the distributed amplifier. 1. A distributed amplifier with controllable linearization , the distributed amplifier comprising:a differential input transmission line configured to receive a radio frequency (RF) input signal;a differential output transmission line;a plurality of differential distributed amplifier stages each connected between the differential input transmission line and the differential output transmission line, wherein the plurality of differential distributed amplifier stages are configured to amplify the RF input signal to generate an amplified RF output signal on the differential output transmission line; anda differential non-linearity cancellation stage connected between the differential input transmission line and the differential output transmission line and providing an inversion to the RF input signal relative to the plurality of differential distributed amplifier stages, wherein a bias of the differential non-linearity cancellation stage is separately controllable from a bias of the plurality of differential distributed amplifier stages.2. The distributed ...

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18-08-2016 дата публикации

Semiconductor device with an isolation structure coupled to a cover of the semiconductor device

Номер: US20160240488A1
Принадлежит: FREESCALE SEMICONDUCTOR INC

A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.

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18-08-2016 дата публикации

DEVICES AND METHODS RELATED TO ELECTROSTATIC DISCHARGE PROTECTION BENIGN TO RADIO-FREQUENCY OPERATION

Номер: US20160240496A1
Принадлежит:

Disclosed are systems, devices and methods for providing electrostatic discharge (ESD) protection for integrated circuits. In some implementations, first and second conductors with ohmic contacts on an intrinsic semiconductor region can function similar to an x-i-y type diode, where each of x and y can be n-type or p-type. Such a diode can be configured to turn on under selected conditions such as an ESD event. Such a structure can be configured so as to provide an effective ESD protection while providing little or substantially nil effect on radio-frequency (RF) operating properties of a device. 1. (canceled)2. A wireless device comprising:an antenna;a receiver circuit coupled to the antenna and configured to process a radio-frequency (RF) signal; anda monolithic microwave integrated circuit (MMIC) configured to facilitate the processing of the RF signal, the MMIC including a semiconductor substrate with an intrinsic region and an RF circuit disposed on the semiconductor substrate, the MMIC further including a first conductor disposed relative to the intrinsic region and electrically connected to the RF circuit, the MMIC further including a second conductor disposed relative to the intrinsic region, the first and second conductors configured so that a potential difference greater than a selected value between the first and second conductors results in a conduction path through the intrinsic region between the first and second conductors.3. The wireless device of wherein a lateral width of the first conductor claim 2 , a lateral width of the second conductor claim 2 , and an edge-to-edge separation between the first and second conductors are such that a portion of the intrinsic region below the first conductor is greater than a portion of the intrinsic region below the second conductor to increase the likelihood that a charge from an electrostatic discharge (ESD) event enters the first conductor.4. The wireless device of wherein the lateral width of the first ...

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27-08-2015 дата публикации

METHOD AND APPARATUS FOR INCORPORATING PASSIVE DEVICES IN AN INTEGRATED PASSIVE DEVICE SEPARATE FROM A DIE

Номер: US20150244410A1
Принадлежит:

A circuit including a first die, an integrated passive device and a second layer. The first die includes a first substrate and active devices. The integrated passive device includes a first layer, a second substrate and passive devices. The second substrate includes vias. The passive devices are implemented at least on the first layer or the second substrate. A resistivity per unit area of the second substrate is greater than a resistivity per unit area of the first substrate. The second layer is disposed between the first die and the integrated passive device. The second layer includes pillars. Each of the pillars connects a corresponding one of the active devices to (i) one of the vias, or (ii) one of the passive devices. The first die, the integrated passive device and the second layer are disposed relative to each other to form a stack. 1. A circuit comprising:a first die comprising a first substrate and a plurality of active devices;an integrated passive device comprising a first layer, a second substrate and a plurality of passive devices, wherein the second substrate comprises a plurality of vias, and wherein the plurality of passive devices are implemented at least on the first layer or the second substrate, and wherein a resistivity per unit area of the second substrate is greater than a resistivity per unit area of the first substrate; anda second layer disposed between the first die and the integrated passive device, wherein the second layer comprises a plurality of pillars, wherein each of the plurality of pillars connects a corresponding one of the plurality of active devices to (i) one of the plurality of vias, or (ii) one of the plurality of passive devices,wherein the first die, the integrated passive device and the second layer are disposed relative to each other to form a stack.2. The circuit of claim 1 , further comprising:a medium access control module configured to (i) receive data, and (ii) generate a signal comprising the data; anda physical ...

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25-07-2019 дата публикации

Surface mount device stacking for reduced form factor

Номер: US20190230794A1
Принадлежит: Skyworks Solutions Inc

A packaged module for use in a wireless communication device has a substrate supporting an integrated circuit die that includes at least a microprocessor and radio frequency receiver circuitry and a stacked filter assembly configured as a filter circuit that is in communication with the radio frequency receiver circuitry. The stacked filter assembly includes a plurality of passive components, where each passive component is packaged as a surface mount device. At least one passive component is in direct communication with the substrate and at least another passive component is supported above the substrate by the at least one passive component that is in the direct communication with the substrate.

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26-08-2021 дата публикации

Device Carrier Configured for Interconnects, a Package Implementing a Device Carrier Having Interconnects, and Processes of Making the Same

Номер: US20210265249A1
Принадлежит:

A device includes: a surface mount device carrier configured to be mounted to a metal submount of a transistor package, said surface mount device carrier includes an insulating substrate includes a top surface and a bottom surface and a first pad and a second pad arranged on a top surface of said surface mount device carrier; at least one surface mount device includes a first terminal and a second terminal, said first terminal of said surface mount device mounted to said first pad and said second terminal mounted to said second pad; and at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by said insulating substrate, where at least one of the first pad and the second pad are configured as wire bond pads. 1. An RF transistor package , comprising ,a metal submount;a transistor die mounted to said metal submount;a surface mount device carrier mounted to said metal submount, said surface mount device carrier comprising an insulating substrate comprising a top surface and a bottom surface and a first pad and a second pad arranged on a top surface of said surface mount device carrier;at least one surface mount device comprising a first terminal and a second terminal, said first terminal of said surface mount device mounted to said first pad and said second terminal mounted to said second pad;at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by said insulating substrate; andat least one wire bond bonded to the at least one of the first pad and the second pad.2. The RF transistor package according to wherein the surface mount device comprises a ceramic capacitor.3. The RF transistor package according to wherein:the transistor die comprises one of the following: an LDMOS transistor die and a GaN based HEMT; andthe insulating substrate comprises one of the following: a printed circuit board (PCB) component, a ceramic component, a glass component, a ...

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26-08-2021 дата публикации

INTEGRATED PASSIVE DEVICE (IPD) COMPONENTS AND A PACKAGE AND PROCESSES IMPLEMENTING THE SAME

Номер: US20210265250A1
Принадлежит:

An RF transistor package includes a metal submount; a transistor die mounted to the metal submount; and a surface mount IPD component mounted to the metal submount. The surface mount IPD component includes a dielectric substrate that includes a top surface and a bottom surface and at least a first pad and a second pad arranged on a top surface of the surface mount IPD component; at least one surface mount device includes a first terminal and a second terminal, the first terminal of the surface mount device mounted to the first pad and the second terminal mounted to the second pad; at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by the dielectric substrate; and at least one wire bond bonded to the at least one of the first pad and the second pad. 1. An RF transistor package , comprising ,a metal submount;a transistor die mounted to said metal submount;a surface mount IPD component mounted to said metal submount, said surface mount IPD component comprising a dielectric substrate comprising a top surface and a bottom surface and at least a first pad and a second pad arranged on a top surface of said surface mount IPD component;at least one surface mount device comprising a first terminal and a second terminal, said first terminal of said surface mount device mounted to said first pad and said second terminal mounted to said second pad;at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by said dielectric substrate; andat least one wire bond bonded to the at least one of the first pad and the second pad.2. The RF transistor package according to wherein the surface mount IPD component comprises a substrate comprising at least one of the following: Alumina claim 1 , Aluminum Nitride (AlN) claim 1 , and Beryllium oxide (BeO).3. The RF transistor package according to wherein the surface mount IPD component comprises an Alumina substrate.4. The RF ...

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23-08-2018 дата публикации

3D Low Flux, High-Powered MMIC Amplifiers

Номер: US20180241356A1
Принадлежит:

The present disclosure relates systems and methods for providing a three-dimensional device architecture for transistor elements in a power amplifier circuit. Namely, an example system may include a plurality of high electron mobility transistors disposed on a first substrate. A first portion of the plurality of high electron mobility transistors are electrically coupled via respective first level interconnects disposed on the first substrate. The system also includes a plurality of second level interconnects disposed on a second substrate. A second portion of the plurality of high electron mobility transistors are electrically coupled via respective second level interconnects. The first substrate and the second substrate are coupled such that the plurality of high electron mobility transistors provides an amplified output signal via at least one of the first level interconnects or the second level interconnects. 1. A system comprising:a plurality of high electron mobility transistors disposed on a first substrate, wherein the plurality of high electron mobility transistors is configured to accept an input signal from an input and provide an output signal at an output, wherein the output signal comprises an amplified version of the input signal, wherein a first portion of the plurality of high electron mobility transistors are electrically coupled via respective first level interconnects disposed on the first substrate; anda plurality of second level interconnects disposed on a second substrate, wherein the first substrate and the second substrate comprise different materials, wherein a second portion of the plurality of high electron mobility transistors are electrically coupled via respective second level interconnects, wherein the first substrate and the second substrate are coupled such that the plurality of high electron mobility transistors provides the output signal via at least one of the first level interconnects or the second level interconnects.2. The ...

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08-09-2016 дата публикации

High-frequency module and microwave transceiver

Номер: US20160261292A1
Принадлежит: Toshiba Corp

A high-frequency module according to an embodiment includes a first board, a first device, a second board, a metal core, and a casing. The first board is formed with an opening, and has a surface at a first side on which a transmission circuit transmitting microwaves is formed. The first device is disposed in the opening of the first board. The second substrate is disposed at a second side of the first board. The second substrate is formed with a control circuit for the first device, and has an opening at a location overlapping the first device. The metal core is disposed between the first board and the second board, and is in contact with the first device. The casing includes a connection connected with the metal core via an opening formed in the second board.

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06-09-2018 дата публикации

Package with Different Types of Semiconductor Dies Attached to a Flange

Номер: US20180254253A1
Принадлежит:

A multi-die package includes a thermally conductive flange, a first semiconductor die made of a first semiconductor material attached to the thermally conductive flange via a first die attach material, a second semiconductor die attached to the same thermally conductive flange as the first semiconductor die via a second die attach material, and leads attached to the thermally conductive flange or to an insulating member secured to the flange. The leads are configured to provide external electrical access to the first and second semiconductor dies. The second semiconductor die is made of a second semiconductor material different than the first semiconductor material. Additional multi-die package embodiments are described. 1. A multi-die package , comprising:a thermally conductive flange;a first semiconductor die made of a first semiconductor material attached to the thermally conductive flange via a first die attach material;a second semiconductor die attached to the same thermally conductive flange as the first semiconductor die via a second die attach material; andleads attached to the thermally conductive flange or to an insulating member secured to the flange,wherein the leads are configured to provide external electrical access to the first and second semiconductor dies,wherein the second semiconductor die is made of a second semiconductor material different than the first semiconductor material,2. The multi-die package of claim 1 , wherein the first semiconductor die is made of GaN and the second semiconductor die is made of Si.3. The u t -die package of claim 2 , wherein the first semiconductor die is a main amplifier of a Doherty amplifier circuit and the second semiconductor die is a peaking amplifier of the Doherty amplifier circuit.4. The multi-die package of claim 1 , wherein the first semiconductor die is a power transistor die and the second semiconductor die is a power transistor die.5. The multi-die package of claim 1 , wherein a plurality of ...

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07-09-2017 дата публикации

Power amplifier modules with bonding pads and related systems, devices, and methods

Номер: US20170257070A1
Принадлежит: Skyworks Solutions Inc

One aspect of this disclosure is a power amplifier module that includes a power amplifier die, a first bonding pad on a conductive trace, and a second bonding pad on a conductive trace. The die includes an on-die passive device and a power amplifier. The first bonding pad is electrically connected to the on-die passive device by a first wire bond. The second bonding pad is in a conductive path between the first bonding pad and a radio frequency output of the power amplifier module. The second bonding pad includes a nickel layer having a thickness that is less than 0.5 um, a palladium layer over the nickel layer, and a gold layer over the palladium layer and bonded to a second wire bond that is electrically connected to an output of the power amplifier. Other embodiments of the module are provided along with related methods and components thereof.

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06-09-2018 дата публикации

SURFACE MOUNT DEVICE STACKING FOR REDUCED FORM FACTOR

Номер: US20180255643A1
Принадлежит:

A packaged module for use in a wireless communication device has a substrate supporting an integrated circuit die that includes at least a microprocessor and radio frequency receiver circuitry and a stacked filter assembly configured as a filter circuit that is in communication with the radio frequency receiver circuitry. The stacked filter assembly includes a plurality of passive components, where each passive component is packaged as a surface mount device. At least one passive component is in direct communication with the substrate and at least another passive component is supported above the substrate by the at least one passive component that is in the direct communication with the substrate. 1. (canceled)2. A packaged module for use in a wireless device , the packaged module comprising:a substrate;a first die supported by the substrate;a stacked assembly of surface mount devices including first and second surface mount devices supported by the substrate, and the stacked assembly further including a third surface mount device supported by the first surface mount device and supported by the second surface mount device, the first and second surface mount devices disposed between the substrate and the third surface mount device; andan overmold which encloses the first die and the stacked assembly.3. The packaged module of wherein the surface mount devices are passive components.4. The packaged module of wherein the passive components are selected from the group consisting of resistors claim 3 , capacitors claim 3 , and inductors.5. The packaged module of wherein the stacked assembly is configured as a filter circuit.6. The packaged module of further comprising a second die supported by the substrate claim 2 , the second die disposed between the first die and the substrate claim 2 , the first die including an overhanging portion extending beyond at least one edge of the second die.7. The packaged module of further comprising one or more supports disposed under the ...

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21-10-2021 дата публикации

AMPLIFIER MODULES WITH POWER TRANSISTOR DIE AND PERIPHERAL GROUND CONNECTIONS

Номер: US20210328551A1
Принадлежит:

A power amplifier module includes a module substrate, a power transistor die, and a heat spreader. The module substrate has first, second, and third module pads exposed at a mounting surface. The power transistor die has an input/output surface that faces the mounting surface, an opposed ground surface, an input pad electrically coupled to the first module pad, an output pad electrically coupled to the second module pad, and an integrated power transistor. In an embodiment, the power transistor is a field effect transistor with a gate terminal coupled to the input pad, a drain terminal coupled to the output pad, and a source terminal coupled to the ground surface. The heat spreader has a thermal contact surface that is physically and electrically coupled to the ground surface of the power transistor die. An electrical ground contact structure is connected between the thermal contact surface and the third module pad. 1. A power amplifier module comprising:a module substrate with a mounting surface, a first module pad exposed at the mounting surface, a second module pad exposed at the mounting surface, and a third module pad exposed at the mounting surface;a first power transistor die with an input/output (I/O) surface, a ground surface opposite the I/O surface, an input pad exposed at the I/O surface, an output pad exposed at the I/O surface, and an integrated power transistor with a control terminal electrically coupled to the input pad, a first current-carrying terminal electrically coupled to the output pad, and a second current-carrying terminal electrically coupled to the ground surface, wherein the first power transistor die is coupled to the module substrate with the I/O surface facing the mounting surface, the input pad electrically coupled to the first module pad, and the output pad electrically coupled to the second module pad;a first heat spreader with a first thermal contact surface that is physically and electrically coupled to the ground surface of the ...

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20-09-2018 дата публикации

SEMICONDUCTOR PACKAGES HAVING WIRE BOND WALL TO REDUCE COUPLING

Номер: US20180269158A1
Принадлежит:

A device (e.g., a Doherty amplifier) housed in an air cavity package includes one or more isolation structures over a surface of a substrate and defining an active circuit area. The device also includes first and second adjacent circuits within the active circuit area, first and second leads coupled to the isolation structure(s) between opposite sides of the package and electrically coupled to the first circuit, third and fourth leads coupled to the isolation structure(s) between the opposite sides of the package and electrically coupled to the second circuit, a first terminal over the first side of the package between the first lead and the third lead, a second terminal over the second side of the package between the second lead and the fourth lead, and an electronic component coupled to the package and electrically coupled to the first terminal, the second terminal, or both the first and second terminals. 1. A device comprising:a ground plane having a first surface;a first circuit coupled to the first surface of the ground plane;a second circuit coupled to the first surface of the ground plane adjacent to the first circuit;a first lead coupled to but electrically isolated from the ground plane, which is proximate to a first side of the package, wherein the first lead is electrically coupled to the first circuit;a second lead coupled to but electrically isolated from the ground plane, which is proximate to a second side of the package, wherein the second lead is electrically coupled to the first circuit;a third lead coupled to but electrically isolated from the ground plane, which is proximate to the first side of the package, wherein the third lead is electrically coupled to the second circuit;a fourth lead coupled to but electrically isolated from the ground plane, which is proximate to the second side of the package, wherein the fourth lead is electrically coupled to the second circuit; anda wire bond wall coupled to a region of the ground plane that is located ...

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27-09-2018 дата публикации

LDMOS Transistor Structure and Method of Manufacture

Номер: US20180277501A1
Принадлежит: INFINEON TECHNOLOGIES AG

In an embodiment, a method includes forming a first opening in a front surface of a semiconductor substrate including a LDMOS transistor structure, and covering the first opening with a first layer to form an enclosed cavity defined by material of the semiconductor substrate and the first layer. The material of the first layer lines sidewalls of the enclosed cavity.

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06-10-2016 дата публикации

MULTI-CAVITY PACKAGE HAVING SINGLE METAL FLANGE

Номер: US20160294340A1
Принадлежит:

A multi-cavity package includes a single metal flange having first and second opposing main surfaces, a circuit board attached to the first main surface of the single metal flange, the circuit board having a plurality of openings which expose different regions of the first main surface of the single metal flange, and a plurality of semiconductor dies each of which is disposed in one of the openings in the circuit board and attached to the first main surface of the single metal flange. The circuit board includes a plurality of metal traces for electrically interconnecting the semiconductor dies to form a circuit. A corresponding method of manufacturing is also provided. 1. A multi-cavity package , comprising:a single metal flange having first and second opposing main surfaces;a circuit board attached to the first main surface of the single metal flange, the circuit board having a first surface facing the single metal flange, a second surface facing away from the first surface, and a plurality of openings which expose different regions of the first main surface of the single metal flange; anda plurality of semiconductor dies each of which is disposed in one of the openings in the circuit board and attached to the first main surface of the single metal flange,wherein the circuit board comprises a plurality of metal traces for electrically interconnecting the semiconductor dies to form a circuit, wherein the metal traces form a single layer disposed on the second surface of the circuit board, andwherein at least one of the semiconductor dies is an amplifier die.2. The multi-cavity package of claim 1 , wherein at least one of the semiconductor dies is a vertical transistor die having a first terminal attached to the single metal flange through the opening in the circuit board in which that semiconductor die is disposed claim 1 , and a second terminal and a third terminal at a side of the vertical transistor die opposite the first terminal.3. The multi-cavity package of ...

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27-08-2020 дата публикации

HIGH-FREQUENCY AMPLIFIER

Номер: US20200274497A1
Автор: MATSUI Toshio
Принадлежит: Mitsubishi Electric Corporation

A transistor () is provided on a surface of a semiconductor substrate (). First and second wirings () are provided on the surface of the semiconductor substrate () and sandwich the transistor (). Plural wires () pass over the transistor () and are connected to the first and second wirings (). A sealing material () sealing the transistor (), the first and second wirings (), and the plural wires (). The sealing material () contains a filler (). An interval distance between the plural wires () is smaller than a particle diameter of the filler (). The sealing material () does not intrude into a space between the plural wires () and the transistor () so that a cavity () is formed. 1. A high-frequency amplifier comprising:a semiconductor substrate;a transistor provided on a surface of the semiconductor substrate and having a gate electrode, a source electrode and a drain electrode;first and second wirings provided on the surface of the semiconductor substrate and sandwiching the gate electrode, the source electrode and the drain electrode;plural wires passing over the gate electrode, the source electrode and the drain electrode and connected to the first and second wirings; anda sealing material sealing the transistor, the first and second wirings, and the plural wires,wherein the sealing material contains a filler,an interval distance between the plural wires is smaller than a particle diameter of the filler, andthe sealing material does not intrude into a space between the plural wires and the transistor so that a cavity is formed.2. The high-frequency amplifier according to claim 1 , wherein the plural wires include plural first wires and plural second wires arranged above the plural first wires claim 1 , andthe plural second wires are arranged in gaps between the plural first wires in plan view taken from a direction vertical to the surface of the semiconductor substrate.3. The high-frequency amplifier according to claim 1 , wherein the first and second wirings are ...

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12-09-2019 дата публикации

CHIP PACKAGE WITH ANTENNA ELEMENT

Номер: US20190279951A1

Structures and formation methods of a chip package are provided. The chip package includes a semiconductor die having a conductive element and a first protective layer surrounding the semiconductor die. The chip package also includes a second protective layer over the semiconductor die and the first protective layer. The chip package further includes an antenna element over the second protective layer. The antenna element is electrically connected to the conductive element of the semiconductor die. 1. A chip package , comprising:a semiconductor die having a conductive element;a first protective layer surrounding the semiconductor die;a second protective layer over the semiconductor die and the first protective layer;a conductive feature surrounded by the second protective layer;a conductive material over the conductive feature, wherein a portion of the conductive material is between the conductive feature and the second protective layer; andan antenna element over the second protective layer, wherein the antenna element is electrically connected to the conductive material and the conductive feature.2. The chip package as claimed in claim 1 , wherein the conductive material and the antenna element are made of a same material.3. The chip package as claimed in claim 1 , further comprising a second conductive feature in the first protective layer claim 1 , wherein the antenna element is electrically connected to the conductive element of the semiconductor die through the conductive feature and the second conductive feature.4. The chip package as claimed in claim 3 , wherein a first direct projection of the first conductive feature on a top surface of the second protective layer does not overlap a second direct projection of the second conductive feature on the top surface of the second projective layer.5. The chip package as claimed in claim 1 , wherein the second protective layer has a lower dielectric constant than that of the first protective layer.6. The chip ...

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19-10-2017 дата публикации

SEMICONDUCTOR PACKAGE HAVING A METAL PAINT LAYER

Номер: US20170301629A1
Принадлежит:

Disclosed are devices and methods related to a conductive paint layer configured to provide radio-frequency (RF) shielding for a packaged semiconductor module. Such a module can include a packaging substrate, one or more RF components mounted on the packaging substrate, a ground plane disposed within the packaging substrate, and a plurality of RF-shielding wirebonds disposed on the packaging substrate and electrically connected to the ground plane. The module can further include an overmold structure formed over the packaging substrate and dimensioned to substantially encapsulate the RF component(s) and the RF-shielding wirebonds. The overmold structure can define an upper surface that exposes upper portions of the RF-shielding wirebonds. The module can further include a conductive paint layer having silver flakes disposed on the upper surface of the overmold structure so that the conductive paint layer, the RF-shielding wirebonds, and the ground plane form an RF-shield for the RF component(s). 1. (canceled)2. A radio frequency module comprising:a packaging substrate;a ground plane disposed below a first surface of the packaging substrate;a plurality of shielding components disposed relative to one or more radio frequency components mounted on the first surface, the shielding components electrically connected to the ground plane; anda conductive paint layer including a mixture of one or more silver flakes chosen from the group consisting of elemental silver, silver oxide, silver thiocyanate, silver cyanide, silver cyanate, silver carbonate, silver nitrate, silver nitrite, silver sulfate, silver phosphate, silver perchlorate, silver tetrafluoro borate, silver acetylacetonate, silver acetate, silver lactate, and silver oxalate, and an organic solvent that includes acetone and does not dissolve the silver flakes, where the conductive paint layer, the shielding components, and the ground plane are electrically connected to provide radio frequency shielding for a region ...

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19-10-2017 дата публикации

Methods for selectively shielding radio frequency modules

Номер: US20170301630A1
Принадлежит: Skyworks Solutions Inc

Aspects of this disclosure relate to methods of selectively shielded radio frequency modules. A radio frequency module can be provided with a radio frequency component and an antenna. A shielding layer can be formed over a portion of the radio frequency module such that the radio frequency component is shielded by the shielding layer and the antenna is unshielded by the shielding layer.

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