СХЕМА СМЕСИТЕЛЯ И СПОСОБ

Изобретение относится к приемникам в системе связи. Технический результат - упрощение, снижение потребляемой мощности, подавление низкочастотного шума и возможность регулирования параметров с помощью конденсаторов связи между усилителем и смесителем. В схеме приемника подача входного сигнала от схемы малошумящего усилителя на вход схемы смесителя осуществлена через схему связи по переменному току, содержащую схему индуктивной или емкостной связи. Для конфигураций со схемой емкостной связи конденсатор связи конфигурируют для получения величины емкости, определяемой как функция чувствительности передаточной проводимости схемы смесителя. В конфигурациях схемы малошумящего усилителя с симметричными выходами для передачи симметричных выходных сигналов на соответствующие входы схемы смесителя используют согласованные конденсаторы связи. В одном примере осуществления схема смесителя содержит схему квадратурного смесителя, который может иметь балансную или двойную балансную конфигурацию. В другом ...

КОРРЕКЦИЯ СМЕЩЕНИЯ ДЛЯ ПАССИВНЫХ СМЕСИТЕЛЕЙ

Изобретение относится к приемникам системы связи и, в частности, к методикам коррекции смещения для смесителей в приемниках системы связи. Технический результат заключается в обеспечения конфигурируемых параметров в смесителе для выполнения калибровки и коррекции рассогласования, и тем самым минимизации искажения смесителя. Для этого выполняют измерения интермодуляционной составляющей (IM2) второго порядка, с использованием различных значений первого управляющего сигнала смещения на затворе, и с использованием одного и того же значения второго управляющего сигнала смещения на затворе, анализируют выполненные измерения и определяют значение первого управляющего сигнала смещения на затворе. Затем выполняют измерения IM2 с использованием различных значений второго управляющего сигнала смещения на затворе, и с использованием значения первого управляющего сигнала смещения на затворе, определенного на предыдущем этапе, анализируют выполненные измерения и определяют значение второго управляющего ...

КВАДРАТУРНЫЙ МОДУЛЯТОР И ДЕМОДУЛЯТОР

Предложены квадратурные модулятор и демодулятор, которые обеспечивают требуемый уровень характеристик при минимизации потребления мощности. В квадратурном модуляторе I и Q сигналы подаются к двум парам смесителей. Каждый смеситель в паре смесителей модулирует I и Q сигнал соответствующим синфазным или квадратурным синусоидальным колебанием ПЧ. I и Q модулированные сигналы из каждой пары смесителей суммируются. Сигналы от сумматоров подаются на третью пару смесителей и модулируются соответствующими синфазным и квадратурным РЧ синусоидальными колебаниями. Сигналы от третьей пары смесителей суммируются и выдаются в качестве модулированных сигналов. При использовании схемы этого квадратурного модулятора баланс амплитуд и фазовая ошибка модулированного сигнала делаются нечувствительными к разбалансу амплитуд и/или фазовой ошибке квадратурных разветвителей, используемых для генерирования синусоидальных колебаний ПЧ и РЧ. Кроме того, поскольку первые две пары смесителей и два последующих сумматора ...

АКТИВНЫЙ СМЕСИТЕЛЬ С ПОВЫШЕННОЙ ЛИНЕЙНОСТЬЮ

Активный смеситель с повышенной линейностью, содержащий перемножающую ячейку Джильберта, первый и второй входы которой являются входами сигнала гетеродина, а также первый и второй источники тока, первый и второй транзисторы и первый, второй, третий и четвертый резисторы, отличающийся тем, что введены третий, четвертый и пятый источники тока, транзисторы с третьего по двенадцатый и резисторы с пятого по четырнадцатый, причем первые клеммы первого, второго, третьего, четвертого и пятого источников тока заземлены, вторая клемма пятого источника тока соединена с первой клеммой входного источника сигнала и через седьмой резистор соединена с эмиттером седьмого транзистора, вторая клемма пятого источника тока соединена со второй клеммой входного источника сигнала и через восьмой резистор соединена с эмиттером восьмого транзистора, вторая клемма первого источника тока через первый резистор соединена с эмиттером первого транзистора, а через второй резистор соединена с эмиттером второго транзистора ...

СВЧ смеситель

Полезная модель относится к технике СВЧ, в частности к смесителям сигналов. СВЧ смеситель содержит первый входной волноводный фильтр , волноводную секцию с соосными отверстиями , второй входной волноводный фильтр , короткозамкнутый отрезок коаксиальной линии , коаксиальную линию с фильтром нижних частот и отверстиями , единый центральный проводник , диод , разделительный конденсатор , резистор и фильтр, в состав которого входят N≥1 отрезков коаксиальной линии с металлической стенкой на одном конце, металлические стержни и металлические пластины. Технический результат - расширение полосы рабочих частот СВЧ смесителя при высоком коэффициенте передачи. 1 ил. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 190 739 U1 (51) МПК H01P 1/00 (2006.01) H03D 7/02 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (52) СПК H04B 1/26 (2019.05); H03D 7/02 (2019.05) (21)(22) Заявка: 2019112937, 26.04.2019 (24) Дата начала отсчета срока действия патента: Дата регистрации: Приоритет(ы): (22) Дата подачи заявки: 26.04.2019 (45) Опубликовано: 11.07.2019 Бюл. № 20 1 9 0 7 3 9 R U (54) СВЧ смеситель (57) Реферат: Полезная модель относится к технике СВЧ, в частности к смесителям сигналов. СВЧ смеситель содержит первый входной волноводный фильтр , волноводную секцию с соосными отверстиями , второй входной волноводный фильтр , короткозамкнутый отрезок коаксиальной линии , коаксиальную линию с фильтром нижних частот и отверстиями , единый центральный проводник Стр.: 1 (56) Список документов, цитированных в отчете о поиске: RU 180101 U1, 04.06.2018. RU 44877 U1, 27.03.2005. RU 40541 U1, 10.09.2004. US 6593832 B2, 15.07.2003. US 7174197 B2, 06.02.2007. US 4050040 A1, 20.09.1977. US 7057480 B2, 06.06.2006. US 10096884 B2, 09.10.2018. WO 2000076019 A1, 14.12.2000. WO 2000010220 A2, 24.02.2000. US 6614331 B2, 02.09.2003. US 7205868 B2, 17.04.2007. US 3516030 A1, (см. прод.) , диод , разделительный конденсатор , резистор и фильтр, в состав которого входят ...

СПОСОБ ГЕОМЕТРИЧЕСКОЙ ГАРМОНИЧЕСКОЙ МОДУЛЯЦИИ СИГНАЛА

Использование: в системах автоматического сбора данных с датчиков охранной и пожарной сигнализации, со счетчиков электроэнергии, расхода тепла, воды, газа и данных фискальной памяти контрольно-кассовых машин. Техническим результатом является значительное уменьшение энергопотребления передатчиками подчиненных узлов системы и/или увеличение дальности ее действия. Для кодирования каждого символа передаваемых данных используется уникальное случайное или псевдослучайное множество разностей начальных пар ближайших пар гармоник, при этом указанные множества разностей начальных фаз выбираются таким образом, чтобы минимизировать пик-фактор суммарного сигнала. В случае срабатывания датчика пожарной сигнализации достаточно передать на пульт тревожного предупреждения всего лишь один символ, однозначно идентифицирующий местоположение сработавшего датчика, как правило, таким символом является условный номер или адрес, заранее присвоенный датчику. 2 ил.

СХЕМА ДЛЯ СИНХРОНИЗАЦИИ ЧАСТОТЫ ПАРАМЕТРОНА ДИЭЛЕКТРИЧЕСКОГО РЕЗОНАТОРА (ВАРИАНТЫ)

Схема для синхронизации частоты параметрона диэлектрическогго резонатора (варианты) относится к области цифровой сверхвысокочастотной техники. Достигаемым техническим результатом является надежная синхронизация частоты локального генератора передатчика в цифровой сверхвысокочастотной системе, одновременная синхронизация параметрона диэлектрического резонатора для использования в волне вертикальной поляризации и в волне горизонтальной поляризации и автоматическое включение с другим опорным генератором, чтобы тем самым вступать в работу в случае несрабатывания одного из средств генерации опорного сигнала. Схема для синхронизации частоты параметрона диэлектрическогго резонатора (варианты) содержит первое средство переключения смещения, второе средство переключения смещения, первое и второе средства генерации опорного сигнала, первое и второе средства деления, первое суммирующее средство, второе суммирующее средство, первое средство управления переключением и второе средство управления переключением ...

СМЕСИТЕЛЬ СВЧ

Изобретение относится к радиотехнике. Техническим результатом заявленного решения является расширение рабочих диапазонов частот входного СВЧ-сигнала, сигнала гетеродина и сигнала ПЧ с обеспечением режима работы на нулевой ПЧ, а также повышение изоляции трактов гетеродин-сигнал и гетеродин-ПЧ. Смеситель содержит металлическое основание, с одной стороны которого установлена плата ответвителя Ланге, один из входов которого является входом СВЧ сигнала, другой вход является выходом сигнала промежуточной частоты (ПЧ), на другой стороне основания установлена плата делителя мощности, вход которого является входом сигнала гетеродина, выходы делителя мощности выполнены в виде емкостных разомкнутых шлейфов, возбуждающих ортогонально расположенные со стороны обратной металлизации платы делителя мощности щелевые резонаторы, пересекающих их перпендикулярно посередине их длины. Схема преобразования выполнена в виде двух двухдиодных балансных, относительно сигнала гетеродина, схем. Общие точки соединения ...

Vorrichtung zur Beseitigung der Spiegelfrequenz eines in eine Zwischenfrequenz umgesetzten Basisbandsignals

Halbleiteranordnung mit einer im Halbleiterkörper integrierten und aus zwei Feldeffekttransistoren aufgebauten Tetrode

Method of converting frequency of intermediate frequency signal, involves phase-shifting one of the partial signals of intermediate frequency signal with respect to other partial signal and mixing with local oscillator signal

The method involves dividing an intermediate frequency signal (ZF') into partial signals (ZF1,ZF2) and feeding the partial signals to respective mixers (M1,M2). The partial signal (ZF2) is phase-shifted by 180[deg] in relation to the partial signal (ZF1). The local oscillator signals (LO1,LO2) are mixed with the partial signals to provide output signals (HF1,HF2). A combination signal representing frequency-converted intermediate frequency signal is formed by combining the output signals.

Method for selection of mixed frequency for transceivers of cordless digital communication apparatus, with intermediate frequency (IF) set both considering appearing harmonics

Frequency selection method for transceivers of cordless digital communication apparatus sets IF both by considering appearing harmonics for maximum possible reception sensitivity and minimum interference signal amplitudes in adjacent channels.Preferably IF is so chosen that mirror frequency of useful channel lies between useful frequency and frequency of first adjacent channel, typically nearer to mean frequency of adjacent channel than to mean frequency of useful signal.

Microwave range coupler with metal field structures - has conductive structure as combination of fin line and microstrip structure on substrate

The metal field conductive structure is deposited on a dielectric substrate and fitted in a waveguide. One structure is a combination of a fin guide structure (30,31) and a microstrip structure (4) on a substrate top side (2). The fin guide structure has a first fin (31) on the substrate top side, and an antipodal second fin (30) on a substrate underside. The first fin width corresponds to a few substrate thickness values (D). The second fin overlaps the first one partly, and the microstrip structure entirely. The fin spacing is increased towards the substrate ends up to the waveguide height as a transition between the substrate and waveguide. USE/ADVANTAGE - For planar circuits. Combination of fin line and microstrip advantages.

Oszillatorschaltung

Frequenzumsetzer mit Beseitigung der Spiegelfrequenz als mehrbandiger Empfänger

MISCHERSYSTEM FUER EINEN DIREKTUMSETZUNGSEMPFAENGER

VORSPANNUNGSNETZWERKE FUER SYMMETRISCHE MISCHER

MULTI-BAND SENDEEMPFÄNGER DER EINEN DIREKTMISCH-EMPFÄNGER BENUTZT, UND DER DIREKTMISCH-EMPFÄNGER DAZU

UEberlagerungsempfaenger mit aperiodischem Eingangskreis und einem ausserhalb des eigentlichen Geraetes befindlichen Steuerteil zur Ferneinstellung

AUFWÄRTS-FREQUENZUMSETZER

Lock-In-Verstärker mit wählbarer Phasenselektivität

Frequenzsyntheseschaltung

Vorrichtung zur Wellenlaengenumformung, insbesondere sehr kurzer Wellen, die zwei Gleichrichtersysteme und ein Oszillatorsystem enthaelt

Zylindrischer Hohlraumresonator mit veraenderbarer Abstimmfrequenz

Superheterodyne receiver with useful signal feedback in an FSH system

The object of this invention is to design the radio-frequency stages of a superhet (direct mixer) so selectively that all unwanted frequencies are less strongly amplified or the required signal component is more strongly amplified. Immunity to interference signals, selectivity, sensitivity and far-off selectivity are thereby intended to be improved. For this purpose, the preliminary stage must therefore already operate selectively. However, this is difficult to achieve at radio frequencies using conventional selection means. The circuit is used in FSH in such a way that the signal is selected at a lower intermediate frequency, as in normal superheterodyne receivers, but is then mixed upwards again. This upward-mixed signal is then added in the preliminary stage to the input signal. The phase shift is selected in such a way that the upward-mixed signal and the input signal amplify one another. Therefore, the preliminary stage then amplifies the required frequency spectrum only. ...

SCHALTUNG ZUR UMSETZUNG EINER FREQUENZ NACH EINER FREQUENZ MIT NIEDRIGER ZUFÄLLIGKEIT

Vorrichtung zur Messung des Daempfungswiderstandes von Schwingungskreisen in Radioapparaten

UEberlagerungsempfaenger fuer sehr kurze Wellen

Modulationsanordnung, die Nichtlinearitäten eines dazugehörigen Verstärkers genau zu kompensieren vermag

System und Verfahren zur Datenübertragung

Es ist ein System und ein Verfahren zur Datenübertragung, insbesondere für den Mobilfunk, angegeben, bei dem ein erster Transceiver (TR1) in einem ersten Zeitabschnitt sendet und ein zweiter Transceiver (TR2) empfängt und in einem zweiten Zeitabschnitt umgekehrt. Die Übertragung ist dabei durch eine Zeitduplex-Komponente gekennzeichnet. Während ein Lokaloszillator (LO1) des ersten Transceivers (TR1) bei Senden und Empfangen auf eine erste Trägerfrequenz (FC1) abgestimmt ist, ist der Lokaloszillator (LO2) des zweiten Transceivers (TR2) bei Senden und Empfangen auf eine zweite Trägerfrequenz (FC2) abgestimmt, welche sich von der ersten Trägerfrequenz (FC1) um einen Betrag einer Frequenzabweichung (DELTAF) unterscheidet. Diese Einstellbarkeit des Empfangsseitenbands ermöglicht die Verwendung von Standard-PLL.

Transceiver signal processor for digital, cordless telephone

The pressor has a transmitter for conversion and transmission of a signal as a radio wave via an aerial input, and a receiver for connecting the signal from the aerial input for processing. A frequency synthesiser has a first PLL (120) for channel conversion, during which the loop frequency of the PLL is not switched over. A received second IF is used for setting a corresp. offset at 0 Hz. A second PLL (130) provides high oscillation change-over between the transmit and reception frequency by setting the output frequency of the first PLL as a reference signal.

Schaltung zum Vermindern von einem Lecksignal aus einem lokalen Oszillator

FUNKSYSTEM UND -VERFAHREN MIT FET-MISCHER UND RECHTECKSPANNUNGSGETRIEBENER SCHALTERSCHALTUNG

Push-pull mixer

The present invention describes an easy-to-produce push-pull mixer having at least two transistors, e.g. GaAs or MESFETs, which is constructed in one plane on one side of a carrier plate. The lines are constructed as symmetric coplanar slotted lines (1, 2, 3, 7) or microstrip lines (14 and 15), respectively. The push-pull mixer is constructed as integrated microwave circuit (MIC) but can also be produced monolithically on a semi-conductor substrate (MMIC). Fields of application are frequency up- or down-converters in the microwave range with very good suppression of unwanted mixed products, for example for aerospace engineering. ...

DIGITALES KOMMUNIKATIONSGERÄT

Wideband double balanced microwave mixer - has waveguides with nonlinear characteristic impedance and gradual transition feature

This micro wave mixer which includes four non-linear elements forming a ring between wave guides and which are connected so as to form an up or down frequency mixer can operate loss free over a wide frequency band, i.e. more than one octave, by operating as a double balanced mixer. At least two of the waveguides are balanced i.e. not earthed and have a low characteristic impedance with a gradual transition to a higher characteristic impedance. The carrier sub-state (5) is unilaterally metallised with fins (8,9,10,11) which form the waveguides (1,2). At the junction between these waveguides, which is not metallised is a ring of non-linear elements (4). The fins (8,9) are insulated from the casing (6,7) whilst the other two fins (10,11) are connected to the casing. Fins (8,9) are connected together.

Mischer

Schaltung mit einer zum Gleichrichten oder Modulieren und gleichzeitig zur Erzeugung von elektrischen Hochfrequenzschwingungen dienenden Mehrgitterroehre

Mehrbereichueberlagerungsempfaenger

Microwave mixer

In a low-noise microwave mixer with only small conversion losses and with two non-linear components (D1, D2), each of which is connected to a strip line (L1, L2) which feeds a mixer input signal (S) and an oscillator signal (O) to the respective non-linear component and whose connection arms which are not connected to the two strip lines (L1, L2) are jointly contacted with a line (AL) on which the mixing product (ZF) can be tapped, at least one dielectric resonator (R) is connected between the two strip lines (L1, L2). The phase relationships of the input and oscillator signals (S, O) which are fed in the strip lines (L1, L2) past the resonator are such that the oscillator signal does not activate the resonator, whereas the input signal causes the resonator to resonate. The size of the resonator (R) is determined in such a way that, when resonating, it reflects the image frequency but does not affect the signal frequency (Fig. 2). ...

Diskriminatorschaltung zur Erzeugung einer hinsichtlich der Polaritaet vom Vorzeichen der Frequenz- oder Phasendifferenz zweier Wechsel-spannungen abhaengigen Gleichspannung

Empfangsschaltung

Sound FM broadcasting signal receiving station with channel converters - has sensor connected to intermediate frequency converter with threshold circuit to break signal path when input signal disappears

The UHF FM sound broadcasting receiver station has at least one channel amplifier or converter unit tuned to a received frequency. It selectively prepares a signal and transmits it either in the original or in another free channel. A sensor circuit branches off from the main signal path of the amplifier/convertor. It has a threshold detector responding to the useful signal. Its output signal is applied to a switch in the signal channel, so that when input signal disappears, the main signal path is broken. The threshold detector may be a differential amplifier and the sensor circuit may be connected into the IF section of the converter unit.

TONKANALSCHALTUNG BEI FREQUENZMODULIERTEN SIGNALEN

Anordnung zum Kurzwellenzwischenfrequenzempfang mittels Habannroehren

UEberlagerungsempfangsschaltung unter Verwendung einer selbstschwingenden Mischroehre

Superheterodyneschaltung mit oberhalb der Empfangsfrequenz liegender Schwebungsfrequenz

Elektronenroehre mit einer Gluehkathode und fuenf oder mehr weiteren Elektroden

Mischroehrenschaltung unter Verwendung einer Sechsgitterroehre

Wechselsprech-Sendeempfangsgeraet unter Verwendung eines Sendeteils, bei dem die erzeugte Sendeschwingung mittels eines Quarzes stabilisiert wird und von gleicher Frequenz ist wie die ausgesendete Funkfrequenz

MISCHER MIT RÜCKKOPPLUNG

Frequenzumsetzer zum spektralen Umsetzen eines Startsignals und Verfahren zur spektralen Umsetzung eines Startsignals

Ein Frequenzumsetzer (100, 150) zum spektralen Umsetzen eines Startsignals mit einer Aktuellfrequenz auf ein Endsignal mit einer Zielfrequenz, bei dem das Startsignal eine I-Komponente mit einer Mehrzahl von I-Komponentenwerten und eine Q-Komponente mit einer Mehrzahl von Q-Komponentenwerten umfasst, weist eine Einrichtung (102) zum Selektieren einer Mehrzahl von Teilsignalen (TS¶1¶-TS¶4¶), basierend auf der I-Komponente oder der Q-Komponente, auf, wobei ein Teilsignal abhängig von einem Raster auswählbare I-Komponentenwerte umfasst und wobei ein anderes Teilsignal abhängig von dem Raster ausgewählte Q-Komponentenwerte umfasst. Ferner weist der Frequenzumsetzer (100) eine Einrichtung (104, 106, 108, 110) zum Gewichten jedes der Mehrzahl von Teilsignalen auf, wobei die Einrichtung (104, 106, 108, 110) zum Gewichten ausgebildet ist, um jedes der Mehrzahl von Teilsignalen mit je einem Gewichtungsfaktor zu gewichten, um eine Mehrzahl von Gewichtungssignalen zu erhalten. Zusätzlich weist der ...

Selective receiver calibrating circuit - has change-over stages for changing frequency of interpolation oscillator in specified sense

The calibration circuit is intended for a receiver with coarse and interpolation tuning. The characteristics of the change-orh stages (5, 6, 7, 9, 10, 11, 20, 21) are such that the frequency (f2) of a heterodyning oscillator (10), carrying out the interpolation, or the frequency (f4) of a synchronising interpolation oscillator (25) coupled to the oscillator (10) by a frequency changing control loop (19), change in the same sense with interpolation frequency indication. The coars tuner (6) frequency indication is adjustable to the frequency of the oscillator (10, 25) associated with the zero interpolation frequency indication. The oscillator output voltage serves as a calibration voltage, fed to the receiver input.

Verfahren zum Optimieren des Frequenzaufbereitungszuges eines Hochfrequenz-Überlagerungsempfänger

Verfahren zum Optimieren des Frequenzaufbereitungszuges eines Hochfrequenz-Überlagerungsempfängers, der zwei aufeinanderfolgende Überlagerungsstufen und ein dazwischen angeordnetes Bandfilter mit temperaturabhängiger Frequenzverschiebung des Durchlassbereiches aufweist, bei dem über einen Temperaturfühler und eine Stelleinrichtung die Frequenzen der Überlagerungsoszillatoren der beiden Überlagerungsstufen im Sinne einer Kompensation der Temperaturdrift des Filterdurchlassbereiches nachgeführt werden, dadurch gekennzeichnet, dass die Frequenzlage des Empfangssignals im Durchlassbereich des Bandfilters so gewählt wird, dass der am Ausgang der zweiten Überlagerungsstufe gemessene Modulationsfehler ein Minimum ist.

TRANSISTOR-VHF-MISCHSTUFE

Tuner arrangement and set top box

Multimode josephson parametric converter

A technique relates to a microwave device. The microwave device includes a Josephson ring modulator, a first multimode resonator connected to the Josephson ring modulator, where the first multimode resonator is made of a first left-handed transmission line, and a second multimode resonator connected to the Josephson ring modulator, where the second multimode resonator is made of a second left-handed transmission line.

Radio receiver

Mixer circuit

A mixer for a receiver

Improvements relating to circuits for electron discharge devices employing secondary emission

... 524,049. Electron multipliers and circuits therefor. KOLSTER-BRANDES, Ltd., SHANNON, D. S. B., and CHATTERJEA, P. K. Jan. 20, 1939, No. 2032. [Class 40 (v)] A frequency changing or high-frequency modulating circuit comprises an electron discharge device V having a control electrode G1, an accelerating or screening electrode G2, a secondary emitting electrode SE and an anode A, one of the two last-mentioned electrodes, namely the secondary emitter or the anode, being coupled back to the electrode G2 for the generation of oscillations to beat with signal waves applied to the control electrode G1, a tuned output circuit being connected to the other of the two electrodes SE, A. In the arrangement shown, the tuned input circuit L1, C1 is connected between the grid G1 and cathode C with biassing means R2, C2, and a tuned intermediate-frequency output circuit L3, C3 is connected in the anode lead. A tuned oscillator circuit L5, C5 is connected between SE and G2, an intermediate point in the oscillator ...

Improvements in or relating to superheterodyne radio receivers

... 629,021. Superheterodyne circuits. PHILIPS LAMPS, Ltd. April 14, 1947, No. 9896. Convention date. Aug. 19, 1944. [Class 40 (v)] In a superheterodyne receiver the oscillator circuit includes a feedback coil in series with a condenser, which tunes it to a frequency exceeding the maximum frequency to be generated, and a second feedback coil, connected in parallel with the series combination of the first feedback coil and condenser, having an inductance which is high compared with that in the oscillator tank circuit, tracking with the R.F. circuits being effected, without the insertion of a padding condenser in the tank circuit, by correct proportioning of the feedback coils and condenser, and the coupling to the oscillator tank circuit. As shown, an oscillatory circuit constituted by an inductance 8, tuning condenser 9, and trimmer condenser 10 is included in the anode circuit of the oscillator section of a mixer. The parallel combination of the feedback coils 12 and 13, the latter having ...

Improvements in circuits for the transmission of ultra-high frequency oscillations

... 643,671. Electric resonators. PHILIPS LAMPS, Ltd. March 28, 1947, No. 8443. Convention date, Aug. 8, 1944. [Class 40 (viii)] [Also in Group XL (c)] A cavity resonator for a transmitting and receiving circuit (see Group XL (c)) comprises two conductors 101, 1011 within a metal enclosure 9 and is used to tune both push-pull and parallel modes of operation of the circuit. Capacitor 11 adjusts the tuning of the pushpull mode and capacitor 13 that of the parallel mode, while capacitors 121 and 1211 balance the two conductors with respect to earth. Specifications 609,542, 623,069 and 632,658, [all in Group XL (c)], are referred to.

Improvements relating to frequency converter circuits for multi-band superheterodynereceivers

... 648,259. Radio receiving 'circuits. RADIO CORPORATION OF AMERICA. Dec. 4, 1946, No. 35894. Convention date, Dec. 4, 1945. [Class 40 (v)] In a frequency converter circuit for a multi-band superheterodyne receiver having a local oscillator comprising a thermionic valve, at least two tank circuits and means for switching the tank circuits alternatively in circuit with the valve, the cathode of the valve is permanently connected to the tank circuit for the higher frequency band. The oscilator valve is constituted by the cathode K and grids G1, G2 of a pentagrid mixer T. For the highest frequency, or FM, band the oscillator is of the Colpitt's type having a frequency-determining circuit comprising variable tuning condenser C2, inductance L2, and condensers Cg, Ck. Cathode K is permanently connected to the junction of condensers Cg, Ck, to reduce stray inductance, and the frequency determining circuit is connected to grid G1 by band switch S4 when in position FM. For the relatively lower frequency ...

ELECTRONIC FREQUENCY CHANGING APPARATUS

... 1420271 Frequency changing, heterodyne circuits SOC D'ETUDE ET D'APPLICATION DES TECHNIQUES NOUVELLES NEO-TEC 27 July 1973 [27 July 1972] 35849/73 Heading H3F and H3Q A frequency changing circuit comprises a heterodyne frequency source 1, Fig. 1. of high stability, a divider circuit 2-5 capable of furnishing at least one heterodyne signal whose frequency is selected from a plurality of successive multiples of a frequency f, and a mixing circuit 7, the heterodyne signal being so selected that the output F s1 from the mixer 7 has a frequency between f/2 and f. In this embodiment the frequency f is 80 kHz and four counter dividers 2-5 are provided, the outputs from which are selected by means of a switch 6 and the signal path includes a band pass filter 8 for cutting out the image frequency. Alternatively, each divider may feed a separate mixer, the input signal being applied to all the mixers and the output being selected from the mixers by means of a switch. The arrangement of Fig. 1 forms ...

Improvements in or relating to noise reducing arrangements for discharge tube amplifiers

... 645,935. Radio receiving circuits. PHILIPS LAMPS, Ltd. Sept. 6, 1946, No. 26866. Convention date, Nov. 12, 1942. Addition to 645,936. [Class 40 (v)] In a tuned amplifier circuit of the type described in the parent Specification, in which damping by negative feed-back derived from a cathode inductance 4 and the grid-cathode capacity 5 is used to improve the signal to noise ratio, the input circuit inductance 2 comprises a frame aerial.

Tracking antenna system

Improvements in or relating to semi-conductor diodes

... 1,082,905. Semi - conductor frequency changers. TELEGRAPH CONDENSER CO. Ltd. May 7, 1965 [May 8, 1964], No. 19335/65. Heading H3T. [Also in Division H1] A semi-conductor diode 67 having negative resistance properties at high frequencies (see Division H1) is used as the mixer stage in the UHF heterodyne circuit shown, in which tuned signal circuits 62, 63 and a local oscillator 69 are connected in parallel with the diode. To maintain the diode on the negative resistance portion 49 (Fig. 3, not shown), of its currentvoltage characteristic, a bias source 73 is included in the circuit; though the diode may have sufficient negative resistance even at zero D.C. volts for this bias source to be omitted provided high gain is not required.

BIASING NETWORKS FOR BALANCED MIXERS

Radio receivers

... 392,841. Valve circuits for wireless reception. HAZELTINE CORPORATION, 15, Exchange Place, Jersey City, New Jersey, U.S.A.-(Assignees of Johnson, J. K. ; 61, Halls Lane, Rye, New York, U.S.A.) Nov. 18, 1932, No. 32625. Convention date, Dec. 14, 1931. [Class 40 (v).] An oscillator-modulator for use in a superheterodyne wireless receiver comprises a feedback coupling so proportioned that oscillations of constant amplitude are produced and are insufficient to render the grid positive. Fig. 1 shows an anode-bend detector which oscillates by virtue of the common condenser 39 coupling the input and output in addition to the coupling between coils 47, 43. In a modification, Fig. 2 (not shown), the feed-back is taken from the screen grid and the valve is used as a leaky grid detector the oscillator cirucit being inductively coupled to the cathode circuit. Fig. 3 shows an arrangement in which the feedback is taken from the screen grid of a valve arranged as a leaky grid detector, the local oscillation ...

Improvements in Timing Arrangements for Electrical Signalling Systems

... 1,178,539. Homodyne receivers; automatic frequency control. PLESSEY B.T.R. Ltd. 13 Dec., 1967 [14 Dec., 1966], No. 56067/66. Headings H3A and H3Q. To generate a signal locked in phase and frequency with an incoming signal (e.g. for coherent detection of a modulated wave or a digital signal), the input signal is combined with (a) a locally generated signal of the same frequency, and (b) a phase-quadrature version of such local signal, to give two outputs whose magnitudes represent the phase difference between the respective pairs of signals combined; the required signal is then obtained by adding the combinations of these two outputs with the two respective locally generated signals. In the simplest form (Fig. 1) the input at 1 is combined at 3 with alocal oscillator at 2 and with a 90 degree shifted version of this at 6. After passage through low-pass filters 8 and 9 the resultant phase-difference signals A and B are re-modulated on to the two locally generated signals at 4 and 7, and the ...

Improvements in wireless receiving systems of the superheterodyne type

... 425,021. Valve circuits for wireless reception. PEYTON, L. A., 4, Thirlmere Place, Northlands, Durban, South Africa. Jan. 29, 1934, No. 30099. Convention date, Feb. 22, 1933. Divided application. Drawings to Specification. [Class 40 (v)] [See also Group XXXVI] In a superheterodyne receiver employing a combined detector-oscillator, a condenser is adapted to be connected across various portions of the grid coil, of which various points may be earthed so as to vary the step-up ratio of the coil considered as an auto-transformer.

ARRANGEMENT OF COMPENSATING FOR TEMPERATURE DEPENDENT PERFORMANCE CHARACTERISTICS OF SURFACE ACOUSTIC WAVE FILTER

Improvements in or relating to electron-discharge devices

... 531,821. Thermionic valves; electron multipliers. BOSCH, F. J. G. VAN DEN, and VACUUM-SCIENCE PRODUCTS, Ltd. May 25, 1939, Nos. 15597 and 24204. [Class 39 (i)] The cathode of an electronmultiplier is formed as a tube having an enlarged end forming an emissive surface for the multiplier the body of the tube forming a cathode for a further electrode assembly. In the arrangement shown the electron multiplier comprises a number of perforated secondary electrodes 15 ... 19, as described in Specification 516,621 provided with auxiliary electrodes 22 as described in Specification 531,541. The cathode 10 is formed with an enlarged head 11 co-operating with the electrode multiplier and the body of the tube is surrounded by a grid 23 and anode 24 forming a triode assembly. The cathode heater is so arranged that the body of the cathode operates at a higher temperature than the head. The triode and multiplier assemblies are separated by a screen 25, 26 having an opening for the cathode head The triode ...

Improvements in or relating to radio receivers

... 547,737. Superheterodyne circuits for wireless reception. STANDARD TELEPHONES & CABLES, Ltd., and HOLLAND, J. D. Feb. 7, 1941, No. 1633. [Class 40 (v)] In a superheterodyne receiver employing automatic gain control a separate electric path is provided after the controlled intermediate frequency amplifier into which local beating oscillations are injected for heterodyne reception. This path is separate from that used for receiving modulated signals. The Figure shows a triodehexode local oscillator and mixing valve lightly coupled to the output of the preceding intermediate frequency amplifier. The output circuit L3 C1 may be tuned to the beat frequency and a switch S1 associated with the volume control of the output stage be provided to change over to the reception of modulated signals, in which case the local oscillator is rendered inoperative by the switch S2.

MIXER STAGE FOR MICROWAVE RECEIVERS

... 1416982 Frequency changing INSTITUTET FOR MIKROVAGSTEKNIK 7 May 1974 [7 May 1973] 20162/74 Heading H3T [Also in Division H1] A mixer stage for a microwave receiver comprises an input transmission line in which is arranged a mixing diode comprising two rectifier junctions arranged, electrically, in series opposition. The embodiments use a Baritt (barrier injection and transit time) diode, comprising an n region sandwiched between two P+ layers or two metal layers so biased that the complete n area is depleted of movable charge carriers, and the diode passes only the reverse-bias saturation current (Fig. 6, not shown). The mixer may be of the balanced type, the received signals f, Fig. 2, and local oscillations f LO being applied to a pair of coupled waveguides 8, i.e. a 3dB hybrid, in which half of each of the signals is transferred from the corresponding input waveguide to the other waveguide, with a phaseshift of 90 degrees. Two diodes 9, 10 are arranged in the respective waveguides and ...

Improvements in or relating to frequency changing circuits for receivers of short electromagnetic waves

... 695,616. Radio receiving apparatus. STANDARD TELEPHONES & CABLES, Ltd. Jan. 1, 1952, No. 103/52. Class 40 (v). In a wave-guide frequency-changing circuit in which an incoming signal and a local oscillation are fed to a rectifier, the wave-guide section containing the rectifier has its input impedance matched with that of the guide, and means are provided for suppressing the passage out of said section of image frequency waves generated at the rectifier. Coaxial lines may replace the wave-guide at somewhat lower operating frequencies, and the rectifier may be replaced by a thermionic mixer tube. As shown in Fig. 2, the wave-guide section 1, of rectangular crosssection, is closed at one end 2 and has a flange 3 for connection to the main guide through which are fed the incoming wave and the local oscillation. The rectifier 4 of cartridge type has its lower end held in a socket on a vertical post 6 formed on a horizontal bar 7 extending across the guide parallel with the wide sides. The rectifier ...

Signal receiving arrangement

A signal receiving arrangement comprising first and second groups (14, 16) of frequency down-converting stages (18 to 24 and 26 to 34), each stage including a mixer (40) and a local oscillator (42) for frequency down-converting a signal applied to the stages (18 to 24 and 26 to 34), the local oscillator frequencies of successive stages (18 to 24 and 26 to 34) being progressively higher with the frequency differences between correspondingly numbered stages in each group forming an arithmetic progression, wherein the frequency down-converted outputs of the stages of each group are combined and the pair of residue frequencies formed by mixing down the input signal are used to determine on the basis of the Chinese remainder theorem which stage in each group was operative on the input signal and thereby ascertain the actual frequency of the input signal.

AN IMPROVED MIXER CIRCUIT

Suppressing third order distortion in transceivers

A radio transceiver, e.g. a zero IF transceiver, including in the transmitter portion means for deriving 11 from an input signal having an angular frequency omega two versions of the input signal one with a phase shift of pi /3 (or 60 DEG ) relative to the other, separate means for mixing 10a, 10b each of the two versions of the input signal with a same local oscillator signal of higher frequency OMEGA and means for summing 12 the outputs of the separate mixing means. Unwanted third order distortion products are cancelled. The input signal may have I and Q components which are each added and subtracted in one phase at a relative level of 1/ 2ROOT 3 to the I and Q components of the other phase, and visa versa, to generate signals +/-30 DEG separated (eg Q+30 DEG , Q-30 DEG , Fig 2) from each of the input I + Q components. ...

AM radio receiver

Variable bandwidth filter

A bandpass filter of variable bandwidth having filtering means of fixed frequency response such as low pass filter 6 for filtering an input signal, a variable frequency converter 10 for selectively shifting the frequency profile of the filtered signal relative to the frequency response of the filtering means and a second filtering means of fixed frequency response such as low pass filter 12 for filtering the frequency shifted signal to produce a bandpass filtered signal of bandwidth determined by the frequency shifting.

Frequency to frequency de-randomiser circuit

A frequency to frequency de-randomiser circuit having means for smoothing a current which comprises a diode filter configured so as to have a time constant which changes in response to changes in the current thus providing a rapidly responding, real time, fluctuation free signal which is optimised for measurement and display from a very low power circuit.

Improvements relating to signal mixers

Quadrature frequency changer comprising two mixers having two mixer stages

A quadrature frequency changer comprises first and second mixers (4-6, 7-9) and a local oscillator (10-12). The local oscillator (10-12) provides first and second commutating signals which are nominally in phase-quadrature and includes an arrangement (12) for changing the phase of the first commutating signal by 180{ to provide a third commutating signal. The first mixer (4-6) comprises first and second mixing stages (4,5) for mixing an input signal with the first and second commutating signals and a summer (6) for summing the mixer stage output signals. The second mixer comprises third and fourth mixing stages (7, 8) for mixing the same or a different input signal with the second and third commuting signals and a summer (9) for summing the third and fourth mixer stage output signals. The mixing stages may comprise a Gilbert cell.

Mixer with shorting switch

A double-balanced mixer is provided having a shorting switch connecting the signal inputs to the mixer core. A timer circuit provides pulses to close the switch, thereby shorting those inputs at times when the switches of the mixer core are switching. This is done because non-linear components in the output are produced at those times and therefore they can be removed if the signal input is shorted at those times. A local oscillator signal is used as a reference control for the switching.

Frequency generation circuit

A frequency generation circuit comprises a crystal oscillator (10) for providing an input frequency, and a phase-locked loop circuit (28). The frequency generation circuit can generate a plurality of different output frequencies by using a plurality of frequency dividers for supply to respective DAB and FM tuners (50, 60, 70). The frequency generation circuit can be used, together with a baseband circuit (14), in a radio receiver (1, 2). The same oscillator and phase-locked loop circuit is used to drive the baseband circuit.

SUBSCRIBER UNIT FOR WIRELESS DIGITAL TELEPHONE SYSTEM

Frequency difference detector (FDD) having automatic gain control and a carrier modulated receiver including the FDD

A frequency difference detector (FDD) implemented as a balanced quadricorrelator has an automatic gain control system (68) having inputs capacitively coupled to the quadrature related, baseband frequency paths from the front end mixers (12,14). The a.g.c. system (68) has quadrature related mixers (78,80) coupled to said inputs for frequency up-converting the baseband signals to an intermediate frequency. The IF signals from the mixers are summed in a summing circuit (82) and subsequently squared in a squaring circuit (86). Any ripple in the output of the squaring circuit is removed by low pass filtering to produce a d.c. control signal which is applied to gain controlled amplifiers (22,24) present in said baseband frequency paths in order to render the output (Vo) of the FDD less sensitive to variations in the input signal (Vi).

Biasing networks for balanced mixers

COMPLEX DIGITAL SAMPLING CONVERTER FOR DEMODULATOR

Selective-calling radio receiver

Double conversion radio receiver with low phase noise local oscillators

A multiple conversion radio receiver comprises at least two local oscillators for converting an input signal to respective first and second intermediate frequencies. Each local oscillator is a single loop synthesiser which can be tuned in predetermined minimum frequency steps, and the step sizes of the two synthesisers are mutually prime multiples of the desired overall tuning step size. Using large step sizes in each local oscillator produces lower overall phase noise than a single conversion receiver having a small frequency step.

ШИРОКОПОЛОСНЫЙ ПРЕОБРАЗОВАТЕЛЬ

Широкополосный преобразователь, содержащий первый и второй транзисторы, коллекторы которых соединены с общей нагрузкой, симметрирующий фазоинвертор на основе отрезка двухпроводной линии передачи, охваченного магнитопроводом, вход первого проводника фазоинвертора соединен с сигнальным входом, вход второго проводника фазоинвертора соединен с гетеродинным входом, отличающийся тем, что в него введены второй и третий фазоинверторы на основе отрезков линий передачи, охваченных магнитопроводом, причем вход первого проводника второго фазоинвертора и вход первого проводника третьего фазоинвертора соединены с выходом первого проводника первого фазоинвертора, вход второго проводника второго фазоинвертора и вход второго проводника третьего фазоинвертора соединены с выходом второго проводника первого фазоинвертора, выход первого проводника второго фазоинвертора соединен с эмиттером первого транзистора и через первый конденсатор с базой второго транзистора, выход второго проводника третьего фазоинвертора соединен с эмиттером второго транзистора и через второй конденсатор с базой первого транзистора, а выходы второго проводника второго фазоинвертора и первого проводника третьего фазоинвертора соединены с общим проводом через третий конденсатор. (19) RU (11) (13) 7 783 U1 (51) МПК H03D 7/04 (1995.01) РОССИЙСКОЕ АГЕНТСТВО ПО ПАТЕНТАМ И ТОВАРНЫМ ЗНАКАМ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К СВИДЕТЕЛЬСТВУ (21), (22) Заявка: 97102005/20, 07.02.1997 (46) Опубликовано: 16.09.1998 (71) Заявитель(и): Томская государственная академия систем управления и радиоэлектроники (72) Автор(ы): Мелихов С.В. Ñòðàíèöà: 1 U 1 7 7 8 3 R U U 1 (57) Формула полезной модели Широкополосный преобразователь, содержащий первый и второй транзисторы, коллекторы которых соединены с общей нагрузкой, симметрирующий фазоинвертор на основе отрезка двухпроводной линии передачи, охваченного магнитопроводом, вход первого проводника фазоинвертора соединен с сигнальным входом, вход второго проводника фазоинвертора соединен с ...

ШИРОКОПОЛОСНЫЙ ДВОЙНОЙ БАЛАНСНЫЙ СМЕСИТЕЛЬ

Широкополосный двойной балансный смеситель, содержащий два преобразующих модуля, гетеродинные входы которых соединены соответственно с синфазным и квадратурным выходами первого квадратурного моста, вход моста соединен с гетеродинным входом смесителя, а балластный выход подключен к первой балластной нагрузке, и второй квадратурный мост, балластный выход которого соединен с второй балластной нагрузкой, отличающийся тем, что в него введен фазоинвертор, включенный между выходом второго преобразующего модуля и выходом первого преобразующего модуля, соединенного с нагрузкой, а сигнальные входы первого и второго преобразующих модулей соединены соответственно с синфазным и с квадратурным выходами второго квадратурного моста, вход которого подключен к сигнальному входу смесителя. (19) RU (11) (13) 8 186 U1 (51) МПК H03D 7/04 (1995.01) РОССИЙСКОЕ АГЕНТСТВО ПО ПАТЕНТАМ И ТОВАРНЫМ ЗНАКАМ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К СВИДЕТЕЛЬСТВУ (21), (22) Заявка: 97102751/20, 25.02.1997 (46) Опубликовано: 16.10.1998 (71) Заявитель(и): Томская государственная академия систем управления и радиоэлектроники (73) Патентообладатель(и): Томская государственная академия систем управления и радиоэлектроники U 1 8 1 8 6 R U Ñòðàíèöà: 1 U 1 (57) Формула полезной модели Широкополосный двойной балансный смеситель, содержащий два преобразующих модуля, гетеродинные входы которых соединены соответственно с синфазным и квадратурным выходами первого квадратурного моста, вход моста соединен с гетеродинным входом смесителя, а балластный выход подключен к первой балластной нагрузке, и второй квадратурный мост, балластный выход которого соединен с второй балластной нагрузкой, отличающийся тем, что в него введен фазоинвертор, включенный между выходом второго преобразующего модуля и выходом первого преобразующего модуля, соединенного с нагрузкой, а сигнальные входы первого и второго преобразующих модулей соединены соответственно с синфазным и с квадратурным выходами второго квадратурного моста, вход которого ...

ВЫСОКОЧАСТОТНЫЙ ШИРОКОПОЛОСНЫЙ ПРЕОБРАЗОВАТЕЛЬ

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Видеоконвертор радиоинтерферометра, содержащий два параллельно включенных смесителя, соединенных через квадратурный делитель мощности с гетеродином, и аналого-цифровой преобразователь с подключенным к нему генератором тактовых частот, отличающийся тем, что, с целью уменьшения искажений принимаемого шумового сигнала, технологического разброса характеристик и трудоемкости настройки видеоконвертора, введены соединенные с упомянутым генератором тактовых частот второй аналого-цифровой преобразователь и программируемая логическая интегральная схема, соединенная также с флэш-памятью, причем оба аналого-цифровых преобразователя включены между соответствующими выходами упомянутых смесителей и входами программируемой логической интегральной схемы. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 80 616 U1 (51) МПК H01B 1/16 (2006.01) H03D 7/18 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ, ПАТЕНТАМ И ТОВАРНЫМ ЗНАКАМ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (21), (22) Заявка: 2008134448/22, 22.08.2008 (24) Дата начала отсчета срока действия патента: 22.08.2008 (45) Опубликовано: 10.02.2009 (73) Патентообладатель(и): Закрытое Акционерное Общество "Радиоэлектронная технологическая аппаратура" (ЗАО "РЭЛТА") (RU) U 1 8 0 6 1 6 R U Ñòðàíèöà: 1 ru CL U 1 Формула полезной модели Видеоконвертор радиоинтерферометра, содержащий два параллельно включенных смесителя, соединенных через квадратурный делитель мощности с гетеродином, и аналого-цифровой преобразователь с подключенным к нему генератором тактовых частот, отличающийся тем, что, с целью уменьшения искажений принимаемого шумового сигнала, технологического разброса характеристик и трудоемкости настройки видеоконвертора, введены соединенные с упомянутым генератором тактовых частот второй аналого-цифровой преобразователь и программируемая логическая интегральная схема, соединенная также с флэш-памятью, причем оба аналого-цифровых преобразователя включены между соответствующими выходами упомянутых смесителей и входами ...

УСТРОЙСТВО ДЛЯ ПРЕОБРАЗОВАНИЯ ДЕВИАЦИИ ЧАСТОТЫ ПЕРИОДИЧЕСКОГО СИГНАЛА

1. Устройство для преобразования девиации частоты периодического сигнала, содержащее первый смеситель, к первому входу которого подключен выход первого полосного усилителя, ко второму входу подключен вход устройства, а выход подключен к входу второго полосного усилителя, второй смеситель, к первому входу которого подключен выход второго полосного усилителя, а выход подключен к входу преобразователя начальной фазы, выход которого подключен к входу первого полосного усилителя, третий смеситель, к входам которого подключены выходы первого и второго полосных усилителей, а выход подключен к входу третьего полосного усилителя, выход которого является выходом устройства, отличающееся тем, что, с целью увеличения девиации частоты выходного сигнала по сравнению с девиацией частоты входного сигнала, к входу устройства подключен полосный фильтр, выход которого подключен ко второму входу второго смесителя. 2. Устройство по п.1, отличающееся тем, что преобразователь начальной фазы содержит четвертый полосный усилитель, вход которого является входом преобразователя начальной фазы, а выход подключен к обоим входам четвертого смесителя и к входу многокаскадного полосного усилителя, выход которого подключен к первому входу пятого смесителя, интегратор, вход которого подключен к выходу четвертого смесителя, вычитатель, к первому входу которого подключен выход четвертого смесителя, ко второму входу которого подключен выход интегратора, а выход подключен к второму входу пятого смесителя, выход которого является выходом преобразователя начальной фазы. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (51) МПК H03D 7/16 (13) 109 941 U1 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ, ПАТЕНТАМ И ТОВАРНЫМ ЗНАКАМ (12) ОПИСАНИЕ (21)(22) Заявка: ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ 2011108082/08, 02.03.2011 (24) Дата начала отсчета срока действия патента: 02.03.2011 (45) Опубликовано: 27.10.2011 Бюл. № 30 Адрес для переписки: 445677, Самарская обл., г. Тольятти, ул. Гагарина, 4, ГОУ ВПО "Поволжский ...

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СВЧ преобразователь частоты, содержащий два поляризатора и расположенную между ними волноводную ферритовую секцию, отличающийся тем, что дополнительно введены два поляризационных моста, установленных один на входе, другой - на выходе СВЧ преобразователя частоты, причем каждый поляризатор выполнен в виде отрезка либо круглого, либо квадратного волновода с установленным внутри него ферритовым вкладышем в виде трубки или стержня, а снаружи него - магнитной системы, создающей в ферритовом вкладыше постоянное квадрупольное магнитное поле. И 1 115987 ко РОССИЙСКАЯ ФЕДЕРАЦИЯ 7 ВУ’? 115 987? 91 ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ИЗВЕЩЕНИЯ К ПАТЕНТУ НА ПОЛЕЗНУЮ МОДЕЛЬ ММ9К Досрочное прекращение действия патента из-за неуплаты в установленный срок пошлины за поддержание патента в силе Дата прекращения действия патента: 12.01.2020 Дата внесения записи в Государственный реестр: 07.10.2020 Дата публикации и номер бюллетеня: 07.10.2020 Бюл. №28 Стр.: 1 па 1 з6ч рр ЕП

КОЛЬЦЕВОЙ ПРЕОБРАЗОВАТЕЛЬ ЧАСТОТ

Кольцевой преобразователь частот, содержащий общий для всего устройства проводник, симметрирующие сигнальный и гетеродинный трансформаторы, каждый из которых имеет несимметричный вход первичной обмотки, образованный ее первым свободным концом и вторым концом, соединенным с общим проводником, и два симметричных противофазных вывода вторичной обмотки и вывод ее средней точки, при этом вывод средней точки вторичной обмотки сигнального трансформатора соединен с общим проводником, а вывод средней точки вторичной обмотки гетеродинного трансформатора совместно с общим проводником образуют выход устройства, кольцевой мост, выполненный на основе цепочки из четырех последовательно согласно соединенных полупроводниковых диодов, начало которой образует анод первого диода, а конец - катод четвертого диода, четыре разделительных конденсатора, первый и второй из которых включены между симметричными противофазными выводами вторичной обмотки гетеродинного трансформатора и местами соединения первого, и второго, и третьего, и четвертого диодов соответственно, третий из которых включен между одним из двух симметричных противофазных выводов вторичной обмотки сигнального трансформатора и местом соединения второго и третьего диодов, и четвертый из которых включен между анодом первого и катодом четвертого диодов, источник постоянного напряжения смещения, цепочку из последовательно соединенных первых дросселя и резистора, у которой свободный конец резистора соединен с положительным полюсом источника постоянного напряжения смещения, а свободный конец дросселя - с анодом первого диода, отличающийся тем, что в него введены пятый разделительный конденсатор, включенный между другим симметричным противофазным выводом вторичной обмотки сигнального трансформатора и катодом четвертого диода, цепочка из последовательно соединенных вторых дросселя и резистора, у которой свободный конец дросселя соединен с катодом четвертого диода, а свободный конец резистора - с отрицательным полюсом источника ...

КОЛЬЦЕВОЙ ПРЕОБРАЗОВАТЕЛЬ ЧАСТОТ

Кольцевой преобразователь частот, содержащий общий для всего устройства проводник, симметрирующие сигнальный и гетеродинный трансформаторы, каждый из которых имеет несимметричный вход первичной обмотки, образованный ее первым свободным концом и вторым концом, соединенным с общим проводником, и два симметричных противофазных вывода вторичной обмотки и вывод ее средней точки, при этом вывод средней точки вторичной обмотки сигнального трансформатора соединен с общим проводником, а вывод средней точки вторичной обмотки гетеродинного трансформатора совместно с общим проводником образуют выход устройства, кольцевой мост, выполненный на основе цепочки из четырех последовательно согласно соединенных полупроводниковых диодов, начало которой образует анод первого диода, а конец - катод четвертого диода, четыре разделительных конденсатора, первый и второй из которых включены между симметричными противофазными выводами вторичной обмотки гетеродинного трансформатора и местами соединения первого и второго и третьего и четвертого диодов, соответственно, третий из которых включен между одним из двух симметричных противофазных выводов вторичной обмотки сигнального трансформатора и местом соединения второго и третьего диодов, и четвертый из которых включен между анодом первого и катодом четвертого диодов, источник постоянного напряжения смещения, цепочку из последовательно соединенных первых дросселя и резистора, у которой свободный конец резистора соединен с положительным полюсом источника постоянного напряжения смещения, а свободный конец дросселя - с анодом первого диода, отличающийся тем, что в него введены пятый разделительный конденсатор, включенный между катодом четвертого диода и местом соединения четвертого конденсатора и другим симметричным противофазным выводом вторичной обмотки сигнального трансформатора, цепочка из последовательно соединенных вторых дросселя и резистора, у которой свободный конец дросселя соединен с катодом четвертого диода, а свободный конец резистора - ...

СИСТЕМА ПРЕОБРАЗОВАНИЯ И РЕГИСТРАЦИИ СИГНАЛОВ ДЛЯ РАДИОАСТРОНОМИЧЕСКОГО ИНТЕРФЕРОМЕТРА

1. Система преобразования и регистрации сигналов для радиоастрономического интерферометра, содержащая n каналов преобразования сигналов, в каждый из которых входят полосовой фильтр входного сигнала, аналого-цифровой преобразователь, соединенный с генератором сигнала тактовой частоты считывания, и первый цифровой компаратор выборок сигнала, соединенный с вычислителем среднеквадратического значения выборок сигнала, а также датчик импульсов секунд текущего времени и формирователь выходного кода данных, соединенный с выходным устройством буферизации данных, отличающаяся тем, что в каждый канал преобразования сигналов введены m-канальный демультиплексор, соединенный с упомянутыми аналого-цифровым преобразователем, вычислителем среднеквадратического значения выборок сигнала и генератором сигнала тактовой частоты считывания, (m-1) дополнительных цифровых компараторов выборок сигнала, соединенных с вычислителем среднеквадратического значения выборок и с формирователем кода данных, и делитель частоты, включенный между генератором сигнала тактовой частоты считывания и тактирующими входами всех цифровых компараторов выборок. 2. Система преобразования и регистрации сигналов по п.1, отличающаяся тем, что датчик импульсов секунд соединен с блокирующими входами аналого-цифрового преобразователя во всех каналах системы преобразования и регистрации сигналов. 3. Система преобразования и регистрации сигналов по п.1, отличающаяся тем, что на входах цифровых компараторов с нечетными порядковыми номерами установлены переключаемые цифровые инверторы. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (51) МПК H03D 7/00 (13) 122 810 U1 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ (21)(22) Заявка: ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ 2011144073/08, 31.10.2011 (24) Дата начала отсчета срока действия патента: 31.10.2011 (45) Опубликовано: 10.12.2012 Бюл. № 34 1 2 2 8 1 0 R U Формула полезной модели 1. Система преобразования и регистрации сигналов для радиоастрономического интерферометра, ...

ШИРОКОПОЛОСНЫЙ КАНАЛ ПРЕОБРАЗОВАНИЯ СИГНАЛОВ ДЛЯ РАДИОИНТЕРФЕРОМЕТРА

1. Широкополосный канал преобразования сигналов для радиоинтерферометра, содержащий последовательно соединенные входной приемно-усилительный тракт, аналого-цифровой преобразователь сигналов, распределитель цифровых выборок сигнала, m-канальный амплитудный квантователь цифровых выборок, формирователь кадров наблюдаемых данных с таймером и устройство формирования и передачи выходного потока данных, вычислитель среднеквадратического отклонения выборок сигнала, соединенный с распределителем выборок и с m-канальным квантователем, а также контроллер управления, соединенный с компьютером радиотелескопа, синхронизатор импульсов секунд и генератор сигналов тактовых частот, соединенный с аналого-цифровым преобразователем, с распределителем выборок сигнала и с синхронизатором импульсов секунд, отличающийся тем, что введены формирователь служебной информации, соединенный с упомянутыми формирователем кадров наблюдаемых данных и контроллером управления, счетчик импульсов переполнений, соединенный с распределителем выборок сигнала и с контроллером управления, и вычислитель среднего значения выборок сигнала, соединенный с распределителем выборок и со входом коррекции нуля аналого-цифрового преобразователя сигнала, причем контроллер управления соединен с элементом регулировки усиления приемно-усилительного тракта. 2. Широкополосный канал по п.1, отличающийся тем, что между синхронизатором импульсов секунд и таймером формирователя кадров наблюдаемых данных введено устройство задержки импульсов. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (51) МПК H03D 7/00 (13) 130 463 U1 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ (21)(22) Заявка: ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ 2013104559/08, 04.02.2013 (24) Дата начала отсчета срока действия патента: 04.02.2013 (45) Опубликовано: 20.07.2013 Бюл. № 20 1 3 0 4 6 3 R U Формула полезной модели 1. Широкополосный канал преобразования сигналов для радиоинтерферометра, содержащий последовательно соединенные входной приемно-усилительный ...

БАЗОВАЯ СТАНЦИЯ СВЕРХВЫСОКОСКОРОСТНОЙ САМООРГАНИЗУЮЩЕЙСЯ СЕТИ МИЛЛИМЕТРОВОГО Е-ДИАПАЗОНА РАДИОВОЛН

Базовая станция сверхвысокоскоростной самоорганизующейся сети миллиметрового Ε-диапазона радиоволн, содержащая СВЧ фильтры, полнодуплексный программно-управляемый СВЧ трансивер 60-100 ГГц и процессор со встроенным коммутатором, отличающаяся тем, что дополнительно содержит тракт приема СВЧ сигнала, состоящий из двух усилителей мощности формирования передачи СВЧ сигнала и двух малошумящих усилителей мощности, подключенные к дуплексному СВЧ трансиверу, при этом процессорный модуль со встроенным коммутатором второго уровня по шине данных соединен с СВЧ трансивером и шлюзом с адаптером низкоскоростной широкополосной сетью абонентского доступа, шина управления объединяет каналы управления СВЧ трансивера, усилители мощности и малошумящие усилители мощности процессорного модуля, слот расширения и шлюз, физический интерфейс Gigabit Ethernet соединены с процессором со встроенным Ethernet коммутатором L24, при этом СВЧ фильтры 1 соединены с антенной системой. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (51) МПК H03D 7/00 (13) 135 465 U1 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ (21)(22) Заявка: ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ 2013127783/08, 19.06.2013 (24) Дата начала отсчета срока действия патента: 19.06.2013 (72) Автор(ы): Вишневский Владимир Миронович (RU), Фролов Сергей Анатольевич (RU) (45) Опубликовано: 10.12.2013 Бюл. № 34 1 3 5 4 6 5 R U Формула полезной модели Базовая станция сверхвысокоскоростной самоорганизующейся сети миллиметрового Ε-диапазона радиоволн, содержащая СВЧ фильтры, полнодуплексный программноуправляемый СВЧ трансивер 60-100 ГГц и процессор со встроенным коммутатором, отличающаяся тем, что дополнительно содержит тракт приема СВЧ сигнала, состоящий из двух усилителей мощности формирования передачи СВЧ сигнала и двух малошумящих усилителей мощности, подключенные к дуплексному СВЧ трансиверу, при этом процессорный модуль со встроенным коммутатором второго уровня по шине данных соединен с СВЧ трансивером и шлюзом с адаптером ...

ПРИЕМНО-РЕГИСТРИРУЮЩИЙ КАНАЛ РАДИОТЕЛЕСКОПА

Приемно-регистрирующий канал радиотелескопа, содержащий последовательно соединенные генератор пикосекундных импульсов, приемно-усилительный канал и аналого-цифровой преобразователь, к тактовому входу которого подключен выход генератора сигналов тактовой частоты, соединенный также с генератором меандра частоты преобразования, а к сигнальному выходу аналого-цифрового преобразователя подключены последовательно соединенные цифровой преобразователь выборок сигнала и формирователь данных, который синхронизирующим входом подключен к выходу формирователя импульсов секунд, а управляющим входом - через устройство управления к компьютеру, причем выход упомянутого генератора меандра соединен параллельно с тактовыми входами цифрового преобразователя выборок, формирователя данных и формирователя импульсов секунд, отличающийся тем, что к упомянутому выходу аналого-цифрового преобразователя подключены последовательно соединенные формирователь пакетов выборок сигнала, сумматор пакетов выборок, подключенный синхронизирующим входом к упомянутому выходу формирователя импульсов секунд, дискретный преобразователь Фурье и линеаризатор фазового спектра, выход которого соединен с упомянутым устройством управления, причем упомянутый выход генератора меандра дополнительно соединен с тактовыми входами формирователя пакетов выборок и сумматора пакетов, а также со входом делителя частоты, выход которого через коаксиальный кабель нормированной длины соединен с управляющим входом упомянутого генератора пикосекундных импульсов. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 166 692 U1 (51) МПК H03D 7/00 (2006.01) G01R 31/28 (2006.01) G01R 23/16 (2006.01) H04B 17/21 (2015.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ (21)(22) Заявка: ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ 2016115025/08, 18.04.2016 (24) Дата начала отсчета срока действия патента: 18.04.2016 (72) Автор(ы): Кольцов Николай Ефимович (RU), Федотов Леонид Васильевич (RU) (45) Опубликовано: 10.12.2016 Стр.: 1 U 1 1 6 6 6 9 2 R U U 1 ( ...

ЦИФРОВОЙ ГЕТЕРОДИН ДЛЯ ВИДЕОКОНВЕРТОРА

Полезная модель относится к радиотехническим устройствам генерации сигналов и предназначена для использования в качестве гетеродина видеоконвертора в радиоастрономических системах преобразования и в другой радиотехнической аппаратуре. Гетеродин относится к генераторам прямого синтеза частот, которые содержат высокостабильный генератор импульсов тактовой частоты F, датчик кода n, определяющий шаг перестройки частоты Δƒ и рабочую частоту ƒ=nΔƒ, суммирующий накопитель кодов фаз гетеродинного сигнала и банк кодов гетеродинных сигналов, записанных для N=F/Δƒ значений фаз в пределах одного периода гармонического сигнала. Известные генераторы работают только при определенных отношениях тактовой частоты и шага перестройки, а именно при F/Δƒ=2, где m - целое положительное число. Целью полезной модели является обеспечение работы при любых целочисленных отношениях F/Δƒ и возможности независимого выбора F и Δƒ. Эта цель достигается тем, что введены компаратор, соединенный одним входом с выходом упомянутого суммирующего накопителя кодов, а другим входом - с датчиком разностного кода, и коммутатор, выход которого соединен со входом упомянутого суммирующего накопителя кодов, первый вход - с упомянутым датчиком кода частоты, второй вход подключен через инвертор знака к выходу датчика разностного кода, а установочный вход соединен с выходом упомянутого генератора меандра тактовой частоты через последовательно соединенные инвертор меандра и ключ, управляющий вход которого соединен с выходом компаратора, причем тактирующий вход компаратора соединен с выходом упомянутого меандра тактовой частоты, а установочный вход датчика разностного кода - с упомянутым процессором управления. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 174 149 U1 (51) МПК H03D 7/00 (2006.01) H03L 7/16 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (21)(22) Заявка: 2017115688, 03.05.2017 (24) Дата начала отсчета срока действия патента: 03.05.2017 04.10.2017 Приоритет ...

СИСТЕМА ПРЕОБРАЗОВАНИЯ И ФОРМАТИРОВАНИЯ СИГНАЛОВ ДЛЯ РАДИОИНТЕРФЕРОМЕТРА

Полезная модель относится к радиоастрономическим системам и может быть использована на радиотелескопах, работающих в составе комплексов радиоинтерферометрии со сверхдлинными базами. Система содержит n аналого-цифровых преобразователей (АЦП) широкополосных сигналов с m-канальными демультиплексорами, к выходам каждого из которых подключен m-канальный полифазный фильтр. Выходы всех фильтров через равнодоступный коммутатор соединены со входами N цифровых видеоконверторов (ЦВК), которые через квантователи амплитуд цифровых выборок соединены с форматером данных. АЦП и демультиплексоры тактируются от генератора импульсов дискретизации непосредственно, полифазные фильтры и ЦВК - через m-кратный делитель частоты, а квантователи - через дополнительный делитель. Каждый ЦВК содержит пару перемножителей входного сигнала с квадратурными гетеродинными сигналами, фазовый селектор, частотопонижающие фильтры нижних частот и выходной переключатель. Полоса частот каждого из n поступающих на вход сигналов с полосой частот В считывается АЦП с тактовой частотой ƒ=2B и разделяется полифазным фильтром на m поддиапазонов шириной В=В/m с одновременным снижением в m раз тактовой частоты следования выборок сигнала. Равнодоступным коммутатором сигнал любого из m поддиапазонов любого из n каналов подключается на вход любого ЦВК, который может перестраиваться в полосе частот В и выделяет сигнал с относительно узкой полосой частот. После квантования выделенные узкополосные сигналы объединяются и форматируются в выходной цифровой поток, обеспечивая совместимость с существующими узкополосными системами. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 175 721 U1 (51) МПК H03D 7/00 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (21)(22) Заявка: 2017132248, 14.09.2017 (24) Дата начала отсчета срока действия патента: 14.09.2017 Дата регистрации: Приоритет(ы): (22) Дата подачи заявки: 14.09.2017 (45) Опубликовано: 15.12.2017 Бюл. № 35 U 1 166692 U1, 10.12. ...

СИСТЕМА ПРЕОБРАЗОВАНИЯ И РЕГИСТРАЦИИ ШИРОКОПОЛОСНЫХ СИГНАЛОВ ДЛЯ РАДИОАСТРОНОМИЧЕСКОГО ИНТЕРФЕРОМЕТРА

Полезная модель относится к радиоастрономической аппаратуре и может быть использована на радиотелескопах, работающих в составе комплексов радиоинтерферометрии со сверхдлинными базами. Система содержит последовательно соединенные приемник широкополосных сигналов, N-канальный делитель мощности, N каналов цифрового преобразования сигналов, каждый из которых состоит из аналого-цифрового преобразователя (АЦП) и квантователя амплитуд цифровых выборок, N-канального дешифратора и формирователя потока данных с выходом на волоконно-оптическую линию. Генератор импульсов частоты дискретизации ƒ тактирует АЦП всех каналов и формирователь импульсов секунд текущего времени, которые поступают на синхронизирующий вход формирователя потока данных. Чтобы обеспечить идентичность каналов системы, уменьшить искажения сигналов, массу и габариты системы, повысить ее надежность вместо преобразователей частоты каждый канал соединен с соответствующим выходом делителя мощности через полосовой фильтр с шириной полосы пропускания не более 0,5 ƒ. Эти полосы смещены по частоте так, чтобы в сумме перекрыть всю входную полосу частот, а в АЦП каналов использовались разные зоны Найквиста. За счет ввода в систему N-канального дешифратора, через который выходы всех квантователей соединены с формирователем потока данных, число таких формирователей и волоконно-оптических линий на их выходах сокращено с N до 1, что повышает эффективность использования высокоскоростного потока данных 10G Ethernet на выходе системы. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 176 177 U1 (51) МПК H03D 7/00 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (52) СПК H03D 7/00 (2006.01); H04B 1/08 (2006.01); H04B 1/16 (2006.01); H04B 7/14 (2006.01) (21)(22) Заявка: 2017115686, 03.05.2017 (24) Дата начала отсчета срока действия патента: 11.01.2018 Приоритет(ы): (22) Дата подачи заявки: 03.05.2017 (56) Список документов, цитированных в отчете о поиске: RU 122810 U1, 10.12.2012. RU ...

ЦИФРОВОЙ ГЕТЕРОДИН НА ПРОГРАММИРУЕМОЙ ЛОГИЧЕСКОЙ ИНТЕГРАЛЬНОЙ СХЕМЕ

Полезная модель относится к радиоастрономической аппаратуре, а точнее - к видеоконверторам систем преобразования сигналов (СПС), которые выделяют из цифрового широкополосного сигнала промежуточной частоты (ПЧ) сигнал со сравнительно узкой полосой и преобразуют выделенный сигнал в область видеочастот. Гетеродин-прототип, построенный по принципу прямого цифрового синтеза частот, содержит схему формирования кодов фаз α(i) гетеродинных сигналов, где i - порядковый номер кода гетеродинного сигнала, два банка кодов гетеродинных сигналов (синусного и косинусного), которые адресными входами подключены к выходу формирователя кодов фаз, датчик кода частоты гетеродина и генератор импульсов тактовой частоты F, которыми тактируются узлы гетеродина. Формирователь кодов фаз в известном устройстве (прототипе), содержит накопитель кодов фаз, компаратор кодов, инвертор меандра тактовой частоты и элементы коммутации. В каждом банке кодов гетеродинных сигналов записано N кодов гармонического сигнала, различающихся по фазе на ϕ=2π/N. На каждом такте формирователь кодов фаз вычисляет текущее значение фазы α(i), изменяя его в пределах 2π с шагом Δα=b ϕ, где b - код частоты гетеродина ƒ, который задается датчиком кода частоты. Недостаток известного устройства - неширокий рабочий диапазон частот Δƒ, ограниченный максимальной тактовой частотой работы программируемой логической интегральной схемы. Цель заявляемой полезной модели - расширение частотного диапазона перестройки гетеродина, что позволит расширить рабочую полосу частот цифрового видеоконвертора СПС. Эта цель достигается за счет того, что в гетеродин, содержащий формирователь кодов фаз гетеродинного сигнала, соединенный по входу с датчиком кода частоты, а по выходу - с адресными входами банка синусного гетеродинного сигнала и банка косинусного гетеродинного сигнала, а также генератор импульсов тактовой частоты, введены дополнительно n-1 банков синусных сигналов и n-1 банков косинусных сигналов, соединенных адресными входами с ...

Радиофотонное устройство формирования сверхширокополосных СВЧ сигналов

Изобретение относится к области вычислительной техники. Технический результат заключается в обеспечении генерации различных типов сложных сверхширокополосных СВЧ сигналов в одном устройстве формирования. Радиофотонное устройство формирования сверхширокополосных СВЧ сигналов, содержащее генератор сигналов произвольной формы, отличающееся тем, что содержит электрооптический модулятор Маха-Цендера, оптический вход которого соединен с одночастотным лазером с волоконно-оптическим выводом излучения, а оптический выход соединен с помощью отрезка стандартного одномодового оптического волокна с мощным высокоскоростным фотодиодом с оптоволоконным вводом излучения, электрический выход которого соединен с полосовым СВЧ фильтром, электрический вход электрооптического модулятора Маха-Цендера электрически связан с СВЧ сумматором, суммирующим сигналы электрически связанных с ним СВЧ генератора опорной частоты и генератора сигналов произвольной формы таким образом, что амплитуды каждого из сигналов составляют величины, равные или кратные полуволновому напряжению электрооптического модулятора Маха-Цендера. 1 ил. РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 194 138 U1 (51) МПК H03B 28/00 (2006.01) H03D 7/00 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (52) СПК H03B 28/00 (2019.08); H03D 7/00 (2019.08) (21)(22) Заявка: 2019126072, 16.08.2019 (24) Дата начала отсчета срока действия патента: (73) Патентообладатель(и): Государственное научно-производственное объединение "Оптика, оптоэлектроника и лазерная техника" (BY) Дата регистрации: 28.11.2019 (56) Список документов, цитированных в отчете о поиске: RU 2016107964 A, 07.09.2017. RU 171551 U1, 06.06.2017. RU 2007133920 A, 27.03.2009. RU 2405179 C1, 27.11.2010. (45) Опубликовано: 28.11.2019 Бюл. № 34 1 9 4 1 3 8 R U (54) Радиофотонное устройство формирования сверхширокополосных СВЧ сигналов (57) Реферат: Изобретение относится к области оптического волокна с мощным вычислительной техники. ...

Apparatus and method for low voltage radio transmission

Apparatus and methods are disclosed related to low-voltage radio transmitters with high spectral purity. One such apparatus includes a baseband path with a predistortion stage, a programmable filter, and an upconverter core. In an embodiment, the programmable filter is placed between the predistortion stage and the upconverter core. In an embodiment, the programmable filter is configured by a controller to reject out-of-band noise introduced at the predistortion stage or earlier.

Saw-less, lna-less low noise receiver

A low noise receiver includes a downconverter configured to receive a radio frequency (RF) signal, the downconverter comprising a switching architecture configured to generate a plurality of output phases based on a respective plurality of local oscillator (LO) signals, a differencing circuit configured to combine the plurality of output phases such that an nth output phase is differenced with an (n+K)th output phase, resulting in gain-added output phases, and a summation filter configured to receive the gain-added output phases and configured to combine the gain-added output phases such that a response of the receiver effectively reduces odd harmonics of the RF signal.

Ip2 calibration methods and techniques

Some embodiments of the present disclosure relate to improved techniques for performing IP2 calibration in receivers having two complementary data paths (e.g., i-data path and q-data path). In these techniques, one of the two data paths (e.g., the i-data path) is used to generate a reference signal for the other data path (e.g., the q-data path), and/or vice versa. The other data path then performs calibration using the reference signal. Compared to previous techniques (which required separate, dedicated circuitry for generating a reference signal), the inventive techniques reduce the amount of circuitry and correspondingly reduce the manufacturing costs and power consumption. This is because the inventive techniques use the existing circuitry in complementary fashion during calibration (e.g., during calibration an i-data path generates a reference signal for a q-data path, and vice versa).

Switching core layout

Traditionally, mixers have been arranged symmetrically around the input signal, which has resulted in problems due to self-mixing or feed-through by the local oscillator signal. Here, however, the arrangement for a mixer has been changed to generally avoid self-mixing of the local oscillator signal. In particular, transistors in the switching core are merged according to the portion of the local oscillator signal received. This, in turn, results in the conductors, which carry the different portions of the local oscillator signal, being separated (or not having any crossings) so as to generally eliminate self-mixing or feed-through of the local oscillator signal. Complex IQ mixers realized using this arrangement benefit from improved sideband suppression and image rejection.

Quadrature mixer

This invention provides an quadrature mixer which does not require a long time to adjust the amplitude value at the time of demodulation of the IQ signal. The quadrature mixer, comprising a first frequency-conversion unit that outputs a sixth signal derived by multiplying a first signal by a second and a fourth signals, a second frequency-conversion unit that outputs a seventh signal derived by multiplying the first signal by a third and a fifth signals, a first amplitude adjustment unit that outputs a eighth signal derived by multiplying the sixth signal by the third and fifth signals and a second amplitude adjustment unit that outputs a ninth signal derived by multiplying the seventh signal by the second and fifth signals.

Calibration of passive harmonic-rejection mixer

An electronic device comprising a passive harmonic-rejection mixer ( 400 ) and a calibration circuitry ( 425 ). The passive harmonic rejection mixer has an input ( 102 ) connected to several sub-mixer stages ( 402 ), and the sub-mixer stages are connected to a summing module ( 406, 408 ) for generating the output ( 104 ). Each sub-mixing stage comprises a gating module ( 414 ), an amplifier ( 416 ), and a weighting module ( 418 ), the gating module selectively passing the input signal or the input signal with inverted polarity under the control of control signals. The calibration circuitry ( 425 ) is adapted to input a reference signal ( 430 ) to the input of the mixer, receive an output signal ( 104 ) from the output of the mixer, and set the weights (K 1, K 2, K 3, K 4 ) of the weighting modules to make the output signal match an expected output signal.

Frequency shift circuit and communication device

A frequency shift circuit that shifts the frequency of an input signal using a rotor corresponding to a predetermined phase rotation amount, the frequency shift circuit includes a table look-up unit that includes a plurality of tables that store complex data and outputs the complex data for each table based on address information, a complex multiplication circuit that complex-multiplies the complex data which have been output from the table look-up unit for each table, a deletion circuit that generates a rotor corresponding to a phase rotation amount which is based on a result of complex-multiplication executed, and a calculation circuit that calculates the address information for each table such that exp (2 π j θ) is obtained as the result of complex multiplication executed based on rotation angle information θ.

Switching system with linearizing circuit

A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

Receiver with Wide Dynamic Range and Low Power Consumption

Some embodiments of the invention relate a circuit having a first and a second electrically connected voltage domains, respectively biased at different supply voltages (e.g., the first voltage domain biased at a low bias voltage and the second voltage domain biased at a second, different supply voltage). The apparatus further comprises a first DC current source coupled to one of the voltage domains (e.g., the first voltage domain having a low DC voltage potential) and a second DC current source coupled to the other voltage domain (e.g., the second voltage domain having a high DC voltage potential). The first and second DC current sources are configured to provide a DC cancellation current having a value that cancels a DC current generated by the potential difference between the first and second voltage domains.

Low Noise Mixer

An apparatus comprising a low noise mixer comprising a transconductance amplifier configured to receive a differential voltage and to generate a differential current signal, a passive mixer directly connected to an output of the transconductance amplifier, and a transimpedance amplifier coupled to the passive mixer, wherein the transimpedance amplifier is configured to receive a current signal and convert the current signal to a voltage signal.

Mixing circuit

There is provided a mixing circuit in which a rise of the consumption current can be suppressed while decreasing a non-linear component. The mixing circuit includes: an input unit 803 including a grounded-gate MOS transistor M 1 with a source into which an input signal is input, and a grounded-source MOS transistor M 2 with a gate into which the input signal is input; a frequency converter 802 for converting frequencies of a first current signal output from the grounded-gate MOS transistor M 1 and a second current signal output from the grounded-source MOS transistor M 2, and for generating a third current signal and a fourth current signal; a load MOS transistor M 7, with a gate and a drain connected, for receiving a third current signal; and a load MOS transistor M 8, with a gate and a drain connected, for receiving a fourth current signal.

Switching core layout

Traditionally, mixers have been arranged symmetrically around the input signal, which has resulted in problems due to self-mixing or feed-through by the local oscillator signal. Here, however, the arrangement for a mixer has been changed to generally avoid self-mixing of the local oscillator signal. In particular, transistors in the switching core are merged according to the portion of the local oscillator signal received. This, in turn, results in the conductors, which carry the different portions of the local oscillator signal, being separated (or not having any crossings) so as to generally eliminate self-mixing or feed-through of the local oscillator signal. Complex IQ mixers realized using this arrangement benefit from improved sideband suppression and image rejection.

Highly Optimized Digital IQ Transmitter Chain

Circuitry separates a modulation signal into digital sign and magnitude signal components. The digital magnitude signal is converted to an analog magnitude signal. The analog magnitude signal is the mixed with an in-phase or quadrature carrier signal under the influence of the digital sign signal and routed to a driver output stage.

Direct mixer with transistor and sample-and-hold module

A direct mixer includes a transistor and sample-and-hold module and uses a transposition of an RF signal into baseband with a configuration with high dynamic range and low noise factor.

Mixer, Mixer System and Method

A mixer is configured to sample a received input signal at a predefined oscillator frequency to generate a sampled input signal, and to switch a polarity of the sampled input signal at a predefined polarity switching frequency to generate a polarity switched sampled input signal.

Frequency up and down converter

A frequency up and down converter, in which, when down converting a high frequency signal into an intermediate frequency signal or up converting an intermediate frequency signal into a high frequency signal by controlling switching elements using a local oscillator signal, a signal with a frequency to be converted is controlled a number of times during one cycle of the local oscillator signal, whereby the local oscillator signal with a frequency lower than an original frequency may be used. Transistors are added in parallel to switching transistors disposed in a frequency down conversion unit or a frequency up conversion unit, and local oscillator signals with predetermined phases and pulse widths are provided to the gates of the transistors such that a high frequency signal or an intermediate frequency signal is transferred to an output terminal at least two times during one cycle of a local oscillator signal.

Harmonic reject receiver architecture and mixer

Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Harmonic reject receiver architecture and mixer

Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

System and method for providing a carbon nanotube mixer

An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.

Mixer circuit and variation suppressing method

In a mixer circuit that solves the problem of the extreme increase in circuit complexity that accompanies compensating for amplitude errors and phase errors, a voltage current conversion unit ( 11 ) converts an RF signal, which is a voltage signal, to a current signal and supplies the current signal. An RF path selection unit ( 12 ) connects its input terminal to any of its output terminals in accordance with the state of a four-phase clock signal and separately supplies, from its output terminals, a plurality of IF signals obtained by multiplying the RF signal by clock signals in the four-phase clock signal. An IF path selection unit ( 13 ) switches the connection relationship between its input terminals and its output terminals in accordance with a selection signal (S) and supplies the IF signal input to each of its input terminals from its output terminals that are connected to the input terminals.

Switching gates mixer

This invention concerns a sub-harmonic homodyne mixer suitable for operation at the millimetre waveband (MMW); for instance the 60 GHz RF radio band. The mixer comprises: A first pair of transistors connected together with common source and common drain, and having an input port across their gates to receive the in-phase voltage signal from a local oscillator. A second pair of transistors also connected together with common source and common drain, and having an input port across their gates to receive the quadrature voltage signal from the local oscillator. Wherein, an input voltage port is defined directly across the common sources of the first and second pairs of transistors, and an output voltage port is defined between the common drains of the first pair of transistors and the common drains of the second pair of transistors. According to another aspect the present invention is a transceiver comprising a mixer according to the first aspect.

Radio frequency circuit and mixer

A radio frequency circuit includes a transformer, a local oscillator, a first mixer, a second mixer, a first variable gain amplifier, and a second variable gain amplifier. The first mixer includes a first inductor that is coupled between a positive in-phase input and a negative in-phase input. The second mixer includes a second inductor that is coupled between a positive quadrature input and a negative quadrature input. The first and second inductors provide inductive loads and improve conversion gains of the first and second mixers respectively.

Apparatus, System, and Method for Down Converting and Up-Converting Electromagnetic Signals

Methods, systems, and apparatuses for down-converting and up-converting an electromagnetic signal. In embodiments, the invention operates by receiving an electromagnetic signal and recursively operating on approximate half cycles of a carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In embodiments, up-conversion is accomplished by controlling a switch with an oscillating signal, the frequency of the oscillating signal being selected as a sub-harmonic of the desired output frequency. When the invention is being used in the frequency modulation or phase modulation implementations, the oscillating signal is modulated by an information signal before it causes the switch to gate a bias signal. The output of the switch is filtered, and the desired harmonic is output.

Down-Conversion of Multiple RF Channels

A method and system is disclosed for designing a radio for down-converting RF signals to IF signals by sampling the signals in a round-robin sampling circuit and multiplying the samples by coefficients that are changed at a fixed rate equal to the rate of operation of each of the sampling circuits. The circuit is able to down-convert multiple channels simultaneously to adjacent positions in the IF band, while rejecting unwanted image signals. The method and system avoids the difficulty and cost of directly digitizing the RF signal, allowing each component to operate at a greatly reduced speed. The coefficients are selected to provide the desired transfer function while keeping the output signal centered at a desired frequency.

Method and Apparatus of an Input Resistance of a Passive Mixer to Broaden the Input Matching Bandwidth of a Common Source/Gate LNA

A cascode common source and common gate LNAs operating at 60 GHz are introduced and described. The cascode common source LNA is simulated to arrive at an optimum ratio of upper device width to the lower device width. The voltage output of the cascode common source LNA is translated into a current to feed and apply energy to the mixer stage. These input current signals apply the energy associated with the current directly into the switched capacitors in the mixer to minimize the overall power dissipation of the system. The LNA is capacitively coupled to the mixer switches in the I and Q mixers and are enabled and disabled by the clocks generated by the quadrature oscillator. These signals are then amplified by a differential amplifier to generate the sum and difference frequency spectra.

Down-converter, up-converter, receiver and transmitter applying the same

A down-frequency conversion circuit and up-frequency conversion circuit, and a receiver and transmitter applying the same are provided. The down-frequency conversion circuit includes a harmonic mixer and general mixer, and thus becomes able to convert frequency using one LO (Local Oscillator) frequency, thereby reducing burden on generating LO frequency.

SWITCH MODE CIRCULATOR ISOLATED RF MIXER

The present invention relates to a radio frequency mixer circuit comprising a first terminal (), a local oscillator terminal () and a second terminal (); a wave propagation medium () having a first (a) and second end (), where the mixer circuit further comprises a circulator () coupling together the first terminal (), the first end () of the wave propagation medium and the second terminal (), a switching means () operable according to a signal coupled to the LO terminal (), the switching means being coupled to the second end () of the wave propagation medium for causing a reflection with unchanged voltage wave polarity when the switching means is in an open state, or a reflection with inverted voltage wave polarity when the switching means is in a closed state, at the second end of the wave propagation medium when a wave is travelling therein. 1. A radio frequency mixer circuit comprising a first terminal; a local oscillator (LO) terminal; a second terminal; a wave propagation medium having a first end and a second end; a circulator coupling together the first terminal , the first end of the wave propagation medium and the second terminal; and a switching operable according to a signal coupled to the LO terminal , wherein the switch is coupled to the second end of the wave propagation medium to cause a reflection with unchanged voltage wave polarity when the switch is in an open state , or a reflection with inverted voltage wave polarity when the switch is in a closed state , at the second end of the wave propagation medium when a wave is travelling therein.2. A radio frequency mixer circuit according to claim 1 , further comprising a further wave propagation medium with a first end and a second end claim 1 , where the first end of the further wave propagation medium is coupled to the circulator; a further switch; and a further LO terminal claim 1 , wherein the further switch is operable according to a signal coupled to the further LO terminal and is coupled to the ...

Frequency conversion device for wireless systems

A frequency conversion device for transforming a frequency of an input signal, the device comprising: a signal generator for providing a plurality N of first signals at a first frequency, where N≧1, from an input signal having an in-phase component I and a quadrature signal component Q; an oscillator for generating N parallel oscillation signals, wherein the N oscillation signals are stepped in phase with respect to one another; a mixer comprising N mixing components, each mixing component being coupled to receive a respective one of the plurality of first signals and coupled to receive a respective oscillation signal for mixing the respective first signal with the corresponding oscillation signal to provide an output signal; and a common amplifier for receiving the N output signals from the N mixing components in N sequential phases for transmission.

Envelope Tracking Amplifier

An envelope tracking power amplifier uses signal cancellation techniques to provide isolation between RF signals and envelope signals, without the use of filters. In this manner, the envelope tracking power amplifiers are capable of operating with envelope signals that are at or near the frequency of the corresponding RF signals. In at least one embodiment, a double balanced power amplifier is provided that includes a balanced RF input port, a balanced RF output port, and a balanced envelope input port. The balanced nature of the amplifier results in ports of the amplifier forming virtual grounds with respect to signals at other ports. In some other embodiments, a single balanced amplifier is provided that provides isolation between ports thereof.

HIGH FREQUENCY MIXER WITH TUNABLE DYNAMIC RANGE

A high frequency mixer with a tunable dynamic range is disclosed. One embodiment provides a mixer apparatus including multiple first transistors at an input branch that receive a differential radio frequency (RF) signal, and multiple second transistors at a second branch that receive a differential local oscillator (LO) signal. The second transistors generate an intermediate frequency (IF) differential output signal. The bias current that flows at the input branch and the output branch can be independently adjusted to allow the conversion gain, linearity, or the output noise of the mixer to be controlled. 1. A mixer apparatus comprising:a first plurality of transistors configured to receive a radio frequency (RF) signal and to provide a mixer input signal;a second plurality of transistors configured to frequency translate the mixer input signal with a local oscillator (LO) signal to provide an intermediate frequency (IF) signal; anda comparator configured to compare a common mode voltage of the IF signal to a reference voltage to provide a sensing signal,wherein the first plurality of transistors is further configured to provide a mixer input current based on the sensing signal to drive the common mode voltage to substantially equal the reference voltage.2. The mixer apparatus of claim 1 , wherein the first plurality of transistors comprises:a pair of n-type metal oxide semiconductor (NMOS) transistors; anda pair of p-type metal oxide semiconductor (PMOS) transistors.3. The mixer apparatus of claim 2 , further comprising:a second pair of NMOS transistors coupled to the pair of NMOS transistors, the second pair of NMOS transistors being configured to receive a second RF signal, wherein the pair of NMOS transistors and the second pair of NMOS transistors are configured to provide either the RF signal or the second RF signal as the mixer input signal.4. The mixer apparatus of claim 1 , wherein the first plurality of transistors includes a first current source ...

Frequency Control in a Frequency Shifting Repeater

Aspects of a method and system for frequency control in a frequency shifting repeater are provided. In this regard, a reference frequency may be divided to generate a first pair of local oscillator (LO) signals, the first pair of LO signals may be divided to generate a second pair of LO signals. The two pairs of LO signals may be utilized to frequency shift a received signal for repeating the signal on a different frequency. The frequency shifted signal may be generated by down-converting the received signal utilizing the first pair of LO signals, up-converting the down-converted signal utilizing the second pair of LO signals, and combining the resulting up-converted signals. The reference frequency may be divided by a first scaling factor to generate the first pair of LO signal which, in turn, may be divided by a second scaling factor to generate the second pair of LO signals.

DISCRETE TIME POLYPHASE MIXER

Embodiments of a radio frequency (RF) circuit provide translational filtering in accordance with an input impedance response that is an impedance image of a reactive circuit impedance response from a poly phase reactive circuit. The RF circuit may include a first mixer circuit that provides a first frequency offset for the impedance image and a second mixer circuit that provides an additional frequency offset. Accordingly, the second mixer circuit may allow for adjustments to a total frequency offset of the impedance image. The second mixer circuit may also be configured so that the impedance image rejects a negative frequency impedance response of the reactive circuit impedance response. 1. A radio frequency (RF) circuit comprising:a first mixer circuit configured to receive a first oscillation signal operating at approximately a first oscillation frequency and an input signal, wherein the first mixer circuit is configured to generate a first in-phase signal from the input signal with a frequency offset based on the first oscillation frequency and to generate a first quadrature phase signal from the input signal with a frequency offset based on the first oscillation frequency;a second mixer circuit operably associated with first mixer circuit and configured to receive a second oscillation signal operating at approximately a second oscillation frequency, wherein the second mixer circuit is configured to generate a second in-phase signal from the first in-phase signal and the first quadrature phase signal, such that the second in-phase signal has a frequency offset based on the second oscillation frequency, and to generate a second quadrature phase signal from the first in-phase signal and the first quadrature phase signal such that the second quadrature phase signal has a frequency offset based on the second oscillation frequency; anda poly phase reactive circuit comprising an in-phase channel having an in-phase impedance response, wherein the in-phase channel is ...

SINGLE-ENDED RECEIVER WITH A MULTI-PORT TRANSFORMER AND SHARED MIXER

A single-ended receiver is described. The single-ended receiver includes a multi-port transformer that outputs a differential signal. The multi-port transformer includes a first primary coil that is coupled to an output of a first low noise amplifier. The multi-port transformer also includes a second primary coil that is coupled to an output of a second low noise amplifier. The multi-port transformer further includes a first secondary coil. The single-ended receiver also includes a shared mixer that receives the differential signal from the multi-port transformer. 1. A single-ended receiver , comprising: a first primary coil that is coupled to an output of a first low noise amplifier;', 'a second primary coil that is coupled to an output of a second low noise amplifier; and', 'a first secondary coil; and, 'a multi-port transformer that outputs a differential signal, the multi-port transformer comprisinga shared mixer that receives the differential signal from the multi-port transformer.2. The single-ended receiver of claim 1 , wherein the multi-port transformer further comprises:a first coupling between the first primary coil and the second primary coil;a second coupling between the first primary coil and the first secondary coil; anda third coupling between the second primary coil and the first secondary coil.3. The single-ended receiver of claim 1 , wherein the first low noise amplifier receives a first input signal and wherein the second low noise amplifier receives a second input signal.4. The single-ended receiver of claim 3 , wherein the first input signal is active and the second input signal is inactive and wherein the multi-port transformer outputs the differential signal based on the first input signal.5. The single-ended receiver of claim 3 , wherein the first input signal is inactive and the second input signal is active and wherein the multi-port transformer outputs the differential signal based on the second input signal.6. The single-ended receiver of ...

RETURN-TYPE CURRENT-REUSE MIXER

A return-type current-reuse mixer having a transconductance/amplification stage, a mixing stage, and a high-pass and a low-pass filter network. The transconductance/amplification stage has a current-reuse CMOS topology wherein an input frequency signal is converted into a frequency current, low-frequency components are removed from the frequency current by the high-pass filter network, the frequency current is fed into the mixing stage, modulation occurs in the mixing stage, and then an intermediate-frequency signal is generated and output. Once high-frequency components are removed from the intermediate-frequency signal by the low-pass filter network, the intermediate-frequency signal is sent again for input into the transconductance/amplification stage, then amplified in the transconductance/amplification stage and output. The mixer transconductance/amplification stage employs a current-reuse technique. The input frequency and the output intermediate-frequency signal share a common transconductance/amplification stage. The mixer reduces power consumption, simplifies the circuit topology, and provides high conversion gain. 1. A return-type current reuse frequency mixer , comprising:a transconductance/amplifier stage and a mixer stage connected in sequence, wherein, the transconductance/amplifier stage amplifies input radio frequency signal, and the amplified radio frequency signal passes through the mixer stage to produce and output intermediate frequency signal; the intermediate frequency signal is fed back to the input terminal of the transconductance/amplifier stage again, and then serves as the final intermediate frequency signal output after being amplified by the transconductance/amplifier stage; anda high-pass filter network is serially connected between the transconductance/amplifier stage and the mixer stage, to block the intermediate frequency signal; a low-pass filter network is serially connected between the output terminal of the mixer stage and the ...

Radio-frequency Receiver Device of Wireless Communication System

A radio-frequency (RF) receiver device for a wireless communication system includes a first filter for filtering out a first RF signal within a first frequency band, a first frequency converter for using a first oscillating signal to convert the first RF signal of the first frequency band to generate a second RF signal, a second filter for filtering out a second RF signal within a second frequency band, a second frequency converter for using a second oscillating signal to convert the second RF signal of the second frequency band to generate a third RF signal, a third filter for filtering out a third RF signal within a third frequency band, and a controller for controlling the first frequency converter and the second frequency converter.

SIGNAL PROCESSOR AND SIGNAL PROCESSING METHOD

A signal processor includes: a plurality of frequency converters which perform frequency conversion of input signals to output converted signals; and an output section which combines the converted signals output from the plurality of frequency converters and outputs a composite signal, wherein the plurality of frequency converters are formed in a one-chip semiconductor chip, and the plurality of frequency converters perform frequency conversion into converted signals in different frequency bands. 1. A signal processor comprising:a plurality of frequency converters which perform frequency conversion of input signals to output converted signals; andan output section which combines the converted signals output from the plurality of frequency converters and outputs a composite signal,wherein the plurality of frequency converters are formed in a one-chip semiconductor chip, andthe plurality of frequency converters perform frequency conversion into converted signals in different frequency bands.2. The signal processor according to claim 1 ,wherein each of the frequency converters performs frequency conversion of a signal in a predetermined frequency band as the input signal and outputs a converted signal in a higher frequency band than the predetermined frequency band.3. The signal processor according to claim 2 ,wherein a combining section which combines the converted signals and outputs the composite signal is further formed in the semiconductor chip.4. The signal processor according to claim 3 ,wherein the combining section is a connection point which makes a connection between connection lines of outputs of the plurality of frequency converters.5. The signal processor according to claim 4 ,wherein each of the frequency converters has an amplifier which amplifies the converted signal, andthe amplifier has an inductance load at least at an output side of input and output sides.6. The signal processor according to claim 2 ,wherein a plurality of P/S converters which ...

Variable-gain mixer for a wireless receiver with current compensation

An embodiment of a variable-gain mixer for down-converting a modulated input signal into a modulated output signal in a wireless receiver is proposed. The mixer includes means for selecting a mixer gain according to a power level of the input signal, amplifying means for amplifying the input signal into a modulated intermediate current (IRF+,IRF−) in response to a control signal indicative of the selected mixer gain, the intermediate current having an intermediate component, consisting of a direct current, varying according to the selected mixer gain, means for generating the output signal from the intermediate current, the output signal having an output component, consisting of a direct current or voltage, depending on the intermediate component; in an embodiment, the mixer further includes means for setting a compensation current in response to the control signal for compensating the variation of the intermediate component, and means for adding the compensation current to the intermediate current.

FREQUENCY MIXING CIRCUIT AND METHOD FOR SUPPRESSING LOCAL OSCILLATION LEAKAGE IN FREQUENCY MIXING CIRCUIT

Embodiments of the present invention disclose a frequency mixing circuit and a method for suppressing local oscillation leakage in the frequency mixing circuit, where a mixed input signal and a local oscillation signal are involved, and local oscillation leakage can be effectively reduced by using a frequency mixing circuit whose structure is simpler and is easier to be implemented. The frequency mixing circuit includes a direct current bias circuit, where the direct current bias circuit includes a direct current bias voltage source used for reducing a local oscillation current. The frequency mixing circuit is mainly applied to frequency mixing, and especially to a case where an intermediate frequency signal is mixed with a local oscillation signal to output a radio frequency signal. 1. A frequency mixing circuit , comprising: a direct current bias circuit , wherein the direct current bias circuit comprises a direct current bias voltage source used for reducing a local oscillation current.3. The frequency mixing circuit according to claim 1 , wherein the frequency mixing circuit further comprises an intermediate frequency inputting port claim 1 , a local oscillation inputting port claim 1 , and a radio frequency outputting port; and the direct current bias circuit is disposed at the intermediate frequency inputting port side claim 1 , or the local oscillation inputting port side claim 1 , or the radio frequency outputting port side.4. The frequency mixing circuit according to claim 1 , wherein the frequency mixing circuit further comprises: a 90-degree bridge and an orthogonal frequency mixer claim 1 , wherein the orthogonal frequency mixer comprises a first frequency mixing unit circuit claim 1 , a second frequency mixing unit circuit claim 1 , and a combiner; andan input signal passes through the 90-degree bridge to generate a first input signal and a second input signal, wherein the first input signal and the second input signal are transferred to the first ...

MIXER CIRCUIT

A mixer circuit () for mixing a first input signal at a first frequency with a second input signal at a second frequency to an output signal at a third frequency. The mixer circuit () comprises a mixing stage () with differential input ports () for the first input signal and an input port () for the second input signal and differential output ports for the output signal, which also serve as output ports for the mixer circuit. The mixer circuit () comprises a nonlinear digital to analogue converter () which has an input port () which is the input port for the second input signal and an output port () which is connected to the input port of the mixing stage, and the digital to analogue converter has a nonlinear transfer function. 1. A mixer circuit for mixing a first input signal at a first frequency with a second input signal at a second frequency , wherein said first input signal and said second input signal comprise digital input data , to an output signal at a third frequency , the mixer circuit comprising:a mixing stage with differential input ports for the first input signal, an input port for the second input signal, and differential output ports for the output signal, wherein said differential output ports also serve as output ports for the mixer circuit; anda digital to analog converter including an input port, which is the input port for the second input signal, and an output port, which is connected to the input port of the mixing stage, wherein the digital to analog converter has a nonlinear transfer function which compensates for non-linearities in the mixing stage.2. The mixer circuit of claim 1 , wherein the digital to analogue converter comprises a first and a second group of pairs of serially coupled switches and current sources claim 1 , wherein the number of such pairs in the first group corresponds to the number of digital bits in the second input signal claim 1 , and wherein each switch in the first group is controlled by one of the digital bits ...

Frequency Translation Filter Apparatus and Method

A frequency translation filter is configured to receive a radio frequency (RF) signal comprising first and second non-contiguous carriers or non-contiguous frequency ranges. The frequency translation filter comprises a mixer configured to mix the RF signal received on a first input with a local oscillator (LO) signal received on a second input. A filter comprises a frequency dependent load impedance, the filter having band-pass characteristics which, when frequency translated using the mixer , contain first and second pass-bands corresponding to the first and second non-contiguous carriers or non-contiguous frequency ranges. The first and second pass-bands are centered about the local oscillator frequency. 115-. (canceled)16. A frequency translation filter for handling carrier aggregation in a radio receiver , the frequency translation filter receiving a radio frequency signal comprising first and second non-contiguous carriers or first and second non-contiguous frequency ranges , the frequency translation filter comprising:a mixer configured to mix the radio frequency signal received on a first input with a local oscillator signal received on a second input and having a local oscillator frequency; andwherein the mixer includes a filter comprising a frequency dependent load impedance and having band-pass characteristics which, when frequency translated by the mixer, provide simultaneous first and second pass-bands corresponding to the first and second non-contiguous carriers or non-contiguous frequency ranges, wherein the first and second pass-bands are located about the local oscillator frequency.17. The frequency translation filter as claimed in claim 16 , wherein the frequency dependent load impedance comprises a second frequency translation filter claim 16 , the second frequency translation filter using a second local oscillator frequency.18. The frequency translation filter as claimed in claim 17 , wherein the second frequency translation filter comprises a ...

Rotating Harmonic Rejection Mixer

In one embodiment, the present invention includes a mixer circuit to receive and generate a mixed signal from a radio frequency (RF) signal and a master clock signal, a switch stage coupled to an output of the mixer circuit to rotatingly switch the mixed signal to multiple gain stages coupled to the switch stage, and a combiner to combine an output of the gain stages. 1. An apparatus comprising:a low noise amplifier (LNA) to receive a radio frequency (RF) signal;a voltage controlled oscillator (VCO) to generate a VCO frequency;a frequency divider to divide the VCO frequency to obtain a master clock signal corresponding to a local oscillator (LO) multiplied by N/2, wherein N corresponds to a number of mixer loads;a master RF device coupled to the LNA to receive the RF signal and provide an RF current, the master RF device having at least one transconductor;a master LO device coupled to an output of the master RF device, the master LO device to receive the RF current and mix the RF current with the master clock signal to obtain a mixed signal;a rotating switch device coupled to the master LO device and including N rotating switches each to cyclically switch the mixed signal to one of a plurality of output ports of the rotating switch device;N mixer loads each coupled to one of the plurality of output ports, each of the N mixer loads to perform gaining and filtering of the mixed signal;a plurality of gain stages each coupled to one of the N mixer loads to weight the output of the corresponding mixer load and to provide an output to a summer; andthe summer to combine outputs of the plurality of gain stages.2. The apparatus of claim 1 , wherein a phase of a first set of outputs of the N mixer loads is determined by the master clock signal of a first polarity.3. The apparatus of claim 2 , wherein a phase of a second set of outputs of the N mixer loads is determined by the master clock signal of a second polarity.4. The apparatus of claim 1 , wherein the rotating switch ...

MIXER

A frequency converter, capable of obtaining resonance characteristics having a high Q factor and a high multiplication signal and having a narrow-band frequency selectivity function, is provided by the following configuration. A magnetoresistance effect element includes a pinned magnetization layer, a free magnetization layer, and a non-magnetic spacer layer disposed between the pinned magnetization layer and the free magnetization layer. In response to an input of a high frequency signal and a local signal, the magnetoresistance effect element generates a voltage signal (multiplication signal) by multiplying the signals by each other using a magnetoresistance effect. A magnetic field generated by a magnetic-field applying unit is applied to the free magnetization layer of the magnetoresistance effect element in a direction perpendicular to a film surface direction or by tilting an angle of the magnetic field from the film surface direction toward a direction perpendicular to the film surface direction. 1. A mixer comprising:a magnetoresistance effect element that includes a pinned magnetization layer, a free magnetization layer, and a non-magnetic spacer layer disposed between the pinned magnetization layer and the free magnetization layer, and that generates, in response to an input of a first high frequency signal and a second high frequency signal for a local signal, a multiplication signal by multiplying both the high frequency signals by each other using a magnetoresistance effect; anda magnetic-field applying unit that applies a magnetic field to the free magnetization layer,wherein the magnetic field generated by the magnetic-field applying unit is applied to a film surface of the free magnetization layer in a direction perpendicular to the film surface of the free magnetization layer so that a magnetization component in a direction perpendicular to the film surface will be provided to the free magnetization layer.2. The mixer according to claim 1 , wherein ...

MIXER CIRCUIT, SEMICONDUCTOR DEVICE, RECEIVING CIRCUIT, RECEIVING DEVICE, AND COMMUNICATION DEVICE

According to an embodiment, a mixer circuit includes first transistors each having a charge storage layer, a second transistor, a group of first nodes, and an output node. The first transistors as a pair receive a differential signal having a first frequency. The second transistor receives a signal having a second frequency. The group of first nodes makes the charge storage layer of at least any one of the first transistors store charge during non-operation period during which the differential signal having the first frequency and the signal having the second frequency are not mixed and reduces loss of the charge during operation period during which those signals are mixed, to adjust a threshold voltage of at least any one of the first transistors from outside. The output node outputs a signal resulting from mixing the differential signal having the first frequency and the signal having the second frequency. 1. A mixer circuit comprising:a plurality of first transistors that is used in a pair and receives a differential signal having a first frequency, the first transistors each having a charge storage layer;a second transistor that receives a signal having a second frequency;a group of first nodes that makes the charge storage layer of at least any one of the first transistors store charge during non-operation period during which the differential signal having the first frequency and the signal having the second frequency are not mixed and reduces loss of the charge during operation period during which the differential signal having the first frequency and the signal having the second frequency are mixed, so as to adjust a threshold voltage of at least any one of the first transistors from outside; andan output node that outputs a signal resulting from mixing the differential signal having the first frequency and the signal having the second frequency.2. The mixer circuit according to claim 1 , further comprising:a plurality of third transistors that lowers power ...

FREQUENCY CONVERTER

A frequency converter includes: a plurality of mixers each including a magnetoresistance effect device including a fixed magnetic layer, a free magnetic layer, and a nonmagnetic spacer layer sandwiched between the fixed magnetic layer and the free magnetic layer, when receiving a first high-frequency signal and a local second high-frequency signal, the magnetoresistance effect device multiplying the first high-frequency signal and the local second high-frequency signal by a magnetoresistance effect to generate a multiplication signal, and a magnetic field applying unit that applies a magnetic field to the free magnetic layer. A plurality of multiplication signals generated when the first high-frequency signal and the local second high-frequency signals that differ from one mixer to another are input to the mixers, are added together and are output. 1. A frequency converter comprising: a magnetoresistance effect device including a fixed magnetic layer, a free magnetic layer, and a nonmagnetic spacer layer sandwiched between the fixed magnetic layer and the free magnetic layer, when receiving a first high-frequency signal and a local second high-frequency signal, the magnetoresistance effect device multiplying the first high-frequency signal and the local second high-frequency signal by a magnetoresistance effect to generate a multiplication signal, and', 'a magnetic field applying unit that applies a magnetic field to the free magnetic layer, wherein, 'a plurality of mixers each including'}a plurality of multiplication signals generated when the first high-frequency signal and the local second high-frequency signals that differ from one mixer to another are input to the mixers, are added together and are output.2. The frequency converter of claim 1 , wherein{'b': '2', 'the local second high-frequency signals that differ from one mixer to another are set to have frequencies near a frequency f defined for a local signal.'}3. The frequency converter of claim 2 , wherein ...

Mixer and associated signal circuit

A mixer for providing a mixed signal by mixing an input signal and an oscillation signal, comprising a follower and a switch. The follower is arranged to conduct a driving contribution from a bias terminal to an output terminal following a signal at an input terminal, wherein the input terminal and the bias terminal are respectively coupled to the input signal and the oscillation signal, and the output terminal is arranged to output the mixed signal. The switch is arranged to selectively conduct the output terminal to a reference level in response to alternating of the oscillation signal. An associated signal circuit is also disclosed.

SIGNAL MIXING CIRCUIT AND ASSOCIATED CONVERTER

A signal mixing circuit which mixes input signal(s) and oscillation signal(s) by mixer block(s) to provide a mixed signal. Each mixer block includes a summing node and a circuit unit; the summing node is arranged to provide a sum signal by summing an input signal and an oscillation signal, and the circuit unit is arranged to alternate between a first state and a second state in response to alternating of the oscillation signal; wherein the circuit unit is arranged to provide driving contribution to the mixed signal in response to the sum signal during the first state, and to stop providing driving contribution during the second state. An associated converter, e.g., a digital-to-analog converter, is also disclosed. 1. A signal mixing circuit comprising: a summing node for providing a sum signal by summing the associated input signal and the associated oscillation signal; and', 'a circuit unit for alternating between a first state and a second state in response to the associated oscillation signal, wherein the circuit unit is arranged to provide driving contribution to the mixed signal in response to the sum signal during the first state, and to stop providing driving contribution during the second state., 'a mixer module for receiving a first number of input signals and a second number of oscillation signals, and providing a mixed signal in response; the mixer module comprising a third number of mixer blocks, each of the mixer blocks coupled to an associated one of the first number of input signals and an associated one of the second number of oscillation signals, and each of the mixer blocks comprising2. The signal mixing circuit of claim 1 , wherein the summing node sums the associated oscillation signal and the associated input signal by arranging the associated input signal to ride on the associated oscillation signal.3. The signal mixing circuit of claim 1 , wherein each the mixer block further comprises:a capacitor coupled between the associated oscillation ...

MIXER WITH CALIBRATION CIRCUIT AND CALIBRATION METHOD THEREOF

A mixer with calibration circuit includes a first gm stage unit, a second gm stage unit, a first detecting unit, a second detecting unit, a comparison block, a control unit and a compensator. The first detecting unit and the second detecting unit are respectively connected to different gm stage unit, and the comparison block compares voltage signals of the first detecting unit and the second detecting unit. The control unit adjusts a current signal of the comparison block according to the comparative result of voltage signals of the first detecting unit and the second detecting unit. Further, the compensator adjusts the first gm stage unit and the second gm stage unit according to the current signal. Thereafter, the improvement of the LO leakage of the mixer can be achieved. 1. A mixer with calibration circuit , comprising:a gm stage block comprising a first gm stage unit and a second gm stage unit;a detector comprising a first detecting unit adapted to connect to said first gm stage unit or said second gm stage unit, and a second detecting unit adapted to connect to said first gm stage unit or said second gm stage unit, wherein said first detecting unit and said second detecting unit are respectively connected to different gm stage unit;a comparison block connected to said detector and said gm stage block adapted to compare voltage signals of said first detecting unit and said second detecting unit;a control unit connected to said comparison block adapted to adjust a current signal of said comparison block according to the comparative result of voltage signals of said first detecting unit and said second detecting unit, and generate a compensation signal according to said current signal; anda compensator connected with said control unit, said first gm stage unit and said second gm stage unit adapted to adjust said first gm stage unit and said second gm stage unit according to said compensation signal.2. The mixer as claimed in claim 1 , further comprising a first ...

Wideband double balanced image reject mixer

A double balanced image reject mixer (IRM) can be configured to comprise: a common radio frequency (RF) port; four mixer devices, each comprising an intermediate frequency (IF) port, an RF port and an local oscillator (LO) port; and a four-way, in-phase splitter/combiner. The four-way, in-phase splitter/combiner can be connected between the RF common port and the RF port of each of the four mixer devices. A method of performing spurious suppression and image reject mixing in a double balanced IRM, can comprise: directly in-phase combining radio frequency (RF) output signals of four mixer devices located in the double balanced IRM; and phase pairing local oscillator (LO) signals and intermediate frequency (IF) signals such that the combination of the phases of the respective IF and LO signals can result in substantially equal phase RF signals at the RF ports of all four mixer devices.

MIXER FABRICATION TECHNIQUE AND SYSTEM USING THE SAME

An improved microwave mixer manufactured using multilayer processing includes an integrated circuit that is electrically connected to a top metal layer of a substrate. The microwave mixer includes: a first metal layer; a dielectric substrate on the first metal layer; a second metal layer directly on the substrate, at least two passive circuits arranged on the second metal layer and a top layer metal; a thin dielectric layer on the second metal layer, wherein the top layer metal is directly on the thin dielectric layer; an integrated circuit (IC) attached to the second metal layer, wherein the IC includes at least one combination of non-linear devices, and wherein the IC is directly connected to the passive circuits on the second metal layer; and a protection layer on the IC. 1. A multilayer fabrication method for a microwave mixer , comprising:sequentially forming a first metal layer, a substrate, and a second metal layer;patterning the substrate and first and second metal layers to form at least one interconnect that electrically contacts the first and second metal layers;patterning at least two passive circuits on the second metal layer of the substrate;patterning the second metal layer of the substrate to expose one or more portions of the substrate;forming a thin dielectric layer on the patterned second metal layer of the substrate, wherein the thin dielectric layer directly contacts the second metal layer and the exposed portion of the substrate;processing the thin dielectric layer to form dielectric vias;forming a top layer metal directly on the thin dielectric layer, wherein the top layer metal is connected to the first and second metal layers of the substrate by the dielectric vias formed in the thin dielectric layer;patterning the top layer metal and a portion of the thin dielectric layer to form the top layer metal of the passive circuits and to expose the substrate;attaching an integrated circuit (IC) to the second metal layer of the substrate, wherein ...

Radio frequency signal synthesizer circuit and Method for generating a radio frequency signal

A radio frequency signal synthesizer circuit includes a digital to analog converter configured to generate an analog output signal for each clock cycle of a clock signal to provide the radio frequency signal and a controlled oscillator to generate the clock signal. The controlled oscillator is configured to vary a cycle time of the clock signal for a radio frequency signal in a first frequency range in a first operation mode or to maintain a constant cycle time for a radio frequency signal in a second frequency range in a second operation mode, the second frequency range being different than the first frequency range. 1. A radio frequency signal synthesizer circuit , comprising:a digital to analog converter configured to generate an analog output signal for each clock cycle of a clock signal to provide the radio frequency signal; anda controlled oscillator to generate the clock signal, the controlled oscillator configured to vary a cycle time of the clock signal for a radio frequency signal in a first frequency range in a first operation mode or to maintain a constant cycle time for a radio frequency signal in a second frequency range in a second operation mode, the second frequency range being different than the first frequency range.2. The radio frequency signal synthesizer circuit of claim 1 , wherein the second frequency range is lower than the first frequency range3. The radio frequency signal synthesizer circuit of claim 1 , wherein the digital to analog converter is configured to output a single amplitude value for a full cycle of the radio frequency signal at a time instant given by the clock cycle of the clock signal.4. The radio frequency signal synthesizer circuit of claim 1 , wherein the digital to analog converter is configured to output one of multiple samples of a full cycle of the radio frequency signal at a time instant given by the clock cycle of the clock signal.5. The radio frequency signal synthesizer circuit of claim 1 , wherein the controlled ...

Method for controlling power grid frequency of multiple energy storage systems, and system therefor

The present invention relates to a power management system (PMS) for multiple energy storage systems (ESS) that is for integrated management of the system having multiple ESS for controlling a frequency and having a hierarchical control structure. The PMS for ESS comprises: a plurality of ESS; a local management system (LMS) for managing one or more ESS of the plurality of ESS for each local unit; an ESS Controller (ESSC) for general management of the LMS, judging a state of the LMS and determining an output value of one or more ESS in the LMS, and transmitting the determined output value to the respective ESS; and a PMS for general management of the entire system comprising the plurality of ESS, the LMS and the ESSC, judging the state of the entire system and participating in a power grid frequency control market through a grid operator contract, controlling the output of the LMS, and adjusting a control parameter for output control.

ELECTRONIC MIXER

A mixer comprises a substrate of a first conductivity type; at least one minority carrier injector for injecting minority carriers in the substrate in reply to a first electrical signal applied to the at least one minority carrier injector; at least two substrate taps located in the substrate for providing a majority carrier current density with associated electric field in the substrate in reply to a second electrical signal applied to the at least two substrate taps. The majority carrier current density's associated electric field determines the drift direction of the injected minority carriers. The mixer further comprises at least two minority carrier collectors located in the substrate, for collecting minority carriers from the substrate. Each minority carrier collector is located adjacent to one of the at least two substrate taps. A minority carrier collector destination is determined by the drift direction of the injected minority carriers, and current outputted by the minority carrier collectors based on the number of minority carriers collected at the collector destination, form an output signal of the mixer. 111.-. (canceled)12. A mixer comprising:a substrate of a first conductivity type,at least one minority carrier injector for injecting minority carriers in the substrate in reply to a first electrical signal applied to the at least one minority carrier injector;at least two substrate taps located in the substrate for providing a majority carrier current density with associated electric field in the substrate in reply to a second signal applied to the at least two substrate taps, the majority carrier current density's associated electric field determining the drift direction of the injected minority carriers;at least two minority carrier collectors located in the substrate for collecting minority carriers from the substrate, each minority carrier collector being located close to one of the at least two substrate taps, wherein, in use, a minority carrier ...

AGILE NAVIGATION TRANSMITTER SYSTEM THAT INCLUDES A SINGLE AMPLIFIER SYSTEM

A method and transmission system for amplifying and providing navigation signals. The system comprises a splitter circuit configured to receive a plurality of radio frequency (RF) signals oscillating at at least two different frequencies fand f. The splitter circuit is further configured to split and forward the RF signals having the ffrequency to a first bandpass filter and the RF signals having the ffrequency to a second bandpass filter. The system further comprises a first tunable amplifier configured to receive the RF signals from the first bandpass filter. The system further comprises a second tunable amplifier configured to receive the RF signals from the second bandpass filter at substantially the same time as the first tunable amplifier's receipt of the RF signals from the first bandpass filter. The first tunable amplifier is further configured to amplify its RF signals across a first band centered around the frequency f. The second tunable amplifier is further configured to amplify its RF signals across a second band centered around the frequency f. The amplified RF signals are fed substantially concurrently into a mixer circuit for transmission via an RF antenna to a navigation receiver. 1. A transmission system for providing navigation signals , the system comprising:{'sub': 1', '2', '1', '2, 'a splitter circuit configured to receive a plurality of radio frequency (RF) signals oscillating at at least two different frequencies fand f, and configured to split and forward the RF signals having the ffrequency to a first bandpass filter and the RF signals having the ffrequency to a second bandpass filter;'}a first tunable amplifier configured to receive the RF signals from the first bandpass filter; anda second tunable amplifier configured to receive the RF signals from the second bandpass filter at substantially the same time as the first tunable amplifier's receipt of the RF signals from the first bandpass filter,{'sub': 1', '2, 'wherein the first tunable ...

USING COMMON MODE LOCAL OSCILLATOR TERMINATION IN SINGLE-ENDED COMMUTATING CIRCUITS FOR CONVERSION GAIN IMPROVEMENT

A commutating circuit includes a single-ended mixer and a passive network. The single-ended mixer includes a differential local oscillator terminal. The passive network includes a plurality of inductors and a capacitor. The plurality of inductors can be coupled to the differential local oscillator terminal. The plurality of inductors can provide an impedance in accordance with a common mode or a differential mode. The commutating circuit can be implemented via a device, a system and/or a method. 1. A commutating circuit , comprising:a single-ended mixer comprising a differential local oscillator terminal; anda passive network comprising a plurality of inductors and a capacitor;wherein the plurality of inductors is coupled to the differential local oscillator terminal and provides an impedance in accordance with a common mode or a differential mode.2. The commutating circuit of claim 1 , wherein the plurality of inductors include first and second inductors.3. The commutating circuit of claim 2 , wherein the passive network is formed with a first terminal of the capacitor coupled to each of the plurality of inductors and a second end of the capacitor coupled to a signal ground.4. The commutating circuit of claim 1 , wherein the capacitor comprises a shunt capacitor.5. The commutating circuit of claim 1 , wherein the passive network comprises a reactive passive network.6. The commutating circuit of claim 1 , wherein the passive network is included in a matching network of the commutating circuit for a differential local oscillator input signal.7. The commutating circuit of claim 6 , wherein the passive network provides the impedance through series resonance for the common mode.8. The commutating circuit of claim 1 , wherein the single-ended mixer comprises a binary phase-shift keying modulator.9. The commutating circuit of claim 1 , wherein the single-ended mixer comprises a quadrature phase-shift keying modulator.10. The commutating circuit of claim 1 , wherein the ...

LOW NOISE BLOCK CONVERTER INTEGRATED CIRCUIT

The disclosure provided a low noise block converter for converting RF signal received from a satellite into IF signal, where the image rejection of the RF signal is performed in two stages through a low noise amplifier (LNA) integrated circuit (IC). The disclosure reduced the number of discrete components by integrating electronic components onto one integrated circuit (or chip), and at the same, improves the noise figure of the LNB converter. The LNB IC comprises LNA circuits, RF path selector, and signal downconverter, where the image rejection is performed by a combination of the LNA circuits and the signal downconverter. 1. A low noise block (LNB) integrated circuit (IC) in an integrated chip , comprising:a first pin and a second pin, receiving first and second polarization signals respectively;a first low noise amplification (LNA) circuit, coupled to the first pin for receiving the first polarization signal from an antenna, partially removing image signal from the first polarization signal, and generating a first amplified and filtered polarization signal;a second low noise amplification circuit, coupled to the second pin for receiving the second polarization signal from the antenna, partially removing image signal from the second polarization signal, and generating a second amplified and filtered polarization signal;a RF path selector, coupled to the first and second amplification circuits, and directing the path of the first and second amplified and filtered polarization signals; anda signal downconverter, coupled between the RF path selector and a first output pin.2. The LNB IC of claim 1 , wherein each of the first and second low noise amplification circuits comprises a low noise amplifier and an image rejection filter claim 1 , wherein the image rejection filter is configured to partially remove the image signal from the received first and second polarization signals.310. The LNB IC () of claim 2 , wherein the low noise amplifier is a two-stage low noise ...

METHOD AND APPARATUS TO DETECT LO LEAKAGE AND IMAGE REJECTION USING A SINGLE TRANSISTOR

Local oscillator (LO) leakage and Image are common and undesirable effects in typical transmitters. Typically, fairly complex hardware and algorithms are used to calibrate and reduce these impairments. A single transistor that draws essentially no dc current and occupies a very small area detects the LO leakage and Image signals. The single transistor operating as a square-law device is used to mix the signals at the input and output ports of a power amplifier. The mixed signal generated by the single transistor enables the simultaneous calibration of the LO leakage and Image Rejection. 126-. (canceled)27. An apparatus configured to mix a first signal with a second signal , comprising:a series signal path;a first node and a second node coupled within said series signal path;a gate of a transistor connected to said first node;a source of said transistor connected to said second node; anda drain of said transistor coupled to a resultant node, wherein said transistor mixes said first signal at said first node with said second signal at said second node to generate a mixed signal between said first signal and said second signal at said resultant node.28. The apparatus of claim 27 , wherein the first node and the second node are separate nodes.29. The apparatus of claim 27 , wherein the first node is an input node of a circuit element in the series signal path claim 27 , and the second node is an output node of the circuit element.30. The apparatus of claim 27 , wherein the first node is an output node of a circuit element in the series signal path claim 27 , and the second node is an input node of the circuit element.31. The apparatus of claim 27 , further comprising:a circuit element in said series signal path;a first spectra comprising a first homodyne signal, a first local oscillator (LO) leakage signal, and a first image rejection signal applied to said first node; anda version of said first spectra comprising a second homodyne signal, a second LO leakage signal, ...

PHASE ROTATOR CALIBRATION APPARATUS AND METHOD THEREFOR

A phase rotator calibration system is provided. The phase rotator calibration system includes a phase rotator portion having input for receiving an input signal and an output for providing an output signal. A calibration portion is coupled to the phase rotator portion. The calibration portion is configured to determine a phase error based on a phase estimation. The phase estimation is generated by way of an arccosine function. 1. A circuit comprising:a phase rotator portion having input for receiving an input signal and an output for providing an output signal; anda calibration portion coupled to the phase rotator portion, the calibration portion configured to determine a phase error based on a phase estimation, the phase estimation generated by way of an arccosine function.2. The circuit of claim 1 , wherein the calibration portion comprises:an arccosine circuit block configured to generate the phase estimation based on a digital signal corresponding to the output signal.3. The circuit of claim 1 , wherein the calibration portion is further configured to determine the phase error as a difference between the generated phase estimation and the input signal.4. The circuit of claim 1 , further comprising:a storage unit coupled to the phase rotator portion, the storage unit configured to store a phase error value representative of the phase error.5. The circuit of claim 4 , wherein the phase rotator portion is configured to pre-distort the input signal based on the stored phase error value and generate an adjusted output signal at the output based on the pre-distorted input signal.6. The circuit of claim 4 , wherein the phase rotator portion further comprises:a mixer having a first input coupled to the input of the phase rotator portion and a second input coupled to the storage unit and to the calibration portion, the mixer configured to receive the input signal at the first input and the phase error at the second input and provide a summed signal at an output signal.7. ...

POWER FACTOR CORRECTION CIRCUIT, MULTIPLIER AND VOLTAGE FEED-FORWARD CIRCUIT

A voltage feed-forward circuit, a multiplier using the voltage feed-forward circuit, and a power factor correction circuit using the multiplier. The voltage feed-forward circuit is used to maintain and output a peak voltage (Vff) of an input voltage (Vin), and includes first switch element (S), a logic control unit (U), a second switch element (S), a first capacitor (C), a third switch element (S) and a second capacitor (C). The first control signal (Φ) and the second control signal (Φ) begin to be provided at the same time, and the first control signal (Φ) stops being provided when a voltage of the second end of the first capacitor (C) is greater than the peak voltage (Vff) of the input voltage (Vin). 1. A voltage feed-forward circuit applied to a multiplier for maintaining and outputting a peak voltage of an input voltage , comprising:a first switch element, a first end thereof connected to a supply voltage, and a control end thereof causing said first switch element to conduct in response to a first control signal;a logic control unit used to output a second control signal during the peak voltage of said input voltage and output a third control signal during a non-peak voltage of said input voltage;a first capacitor, a first end thereof grounded;a second switch element, a first end thereof connected to a second end of said first switch element, a second end thereof connected to a second end of said first capacitor, and a control end thereof causing said second switch element to conduct in response to said second control signal;a third switch element, a first end thereof connected to the second end of said first capacitor, and a control end thereof causing said third switch element to conduct in response to said third control signal;a second capacitor, a first end thereof grounded, and a second end thereof connected to a second end of said third switch element and outputting the peak voltage of said input voltage maintained by the second end of said second ...

Methods and Systems for Down-Converting a Signal Using a Complementary Transistor Structure

Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal is described herein. Briefly stated, such methods, systems, and apparatuses operate by receiving an EM signal and an aliasing signal having an aliasing rate. The EM signal is aliased according to the aliasing signal to down-convert the EM signal. The term aliasing, as used herein, refers to both down-converting an EM signal by under-sampling the EM signal at an aliasing rate, and down-converting an EM signal by transferring energy from the EM signal at the aliasing rate. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a demodulated baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal. 1. (canceled)2. A method for down-converting a carrier signal to a baseband signal , the method comprising:receiving the carrier signal, the carrier signaled modulated by at least one of an amplitude variation, a phase variation or a combination thereof;controlling a switching device with a control signal comprised of a plurality of aperture periods, the carrier signal input to the switching device and the control signal controlling the switching device so that the switching device is opened and closed at an aliasing rate based on the plurality of aperture periods;sampling energy in the modulated carrier signal by generating a plurality of energy samples obtained by transferring a portion of energy from the modulated carrier signal to a storage capacitor each time the switching device is closed by the control signal;discharging at the storage capacitor, when the switching device is open, some but not all of the energy transferred to the storage capacitor, a remaining portion of the energy that is not ...

BEAM FORMING DEVICE AND BEAM FORMING METHOD

A beam forming device includes a plurality of control circuits and a plurality of antenna elements. Each of the plurality of control circuits controls at least either phases or amplitudes of a plurality of input signals to generate a transmission signal. Each of the plurality of antenna elements outputs the transmission signal generated by a corresponding control circuit. A frequency range of the transmission signal generated by each of the control circuits is higher than frequency ranges of the input signals. 1. A beam forming device comprising:a plurality of control circuits that each control at least either phases or amplitudes of a plurality of input signals to generate a transmission signal; anda plurality of antenna elements that each output the transmission signal generated by a corresponding control circuit, whereina frequency range of the transmission signal generated by each of the control circuits is higher than frequency ranges of the input signals.2. The beam forming device according to claim 1 , wherein a plurality of mixers that each up-convert each of the plurality of input signals, and', 'a plurality of phase shifters that each control a phase of an output signal of each of the plurality of mixers, and, 'each of the control circuits includes'}each of the control circuits generates the transmission signal by combining output signals of the plurality of phase shifters.3. The beam forming device according to claim 1 , wherein a plurality of phase shifters that each control each of the phases of the plurality of input signals, and', 'a plurality of mixers that each up-convert each of output signals of the plurality of phase shifters, and, 'each of the control circuits includes'}each of the control circuits generates the transmission signal by combining output signals of the plurality of mixers.4. The beam forming device according to claim 1 , wherein a plurality of mixers that multiply the plurality of input signals by an oscillation signal, and', 'a ...

Harmonic Reject Receiver Architecture and Mixer

Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

System and Method for Reconfigurable Phase Shifter and Mixer

An analog circuit for generating a periodic signal at a selected phase, including one or more phase interpolators that receive orthogonal differential RF signals and a pair of differential gain signals. The differential in-phase RF signal is applied at respective gates of tail transistors, and a first differential gain signal is applied across gates of a transistor pair coupled to each of the tail transistors. The quadrature-phase RF signal and a second differential gain signal is similarly applied to another quad of transistors (i.e., pair of transistor pairs) and associated tail transistors. A load connected to the one transistor in each pair receives the output signal, at a phase corresponding to a ratio of the first and second gain signals. The gain signals may be DC or AC, which allows configuration of the circuit as a phase shifter or an upconversion mixer, and the load may be presented by a transform in which the phase also depends on the relative coupling from the in-phase and quadrature-phase sides of the phase interpolator.

MULTI-MIXER SYSTEM AND ASSOCIATED RECEIVER AND SIGNAL PROCESSING METHOD

A multi-mixer system comprising a plurality of mixers and a filter module is provided. Each of the mixers is selectively enabled to mix an input signal with a corresponding oscillation signal to generate an output signal at an output node; and the filter module provides different frequency responses for the output signals from at least two of the output nodes of the mixers, wherein the at least two of the output nodes of the mixers are connected to different internal nodes of the filter module. 1. A multi-mixer system , comprising:a plurality of mixers, wherein each of the mixers is selectively enabled to mix an input signal with a corresponding oscillation signal to generate an output signal at an output node;a filter module, for providing different frequency responses for the output signals from at least two of the output nodes of the mixers, wherein the at least two of the output nodes of the mixers are connected to different internal nodes of the filter module.2. The multi-mixer system of claim 1 , wherein the filter module comprises an N-order filter.3. The multi-mixer system of claim 1 , wherein the filter module comprises a plurality of filters connected in cascade claim 1 , and the at least two of the output nodes of the mixers are connected to input nodes of two of the filters claim 1 , respectively.4. The multi-mixer system of claim 3 , wherein at least a portion of the filters are resistor-capacitor (RC) filters.5. The multi-mixer system of claim 3 , wherein at least a portion of the filters are tunable filters.6. The multi-mixer system of claim 3 , wherein the filters are low-pass filters claim 3 , band-pass filters claim 3 , or high-pass filters claim 3 , or their combination.7. The multi-mixer system of claim 1 , wherein the mixers comprises a first group and a second group claim 1 , the first group comprises at least one of the mixers whose output node is connected to one internal node of the filter module claim 1 , and the second group comprises two ...

METHOD OF CALIBRATING A MEASUREMENT AND ANALYZING DEVICE AS WELL AS METHOD OF MEASURING A FREQUENCY-CONVERTING DEVICE UNDER TEST

A method of calibrating a measurement and analyzing device for measuring a frequency-converting device under test, comprises the steps of connecting a first port of the measurement and analyzing device with a radio frequency port assigned to the frequency-converting device under test as well as connecting a second port of the measurement and analyzing device with an intermediate frequency port assigned to the frequency-converting device under test. Further, a scalar-mixer calibration is performed at the radio frequency port and the intermediate frequency port, thus providing a precise calibration conversion amplitude. A relative calibration is performed between the radio frequency port and the intermediate frequency port by using a calibration mixer. At least one correction coefficient is determined by the difference between the results obtained from the scalar-mixer calibration and the relative calibration. The at least one correction coefficient is used to correct an error term applied. 1. A method of calibrating a measurement and analyzing device for measuring a frequency-converting device under test , comprising:connecting a first port of the measurement and analyzing device with a radio frequency port assigned to the frequency-converting device under test;connecting a second port of the measurement and analyzing device with an intermediate frequency port assigned to the frequency-converting device under test;performing a scalar-mixer calibration at the radio frequency port and the intermediate frequency port, thus providing a precise calibration conversion amplitude;performing a relative calibration between the radio frequency port and the intermediate frequency port by using a calibration mixer;determining at least one correction coefficient by the difference between the results obtained from the scalar-mixer calibration and the relative calibration; andusing the at least one correction coefficient to correct an error term applied.2. The method according to ...

SIGNAL PROCESSING APPARATUS AND METHOD

The present technology relates to a signal processing apparatus and method capable of increasing a harmonic rejection ratio while suppressing an increase in power consumption. 1. A signal processing apparatus , comprisinga mixing section that has a differential configuration, mixes two local signals with each signal of a differential signal, and calculates a difference between results of the mixing of the two local signals, the two local signals having a 1/3 duty ratio and phases mutually shifted by a 1/2 period.2. The signal processing apparatus according to claim 1 , further comprisinga resonance section that resonates with the differential signal, with which the local signals are mixed by the mixing section, at a predetermined resonant frequency.3. The signal processing apparatus according to claim 2 , whereinthe resonance section resonates at a sixfold frequency of a frequency of the local signals.4. The signal processing apparatus according to claim 2 , whereinthe resonance section includes a parallel LC circuit.5. The signal processing apparatus according to claim 2 , whereinthe resonant frequency is variable.6. The signal processing apparatus according to claim 2 , further comprisinga voltage/current conversion section that converts a voltage into a current with respect to the differential signal, whereinthe mixing section mixes the local signals with the differential signal output from the voltage/current conversion section.7. The signal processing apparatus according to claim 6 , further comprisinga capacitor between an output of the voltage/current conversion section and a ground potential.8. The signal processing apparatus according to claim 1 , further comprisinga differential amplification section that amplifies the differential signal, with which the local signals are mixed by the mixing section.9. The signal processing apparatus according to claim 1 , whereinthe mixing section includes a path of an I channel and a path of a Q channel and mixes the ...

MIXER WITH SERIES CONNECTED ACTIVE DEVICES

A unit cell for a resistive mixer includes a plurality of active devices arranged in series, wherein each of said plurality of active devices having a different output conductance. A resistive mixer includes a plurality of active devices connected in series with one another to form a unit cell. 1. A mixer , comprising:four cells wherein each cell has a drain terminal, a source terminal and a gate terminal;wherein the source terminals of the first and second cells are connected at a first RF input terminal;wherein the source terminals of the third and fourth cells are connected at a second RF input terminal;wherein the drain terminals of the first and third cells are connected at a first IF terminal;wherein the drain terminals of the second and fourth cells are connected at a second IF terminal;wherein the gate terminals of the first and fourth cells are connected at a first LO terminal;wherein the gate terminals of the second and third cells are connected at a second LO terminal;wherein each cell comprises first and second series connected devices;wherein a ratio of a gate width of the first series connected device to a gate width of the second series connected device in each cell is between one to one and one to four.2. The mixer of claim 1 , wherein the first device and the second device is a field effect transistor.3. The mixer of claim 1 , wherein the first device is connected to the source terminal of the cell and the second device is connected to the drain terminal of the cell.4. The mixer of claim 1 , wherein the first device and the second device is a high electron mobility transistor (HEMT).5. The mixer of claim 4 , wherein a first active device source is connected to a first frequency source and a second device drain is connected to a second frequency source.6. The mixer of claim 4 , wherein gates of the plurality of active devices are connected to a local oscillator to have common DC gate bias voltage.7. The mixer of claim 8 , wherein half of the gates of ...

MIXERS WITH IMPROVED LINEARITY

Systems and methods are disclosed for improved linearity performance of a mixer. An example mixer includes switching circuit elements configured to be switched on and switched off based at least partly on a local oscillator signal and capacitors including a respective capacitor in parallel with each of the switching elements. The mixer is configured to mix the input signal with the local oscillator signal to thereby frequency shift the input signal. 1. A mixer for mixing an input signal with a local oscillator signal , the mixer comprising:switching circuit elements configured to be switched on and switched off based at least partly on the local oscillator signal; andcapacitors comprising a respective capacitor in parallel with a current path of each of the switching elements, wherein the capacitors provide leakage current in the current path during a zero cross transition time of the local oscillator signal cause linearity of the mixer to be improved;wherein the mixer is configured to mix the input signal with the local oscillator signal to thereby frequency shift the input signal.2. The mixer of claim 1 , wherein the switching circuit elements are diodes.3. The mixer of claim 2 , wherein the mixer is a double balanced diode mixer.4. The mixer of claim 1 , wherein the switching circuit elements are field effect transistors.5. The mixer of claim 4 , wherein a respective gate is electrically connected to a respective drain of each field effect transistor of the field effect transistors.6. The mixer of claim 1 , further comprising resistors arranged such that each of the switching elements is in parallel with a series circuit claim 1 , the series circuit comprising a capacitor of the capacitors in series with a resistor of the resistors.7. The mixer of claim 1 , wherein the mixer is a passive mixer.8. The mixer of claim 1 , further comprising an input balun coupled to at least one of the switching circuit elements.9. The mixer of claim 8 , further comprising an ...

Systems and methods for asynchronous re-modulation with adaptive i/q adjustment

Various embodiments provide for systems and methods for signal conversion of one modulated signal to another modulated signal using demodulation and then re-modulation. According to some embodiments, a signal receiving system may comprise an I/Q demodulator that demodulates a first modulated signal to an in-phase (“I”) signal and a quadrature (“Q”) signal, an I/Q signal adjustor that adaptively adjusts the Q signal to increase the signal-to-noise ratio (SNR) of a transitory signal that is based on a second modulated signal, and an I/Q modulator that modulates the I signal and the adjusted Q signal to the second modulated signal. To increase the SNR, the Q signal may be adjusted based on a calculated error determined for the transitory signal during demodulation by a demodulator downstream from the I/Q modulator.

SWITCHING SYSTEM WITH LINEARIZING CIRCUIT

A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch. 1. (canceled)2. A switching system , comprising:a switch including one or more transistors and a control terminal; anda linearizing circuit including a reference resistance, a replica switching element circuit having one or more transistors, and a switch control output electrically coupled to the control terminal of the switch, the linearizing circuit providing a replica control signal to the replica switching element circuit to control the replica switching element circuit to maintain a voltage drop across the replica switching element circuit at a level that corresponds to a voltage drop across the reference resistance, the switch control output responsive to the replica control signal thereby promoting linearization of operation of the switch.3. The switching system of wherein the switch includes only nMOS transistors and does not include any pMOS transistors.4. The switching system of wherein the replica switching element circuit includes only nMOS transistors and does not include any pMOS transistors.5. The switching system of wherein the switch control output provides a level shifted version of the replica control signal to the control terminal of the switch.6. The switching system of claim 2 , wherein the linearizing circuit further includes an operational amplifier configured to provide the replica control signal.7. The switching system of wherein a first input of the operational amplifier is coupled to a first terminal the replica switching element circuit claim 6 , a second input of the operational amplifier is coupled to a first terminal of the reference resistance claim 6 , and an output of the operational amplifier is configured to provide the replica control signal.8. The switching system of wherein the switch is configured to switch in ...

A SUB-HARMONIC MIXER AND A METHOD THEREIN FOR CONVERTING RADIO FREQUENCY SIGNALS TO INTERMEDIATE FREQUENCY SIGNALS

A sub-harmonic mixer two or more cascaded stages for converting a Radio Frequency signal to an Intermediate Frequency signal. Each stage comprises a common-emitter transistor or a common-source transistor and each stage having an input and an output, the output of each stage is coupled to the input of a next stage by a capacitor. An Alternating Current choke is coupled at a collector or drain of each transistor. An LO input is coupled to the input of a first stage of the two or more stages; an RF input is coupled to the output of the first stage of the two or more stages; and an IF output is coupled to the output of a last stage of the two or more stages. 1. A sub-harmonic mixer for converting a Radio Frequency , RF , signal to an Intermediate Frequency , IF , signal , the sub-harmonic mixer comprising:a Local Oscillator, LO, input to receive an LO signal;an RF input to receive the RF signal;an IF output to output the IF signal; and each stage having an input and an output, the output of each stage is coupled to the input of a next stage by a capacitor;', 'each stage comprising a common-emitter transistor having a base, a collector and an emitter, or a common-source transistor having a gate, a drain and a source;', 'the input of each stage is at the base or gate of the transistor, the output of each stage is at the collector or drain of the transistor;', 'an Alternating Current, AC, choke is coupled at the collector or drain of each transistor; and', 'the emitter or source of each transistor is connected to a ground; and, 'a circuit comprising two or more cascaded stages, wherein'}whereinthe LO input is coupled to the input of a first stage of the two or more stages;the RF input is coupled to the output of the first stage of the two or more stages; andthe IF output is coupled to the output of a last stage of the two or more stages.2. The sub-harmonic mixer according to claim 1 , wherein the RF input is coupled to the output of the first stage of the two or more ...

Integrating Circuit and Signal Processing Module

The present disclosure provides an integrating circuit and a signal processing module. The integrating circuit comprises an operational amplifier; an integrating capacitor, coupled to an output terminal and a first input terminal of the operational amplifier; and an adjustable resistance module, coupled between the first input terminal of the operational amplifier and an integrating input terminal of the integrating circuit. The adjustable resistance module receives a plurality of first control signals, to adjust a resistance value of the adjustable resistance module. The present disclosure may realize the noise brought by sidelobe to enhance the SNR, and reduce the power consumption and complexity of the overall circuit. 1. An integrating circuit , comprising:a first operational amplifier;an integrating capacitor or an adjustable integrating capacitor module, coupled between an output terminal and a first input terminal of the operational amplifier; andan adjustable resistance module and/or a switched-capacitor module, coupled between the first input terminal of the operational amplifier and an integrating input terminal of the integrating circuit, wherein the switched-capacitor module comprises an adjustable capacitance module, and the adjustable resistance module is configured to receive a plurality of first control signals, to adjust a resistance value of the adjustable resistance module, and/or the adjustable capacitance module is configured to receive a plurality of second control signals, to adjust a capacitance value between a first terminal and a second terminal of the adjustable capacitance module.2. The integrating circuit of claim 1 , wherein the adjustable resistance module comprises a plurality of resistor-selecting units controlled by the plurality of first control signals respectively claim 1 , and each resistor-selecting unit comprises:a resistor; anda resistance-control switch, coupled to the resistor.3. The integrating circuit of claim 2 , wherein ...

PHASE-ADJUSTABLE INJECTION-LOCKING

Aspects of the present disclosure are directed to injection locking and related apparatuses. As may be implemented in accordance with one or more embodiments, an apparatus includes a plurality of injection-locking circuits configured to receive an injection signal, each injection-locking circuit including a mixer and a lock-detection circuit. In each of the injection-locking circuits, the lock-detection circuit detects a lock-status relationship between the injection signal and a signal output from the injection-locking circuit. In response to the lock-status relationship indicating an unlocked condition, a phase/magnitude of the injection signal is adjusted. In response to the lock-status relationship indicating a locked condition, transmission of an FM continuous wave (FMCW) chirp signal is facilitated. 1. An apparatus comprising:a plurality of injection-locking circuits to receive an injection signal, each injection-locking circuit including a mixer and a lock-detection circuit; and in response to the lock-status relationship indicating an unlocked condition, adjust a phase of the output signal, and', 'in response to the lock-status relationship indicating a locked condition, facilitate transmission of the output signal as an FM continuous wave (FMCW) chirp signal., 'in each of the injection-locking circuits, the lock-detection circuit to detect a lock-status relationship between the injection signal and an output signal from the injection-locking circuit and, to2. The apparatus of claim 1 , further including a phase-locked loop circuit to generate the injection signal to drive each of the plurality of injection-locking circuits claim 1 , each of the injection-locking circuits having an amplifier configured to provide the output signal claim 1 , using the injection signal claim 1 , having a phase set via the injection locking circuit.3. The apparatus of claim 1 , wherein in each of the plurality of injection-locking circuits claim 1 , the mixer is configured to ...

FLICKER NOISE ELIMINATION IN A DOUBLE BALANCED MIXER DC BIAS CIRCUIT

A transmitter that reduces 3order harmonic (HD3) and inter modulation distortion (IMD3) for a gm stage of a mixer while reducing flicker noise is disclosed. The transmitter may include a balanced mixer, a transconductance stage connected to the mixer, and a bias circuit. The bias circuit may include a programmable current source configured to provide a reference current. Further, the bias circuit may include a replica circuit configured to replicate a DC signal of the transconductance stage. The bias circuit may also include a bias transistor configured to level shift a bias signal obtained from a signal source based on the reference current and the DC signal of the transconductance stage as determined from the replica circuit. 1. A transmitter comprising:a mixer;a transconductance stage connected to the mixer; and a programmable current source configured to provide a reference current;', 'a replica circuit configured to replicate a DC bias of the transconductance stage; and', 'a bias transistor configured to level shift a bias signal obtained from a signal source based on the reference current and the DC bias of the transconductance stage., 'a bias circuit comprising2. The transmitter of claim 1 , wherein the transconductance stage comprises a pair of nFETs connected as a differential pair.3. The transmitter of claim 1 , wherein the mixer is a double balanced mixer or a Gilbert cell mixer.4. The transmitter of claim 1 , wherein the bias circuit comprises a second bias transistor configured to level shift a second bias signal.5. The transmitter of claim 4 , wherein a phase of the bias signal and a phase of the second bias signal are the same phase as the DC bias.6. The transmitter of claim 4 , wherein the bias signal is supplied to a first transistor of the transconductance stage and the second bias signal is supplied to a second transistor of the transconductance stage.7. The transmitter of claim 1 , further comprising a filter preceding the bias circuit.8. The ...

SIGNAL MIXING CIRCUIT DEVICE AND RECEIVER

A signal mixing circuit device includes a first mixer, a second mixer and a signal amplifying circuit serially connected to the first mixer; the first mixer includes an RF signal input terminal for receiving an RF signal, LO signal input terminals for sampling a first and second LO signals, a first mixed-signal output terminal for outputting a first mixed signal and a second mixed-signal output terminal for outputting a second mixed signal; the second mixer includes an input terminal connected to a capacitor, two mixed-signal output terminals respectively connected to the first and second mixed-signal output terminals of the first mixer, LO signal input terminals for inversely sampling the first and second LO signals. With the double-balance nature of the second mixer core, the noise at the LO signal input terminals of the first mixer can be cancelled. A receiver includes the signal mixing circuit device is also disclosed. 1. A signal mixing circuit device , comprising:a first mixer;a second mixer; anda signal amplifying circuit connected in serial with the first mixer,wherein the first mixer includes an RF signal input terminal configured to receive an RF signal, LO signal input terminals configured to sample a first LO signal and a second LO signal, a first mixed-signal output terminal configured to output a first mixed signal, and a second mixed-signal output terminal configured to output a second mixed signal, and the first and second mixed-signal output terminals of the first mixer are connected to the signal amplifying circuit, andwherein the second mixer includes an input terminal connected to a capacitor, a first mixed-signal output terminal which is connected to the first mixed-signal output terminal of the first mixer, a second mixed-signal output terminal which is connected to the second mixed-signal output terminal of the first mixer, and LO signal input terminals configured to inversely sample the first LO signal and the second LO signal.2. The circuit ...

MIXER S11 CONTROL VIA SUM COMPONENT TERMINATION

A mixer termination circuit for a downconverter mixer includes a diplexer circuit coupled to an output of the downconverter mixer. The diplexer circuit is configured to separately terminate a sum component present in an output signal of the downconverter mixer and a difference component present in the output signal of the downconverter mixer. 1. A mixer termination circuit for a downconverter mixer , comprising:a diplexer circuit coupled to an output of the downconverter mixer, the diplexer circuit configured to separately terminate a sum component present in an output signal of the downconverter mixer and a difference component present in the output signal of the downconverter mixer.2. The mixer termination circuit of claim 1 , in which the diplexer circuit comprises a termination resistor.3. The mixer termination circuit of claim 2 , further comprising an inductor and a capacitor coupled in series with the termination resistor.4. The mixer termination circuit of claim 2 , further comprising an inductor and a capacitor coupled in parallel with the termination resistor.5. The mixer termination circuit of claim 1 , in which the diplexer circuit comprises a feedback voltage amplifier.6. The mixer termination circuit of claim 1 , in which the diplexer circuit comprises a T-network having a series resistor inductor capacitor (RLC) circuit branch including a termination resistor.7. The mixer termination circuit of claim 6 , in which the RLC circuit branch is tuned to a frequency of the sum component.8. The mixer termination circuit of claim 1 , in which the diplexer circuit comprises a pi-network having an inductor and a capacitor in parallel with a termination resistor claim 1 , configured to terminate a sum component output of the downconverter mixer at a resonance frequency of the inductor and the capacitor.9. The mixer termination circuit of claim 8 , in which the inductor claim 8 , the capacitor claim 8 , and the termination resistor are tuned to a frequency of the ...

RADIO RECEIVERS

A radio receiver device is arranged to receive an input voltage signal at an input frequency and comprises: a first amplification circuit portion; a second amplification circuit portion; a current buffer circuit portion; and a down-mixer circuit portion. The first amplification circuit portion is arranged to amplify the input voltage signal to generate an amplified current signal which is input to the current buffer circuit portion. The current buffer circuit portion has an input impedance and an output impedance, wherein the output impedance is greater than the input impedance and is arranged to generate a buffered current signal. The down-mixer circuit portion is arranged to receive the buffered current signal and generate a down-converted current signal at a baseband frequency. The second amplification circuit portion is arranged to amplify the down-converted current signal to produce an output voltage signal. 1. A radio receiver device arranged to receive an input voltage signal at an input frequency , the radio receiver device comprising:a first amplification circuit portion arranged to amplify the input voltage signal to generate an amplified current signal;a current buffer circuit portion arranged to receive the amplified current signal and generate a buffered current signal, said current buffer circuit portion having an input impedance and an output impedance, wherein said output impedance is greater than said input impedance;a down-mixer circuit portion arranged to receive the buffered current signal and generate a down-converted current signal at a baseband frequency; anda second amplification circuit portion arranged to amplify the down-converted current signal to produce an output voltage signal.2. The radio receiver device as claimed in claim 1 , wherein the first amplification circuit portion comprises a low noise amplifier.3. The radio receiver device as claimed in claim 1 , wherein the second amplification circuit portion comprises a transimpedance ...

ELECTRICAL CIRCUIT FOR FILTERING A LOCAL OSCILLATOR SIGNAL AND HARMONIC REJECTION MIXER

An electrical circuit can have a local oscillator, a first mixer, a second mixer, and a delay element. The first mixer mixes an input signal with a local oscillator signal. The second mixer mixes the input signal with a delayed local oscillator signal, delayed by the delay element. The output signals from the first mixers are combined to form an output signal of the electrical circuit. 1. An electrical circuit , the electrical circuit comprising:an input terminal;an output terminal;a local oscillator;a first mixer;a second mixer; anda delay element, wherein:the first mixer is configured to receive an input signal from the input terminal and to mix the input signal with a local oscillator signal from the local oscillator,the second mixer is configured to receive the input signal from the input terminal and to mix the input signal with a delayed local oscillator signal,the delay element configured to receive the local oscillator signal, and to delay the received local oscillator signal to provide the delayed local oscillator signal to the second mixer, andthe electrical circuit is configured to combine an output signal from the first mixer with an output signal from the second mixer to form an output signal at the output terminal.2. The electrical circuit according to claim 1 , the electrical circuit further comprising at least one additional mixer claim 1 ,wherein the at least one additional mixer is configured to receive the input signal from the input terminal and to mix the input signal with a further delayed local oscillator signal,wherein the further delayed local oscillator signal is a local oscillator signal with a delay longer than the delayed local oscillator signal, andwherein the electrical circuit is configured to combine the output signal from the first mixer with the output signal from the second mixer and the output signal from the at least one additional mixer to form the output signal at the output terminal.3. The electrical circuit according to ...