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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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Применить Всего найдено 9579. Отображено 112.
25-09-2017 дата публикации

증폭 회로

Номер: KR1020170107479A
Автор: 장, 멩웬
Принадлежит:

... 본원 발명은, 리어(post) 공통 모드 전압에 의해 제1 참조 전압, 제2 참조 전압 및 참조 공통 모드 전압을 발생시키는 참조 전압 발생 회로; 상기 참조 공통 모드 전압에 의해 프론트(pre) 출력 차분 신호를 차분 입력 신호로 변환시키는 공통 모드 전압 변환 회로; 및 신속하게 상기 증폭 서브 회로의 공통 모드 마이너스 피드백을 구축하도록 제어 전압을 발생시키는 공통 모드 마이너스 피드백 회로를 포함하되, 상기 제1 참조 전압 및 상기 제2 참조 전압은 상기 프리 출력 차분 신호의 기저 신호를 제공하는 증폭 회로를 제공한다. 본원 발명에서 제공되는 증폭 회로는 기저 신호를 제거하고 공통 모드 전압을 변환시키며 신속하게 공통 모드 마이너스 피드백을 구축시킬 수 있다.

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Номер записи: 1
07-11-2013 дата публикации

CIRCUIT ARRANGEMENT WITH TUNABLE TRANSCONDUCTANCE

Номер: WO2013164088A2
Автор: SCHMIDT, Martin, GRÖZING, Markus, BERROTH, Manfred
Принадлежит:

The present invention relates to a circuit arrangement having two input terminals (in+, in-) for an input signal, which are connected via two separate input signal paths to a respective current mirror of a current mirror pair (Sp1, Sp2), by which current mirror an output current signal is generated from the input signal. Each current mirror is formed from a first transistor (T2) operating as a diode and a second transistor (T3) supplying the output current signal. The first transistors (T2) operating as diodes are connected to a first current source (iref), and the second transistors (T3) supplying the output current signal are connected to a second current source (itca/icapa), said current sources being adjustable independently of one another. A transconductance amplifier with continually tunable transconductance can be realized with the present circuit arrangement.

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Номер записи: 2
02-09-2016 дата публикации

DIFFERENTIAL AMPLIFIER

Номер: KR101653695B1
Автор: KO, GA YEON, YOO, JIN HO, PARK, CHANG KUN
Принадлежит: FOUNDATION OF SOONGSIL UNIVERSITY-INDUSTRY COOPERATION

The present invention relates to a differential amplifier. According to the present invention, the differential amplifier includes: a first amplifier including N type first and second transistors applying an input signal of an opposite phase of each gate, wherein a first end of the first and second transistors is individually connected to a first power supply, and a second end is connected to each first end of first and second inductors; and a second amplifier including P type third and fourth transistors applying the input signal of the opposite phase to the each gate, wherein a first end of the third and fourth transistors is individually connected to a second power supply higher than the first power supply, and a second end is connected to each first end of third and fourth inductors. A first contact point formed between the second ends of the first and second inductors is connected to a second contact point formed between the second ends of the third and fourth inductors. According ...

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Номер записи: 3
07-11-2013 дата публикации

CIRCUIT ARRANGEMENT WITH TUNABLE TRANSCONDUCTANCE

Номер: WO2013164088A3
Автор: SCHMIDT, Martin, GRÖZING, Markus, BERROTH, Manfred
Принадлежит:

The present invention relates to a circuit arrangement having two input terminals (in+, in-) for an input signal, which are connected via two separate input signal paths to a respective current mirror of a current mirror pair (Sp1, Sp2), by which current mirror an output current signal is generated from the input signal. Each current mirror is formed from a first transistor (T2) operating as a diode and a second transistor (T3) supplying the output current signal. The first transistors (T2) operating as diodes are connected to a first current source (iref), and the second transistors (T3) supplying the output current signal are connected to a second current source (itca/icapa), said current sources being adjustable independently of one another. A transconductance amplifier with continually tunable transconductance can be realized with the present circuit arrangement.

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Номер записи: 4
24-10-2018 дата публикации

DC OFFSET REDUCING CIRCUIT AND TRANSIMPEDANCE AMPLIFIER MODULE INCLUDING SAME

Номер: KR1020180115854A
Автор: PARK, SUNG MIN, LEE, KYUNG MIN
Принадлежит:

A DC offset removing circuit according to the present embodiment includes a current mirror which provides a pseudo DC of an input current by receiving the input current including a DC offset, a voltage converting unit which converts the pseudo DC into a corresponding voltage, and an offset removing unit for receiving the voltage and removing the DC offset from the input current. Accordingly, the present invention can provide a differential transmission impedance amplifier in which both differential output voltages are balanced. COPYRIGHT KIPO 2018 ...

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Номер записи: 5
16-01-2019 дата публикации

증폭 회로

Номер: KR0101939522B1
Автор: 장, 멩웬
Принадлежит: 선전 구딕스 테크놀로지 컴퍼니, 리미티드

... 본원 발명은, 리어(post) 공통 모드 전압에 의해 제1 참조 전압, 제2 참조 전압 및 참조 공통 모드 전압을 발생시키는 참조 전압 발생 회로; 상기 참조 공통 모드 전압에 의해 프론트(pre) 출력 차분 신호를 차분 입력 신호로 변환시키는 공통 모드 전압 변환 회로; 및 신속하게 상기 증폭 서브 회로의 공통 모드 마이너스 피드백을 구축하도록 제어 전압을 발생시키는 공통 모드 마이너스 피드백 회로를 포함하되, 상기 제1 참조 전압 및 상기 제2 참조 전압은 상기 프리 출력 차분 신호의 기저 신호를 제공하는 증폭 회로를 제공한다. 본원 발명에서 제공되는 증폭 회로는 기저 신호를 제거하고 공통 모드 전압을 변환시키며 신속하게 공통 모드 마이너스 피드백을 구축시킬 수 있다.

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Номер записи: 6
12-12-2013 дата публикации

Schaltungsanordnung mit abstimmbarer Transkonduktanz

Номер: DE102012009099B4
Автор: SCHMIDT MARTIN, GROEZING MARKUS, BERROTH MANFRED PROF DR ING, SCHMIDT, MARTIN, GROEZING, MARKUS, BERROTH, MANFRED, PROF. DR.-ING.
Принадлежит: UNIV STUTTGART, UNIVERSITAET STUTTGART

Die vorliegende Erfindung betrifft eine Schaltungsanordnung, die zwei Eingangsanschlüsse für ein Eingangssignal aufweist, die über zwei getrennte Eingangssignalpfade mit jeweils einem Stromspiegel eines Stromspiegelpaars verbunden sind, durch den aus dem Eingangssignal ein Ausgangsstromsignal erzeugt wird. Jeder Stromspiegel ist aus einem als Diode wirkenden ersten Transistor und einem das Ausgangsstromsignal liefernden zweiten Transistor gebildet. Die als Diode wirkenden ersten Transistoren sind mit einer ersten Stromquelle und die das Ausgangsstromsignal liefernden zweiten Transistoren mit einer zweiten Stromquelle verbunden, die getrennt voneinander einstellbar sind. Mit der vorliegenden Schaltungsanordnung lässt sich ein Transkonduktanzverstärker mit kontinuierlich abstimmbarer Transkonduktanz realisieren.

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Номер записи: 7
07-11-2013 дата публикации

Schaltungsanordnung mit abstimmbarer Transkonduktanz

Номер: DE102012009099A1
Автор: SCHMIDT MARTIN, GROEZING MARKUS, BERROTH MANFRED PROF DR ING, SCHMIDT, MARTIN, GROEZING, MARKUS, BERROTH, MANFRED, PROF. DR.-ING.
Принадлежит:

Die vorliegende Erfindung betrifft eine Schaltungsanordnung, die zwei Eingangsanschlüsse für ein Eingangssignal aufweist, die über zwei getrennte Eingangssignalpfade mit jeweils einem Stromspiegel eines Stromspiegelpaars verbunden sind, durch den aus dem Eingangssignal ein Ausgangsstromsignal erzeugt wird. Jeder Stromspiegel ist aus einem als Diode wirkenden ersten Transistor und einem das Ausgangsstromsignal liefernden zweiten Transistor gebildet. Die als Diode wirkenden ersten Transistoren sind mit einer ersten Stromquelle und die das Ausgangsstromsignal liefernden zweiten Transistoren mit einer zweiten Stromquelle verbunden, die getrennt voneinander einstellbar sind. Mit der vorliegenden Schaltungsanordnung lässt sich ein Transkonduktanzverstärker mit kontinuierlich abstimmbarer Transkonduktanz realisieren.

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Номер записи: 8
18-12-2018 дата публикации

직류 오프셋 감소 회로 및 이를 포함하는 트랜스임피던스 증폭기 모듈

Номер: KR0101930627B1
Автор: 박성민, 이경민
Принадлежит: 이화여자대학교 산학협력단

... 본 실시예에 의한 직류 오프셋 제거 회로는 직류 오프셋(offset)을 포함하는 입력 전류를 제공받아, 입력 전류의 의사 직류(pseudo DC)를 제공하는 전류 미러부(current mirror)와, 의사 직류 전류를 상응하는 전압으로 변환하는 전압 변환부 및 전압을 제공받고 입력 전류에서 직류 오프셋을 제거하는 오프셋 제거부를 포함한다.

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Номер записи: 9
15-06-2023 дата публикации

CURRENT SENSE CIRCUIT

Номер: US20230184813A1
Автор: Marius-Georghe Neag, Istvan Kovacs, Paul-Nutu Miresan
Принадлежит:

A current sense circuit is described herein. In accordance with one embodiment, the circuit comprises: a first circuit node and a second circuit node configured to be coupled to a first terminal and a second terminal of a current sense resistor, respectively; an differential amplifier having a first input and a second input which are coupled to the first circuit node and the second circuit node via a first input resistor and a second input resistor; a voltage source, configured to set the voltage at the first input of the differential amplifier to a predefined DC voltage; and a controllable current mirror configured to sink or source a first current in its input branch based on one or more outputs of the differential amplifier and to generate a corresponding second current in its output branch. The input branch is coupled to the second input of the differential amplifier. A biasing circuit is configured to generate a bias current and is coupled to the controllable current mirror to superpose ...

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Номер записи: 10
02-07-2020 дата публикации

POWER AMPLIFIER CIRCUIT

Номер: US20200212849A1
Автор: Shunsuke KOBAYASHI, Takayuki KAWANO, KOBAYASHI SHUNSUKE, KAWANO TAKAYUKI, KOBAYASHI, Shunsuke, KAWANO, Takayuki
Принадлежит:

A power amplifier circuit includes a power amplifier that amplifies the power of a high frequency signal, a power amplifier temperature detector circuit that includes a temperature detection element, the temperature detection element being thermally coupled with the power amplifier, a bias control signal generator circuit that generates a bias control signal for the power amplifier based on a temperature detection signal outputted from the power amplifier temperature detector circuit, and a regulator circuit that stabilizes the temperature detection signal. The power amplifier, the power amplifier temperature detector circuit, and the regulator circuit are formed in a first integrated circuit, and the bias control signal generator circuit is formed in a second integrated circuit. The substrate material (for example, GaAs) of the first integrated circuit has a higher cutoff frequency than the substrate material (for example, SOI) of the second integrated circuit.

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Номер записи: 11
15-05-2018 дата публикации

Amplifying circuit

Номер: US9973146B2
Автор: ZHANG MENGWEN, Zhang, Mengwen
Принадлежит: SHENZHEN GOODIX TECH CO LTD, SHENZHEN GOODIX TECHNOLOGY CO., LTD.

An amplifying circuit includes a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage. The common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage. The common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback.

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Номер записи: 12
05-01-2012 дата публикации

Nanoelectronic differential amplifiers and related circuits implemented on a segment of a graphene nanoribbon

Номер: US20120001689A1
Автор: Lester F. Ludwig
Принадлежит: Pike Group LLC

A multiple transistor differential amplifier is implemented on a segment of a single graphene nanoribbon. Differential amplifier field effect transistors are formed on the graphene nanoribbon from a first group of electrical conductors in contact with the graphene nanoribbon and a second group of electrical conductors insulated from, but exerting electric fields on, the graphene nanoribbon thereby forming the gates of the field effect transistors. A transistor in one portion of the graphene nanoribbon and a transistor in another portion of the graphene nanoribbon are responsive to respective incoming electrical signals. A current source, also formed on the graphene nanoribbon, is connected with the differential amplifier, and the current source and the differential amplifier operating together generate an outgoing signal responsive to the incoming electrical signal. In an example application, the resulting circuit can be used to interface with electrical signals of nanoscale sensors and actuators,

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Номер записи: 13
12-01-2012 дата публикации

Method and system for a feedback transimpedance amplifier with sub-40khz low-frequency cutoff

Номер: US20120007681A1
Автор: Brian Welch
Принадлежит: Luxtera LLC

A system for a feedback transimpedance amplifier with sub-40 khz low-frequency cutoff is disclosed and may include amplifying electrical signals received via coupling capacitors utilizing a transimpedance amplifier (TIA) having feedback paths comprising source followers and feedback resistors. The feedback paths may be coupled prior to the coupling capacitors at inputs of the TIA. Voltages may be level shifted prior to the coupling capacitors to ensure stable bias conditions for the TIA. The TIA may be integrated in a CMOS chip and the source followers may comprise CMOS transistors. The TIA may receive current-mode logic or voltage signals. The electrical signals may be received from a photodetector, which may comprise a silicon germanium photodiode and may be differentially coupled to the TIA. The chip may comprise a CMOS photonics chip where optical signals for the photodetector in the CMOS photonics chip may be received via one or more optical fibers.

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Номер записи: 14
03-05-2012 дата публикации

Signal level conversion circuit, physical quantity detection device and electronic apparatus

Номер: US20120103093A1
Автор: Takayuki Kikuchi, Yoshinao Yanagisawa
Принадлежит: Seiko Epson Corp

A signal level conversion circuit 1 includes a first differential amplifier circuit 10 and a second differential amplifier circuit 20 . The first differential amplifier circuit 10 multiplies a potential difference between a first input signal and a second input signal by G 1 thereby providing an output signal. The second differential amplifier circuit 20 multiplies a potential difference between the output signal of the first differential amplifier circuit 10 and the second input signal by G 2 thereby providing an output, where the two gains satisfy the relation of G 1 ×G 2 <0 and 0<−(G 1 +1)×G 2 <2.

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Номер записи: 15
21-06-2012 дата публикации

Push-pull low noise amplifier with variable gain, push-pull low noise amplifier with common gate bias circuit and amplifier with auxiliary matching

Номер: US20120154045A1
Автор: Ming-Da Tsai, Yu-Hsin Lin
Принадлежит: MediaTek Inc

A push-pull low noise amplifier (LNA) includes at least one amplifier block. Each amplifier block includes a bypass stage and at least one gain cell. The bypass stage has a first node and a second node. The gain cell has an input terminal and an output terminal, comprising a loading stage and a driving stage. When the push-pull LNA is in a first gain mode, the loading stage is enabled and the bypassing stage is disabled; and when the push-pull LNA is in a second gain mode, the loading stage is disabled and the bypassing stage is enabled.

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Номер записи: 16
21-06-2012 дата публикации

Circuit with reference source to control the small signal transconductance of an amplifier transistor

Номер: US20120154050A1
Автор: Gerben Willem De Jong
Принадлежит: NXP BV

A circuit has a reference source ( 12 ) for supplying a bias signal to set a small signal transconductance of an amplifier transistor in an amplifier ( 10 ) to a predetermined value. The reference source has at least one reference transistor ( 120 a - b, 30 ). A feedback circuit ( 128, 129, 38 ) has an input coupled to the main current channel of the reference transistor or reference transistors ( 120 a - b, 30 ) and an output coupled to the control electrode of the reference transistor or reference transistors ( 120 a - b, 30 ). The feedback circuit controls a control voltage at the control electrode, so as to equalize an offset current and a difference between main currents flowing through the current channel of the reference transistor or reference transistors ( 120 a - b, 30 ), obtained with and without a small voltage offset added to the control voltage. The main currents flowing with and without a small voltage offset may be obtained by using a first and second reference transistor ( 122 a,b ), matching each other and an offset voltage source ( 126 ) coupled between the control electrodes of the first and second reference transistor ( 122 a,b ), to apply the small voltage offset between their control electrodes.

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Номер записи: 17
28-06-2012 дата публикации

Differential Amplifier

Номер: US20120161869A1
Автор: Charles Chang, Ronald Chang
Принадлежит: Hanergy Technology Inc

A differential amplifier is provided in the present invention. The differential amplifier includes an amplifying module having a resistive ratio, receiving an input voltage, and amplifying the input voltage as an output voltage in accordance with the resistive ratio; and a feedback module coupled with the amplifying module and generating a feedback signal in accordance with the input voltage and the output voltage for regulating the output voltage.

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Номер записи: 18
04-10-2012 дата публикации

Correlated-level-shifting and correlated-double-sampling switched-capacitor gain stages, systems implementing the gain stages, and methods of their operation

Номер: US20120249237A1
Автор: Brandt Braswell, Douglas A. Garrity
Принадлежит: FREESCALE SEMICONDUCTOR INC

Embodiments of apparatus and methods for applying a gain to an input signal are provided. An embodiment of a switched-capacitor gain stage circuit includes an input node, an output node, an operational amplifier, a correlated-double-sampling portion, a correlated-level-shifting portion, and a switching configuration. The operational amplifier has a first amplifier input, a second amplifier input, and an amplifier output. The correlated-double-sampling portion includes a plurality of sampling capacitors arranged in parallel and selectively coupled between the input node and a central node, and an offset storage capacitor including a first terminal coupled to the first amplifier input. The correlated-level-shifting portion includes a correlated-level-shifting capacitor including a first terminal coupled to the output node. The switching configuration has multiple switches that are controllable sequentially to place the gain stage circuit in a sampling state, an approximate output voltage storage state, a level shifting and gain state, and an output state.

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Номер записи: 19
08-11-2012 дата публикации

Audio amplifier

Номер: US20120281857A1
Автор: Chih-Haur Huang
Принадлежит: Individual

An audio amplifier includes a timing control circuit, an amplifying circuit, and a bias control circuit. The timing control circuit generates a first power down signal and a second power down signal, in which the first power down signal is asserted before the second power down signal is asserted. The amplifying circuit receives a bias voltage to amplify an audio signal and is deactivated when the first power down signal is asserted. The bias control circuit provides the bias voltage for the amplifying circuit and is deactivated when the second power down signal is asserted.

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Номер записи: 20
06-12-2012 дата публикации

Semiconductor integrated circuit device, electronic device, and radio communication device

Номер: US20120309456A1
Автор: Miki Shiraishi, Seiji Yamamoto, Yutaka Uneme
Принадлежит: Renesas Mobile Corp

In an embodiment, a semiconductor integrated circuit device includes a driver circuit that drives a transmission line, an output terminal coupled to the output of the driver circuit, and a variable-impedance circuit. The variable-impedance circuit is coupled, for example, between the driver circuit and the output terminals for series-termination of the transmission line.

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Номер записи: 21
17-01-2013 дата публикации

Common-Mode Amplifier Step Response

Номер: US20130015916A1
Автор: Alasdair Alexander, Quan WAN
Принадлежит: Analog Devices Inc

An auto-zero amplifier includes a main amplifier for amplifying an input signal; the main amplifier receives an offset-correction signal for cancelling an offset at a first common-mode level of the input signal. At the first common-mode level, the offset-correction signal is based on a first value stored using a first offset-storage element. When a change is detected in the input common-mode from the first level to a second level, the first offset-storage element is switched out and a second offset-storage element, having a second value based on the second common-mode level, is switched in.

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Номер записи: 22
07-02-2013 дата публикации

Self calibrated, broadband, tunable, active oscillator with unity gain cells for multi-standard and/or multiband channel selection

Номер: US20130033333A1
Автор: Mihai Adrian Tiberiu Sanduleanu, Ping-Yu Chen
Принадлежит: International Business Machines Corp

An oscillator includes N greater than unity gain amplifiers, N being at least two. Each of the N greater than unity gain amplifiers has a pair of differential input terminals and a pair of differential output terminals. The oscillator further includes a first pair of variable resistances, N−1 pairs of variable resistances, N−1 pairs of variable capacitances, and a variable capacitance. The pairs of variable resistances couple differential output terminals of the N greater than unity gain amplifiers. The pairs of variable capacitances couple differential input terminals of the N greater than unity gain amplifiers. Each of the N greater than unity gain amplifiers includes a linearized operational transconductance amplifier stage coupled to a corresponding pair of the differential input terminals, and a unity gain buffer with feedback interconnected between the linearized operational transconductance amplifier stage and a corresponding pair of the differential output terminals.

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Номер записи: 23
21-02-2013 дата публикации

Sensing devices and display devices

Номер: US20130043942A1
Автор: Kazuyuki Hashimoto, Shinji KONOSHITA, Yoshikazu Matsui
Принадлежит: Innolux Corp

A sensing device is provided. The sensing device successively operates in a plurality of operation periods and includes a plurality of first electrodes, a plurality of differential amplifiers, and a plurality of sensing circuits. The first electrodes are disposed successively. The differential amplifiers at least comprise a first differential amplifier and a second differential amplifier. Each of the differential amplifiers comprises a first input terminal and a second input terminal. Each of the sensing circuits has an input terminal and an output terminal. The sensing circuits at least comprise first, second, and third sensing circuits. The input terminals of the sensing circuits are coupled to the first electrodes. The output terminals of sensing circuits are coupled to the differential amplifiers. The output terminal of at least one of the sensing circuits is coupled to both of the first differential amplifier and the second differential amplifier.

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Номер записи: 24
11-04-2013 дата публикации

Combined filter and transconductance amplifier

Номер: US20130088291A1
Автор: Philippe Gorisse
Принадлежит: RF Micro Devices Inc

Embodiments of circuitry, which includes an operational transconductance amplifier and a passive circuit, are disclosed. The passive circuit is coupled to the operational transconductance amplifier. Further, the passive circuit receives an input signal and the operational transconductance amplifier provides an output current, such that the passive circuit and the OTA high-pass filter and integrate the input signal to provide the output signal.

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Номер записи: 25
18-04-2013 дата публикации

Op-R, A Solid State Filter

Номер: US20130093507A1
Автор: Gerald T. Volpe
Принадлежит: Individual

The device described herein proposes an electronic active filter void of capacitors and inductors. The circuit utilizes only operational amplifiers (OP-Amp) and resistors, hence the name Op-R. Although capable of being constructed of lumped circuit elements this filter is intended for integrated circuit (IC) applications. Filtering of signals can be accommodated from dc through the UHF frequency range depending on the selected op-amp ICs. Low pass, band pass, high pass, as well as band reject frequency responses are achievable. Although the circuits described herein are single input-single output, multiple inputs and outputs present no difficulty, being limited only chip space. Temperature and production spread variations are also considered within the realm of tenability.

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Номер записи: 26
25-04-2013 дата публикации

Audio programmable gain amplifier with automatic reconfiguration

Номер: US20130099857A1
Автор: Brian W. Friend, Christian Larsen
Принадлежит: Individual

A reconfigurable amplifier comprising a first operational amplifier having two inputs and an output. A second operational amplifier having two inputs and an output. A plurality of switches coupled to the two inputs and the output of the first operational amplifier and the two inputs and the output of the second operational amplifier, wherein a first configuration of the plurality of switches causes the first operational amplifier and the second operational amplifier to operate as an inverting differential input amplifier, and wherein a second configuration of the plurality of switches causes the first operational amplifier and the second operational amplifier to operate as a non-inverting differential input instrumentation amplifier.

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Номер записи: 27
09-05-2013 дата публикации

Near Field Communications Reader

Номер: US20130115876A1
Автор: Anthony McFarthing
Принадлежит: Cambridge Silicon Radio Ltd

The present application relates to a near field communications (NFC) reader having a power amplifier which has an output that connects to an input terminal of an antenna by means of an antenna filter made up of one or more series resistors and one or more series capacitors. The NFC reader includes means for adjusting the Q factor of the antenna so as to increase the available transmit bandwidth and/or improve the efficiency of the reader. The means for adjusting the Q factor of the antenna may be, for example, a variable resistive component or one or more switches.

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Номер записи: 28
16-05-2013 дата публикации

Reference buffer amplifier

Номер: US20130120066A1
Автор: Rex K. Hales, Ryan James Kier, Tracy Johancsik, Yusuf Haque
Принадлежит: Crest Semiconductors Inc

A reference buffer amplifier within an integrated circuit includes a first output terminal connected to a first bond pad, the first bond pad being connected to a first external pin of the integrated circuit chip, the first external pin to allow an external capacitance to be connected to the output terminal. The reference buffer further includes a variable, settable resistance sub-circuit connected to a second bond pad, the second bond pad also being connected to the first external pin. The resistance sub-circuit is configured to be set to exhibit a resistance value to critically dampen a response of the reference buffer amplifier.

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Номер записи: 29
20-06-2013 дата публикации

Rectifier, received signal strength indicator, and receiver

Номер: US20130156084A1
Автор: Chang Sub SHIN, Cheol Sig Pyo, Hoyong Kang, In Hwan Lee, Nguyen Trung KEIN, Se Han Kim, Tae Joon Park, Wun-Cheol Jeong
Принадлежит: Electronics and Telecommunications Research Institute ETRI

A received signal strength indicator is provided. The received signal strength indicator includes a plurality of differential amplifiers forming an amplifier chain for amplifying differential signals and a plurality of rectifiers for rectifying signals output from the plurality of differential amplifiers and the differential signals, and a low pass filter for combining the signals rectified by the plurality of rectifiers to output received signal strength. Each rectifier includes a class AB voltage-current converter for converting a differential voltage into a current, and two triode transistors.

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Номер записи: 30
15-08-2013 дата публикации

A gm-ratioed amplifier

Номер: US20130207723A1
Автор: Foo Chung Choong, Yuanjin Zheng, Zhiming Chen
Принадлежит: Agency for Science Technology and Research Singapore

Embodiments provide a gm-ratioed amplifier. The gm-ratioed amplifier comprises a first input voltage terminal and a second input voltage terminal, a first output voltage terminal and a second output voltage terminal, and an amplifying unit. The amplifying unit may be coupled between the input voltage terminals and the output voltage terminals and may be adapted to supply an output voltage to the output terminals in dependence on an input voltage supplied to the input terminals. The amplifying unit may comprise a gm-load, which comprises a first load branch comprising a first field effect transistor, and a second load branch comprising a second field effect transistor. A first source/drain terminal and a gate terminal of the first field effect transistor may be coupled to the first output voltage terminal, and a first source/drain terminal and a gate terminal of the second field effect transistor may be coupled to the second output voltage terminal. A second source/drain terminal of the first field effect transistor and a second source/drain terminal of the second field effect transistor may be coupled with each other through a first transistor arrangement such that a linearity of response of the output voltage to the input voltage is improved.

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Номер записи: 31
29-08-2013 дата публикации

Load current sensing

Номер: US20130223649A1
Автор: Ankit Srivastava, Matthew D. Sienko, Meysam AZIN, Peter J. Shah, Xiaohong Quan
Принадлежит: Qualcomm Inc

Techniques for sensing current delivered to a load by a differential output stage, e.g., in a Class D amplifier. In one aspect, voltages across sense resistors coupled in series with first and second branches of the differential output stage are low-passed filtered and digitized. The sense resistors may be coupled in series with the sources of transistors of the first and second branches, wherein the transistors are selectively switchable on and off by input voltage driving voltages. The input driving voltages may correspond to a ternary voltage waveform such that during a given phase, the two transistors coupled in series with the sense resistors may be turned off. Further aspects provide for the first and second branches having cascoded NMOS and/or PMOS transistors, and the sense resistors being provided between a pair of cascoded transistors.

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Номер записи: 32
05-09-2013 дата публикации

Differential circuit compensating gain enhancement due to self heating of transistors

Номер: US20130229231A1
Автор: Akihiro Moto, Keiji Tanaka, Yoshiyuki Sugimoto
Принадлежит: Sumitomo Electric Industries Ltd

A differential circuit with a function to compensate the gain enhancement due to the self-heating of the transistor is disclosed. The differential circuit includes an equalizer unit coupled with one of paired transistors. The other of the paired transistor receives the input signal to be amplified. The base level, or the base-emitter bias, is oppositely modulated by the input signal through the common emitter, which causes the modification of the base current. The equalizer unit reduces the variation of the base level only in low frequencies where the self-heating effect of the transistor appears.

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Номер записи: 33
12-09-2013 дата публикации

Digital-to-Analog Converter

Номер: US20130234874A1
Автор: Abhishek Duggal, James A. Bailey
Принадлежит: LSI Corp

A digital-to-analog converter (DAC) has a pulse-width encoder that generates a charging pulse having a pulse width proportional to the DAC's digital input value. The charging pulse controls a charging switch that selectively connects a current source to a capacitor for the duration of the charging pulse. At the end of the charging pulse, a voltage corresponding to the charge stored in the capacitor forms the DAC's analog output signal. Such DACs can be configured (1) with negative-gain amplifiers across the capacitor to form a negative feedback loop, (2) with multiple parallel current sources, and/or (3) in differential architectures.

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Номер записи: 34
26-09-2013 дата публикации

Multiple power mode amplifier

Номер: US20130249626A1
Автор: Akira Inoue, Hiroshi Otsuka, Kazuhiro Iyomasa, Kazuya Yamamoto, Kenichi Horiguchi, Masatoshi Nakayama, Naoko Matsunaga
Принадлежит: Mitsubishi Electric Corp

A multiple power mode amplifier includes: N amplifiers connected in series via switches; and a control circuit for controlling the N amplifiers in accordance with the output modes. P amplifiers out of the N amplifiers constitute a driver amplifier, and constitute a negative feedback amplifier including a feedback circuit for negatively feeding back its own output signal to its own input side. N−P amplifiers constitute a final stage amplifier connected in series to the negative feedback amplifier in a disconnectable manner. The control circuit is configured to: in a first output mode, disconnect the final stage amplifier from the negative feedback amplifier, and disable the feedback circuit; and in a second output mode, connect the final stage amplifier in series to the negative feedback amplifier, and enable the feedback circuit.

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Номер записи: 35
03-10-2013 дата публикации

Common mode input control for switched capacitor amplifier in pipeline analog-to-digital converter

Номер: US20130257538A1
Автор: Dave Thomas
Принадлежит: Linear Technology LLC

A common mode bias circuit may include a weak common mode bias generator and a common mode bias capacitance. During a first state of the common mode bias circuit, the weak common mode bias generator may be coupled to the common mode bias capacitance and may impart to them a predefined common mode signal level. During a second state of the common mode bias circuit, the common mode bias capacitance may be coupled to differential inputs of an amplifier in a manner that establishes an input common mode level for the amplifier.

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Номер записи: 36
03-10-2013 дата публикации

Amplification circuit, photoelectric conversion apparatus, and imaging system

Номер: US20130258148A1
Автор: Hideo Kobayashi, Masanori Ogura
Принадлежит: Canon Inc

An amplification circuit includes an amplifier, a first capacitor including a first terminal connected to an input terminal of the amplifier, a second capacitor including a first terminal connected to the input terminal of the amplifier and a second terminal connected to an output terminal of the amplifier, and a correction unit configured to correct a difference in bias dependency between capacitance values of the first and second capacitors.

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Номер записи: 37
14-11-2013 дата публикации

Rf power amplifier

Номер: US20130300505A1
Автор: Kenta Seki, Masao Kondo, Satoshi Sakurai, Yoshikuni Matsunaga
Принадлежит: Renesas Electronics Corp

A reduction is achieved in the primary-side input impedance of a transformer (voltage transformer) as an output matching circuit without involving a reduction in Q-factor. An RF power amplifier includes transistors, and a transformer as the output matching circuit. The transformer has a primary coil and a secondary coil which are magnetically coupled to each other. To the input terminals of the transistors, respective input signals are supplied. The primary coil is coupled to each of the output terminals of the transistors. From the secondary coil, an output signal is generated. The primary coil includes a first coil and a second coil which are coupled in parallel between the respective output terminals of the transistors, and each magnetically coupled to the secondary coil. By the parallel coupling of the first and second coils of the primary coil, the input impedance of the primary coil is reduced.

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Номер записи: 38
21-11-2013 дата публикации

Integrated start-up bias boost for dynamic error vector magnitude enhancement

Номер: US20130307625A1
Автор: Brian EPLETT, Kyle Hershberger, Mark Santini
Принадлежит: Microsemi Corp

Devices and methods for correcting for start-up transients in integrated power amplifiers are disclosed. A delay element is arranged to produce a delay waveform signal that is responsive to an input voltage signal. A transconductance element has an input that receives the delay waveform signal and is arranged to provide an output boost current that is based on the delay waveform signal and a gain of the transconductance element. A reference element provides an output bias current that is responsive to a static reference current and the boost current. A bias element has an input that receives the bias current and is arranged to provide a bias control output. A power amplifier is responsive to the bias control output and is arranged to provide an amplified power output. In some examples, the boost current is adjusted based on a supply voltage and an input power of the power amplifier.

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Номер записи: 39
19-12-2013 дата публикации

De-noise circuit and de-noise method for differential signals and chip for receiving differential signals

Номер: US20130335167A1
Автор: Chia-Hung Su, Hung-Yi Kuo, Tsung-Hsin Lin
Принадлежит: Via Technologies Inc

A de-noise circuit and a de-noise method for differential signals and a chip for receiving differential signals are provided. The de-noise circuit includes a filter and a register. Both the filter and the register are disposed in the chip. The chip receives a differential signal through a first input terminal and a second input terminal. The filter is coupled between the first input terminal and the second input terminal of the chip. The filter filters out noises in the differential signal. The filter includes at least one filter unit. Each filter unit has at least one resistance value or at least one capacitance value. The register is coupled to the filter. The register receives and stores a control value. The register controls the resistance value or the capacitance value of at least one of the filter units based on the control value.

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Номер записи: 40
09-01-2014 дата публикации

Output impedance compensation of a pseudo-envelope follower power management system

Номер: US20140009227A1
Автор: Michael R. Kay, Nadim Khlat
Принадлежит: RF Micro Devices Inc

A switch mode power supply converter, a parallel amplifier, and a parallel amplifier output impedance compensation circuit are disclosed. The switch mode power supply converter provides a switching voltage and generates an estimated switching voltage output, which is indicative of the switching voltage. The parallel amplifier generates a power amplifier supply voltage at a power amplifier supply output based on a compensated V RAMP signal. The parallel amplifier output impedance compensation circuit provides the compensated V RAMP signal based on a combination of a V RAMP signal and a high frequency ripple compensation signal. The high frequency ripple compensation signal is based on a difference between the V RAMP signal and the estimated switching voltage output.

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Номер записи: 41
23-01-2014 дата публикации

Apparatus and methods for amplifier power supply control

Номер: US20140022014A1
Автор: Mark Reisiger
Принадлежит: Analog Devices Inc

Apparatus and methods for amplifier power supply control are provided. In certain implementations, an amplifier includes an input amplification stage and a power supply control block for generating a power high supply and a power low supply for the input amplification stage. The power supply control block receives a reference signal indicative of a common-mode input voltage of the amplifier, and the power supply control block adjusts a voltage level of the power high and power low supplies while maintaining a substantially constant voltage difference between the power high and power low supplies. The power supply control block changes the voltage level of the power high and power low supplies based on the reference signal such that the voltage levels of the power high and power low supplies move in relation to the common-mode input voltage.

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Номер записи: 42
13-02-2014 дата публикации

Class resonant-h electrosurgical generators

Номер: US20140043070A1
Автор: James A. Gilbert
Принадлежит: COVIDIEN LP

A generator for use with an electrosurgical device is provided. The generator has a gain stage electrically disposed between a first voltage rail and a second voltage rail, wherein the gain stage includes an input and an output. A voltage source operably coupled to the gain stage input and configured to provide an input signal thereto responsive to a drive control signal is also provided. The generator also has one or more sensors configured to sense an operational parameter of the amplifier and to provide a sensor signal corresponding thereto and a controller adapted to receive the sensor signal(s) and in response thereto provide a drive control signal to the voltage source. The generator has an amplifier output configured to supply an output voltage corresponding to the first voltage rail and the second voltage rail when the output of the gain stage falls between a voltage of the first voltage rail and a voltage of the second voltage rail and is configured to supply a peak voltage output when the voltage output is falls greater than the voltage of the first voltage rail or less than the voltage of the second voltage rail.

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Номер записи: 43
20-02-2014 дата публикации

Multichannel detector having a reduced number of output channels

Номер: US20140048692A1
Автор: Jihoon Kang, Jin Ho Jung, Yong Choi
Принадлежит: Industry University Cooperation Foundation of Sogang University

The present disclosure relates to a multi-channel detector having a reduced number of output channels and including: a linear amplifier linearly amplifying an input signal; an offset correcting unit configured by a circuit that is independent from the linear amplifier, including an operational amplifier inside, and correcting an offset level that changes in accordance with an amplification rate of the operational amplifier; a uniformity correcting unit reducing a non-uniform characteristic of the input signal by finely adjusting a gain of an output signal of the linear amplifier; a signal delay unit delaying an output signal of the uniformity correcting unit until a time point when output signals are generated from a comparison unit and a signal determining unit, and a switch circuit receives a trigger from the signal determining unit; a comparison unit comparing the output signal of the uniformity correcting unit with a signal of a predetermined level with each other; a signal determining unit receiving a trigger signal from the comparison unit, determining channel position information of a channel in which an event occurs, transmitting a trigger signal to a switch circuit located at the determined channel position, and outputting the determined position information; and a channel information processing unit receiving energy information, time information, or the channel position information of a channel in which an event occurs as input when a trigger signal is input from the signal determining unit to the switch circuit located at the determined channel position.

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Номер записи: 44
20-02-2014 дата публикации

On-chip impedance network with digital coarse and analog fine tuning

Номер: US20140049356A1
Автор: Curtis Dicke, David Fisch, George Courville, Kent STALNAKER, Randall SANDUSKY
Принадлежит: Individual

System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.

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Номер записи: 45
27-02-2014 дата публикации

Apparatus for powering a device

Номер: US20140059364A1
Автор: Sasan Cyrusian
Принадлежит: MARVELL WORLD TRADE LTD

An apparatus includes a processor and a device. The processor generates an output signal and a control signal. The device consumes power while operating in first and second states. The device consumes less power while in the first state than while in the second state. The processor: accounts for a transition time for the device to transition among a powered off state, the first state, and the second state; and generates the control signal based on the transition time. The device: in response to the control signal, transitions to the second state at a speed of periodicity of a periodic signal of the processor; subsequent to the transitioning to the second state, performs a function based on the output signal; and subsequent to performing the function, transitions from the second state to either the first state or the powered off state.

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Номер записи: 46
27-03-2014 дата публикации

Apparatus and method for wide common mode difference

Номер: US20140084999A1
Автор: Quan WAN
Принадлежит: Analog Devices Inc

Apparatus and methods reduce increase the common mode range of a difference amplifier. A circuit uses one or more floating powers and one or more floating grounds coupled to an input stage of an amplifier to increase the common mode range of a difference amplifier. The floating power can be configured to select from the greater of the voltage level of one of the differential signals and the system power high source. The floating ground can be configured to select from the lesser of the voltage level of one of the differential signals and the system power low source.

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Номер записи: 47
10-04-2014 дата публикации

Pop/Click Noise Reduction Circuitry For Power-Up And Power-Down of Audio Output Circuitry

Номер: US20140098974A1
Автор: Eduardo Viegas
Принадлежит: Silicon Laboratories Inc

Pop/clock noise reduction circuitry is disclosed for audio output circuitry. After audio output circuitry is enabled, reference voltage generator circuitry is then enabled to produce a reference voltage that ramps from a first voltage level to a second voltage level at a smooth rate. The ramping reference voltage is applied to the input of the audio output circuitry to reduce or prevent pop/click noise for the audio output circuitry. Further, negative offset control circuitry can also be used to provide a negative offset input to the audio output circuitry to remove initial step-up voltage levels that may exist at operational power-up for the audio output circuitry. Still further, current control circuitry can also be used that limits the available current flowing to the output node for the audio output circuitry, thereby further reducing and/or preventing potential pop/click noise in the audio output signals.

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Номер записи: 48
06-01-2022 дата публикации

POWER AMPLIFYING CIRCUIT

Номер: US20220006437A1
Автор: GOTO Satoshi, NAMIE Hisanori, SATO Aki
Принадлежит:

A power amplifying circuit includes a single-ended amplifier, a differential amplifier, a first balun transformer, a second balun transformer, and a first switching circuit. The single-ended amplifier operates in a first mode and a second mode different from the first mode. The differential amplifier operates in the second mode. The first balun transformer converts an unbalanced output signal from the single-ended amplifier into a differential signal and outputs the differential signal to the differential amplifier. The second balun transformer converts a balanced output signal from the differential amplifier into an unbalanced output signal. The first switching circuit outputs the unbalanced output signal from the single-ended amplifier in the first mode and outputs the unbalanced output signal from the second balun transformer in the second mode. 1. A power amplifying circuit comprising:a single-ended amplifier configured to operate in a first mode and a second mode, the second mode being different from the first mode;a differential amplifier configured to operate in the second mode;a first balun transformer configured to convert an unbalanced output signal from the single-ended amplifier into a differential signal, and configured to output the differential signal to the differential amplifier;a second balun transformer configured to convert a balanced output signal from the differential amplifier into an unbalanced output signal; anda first switching circuit configured to selectively output the unbalanced output signal from the single-ended amplifier in the first mode, and configured to output the unbalanced output signal from the second balun transformer in the second mode.2. The power amplifying circuit according to claim 1 , further comprising:a first capacitor that is between the single-ended amplifier and a first end of an input-side winding of the first balun transformer; anda second switching circuit configured to selectively connect a second end of the ...

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Номер записи: 49
13-01-2022 дата публикации

SYSTEM AND APPARATUS FOR GENERATING DYNAMIC REFERENCE VOLTAGE IN POWER CONSTRAINED DEVICES

Номер: US20220014149A1
Автор: Ballam Robert S., GANTON Robert Bruce
Принадлежит:

A simplified electronics approach to allow cost, size, and power consumption to be reduced while maintaining state of the art accuracy and reliability, key features for wireless medical devices/systems and industrial sensors alike. Extreme accuracy is achieved by innovative noise shaping and filtering introduced to the electrochemical sensor, before sampling by the analog to digital converter. Introduction of the noise and bias to the electrochemical sensor provides very low power biasing which is necessary to achieve overall reliable and very accurate bias for the electrochemical reaction cell. 1. A circuit for measuring an output signal from an electronic sensor , comprising:a measurement output line from the electronic sensor coupled to a first input of an op amp;a reference signal line coupled to a second input to the op amp; a first GPIO pulse generator coupled to a first a first RC network;', 'a reference ADC coupled to the reference signal line;, 'a reference signal generator coupled to the reference signal line, the reference signal generator further comprisinga sampling ADC sampling an output of the op amp; anda processor constructed to activate the GPIO for a precise elapse time such that the first GPIO pulse signal charges the capacitor to about a target reference voltage.2. The circuit according to claim 1 , wherein the processor claim 1 , the GPIO pulse generator claim 1 , the reference ADC and the sampling ADC are all in a same SoC.3. The circuit according to claim 1 , wherein the measurement output line is from a biological sensor claim 1 , and the measurement output line is a current measurement that the op amp converts to a voltage output on the op amp output.4. The circuit according to claim 1 , wherein the first RC network comprises a first resistor and a capacitor.5. The circuit according to claim 1 , wherein the first RC network comprises an output pin from the GPIO and a capacitor claim 1 , the outpin configured as a current source or as a ...

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Номер записи: 50
04-01-2018 дата публикации

AMPLIFIER AND RADIATION DETECTOR

Номер: US20180006613A1
Автор: BOMBELLI Luca, FIORINI Carlo
Принадлежит:

In a preamplifier (amplifier) for the radiation detector, an interconnection layer connected to the bonding pad forms one electrode of a feedback capacitor. Since there is no wiring for connecting the bonding pad and capacitor, a parasitic capacitance caused by the wiring will not be generated. Moreover, the capacitor is arranged below the bonding pad with a conductive layer serving as the other electrode, so that the feedback capacitance of the capacitor is included in the parasitic capacitance between the interconnection layer and the substrate. Compared to the conventional case, an amount of capacitance corresponding to the parasitic capacitance caused by wiring and the feedback capacitance for the capacitor is reduced from the input capacitance. Thus, the input capacitance for the amplifying circuit is reduced. 1. An amplifier , comprising:a semiconductor substrate;an amplifying circuit;a feedback capacitor connected in parallel to the amplifying circuit;a reset switch integrated on the semiconductor substrate and connected in parallel to the amplifying circuit;a first conductive layer directly or indirectly connected to an external bonding wire for signal input;a second conductive layer arranged on a side more toward the semiconductor substrate than the first conductive layer; anda insulating layer interposed between the first conductive layer and the second conductive layer, whereinthe feedback capacitor is so configured that the insulating layer serves as a dielectric while the first conductive layer and the second conductive layer serve as a pair of electrodes,the first conductive layer is connected to an input terminal of the amplifying circuit, andthe second conductive layer is connected to an output terminal of the amplifying circuit.2. The amplifier according to claim 1 , further comprisinga bonding pad for connection to the external bonding wire, whereinthe first conductive layer has one part interposed between the bonding pad and the semiconductor ...

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Номер записи: 51
04-01-2018 дата публикации

SELF BIASED DUAL MODE DIFFERENTIAL CMOS TIA FOR 400G FIBER OPTIC LINKS

Номер: US20180006617A1
Автор: BROEKAERT Tom Peter Edward, MAHAJAN Gaurav, SHRINGARPURE Rahul
Принадлежит:

A transimpedance amplifier (TIA) device. The device includes a photodiode coupled to a differential TIA with a first and second TIA, which is followed by a Level Shifting/Differential Amplifier (LS/DA). The photodiode is coupled between a first and a second input terminal of the first and second TIAs, respectively. The LS/DA can be coupled to a first and second output terminal of the first and second TIAs, respectively. The TIA device includes a semiconductor substrate comprising a plurality of CMOS cells, which can be configured using 28 nm process technology to the first and second TIAs. Each of the CMOS cells can include a deep n-type well region. The second TIA can be configured using a plurality CMOS cells such that the second input terminal is operable at any positive voltage level with respect to an applied voltage to a deep n-well for each of the plurality of second CMOS cells. 1. A method of operating a communication system having a transimpedance amplifier (TIA) device and configured on a substrate having a plurality of CMOS cells , each of the CMOS cells having a deep n-type well region , the method comprising:providing, by a photodiode, a differential current signal having a first current signal and a second current signal;converting, by a first TIA, the first current signal into a first voltage, the first TIA being configured overlying the semiconductor substrate and configured to a first plurality of the CMOS cells, the first TIA having a first input terminal and a first output terminal, the first input terminal being electrically coupled to the photodiode and receiving the first current signal;converting, by a second TIA, the second current signal into a second voltage, the second TIA being configured overlying the semiconductor substrate and configured to a second plurality of the CMOS cells, the second TIA having a second input terminal and a second output terminal, the second input terminal being electrically coupled to the photodiode;wherein the ...

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Номер записи: 52
03-01-2019 дата публикации

Method and apparatus for controlling charging and discharging of capacitor module, and display apparatus

Номер: US20190006868A1
Автор: Airong LIU, CHEN Song, Lei Chen, Tangxiang Wang
Принадлежит: BOE Technology Group Co Ltd

A method is disclosed for controlling charging/discharging of a capacitor module. The capacitor module includes a plurality of branches connected in parallel, each of which includes a capacitor and a switch connected in series with the capacitor. The method includes measuring a first charge/discharge time for the capacitor module being charged/discharged from an initial voltage to an intermediate voltage, and To adjusting a second charge/discharge time for the capacitor module being further charged/discharged from the intermediate voltage to a target voltage by controlling on/off of at least one of the switches depending on the first charge/discharge time, the intermediate voltage being between the initial voltage and the target voltage. Also disclosed are an apparatus for controlling charging/discharging of a capacitor module and a display apparatus including the apparatus.

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Номер записи: 53
03-01-2019 дата публикации

RADIO FREQUENCY RECEIVER

Номер: US20190007003A1
Автор: Sivonen Pete
Принадлежит: NORDIC SEMICONDUCTOR ASA

A radio frequency receiver device comprises: a receiver input arranged to receive signals having one or more frequency components within a frequency spectrum; a filter having a filter output impedance; and an amplifier comprising: an amplifier input () connected to the filter output; an amplifier output ); at least one radio frequency input transistor (); and a feedback circuit including at least one feedback resistor (). The device is arranged to be selectably operable in: a first mode wherein the amplifier has first feedback resistance and transconductance values respectively such that the amplifier input impedance and the filter output impedance are substantially the same; and a second mode having second feedback resistance and transconductance values such that upon connection of a predetermined external impedance matching circuit () between the filter and the amplifier, the amplifier input impedance and the filter output impedance are substantially the same. 1. A radio frequency receiver device comprising:a receiver input arranged to receive signals having one or more frequency components within a frequency spectrum;a filter having a filter output impedance; andan amplifier comprising: an amplifier input connected to the filter output; an amplifier output; at least one radio frequency input transistor; and a feedback circuit including at least one feedback resistor, said feedback circuit being connected between the amplifier input and the amplifier output; a first mode wherein the amplifier has first feedback resistance and transconductance values respectively such that the amplifier input impedance and the filter output impedance are substantially the same; and', 'a second mode wherein the amplifier has second feedback resistance and transconductance values respectively such that upon connection of a predetermined external impedance matching circuit between the filter and the amplifier, the amplifier input impedance and the filter output impedance are ...

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Номер записи: 54
02-01-2020 дата публикации

Dynamic amplifier and related gain boosting method

Номер: US20200007085A1
Автор: HSIEH Cheng-En, HUANG Ju-Lin, HUANG Kuo-Sheng, Lin Jin-Yi, Liu Shen-Iuan, TZENG Tzu-Chien
Принадлежит:

A dynamic amplifier includes a first output capacitor, a first switch, a current source, a second switch, a voltage detector, a third switch and a level shifter. The first switch is coupled between a first terminal of the first output capacitor and a voltage detection node. The second switch is coupled to the current source and the voltage detection node. The voltage detector is coupled to the voltage detection node and the first switch. The third switch is coupled between the voltage detection node and a power source. The level shifter is coupled to a second terminal of the first output capacitor. 1. A dynamic amplifier , comprising:a first output capacitor;a first switch, coupled between a first terminal of the first output capacitor and a voltage detection node;a current source;a second switch, coupled to the current source and the voltage detection node;a voltage detector, coupled to the voltage detection node and the first switch;a third switch, coupled between the voltage detection node and a power source; anda level shifter, coupled to a second terminal of the first output capacitor.2. The dynamic amplifier of claim 1 , wherein the voltage detector is configured for detecting an output voltage of the first terminal of the first output capacitor via the voltage detection node.3. The dynamic amplifier of claim 1 , further comprising a second output capacitor claim 1 , and the voltage detector comprising:a first detection capacitor, coupled to the voltage detection node;a second detection capacitor, coupled to another voltage detection node for detecting the second output capacitor; anda buffer, coupled to the first switch, for controlling the first switch to be turned on or off according to a common-mode voltage of the first output capacitor and the second output capacitor.4. The dynamic amplifier of claim 1 , wherein the level shifter comprises a switch claim 1 , selectively couple the second terminal of the first output capacitor to a first reference voltage ...

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Номер записи: 55
03-01-2019 дата публикации

COMPARATOR

Номер: US20190007037A1
Автор: Barnhill Ryan, Berkram Daniel Alan, Poirier Christopher Allan, Wilson Christopher, ZHOU Dacheng
Принадлежит:

A comparator includes a resolver controlled by a resolver clock signal and a differential amplifier controlled by a sampling clock signal. The resolver clock signal and the sampling clock signal are such that amplification at the differential amplifier during the reset phase of the resolver clock signal and the reset phase of the sampling clock signal begins during the resolving phase of the resolver. 1. A comparator , comprising:a pulse generator to generate a resolver clock signal having a resolving phase and a resolver reset phase, and a sampling clock signal having a sampling phase occurring during the resolver reset phase, a hold phase occurring during the resolving phase, and a sample reset phase occurring during the resolving phase and the resolver reset phase;a resolver controlled by the resolver clock signal to output a decision during the resolving phase and to stop output during the resolver reset phase;a differential amplifier connected to the resolver and controlled by the sampling clock signal to amplify an input differential signal during the sampling phase, hold the amplified sampling clock signal during the hold phase, and be reset during the sample reset phase.2. The comparator of claim 1 , further comprising:a qualified tap circuit to influence the resolver with a bias voltage during the hold phase, the qualified tap circuit comprising a first qualified differential amplifier controlled by a first qualified clock signal and a second qualified differential amplifier controlled by a second qualified clock signal; whereinthe pulse generator generates a first qualified clock signal pulse coinciding with the sampling phase if a tap data signal corresponding to the qualified tap circuit has a first value, andthe pulse generator generates a second qualified clock signal pulse coinciding the sampling phase of the sampling clock signal if the tap data signal corresponding to the qualified tap circuit has a second value.3. The comparator of claim 2 , ...

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Номер записи: 56
20-01-2022 дата публикации

Power detector

Номер: US20220018882A1
Автор: Abdellatif Bellaouar, Arul Balasubramaniyan, Bhushan Shanti Asuri, Chinmaya Mishra, Gurkanwal Singh Sahota, Jorge Garcia, Muhammad Hassan, Omar Essam El-Aassar, Ravi Sridhara
Принадлежит: Qualcomm Inc

In certain aspects, a method is provided for measuring power using a resistive element coupled between a power amplifier and an antenna. The method includes squaring a voltage from a first terminal of the resistive element to obtain a first signal, squaring a voltage from a second terminal of the resistive element to obtain a second signal, and generating a measurement signal based on a difference between the first signal and the second signal. In some implementations, the resistive element is implemented with a power switch.

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Номер записи: 57
20-01-2022 дата публикации

POWER AMPLIFICATION CIRCUIT AND SEMICONDUCTOR DEVICE

Номер: US20220021352A1
Автор: HONDA Yuri
Принадлежит:

A power amplification circuit includes a first amplifier that amplifies a signal split from an input signal, a second amplifier that amplifies a signal having a different phase from the aforementioned signal, third and fourth amplifiers, and a matching network. The matching network includes a first wiring having a first end connected to an output terminal of the first amplifier and a second end connected to an input terminal of the third amplifier, a second wiring having a first end connected to the input terminal of the third amplifier, and electromagnetically coupled to the first wiring, a third wiring having a first end connected to an output terminal of the second amplifier and a second end connected to an input terminal of the fourth amplifier, and a fourth wiring having a first end connected to the input terminal of the fourth amplifier, and electromagnetically coupled to the third wiring. 1. A power amplification circuit comprising:a first amplifier that is input with a first signal and that is configured to output a first amplified signal from an output terminal of the first amplifier, the first signal being split from an input signal, and the first amplified signal being obtained by amplifying the first signal;a second amplifier that is input with a second signal and that is configured to output a second amplified signal from an output terminal of the second amplifier, the second signal being split from the input signal and having a different phase than the first signal, and the second amplified signal being obtained by amplifying the second signal;a third amplifier comprising an input terminal to which the first amplified signal is input, and that is configured to amplify the first amplified signal and to output a third amplified signal;a fourth amplifier comprising an input terminal to which the second amplified signal is input, and that is configured to amplify the second amplified signal and to output a fourth amplified signal; anda matching network ...

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Номер записи: 58
20-01-2022 дата публикации

Trans-Impedance Amplifier, Chip, and Communications Device

Номер: US20220021360A1
Автор: Baoyue Wei, Yuemiao Di
Принадлежит: Huawei Technologies Co Ltd

A trans-impedance amplifier (TIA) includes a first circuit, a second circuit, and a third circuit. Both the first circuit and the second circuit are coupled to a current source, an operational amplifier, and the third circuit. The first circuit is configured to receive a first current, provide a third voltage to the third circuit, perform shape filtering on the first current, and convert the shape filtered first current to a first voltage for output. The second circuit is configured to receive a second current, provide a fourth voltage to the third circuit, perform shape filtering on the second current, and convert the shape filtered second current to a second voltage for output. The third circuit is configured to cooperate with the first circuit and the second circuit in performing shape filtering. The operational amplifier is configured to provide a small-signal virtual ground point to the first circuit.

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Номер записи: 59
14-01-2016 дата публикации

Capacitive current sensing using a current feedback amplifier

Номер: US20160011242A1
Автор: Michael D. Seeman
Принадлежит: Texas Instruments Inc

A circuit for sensing current in a capacitive network. A first capacitor carries a first current. A second capacitor is connected to the first capacitor thereby forming a current divider. The second capacitor carries a second current which is proportional to the first current. A transimpedance amplifier is connected to the second capacitor and has a voltage output that is proportional to the second current. Using a current feedback amplifier as the transimpedance amplifier significantly improves bandwidth and stability.

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Номер записи: 60
14-01-2021 дата публикации

SYSTEMS AND METHODS FOR PARALLEL PHOTONIC COMPUTING

Номер: US20210011508A1
Автор: Chang Matthew, Nahmias Mitchell A.
Принадлежит:

A system for parallel photonic computation, preferably including one or more source modules, a plurality of multiplication modules, and a plurality of summation modules. In one embodiment, each multiplication module can include a set of input modulators, a splitter, and a plurality of multiplication banks. Each summation module can include one or more detectors. Each summation module preferably receives an output from multiple multiplication modules and computes the sum of all channels of all the received outputs. A method for parallel photonic computation, preferably including generating input signals, computing products, and computing sums. 1. A method for photonic computing comprising , at a photonic computing system comprising a first plurality of multiplication modules (MMs) and a second plurality of summation modules (SMs) , each MM of the first plurality comprising a respective plurality of multiplication banks: for each multiplication bank of the respective plurality, at the multiplication bank, receiving a respective control signal representative of a respective plurality of multiplier values;', 'generating a respective plurality of optical input signals, each optical input signal comprising input signal light within each of a plurality of optical channels, wherein the input signal light of each optical channel of the plurality is representative of a respective multiplicand value; and', providing the optical input signal to a respective multiplication bank of the MM;', 'at the respective multiplication bank, generating a filtered signal by filtering the optical input signal based on the control signal, the filtered signal comprising filtered light within each of the plurality of optical channels; wherein, for each optical channel of the plurality, the filtered light within the optical channel is representative of a respective product of: a multiplier value of the respective plurality and the respective multiplicand value associated with the input signal ...

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Номер записи: 61
12-01-2017 дата публикации

AMPLIFICATION CIRCUIT AND METHOD OF COMPENSATING FOR VOLTAGE OFFSET OF INPUTS

Номер: US20170012589A1
Автор: CHEN Song, JAIN KapiI, QIAN Wenrong, Wang Yongxu, ZHAO Xiaoxiao
Принадлежит: MARVELL WORLD TRADE LTD

Aspects of the disclosure provide an amplification circuit. The amplification circuit includes an amplifier and a first variable resistive device. The amplifier includes first and second input nodes configured to receive the first and second input electrical signals and first and second output nodes configured to output first and second output electrical signals having amplified voltages relative to the first and second input electrical signals. The first variable resistive device is electrically coupled to the second input node of the amplifier. The first variable resistive device being configured to have a selected resistance value to compensate for a direct current (DC) voltage difference between the first and second input electrical signals based on a DC voltage difference between first and second output electrical signals that are output from the first and second output nodes of the amplifier. 1. An amplification circuit , comprising: first and second input nodes configured to receive the first and second input electrical signals; and', 'first and second output nodes configured to output first and second output electrical signals having amplified voltages relative to the first and second input electrical signals; and, 'an amplifier configured to amplify first and second input electrical signals, the amplifier includinga first variable resistive device electrically coupled to the second input node of the amplifier, the first variable resistive device being configured to have a selected resistance value to compensate for a direct current (DC) voltage difference between the first and second input electrical signals, based on a DC voltage difference between first and second output electrical signals that are output from the first and second output nodes of the amplifier.2. The amplification circuit of claim 1 , further comprising a first reference voltage node configured to receive a first reference voltage claim 1 , wherein the first variable resistive device is ...

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Номер записи: 62
11-01-2018 дата публикации

SPLIT SIGNAL DIFFERENTIAL MEMS MICROPHONE

Номер: US20180012588A1
Автор: Albers John J., Froehlich Thomas
Принадлежит: Knowles Electronics, LLC

An integrated circuit includes a first amplifier and a second amplifier. A first impedance matching circuit is coupled to the first amplifier, a first charge pump, and a single MEMS transducer. A second impedance matching circuit is coupled to the second amplifier, a second charge pump, and to the single MEMS transducer. A first capacitive load as measured at an input of first amplifier, and a second capacitive load as measured at an input of the second amplifier exist. The first capacitive load and the second capacitive load are balanced with respect to each other. A single pressure change causes the single MEMS transducer to create a first electrical signal and a second electrical signal. Both the first electrical signal and the second electrical signal are matched or approximately matched in magnitude, and 180 degrees or approximately 180 degrees out of phase with respect to each other. 1. An integrated circuit , comprising:a first amplifier;a second amplifier;a first impedance matching network coupled to the first amplifier, a first charge pump, and a single MEMS transducer;a second impedance matching network coupled to the second amplifier, a second charge pump, and the single MEMS transducer;a first capacitive load; anda second capacitive load, wherein the first capacitive load and the second capacitive load are sized to equalize total capacitance including parasitic capacitances of an interconnect and the single MEMS transducer; andwherein a single pressure change causes the single MEMS transducer to create a first electrical signal and a second electrical signal, each of the first electrical signal and the second electrical signal being matched or approximately matched in magnitude, and 180 degrees or approximately 180 degrees out of phase with respect to each other.2. The integrated circuit of claim 1 , wherein an electrical bias is applied across the single MEMS transducer by the first charge pump and the second charge pump.3. The integrated circuit of ...

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Номер записи: 63
10-01-2019 дата публикации

SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE

Номер: US20190012979A1
Автор: Takahashi Kei
Принадлежит:

A semiconductor device in which variations are controlled is provided. The semiconductor device has a function of converting a digital signal into an analog signal, and includes a digital-analog converter circuit, an amplifier circuit, first to fourth switches, a first output terminal, a second output terminal, and a power source. The amplifier circuit is configured to perform feedback control when the first switch and the fourth switch are on and the second switch and the third switch are off. The amplifier circuit is configured to perform comparison control when the first switch and the fourth switch are off and the second switch and the third switch are on; utilizing this, variations in the digital-analog converter circuit and the amplifier circuit are controlled. 1. A method for driving a semiconductor device comprising a digital-analog converter circuit , an amplifier circuit , and first to fourth switches comprising:performing feedback control by the amplifier circuit when the first switch and the fourth switch are on and the second switch and the third switch are off; andperforming comparison control by the amplifier circuit when the first switch and the fourth switch are off and the second switch and the third switch are on,wherein an output terminal of the digital-analog converter circuit is electrically connected to a non-inverting input terminal of the amplifier circuit,wherein one terminal of the first switch is electrically connected to an inverting input terminal of the amplifier circuit,wherein the other terminal of the first switch is electrically connected to an output terminal of the amplifier circuit,wherein one terminal of the second switch is electrically connected to the inverting input terminal of the amplifier circuit,wherein one terminal of the third switch is electrically connected to the output terminal of the amplifier circuit,wherein one terminal of the fourth switch is electrically connected to the output terminal of the amplifier ...

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Номер записи: 64
03-02-2022 дата публикации

TEMPERATURE MEASUREMENT OF A POWER SEMICONDUCTOR SWITCHING ELEMENT

Номер: US20220032996A1
Автор: VARGHA Balázs
Принадлежит:

A device for determining a temperature of a semiconductor power switch with a built-in temperature-dependent gate resistor may include a non-inverting amplifier circuit comprising an operational amplifier and a feedback resistor. Inverting input of the operational amplifier may be connected to the semiconductor power switch such that a gain of the non-inverting amplifier circuit in a predefined frequency range of an input signal depends on the built-in temperature-dependent gate resistor and the feedback resistor and is a measure of the temperature of the semiconductor power switch. The feedback resistor may be disposed between a negative input and an output of the operational amplifier. 113.-. (canceled)14. A device for determining a temperature of a semiconductor power switch with a built-in temperature-dependent gate resistor , the device comprising a non-inverting amplifier circuit including an operational amplifier and a feedback resistor , wherein an inverting input of the operational amplifier is connected to the semiconductor power switch such that a gain of the non-inverting amplifier circuit in a predefined frequency range of an input signal depends on the built-in temperature-dependent gate resistor and the feedback resistor and is a measure of the temperature of the semiconductor power switch.15. The device of wherein the feedback resistor is disposed between a negative input and an output of the operational amplifier.16. The device of comprising an input claim 14 , wherein the built-in temperature-dependent gate resistor is disposed between a negative input of the operational amplifier and the input of the device.17. The device of wherein in the predefined frequency range of the input signal the built-in temperature-dependent gate resistor forms a substantial part of input impedance of the semiconductor power switch.18. The device of wherein in the predefined frequency range of the input signal the built-in temperature-dependent gate resistor forms a ...

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Номер записи: 65
14-01-2021 дата публикации

Fully Differential Rail-to-Rail Output Amplifier with Inverter-Based Input Pair

Номер: US20210013851A1
Автор: Dabrowski Mieczyslaw M.
Принадлежит:

A fully differential rail-to-rail-output amplifier includes a differential input inverter pair, folded cascode pair, class AB control pair, and class AB output rail-to-rail pair. A drain associated with the folded cascode pair is operatively coupled to the class AB control pair, and the drain associated with the folded cascode pair is unconnected to the current source associated with the class AB control pair. A method of providing fully differential rail-to-rail-output amplification includes coupling a folded cascode pair operatively to a differential input inverter pair, coupling a drain associated with the folded cascode pair operatively to a class AB control pair, and coupling a class AB output rail-to-rail pair operatively to the class AB control pair. 1. A fully differential rail-to-rail-output amplifier , which comprises:a differential input inverter pair, the differential input inverter pair comprising at least one of an n-type channel metal-oxide semiconductor (NMOS) transistor, p-type channel metal-oxide semiconductor (PMOS) transistor, top current source, bottom current source;a folded cascode pair, the folded cascode pair comprising at least one of a NMOS transistor, PMOS transistor, the folded cascode pair operatively coupled to the differential input inverter pair;a class AB control pair, the class AB control pair comprising at least one of a NMOS transistor, PMOS transistor, current source, a drain associated with the folded cascode pair operatively coupled to the class AB control pair, the drain associated with the folded cascode pair being unconnected to the current source associated with the class AB control pair; anda class AB output rail-to-rail pair, the class AB output rail-to-rail pair comprising at least one of a NMOS transistor, PMOS transistor, the class AB output rail-to-rail pair operatively coupled to the class AB control pair.2. The fully differential rail-to-rail-output amplifier claim 1 , as defined by claim 1 , further comprising a ...

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Номер записи: 66
14-01-2021 дата публикации

Measuring current generation circuit

Номер: US20210013852A1
Автор: Chao-Chung HUANG, Chien-Hsien Tsai, Chien-Kuei Chan, Kuo-Jen Kuo, Yi-Xian Jan
Принадлежит: uPI Semiconductor Corp

A measuring current generation circuit coupled to a setting resistor is disclosed. The generation circuit includes a first measuring terminal, a second measuring terminal, a first transconductance amplifier, a second transconductance amplifier and an output circuit. The first transconductance amplifier has a first input terminal and a second input terminal. The first input terminal is coupled to one terminal of the setting resistor. The second input terminal is coupled to another terminal of the setting resistor and coupled to the first measuring terminal. The second transconductance amplifier has a third input terminal and a fourth input terminal. The output circuit is coupled to output terminals of the first transconductance amplifier and the second transconductance amplifier respectively and has a first output terminal and a second output terminal. The first output terminal is coupled to the first input terminal. The second output terminal is coupled to the second measuring terminal.

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Номер записи: 67
14-01-2021 дата публикации

TRANSCEIVER MODULE

Номер: US20210013853A1
Автор: Ito Masahiro
Принадлежит:

A transceiver module according to an embodiment of the present disclosure includes a power amplifier, a first transformer, a low-noise amplifier, and a second transformer. The power amplifier amplifies a transmission signal for outputting to an antenna terminal. The first transformer includes a first winding and a second winding. The first winding is connected to the antenna terminal, and the second winding is connected to an output side of the power amplifier. The low-noise amplifier amplifies a reception signal inputted through the antenna terminal. The second transformer includes the first winding and a third winding connected to an input side of the low-noise amplifier. 1. A transceiver module comprising:a power amplifier that amplifies a transmission signal for output to an antenna terminal;a first transformer including a first winding and a second winding, the first winding being connected to the antenna terminal, the second winding being connected to an output side of the power amplifier;a low-noise amplifier that amplifies a reception signal inputted through the antenna terminal; anda second transformer including the first winding and a third winding connected to an input side of the low-noise amplifier.2. The transceiver module according to claim 1 , wherein at least one of the power amplifier or the low-noise amplifier is a differential amplifier.3. The transceiver module according to claim 1 , further comprising a switch unit for opening or closing a circuit through which a reception signal is sent from the second transformer to the low-noise amplifier.4. The transceiver module according to claim 3 , wherein the switch unit includes a switch claim 3 , one end of the switch being connected to an end of the third winding claim 3 , and another end of the switch being connected to ground.5. The transceiver module according to claim 3 , whereinthe low-noise amplifier is a differential amplifier, andthe switch unit includes a first switch and a second switch, ...

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Номер записи: 68
14-01-2021 дата публикации

AMPLIFICATION CIRCUIT WITH ANALOG MULTIPLEXER

Номер: US20210013876A1
Автор: KAWAHARA Shogo
Принадлежит:

First switches are respectively connected between multiple input terminals and an inverting input of an operational amplifier. Second switches and feedback resistors are respectively sequentially series-connected between an output of the operational amplifier and nodes between the multiple input terminals and the first switches. Third switches are respectively connected between nodes between the second switches and the feedback resistors and an output terminal of an amplification circuit with an analog multiplexer. 1. An amplification circuit with an analog multiplexer having multiple input terminals and one output terminal , the amplification circuit comprising:an operational amplifier;a first switch group of first switches connected between the multiple input terminals and an inverting input terminal of the operational amplifier, respectively;a second switch group of second switches and a feedback resistor group of feedback resistors connected in series with each other between an output of the operational amplifier and nodes, which are between the multiple input terminals and the first switches; anda third switch group of third switches connected between nodes, which are between the second switches and the feedback resistors, and the output terminal, respectively.2. The amplification circuit with an analog multiplexer according to claim 1 , further comprising:an input resistor group of input resistors connected in series between the multiple input terminals and the first switches, respectively.3. The amplification circuit with an analog multiplexer according to claim 2 , further comprising:an offset resistor group of offset resistors connected between nodes, which are between the input resistors and the first switches, and a ground.4. The amplification circuit with an analog multiplexer according to claim 2 , further comprising:an offset resistor group of offset resistors connected between nodes, which are between the input resistors and the first switches, and a ...

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Номер записи: 69
09-01-2020 дата публикации

Low Cost LF Driver Current Sense Topology

Номер: US20200014345A1
Автор: Dochev Dimitar M., Effing Hermanus J., Swanenberg Maarten J.
Принадлежит: NXP B.V.

A switching amplifier circuit () connected to drive an impedance-based output load () includes high side and low side switches (-) configured and connected to connect first and second supply voltage lines to first and second output nodes (ANTP, ANTN) in response to gating control signals, and also includes an output current sensing circuit for measuring a current through the output load with a current sensing resistor (Rs) connected between the second supply voltage line and a source of one or more split gate-source switching transistors (C) in the low side gate-source switching transistor, where a voltage sense circuit connected across the current sensing resistor is configured to sample a voltage across the current sensing resistor for measuring a sense current at the current sensing resistor. 1. A switching amplifier circuit comprising:an output driving circuit comprising a high side switching transistor and low side split gate-source switching transistor connected in series between first and second supply voltage lines;a switch driver circuit configured to drive the switching transistors with first and second respective control signals;an output connection between the switching transistors for driving an output load; andan output current sensing circuit for measuring a current through the output load with a current sensing resistor connected between the second supply voltage line and a source of one or more split gate-source switching transistors in the low side split gate-source switching transistor, wherein the one or more low side split gate-source switching transistors comprises a current sense transistor having a drain node directly connected to the output connection, a source node connected to the current sensing resistor, and a gate node, the gate node of the current sense transistor connected by a connection switch to a shared gate control signal in a first connection state and to the source node of the current sense transistor in a second connection ...

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Номер записи: 70
09-01-2020 дата публикации

LOW NOISE TRANS-IMPEDANCE AMPLIFIERS BASED ON COMPLEMENTARY CURRENT-INJECTION FIELD-EFFECT TRANSISTOR DEVICES

Номер: US20200014349A1
Автор: SCHOBER Robert C., Schober Susan Marya
Принадлежит:

The present invention relates to a novel and inventive compound device structure for a low noise current amplifier or trans-impedance amplifier. The trans-impedance amplifier includes an amplifier portion, which converts current input into voltage using a complimentary pair of novel n-type and p-type current-injection field-effect transistors (NiFET and PiFET), and a bias generation portion using another complimentary pair of NiFET and PiFET. Trans-impedance of NiFET and PiFET and its gain may be configured and programmed by a ratio of width (W) over length (L) of source channel over the width (W) over length (L) of drain channel (W/L of source channel/W/L of drain channel). 1. A trans-impedance amplifier , comprising:a. a first complementary pair of a first n-type current-injection field-effect transistor (NiFET) and a first p-type current-injection field-effect transistor (PiFET); a source, a drain, a gate, and a diffusion of a corresponding conductivity type of said each of said PiFET and NiFET, defining a source channel between said source and said diffusion, and a drain channel between said drain and said diffusion, and said gate is capacitively coupled to said source channel and said drain channel;', 'wherein said source of said NiFET of said each pair is connected to negative power supply and said source of said PiFET of said each pair is connected to positive power supply, and said drains of said NiFET and said PiFET are connected together to form an output; and', 'wherein said gates of said first complimentary pair and said gates of said second complementary pair are connected with said output of said second complementary pair to for generating a bias voltage output;', 'at least one or both of said diffusion of said first NiFET and said diffusion of said first PiFET receives input current; and', 'said output of said first complementary pair forms a voltage output of said trans-impedance amplifier., 'wherein each of said NiFETs and PiFETs comprises, 'b. a ...

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Номер записи: 71
21-01-2016 дата публикации

Reference amplifier coupled to a voltage divider circuit to provide feedback for an amplifier

Номер: US20160020736A1
Автор: Vijayakumar Dhanasekaran
Принадлежит: Qualcomm Inc

An apparatus includes a voltage divider circuit and a reference amplifier coupled to the voltage divider circuit. The reference amplifier is configured to provide a feedback voltage to input circuitry of an amplifier.

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Номер записи: 72
19-01-2017 дата публикации

Rf amplifier

Номер: US20170019075A1
Автор: Gian Hoogzaad
Принадлежит: NXP BV

An RF amplifier comprising an input-transistor having an input-transistor-base terminal, an input-transistor-collector terminal and an input-transistor-emitter terminal; a degeneration-component connected between the input-transistor-emitter terminal and a ground terminal; and a protection-transistor having a protection-transistor-base terminal, a protection-transistor-collector terminal and a protection-transistor-emitter terminal. The input-transistor-base terminal is connected to the protection-transistor-emitter terminal, and the protection-transistor-base terminal is connected to the input-transistor-emitter.

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Номер записи: 73
19-01-2017 дата публикации

GATED CDS INTEGRATOR

Номер: US20170019080A1
Автор: Aslam Shahid, Quilligan Gerard T.
Принадлежит:

A Gated CDS Integrator (GCI) may amplify low-level signals without introducing excessive offset and noise. The GCI may also amplify the low level signals with accurate and variable gain. The GCI may include a modulator preceding an amplifier such that offset or noise present in a signal path between the modulator and a demodulator input is translated to a higher out of band frequency, and thereafter reduced by a double sampled discrete time integrator which also reduces thermal noise. The thermal noise may also be reduced by averaging the output of the discrete time integrator. 1. An apparatus , comprising:a modulator having an output to yield a modulator output;an amplifier having an input connected to the modulator output, the amplifier having an amplifier output; anda discrete time integrator connected to the amplifier output and configured to double sample and demodulate the amplifier output to yield a double sampled/demodulated result, wherein the discrete time integrator performs auto-zero functions before integrating the double sampled/demodulated result.2. The apparatus of claim 1 , wherein the modulator alternately selects one of two inputs claim 1 , an information bearing signal and either its inverse or a reference signal as the output under a control of a clock synchronized to a clock of the discrete time integrator.3. The apparatus of claim 1 , wherein the amplifier incorporates a local auto-zero function which auto-zeros an offset and 1/f noise of the amplifier either continuously or periodically.4. The apparatus of claim 1 , wherein the discrete time integrator integrates the amplifier output for a pre-programmed number of cycles.5. The apparatus of claim 4 , wherein the discrete time integrator incorporates a lossy element to reduce thermal noise and limit gain.6. The apparatus of claim 5 , wherein the lossy element comprises one or more of a switch claim 5 , a capacitor and a timing circuit.7. The apparatus of claim 4 , wherein after the pre- ...

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Номер записи: 74
03-02-2022 дата публикации

Bi-Directional Single-Ended Transmission Systems

Номер: US20220038130A1
Автор: Bouadjel Samir, Kim Heegon, Rajagopal Abhilash
Принадлежит:

Systems for bi-directional single-ended transmission are described. For example, a system may include a receiver with a first differential input terminal and a second differential input terminal, wherein the first differential input terminal is coupled to a first node and the second differential input terminal is coupled to a second node; a transmitter with an output terminal coupled to a third node; a first inductor connected between the first node and the third node; a second inductor connected between the second node and the third node; and a shunt resistor connected between the third node and a ground node. 1. A system comprising:a receiver with a first differential input terminal and a second differential input terminal, wherein the first differential input terminal is coupled to a first node and the second differential input terminal is coupled to a second node;a transmitter with an output terminal coupled to a third node;a first inductor connected between the first node and the third node;a second inductor connected between the second node and the third node; anda shunt resistor connected between the third node and a ground node.2. The system of claim 1 , comprising:a high-pass filter coupling the first differential input terminal to the first node and coupling the second differential input terminal to the second node.3. The system of claim 2 , wherein the high-pass filter comprises:a first capacitor connected between the first differential input terminal and the first node; anda second capacitor connected between the second differential input terminal and the second node.4. The system of claim 1 , comprising:a coaxial cable connector with a first conductor coupled to the first node.5. The system of claim 1 , comprising:a power-over-coax direct current injector coupled to the first node.6. The system of claim 1 , wherein the receiver is configured to operate at a higher carrier frequency than the transmitter.7. The system of claim 1 , wherein the receiver is ...

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Номер записи: 75
18-01-2018 дата публикации

PHYSICAL QUANTITY DETECTION CIRCUIT, PHYSICAL QUANTITY DETECTION DEVICE, ELECTRONIC APPARATUS, AND VEHICLE

Номер: US20180019717A1
Автор: MURASHIMA Noriyuki
Принадлежит:

A physical quantity detection device includes a switched capacitor filter circuit having a first sample-and-hold circuit adapted to sample and hold a first signal, which is based on an output signal of a physical quantity detection element, an amplifier circuit to which an output signal of the first sample-and-hold circuit is input, and a first switched capacitor circuit to which a first output signal of the amplifier circuit is input, wherein an output signal of the first switched capacitor circuit is input to the amplifier circuit, and an A/D conversion circuit adapted to perform an A/D conversion on an output signal of the switched capacitor filter circuit. 1. A physical quantity detection circuit comprising:a switched capacitor filter circuit having a first sample-and-hold circuit adapted to sample and hold a first signal, which is based on an output signal of a physical quantity detection element, an amplifier circuit to which an output signal of the first sample-and-hold circuit is input, and a first switched capacitor circuit to which a first output signal of the amplifier circuit is input, wherein an output signal of the first switched capacitor circuit is input to the amplifier circuit; andan A/D conversion circuit adapted to perform an A/D conversion on an output signal of the switched capacitor filter circuit.2. The physical quantity detection circuit according to claim 1 , wherein a first chopping circuit to which an output signal of the first sample-and-hold circuit is input,', 'an operational amplifier to which an output signal of the first chopping circuit is input, and', 'a second chopping circuit to which an output signal of the operational amplifier is input., 'the amplifier circuit includes'}3. The physical quantity detection circuit according to claim 2 , whereinchopping frequencies in the first chopping circuit and the second chopping circuit are equal to or lower than a half of a sampling frequency with which the A/D conversion circuit samples ...

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Номер записи: 76
18-01-2018 дата публикации

DIFFERENTIAL SIGNAL CONDITIONER WITH COMMON MODE VOLTAGE ERROR COMPENSATION

Номер: US20180019718A1
Автор: JR. James, Klapatch Robert D., Saloio
Принадлежит:

A differential signal conditioner circuit with common mode voltage (CMV) compensation is provided. The circuit includes a signal multiplexer that receives a input signal that includes a high and low signal and a reference CMV signal, a differential amplifier coupled to the signal multiplexer that receives the reference CMV signal and outputs a CMV error value during a first cycle, and receives the input signal and outputs an amplified difference signal during a second cycle. The circuit also includes a CMV measurement circuit that receives the reference CMV signal and outputs a confirmation value during the first cycle, and receives the input signal and outputs a CMV compensation value during the second cycle, and a processing element that receives the CMV error value, the amplified difference signal, the CMV compensation value, and a differential amplifier gain value and generates a CMV compensated output based on the received signals and values. 1. A differential signal conditioner circuit with common mode voltage (CMV) compensation , the differential signal conditioner circuit comprising:a signal multiplexer that receives a differential input signal that comprises a high signal and a low signal and a reference CMV signal;a differential amplifier coupled to the signal multiplexer that:receives the reference CMV signal from the signal multiplexer and outputs a CMV error value during a first cycle, andreceives the differential input signal from the signal multiplexer and outputs an amplified difference signal during a second cycle;a CMV measurement circuit that:receives the reference CMV signal from the signal multiplexer and outputs a confirmation value during the first cycle; andreceives the differential input signal from the signal multiplexer and outputs a CMV compensation value during the second cycle; anda processing element that receives the CMV error value, the amplified difference signal, the CMV compensation value, and a differential amplifier gain value ...

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Номер записи: 77
17-01-2019 дата публикации

Voltage-to-current tranconductance operational amplifier with adaptive biasing

Номер: US20190020323A1
Автор: Frank Joseph Schulz
Принадлежит: Power Integrations Inc

An IC for power conversion includes bias circuitry that generates one or more bias voltages. An adaptive biasing circuit adaptively shifts an input signal having a negative value to a positive value. An operational transconductance amplifier (OTA) receives a supply bias current and the first and second bias voltages. The OTA has first and second input terminals coupled to the input signal and ground, respectively. The OTA has first and second transistors coupled to the first and second input terminals through first and second resistors at first and second internal nodes, respectively. Additional circuitry of the OTA is coupled to the second internal node. The additional circuitry insures that the voltage at the second internal node follows the voltage at the first internal node. The OTA generates an output current signal responsive to a differential input voltage applied across the first and second input terminals.

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Номер записи: 78
16-01-2020 дата публикации

Common mode rejection including temperature drift correction

Номер: US20200021248A1
Автор: Quan WAN
Принадлежит: Analog Devices Inc

An amplifier circuit can have a differential input. A common-mode signal present at the differential input can induce an offset voltage at an output of the amplifier circuit. A compensation can be performed to reduce or eliminate such an offset, such as at a first temperature. Circuits and techniques for drift correction can be performed, such as to correct for residual offset error across an entirety of a specified operation temperature range. In an example, first and second drift correction signal generator circuits can be used, such as to provide signals proportional to a common mode voltage, but having different temperature coefficients.

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Номер записи: 79
16-01-2020 дата публикации

COMPARATOR DIAGNOSTIC SYSTEMS AND METHODS

Номер: US20200021280A1
Автор: Miller Daniel James
Принадлежит: MAXIM INTEGRATED PRODUCTS, INC.

An analog front-end circuit for self-calibrating a comparator, the circuit comprising a comparator in a comparator measurement path; a preamplifier coupled to the comparator by a set of switches; and an amplifier coupled to the preamplifier, the preamplifier receiving a reference signal as a first input and a user-definable reference as a second input, the user-definable reference generating a user-definable value chosen to create a known condition at an output of the preamplifier, the preamplifier determines a residual value that represents a measurement error in a signal path comprising the comparator and is used to adjust the user-definable reference value to calibrate the signal path such that threshold boundaries for the comparator can be adjusted to tighten a comparator specification. 1. An analog front-end circuit for self-calibrating a comparator , the circuit comprising:a comparator in a comparator measurement path;a preamplifier coupled to the comparator by a set of switches; andan amplifier coupled to the preamplifier, the preamplifier receiving a reference signal as a first input and a user-definable reference as a second input, the user-definable reference generating a user-definable value chosen to create a known condition at an output of the preamplifier, the preamplifier determines a residual value that represents a measurement error in a signal path comprising the comparator and is used to adjust the user-definable reference value to calibrate the signal path such that threshold boundaries for the comparator can be adjusted to tighten a comparator specification.2. The circuit according to claim 1 , further comprising one or more switches configured to decouple the preamplifier from the comparator to perform a calibration operation.3. The circuit according to claim 1 , wherein the reference signal and an ADC are decoupled from the preamplifier in regular operation.4. The circuit according to claim 1 , further comprising a programmable data register ...

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Номер записи: 80
21-01-2021 дата публикации

WIRELESS RECEIVER

Номер: US20210021240A1
Автор: CHEN WEN-SHENG, LO An-Hsun, YEH EN-HSIANG, YEH Tzu-Jin
Принадлежит:

A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal. 1. A low noise amplifier (LNA) , comprising:a first transistor configured to provide a first transconductance; anda second transistor configured to provide a second transconductance; and an amplifier; and', 'a first resistor having a first end coupled to a first input of the amplifier and a second end, opposite the first end, coupled to a drain of the first transistor, wherein an output of the amplifier is coupled to a gate of the first transistor, and, 'a common-mode feedback circuit, wherein the common-mode feedback circuit compriseswherein the LNA is configured to use a sum of the first and second transconductances to amplify an input signal, and wherein respective source ends of the first and second transistors are coupled to a blocking capacitor.2. The LNA of claim 1 , wherein the first transistor is an n-type metal-oxide-semiconductor field-effect-transistor claim 1 , and the second transistor is a p-type metal-oxide-semiconductor field-effect-transistor.3. The LNA of claim 1 , further comprising:a second resistor having a third end coupled to the first input of the amplifier; anda third transistor having the first transconductance type, wherein a fourth end of the second resistor, opposite the third end, is ...

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Номер записи: 81
21-01-2021 дата публикации

ISOLATION CIRCUIT

Номер: US20210021241A1
Автор: DONG Zhiwei
Принадлежит: 2Pai Semiconductor Co., Limited

An isolation circuit and a method for providing isolation between two dies are provided. The isolation circuit includes: an isolation module, configured to generate an isolation signal based on an input signal from a first die and to provide isolation between the first die and a second die, where the isolation signal is smaller than the input signal in amplitude, and the first die is coupled with the second die; a latch module, configured to latch the isolation signal at a certain level and output a latched signal; an amplifier module, configured to amplify the latched signal. In the isolation circuit, a modulation module and a demodulation module can be saved. 1. An electrical circuit comprising:an input buffer configured for receiving an input voltage, the input voltage being characterized by a first voltage, the input buffer being positioned on a first die;a first primary capacitor coupled to the input buffer;a division capacitor coupled to the first primary capacitor and a ground terminal;a latch configured generating a latched signal by stabilizing an isolation signal at an intermediate node, the intermediate node being directly coupled to the division capacitor, the isolation signal being characterized by a second voltage, the second voltage level being lower than the first voltage level; andan amplifier coupled to the latch and configured to amplify the latched signal.2. The electrical circuit of wherein the input buffer is further configured for filtering the input signal.3. The electrical circuit of further comprising a second primary capacitor configured in series relative to the first primary capacitor.4. The electrical circuit of wherein the second primary capacitor is positioned on a second die.5. The electrical circuit of wherein the electrical circuit is characterized by a leakage current at a picoampere level claim 1 , and the first primary capacitor is configured to maintain a voltage at a millisecond level.6. The electrical circuit of wherein the ...

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Номер записи: 82
21-01-2021 дата публикации

Robust current sensing during inverse current load conditions

Номер: US20210021269A1
Автор: Alexander Mayer, Florian Brugger, Ioan-Alexandru Tranca
Принадлежит: INFINEON TECHNOLOGIES AG

A current sensing circuit includes load transistors having a current path coupled between a power terminal and corresponding load terminals, sense transistors having a current path coupled between the power terminal and corresponding sense terminals, each sense transistor being coupled to a respective load transistor, N-channel transistors having a current path coupled between a respective sense transistor and a respective sense terminal, an amplifier for selectively equalizing the voltages across one of the load transistors and one of the sense transistors, and bypass circuits coupled to a bulk terminal of the N-channel transistors.

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Номер записи: 83
26-01-2017 дата публикации

CONTROL CIRCUIT FOR USE WITH A FOUR TERMINAL SENSOR, AND MEASUREMENT SYSTEM INCLUDING SUCH A CONTROL CIRCUIT

Номер: US20170023506A1
Автор: "OKeeffe Dermot G.", Bourke Donal, DEMPSEY Dennis A., Kirby Patrick C., LYDEN Colin G.
Принадлежит:

A control circuit for use with a four terminal sensor, the sensor having first and second drive terminals and first and second measurement terminals, the control circuit arranged to drive at least one of the first and second drive terminals with an excitation signal, to sense a voltage difference between the first and second measurement terminals, and control the excitation signal such that the voltage difference between the first and second measurement terminals is within a target range of voltages, and wherein the control circuit includes N poles in its transfer characteristic and N−1 zeros in its transfer characteristic such that when a loop gain falls to unity the phase shift around a closed loop is not substantially 2π radians or a multiple thereof, where N is greater than 1. 1. (canceled)2. A control circuit configured to couple to a biological sensor , the control circuit comprising:an excitation output node configured to provide current for a variable impedance of the biological sensor;a sensor input configured to receive a signal indicative of a voltage across the variable impedance;an amplifier configured to receive the signal and to adjust an excitation voltage at the excitation output node based on a comparison of the signal and a reference voltage.wherein a feedback path of the amplifier is configured to provide a zero of a transfer characteristic of the control circuit at a frequency where the gain of the control circuit is greater than unity gain.3. The control circuit of claim 2 , wherein the transfer characteristic of the control circuit includes N poles and N−1 zeros; andwherein N is an integer greater than 2.4. The control circuit of claim 3 , wherein one of the N poles is implemented using an integrator.5. The control circuit of claim 3 , wherein a pole and zero pair of the N poles and the N−1 zeros is provided by a series combination of a capacitor and a resistor in a feedback loop of an operational amplifier.6. The control circuit of claim 2 , ...

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Номер записи: 84
25-01-2018 дата публикации

SIGNAL DETECTOR, ELECTRONIC DEVICE, AND METHOD FOR CONTROLLING SIGNAL DETECTOR

Номер: US20180024170A1
Автор: Masuda Takashi
Принадлежит:

To accurately detect the presence or absence of a signal. A signal detector includes an input-signal amplifying circuit, a reference-signal amplifying circuit, and a comparator. In the signal detector, the input-signal amplifying circuit amplifies an input signal with a predetermined gain. The reference-signal amplifying circuit amplifies a reference signal at a constant signal-level with a gain that substantially matches the predetermined gain. The comparator compares a signal level of the amplified input signal with a signal level of the amplified reference signal, and outputs the comparison result as a detection signal. 1. A signal detector comprising:an input-signal amplifying circuit configured to amplify an input signal with a predetermined gain;a reference-signal amplifying circuit configured to amplify a reference signal at a constant signal level with a gain that substantially matches the predetermined gain; anda comparator configured to compare a signal level of the amplified input signal with a signal level of the amplified reference signal and output a comparison result as a detection signal.2. The signal detector according to claim 1 , wherein each of the input signal and the reference signal is a periodic signal whose value changes for a constant period claim 1 , and a frequency of the reference signal is lower than that of the input signal.3. The signal detector according to claim 2 , further comprising:an input-signal amplitude detecting circuit configured to detect an amplitude of the amplified input signal and supply the amplitude to the comparator as the signal level; anda reference-signal amplitude detecting circuit configured to detect an amplitude of the amplified reference signal and supply the amplitude to the comparator as the signal level.4. The signal detector according to claim 3 , whereinthe input-signal amplitude detecting circuit detects an amplitude of the input signal with full-wave rectification of the amplified input signal, andthe ...

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Номер записи: 85
10-02-2022 дата публикации

Electronic Proof of Air Flow Switch

Номер: US20220043021A1
Автор: Haessig David Lee, Welton Joshua Lee
Принадлежит: Evolution Controls Inc.

A method and apparatus to electronically sense air flow and close a switch when air flow is adequate to operate an electric heater, HVACR system, or other apparatus. The apparatus is more reliable than electro-mechanical devices often used for this purpose. 1. An EPAFS and probe apparatus for use in an HVACR system comprising: a first sensing diode with a first junction voltage; and', 'a second sensing diode with a second junction voltage;, 'a diode probe comprisinga half wave rectifier, wherein the half wave rectifier provides a heating pulse to heat the first sensing diode during a heating period and no heating pulse during a measuring period;a differential amplifier, wherein the differential amplifier measures a difference between the first junction voltage of the first sensing diode and the second junction voltage of the second sensing diode during the measuring period, and outputs a first output signal based on the difference between the first junction voltage and the second junction voltage;an inverter-amplifier circuit, wherein the inverter-amplifier circuit amplifies the first output signal from the differential amplifier and outputs a second output signal;a microcontroller, wherein the microcontroller compares the second output signal from the inverter-amplifier circuit to a threshold value;a switch for connecting to a forced air electric heating apparatus; andwherein the microcontroller is connected to the switch, and wherein the microcontroller turns off the switch when the second output signal exceeds the threshold value.2. The EPAFS and probe apparatus of further comprising a potentiometer for setting the threshold.3. The EPAFS and probe apparatus of wherein the switch is a solid-state switch.4. The EPAFS and probe apparatus of wherein the half wave rectifier comprises a diode.5. The EPAFS and probe apparatus of wherein the microcontroller further comprises an analog-to-digital converter.6. The EPAFS and probe apparatus of further comprising:a pull up ...

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Номер записи: 86
26-01-2017 дата публикации

FEEDBACK COMPENSATION FOR MULTISTAGE AMPLIFIERS

Номер: US20170026007A1
Автор: BLUM Gregory A., Zhang Xu
Принадлежит:

Feedback compensation for multistage amplifiers. In some embodiments, an amplifier can include a first stage, a second stage, and a third stage implemented in series between an input node and an output node. The amplifier can further include a first feedback path implemented between an output of the third stage and a node between the first and second stages, with the first feedback including a first capacitance. The amplifier can further include a second feedback path implemented between the output of the third stage and an output of the second stage. The second feedback pack can include a transconductance element and a second capacitance arranged in series. In some embodiments, such an amplifier can be configured as an operational-amplifier. 1. An amplifier comprising:a first stage, a second stage, and a third stage implemented in series between an input node and an output node;a first feedback path implemented between an output of the third stage and a node between the first and second stages, the first feedback including a first capacitance; anda second feedback path implemented between the output of the third stage and an output of the second stage, the second feedback path including a transconductance element and a second capacitance arranged in series.2. The amplifier of further comprising a cascode transistor implemented between an output of the first stage and an input of the second stage.3. The amplifier of wherein the first feedback path includes the cascode transistor such that the first feedback path couples the output of the third stage with the input of the second stage.4. The amplifier of wherein the cascode transistor includes a source connected to the output of the first stage claim 3 , and a drain connected to the input of the second stage.5. The amplifier of wherein further comprising a feed-forward element implemented between the input of the second stage and the output of the third stage.6. The amplifier of wherein the feed-forward element ...

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Номер записи: 87
25-01-2018 дата публикации

NOISE CANCELLING BASEBAND AMPLIFIER

Номер: US20180026584A1
Автор: KIM Namsoo, Park Joung Won
Принадлежит:

An apparatus includes a first amplifier having a first feedback resistance and an output configured to be coupled to a first input of a second amplifier having a second feedback resistance. The apparatus includes a third amplifier coupled to an input of the first amplifier and having an output configured to be coupled to a second input of the second amplifier. 1. An apparatus comprising:a low noise amplifier;a mixer coupled to the low noise amplifier;a first differential amplifier having a first input configured to receive an input signal from the mixer and having an output configured to be coupled to an inverting input of a second differential amplifier; anda single-ended amplifier having an input coupled to the first input of the first differential amplifier and having an output configured to be coupled to a non-inverting input of the second differential amplifier, the single-ended amplifier configured to receive the input signal.2. The apparatus of claim 1 , wherein the first differential amplifier is coupled to a first feedback resistor claim 1 , wherein the second differential amplifier is coupled to a second feedback resistor claim 1 , and wherein the single-ended amplifier has a gain based on a first feedback resistance of the first feedback resistor and a second feedback resistance of the second feedback resistor.3. The apparatus of claim 2 , wherein the gain is further based on an input resistance to the first differential amplifier and an input resistance to the second differential amplifier.4. The apparatus of claim 1 , wherein the first differential amplifier includes a trans-impedance amplifier claim 1 , wherein the first input of the first differential amplifier comprises an inverting input claim 1 , and wherein the first differential amplifier has a non-inverting input coupled to ground.5. The apparatus of claim 1 , wherein the second differential amplifier comprises a programmable baseband amplifier.6. The apparatus of claim 2 , wherein the gain of ...

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Номер записи: 88
25-01-2018 дата публикации

Selectable Programmable Gain Or Operational Amplifier

Номер: US20180026596A1
Автор: Bartling James E., Kris Bryan
Принадлежит: MICROCHIP TECHNOLOGY INCORPORATED

An integrated circuit amplifier configurable to be either a programmable gain amplifier or an operational amplifier comprises two output blocks, one output block is optimized for programmable gain amplifier operation, and the other output block is optimized for operational amplifier applications. A common single input stage, input offset calibration and bias generation circuits are used with either amplifier configuration. Thus duplication of the input stage, offset calibration and bias generation circuits are eliminated while still selectably providing for either a programmable gain amplifier or operational amplifier configuration. 1. A configurable amplifier , comprising:a differential input stage;a first output block;a second output block;a plurality of switches coupled to the differential input stage, the first output block and the second output block;at least one configuration line controlling a switching position of said plurality of switches; when a logic state on said configuration line defines a programmable gain amplifier setting, the plurality of switches are controlled such that the differential input stage and the first output block are coupled together as a programmable gain amplifier and comprises a feedback loop, wherein at least one switch of said plurality of switches changes a feedback resistance of the feedback loop, and', 'when another logic state of said configuration line defines an operational amplifier setting, the plurality of switches are controlled such that the differential input stage and the second output block are coupled together as an operational amplifier without a feedback loop., 'wherein'}2. The configurable amplifier according to claim 1 , wherein the first output block comprises a first intermediate stage and a first output stage claim 1 , and the second output block comprises a second intermediate stage and a second output stage.3. The configurable amplifier according to claim 1 , further comprising a bias circuit coupled to ...

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Номер записи: 89
29-01-2015 дата публикации

SIGNAL RECEIVER

Номер: US20150028954A1
Автор: Chen Chao-An, HUNG Yu-Chieh, SHIU JIAN-FENG, TYAN EER-WEN
Принадлежит:

A signal receiver includes a current source providing a current having a current value, a pair of active input devices, and a pair of resistors. Each active input device includes a control node, a first conduction node, and a second conduction node. One of the control nodes receives an input signal. The first conduction nodes are connected to each other and receive the current. One of the second conduction nodes serves as an output node. The active input devices output an output signal to a core circuit according to the current and the input signal. Each resistor has a resistance value. A target voltage value is determined according to the resistance value and the current value, such that a voltage swing of the output signal is limited within the target voltage value, and an operating voltage of the core circuit is substantially equal to the target voltage value. 1. A signal receiver , comprising:a current source, configured to provide a current having a current value;a pair of active input devices, each of the pair of active input devices having a control node, a first conduction node and a second conduction node, one control node of the pair of active input devices receiving an input signal, the first conduction nodes connected and receiving the current, one of the second conduction nodes serving as an output nodes, the pair of active input devices outputting an output signal to a core circuit according to the current and the input signal; anda pair of resistors, each resistor having a resistance value and connected between one of the second conduction nodes and a power line;wherein, a target voltage value is determined according to the resistance value and the current value, such that a voltage swing of the output signal is limited within the target voltage value, and an operating voltage of the core circuit is substantially equal to the target voltage value.2. The signal receiver according to claim 1 , wherein the signal receiver is formed in an integrated ...

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Номер записи: 90
25-01-2018 дата публикации

COMPARATOR, CIRCUIT DEVICE, PHYSICAL QUANTITY SENSOR, ELECTRONIC DEVICE, AND VEHICLE

Номер: US20180026647A1
Автор: Haneda Hideo
Принадлежит:

A comparator includes a first voltage-time conversion circuit, a second voltage-time conversion circuit, and a determination circuit. A first delay unit includes a first primary conductivity type transistor of which current is controlled based on a first input signal, a first secondary conductivity type transistor of which current is controlled based on a second input signal, and a first delay buffer provided between the transistors. A second delay unit includes a second primary conductivity type transistor of which current is controlled based on a second input signal, a second secondary conductivity type transistor of which current is controlled based on a first input signal, and a second delay buffer provided between the transistors. 1. A comparator comprising:a first voltage-time conversion circuit which includes a first delay circuit, the first delay circuit being configured to receive a first input signal and a second input signal;a second voltage-time conversion circuit which includes a second delay circuit, the second delay circuit being configured to receive the first input signal and the second input signal; anda determination circuit communicating with the first and second voltage-time conversion circuits, the determination circuit being configured to determine a magnitude relation of the first input signal and the second input signal, based on an output signal of the first voltage-time conversion circuit and an output signal of the second voltage-time conversion circuit, a first primary conductivity type transistor, a current of the first primary conductivity type transistor being controlled based on the first input signal,', 'a first secondary conductivity type transistor, a current of the first secondary conductivity type transistor being controlled based on the second input signal, and', 'a first delay buffer provided between the first primary conductivity type transistor and the first secondary conductivity type transistor, the first delay buffer ...

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Номер записи: 91
28-01-2021 дата публикации

LOW NOISE FRONTENDS FOR LIDAR RECEIVER AND METHODS FOR CONTROLLING THE SAME COMPRISING A MULTIPLEXING CIRCUIT FOR SELECTIVELY CONNECTING EACH PHOTODETECTOR TO A SHARED AMPLIFIER

Номер: US20210025991A1
Автор: Chawla Vipul, Kong Lingkai, Lu Yue
Принадлежит: BEIJING VOYAGER TECHNOLOGY CO., LTD.

An optical signal detection system includes a plurality of photodetectors configured to detect optical signals reflected from an environment surrounding the optical signal detection system and convert the optical signals into electrical signals. The optical signal detection system also includes an amplifier coupled to the plurality of photodetectors. The amplifier is shared by the plurality of photodetectors and configured to generate an output signal by amplifying an individual electrical signal converted by a corresponding photodetector. The optical signal detection system further includes a multiplexing circuit configured to selectively establish a connection between one of the plurality of photodetectors and the amplifier to amply the electrical signal converted by that photodetector. 1. An optical signal detection system , comprising:a plurality of photodetectors configured to detect optical signals and convert the optical signals into electrical signals; andan amplifier coupled to the plurality of photodetectors via a multiplexing circuit, wherein the multiplexing circuit is configured to selectively establish a connection between one of the plurality of photodetectors and the amplifier to amplify the electrical signal converted by that photodetector.2. The optical signal detection system of claim 1 , wherein the amplifier comprises a plurality of input branches arranged in parallel claim 1 , each of the plurality of input branches being coupled to one of the plurality of photodetectors.3. The optical signal detection system of claim 2 , wherein the plurality of input branches are connected to a low-impedance node of the amplifier.4. The optical signal detection system of claim 3 , wherein the low-impedance node of the amplifier is at a source terminal of an input transistor of the amplifier.5. The optical signal detection system of claim 1 , wherein the multiplexing circuit comprises a plurality of switches claim 1 , at least one of the plurality of switches ...

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Номер записи: 92
10-02-2022 дата публикации

Amplifier circuit using voltage-to-current conversion to achieve unity feedback factor and input common-mode rejection for linear amplifier and associated envelope tracking supply modulator using the same

Номер: US20220045647A1
Автор: Kuan-Ta Chen, Shih-Hsiung Chien, Sung-Han Wen
Принадлежит: MediaTek Inc

An amplifier circuit includes a voltage-to-current conversion circuit and a current-to-voltage conversion circuit. The voltage-to-current conversion circuit generates a current signal according to an input voltage signal, and includes an operational transconductance amplifier (OTA) used to output the current signal at an output port of the OTA. The current-to-voltage conversion circuit generates an output voltage signal according to the current signal, and includes a linear amplifier (LA), wherein an input port of the LA is coupled to the output port of the OTA, and the output voltage signal is derived from an output signal at an output port of the LA.

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Номер записи: 93
10-02-2022 дата публикации

OFFSET COMPENSATION CIRCUITRY FOR AN AMPLIFICATION CIRCUIT

Номер: US20220045657A1
Автор: EGGERMONT Jean-Paul Anna Joseph
Принадлежит: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Offset compensation circuitry for an amplification circuit. One example embodiment is a method of compensating a primary operational amplifier including: creating, by way of a companion circuit, a square wave having an amplitude, a period, and a direct current bias (DC bias), the amplitude proportional to an offset of the primary operational amplifier; integrating, by the companion circuit, the amplitude of the square wave for less than the period of the square wave, the integrating creates a compensation signal; and applying the compensation signal to the primary operational amplifier. 1. A method of compensating a primary operational amplifier comprising:creating, by way of a companion circuit, a square wave having an amplitude, a period, and a direct current bias (DC bias), the amplitude proportional to an offset of the primary operational amplifier;integrating, by the companion circuit, an amplitude of the square wave for less than the period of the square wave, the integrating creates a compensation signal; andapplying the compensation signal to the primary operational amplifier.2. The method of further comprising:applying a feedback signal across a first input and a second input of the primary operational amplifier;selectively applying the feedback signal across a first input and a second input of a sense amplifier, the sense amplifier is distinct from the primary operational amplifier; andgenerating, at an output of the sense amplifier, the square wave.3. The method of wherein the selectively applying the feedback signal further comprises:applying the feedback signal to the first and second inputs with a first polarity; and thenapplying the feedback signal to the first and second inputs with a second polarity opposite the first polarity.4. The method of wherein the selectively applying the feedback signal further comprises selectively applying the feedback signal across the first and second inputs of the sense amplifier being an operational transconductance ...

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Номер записи: 94
10-02-2022 дата публикации

CURRENT MODE LOGIC DRIVER AND TRANSMISSION DRIVER INCLUDING THE SAME

Номер: US20220045701A1
Автор: KIM Sang Kyung, ROH Gil Sung
Принадлежит: MAGNACHIP SEMICONDUCTOR, LTD.

A transmission driver includes a pulse generator and a current mode logic driver. The pulse generator is configured to generate and output a first pulse signal by synchronizing at a falling edge time point of a first input signal, and generate and output a second pulse signal by synchronizing at a falling edge time point of a second input signal. The current mode logic driver is configured to output a pre-emphasis signal to which pre-emphasis technique has been applied by changing a first load resistance value and a second load resistance value based on the first pulse signal and the second pulse signal, respectively. 1. A transmission driver , comprising:a pulse generator configured to generate and output a first pulse signal by synchronizing at a falling edge time point of a first input signal, and generate and output a second pulse signal by synchronizing at a falling edge time point of a second input signal; anda current mode logic driver configured to output a pre-emphasis signal to which pre-emphasis technique has been applied by changing a first load resistance value and a second load resistance value based on the first pulse signal and the second pulse signal, respectively.2. The transmission driver of claim 1 , further comprising a phase inverter configured to receive an input signal and output the first input signal and the second input signal to the pulse generator and the current mode logic driver claim 1 , respectively.3. The transmission driver of claim 2 , wherein the phase inverter comprises:a first OP amp configured to generate the first input signal by buffering the input signal; andan inverting amplifier, comprising two resistors and a second OP amp, configured to generate the second input signal by inverting a phase of the first input signal.4. The transmission driver of claim 1 , wherein the current mode logic driver comprises:a first NMOS transistor, configured to receive the first input signal through a gate terminal, connected between a first ...

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Номер записи: 95
28-01-2021 дата публикации

SIGNAL AMPLIFIER CIRCUIT HAVING HIGH POWER SUPPLY REJECTION RATIO AND DRIVING CIRCUIT THEREOF

Номер: US20210028747A1
Автор: HU Min-Hung
Принадлежит:

A signal amplifier circuit having high power supply rejection ratio includes: a pre-amplifier which generates a driving signal at a driving control node; and a driving circuit which converts an input power to an output power. The driving circuit includes: a driving transistor, having a first terminal coupled to the input power and a second terminal coupled to the output power; and a power rejection circuit which includes a noise selection circuit. When the driving transistor operates in its linear region, the power rejection circuit senses an AC component of a power noise of the input power to generate an operation noise signal. The power rejection circuit generates the power rejection signal in AC form according to the operation noise signal to reject the power noise so as to increase the power supply rejection ratio. 1. A signal amplifier circuit , comprising:a pre-amplifier circuit, which is configured to operably generate a driving signal at a driving control node; and a driving transistor having a first terminal coupled to the input power, a second terminal coupled to the output power, and a control terminal coupled to the driving signal, wherein a voltage difference between the first terminal of the driving transistor and the control terminal of the driving transistor determines a conduction level of the driving transistor, so as to convert the input power to the output power; and', 'a noise selection circuit, which is configured to operably detect and determine whether the driving transistor operates in a first operation region; wherein when the driving transistor operates in the first operation region, the noise selection circuit senses the AC component of the power noise of the input power according to a voltage difference between the first terminal and the second terminal, so as to generate an operation noise signal;', 'a power rejection circuit, which is configured to operably generate a power rejection signal at the driving control node according to the ...

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Номер записи: 96
28-01-2021 дата публикации

APPARATUS AND METHODS FOR REMOVING A LARGE-SIGNAL VOLTAGE OFFSET FROM A BIOMEDICAL SIGNAL

Номер: US20210029053A1
Автор: DRAKULIC Budimir S., FAKHAR Sina, Foxall Thomas G., VLAJINIC Branislav
Принадлежит: BioSig Technologies, Inc.

Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time. 1. A circuit for removing a large differential voltage offset from a biomedical signal , comprising:a first operational amplifier having a differential input and a differential output, and configured to receive the biomedical signal with the large differential voltage offset at the differential input;a second operational amplifier having a common mode voltage input and configured to output a common mode reference voltage to a common mode node;a first pair of diode stages coupled between respective ones of the differential output of the first operational amplifier and respective ones of a first differential node and a second differential node;a plurality of timing banks coupled between the respective ones of the first differential node and the second differential node and the common mode node; anda second pair of diode stages coupled between the respective ones of the first differential node and the second differential node and the common mode node, wherein the large differential voltage offset is attenuated at an output of each of the second pair of diode stages.2. The circuit ...

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Номер записи: 97
02-02-2017 дата публикации

BUFFER AMPLIFIER CIRCUIT FOR ENHANCING THE SLEW RATE OF AN OUTPUT SIGNAL AND DEVICES INCLUDING THE SAME

Номер: US20170032755A1
Автор: Ko Ju Hyun, Song Jun Ho, SONG Yong Joo
Принадлежит:

A buffer amplifier circuit includes a buffer amplifier including a first differential amplifier having a first active load and a second differential amplifier having a second active load and a feedback circuit configured to feed an output signal of an output terminal of the buffer amplifier back to one of the first and second active loads using differential switch signals and an input signal of the buffer amplifier to enhance a slew rate of the output signal. 1. A buffer amplifier circuit comprising:a buffer amplifier including a first differential amplifier having a first active load and a second differential amplifier having a second active load; anda feedback circuit configured to feed an output signal of an output terminal of the buffer amplifier back to one of the first active load and second active load using differential switch signals and an input signal of the buffer amplifier to enhance a slew rate of the output signal.2. The buffer amplifier circuit of claim 1 , wherein the feedback circuit comprises:a first transmission circuit configured to transmit the output signal to the first active load in response to the input signal and one of the differential switch signals; anda second transmission circuit configured to transmit the output signal to the second active load in response to the input signal and the other one of the differential switch signals.3. The buffer amplifier circuit of claim 1 , wherein the first active load enhances a falling slew rate of the output signal and the second active load enhances a rising slew rate of the output signal.4. The buffer amplifier circuit of claim 3 , wherein the first active load includes P-channel metal oxide semiconductor (PMOS) transistors and the output signal of the buffer amplifier controls a gate voltage of the PMOS transistors to enhance the falling slew rate; andthe second active load includes N-channel metal oxide semiconductor (NMOS) transistors and the output signal of the buffer amplifier controls a ...

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Номер записи: 98
01-02-2018 дата публикации

PROGRAMMABLE AMPLIFIER AND METHOD OF OPERATING THE SAME

Номер: US20180034430A1
Автор: AHMED Abdullah, SYKES Frederick Edward
Принадлежит: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

A programmable amplifier includes an amplifier, an input capacitor, a feedback circuit, and a high-pass filter circuit. The amplifier has an input coupled to the input capacitor for receiving an input signal. The feedback circuit includes multiple feedback capacitors of differing capacitance values that are each selectively coupled between the output of the amplifier and the input of the amplifier using multiple first switches. The high-pass filter circuit includes multiple switched capacitors of differing capacitance values that are each selectively coupled between the amplifier output and a ground node using multiple second switches. The first switches are configured to be selectively switched on for activating at least one feedback capacitor to adjust a gain of the amplifier, while the second switches are configured to be selectively switched at a first and second phase of a clock signal to adjust a high-pass cutoff frequency of the amplifier independently of how the gain is adjusted. 1. A programmable amplifier comprising:an amplifier having an amplifier input and an amplifier output;an input capacitor coupled to the amplifier input and configured to receive a signal;a feedback circuit comprising a plurality of feedback capacitors of differing capacitance values that are each selectively coupled between the amplifier output and the amplifier input by a corresponding plurality of first switches;a high-pass filter circuit comprising a plurality of switched capacitors of differing capacitance values that are each selectively coupled between the amplifier output and a ground node by a corresponding plurality of second switches, the high-pass filter circuit including a clock circuit for alternatively coupling the switched capacitors between the amplifier output and the amplifier input,wherein at least one of the plurality of first switches is configured to be switched on for activating at least one feedback capacitor to adjust a gain of the amplifier, and wherein at ...

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Номер записи: 99
04-02-2021 дата публикации

LOW-GLITCH RANGE CHANGE TECHNIQUES

Номер: US20210033644A1
Автор: "DAquino Stefano I.", Collins Edward L., Pierdomenico Jennifer W.
Принадлежит:

Techniques are provided for changing a range of an output circuit with little or no voltage or current glitch. In an example, a method of changing a range of an output signal can include providing a first level of the output signal at an output of a first amplifier based on a received setpoint signal and receiving a range change command. In response to the range change command an input of a second amplifier can be shorted to an output of the second amplifier for a first interval. At the end of the first interval and over a second interval, a first impedance between the input of the second amplifier and the output of the second amplifier can be increased, and a second impedance between the input of the second amplifier and the setpoint signal can be increased. 1. An amplifier circuit configured to receive a test setpoint at a setpoint input and to provide a test signal to a device under test based on the test setpoint , the amplifier circuit comprising:a first amplifier having an output configured to provide the test signal;a first impedance device coupled between the setpoint input and the output of the first amplifier, the first impedance device including a first tap coupled to an input of the first amplifier; and initiate a startup interval;', 'short circuit the first tap, via the first impedance device, to the output of the first amplifier at a first instance of the startup interval;', 'during the startup interval, after the first instance and via the first impedance device, increase impedance between the first tap and the output of the first amplifier; and', 'at a conclusion of the startup interval and via the first impedance device, short the first tap to the setpoint input., 'a control circuit configured to2. The amplifier circuit of claim 1 , wherein the first impedance device includes:a first plurality of resistors coupled in series;second plurality of resistors coupled in series and having a first endpoint termination and a second endpoint termination; anda ...

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Номер записи: 100
30-01-2020 дата публикации

EMBEDDED UNIVERSAL SERIAL BUS 2 REPEATER

Номер: US20200034323A1
Автор: ERDOGAN Mustafa Ulvi, HUANG Huanzhang, MAUNG Win Naing, SHARMA Bhupendra, VINING Suzanne Mary, WENTE Douglas Edward
Принадлежит:

Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data. 1. A circuit , comprising:a first amplifier having a first input coupled to a first node, a second input coupled to a second node, a first output, and a second output;a second amplifier having a first input coupled to the first output of the first amplifier, a second input coupled to the second output of the first amplifier, a first output coupled to a third node, and a second output coupled to a fourth node;a third amplifier having a first input coupled to the third node, a second input coupled to the fourth node, a first output coupled to a fifth node, a second output coupled to a sixth node, and a control input;a first resistor coupled between the first node and a seventh node;a second resistor coupled between the seventh node and the second node;a first comparator having a first input coupled to the seventh node, a second input coupled to an eighth node, and an output;a bus holder circuit having an input, a first output coupled to the third node, and a second output coupled to the fourth node; anda logic circuit having a first input coupled to the output of the first comparator, a first output coupled to the input of the bus holder circuit, and a second output coupled to the control input of the third amplifier.2. The circuit of claim 1 , further comprising a squelch detector having a first input coupled to the first node claim 1 , a second input coupled ...

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Номер записи: 101
17-02-2022 дата публикации

Low noise amplifier

Номер: US20220052652A1
Автор: Jarkko Jussila, Pete Sivonen
Принадлежит: NORDIC SEMICONDUCTOR ASA

A low noise amplifier comprising a first transconductance amplifier arranged to receive an input voltage at its input terminal and to generate an output current at its output terminal. A second transconductance amplifier is arranged such that its input terminal is connected to the input terminal of the first transconductance amplifier, and such that the output terminal of the second transconductance amplifier is connected to the input terminal of the second transconductance amplifier via a capacitive feedback network (C 1 ).

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Номер записи: 102
17-02-2022 дата публикации

INPUT BUFFER CIRCUIT

Номер: US20220052659A1
Автор: Chang Chien-Yi, TSAI CHENG-HUNG
Принадлежит:

An input buffer circuit includes an input differential amplifier unit, a differential amplifier stage, and a buffer. The input differential amplifier unit has input terminals and at least one output terminal, wherein at least two of the input terminals of the input differential amplifier unit are configured to be capacitively coupled respectively so as to provide at least one pair of signal paths for a first input signal and a second input signal of a differential input signal. The differential amplifier stage, coupled to the input differential amplifier unit, has first and second differential input terminals, and a corresponding output terminal, wherein the first and second differential input terminals are capable of being coupled to the first input signal and the second input signal respectively. The buffer, coupled to the output terminal of the differential amplifier stage, is used for outputting an output single-ended signal. 1. An input buffer circuit , the input buffer circuit comprising:an input differential amplifier unit having a plurality of input terminals and at least one output terminal, wherein at least two of the input terminals of the input differential amplifier unit are configured to be capacitively coupled respectively so as to provide at least one pair of capacitively coupled signal paths for a first input signal and a second input signal of a differential input signal;a differential amplifier stage, coupled to the input differential amplifier unit, having a first differential input terminal, a second differential input terminal, and a corresponding output terminal, wherein the first differential input terminal and the second differential input terminal are capable of being coupled to the first input signal and the second input signal respectively; anda buffer, coupled to the output terminal of the differential amplifier stage, for outputting an output single-ended signal,wherein the input differential amplifier unit and the differential ...

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Номер записи: 103
17-02-2022 дата публикации

TRANSCONDUCTOR CIRCUITRY WITH ADAPTIVE BIASING

Номер: US20220052660A1
Автор: GREER Nigel, Steiner Matthias
Принадлежит:

A transconductor circuitry () with adaptive biasing comprises a first input terminal (ElOa) to apply a first input signal (inp), and a second input terminal (ElOb) to apply a second input signal (inn). A control circuit () is configured to control a first controllable current source () in a first current path () and a second controllable current source () in a second current path () in response to at least one of a first potential of a first node (N) of the first current path () and a second potential of a second node (N) of the second current path (). The first node (N) is located between a first transistor () and the first controllable current source (), and the second node (N) is located between a second transistor () and the second controllable current source (). 1. A transconductor circuitry with adaptive biasing , comprising:a first input terminal to apply a first input signal,a second input terminal to apply a second input signal,a first current path including a first transistor and a first controllable current source to adjust a first biasing current of the first transistor in the first current path, the first transistor having a control node being coupled to the first input terminal,a second current path including a second transistor and a second controllable current source to adjust a second biasing current of the second transistor in the second current path, the second transistor having a control node being coupled to the second input terminal,a control circuit being configured to control the first and the second controllable current source in response to at least one of a first potential of a first node of the first current path and a second potential of a second node of the second. current path,wherein the first node located between the first transistor and the first controllable current source, and the second node is located between the second transistor and the second controllable current source.2. The transconductor circuitry of claim 1 , wherein the ...

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Номер записи: 104
17-02-2022 дата публикации

Low-noise switched-capacitor circuit

Номер: US20220052704A1
Автор: Jesper Steensgaard-Madsen
Принадлежит: Analog Devices Inc

Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.

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Номер записи: 105
04-02-2021 дата публикации

LOAD LINE CIRCUIT FOR VOLTAGE REGULATORS

Номер: US20210034084A1
Автор: ZOU Han
Принадлежит: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

A voltage regulator with a load line circuit is disclosed. The load line circuit is configured to receive a sensed voltage corresponding to an output current of the voltage regulator. The load line circuit is further configured to generate a complex (e.g., nonlinear) load line voltage that is combined with the output voltage of the voltage regulator and compared with a set voltage of the voltage regulator to produce an error signal. The error signal is used as feedback for the voltage regulator so that the output voltage of the voltage regulator can droop by a particular amount corresponding to a particular output current of the voltage regulator. The disclosed analog approach requires neither clock signals nor digital circuitry and utilizes a parallel topology that allows the disclosed approach to be fast and energy efficient. 1. A voltage regulator , comprising: a plurality of amplifiers each amplifier configured to amplify the sensed voltage with a gain to form different slopes of the load line; and', 'a plurality of limiters, each limiter configured to clamp signals in the load line circuit to form inflection points at boundaries of portions of the load line., 'a load line circuit configured receive a sensed voltage corresponding to an output current of the voltage regulator and, based on the sensed voltage, to generate a load-line voltage that when added to an error signal of the voltage regulator causes an output voltage of the voltage regulator to follow a load line, the load line circuit including2. The voltage regulator according to further comprising:a differential amplifier configured to compare the output voltage to a set voltage in order to generate the error signal; anda pulse-width-modulation (PWM) controller configured to control a regulator circuit to adjust the output voltage based on the error signal.3. The voltage regulator according to claim 2 , further comprising:additional regulator circuits controlled by the PWM controller, the regulator ...

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Номер записи: 106
31-01-2019 дата публикации

TRANS-IMPEDANCE AMPLIFIER

Номер: US20190036489A1
Автор: ZOU Hehong
Принадлежит: Hangzhou Hongxin Microelectronics Technology Co., Ltd.

The present disclosure provides a trans-impedance amplifier, comprising: an inverting amplifier circuit, having an input end and an output end. The input end is coupled to an optical diode and is used for accessing an input voltage signal, and the output end is used for outputting an amplified voltage signal. The inverting amplifier circuit comprises at least three sequentially-connected amplifier units. Each of the amplifier units comprises two mutually-coupled N-type transistors, wherein one N-type transistor is used for receiving an input voltage, and the other N-type transistor is used for receiving a DC voltage signal. A common connection end of the two N-type transistors is used for outputting an amplified voltage signal, and the N-type transistor used for receiving the DC voltage signal adopts a native NFET. The trans-impedance amplifier further comprises a feedback resistor coupled to the input end and the output end of the inverting amplifier circuit. 1. A trans-impedance amplifier , comprising:an inverting amplifier circuit, having an input end and an output end, the input end being coupled to an optical diode and used for accessing an input voltage signal, the output end being used for outputting an amplified voltage signal, the inverting amplifier circuit comprising at least three sequentially-connected amplifier units, each of the amplifier units comprising two mutually-coupled N-type transistors, one N-type transistor being used for receiving an input voltage, the other N-type transistor being used for receiving a DC voltage signal, a common connection end of the two N-type transistors being used for outputting an amplified voltage signal, wherein the N-type transistor used for receiving a DC voltage signal adopts a native NFET; anda feedback resistor, coupled to the input end and the output end of the inverting amplifier circuit.2. The trans-impedance amplifier according to claim 1 , wherein the inverting amplifier circuit comprises three amplifier ...

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Номер записи: 107
04-02-2021 дата публикации

Device and method for voltage controlled oscillator comprising distributed active transformer cores

Номер: US20210036659A1
Автор: Andrea Pallotta
Принадлежит: STMICROELECTRONICS SRL

The present disclosure relates to a voltage controlled oscillator comprising a plurality of oscillator cores magnetically coupled in series.

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Номер записи: 108
04-02-2021 дата публикации

RC OSCILLATING CIRCUIT

Номер: US20210036660A1
Автор: HONG Xiao
Принадлежит: Shanghai Huahong Grace Semiconductor Manufacturing Corporation

The disclosure discloses an RC oscillating circuit. A first end of a capacitor is grounded, a second end of the capacitor is connected to a charging path, a discharging path and a comparator, A first input end of a comparator is connected to first reference voltage. An output end of the comparator outputs a first output signal and is connected to a control end of the discharging path. The first reference voltage provides the flipped voltage of the comparator The first output signal forms an output clock signal. A first regulating circuit is configured to regulate the magnitude of the charging current and realize coarse frequency tuning. A second regulating circuit is configured to regulate the magnitude of the first reference voltage and realize fine frequency tuning. The disclosure has the advantages of low power consumption, fast start, high precision and wide tuning range. 1. An RC oscillating circuit , wherein the RC oscillating circuit comprises:a capacitor, a first end of the capacitor being grounded;a charging path, an output end of the charging path being connected to a second end of the capacitor, and the charging path providing charging current for the capacitor;a discharging path, a first end of the discharging path being grounded, and a second end of the discharging path being connected to the second end of the capacitor;a comparator, a first input end of the comparator being connected to first reference voltage, and a second input end of the comparator being connected to capacitor charging voltage output by the second end of the capacitor, whereinan output end of the comparator outputs a first output signal;the first output signal is connected to a control end of the discharging path, and the discharging path is switched on and off under the control of the first output signal;the first reference voltage provides the flipped voltage of the comparator, and when the capacitor charging voltage is less than the flipped voltage, the first output signal ...

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Номер записи: 109
04-02-2021 дата публикации

Receiver Front End for Digital Isolators

Номер: US20210036662A1
Автор: AL-SHYOUKH Mohammad
Принадлежит:

A receiver front-end includes a first peaking gain stage configured to amplify a received differential pair of signals received on an input differential pair of nodes. The first peaking gain stage has a first frequency response including a first peak gain at or near a carrier frequency in a first pass band. The first peak gain occurs just prior to a first cutoff frequency. A second peaking gain stage is configured to amplify a differential pair of signals generated by the first peaking gain stage. The second peaking gain stage has a high input impedance and a second frequency response including a second peak gain at or near the carrier frequency in a second pass band. The second peak gain occurs just prior to a second cutoff frequency. The first peaking gain stage and the second peaking gain stage have a cascaded peak gain at or near the carrier frequency. 1. A receiver front-end comprising:a first peaking gain stage configured to amplify a received differential pair of signals received on an input differential pair of nodes, the first peaking gain stage having a first frequency response including a first peak gain at or near a carrier frequency in a first pass band, the first peak gain occurring just prior to a first cutoff frequency of the first peaking gain stage; anda second peaking gain stage configured to amplify a differential pair of signals generated by the first peaking gain stage, the second peaking gain stage having a high input impedance and a second frequency response including a second peak gain at or near the carrier frequency in a second pass band, the second peak gain occurring just prior to a second cutoff frequency of the second peaking gain stage,wherein the first peaking gain stage and the second peaking gain stage have a cascaded peak gain at or near the carrier frequency.2. The receiver front-end claim 1 , as recited in claim 1 , wherein the first peaking gain stage has a first selectable power consumption and the second peaking gain stage ...

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Номер записи: 110
04-02-2021 дата публикации

Amplifier

Номер: US20210036672A1
Автор: Cheheung KIM, Gyu-Hyeong Cho, Hyeokki Hong, Hyunwook KANG, Ji-Hun Lee
Принадлежит: Korea Advanced Institute of Science and Technology KAIST, SAMSUNG ELECTRONICS CO LTD

An amplifier includes: a first input transistor connected to a first input, a first output, and a power source or a ground, a second input transistor connected to a second input, a second output, and the power source or the ground; a first replica transistor connected to the first input, a detection node, and the power source or the ground; a second replica transistor connected to the second input, the detection node, and the power source or the ground; and a bias transistor connected to a bias voltage, the detection node, and the power source or the ground.

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Номер записи: 111
04-02-2021 дата публикации

GAIN-CONTROL CIRCUIT AND METHOD FOR INSTRUMENTATION AMPLIFIERS

Номер: US20210036674A1
Автор: DINCA Cristian Marian, STANESCU Cornel D., STEELE Gerald William
Принадлежит: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

An instrumentation amplifier with an electronically adjustable gain is disclosed. The gain is adjusted by electronically controlling a resistance coupled to a feedback portion of the instrumentation amplifier. The resistance is adjusted by switches controlled by resistor-control signals references to a common mode voltage appearing at the input of the instrumentation amplifier. Accordingly, the instrumentation amplifier is capable of accommodating a high voltage range of common mode voltages while still providing controllable gain. 1. A circuit , comprising:an instrumentation amplifier; anda gain-control circuit coupled to the instrumentation amplifier and configured to control a gain to one of a plurality of possible gain values based on (i) gain-selection signals received at a plurality of gain-selection inputs and (ii) a common mode voltage corresponding to input signals received at a positive input of the instrumentation amplifier and at a negative input of the instrumentation amplifier.2. The circuit according to claim 1 , wherein the gain-control circuit includes:{'sub': 'CM', 'a common-mode extractor circuit configured to determine the common mode voltage (V) from the input signals;'}an inner controlled resistor circuit including a bank of resistors, the gain of the instrumentation amplifier corresponding to a resistance of the bank of resistors; anda gain decoder circuit configured to output a plurality of resistor-control signals to control the resistance of the bank of resistors based on the common mode voltage from the common-mode extractor circuit and the gain-selection signals at the plurality of gain-selection inputs.3. The circuit according to claim 2 , wherein:{'sub': SS', 'DD, 'the instrumentation amplifier is powered by a negative supply voltage (V) and a positive supply voltage (V);'}{'sub': SS', 'DD, 'each of the plurality of gain-selection inputs receives gain-selection signals of either Vor Vto define a particular gain-selection combination of ...

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Номер записи: 112