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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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Применить Всего найдено 48. Отображено 48.
01-08-2023 дата публикации

Preparation method of self-organizing silicon terminal diamond conductor and device

Номер: CN116525446A
Автор: REN ZEYANG, MENG JINTAO, ZHANG JINFENG, SU KAI, DING SENCHUAN, ZHU ZIHUI, XU QIHUI, TANG PUHAN, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a preparation method of a self-organizing silicon terminal diamond conductor and device, which comprises the following steps: polishing and cleaning the surface of a diamond single crystal to obtain a treated diamond single crystal; depositing a diamond single crystal by using PECVD to obtain a SiO2 layer; carrying out photoetching on the SiO2 layer through a mask plate; etching the SiO2 layer after photoetching by using RIE (Reactive Ion Etching) to obtain a patterned substrate; mPCVD is adopted to grow a diamond single crystal epitaxial layer, in the cooling process, stress nonuniformity occurs on the epitaxial layer to achieve self-stripping, and a silicon terminal area and a non-silicon terminal area are formed on the stripped epitaxial layer; preparing a source electrode and a drain electrode on two sides in the silicon terminal area; siO2 is deposited in the middle of the silicon terminal area to form a gate medium, a gate electrode is prepared in the middle ...

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Номер записи: 1
21-07-2023 дата публикации

Diamond gallium oxide heterojunction diode and preparation method thereof

Номер: CN116469920A
Автор: FENG XIN, YE ANQI, ZHOU HONG, REN ZEYANG, ZHANG WEIHANG, LIU ZHIHONG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a diamond gallium oxide heterojunction diode and a preparation method thereof, and belongs to the technical field of semiconductors. The diode comprises a diamond substrate, an insulating layer, a first cathode metal layer, a gallium oxide thin film, an anode metal layer and a second cathode metal layer. The first cathode metal layer is arranged between the insulating layer and the gallium oxide thin film, so that in the manufacturing process of the diode, the step of transferring the gallium oxide thin film to the diamond substrate can be carried out after other processes are finished, and the contact quality is not reduced due to the influence of other process steps; the gallium oxide thin film and the diamond substrate can form a heterogeneous PN junction, the problem of poor heat dissipation of gallium oxide is solved, meanwhile, the power merit figure of the diode is increased, and the power loss of the diode is reduced.

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Номер записи: 2
04-04-2023 дата публикации

Preparation method of large-size wafer transparent GaN HEMT device

Номер: CN115910781A
Автор: LIU ZHIHONG, ZHAO XUELI, XU SHUNING, WEI HU, XING WEICHUAN, HOU SONGYAN, ZHANG WEIHANG, ZHOU JIN, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a preparation method of a large-size wafer transparent GaN HEMT device, and the method specifically comprises the steps: carrying out a series of device preparation processes on a large-size silicon-based gallium nitride HEMT wafer, including ohmic electrode preparation, mesa isolation, Schottky gate preparation and the like; after the front process is finished, the wafer is turned over and temporarily bonded to the slide glass; the silicon substrate of the silicon-based gallium nitride HEMT wafer is removed; then tightly combining the transparent substrate with the gallium nitride heterogeneous wafer; and finally, the temporary bonding on the front surface of the wafer is removed. According to the method disclosed by the invention, by virtue of the silicon-based gallium nitride HEMT wafer, the preparation of the wafer with the size of 6 inches, 8 inches or larger can be realized; after epitaxial growth and device preparation are completed on the silicon substrate ...

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Номер записи: 3
23-06-2023 дата публикации

Diamond variable threshold field effect transistor with adjustable channel width and preparation method thereof

Номер: CN116314280A
Автор: REN ZEYANG, MA YUANCHEN, ZHANG JINFENG, SU KAI, ZHU ZIHUI, YANG ZHIQING, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a diamond variable threshold field effect transistor with adjustable channel width, which comprises an N-type diamond substrate, a P-type diamond epitaxial layer, a P + type diamond epitaxial layer, a source electrode, a drain electrode, a gate dielectric layer, a gate electrode and a back electrode, and is characterized in that the P-type diamond epitaxial layer is arranged on the upper surface of the N-type diamond substrate; p + type diamond epitaxial layers are arranged on the left side and the right side of the upper surface of the P-type diamond epitaxial layer respectively, a source electrode and a drain electrode are arranged on the P + type diamond epitaxial layers on the left side and the right side respectively, and the P + type diamond epitaxial layers are in ohmic contact with the source electrode and the drain electrode above the P + type diamond epitaxial layers respectively; the gate dielectric layer is arranged on the upper surface, not covered by ...

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Номер записи: 4
04-07-2023 дата публикации

SiO2 barrier layer Ga2O3 vertical UMOS transistor and preparation method thereof

Номер: CN116387361A
Автор: ZHOU HONG, WANG CHENLU, SUN SIHAN, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses an SiO2 barrier layer Ga2O3 vertical UMOS field effect transistor and a preparation method thereof. The problems that an existing vertical gallium oxide field effect transistor does not have an effective source-drain current blocking structure and is insufficient in device grid control capacity are mainly solved. The device comprises a drain electrode, a gallium oxide substrate layer, a gallium oxide epitaxial layer and a gate oxide layer from bottom to top. A SiO2 current blocking layer is arranged on the periphery inside the epitaxial layer, a U-shaped groove and a T-shaped gate electrode are arranged in the center of the SiO2 current blocking layer, an n-type conducting layer growing through ALD is arranged on the SiO2 current blocking layer, and a source electrode is arranged on the n-type conducting layer. Due to the arrangement of the U-shaped groove and the T-shaped gate electrode, compared with an existing structure, the gate control capability of the device ...

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Номер записи: 5
07-07-2023 дата публикации

GaN-based JBS diode with secondary epitaxial structure and preparation method of GaN-based JBS diode

Номер: CN116404046A
Автор: ZHANG WEIHANG, WEN YU, ZHANG JINCHENG, FENG XIN, LIU ZHIHONG, HAO YUE
Принадлежит:

The invention provides a GaN-based JBS diode with a secondary epitaxial structure and a preparation method of the GaN-based JBS diode, and mainly solves the problems of low withstand voltage, high on-resistance and the like caused by the fact that high-quality p-type GaN is difficult to prepare in the GaN-based JBS diode. The light emitting diode comprises a substrate, a buffer layer, an n < + >-GaN layer, an n <->-GaN drift layer, a p-InGaN/i-InGaN/i-GaN secondary epitaxial region, a cathode, a passivation layer and an anode. A high-concentration two-dimensional hole gas is generated by polarization through secondary epitaxy of a p-InGaN/i-InGaN/i-GaN material, a high-quality p-type III-nitride material is obtained, and a high-performance GaN-based JBS diode is realized. The reverse breakdown voltage of the GaN-based JBS diode can be remarkably improved, meanwhile, the forward on-resistance of a device is reduced, and the GaN-based JBS diode can be widely applied to power switches and ...

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Номер записи: 6
02-05-2023 дата публикации

Diamond photoconductive switch with high output power and preparation method thereof

Номер: CN116053349A
Автор: SU KAI, MI TIANHE, ZHANG JINFENG, WANG WEI, REN ZEYANG, WANG DONG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention relates to a high-output-power diamond photoconductive switch and a preparation method thereof. The high-output-power diamond photoconductive switch comprises a diamond layer; the dielectric layer comprises a plurality of dielectric sub-layers, all the dielectric sub-layers are arranged on the diamond layer in an array mode, and the distance between every two adjacent dielectric sub-layers is larger than zero; the first ohmic contact electrodes are located on the portion, not covered by the dielectric layer, of the diamond layer, and the upper surface of each dielectric sub-layer part is covered with the first ohmic contact electrode to form a field plate structure, the first ohmic contact electrode covering the dielectric sub-layer and the first ohmic contact electrode arranged on the diamond layer at the same end of the dielectric sub-layer are continuously arranged; and the second ohmic contact electrode is positioned on the lower surface of the diamond layer. According ...

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Номер записи: 7
02-06-2023 дата публикации

Composite gradient layer gallium nitride power transistor

Номер: CN116207097A
Автор: MAO WEI, XIE YUANYUAN, YANG CUI, ZHANG TAO, DU MING, WEI WEI, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a composite gradient layer gallium nitride power transistor and a manufacturing method thereof, and mainly solves the problems of high cost and low power efficiency of a system used by an existing power switch device due to poor bidirectional conduction characteristic of the existing power switch device. The device comprises a drain electrode, a substrate layer, a drift layer, a channel layer, an N + type layer and a source electrode from bottom to top, first gradient layers are arranged in the drift layer on the two sides of the channel layer, the distance between the first gradient layers is smaller than the width of the channel layer, a grid electrode is arranged on the upper portion of the channel layer, a modulation island electrode is arranged in the center of the upper portion of the drift layer, n second gradient layers are arranged in the drift layer below the modulation island electrode at equal intervals, the first gradient layer is composed of a first ...

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Номер записи: 8
04-04-2023 дата публикации

Perovskite flexible solar battery and lithium-sulfur battery integrated self-charging system and preparation thereof

Номер: CN115911619A
Автор: CHANG JINGJING, YANG WENGUANG, GUO XING, ZHANG MIAO, LIN ZHENHUA, WEI WEI, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention relates to an integrated self-charging system of a perovskite flexible solar battery and a lithium-sulfur battery and a preparation method of the integrated self-charging system. The system comprises the perovskite flexible solar battery and the lithium-sulfur battery, the perovskite flexible solar cell comprises a flexible substrate, a transparent conductive layer and a plurality of perovskite cell units which are arranged in sequence. Each perovskite cell unit comprises an electron transport layer, a perovskite layer and a hole transport layer which are arranged in sequence. The perovskite cell units are connected in series; the positive electrode of the last perovskite cell unit is used as the positive electrode of the perovskite flexible solar cell; the negative electrode of the first perovskite cell unit is used as the negative electrode of the perovskite flexible solar cell; the lithium-sulfur battery comprises a positive electrode, a negative electrode and a solid electrolyte ...

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Номер записи: 9
02-05-2023 дата публикации

Two-dimensional gallium oxide ferroelectric gate enhanced field effect transistor and preparation method thereof

Номер: CN116053314A
Автор: FENG XIN, ZHAO JIANGHAN, ZHOU HONG, ZHANG WEIHANG, LIU ZHIHONG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a two-dimensional gallium oxide ferroelectric gate enhanced field effect transistor and a preparation method thereof, belongs to the technical field of semiconductor devices, and solves the problem that an enhanced Ga2O3 device is difficult to manufacture and implement. The transistor comprises a substrate layer, a channel layer and an electrode layer which are connected layer by layer. The channel is obtained by manufacturing a Ga2O3 film by adopting a mechanical stripping method or an epitaxial method, compared with other preparation methods, the preparation method is simple and easy to operate, on the basis, the substrate can select a material with good compatibility in a large range, the influence of the structure based on the charge storage gate on the conductivity of the channel is extremely small, the two-dimensional ferroelectric gate is used as the charge storage gate, and the performance of the device is improved. And the in-plane and out-of-plane spontaneous ...

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Номер записи: 10
29-08-2023 дата публикации

Gallium oxide Schottky diode with composite terminal structure and preparation method thereof

Номер: CN116666431A
Автор: FENG QIAN, GAO HUHU, TIAN XUSHENG, LIU MINWEI, WANG WENTAO, ZHANG JINCHENG
Принадлежит:

The invention discloses a gallium oxide Schottky diode with a composite terminal structure and a preparation method of the gallium oxide Schottky diode. The defects that in the prior art, gallium oxide p-type doping is difficult to achieve, the breakdown voltage is low, and the process is complex are mainly overcome. The device comprises an ohmic metal layer (1), an n + beta-Ga2O3 substrate (2), an n-beta-Ga2O3 epitaxial layer (3), a junction termination expansion JTE region (4) and a floating metal ring FML region (5) from bottom to top, the JTE region is composed of n p-type protection rings which are evenly arranged in the middle of the upper portion of the n-beta-Ga2O3 epitaxial layer, and each protection ring is made of p-type ZnNiO or NiO materials; the FML area is composed of n metal rings which are evenly arranged at the gap positions of the upper portion of the JTE area, and each metal ring is made of Ni/Au. The invention has the advantages of strong fringe field suppression capability ...

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Номер записи: 11
16-05-2023 дата публикации

Two-dimensional electron gas heterojunction structure based on nitride material and nitrogen terminal diamond and preparation method of two-dimensional electron gas heterojunction structure

Номер: CN116130336A
Автор: ZHANG JINFENG, YANG ZHIQING, ZHU JIADUO, SU KAI, REN ZEYANG, HE QI, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a two-dimensional electron gas heterojunction structure based on a nitride material and nitrogen terminal diamond and a preparation method of the two-dimensional electron gas heterojunction structure. The preparation method comprises the following steps that firstly, a diamond layer is obtained; 2, performing nitrogen terminal treatment on the surface of the diamond layer to form a nitrogen terminal surface; and 3, epitaxially growing single crystal aluminum nitride or boron-aluminum-nitrogen of an Al-surface polar wurtzite structure on the surface of the nitrogen terminal to form an aluminum nitride epitaxial layer or a boron-aluminum-nitrogen epitaxial layer so as to form a two-dimensional electron gas heterojunction structure based on the nitrogen terminal diamond. According to the invention, a high-quality aluminum nitride/nitrogen terminal diamond heterojunction or boron-aluminum-nitrogen/nitrogen terminal diamond heterojunction can be formed, two-dimensional ...

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Номер записи: 12
04-07-2023 дата публикации

Vertical nitride ferroelectric semiconductor Schottky diode and preparation method thereof

Номер: CN116387368A
Автор: XUE JUNSHUAI, LI ZEHUI, WU GUANLIN, YAO JIAJIA, YUAN JINYUAN, LI TIANHAO, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a nitride ferroelectric semiconductor Schottky diode which mainly solves the problems that an existing nitride Schottky diode is low in breakdown voltage, and starting voltage is difficult to regulate and control. The device comprises a cathode (6), a substrate (1), a transmission layer (2), a drift layer (3), a ferroelectric layer (4), an oxide layer (5) and an anode (7) from bottom to top. Wherein the drift layer (3) and the ferroelectric dielectric layer (4) are nitride semiconductors with ferroelectric characteristics, the ferroelectric dielectric layer (4) adopts in-situ epitaxial growth, the forbidden bandwidth of the ferroelectric dielectric layer (4) is smaller than that of the drift layer (3), and the oxide layer (5) is formed through the surface of the ferroelectric dielectric layer (4). The ferroelectric polarization characteristic of the drift layer (3) and the ferroelectric dielectric layer (4) is utilized to improve the reverse withstand voltage and ...

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Номер записи: 13
04-07-2023 дата публикации

Gallium nitride reference vertical groove MOSFET device structure resistant to single particle burning and manufacturing method thereof

Номер: CN116387344A
Автор: HE JIAQI, LIU ZHIHONG, ZHAO XUELI, XU SHUNING, WEI HU, XING WEICHUAN, HOU SONGYAN, FENG XIN, ZHOU JIN, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention provides a gallium nitride reference vertical groove MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device structure capable of resisting single event burnout and a manufacturing method thereof, and belongs to the field of semiconductor power devices. The structure comprises a substrate layer, a buffer layer, a drain electrode heavily-doped N + type gallium nitride layer, a low-doped N-type gallium nitride drift layer, an under-gate P-type gallium nitride region, under-gate metal, a P-type base region layer, a source electrode heavily-doped N + type gallium nitride layer, P-type base region contact metal, a gate medium, a passivation layer, a gate electrode, a source electrode, a drain electrode and an interconnection metal layer. On the basis of a gallium nitride reference vertical structure MOSFET device, a P-type gallium nitride region is added at the bottom of a gate trench, an ohmic contact electrode is prepared to be connected with a source electrode, and ...

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Номер записи: 14
07-07-2023 дата публикации

Monolithic heterogeneous integrated phase inverter based on SOI and GaN wafer bonding technology

Номер: CN116404007A
Автор: ZHANG WEIHANG, FAN YUTONG, ZHANG JINCHENG, FENG XIN, LIU ZHIHONG, HAO YUE
Принадлежит:

The invention relates to the technical field of semiconductor devices, and discloses a monolithic heterogeneous integrated inverter based on an SOI and GaN wafer bonding technology, and the inverter comprises a p-channel Si MOSFET and an n-channel enhanced GaN HEMT which are arranged in an isolated manner. The p-channel Si MOSFET comprises a substrate, a buffer layer, a channel layer, a barrier layer, a p-GaN layer, a SiO2 layer, a Si active layer, a first source electrode, a first drain electrode and a first gate electrode, wherein the first source electrode, the first drain electrode and the first gate electrode are arranged on the Si active layer; wherein the n-channel enhanced GaN HEMT comprises a substrate, a buffer layer, a channel layer, a barrier layer, a p-GaN layer, and a second source electrode, a second drain electrode and a second gate electrode which are arranged on the surface of the p-GaN layer; the working frequency of the inverter can be remarkably improved, the power ...

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Номер записи: 15
25-04-2023 дата публикации

Vertical-structure Ga2O3 transistor with SiO2 barrier layer and preparation method of vertical-structure Ga2O3 transistor

Номер: CN116013989A
Автор: ZHOU HONG, SUN SIHAN, WANG CHENLU, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a vertical Ga2O3 transistor with a SiO2 barrier layer and a preparation method thereof, and mainly solves the problems of poor device performance and reliability caused by the fact that an existing vertical Ga2O3 field effect transistor is not provided with a structure for blocking electric leakage between a source and a drain. The device comprises a drain electrode, a gallium oxide substrate layer, a gallium oxide epitaxial layer, a gate oxide layer and a gate electrode from bottom to top, a SiO2 current blocking layer is arranged on the periphery inside the epitaxial layer, a vertical heavily-doped conductive channel is arranged in the center of the epitaxial layer, an n-type conductive layer growing through ALD is arranged above the vertical heavily-doped conductive channel, and a source electrode is arranged above the n-type conductive layer. Due to the fact that the vertical heavily-doped conductive channel is arranged, compared with an existing structure, the ...

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Номер записи: 16
15-08-2023 дата публикации

Preparation method of diamond-based GaN heterogeneous crystal circle based on sapphire substrate

Номер: CN116598386A
Автор: SU KAI, WANG HANXUE, ZHANG JINFENG, REN ZEYANG, ZHANG YACHAO, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a preparation method of a diamond-based GaN heterogeneous crystal circle based on a sapphire substrate. The preparation method comprises the following steps: growing a first nucleating layer, a GaN buffer layer, a GaN/AlGaN heterojunction layer and a medium protection layer on a first sapphire substrate to obtain a sapphire substrate GaN epitaxial wafer; growing a second nucleating layer on a second sapphire substrate to obtain a temporary slide; performing wafer bonding on the epitaxial wafer and a temporary slide to obtain a first bonding wafer; performing laser stripping on the first sapphire substrate and removing the first nucleating layer at the same time; carrying out wafer bonding on the first bonding wafer after the first sapphire substrate is stripped and a diamond substrate to obtain a second bonding wafer; performing laser stripping on the second sapphire substrate, and removing the second nucleating layer at the same time; and removing the first bonding ...

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Номер записи: 17
23-02-2017 дата публикации

GAN BASE MATERIAL BASED ON SI SUBSTRATE AND PREPARATION METHOD THEREFOR

Номер: WO2017028555A1
Автор: ZHANG, Jincheng, XU, Shengrui, CHEN, Zhibin, NING, Jing, REN, Zeyang, HAO, Yue
Принадлежит:

A GaN base material for manufacturing a yellow-light LED comprises a p-shaped GaN layer, an active layer, a nucleating layer, and a substrate arranged from top to bottom, the active layer using a C-doped and Si-doped n-shaped GaN layer, to introduce the deep energy level of C into the n-shaped GaN layer. By means of the GaN base material and the preparation method therefor, a production process can be simplified, growing efficiency can be improved, costs can be reduced, and the performance of an LED device can be improved.

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Номер записи: 18
09-06-2023 дата публикации

Diamond nuclear detector resistant to high voltage and low in electric leakage and preparation method thereof

Номер: CN116243365A
Автор: SU KAI, MI TIANHE, ZHANG JINFENG, WANG WEI, REN ZEYANG, WANG DONG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention relates to a high-voltage-resistant low-leakage diamond nuclear detector and a preparation method thereof, the diamond nuclear detector comprises a diamond, a first insulating dielectric layer, a first ohmic contact electrode, a second insulating dielectric layer and a second ohmic contact electrode, the first ohmic contact electrode is located on a first surface of the diamond, and the second ohmic contact electrode is located on a second surface of the diamond; the first insulating dielectric layer surrounds the first ohmic contact electrode, and the edge of the first ohmic contact electrode extends towards the two sides and covers part of the first insulating dielectric layer to form a field plate structure; the second ohmic contact electrode is located on the second surface of the diamond, the second insulating dielectric layer surrounds the second ohmic contact electrode, and the edge of the second ohmic contact electrode extends towards the two sides and covers part ...

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Номер записи: 19
12-05-2023 дата публикации

Photo-response friction nano-generator introduced with charge transfer limiting layer and preparation method of photo-response friction nano-generator

Номер: CN116111872A
Автор: CHANG JINGJING, MA XINTONG, LIN ZHENHUA, JIAO YONG, GUO XING, HU ZHAOSHENG, SU JIE, WEI WEI, ZHAO XUE, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention provides a photoresponse friction nano-generator introduced with a charge transfer limiting layer and a preparation method thereof, the photoresponse friction nano-generator comprises a first substrate, a positive friction layer, a negative friction layer, an electrode layer and a second substrate, and the charge transfer limiting layer is arranged between the negative friction layer and the electrode layer. And the charge transfer limiting layer is a reduced graphene oxide and silver mixed nano layer and is used for capturing and limiting interface charges. The positive friction layer is an organic-inorganic perovskite thin film doped with bismuth oxyiodide and fluorinated carbon nanotube mixed nanoparticles; the negative friction layer is a multi-walled carbon nanotube/polydimethylsiloxane/polyvinylidene fluoride/titanium dioxide composite film; and the charge transfer limiting layer is a reduced graphene oxide/silver nanoparticle hybrid membrane. By controlling interface ...

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Номер записи: 20
14-09-2017 дата публикации

METHOD FOR GROWING GALLIUM NITRIDE BASED ON GRAPHENE AND MAGNETRON SPUTTERED ALUMINIUM NITRIDE

Номер: WO2017152620A1
Автор: ZHANG, Jincheng, XU, Shengrui, CHEN, Zhibin, NING, Jing, REN, Zeyang, HAO, Yue
Принадлежит:

Provided are a method for growing gallium nitride based on graphene and magnetron sputtered aluminium nitride, and a gallium nitride thin film. An embodiment of the present invention comprises: covering a substrate with graphene; magnetron sputtering aluminium nitrite onto graphene-covered substrate to obtain a sputtered aluminium nitrite substrate; placing the sputtered aluminium nitride substrate into a MOCVD reaction chamber and implementing thermal treatment to obtain a thermally treated substrate; and respectively growing on the thermally treated substrate an aluminium nitride transition layer and a first gallium nitride layer and a second gallium nitride layer having different V-III ratios. The present gallium nitrate thin film embodiment comprises the following structures from bottom to top: a substrate (1), a graphene layer (2), an aluminium nitride nucleation layer (3) produced by means of a magnetron sputtering method, an aluminium nitride transition layer (4) grown by MOCVD, ...

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Номер записи: 21
23-06-2023 дата публикации

Boron arsenide resonant tunneling diode and manufacturing method thereof

Номер: CN116314350A
Автор: XUE JUNSHUAI, WU GUANLIN, LI ZEHUI, YUAN JINYUAN, SUN WENBO, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a boron arsenide resonant tunneling diode which mainly solves the problems that an existing gallium nitride resonant tunneling diode is asymmetric in energy band structure, has no bidirectional symmetric differential negative resistance characteristic and is low in peak current and peak-valley current ratio. The device comprises a substrate, an epitaxial layer, an emitter ohmic contact layer, a first isolation layer, a first barrier layer, a quantum well layer, a second barrier layer, a second isolation layer, a collector ohmic contact layer and a collector. And an annular emitter is arranged on the emitter ohmic contact layer. Wherein the first barrier layer and the second barrier layer are made of boron arsenide materials with the same thickness, the emitter and collector ohmic contact regions are made of n-type boron gallium indium arsenic materials with the same components and thicknesses, the first isolation layer, the second isolation layer and the quantum ...

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Номер записи: 22
23-06-2023 дата публикации

Boron-aluminum-nitrogen/diamond two-dimensional electron gas heterojunction structure for improving lattice mismatch and preparation method of boron-aluminum-nitrogen/diamond two-dimensional electron gas heterojunction structure

Номер: CN116313745A
Автор: ZHANG JINFENG, YANG ZHIQING, SU KAI, HE QI, REN ZEYANG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a preparation method of a boron-aluminum-nitrogen/nitrogen terminal diamond two-dimensional electron gas heterojunction structure for improving lattice mismatch. The preparation method comprises the following steps: obtaining a 111-plane monocrystalline silicon substrate; epitaxially growing a single crystal boron nitride transition layer on the 111-plane single crystal silicon substrate; growing a diamond epitaxial layer on the surface of the single crystal boron nitride transition layer; performing nitrogen terminal treatment on the surface of the diamond epitaxial layer to form a nitrogen terminal surface; and epitaxially growing monocrystal boron-aluminum-nitrogen with a donor impurity doped Al surface polar wurtzite structure on the surface of the nitrogen terminal to form a boron-aluminum-nitrogen epitaxial layer so as to form the boron-aluminum-nitrogen/nitrogen terminal diamond two-dimensional electron gas heterojunction. According to the preparation method ...

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Номер записи: 23
23-05-2023 дата публикации

Diamond two-dimensional electron gas heterojunction structure based on nitrogen-surface polar boron-aluminum-nitrogen material and preparation method of diamond two-dimensional electron gas heterojunction structure

Номер: CN116153765A
Автор: ZHANG JINFENG, REN ZEYANG, YANG ZHIQING, SU KAI, HE QI, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a preparation method of a diamond two-dimensional electron gas heterojunction structure based on a nitrogen-surface polar boron-aluminum-nitrogen material. The preparation method comprises the following steps: obtaining a C-surface single-crystal sapphire substrate; the method comprises the following steps: epitaxially growing boron-aluminum-nitrogen with a donor-doped nitrogen-surface polar wurtzite structure on a C-surface single crystal sapphire substrate to form a boron-aluminum-nitrogen epitaxial layer; in the boron-aluminum-nitrogen growth process, the boron and aluminum components of the boron-aluminum-nitrogen epitaxial layer are controlled by regulating and controlling the ratio of the boron source to the aluminum source; and growing a diamond epitaxial layer on the boron-aluminum-nitrogen epitaxial layer to form a heterojunction. The diamond heterojunction device is manufactured based on the sapphire substrate material, the diamond layer needed by the heterojunction ...

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Номер записи: 24
04-08-2023 дата публикации

Solar cell module based on double-sided semitransparent perovskite and preparation method thereof

Номер: CN116546830A
Автор: ZHANG CHUNFU, ZHOU LONG, GE HENGHANG, ZHU WEIDONG, CHEN DAZHENG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention relates to a solar cell module based on double-sided semitransparent perovskite and a preparation method thereof. The solar cell module comprises a transparent glass substrate layer, a first transparent electrode layer, an electron transport layer, a perovskite light absorption layer, a hole transport layer, a buffer layer, a second transparent electrode layer and a packaging protection and antireflection layer. According to the invention, transverse ion diffusion of the perovskite light absorption layer, the hole transport layer and the like can be reduced, so that the working stability of the solar cell module is improved. The packaging protection and antireflection layer not only can protect the solar cell module to reduce the damage of water vapor and stabilize the structure of the solar cell, but also can enhance the light utilization rate of the solar cell module through the antireflection effect in the packaging protection and antireflection layer.

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Номер записи: 25
05-05-2023 дата публикации

GaN HEMT (High Electron Mobility Transistor) device structure with high threshold voltage stability and low gate leakage and preparation method thereof

Номер: CN116072701A
Автор: CHEN DAZHENG, MU CHANGGEN, ZHANG CHUNFU, ZHAO SHENGLEI, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention relates to a GaN HEMT device structure with high threshold voltage stability and low gate leakage and a preparation method thereof, the GaN HEMT device structure comprises a substrate, a buffer layer, a channel layer, a barrier layer, a source electrode, a drain electrode, a passivation layer, a pure p-type SnO layer, an atom-doped SnO-based thin film layer and a gate electrode, the substrate, the buffer layer, the channel layer and the barrier layer are stacked in sequence; the source is located at one end of the barrier layer, and the drain is located at the other end of the barrier layer; the pure p-type SnO layer is positioned on a part of the barrier layer between the source electrode and the drain electrode; the atom-doped SnO-based thin film layer covers the upper surface of the pure p-type SnO layer; the grid electrode is located on a part of the surface of the atom-doped SnO-based thin film layer; the passivation layer covers the surface of the barrier layer between ...

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Номер записи: 26
07-07-2023 дата публикации

Nitride nonvolatile multi-valued logic memory and manufacturing method thereof

Номер: CN116406167A
Автор: XUE JUNSHUAI, LI ZUMAO, WU GUANLIN, YUAN JINYUAN, SUN WENBO, GUO ZHUANG, ZHAO CHENG, LIU RENJIE, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a nitride nonvolatile multi-valued logic memory and a manufacturing method thereof. The problems that an existing nitride nonvolatile memory is poor in durability, high in delay and large in electric leakage are mainly solved. The device comprises a substrate, a nucleating layer, a channel layer, a floating gate layer, a first barrier layer, a first quantum well layer, a second barrier layer, an isolation layer and a gate contact layer from bottom to top, the first barrier layer, the first quantum well layer and the second barrier layer form a first resonant tunneling diode, a series connection layer, a third barrier layer, a second quantum well layer and a fourth barrier layer are arranged between the second barrier layer and the isolation layer, and the third barrier layer, the second quantum well layer and the fourth barrier layer form a second resonant tunneling diode. A source electrode and a drain electrode are arranged on the two sides of the floating gate ...

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Номер записи: 27
29-08-2023 дата публикации

High-quality CsPbBr3 perovskite thin film solar cell and preparation method thereof

Номер: CN116669437A
Автор: CHEN DAZHENG, ZHANG CHUNFU, HE YIBING, ZHU WEIDONG, ZHANG ZEYULIN, XU YU, XI HE, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a CsPbBr3 perovskite thin film solar cell and a preparation method thereof. The cell sequentially comprises a transparent electrode layer, a first transmission layer, an atomized and deposited CsPbBr3 perovskite light absorption layer, a second transmission layer and a metal electrode layer from bottom to top. According to the CsPbBr3 perovskite thin film grown through the mist chemical deposition method, the defects of the CsPbBr3 thin film can be reduced, the crystallinity of the thin film is improved, charge recombination is reduced, and the photoelectric conversion efficiency of the CsPbBr3 perovskite thin film solar cell can be improved.

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Номер записи: 28
23-06-2023 дата публикации

High-power light-emitting diode based on diamond patterned substrate and preparation method of high-power light-emitting diode

Номер: CN116314519A
Автор: XU SHENGRUI, LU HAO, WANG YUXUAN, FAN XIAOMENG, GAO YUAN, TAO HONGCHANG, ZHANG TAO, ZHANG JINFENG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention aims to disclose a high-power nitride light-emitting diode based on a diamond-based patterned substrate, and mainly solves the problems that an epitaxial nitride semiconductor light-emitting diode on an existing diamond substrate is poor in lattice quality, a plain substrate is low in luminous efficiency, and a high-power light-emitting diode device is insufficient in heat dissipation and complex in preparation process. The device comprises a patterned diamond substrate layer, a boron nitride insertion layer, a nitride material nucleating layer, a nitride buffer layer and an n-type III-group nitride material layer from bottom to top, and an III-group nitride material quantum well layer, a p-type III-group nitride material layer, a transparent conductive layer and a metal electrode layer are sequentially arranged on the upper left portion of the n-type III-group nitride material layer. And the right upper part is a metal electrode layer. The patterned diamond substrate is utilized ...

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Номер записи: 29
23-05-2023 дата публикации

Nitride PN junction Schottky diode and preparation method thereof

Номер: CN116153965A
Автор: XUE JUNSHUAI, LI ZEHUI, WU GUANLIN, YUAN JINYUAN, GUO ZHUANG, LI ZUMAO, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a nitride PN junction Schottky diode which mainly solves the problem that an existing vertical nitride Schottky diode is low in breakdown voltage. The device comprises a cathode (5), a substrate (1), an n + AlxGa1-xN transmission layer (2), a scandium-yttrium-aluminum-nitrogen/gallium nitride laminated structure (3), a scandium-yttrium-aluminum-nitrogen/aluminum nitride laminated structure (4) and an anode (6) from bottom to top. Nitride materials and scandium-yttrium-aluminum-nitrogen materials in the two laminated structures (3 and 4) sequentially and periodically grow, the thickness of each layer of scandium-yttrium-aluminum-nitrogen is 3-50 nm, the components of each layer of scandium-yttrium-aluminum-nitrogen are kept unchanged, the total thicknesses and periods of the nitride materials and the scandium-yttrium-aluminum-nitrogen materials are the same or different, the total scandium component is 0%-35%, and the total yttrium component is 0%-25%. The vertical ...

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Номер записи: 30
04-08-2023 дата публикации

Direct-current-driven high-power spin oscillator and preparation process thereof

Номер: CN116546875A
Автор: MA HAIJIAO, HUI YUPENG, WANG YAOQI, ZHANG YUEYING, WANG LEI, LIU SHAOXUAN, ZHU JIANG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a direct-current-driven high-power spin oscillator and a preparation process thereof. The spin oscillator is composed of a first metal layer, a second metal layer and a substrate layer which are the same in shape. The first metal layer and the second metal layer form a double-layer heterojunction structure, and the second metal layer is connected with a direct current source; the first metal layer in the double-layer heterojunction structure is made of a metal material with a strong spin-orbit coupling effect, and the second metal layer is made of a metal material with strong ferromagnetism. According to the spin oscillator, epitaxial layers are deposited twice by using a magnetron sputtering process to serve as the first metal layer and the second metal layer, so that the spin oscillator has the advantages of direct current driving, high output power, simple preparation process and coherence of spin oscillation; the method can be applied to on-chip integrated low-temperature ...

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Номер записи: 31
02-06-2023 дата публикации

GaN-based JBS diode based on ion implantation and preparation method thereof

Номер: CN116207162A
Автор: ZHANG WEIHANG, WEN YU, ZHANG JINCHENG, FENG XIN, LIU ZHIHONG, HAO YUE
Принадлежит:

The invention provides a GaN-based JBS diode based on ion implantation and a preparation method of the GaN-based JBS diode. The GaN-based JBS diode mainly solves the problems of voltage resistance and conduction loss caused by low activation efficiency of Mg ion implantation in the GaN-based JBS diode. The LED comprises a substrate, a buffer layer, an n < + >-GaN layer, an n <->-GaN drift layer, an n <->-InGaN drift layer, a Mg ion implantation region, a cathode, a passivation layer and an anode. Wherein an n-InGaN drift layer is arranged on the n-GaN drift layer in an epitaxial manner; in the Mg ion high-temperature activation process, In close to the surface is separated out from the InGaN material, Mg enters crystal lattice points of In, the activation energy of Mg is reduced, in the InGaN material far away from the surface, the activation energy of Mg in InGaN is lower than that of a GaN material, so that Mg has higher activation efficiency in InGaN, and n-InGaN is catalyzed to be converted ...

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Номер записи: 32
29-08-2023 дата публикации

CsPbBr3 perovskite thin film solar cell with flat surface and preparation method of CsPbBr3 perovskite thin film solar cell

Номер: CN116669504A
Автор: CHEN DAZHENG, HE YIBING, ZHANG CHUNFU, ZHU WEIDONG, ZHANG ZEYULIN, XU YU, XI HE, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a CsPbBr3 perovskite thin film solar cell with a flat surface and a preparation method of the CsPbBr3 perovskite thin film solar cell. The cell sequentially comprises a transparent electrode layer, a first transmission layer, a CsPbBr3 perovskite light absorption layer with the flat surface, a second transmission layer and a metal electrode layer from bottom to top. According to the CsPbBr3 perovskite thin film grown through mist, the surface defect of CsPbBr3 can be reduced, and the surface flatness can be improved, so that the morphology of the second transmission layer is improved, electron-hole recombination between CsPbBr3 perovskite and the transmission layer is reduced, and the photoelectric conversion efficiency of the CsPbBr3 perovskite thin film solar cell is improved.

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Номер записи: 33
02-05-2023 дата публикации

P-GaN enhanced gallium nitride high electron mobility transistor for resisting single event burnout

Номер: CN116053293A
Автор: ZHAO SHENGLEI, WANG HAOYU, ZHANG JINCHENG, LIU SHUANG, ZHANG GA, WU FENG, WANG DONG, HAO YUE
Принадлежит:

The invention discloses a P-GaN enhanced gallium nitride high electron mobility transistor for resisting single event burnout, which mainly solves the problem of low single event burnout resistance of the existing similar devices. The device comprises a substrate (1), a buffer layer (2), a channel layer (3), a barrier layer (4) and a passivation layer (6) from bottom to top, the source electrode (8) and the drain electrode (9) are located at the two ends of the channel layer, the barrier layer and the passivation layer; a drain field plate (10) integrally connected with the drain electrode is arranged on the left side of the upper part of the drain electrode; a P-GaN layer (7) is arranged on the barrier layer on the right side of the source electrode, and a grid electrode (13) and a grid field plate (12) connected with the grid electrode are arranged on the P-GaN layer; a Schottky metal layer (11) is arranged between the gate field plate and the drain field plate, and an N + doped region ...

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Номер записи: 34
23-06-2023 дата публикации

P-type doping method of SWCNTs thin film transistor device

Номер: CN116322247A
Автор: GAO XIANGXIANG, BAI HAOYU, CHANG JINGJING, LIN ZHENHUA, SU JIE, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention belongs to the technical field of thin film transistor device doping, and particularly relates to a P-type doping method of an SWCNTs thin film transistor device. The SWCNTs thin film is assembled through the interaction force between two substances in a self-assembly mode to be used for preparing a transistor device array, the SWCNTs thin film is treated through the TFSI P-type doping agent with the super-strong electron withdrawing capacity, the threshold voltage of the SWCNTs thin film transistor device can be regulated and controlled, and the transistor device array is prepared. And the carrier mobility and the maximum on-state current of the SWCNTs thin film transistor device are greatly improved. The method has the beneficial effects that the P-type doping of the SWCNTs thin film transistor device can be regulated and controlled by changing the temperature of the TFSI for treating the SWCNTs thin film and carrying out annealing treatment on the device, and the method ...

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Номер записи: 35
18-04-2023 дата публикации

Low-ohmic-contact GaN-based high-electron-mobility transistor and preparation method thereof

Номер: CN115985958A
Автор: ZHANG JINCHENG, DU HANGHAI, LIU ZHIHONG, HAO LU, GAO GUANGJIE, XING WEICHUAN, HAO YUE
Принадлежит:

The invention discloses a low-ohmic-contact GaN-based high-electron-mobility transistor which comprises a source electrode, a drain electrode, a grid electrode, a substrate, a buffer layer, a channel layer, an aluminum nitride barrier layer and a silicon nitride cap layer, wherein the substrate, the buffer layer, the channel layer, the aluminum nitride barrier layer and the silicon nitride cap layer are sequentially arranged from bottom to top. The grid electrode is arranged on the silicon nitride cap layer; the source electrode and the drain electrode penetrate through the silicon nitride cap layer and extend to the interface of the aluminum nitride barrier layer and the silicon nitride cap layer; or one part of the source electrode and the drain electrode penetrates through the silicon nitride cap layer and extends to the interface of the aluminum nitride barrier layer and the silicon nitride cap layer, and the other part of the source electrode and the drain electrode penetrates through ...

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Номер записи: 36
27-06-2023 дата публикации

Vertical field effect transistor based on modulation island structure and manufacturing method thereof

Номер: CN116344618A
Автор: MAO WEI, XIE YUANYUAN, YANG CUI, ZHANG YACHAO, DU MING, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a vertical field effect transistor based on a modulation island structure and a manufacturing method of the vertical field effect transistor, and mainly solves the problems that the cost of a circuit used by an existing gallium nitride-based power device is increased and the performance of the existing gallium nitride-based power device is reduced because the existing gallium nitride-based power device does not have a good bidirectional conduction characteristic. The invention discloses a high-power LED (light emitting diode) semiconductor device which comprises a drain electrode, a substrate layer, a drift layer, an N-type GaN channel layer, top metal and a passivation layer from bottom to top, a first P-type GaN layer and a second P-type GaN layer are respectively arranged on two sides of the N-type GaN channel layer, the first P-type GaN layer is uniformly divided into n blocks by grooves to form a modulation island structure, modulation block metal is arranged ...

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Номер записи: 37
02-05-2023 дата публикации

Monolithic integrated circuit of nitride surface acoustic wave device and field effect transistor and manufacturing method

Номер: CN116054774A
Автор: XUE JUNSHUAI, WU GUANLIN, YAO JIAJIA, GUO ZHUANG, LI ZEHUI, YUAN JINYUAN, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a monolithic integrated circuit of a nitride surface acoustic wave device and a field effect transistor. The monolithic integrated circuit mainly solves the problem that epitaxial integration of the nitride surface acoustic wave device and the field effect transistor is difficult. The device comprises a substrate, a nucleating layer, a channel layer, an insertion layer, a barrier layer and a piezoelectric ferroelectric layer from bottom to top. The barrier layer is made of a scandium-indium-aluminum-gallium-nitrogen material, and the piezoelectric ferroelectric layer is made of a continuous epitaxial single-crystal scandium-aluminum-nitrogen material. A separation region is formed from the channel layer to the etching groove in the piezoelectric ferroelectric layer, and is filled with a passivation layer; the piezoelectric ferroelectric layer on one side of the separation area and the interdigital electrode on the piezoelectric ferroelectric layer form a surface ...

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Номер записи: 38
08-08-2023 дата публикации

GaAs-based P-channel enhanced CMOS device and preparation method thereof

Номер: CN116565006A
Автор: XU SHENGRUI, YANG HE, LU HAO, HSU KANG J., LIU XU, XU SHUANG, ZHANG TAO, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a GaAs-based P-channel enhanced CMOS (Complementary Metal Oxide Semiconductor) device, which comprises a GaAs buffer layer, a P-channel layer, a P-channel layer and a P-channel layer, the undoped GaAs layer is superposed on the GaAs buffer layer; the non-doped GaN layer is overlapped on the non-doped GaAs layer and is positioned on one side of the isolation region; the AlGaN barrier layer is superposed on the undoped GaN layer; the p-GaN layer is superposed in the middle of the AlGaN barrier layer; the first source electrode and the first drain electrode are located on the two sides of the p-GaN layer respectively. The first gate electrode is superposed on the p-GaN layer; the n-GaAs layer is positioned on the other side of the isolation region; the n-GaAs layer is provided with two P doped regions; the second source electrode and the second drain electrode are respectively overlaid on the two P doped regions; the gate dielectric layer is located between the two ...

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Номер записи: 39
27-06-2023 дата публикации

Gallium oxide laminated all-around gate field effect transistor and preparation method thereof

Номер: CN116344617A
Автор: FENG XIN, ZHAO JIANGHAN, ZHOU HONG, NING JING, ZHANG WEIHANG, LIU ZHIHONG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a gallium oxide laminated all-around gate field effect transistor and a preparation method thereof, and belongs to the field of semiconductor devices. The transistor mainly solves the common problems of weak grid control capability, low switch conduction ratio and large threshold swing existing in the current gallium oxide MOS device. The device comprises an insulating substrate, a gallium oxide channel layer, a two-dimensional material dielectric layer and a gate surrounding the gallium oxide channel, an insulating layer and a repeated stacking structure above the insulating layer from bottom to top. The gate surrounding the channel is realized by stripping the thin film, so that the problem that the GAA structure process is difficult to realize is solved; the four-side contact of the grid electrode brings good channel control capability to the device. According to the invention, the switching conduction ratio of the device is improved, and the method can be used ...

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Номер записи: 40
09-06-2023 дата публикации

Monolithic integrated reverse conducting gallium nitride longitudinal power device and manufacturing method thereof

Номер: CN116247054A
Автор: MAO WEI, XIE YUANYUAN, YANG CUI, ZHAO TIANLONG, WANG SHULONG, ZHENG XUEFENG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a monolithic integrated reverse conduction type gallium nitride longitudinal power device and a manufacturing method thereof, and mainly solves the problems of poor bidirectional conduction characteristic, high circuit cost and poor performance of the existing gallium nitride-based power device. The invention discloses a high-power LED (Light Emitting Diode), which comprises a drain electrode, a substrate layer, a drift layer, a channel layer and a source electrode from bottom to top, P-type GaN layers are arranged on two sides of the channel layer, a first N-type GaN layer, a second N-type GaN layer and a grid electrode are sequentially arranged above the P-type GaN layers, m first gradient P-type GaN layers are arranged in the drift layer below the P-type GaN layers, n P-type modulation islands are arranged in the center above the drift layer 2 at equal intervals, and m second gradient P-type GaN layers are arranged in the center above the drift layer 2 at equal ...

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Номер записи: 41
21-04-2023 дата публикации

Epitaxial nitride device monolithic heterogeneous integrated circuit and manufacturing method thereof

Номер: CN115996623A
Автор: XUE JUNSHUAI, LI TIANHAO, WU GUANLIN, YAO JIAJIA, YUAN JINYUAN, LI ZEHUI, GUO ZHUANG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a monolithic heterogeneous integrated circuit of an epitaxial nitride device. The monolithic heterogeneous integrated circuit mainly solves the problems that the working frequency band of an existing surface acoustic wave device is not easy to regulate and control, and epitaxial heterogeneous integration with a high-electron-mobility transistor is difficult. The nitride surface acoustic wave device comprises a substrate, a nucleating layer, a channel layer, an insertion layer, a barrier layer and a polarization layer from bottom to top, wherein the interdigital electrode and the corresponding polarization layer below the interdigital electrode form the nitride surface acoustic wave device; the source electrode, the drain electrode, the channel layer, the insertion layer, the barrier layer, the gate electrode and the corresponding polarization layer below the gate electrode form a nitride high-electron-mobility transistor; the surface acoustic wave device is located ...

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Номер записи: 42
02-05-2023 дата публикации

Pn junction diode with good p-type ohmic contact and preparation method thereof

Номер: CN116053326A
Автор: ZHAO SHENGLEI, WU FENG, ZHANG JINCHENG, SONG XIUFENG, NAN JI'AO, ZHANG GA, WANG HAOYU, HAO YUE
Принадлежит:

The embodiment of the invention relates to the technical field of semiconductor devices, in particular to a pn junction diode with good p-type ohmic contact and a preparation method thereof, and the pn junction diode comprises a substrate, an n-type doped alloy nitride layer, a p-type doped alloy nitride layer and a p-type doped nitride layer. The p-type doped nitride layer is located at the end part of the surface of the p-type doped alloy nitride layer, and a two-dimensional hole gas channel is formed between the p-type doped nitride layer and the p-type doped alloy nitride layer; two-dimensional hole gas can be formed between the p-type doped nitride layer and the p-type doped alloy nitride layer, and the two-dimensional hole gas is located in a two-dimensional hole gas channel; an anode is arranged above the p-type doped nitride layer, and a cathode is further arranged on the n-type doped alloy nitride layer. The problem that good ohmic contact is difficult to form due to the fact that ...

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Номер записи: 43
12-05-2023 дата публикации

GaN HEMT device capable of improving threshold voltage stability and gate withstand voltage and preparation method of GaN HEMT device

Номер: CN116110786A
Автор: CHEN DAZHENG, MU CHANGGEN, ZHANG CHUNFU, ZHAO SHENGLEI, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention relates to a GaN HEMT (High Electron Mobility Transistor) device for improving threshold voltage stability and gate withstand voltage and a preparation method thereof. The method comprises the following steps: growing a buffer layer, a channel layer, a barrier layer and a first passivation layer on a substrate layer in a laminated manner; preparing a source electrode and a drain electrode on two ends of the barrier layer; preparing a p-type SnO layer on the exposed barrier layer; preparing an n-type SnO2 layer on the p-type SnO layer; preparing a second passivation layer by using an ICPCVD process; and etching the second passivation layer in the middle to expose a part of the n-type SnO2 layer, and preparing a grid electrode on the exposed n-type SnO2 layer. According to the GaN HEMT device, the n-type SnO2 layer is grown on the p-type SnO layer, so that the problems of threshold voltage instability and low gate withstand voltage of the GaN HEMT device are successfully relieved ...

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Номер записи: 44
14-07-2023 дата публикации

Normally-closed two-dimensional gallium oxide heterojunction field effect transistor and preparation method thereof

Номер: CN116435373A
Автор: FENG XIN, ZHAO JIANGHAN, ZHOU HONG, NING JING, ZHANG WEIHANG, LIU ZHIHONG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a normally-closed two-dimensional gallium oxide heterojunction field effect transistor and a preparation method thereof, and belongs to the field of semiconductor devices. The invention mainly solves the problems of difficult effective p-type doping, gate electric leakage and low device breakdown voltage of the current gallium oxide material. The gallium oxide thin film transistor comprises an insulating substrate, a beta-Ga2O3 thin film layer, a source electrode, a drain electrode, an insulating layer, a two-dimensional material thin film layer, a dielectric layer and a gate electrode from bottom to top. Ga2O3 and the p-type two-dimensional thin film material form a heterojunction to deplete a channel so as to form a normally-closed device; the gate dielectric layer suppresses gate current occurring due to opening of the heterojunction. According to the invention, the breakdown voltage of the device is improved, and the generation of gate leakage current is inhibited ...

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Номер записи: 45
05-05-2023 дата публикации

Single event effect resistant FinFET device containing trench electrode and preparation method thereof

Номер: CN116072657A
Автор: ZHANG CHUNFU, GUO YUNFENG, ZHANG ZEYANG, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses an anti-single event effect FinFET device containing a trench electrode and a preparation method thereof, the device comprises a substrate layer, a fin part, a shallow trench isolation region, a gate oxide layer, a trench metal electrode and a gate electrode, the shallow trench isolation region is arranged on the upper surface of the substrate layer, and the gate oxide layer is arranged on the upper surface of the trench metal electrode. The fin part is arranged in a central region above the shallow trench isolation region and extends downwards to the upper surface of the substrate layer, and the fin part comprises a source electrode and a drain electrode located at the two ends and a conducting channel located between the source electrode and the drain electrode in the longitudinal direction; the two sides of the fin portion in the longitudinal direction are each provided with a groove metal electrode, the side faces of the groove metal electrodes are spaced from ...

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Номер записи: 46
11-04-2023 дата публикации

Nonvolatile multi-valued logic memory integrated with nitride device and manufacturing method of nonvolatile multi-valued logic memory

Номер: CN115955846A
Автор: XUE JUNSHUAI, YUAN JINYUAN, WU GUANLIN, LI ZEHUI, SUN WENBO, YAO JIAJIA, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a nonvolatile multi-valued logic memory integrated with a nitride device. The nonvolatile multi-valued logic memory mainly solves the problems that an existing nitride nonvolatile memory is high in power consumption, short in service life, low in logic state contrast ratio and low in storage density. The device comprises a substrate, a field effect transistor, a floating gate layer, a resonant tunneling diode, an isolation layer, a gate contact layer and a gate electrode from bottom to top. The field effect transistor is composed of a nucleating layer, a buffer layer, a back barrier layer, a channel layer, an insertion layer, a first barrier layer, a source electrode and a drain electrode. The resonant tunneling diode is composed of a second barrier layer, a first quantum well layer, a third barrier layer, a second quantum well layer and a fourth barrier layer. Opening and closing of a channel are controlled by regulating and controlling the carrier concentration ...

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Номер записи: 47
14-07-2023 дата публикации

Field effect transistor with ultra-wide forbidden band vertical cascode structure and preparation method of field effect transistor

Номер: CN116435362A
Автор: ZHOU HONG, WANG CHENLU, SUN SIHAN, ZHANG JINCHENG, HAO YUE
Принадлежит:

The invention discloses a field effect transistor of an ultra-wide forbidden band vertical cascode structure and a preparation method of the field effect transistor, and mainly solves the problem of electric leakage between a source and a drain due to the fact that an existing vertical ultra-wide forbidden band material field effect transistor is not provided with an effective electrical barrier layer. The device comprises a drain electrode, an ultra-wide forbidden band material substrate layer, an ultra-wide forbidden band material epitaxial layer and a gate oxide layer from bottom to top, a gate electrode is arranged above the gate oxide layer, a SiO2 current blocking layer is arranged on the periphery in the ultra-wide forbidden band material epitaxial layer, an n-type conductive layer is grown above the SiO2 current blocking layer through ALD, a source electrode is arranged above the n-type conductive layer, and a drain electrode is arranged above the source electrode. The outermost ...

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Номер записи: 48