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Применить Всего найдено 21. Отображено 21.
19-09-1997 дата публикации

MANUFACTURE OF COMPOUND SEMICONDUCTOR SUBSTRATE AND TRANSISTOR USING THIS SUBSTRATE

Номер: JP0009246531A
Автор: AIGOU TAKASHI, YABE AIJI, TACHIKAWA AKIYOSHI
Принадлежит:

PROBLEM TO BE SOLVED: To provide the manufacture of compound semiconductor substrates, by which the same property of objects can be manufactured as transistor units, and the same property of transistors using these substrates. SOLUTION: The layers where n or i-AlGaAs layers 1 and n-GaAs layers 2 are stacked alternately is dry-etched in order while measuring the current value between a source 21 and a drain 22 in process, using the substrate where the n or i-AlGaAs layers 1 and n-GaAs layers 2 are stacked alternately. Hereby, the fine adjustment of the current between the source and the drain becomes possible. COPYRIGHT: (C)1997,JPO ...

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Номер записи: 1
04-08-1995 дата публикации

FORMATION OF COMPOUND SEMICONDUCTOR LAYER

Номер: JP0007201747A
Автор: SHIROU AIJI, TACHIKAWA AKIYOSHI, AIGOU TAKASHI, MORIYA AKIHIRO
Принадлежит:

PURPOSE: To provide a method of forming such a compound semiconductor layer as a silicon layer is not exposed on the outer edge part of the surface of a substrate using an epitaxial growth device of a face-down structure that the compound semiconductor layer supports the outer edge part of the substrate surface. CONSTITUTION: A method of forming a compound semiconductor layer has a stage of growing a first compound semiconductor layer 12 by an epitaxial growth device of a structure that a compound semiconductor layer is placed on a substrate 2 with a face to grow the compound semiconductor turned upward, and a stage of growing a second compound semiconductor layer 13 in such a way as to place the layer 12 with the face of the layer 12 turned downward on a susceptor of the epitaxial growth device of the structure, that the compound semiconductor layer is placed on the substrate with a face to grow the compound semiconductor facing turned downward. COPYRIGHT: (C)1995,JPO ...

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Номер записи: 2
31-10-1997 дата публикации

METHOD FOR MANUFACTURING HIGH RESISTANCE GALLIUM ARSENIDE ON SILICON SUBSTRATE

Номер: JP0009283447A
Автор: FUTAKI TOSHIROU, TACHIKAWA AKIYOSHI, FUJITA YUKIHISA, AIGOU TAKASHI
Принадлежит:

PROBLEM TO BE SOLVED: To contrive to reduce a mixing amount of silicon atoms into gallium arsenide by a method wherein, when gallium arsenic is crystal-grown by a MOCVD method using a lateral furnace on a silicon substrate, the speed of a gas running fluid on the silicon substrate is set to be 80 to 120cm/sec. SOLUTION: A cleaned silicon substrate 2 is mounted in a reaction chamber of a MOCVD device, the gross hydrogen flux for supplying to the reaction chamber is set to be 13slm, gas pressure is decompressed to be 40Torr, and the speed of a gas running fluid above the silicon substrate 2 is adjusted so as to be 80 to 120cm/sec. Thereafter, the silicon substrate 2 is rotated at 10rpm, while it is heated at 870°C, arsine gas is flown and it is heated at 10min. Next, a temperature of the silicon substrate 2 is set to be 400°C, a flux ratio of arsine gas to trimethyl gallium is set to be 40:1, reaction gas is supplied for 4min., and gallium arsenide of 150Å is crystal-grown on the silicon ...

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Номер записи: 3
31-03-1995 дата публикации

CIRCUIT AND METHOD FOR ANALYZING CHARACTERISTIC OF TRANSISTOR FORMED OF SEMICONDUCTOR CRYSTAL LAYER ON CONDUCTIVE BOARD

Номер: JP0007083991A
Автор: GOTO MITSUHIKO, AIGOU TAKASHI, MORIYA AKIHIRO
Принадлежит:

PURPOSE: To provide a circuit and a method for analyzing characteristics of a transistor wherein characteristics of substantial parts of the transistor are separated from influence caused by using a conductive board and can be analyzed with a small error. CONSTITUTION: In addition to a conventional small signal linear equivalent circuit, first capacitance Cgp and first resistance Rgp connected between a gate terminal and a ground potential in series, second capacitance Cdp and second resistance Rdp connected between a drain terminal and a ground potential in series and third resistance Rsub connected to third capacitance Cds in series are included. In addition, each circuit constants of the circuit are determined so that the minimum errors may be indicated for measurement value of an S parameter. COPYRIGHT: (C)1995,JPO ...

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Номер записи: 4
04-07-1995 дата публикации

COMPOUND SEMICONDUCTOR SUBSTRATE

Номер: JP0007169694A
Автор: MORIYA AKIHIRO, TACHIKAWA AKIYOSHI, SHIROU AIJI, AIGOU TAKASHI
Принадлежит:

PURPOSE: To provide a compound semiconductor substrate provided with an element formation region of low dislocation density on a silicon substrate. CONSTITUTION: An compound semiconductor 1b is epitaxially grown on a silicon substrate 1a, and doped with group III or V element whose amount is much enough to generate a stress field to form a grid-like doped region. Thereafter, thermal cycle annealing is performed to obtain a compound semiconductor substrate collecting dislocations in the doped region. COPYRIGHT: (C)1995,JPO ...

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Номер записи: 5
17-11-1988 дата публикации

MANUFACTURE OF SEMICONDUCTOR DEVICE

Номер: JP0063281471A
Автор: AIGOU TAKASHI
Принадлежит:

PURPOSE: To increase a pinch off breakdown voltage, by filling a gap between a source electrode and a drain electrode, and an insulating film with an Si3N4 film, and relieving an electric field concentration, by the effect of charge induced GaAs as the result of generated stress. CONSTITUTION: A gap A is filled with silicon nitride instead of the usual second SiO2 film. At the contact part between the silicon nitride and GaAs, negative polarization charges shown in figure by - symbole are induced in GaAs, by the effect of the stress of silicon nitride in the opposite direction to SiO2. The electric field generated by said charges acts in the direction from GaAs to a drain electrode end. On the contrary, an electric field generated by a drain bias acts in the direction from the drain electrode end to the GaAs side. Therefore, it can be understood that the electric field induced by polarization charges relieves the electric field concentration at the drain electrode end. COPYRIGHT: (C)1988 ...

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Номер записи: 6
15-04-1987 дата публикации

MANUFACTURE OF GAAS SEMICONDUCTOR SUBSTRATE

Номер: JP0062081768A
Автор: AIGOU TAKASHI
Принадлежит:

PURPOSE: To enhance the adhesion (bonding strength) of a bonding pad and a GaAs substrate, by adding a metal layer between a conventional film of Ti/Pt/Au and the GaAs substrate, and forming an alloy layer of the gold layer and the GaAs substrate. CONSTITUTION: A gold layer 10 is formed beneath a conventional gold plated layer 8 and a three-layer film 9 of Ti/Pt/Au. Heat treatment is performed so that ohmic contact of a source electrode 1 and a drain electrode 2, which have been formed before, is obtained with respect to the GaAs active layer. At the same time, the alloy layer of the gold layer 10 and the GaAs substrate 6 is obtained by this heat treatment. The heat treatment is performed by mounting the GaAs substrate 6 on a heat block, which is heated to 450°C for 2min. By implementing the alloy from the gold layer 10 and the GaAs substrate 6, the bonding strength (adhesion) of the bonding pad 4 and the GaAs substrate 6 is enhanced. COPYRIGHT: (C)1987,JPO&Japio ...

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Номер записи: 7
12-12-1995 дата публикации

SEMICONDUCTOR DEVICE

Номер: JP0007326731A
Автор: MORIKAWA YOJI, AIGOU TAKASHI
Принадлежит:

PURPOSE: To provide a semiconductor device having a declined parasitic capacity in electrode, wiring and pad part. CONSTITUTION: Within a semiconductor device using a substrate having a laminated structure of GaAs layers 11 and a silicon substrate 10, a high resistant regions 7 are provided in conductive layers 20 formed on the interfacial parts between the silicon substrate and the GaAs layers 11 as if encircling the electrodes, wiring or the region including a pad part 1. COPYRIGHT: (C)1995,JPO ...

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Номер записи: 8
20-02-1996 дата публикации

FIELD-EFFECT TRANSISTOR FORMED ON COMPOUND SEMICONDUCTOR LAYER

Номер: JP0008051121A
Автор: AIGOU TAKASHI
Принадлежит:

PURPOSE: To provide an FET in which the parasitic capacitance is reduced and in which a substrate formed with a compound semiconductor layer is used on a silicon substrate. CONSTITUTION: A field-effect transistor FET has a compound semiconductor layer 12, etc., on a silicon substrate 11, and at least one of electrodes of a gate G, a source S and a drain D and wirings and bonding pads connected thereto formed on the layer via an insulating layer 1. COPYRIGHT: (C)1996,JPO ...

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Номер записи: 9
08-07-1994 дата публикации

SUBSTRATE FOR EPITAXIAL GROWTH AND EPITAXIAL GROWTH METHOD

Номер: JP0006188164A
Автор: SHIROU AIJI, TACHIKAWA AKIYOSHI, AIGOU TAKASHI, MORIYA AKIHIRO
Принадлежит:

PURPOSE: To provide a silicon substrate in which a difference in level has been formed definitely on its surface as a substrate, for epitaxial growth, for the purpose of growing a compound semiconductor material on the silicon substrate and to provide the growth method of a compound semiconductor. CONSTITUTION: A silicon substrate which has been cut off so as to be tilted from a specific plane orientation is treated at a high temperature in a hydrogen atmosphere. Thereby, an oxide film on the surface is removed, and a difference in level on a clear step is formed. A compound semiconductor deposited on the substrate can direct a crystal orientation to a definite direction and can form a single crystal. In addition, the growth apparatus of the compound semiconductor may be the same as an apparatus for executing a high-temperature heat treatment or may be different from that, and a method to grow, a low- temperature layer at a definite temperature and a method to grow the low- temperature ...

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Номер записи: 10
11-03-1994 дата публикации

CRYSTAL GROWTH OF GAAS ON SILICON SUBSTRATE

Номер: JP0006069136A
Автор: TACHIKAWA AKIYOSHI, MORIYA AKIHIRO, SHIROU AIJI, AIGOU TAKASHI
Принадлежит:

PURPOSE: To obtain an epitaxial film of GaAs having low dislocation density by growing super lattice of InGaAs and GaAs thicker than a limit thickness during growth of GaAs under normal temperature. CONSTITUTION: Polycrystalline GaAs is grown by 200Å at 400°C and GaAs is grown by 1μm thereon at an actual growing temperature of 650°C. After subsequent growth of GaAs by 1μm at a constant growing temperature of 650°C, 720Å of InGaAs and 120Å of GaAs are grown alternately five times (super lattice block). 0.67μm of GaAs is then grown thereon. Furthermore, super lattice block 3, 0.67μm of GaAs, and super lattice block 3 are grown repeatedly and 0.97μm of GaAs is finally grown. This method allows growth of GaAs/Si wafer having low dislocation density. COPYRIGHT: (C)1994,JPO&Japio ...

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Номер записи: 11
02-11-1989 дата публикации

MANUFACTURE OF SEMICONDUCTOR DEVICE

Номер: JP0001274477A
Автор: AIGOU TAKASHI
Принадлежит:

PURPOSE: To improve the characteristics of a device such as the uniformity of gate breakdown strength and threshold voltage by dry-etching an insulating film for a spacer, boring a recess forming section, executing heat treatment and forming a recess section through etching. CONSTITUTION: A resist film mask 8 to which a recess forming section is bored is shaped through a photoprocess, and an exposed SiO2 film 5 is dry-etched using a fluoride gas as the reaction gas and the window of the recess forming section is bored. The resist film mask 8 is removed, and the whole is thermally treated in a nitrogen atmosphere. The high heat treatment temperature is preferable, but the heat treatment temperature must be brought to 400°C or lower from the relationship of an electrode alloying temperature. HF and H2O2 are mixed, and a recess section 17 is shaped through wet etching by using a solution in which the mixed solution is diluted. Since a diluted solution is employed as the etchant, the SiO2 film ...

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Номер записи: 12
11-06-1993 дата публикации

MANUFACTURE OF HETEROEPITAXIAL WAFER

Номер: JP0005144727A
Автор: TACHIKAWA AKIYOSHI, MORIYA AKIHIRO, AIGOU TAKASHI, SHIROU AIJI
Принадлежит:

PURPOSE: To improve the warp of a substrate due to the difference of a coefficient of thermal expansion or due to the difference of a lattice constant and to improve a stress exerted on an epitaxial film without increasing the number of processes and appratuses to be used in a manufacturing process wherein a heteroepitaxial growth operation is executed. CONSTITUTION: In a process, a substance 2 whose coefficient of thermal expansion is equal to that of a substance 4 to be grown is applied in advance to a susceptor 1 on which a semiconductor-substrate wafer 3 is set, the semiconductor-substrate wafer 3 is then placed on the susceptor 1 and a heteroepitaxial growth operation is executed. In the process, the substance 2 which has been applied to the susceptor 1 is applied to the rear of the semiconductor-substrate wafer 3. COPYRIGHT: (C)1993,JPO&Japio ...

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Номер записи: 13
04-08-1995 дата публикации

MANUFACTURE OF SEMICONDUCTOR SUBSTRATE

Номер: JP0007201748A
Автор: SHIROU AIJI, TACHIKAWA AKIYOSHI, AIGOU TAKASHI, MORIYA AKIHIRO
Принадлежит:

PURPOSE: To provide a method of manufacturing a GaAs/Si semiconductor substrate, which has no possibility of a reduction in the yield of the substrate due to contamination of an Si base in a device process. CONSTITUTION: A GaAs film 2 is first formed on the substantial whole surface of an Si base in a first film thickness fully less than a desired final film thickness, an insulating layer 3 is made to coat the upper part of the film 2, desired regions of this layer 3 are removed to expose the film 2 partially and after that, a GaAs film is selectively grown on these regions 2b, where the GaAs film is partially made to expose, up to the final film thickness. COPYRIGHT: (C)1995,JPO ...

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Номер записи: 14
30-07-1993 дата публикации

FIELD EFFECT TRANSISTOR

Номер: JP0005190574A
Автор: AIGOU TAKASHI, MORIYA AKIHIRO, SHIROU AIJI, TACHIKAWA AKIYOSHI
Принадлежит:

PURPOSE: To enable a field effect transistor to operate in a high frequency band by a method wherein a parasitic capacitor which makes a gate electrode, a gate bonding electrode, a source electrode, or a drain electrode serve as one of its electrodes is lessened in capacitance. CONSTITUTION: Both a source electrode 16 and a drain electrode 17 of a GaAs MES FET are formed in lattice. Therefore, the electrodes 16 and 17 are smaller in area than conventional ones of solid structure. Therefore, a parasitic capacitor using the source electrode 16 or the drain electrode 17 as one electrode has small capacitance. The width L of a grid is over 3μm. Therefore, a current which flows through the electrodes 16 and 17 is nearly equal to a current which flows through electrodes of solid structure in quantity, so that a current is not blocked. COPYRIGHT: (C)1993,JPO&Japio ...

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Номер записи: 15
01-10-1996 дата публикации

COMPOUND SEMICONDUCTOR BOARD AND ITS MANUFACTURE

Номер: JP0008255755A
Автор: YABE AIJI, TACHIKAWA AKIYOSHI, AIGOU TAKASHI, MORIYA AKIHIRO
Принадлежит:

PURPOSE: To improve surface flatness enough to form a semiconductor device which is excellent in element characteristic without requiring a polishing process in the middle of growth of a compound semiconductor in a compound semiconductor board with at least one compound semiconductor layer formed epitaxially on a silicon single crystalline board. CONSTITUTION: A surface of a silicon single crystalline board wherein a compound semiconductor layer is formed tilts at an off angle of l o or less to a (100) surface and roughness of a free surface of a compound semiconductor layer is at most 3nm in mean square roughness (Rms) of a measurement visual field area of 10μm×10μm l by an interatomic force microscope or at most 10.5nm in a maximum difference of elevation (Ry). The manufacturing method includes a process for forming a 5 to 15nm-thick buffer layer consisting of a first compound semiconductor layer and a process for forming a second compound semiconductor layer by epitaxial growth on a ...

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Номер записи: 16
29-10-1993 дата публикации

DEVICE FOR MANUFACTURE OF SEMICONDUCTOR SUBSTRATE

Номер: JP0005283345A
Автор: SHIROU AIJI, TACHIKAWA AKIYOSHI, AIGOU TAKASHI, MORIYA AKIHIRO
Принадлежит:

PURPOSE: To restrain doping of a substrate constituent element generated during hetero formation of a semiconductor into a formed film. CONSTITUTION: A semiconductor substrate 11 is vertically arranged to a flow of a formation raw material 12 in a semiconductor hetero formation device and a function to enable substrate rotation is provided. Thereby, a flow is generated from a substrate front side to a rear side, and a substrate constituent element 13 gasified from a substrate surface can not come out to the substrate front side and does not enter a formed film 16. Thereby, element doping from the semiconductor substrate is eliminated and electrical characteristics of the formed film can be controlled by formation conditions and introduction of doping gas. COPYRIGHT: (C)1993,JPO&Japio ...

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Номер записи: 17
16-07-1996 дата публикации

SEMICONDUCTOR DEVICE

Номер: JP0008186127A
Автор: AIGOU TAKASHI, TAKAYAMA SEIJI, OTA YASUMITSU
Принадлежит:

PURPOSE: To provide an FET with a high cut-off frequency, by limiting the total capacitance of source/gate-pad capacitance and source/gate-bus-line capacitance to a given level or lower, and preventing a deterioration in high frequency caused by capacitance on the input side. CONSTITUTION: A filed effect transistor FET is formed by using GaAs/Si substrate which includes a GaAs substrate made up of a GaAs buffer layer 11 and a GaAs active layer on a silicon substrate 10. As to parasitic capacitance in the FET, the total capacitance of source/gate-pad capacitance and source/ gate-bus-line capacitance causes an increase in source/gate capacitance on the input side. In this case, the total capacitance of parasitic capacitance is made not more than 10% of the source/gate capacitance on the input side, so a decrease of cut-off frequency in high-frequency input can be prevented. The influence of parasitic capacitance caused by the pad or the gate bus-line is reduced, and the FET that is by no ...

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Номер записи: 18
30-06-1998 дата публикации

MANUFACTURING METHOD OF DEVICE CHIP ON HETERO EPISTAXIAL WAFER

Номер: JP0010177974A
Автор: MORIYA AKIHIRO, AIGOU TAKASHI
Принадлежит:

PROBLEM TO BE SOLVED: To protect a wafer against warpage and wrinkles produced when the wafer is divided into chips by a method wherein a cut larger than the thickness of an epitaxial layer but smaller than the thickness of a final device is made between device chips arranged like a grid from above the surface of the wafer, the backside of the wafer is ground down to make the wafer as thick as a final device, and the wafer is divided into device chips. SOLUTION: A GaAs film 2 is epitaxially grown as thick as 3.5μm on a 525μm thick Si substrate 1, and power FETs 3 are patterned like a grid on the Si substrate 1. A 70μm deep cut 6 is made by a dicing saw along a boundary between the patterned grids on the surface of the substrate 1. Then, protecting resist 7 is applied onto the surface of the substrate 1, a glass board 4 is attached onto the protecting resist 7, the backside of the Si substrate 1 is ground as far as 425μm by a lapping machine to make the Si substrate 1 as thick as 100μm.

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Номер записи: 19
07-10-1997 дата публикации

JIG FOR SUSCEPTOR OF CVD APPARATUS

Номер: JP0009266240A
Автор: YABE AIJI, TACHIKAWA AKIYOSHI, FUTAKI TOSHIROU, AIGOU TAKASHI
Принадлежит:

PROBLEM TO BE SOLVED: To prevent a substrate from being contaminated with a substance deposited on a susceptor by laying the substrate to be treated on a susceptor which has a hole to house the structure to be treated and is made of a less contaminable material little in contamination and superior in washing property. SOLUTION: A quartz-made annular ring-like jig 12 is disposed on a susceptor 11 good in thermal conductivity and substrate wafer 13 is disposed within this ring. The susceptor is made of Mo and the ring 12 is made of quartz glass superior in washing property to wash and dry every deposition process. The substrate 13 uses a GaAs wafer. The ring 12 has a hole fitted to the shape of the substrate 13 so that the gap round the substrate 13 fitted in the hole is 1mm or less. To avoid disturbing the flow of a material gas at deposition, the ring has the same thickness as that of the substrate 13. COPYRIGHT: (C)1997,JPO ...

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Номер записи: 20
02-09-1994 дата публикации

METHOD OF GROWING COMPOUND SEMICONDUCTOR ON SILICON SUBSTRATE

Номер: JP0006244122A
Автор: TACHIKAWA AKIYOSHI, SHIROU AIJI, MORIYA AKIHIRO, AIGOU TAKASHI
Принадлежит:

PURPOSE: To provide a method of growing compound semiconductor on a silicon substrate wherein simplification of process and improvement of surface morphology can be realized without deteriorating crystallinity. CONSTITUTION: When an epitaxial film of compound semiconductor is grown on a cleaned silicon substrate having a surface which is so clean that the epitaxial film of compound semiconductor can be grown, raw material is continuously supplied in the process of raising the temperature, from the temperature capable of decomposing raw material necessary to grow the compound semiconductor to the temperature at which single crystal of the compound semiconductor can be grown. COPYRIGHT: (C)1994,JPO&Japio ...

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Номер записи: 21