Circuit board and method for manufacturing the same

A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface.

Apparatus for forming metal film

An apparatus for metal plating on a substrate with through-holes includes a chamber that the substrate is disposed inside the chamber to be divided into two sections. A pressure generator and a pressure controller are connected to this and correspond to two sides of the substrate respectively. The pressure generator is used for pumping a electrolyte flowed parallel to the surface of the substrate into the chamber. The pressure controller is used for channeling the electrolyte off the chamber and controlling the pressure differences between the two sides of the substrate. So that the electrolyte flowed parallel to the surface of the substrate is pumped by the pressure generator and it passes several through-holes to control the thickness of metal plating on the.substrate and inner walls of the through-holes.

METHOD FOR INSPECTING AND MENDING DEFECT OF PHOTO-RESIST AND MANUFACTURING PROCESS OF PRINTED CIRCUIT BOARD

A method for inspecting and mending defects of photo-resist is provided. It includes the following steps. First, a substrate having at least one film is provided. Then, a patterned photo-resist layer is formed on the film. Next, an optical inspection procedure is performed to inspect whether the patterned photo-resist layer has defects or not. If the patterned photo-resist layer has defects, the defects are classified into gaps and protrusions and then the gaps and the protrusions are positioned. If the patterned photo-resist layer has defects such as gaps, an ink-jet printing method, for example, is performed on the patterned photo-resist layer to fill the gaps up. If the patterned photo-resist layer has defects such as protrusions, a laser method, for example, is performed on the patterned photo-resist layer to remove the protrusions. So the defects of the patterned photo-resist layer can be mended.

EMBEDDED WIRING BOARD AND A MANUFACTURING METHOD THEREOF

An embedded wiring board includes an upper wiring layer, a lower wiring layer, an insulation layer, a first conductive pillar and a second conductive pillar. The upper wiring layer contains an upper pad, the lower wiring layer contains a lower pad, and the insulation layer contains an upper surface and a lower surface opposite to the upper surface. The upper pad is embedded in the upper surface and the lower pad is embedded in the lower surface. The first conductive pillar is located in the insulation layer and includes an end surface which is exposed by the upper surface. A height of the first conductive pillar relative to the upper surface is larger than a depth of the upper pad relative to the upper surface. In addition, the second conductive pillar is located in the insulation layer and is connected between the first conductive pillar and the lower pad. 1. A manufacturing method of an embedded wiring board , comprising:providing an insulation layer and a lower wiring layer, wherein the insulation layer is provided with an upper surface and a lower surface opposite to the upper surface, the lower wiring layer is located at the lower surface and includes a lower pad which is embedded in the lower surface;forming a groove and an engraved pattern on the upper surface, wherein a depth of the groove relative to the upper surface is larger than a depth of the engraved pattern relative to the upper surface;forming a blind via on a bottom surface of the groove to expose the lower pad;forming an upper wiring layer in the engraved pattern;forming a first conductive pillar in the groove; and forming a second conductive pillar in the blind via, wherein the second conductive pillar is connected between the first conductive pillar and the lower pad.2. The manufacturing method of an embedded wiring board according to claim 1 , wherein the groove is formed by irradiating a first laser beam on the upper surface to ablate the insulation layer.3. The manufacturing method of an ...

Circuit board and manufacturing method thereof and electro-optic apparatus having the circuit board

A circuit board, a manufacturing method thereof, and an electro-optic apparatus having the circuit board are provided. The circuit board includes a substrate including a first dielectric layer and a first circuit layer disposed thereon, a waveguide layer disposed on a portion of the substrate, a second dielectric layer, a convex structure and a second circuit layer. The second dielectric layer is disposed on the substrate and the waveguide layer. The second dielectric layer has an opening exposing the sidewall of the waveguide layer and a portion of the first circuit layer. The convex structure is disposed on the sidewall of the waveguide layer. The convex structure and the waveguide layer respectively have refractive index n1 and n2, and |n1n2|/n1<1%. The surface roughness of the convex structure is less than that of the sidewall of the waveguide layer. The second circuit layer is disposed on the second dielectric layer.

Vehicle door opening warning system and vehicle door opening warning method

A vehicle door opening warning system including a control unit, a projection unit and a detection unit is provided. The control unit is disposed at a door of a vehicle. The projection unit is disposed at the door and is electrically coupled to the control unit. The detection unit is disposed outside of the vehicle and is electrically coupled to the control unit. When the detection unit detects a moving object existing within 5 to 30 meters of the vehicle, the detection unit produces a signal. The control unit receives the signal and controls the projection unit to project a warning message according to the signal. A vehicle door opening warning method is also provided.

METHOD OF FABRICATING SUBSTRATE

A method of fabricating a substrate includes following steps. First, a metallic panel having a first surface and a second surface is provided. A first half-etching process is carried out to etch the first surface of the metallic panel to a first depth so that a first patterned metallic layer is formed on the first surface. Next, a first insulating material is deposited into gaps in the first patterned metallic layer to form a first insulator. Thereafter, a second half-etching process is carried out to etch the second surface of the metallic panel to a second depth and expose at least a portion of the first insulator so that a second patterned metallic layer is formed on the second surface. The first depth and the second depth together equal the thickness of the metallic panel.

Circuit substrate and manufacturing method thereof

A manufacturing method of a circuit substrate includes the following steps. A dielectric layer is formed on at least one surface of a substrate. An insulating layer is formed on the dielectric layer. A portion of the insulating layer and a portion of the dielectric layer are removed, so as to form at least one blind via in the dielectric layer and the insulating layer. An electroless plating layer is formed on the sidewall of the blind via and a remaining portion of the insulating layer, wherein the binding strength between the insulating layer and the electroless plating layer is greater than that between the dielectric layer and the electroless plating layer. A patterned conductive layer is plated to cover the electroless plating layer.

METHOD FOR MANUFACTURING THREE-DIMENSIONAL CIRCUIT

A method for manufacturing a three-dimensional circuit is described as follows. Firstly, a three-dimensional insulating structure having at least one uneven surface is provided. Secondly, a self-assembly film is formed on the uneven surface for completely covering the uneven surface. Next, a catalytic film is formed on the self-assembly film. Afterward, the self-assembly film and the catalytic film are patterned. Then, a three-dimensional circuit structure is formed on the catalytic film by chemical deposition.

PROCESS FOR FABRICATING WIRING BOARD

A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.

CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF AND ELECTRO-OPTIC APPARATUS HAVING THE CIRCUIT BOARD

A circuit board, a manufacturing method thereof, and an electro-optic apparatus having the circuit board are provided. The circuit board includes a substrate including a first dielectric layer and a first circuit layer disposed thereon, a waveguide layer disposed on a portion of the substrate, a second dielectric layer, a convex structure and a second circuit layer. The second dielectric layer is disposed on the substrate and the waveguide layer. The second dielectric layer has an opening exposing the sidewall of the waveguide layer and a portion of the first circuit layer. The convex structure is disposed on the sidewall of the waveguide layer. The convex structure and the waveguide layer respectively have refractive index n and n and |n-nn<1%. The surface roughness of the convex structure is less than that of the sidewall of the waveguide layer. The second circuit layer is disposed on the second dielectric layer. 1. A circuit board , comprising:a substrate comprising a first dielectric layer and a first circuit layer disposed on the first dielectric layer;a waveguide layer, disposed on a portion of the substrate;a second dielectric layer, disposed on the substrate and the waveguide layer, wherein the second dielectric layer has an opening exposing the sidewall of the waveguide layer and a portion of the first circuit layer;a convex structure, disposed on the sidewall of the waveguide layer; anda second circuit layer, disposed on the second dielectric layer.212121. The circuit board of claim 1 , wherein the convex structure has a refractive index n claim 1 , the waveguide layer has a refractive index n claim 1 , and |n-n|/n<1% claim 1 , wherein the surface roughness of the convex structure is less than the surface roughness of the sidewall of the waveguide layer.3. The circuit board of claim 1 , wherein the material of the convex structure comprises a polymer material having a glass transition temperature less than or equal to the glass transition temperature of ...

CAPACITOR AND MANUFACTURING METHOD THEREOF

A capacitor and a manufacturing method thereof are provided. The capacitor includes a porous substrate, an electrolyte composition, and a pair of electrodes. The porous substrate has a plurality of holes. The electrolyte composition is located in the holes of the porous substrate, and the electrolyte composition includes an electrolyte solution and a nano carbon material dispersed in the electrolyte solution. The electrodes are respectively located on two opposite surfaces of the porous substrate. 1. A capacitor , comprising:a porous substrate having a plurality of holes;an electrolyte composition located in the holes of the porous substrate, the electrolyte composition comprising an electrolyte solution and a nano carbon material dispersed in the electrolyte solution; anda pair of electrodes respectively located on two opposite surfaces of the porous substrate.2. The capacitor of claim 1 , wherein a material of the porous substrate comprises melamine claim 1 , polystyrene claim 1 , polyurethane claim 1 , polyethylene claim 1 , ethylene-vinyl acetate copolymer claim 1 , thermoplastic rubber claim 1 , or polyvinyl chloride.3. The capacitor of claim 1 , wherein based on a total weight of the electrolyte composition claim 1 , a content of the nano carbon material is between 1% and 10%.4. The capacitor of claim 1 , wherein the nano carbon material comprises expanded graphite or carbon aerogel.5. The capacitor of claim 4 , wherein the carbon aerogel comprises a particle having a particle size between 3 nm and 20 nm.6. The capacitor of claim 4 , wherein a porosity of the carbon aerogel exceeds 50%.7. The capacitor of claim 4 , wherein a specific surface area of the carbon aerogel is between 400 m/g and 1000 m/g.8. A manufacturing method of a capacitor claim 4 , comprising:mixing a nano carbon material and an electrolyte solution to obtain an electrolyte composition;immersing a porous substrate in the electrolyte composition; andforming electrodes on two opposite surfaces ...

Circuit structure and manufacturing method thereof

A circuit structure includes an inner circuit layer, a first and a second dielectric layers, a first and a second conductive material layers, and a second and a third conductive layers. The first dielectric layer covers a first conductive layer of the inner circuit layer and has a first surface and first circuit grooves. The first conductive material layer is disposed inside the first circuit grooves. The second conductive layer is disposed on the first surface and includes a signal trace and at least two reference traces. The second dielectric layer covers the first surface and the second conductive layer and has a second surface and second circuit grooves. Widths of the first and the second circuit grooves are smaller than that of the reference traces. The second conductive material layer is disposed inside the second circuit grooves. The third conductive layer is disposed on the second surface.

MANUFACTURING METHOD OF CIRCUIT STRUCTURE

A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer. 1. A manufacturing method of a circuit board structure , comprising:providing an inner circuit structure, the inner circuit structure comprising a core layer having an upper surface and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface;forming an insulating material layer on a portion of the first patterned circuit layer, wherein the insulating material layer covers a portion of the upper surface;forming a laser resisting layer on at least a portion of the insulating material layer;adhering a release layer to the laser resisting layer;performing a build-up process so as to laminate a first build-up circuit structure and a second build-up circuit structure on the first patterned circuit layer and the second patterned circuit layer, respectively, wherein the first build-up circuit structure covers the release layer; andperforming a laser ablation process on the first build-up circuit structure to irradiate a laser beam on the laser resisting layer so as to remove a portion of the first build- ...

MANUFACTURING METHOD OF CIRCUIT BOARD AND STRUCTURE THEREOF

A manufacturing method of a circuit board including the following steps is provided. A first patterned circuit layer is formed on a surface of a circuit substrate, and the first patterned circuit layer exposes a portion of the surface of the circuit substrate. A patterned glue layer is formed on the portion of the surface of the circuit substrate exposed by the first patterned circuit layer. A second patterned circuit layer is transfer-printed on the corresponding patterned glue layer. In addition, a structure of the circuit board is also mentioned. 1. A manufacturing method of a circuit board , comprising:forming a first patterned circuit layer on a surface of a circuit substrate, and the first patterned circuit layer exposing a portion of the surface of the circuit substrate;forming a patterned glue layer on the portion of the surface of the circuit substrate exposed by the first patterned circuit layer; andtransfer-printing a second patterned circuit layer on the corresponding patterned glue layer.2. The manufacturing method of the circuit board according to claim 1 , further comprising forming the second patterned circuit layer on a release layer before transfer-printing the second patterned circuit layer on the corresponding patterned glue layer.3. The manufacturing method of the circuit board according to claim 2 , wherein the circuit substrate has a plurality of first alignment patterns claim 2 , the release layer has a plurality of second alignment patterns claim 2 , and before transfer-printing the second patterned circuit layer on the corresponding patterned glue layer claim 2 , the first alignment patterns are aligned with the second alignment patterns.4. The manufacturing method of the circuit board according to claim 1 , further comprising forming a dielectric layer on the circuit substrate claim 1 , wherein the dielectric layer covers on the first patterned circuit layer and the second patterned circuit layer and fills between the first patterned ...

Opto-electronic circuit board and method for assembling the same

A method for assembling an opto-electronic circuit board is described as follows. A bottom cladding layer, a core layer and a top cladding layer are formed on the base orderly such that a waveguide is completed. A first light-guide hole is formed in a base material, and a light source is disposed on the base material thereby forming an emission component. A second light-guide hole is formed in another base material, and then an optic receiver is disposed on another base material thereby forming a receiver component. A circuit substrate is processed in order to form a first cavity, a second cavity and a third cavity on a first circuit layer of the substrate. The waveguide, the emission component and the receiver component are disposed respectively in the first cavity, the second cavity and the third cavity.

Circuit board and method for manufacturing the same

A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface.

Optical-electro circuit board

An optical component including a multi-layer substrate, an optical waveguide element, and two optical-electro assemblies is provided. The multi-layer substrate includes a dielectric layer, two circuit layers, and two through holes passing through the dielectric layer. The optical waveguide element is located on the multi-layer substrate and between the through holes. The optical-electro assemblies are respectively inserted into the corresponding through holes and correspondingly located at two opposite ends of the optical waveguide element. One of the optical-electro assemblies transforms an electrical signal into a light beam and provides the light beam to the optical waveguide element, and the other one of the optical-electro assemblies receives the light beam transmitted from the optical waveguide element and transforms the light beam into another electrical signal. A manufacturing method of the optical component and an optical-electro circuit board having the optical component are also ...

Method of making a circuit structure of a circuit board

A circuit structure of a circuit board includes a dielectric layer, a number of first circuits, and a number of second circuits. The dielectric layer has a surface and an intaglio pattern. The first circuits are disposed on the surface of the dielectric layer. The second circuits are disposed in the intaglio pattern of the dielectric layer. Line widths of the second circuits are smaller than line widths of the first circuits, and a distance between every two of the adjacent second circuits is shorter than a distance between every two of the adjacent first circuits.

FABRICATION METHOD FOR FLEXIBLE CIRCUIT BOARD

A fabrication method for a flexible circuit board is provided. The fabrication method includes the following steps. Firstly, a release film having an upper surface and a lower surface opposite to each other is provided. Next, two flexible substrates are respectively disposed on the upper surface and the lower surface. Next, a plurality of nano-scale micro-pores are formed on each flexible substrate to form two non-smooth flexible substrates. The nano-scale micro-pores evenly distributed over an outer surface of each non-smooth flexible substrate. Each non-smooth flexible substrate being adapted to be performed a plating process directly on the outer surface thereof. 1. A fabrication method for a flexible circuit board , the fabrication method comprising:providing a release film having an upper surface and a lower surface opposite to each other; anddisposing two flexible substrates respectively on the upper surface and the lower surface;forming a plurality of nano-scale micro-pores on each flexible substrate to form two non-smooth flexible substrates, the nano-scale micro-pores evenly distributed over an outer surface of each non-smooth flexible substrate;directly forming two metal layers respectively on the outer surfaces of the non-smooth flexible substrates by electroplating;forming a plurality of openings on each of the metal layers, each of the openings exposing a part of the corresponding outer surface; andseparating the release film from the non-smooth flexible substrates to form the two independent flexible circuit boards.2. The fabrication method for the flexible circuit board as claimed in claim 1 , wherein the method of forming a plurality of nano-scale micro-pores on each flexible substrate comprises micro-etching process.3. (canceled)4. The fabrication method for the flexible circuit board as claimed in claim 1 , wherein each of the non-smooth flexible substrates comprises evenly distributed nano-scale silicon dioxide particles.5. A fabrication method ...

MANUFACTURING METHOD FOR MULTI-LAYER CIRCUIT BOARD

A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having two surfaces opposite to each other and a via connecting there between is provided. Next, a patterned circuit layer is formed on each of the surfaces by using the via as an alignment target. Each patterned circuit layer includes a concentric-circle pattern. Next, a first stacking layer is formed on each of the surfaces. Then, a first through hole penetrating regions of the first stacking layer and the substrate where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed. Next, a second stacking layer is formed on each first stacking layer. Afterward, a second through hole penetrating regions of the first, the second stacking layers and the substrate where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed.

Embedded wiring board and a manufacturing method thereof

An embedded wiring board includes an upper wiring layer, a lower wiring layer, an insulation layer, a first conductive pillar and a second conductive pillar. The upper wiring layer contains an upper pad, the lower wiring layer contains a lower pad, and the insulation layer contains an upper surface and a lower surface opposite to the upper surface. The upper pad is embedded in the upper surface and the lower pad is embedded in the lower surface. The first conductive pillar is located in the insulation layer and includes an end surface which is exposed by the upper surface. A height of the first conductive pillar relative to the upper surface is larger than a depth of the upper pad relative to the upper surface. In addition, the second conductive pillar is located in the insulation layer and is connected between the first conductive pillar and the lower pad.

CIRCUIT BOARD AND FABRICATION METHOD THEREOF

A method for fabricating a circuit board is provided. A non-conductive material layer is provided on a core substrate, wherein the non-conductive material layer comprises a dielectric material and catalytic particles. A recessed circuit structure is then formed in the non-conductive material layer with a laser beam. Simultaneously, the catalytic particles in the recessed circuit structure are activated with aid of the laser. A buried conductive structure is then formed in the recessed circuit structure by chemical copper deposition methods.

CIRCUIT BOARD STRUCTURE

A circuit board structure including a circuit board main body and an injection molded three-dimensional circuit device encapsulating at least a portion of the circuit board main body is provided. The three-dimensional circuit device includes a molded plastic body having a non-plate type, stereo structure, on which a three-dimensional pattern is also fabricated. The three-dimensional pattern is interconnected with a contact pad on the circuit board main body through a conductive via.

Circuit board and manufacturing method thereof

A circuit board and a manufacturing method thereof are provided. The circuit board includes a dielectric substrate, a circuit pattern and a dielectric layer. The circuit pattern is disposed on the dielectric substrate. The dielectric layer is disposed on the dielectric substrate and covers the circuit pattern. The dielectric layer includes a dielectric matrix and a mesh-shaped fiber structure disposed in the dielectric matrix. There is no mesh-shaped fiber structure on a portion of the dielectric substrate exposed by the circuit pattern.

Manufacturing method of optical component

An optical component including a multi-layer substrate, an optical waveguide element, and two optical-electro assemblies is provided. The multi-layer substrate includes a dielectric layer, two circuit layers, and two through holes passing through the dielectric layer. The optical waveguide element is located on the multi-layer substrate and between the through holes. The optical-electro assemblies are respectively inserted into the corresponding through holes and correspondingly located at two opposite ends of the optical waveguide element. One of the optical-electro assemblies transforms an electrical signal into a light beam and provides the light beam to the optical waveguide element, and the other one of the optical-electro assemblies receives the light beam transmitted from the optical waveguide element and transforms the light beam into another electrical signal. A manufacturing method of the optical component and an optical-electro circuit board having the optical component are also provided.

VEHICLE DOOR OPENING WARNING SYSTEM AND VEHICLE DOOR OPENING WARNING METHOD

A vehicle door opening warning system including a control unit, a projection unit and a detection unit is provided. The control unit is disposed at a door of a vehicle. The projection unit is disposed at the door and is electrically coupled to the control unit. The detection unit is disposed outside of the vehicle and is electrically coupled to the control unit. When the detection unit detects a moving object existing within 5 to 30 meters of the vehicle, the detection unit produces a signal. The control unit receives the signal and controls the projection unit to project a warning message according to the signal. A vehicle door opening warning method is also provided. 1. A vehicle door opening warning system , comprising:a control unit, disposed at a door of a vehicle;a projection unit, disposed at the door and electrically coupled to the control unit; and a steering element; and', 'a projection lens, rotatably disposed at the door through the steering element, to turn the projection lens towards a predetermined projection area for projecting the warning message onto the predetermined projection area., 'a detection unit, disposed outside of the vehicle, electrically coupled to the control unit, and producing a signal when the detection unit detects a moving object existing within 5 to 30 meters of the vehicle, wherein the control unit receives the signal and controls the projection unit to project a warning message according to the signal, wherein the projection unit comprises2. (canceled)3. The vehicle door opening warning system as recited in claim 1 , wherein the predetermined projection area is located on a window of the door.4. The vehicle door opening warning system as recited in claim 1 , further comprising:an independent power supply unit, configured to provide power to the control unit, the projection unit and the detection unit when the vehicle is turned off.5. The vehicle door opening warning system as recited in claim 1 , further comprising:an alarm ...

METHOD OF FABRICATING CIRCUIT BOARD STRUCTURE

A method of fabrication a circuit board structure comprising providing a circuit board main body, forming a molded, irregular plastic body having a non-plate type, stereo structure and at least one scraggy surface by encapsulating at least a portion of said circuit board main body with injection molded material, and forming a first three-dimensional circuit pattern on said molded, irregular plastic body thereby defining a three-dimensional circuit device.

Process for fabricating wiring board

A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.

CIRCUIT STRUCTURE OF CIRCUIT BOARD

A circuit structure of a circuit board includes a dielectric layer, a number of first circuits, and a number of second circuits. The dielectric layer has a surface and an intaglio pattern. The first circuits are disposed on the surface of the dielectric layer. The second circuits are disposed in the intaglio pattern of the dielectric layer. Line widths of the second circuits are smaller than line widths of the first circuits, and a distance between every two of the adjacent second circuits is shorter than a distance between every two of the adjacent first circuits. 1. A circuit structure of a circuit board , comprising:a dielectric layer, having a surface and an intaglio pattern;a plurality of first circuits, disposed on the surface of the dielectric layer; anda plurality of second circuits, disposed in the intaglio pattern of the dielectric layer, wherein line widths of the second circuits are smaller than line widths of the first circuits, and a distance between every two of the adjacent second circuits is shorter than a distance between every two of the adjacent first circuits.2. The circuit structure of the circuit board as claimed in claim 1 , further comprising a patterned deposition layer disposed between the first circuits and the surface of the dielectric layer and between the second circuits and an inner wall of the intaglio pattern.3. The circuit structure of the circuit board as claimed in claim 2 , wherein a material of the patterned deposition layer comprises copper claim 2 , tin claim 2 , aluminum claim 2 , nickel claim 2 , zinc claim 2 , or gold.4. The circuit structure of the circuit board as claimed in claim 1 , wherein a material of the first circuits comprises copper or aluminum.5. The circuit structure of the circuit board as claimed in claim 1 , wherein a material of the second circuits comprises copper or aluminum.6. The circuit structure of the circuit board as claimed in claim 1 , wherein the second circuits and the surface of the dielectric ...

Manufacturing method for multi-layer circuit board

A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having a first via penetrating the substrate is provided. Next, a patterned circuit layer is formed on a surface of the substrate by using the first via as an alignment target. The first patterned circuit layer includes a first concentric-circle pattern surrounding the first via. Next, a first stacking layer is formed on the surface. Then, a first through hole penetrating regions where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected on the first stacking layer and the substrate is formed. Next, a second stacking layer is formed on the first stacking layer. Afterward, a second through hole penetrating regions where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected on of the first, the second stacking layers and the substrate is formed.

MANUFACTURING METHOD OF CIRCUIT STRUCTURE

A manufacturing method of circuit structure is described as follows. Firstly, a composite dielectric layer, a circuit board and an insulating layer disposed therebetween are provided. The composite dielectric layer includes a non-platable dielectric layer and a platable dielectric layer between the non-platable dielectric layer and the insulating layer wherein the non-platable dielectric layer includes a chemical non-platable material and the platable dielectric layer includes a chemical platable material. Then, the composite dielectric layer, the circuit board and the insulating layer are compressed. Subsequently, a through hole passing through the composite dielectric layer and the insulating layer is formed and a conductive via connecting a circuit layer of the circuit board is formed therein. Then, a trench pattern passing through the non-platable dielectric layer is formed on the composite dielectric layer. Subsequently, a chemical plating process is performed to form a conductive ...

MANUFACTURING METHOD FOR MULTI-LAYER CIRCUIT BOARD

A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having a first via penetrating the substrate is provided. Next, a patterned circuit layer is formed on a surface of the substrate by using the first via as an alignment target. The first patterned circuit layer includes a first concentric-circle pattern surrounding the first via. Next, a first stacking layer is formed on the surface. Then, a first through hole penetrating regions where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected on the first stacking layer and the substrate is formed. Next, a second stacking layer is formed on the first stacking layer. Afterward, a second through hole penetrating regions where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected on of the first, the second stacking layers and the substrate is formed. 1. A manufacturing method for a multi-layer circuit board , comprising:providing a substrate having a first via penetrating the substrate;forming a first patterned circuit layer on a surface of the substrate by using the first via as an alignment target, and the first patterned circuit layer including a first concentric-circle pattern surrounding the first via;forming a first stacking layer on the surface and covering the first patterned circuit layer, and the first stacking layer including a first dielectric layer and a first circuit layer covering the first dielectric layer;forming a first through hole, and the first through hole penetrating regions where an inner diameter of a first concentric circle from a center of the first concentric-circle pattern is orthogonally projected on the first stacking layer and the substrate;forming a second stacking layer on the first stacking layer, and the second stacking layer including a second dielectric layer and a second circuit layer covering the second dielectric layer; andforming a ...

MANUFACTURING PROCESS AND APPARATUS FOR PRINTING IMPRINT ON DEFECTIVE BOARD

A manufacturing process and an apparatus for printing imprint on defective board are provided. An automatic printing device is used for replacing operator, so as to reduce manpower and to increase the correctness and veracity of defect mark printing. The manufacturing process includes the following steps: first, an image sensor captures an image of a defect mark and transmits the image to a processing unit for data processing. Next, the data is compared, and an inkjet head is notified of the correct printing position to print ink on the customer identification mark of the printed circuit board.

MANUFACTURING METHOD FOR MULTI-LAYER CIRCUIT BOARD

A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, two core layers are compressed to form a substrate having two surfaces opposite to each other. Then, a via connecting the surfaces is formed. A patterned circuit layer including a concentric-circle pattern is then formed on each surface by using the via as an alignment target. Next, a first stacking layer is formed on each surface. Then, a first through hole penetrating regions of the first stacking layer and the substrate where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed. A second stacking layer is then formed on each first stacking layer. Afterward, a second through hole penetrating regions of the first, the second stacking layers and the substrate where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed.

CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

A circuit board and a manufacturing method thereof are provided. According to the method, a dielectric layer is formed on a dielectric substrate, and the dielectric layer contains active particles. A surface treatment is performed on a surface of the dielectric first conductive layer is formed on the activated surface of the dielectric layer. A conductive via is formed in the dielectric substrate and the dielectric layer. A patterned mask layer is formed on the first conductive layer, in which the patterned mask layer exposes the conductive via and a part of the first conductive layer. A second conductive layer is formed on the first conductive layer and conductive via exposed by the patterned mask layer. The patterned mask layer and the first conductive layer below the patterned mask layer are removed. 1. A manufacturing method of circuit board , comprising:providing a dielectric substrate;forming a dielectric layer on the dielectric substrate, wherein the dielectric layer contains a plurality of active particles therein;performing a surface treatment on a surface of the dielectric layer so as to activate the active particles at the surface of the dielectric layer;forming a first conductive layer on the activated surface of the dielectric layer;forming a conductive via in the dielectric substrate and the dielectric layer;forming a patterned mask layer on the first conductive layer, wherein the patterned mask layer exposes the conductive via and a part of the first conductive layer;forming a second conductive layer on the first conductive layer and conductive via exposed by the patterned mask layer; andremoving the patterned mask layer and the first conductive layer below the patterned mask layer.2. The manufacturing method of circuit board as claimed in claim 1 , wherein a material of the active particles comprises metal complexes.3. The manufacturing method of circuit board as claimed in claim 1 , wherein the surface treatment comprises plasma processing or ...

Multi-Layer Printed Circuit Board and Method for Fabricating the Same

A method for fabricating a double-sided or multi-layer printed circuit board (PCB) by ink-jet printing that includes providing a substrate, forming a first self-assembly membrane (SAM) on at least one side of the substrate, forming a non-adhesive membrane on the first SAM, forming at least one microhole in the substrate, forming a second SAM on a surface of the microhole, providing catalyst particles on the at least one side of the substrate and on the surface of the microhole, and forming a catalyst circuit pattern on the substrate.

Circuit structure and process thereof

A circuit structure has a first dielectric layer, a first circuit pattern embedded in the first dielectric layer and having a first via pad, a first conductive via passing through the first dielectric layer and connecting to the first via pad, and an independent via pad disposed on a surface of the first dielectric layer away from the first via pad and connecting to one end of the first conductive via. The circuit structure further has a second dielectric layer disposed over the surface of the first dielectric layer where the independent via pad is disposed, a second conductive via passing through the second dielectric layer and connecting to the independent via pad, and a second circuit pattern embedded in the second dielectric layer, located at a surface thereof away from the independent via pad, and having a second via pad connected to the second conductive via.

Circuit structure

A circuit structure including a circuit board, an insulating layer, a conductive via, a platable dielectric layer and a conductive pattern is provided. The insulating layer is disposed on the circuit board and covers a circuit layer of the circuit board. The conductive via passes through the insulating layer and connects the circuit layer and protrudes from a surface of the insulating layer. The platable dielectric layer having a trench pattern is disposed on the surface of the insulating layer wherein the portion of the conductive via protruding from the surface is located in the trench pattern. The material of the platable dielectric layer includes a chemical platable material. The conductive pattern is in the trench pattern and connects the conductive via wherein an interface exists between the conductive pattern and the conductive via and protrudes from the surface of the insulating layer.

MANUFACTURING METHOD OF OPTICAL COMPONENT

An optical component including a multi-layer substrate, an optical waveguide element, and two optical-electro assemblies is provided. The multi-layer substrate includes a dielectric layer, two circuit layers, and two through holes passing through the dielectric layer. The optical waveguide element is located on the multi-layer substrate and between the through holes. The optical-electro assemblies are respectively inserted into the corresponding through holes and correspondingly located at two opposite ends of the optical waveguide element. One of the optical-electro assemblies transforms an electrical signal into a light beam and provides the light beam to the optical waveguide element, and the other one of the optical-electro assemblies receives the light beam transmitted from the optical waveguide element and transforms the light beam into another electrical signal. A manufacturing method of the optical component and an optical-electro circuit board having the optical component are also provided. 1. A manufacturing method of an optical component , comprising:providing a multi-layer substrate comprising at least one dielectric layer, at least two circuit layers, and two through holes passing through the at least one dielectric layer, the at least two circuit layers being located on two opposite surfaces of the at least one dielectric layer;forming an optical waveguide element on a surface of the multi-layer substrate and between the through holes; andforming two optical-electro assemblies in the corresponding through holes, and the optical-electro assemblies being correspondingly located at two opposite ends of the optical waveguide element.2. The manufacturing method of the optical component according to claim 1 , wherein a method of forming the optical-electro assemblies in the corresponding through holes comprises:providing a substrate and forming a light guide hole on the substrate, the light guide hole passing through the substrate;cutting the substrate to ...

WIRING BOARD AND PROCESS FOR FABRICATING THE SAME

A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.

Multi-layer printed circuit board and method for fabricating the same

A method for fabricating a double-sided or multi-layer printed circuit board (PCB) by ink-jet printing that includes providing a substrate, forming a first self-assembly membrane (SAM) on at least one side of the substrate, forming a non-adhesive membrane on the first SAM, forming at least one microhole in the substrate, forming a second SAM on a surface of the microhole, providing catalyst particles on the at least one side of the substrate and on the surface of the microhole, and forming a catalyst circuit pattern on the substrate.

METHOD FOR FORMING CIRCUIT BOARD STRUCTURE OF COMPOSITE MATERIAL

A method for forming a circuit board structure of composite material is disclosed. First, a composite material structure including a substrate and a composite material dielectric layer is provided. The composite material dielectric layer includes a catalyst dielectric layer contacting the substrate and at least one sacrificial layer contacting the catalyst dielectric layer. The sacrificial layer is insoluble in water. Later, the composite material dielectric layer is patterned and simultaneously catalyst particles are activated. Then, a conductive layer is formed on the activated catalyst particles. Afterwards, at least one sacrificial layer is removed.

CIRCUIT SUBSTRATE AND MANUFACTURING METHOD THEREOF

A manufacturing method of a circuit substrate includes the following steps. A dielectric layer is formed on at least one surface of a substrate. An insulating layer is formed on the dielectric layer. A portion of the insulating layer and a portion of the dielectric layer are removed, so as to form at least one blind via in the dielectric layer and the insulating layer. An electroless plating layer is formed on the sidewall of the blind via and a remaining portion of the insulating layer, wherein the binding strength between the insulating layer and the electroless plating layer is greater than that between the dielectric layer and the electroless plating layer. A patterned conductive layer is plated to cover the electroless plating layer.

CIRCUIT BOARD

A circuit board including a circuit layer, a thermally conductive substrate, an insulation layer, and at least one thermally conductive material is provided. The thermally conductive substrate has a plane. The insulation layer is disposed between the circuit layer and the plane and partially covers the plane. The thermally conductive material covers the plane without covered by the insulation layer and is in contact with the thermally conductive substrate. The insulation layer exposes the thermally conductive material. 1. A circuit board , comprising:a circuit layer;a thermally conductive substrate, having a plane;an insulation layer, disposed between the circuit layer and the plane, wherein the insulation layer partially covers the plane; andat least one thermally conductive material, covering the plane without covered by the insulation layer, and in contact with the thermally conductive substrate, wherein the insulation layer exposes the thermally conductive material.2. The circuit board according to claim 1 , wherein the thermally conductive substrate comprises a thermally conductive layer and a main body layer claim 1 , and the thermally conductive layer is located between the main body layer and the insulation layer.3. The circuit board according to claim 2 , wherein the thermally conductive layer is a metal layer or a carbon-material layer.4. The circuit board according to claim 1 , wherein the thermally conductive substrate is a metal plate or a carbon-material plate.5. The circuit board according to claim 1 , wherein the thermally conductive material is a ceramic layer claim 1 , a thermal pad claim 1 , or a thermal glue layer.6. The circuit board according to claim 1 , further comprising at least one electronic component claim 1 , wherein the electronic component comprises:a component main body, having a bottom surface; anda plurality of pads, disposed on the bottom surface and electrically connected to the circuit layer, wherein at least one pad is ...

WIRING BOARD

A wiring board including two wiring layers and a flexible core layer is provided. The flexible core layer is disposed between the wiring layers, and the flexible core layer is an insulator. A flexure of the wiring board is between 0 degree and 170 degrees.

Process of fabricating circuit structure

A process for forming a circuit structure includes providing a first composite-layer structure at first. A second composite-layer structure is then provided. The first composite-layer structure, a second dielectric layer and the second composite-layer structure are pressed so that a second circuit pattern and an independent via pad are embedded in the second dielectric layer, and the second dielectric layer is connected to the first dielectric layer. A first carrier substrate and a second carrier substrate are removed to expose a first circuit pattern and the second circuit pattern. At least one first opening that passes through the second dielectric layer and exposes the independent via pad is formed, and the first opening is filled with a conductive material to form a second conductive via that connects the independent via pad and a second via pad.

Manufacturing method of circuit structure embedded with heat-dissipation block

A manufacturing method of circuit structure embedded with heat-dissipation block including the following steps is provided. A core board including a first dielectric layer and two first conductive layers located on two opposite sides of the first dielectric layer is provided. A through hole penetrated the core board is formed. A heat-dissipation block is disposed into the through hole. Two inner-layer circuits are formed on two opposite sides of the core board. At least one build-up structure is bonded on the core board, wherein the build-up structure includes a second dielectric layer and a second conductive layer, and the second dielectric layer is located between the second conductive layer and the core board. A cavity is formed on a predetermined region of the build-up structure, and the cavity is communicated with the corresponding inner-layer circuit. Another manufacturing method of circuit structure embedded with heat-dissipation block is also provided.

Embedded wiring board and method for manufacturing the same

A method for manufacturing an embedded wiring board is provided. An activating insulation layer is formed, in which the activating insulation layer includes a plurality of catalyst particles, and covers a first wiring layer. An intaglio pattern and at least one blind via partially exposing the first wiring layer are formed on the activating insulation layer, in which some of the catalyst particles are activated and exposed in the intaglio pattern and the blind via. The activating insulation layer is dipped in a first chemical plating solution, and a solid conductive pillar is formed in the blind via through electroless plating. The activating insulation layer is dipped in a second chemical plating solution after the solid conductive pillar is formed, and a second wiring layer is formed in the intaglio pattern through the electroless plating. Components of the first chemical plating solution and the second chemical plating solution are different.

Opto-electronic circuit board and method for assembling the same

An opto-electronic circuit board includes a substrate, a cavity, blind vias, metal layers, a first chip, a second chip, and the optical component. The substrate includes a first circuit layer, a second circuit layer, and a dielectric layer disposed between the first circuit layer and the second circuit layer. The cavity is disposed on the dielectric layer, in which the cavity extends from the first circuit layer to the second circuit layer. The blind vias are disposed at opposite sides of the cavity. The first chip is disposed on the second circuit layer with corresponding to one of the blind vias. The second chip is disposed on the second circuit layer with corresponding to the other one of the blind vias. The optical component is disposed in the cavity, in which the second surface of the optical component is connected to the first circuit layer.

CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

A circuit board including a first dielectric layer having a first surface and a second surface, a first circuit layer, a second dielectric layer, and a second circuit layer is provided. At least one trench is formed on the first surface, and the first circuit layer is formed on an inside wall of the trench. In addition, the second dielectric layer is disposed in the trench, and covers the first circuit layer. The second circuit layer is disposed in the trench, and the second dielectric layer is located between the first circuit layer and the second circuit layer. A manufacturing method of the circuit board is further provided.

CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

A circuit board and a manufacturing method thereof are provided. A dielectric layer is formed on a substrate, wherein an internal circuit layer is formed on the substrate and the dielectric layer covers the internal circuit layer. A first trench, a second trench and an opening are formed in the dielectric layer. The opening is located below the first trench and connected with the first trench, and a portion of the internal circuit layer is exposed by the opening. A patterned conductive layer is formed on the dielectric layer. The patterned conductive layer covers a portion of the dielectric layer and fills the first trench, the second trench and the opening so as to form a first circuit layer, a second circuit layer and a conductive through via, respectively, wherein the conductive through via is electrically connected with the first circuit layer and the internal circuit layer. 1. A manufacturing method of a circuit board comprising:forming a dielectric layer on a substrate, wherein the substrate has an internal circuit layer formed thereon, and the dielectric layer covers the internal circuit layer;forming a first trench, a second trench, and an opening in the dielectric layer, wherein the opening is located below the first trench and is connected with the first trench, and the opening exposes a portion of the internal circuit layer;forming a patterned conductive layer on the dielectric layer, the patterned conductive layer covering a portion of the dielectric layer and filling the first trench, the second trench and the opening, so as to form a first circuit layer, a second circuit layer and a conductive through via, wherein the conductive through via is electrically connected with the first circuit layer and the internal circuit layer.2. The manufacturing method of a circuit board according to claim 1 , wherein the first circuit layer comprises a first embedded circuit layer and a first surface circuit layer claim 1 , the first embedded circuit layer being ...

CIRCUIT STRUCTURE

A circuit structure including a circuit board, an insulating layer, a conductive via, a platable dielectric layer and a conductive pattern is provided. The insulating layer is disposed on the circuit board and covers a circuit layer of the circuit board. The conductive via passes through the insulating layer and connects the circuit layer and protrudes from a surface of the insulating layer. The platable dielectric layer having a trench pattern is disposed on the surface of the insulating layer wherein the portion of the conductive via protruding from the surface is located in the trench pattern. The material of the platable dielectric layer includes a chemical platable material. The conductive pattern is in the trench pattern and connects the conductive via wherein an interface exists between the conductive pattern and the conductive via and protrudes from the surface of the insulating layer.

Wiring board and process for fabricating the same

A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.

MANUFACTURING METHOD OF CIRCUIT STRUCTURE EMBEDDED WITH HEAT-DISSIPATION BLOCK

A manufacturing method of circuit structure embedded with heat-dissipation block including the following steps is provided. A core board including a first dielectric layer and two first conductive layers located on two opposite sides of the first dielectric layer is provided. A through hole penetrated the core board is formed. A heat-dissipation block is disposed into the through hole. Two inner-layer circuits are formed on two opposite sides of the core board. At least one build-up structure is bonded on the core board, wherein the build-up structure includes a second dielectric layer and a second conductive layer, and the second dielectric layer is located between the second conductive layer and the core board. A cavity is formed on a predetermined region of the build-up structure, and the cavity is communicated with the corresponding inner-layer circuit. Another manufacturing method of circuit structure embedded with heat-dissipation block is also provided. 1. A manufacturing method of circuit structure embedded with heat-dissipation block , comprising:providing a core board, wherein the core board comprises a first dielectric layer and two first conductive layers, and the two first conductive layers are located on two opposite sides of the first dielectric layer, respectively;forming a through hole penetrated the core board;disposing a heat-dissipation block into the through hole;forming two inner-layer circuits on two opposite sides of the core board;bonding at least one build-up structure on the core board, wherein the build-up structure comprises a second dielectric layer and a second conductive layer, and the second dielectric layer is located between the second conductive layer and the core board; andforming a cavity on a predetermined region of the build-up structure, wherein the cavity is communicated with the corresponding inner-layer circuit and corresponding to the heat-dissipation block.2. The manufacturing method of circuit structure embedded with ...

Capacitor and manufacturing method thereof

A capacitor and a manufacturing method thereof are provided. The capacitor includes a porous substrate, an electrolyte composition, and a pair of electrodes. The porous substrate has a plurality of holes. The electrolyte composition is located in the holes of the porous substrate, and the electrolyte composition includes an electrolyte solution and a nano carbon material dispersed in the electrolyte solution. The electrodes are respectively located on two opposite surfaces of the porous substrate.

Method of fabricating substrate

A method of fabricating a substrate includes following steps. First, a metallic panel having a first surface and a second surface is provided. A first half-etching process is carried out to etch the first surface of the metallic panel to a first depth so that a first patterned metallic layer is formed on the first surface. Next, a first insulating material is deposited into gaps in the first patterned metallic layer to form a first insulator. Thereafter, a second half-etching process is carried out to etch the second surface of the metallic panel to a second depth and expose at least a portion of the first insulator so that a second patterned metallic layer is formed on the second surface. The first depth and the second depth together equal the thickness of the metallic panel.

Manufacturing method of circuit structure

A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.

Manufacturing method of circuit structure

A manufacturing method of circuit structure is described as follows. Firstly, a composite dielectric layer, a circuit board and an insulating layer disposed therebetween are provided. The composite dielectric layer includes a non-platable dielectric layer and a platable dielectric layer between the non-platable dielectric layer and the insulating layer wherein the non-platable dielectric layer includes a chemical non-platable material and the platable dielectric layer includes a chemical platable material. Then, the composite dielectric layer, the circuit board and the insulating layer are compressed. Subsequently, a through hole passing through the composite dielectric layer and the insulating layer is formed and a conductive via connecting a circuit layer of the circuit board is formed therein. Then, a trench pattern passing through the non-platable dielectric layer is formed on the composite dielectric layer. Subsequently, a chemical plating process is performed to form a conductive pattern in the trench pattern.

Circuit structure of circuit board

A circuit structure of a circuit board includes a dielectric layer, a number of first circuits, and a number of second circuits. The dielectric layer has a surface and an intaglio pattern. The first circuits are disposed on the surface of the dielectric layer. The second circuits are disposed in the intaglio pattern of the dielectric layer. Line widths of the second circuits are smaller than line widths of the first circuits, and a distance between every two of the adjacent second circuits is shorter than a distance between every two of the adjacent first circuits.

Method of forming solder mask and wiring board with solder mask

A method of forming solder mask, suitable for forming a solder mask on the surface of a wiring board, is provided. The surface of the wiring board includes a first region and a second region, and the surface of the wiring board has a wiring pattern thereon. The method includes forming a first sub solder mask in the first region on the surface of the wiring board by performing a screen-printing or a photolithographic process, and forming a second sub solder mask in the second region on the surface of the wiring board by performing an ink-jet printing process. The method not only improves the precision of the solder mask alignment on the wiring board and its reliability, but also increases the production rate and lowers the manufacturing cost.

SELECTIVE METAL SURFACE TREATMENT PROCESS AND APPARATUS FOR CIRCUIT BOARD AND RESIST USED IN THE PROCESS

A selective metal surface treatment process of a circuit board, which has a solder mask and a multiple of selective metal treatment surface areas, wherein the solder mask covers the surface of the circuit board but exposes the selective metal surface treatment areas, is provided. The selective metal surface treatment process includes using a printhead to selectively print a resist on a selective metal surface treatment area, performing a surface treatment of the other selective metal surface treatment areas, and removing the resist. A selective metal surface treatment apparatus used for performing the selective metal surface treatment process of the circuit board is also provided. Through the present invention, unnecessary waste of the materials in the process is reduced and the processing time is shortened.

Method for forming embedded circuit

A method for forming an embedded circuit is disclosed. First, a substrate including a dielectric layer is provided. Second, the dielectric layer is entirely covered by a dummy layer. Then, the dummy layer is patterned and a trench is formed in the dielectric layer at the same time. Later, a seed layer is formed to entirely cover the dummy layer and the trench. Next, the dummy layer is removed and the seed layer covering the dummy layer is removed, too. Afterwards, a metal layer is filled in the trench to form an embedded circuit embedded in the dielectric layer.

Circuit structure and manufacturing method thereof

A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.

MANUFACTURING METHOD FOR CAPACITOR

A manufacturing method for a capacitor is provided. The method includes the following steps. A nano carbon material and an electrolyte solution are mixed to obtain an electrolyte composition. A porous substrate is immersed in the electrolyte composition. The electrodes are formed on two opposite surfaces of the porous substrate. 1. A manufacturing method of a capacitor , comprising:mixing a nano carbon material and an electrolyte solution to obtain an electrolyte composition;immersing a porous substrate in the electrolyte composition; andforming electrodes on two opposite surfaces of the porous substrate.2. The method of claim 1 , wherein a material of the porous substrate comprises melamine claim 1 , polystyrene claim 1 , polyurethane claim 1 , polyethylene claim 1 , ethylene-vinyl acetate copolymer claim 1 , thermoplastic rubber claim 1 , or polyvinyl chloride.3. The method of claim 1 , wherein based on a total weight of the electrolyte composition claim 1 , a content of the nano carbon material is between 1% and 10%.4. The method of claim 1 , wherein the nano carbon material comprises expanded graphite or carbon aerogel.5. The method of claim 4 , wherein the carbon aerogel comprises a particle having a particle size between 3 nm and 20 nm.6. The method of claim 4 , wherein a porosity of the carbon aerogel exceeds 50%.7. The method of claim 4 , wherein a specific surface area of the carbon aerogel is between 400 m/g and 1000 m/g.8. The method of claim 1 , further comprising claim 1 , after the porous substrate is immersed in the electrolyte composition claim 1 , performing a drying process on the porous substrate immersed in the electrolyte composition.9. The method of claim 1 , further comprising claim 1 , before the porous substrate is immersed in the electrolyte composition claim 1 , performing a cleaning process on the porous substrate. This application is a divisional application of and claims the priority benefit of U.S. application Ser. No. 14/705,950, ...

PROCESS OF FABRICATING CIRCUIT STRUCTURE

A process for forming a circuit structure includes providing a first composite-layer structure at first. A second composite-layer structure is then provided. The first composite-layer structure, a second dielectric layer and the second composite-layer structure are pressed so that a second circuit pattern and an independent via pad are embedded in the second dielectric layer, and the second dielectric layer is connected to the first dielectric layer. A first carrier substrate and a second carrier substrate are removed to expose a first circuit pattern and the second circuit pattern. At least one first opening that passes through the second dielectric layer and exposes the independent via pad is formed, and the first opening is filled with a conductive material to form a second conductive via that connects the independent via pad and a second via pad.

MULTI-LAYERED PRINTED CIRCUIT BOARD AND METHOD FOR FABRICATING THE SAME

A method for fabricating a double-sided or multi-layer printed circuit board (PCB) by ink jet printing that includes providing a substrate, forming a first self-assembly membrane (SAM) on at least one side of the substrate, forming a non-adhesive membrane on the first SAM, forming at least one microhole in the substrate, forming a second SAM on a surface of the microhole, providing catalyst particles on the at least one side of the substrate and on the surface of the microhole, and forming a catalyst circuit pattern on the substrate.

CIRCUIT STRUCTURE AND PROCESS THEREOF

A circuit structure has a first dielectric layer, a first circuit pattern embedded in the first dielectric layer and having a first via pad, a first conductive via passing through the first dielectric layer and connecting to the first via pad, and an independent via pad disposed on a surface of the first dielectric layer away from the first via pad and connecting to one end of the first conductive via. The circuit structure further has a second dielectric layer disposed over the surface of the first dielectric layer where the independent via pad is disposed, a second conductive via passing through the second dielectric layer and connecting to the independent via pad, and a second circuit pattern embedded in the second dielectric layer, located at a surface thereof away from the independent via pad, and having a second via pad connected to the second conductive via.

CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

A circuit board includes a metal pattern layer, a thermally conductive plate, an electrically insulating layer, and at least one electrically insulating material. The thermally conductive plate has a plane. The electrically insulating layer is disposed between the metal pattern layer and the plane and partially covers the plane. The electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate. The electrically insulating layer exposes the electrically insulating material, and a thermal conductivity of the electrically insulating material is larger than a thermal conductivity of the electrically insulating layer.

Method of manufacturing an embedded wiring board

A method for manufacturing an embedded wiring board is provided. An activating insulation layer is formed. The activating insulation layer includes a plurality of catalyst particles, and covers a first wiring layer. An intaglio pattern and at least one blind via partially exposing the first wiring layer are formed on the activating insulation layer, in which some of the catalyst particles are activated and exposed in the intaglio pattern and the blind via. The activating insulation layer is dipped in a first chemical plating solution, and a solid conductive pillar is formed in the blind via through electroless plating. The activating insulation layer is dipped in a second chemical plating solution after the solid conductive pillar is formed, and a second wiring layer is formed in the intaglio pattern through the electroless plating. Components of the first chemical plating solution and the second chemical plating solution are different.

OPTICAL-ELECTRO CIRCUIT BOARD, OPTICAL COMPONENT AND MANUFACTURING METHOD THEREOF

An optical component including a multi-layer substrate, an optical waveguide element, and two optical-electro assemblies is provided. The multi-layer substrate includes a dielectric layer, two circuit layers, and two through holes passing through the dielectric layer. The optical waveguide element is located on the multi-layer substrate and between the through holes. The optical-electro assemblies are respectively inserted into the corresponding through holes and correspondingly located at two opposite ends of the optical waveguide element. One of the optical-electro assemblies transforms an electrical signal into a light beam and provides the light beam to the optical waveguide element, and the other one of the optical-electro assemblies receives the light beam transmitted from the optical waveguide element and transforms the light beam into another electrical signal. A manufacturing method of the optical component and an optical-electro circuit board having the optical component are also provided. 1. A manufacturing method of an optical component , comprising:providing a multi-layer substrate comprising at least one dielectric layer, at least two circuit layers, and two through holes passing through the at least one dielectric layer, the at least two circuit layers being located on two opposite surfaces of the at least one dielectric layer;forming an optical waveguide element on a surface of the multi-layer substrate and between the through holes; andforming two optical-electro assemblies in the corresponding through holes, and the optical-electro assemblies being correspondingly located at two opposite ends of the optical waveguide element.2. The manufacturing method of the optical component according to claim 1 , wherein a method of forming the optical-electro assemblies in the corresponding through holes comprises:providing a substrate and forming a light guide hole on the substrate, the light guide hole passing through the substrate;cutting the substrate to ...

Manufacturing method of circuit board

A circuit board and a manufacturing method thereof are provided. According to the method, a dielectric layer is formed on a dielectric substrate, and the dielectric layer contains active particles. A surface treatment is performed on a surface of the dielectric first conductive layer is formed on the activated surface of the dielectric layer. A conductive via is formed in the dielectric substrate and the dielectric layer. A patterned mask layer is formed on the first conductive layer, in which the patterned mask layer exposes the conductive via and a part of the first conductive layer. A second conductive layer is formed on the first conductive layer and conductive via exposed by the patterned mask layer. The patterned mask layer and the first conductive layer below the patterned mask layer are removed.

OPTICAL-ELECTRO CIRCUIT BOARD

An optical component including a multi-layer substrate, an optical waveguide element, and two optical-electro assemblies is provided. The multi-layer substrate includes a dielectric layer, two circuit layers, and two through holes passing through the dielectric layer. The optical waveguide element is located on the multi-layer substrate and between the through holes. The optical-electro assemblies are respectively inserted into the corresponding through holes and correspondingly located at two opposite ends of the optical waveguide element. One of the optical-electro assemblies transforms an electrical signal into a light beam and provides the light beam to the optical waveguide element, and the other one of the optical-electro assemblies receives the light beam transmitted from the optical waveguide element and transforms the light beam into another electrical signal. A manufacturing method of the optical component and an optical-electro circuit board having the optical component are also provided. 1. An optical-electro circuit board comprising:a multi-layer circuit board comprising a plurality of circuit layers and a plurality of dielectric layers between the circuit layers and having a groove extending from a surface of the multi-layer circuit board into the circuit layers; a multi-layer substrate comprising at least one dielectric layer, at least two circuit layers, and two through holes passing through the at least one dielectric layer, the at least two circuit layers being located on two opposite surfaces of the at least one dielectric layer;', 'an optical waveguide element located on a surface of the multi-layer substrate and between the through holes, the optical waveguide element facing a bottom of the groove; and', 'two optical-electro assemblies respectively inserted into the corresponding through holes and correspondingly located at two opposite ends of the optical waveguide element, wherein one of the optical-electro assemblies transforms an electrical ...

CIRCUIT STRUCTURE OF CIRCUIT BOARD AND PROCESS FOR MANUFACTURING THE SAME

A circuit structure of a circuit board includes a dielectric layer, a number of first circuits, and a number of second circuits. The dielectric layer has a surface and an intaglio pattern. The first circuits are disposed on the surface of the dielectric layer. The second circuits are disposed in the intaglio pattern of the dielectric layer. Line widths of the second circuits are smaller than line widths of the first circuits, and a distance between every two of the adjacent second circuits is shorter than a distance between every two of the adjacent first circuits.

Circuit board and manufacturing method thereof

A circuit board includes a metal pattern layer, a thermally conductive plate, an electrically insulating layer, and at least one electrically insulating material. The thermally conductive plate has a plane. The electrically insulating layer is disposed between the metal pattern layer and the plane and partially covers the plane. The electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate. The electrically insulating layer exposes the electrically insulating material, and a thermal conductivity of the electrically insulating material is larger than a thermal conductivity of the electrically insulating layer.

Manufacturing method for multi-layer circuit board

A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, two core layers are compressed to form a substrate having two surfaces opposite to each other. Then, a via connecting the surfaces is formed. A patterned circuit layer including a concentric-circle pattern is then formed on each surface by using the via as an alignment target. Next, a first stacking layer is formed on each surface. Then, a first through hole penetrating regions of the first stacking layer and the substrate where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed. A second stacking layer is then formed on each first stacking layer. Afterward, a second through hole penetrating regions of the first, the second stacking layers and the substrate where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed.

Circuit board and manufacturing method thereof

A circuit board including a first dielectric layer having a first surface and a second surface, a first circuit layer, a second dielectric layer, and a second circuit layer is provided. At least one trench is formed on the first surface, and the first circuit layer is formed on an inside wall of the trench. In addition, the second dielectric layer is disposed in the trench, and covers the first circuit layer. The second circuit layer is disposed in the trench, and the second dielectric layer is located between the first circuit layer and the second circuit layer. A manufacturing method of the circuit board is further provided.

Method of manufacturing embedded wiring board

A manufacturing method of an embedded wiring board is provided. The method includes the following steps. First, an insulation layer and a lower wiring layer are provided, wherein the insulation layer includes a polymeric material. Then, the plural catalyst grains are distributed in the polymeric material. A groove and an engraved pattern are formed on the upper surface. A blind via is formed on a bottom surface of the groove to expose the lower pad. An upper wiring layer is formed in the engraved pattern. Some catalyst grains are exposed and activated in the groove, the engraved pattern and the blind via. A first conductive pillar is formed in the groove. Finally, a second conductive pillar is formed in the blind via.

Manufacturing method for multi-layer circuit board

A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having two surfaces opposite to each other and a via connecting there between is provided. Next, a patterned circuit layer is formed on each of the surfaces by using the via as an alignment target. Each patterned circuit layer includes a concentric-circle pattern. Next, a first stacking layer is formed on each of the surfaces. Then, a first through hole penetrating regions of the first stacking layer and the substrate where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed. Next, a second stacking layer is formed on each first stacking layer. Afterward, a second through hole penetrating regions of the first, the second stacking layers and the substrate where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected thereon is formed.

METHOD OF FORMING SOLDER MASK AND WIRING BOARD WITH SOLDER MASK

A method of forming solder mask, suitable for forming a solder mask on the surface of a wiring board, is provided. The surface of the wiring board includes a first region and a second region, and the surface of the wiring board has a wiring pattern thereon. The method includes forming a first sub solder mask in the first region on the surface of the wiring board by performing a screen-printing or a photolithographic process, and forming a second sub solder mask in the second region on the surface of the wiring board by performing an ink-jet printing process. The method not only improves the precision of the solder mask alignment on the wiring board and its reliability, but also increases the production rate and lowers the manufacturing cost.

Optical-electro circuit board, optical component and manufacturing method thereof

An optical component including a multi-layer substrate, an optical waveguide element, and two optical-electro assemblies is provided. The multi-layer substrate includes a dielectric layer, two circuit layers, and two through holes passing through the dielectric layer. The optical waveguide element is located on the multi-layer substrate and between the through holes. The optical-electro assemblies are respectively inserted into the corresponding through holes and correspondingly located at two opposite ends of the optical waveguide element. One of the optical-electro assemblies transforms an electrical signal into a light beam and provides the light beam to the optical waveguide element, and the other one of the optical-electro assemblies receives the light beam transmitted from the optical waveguide element and transforms the light beam into another electrical signal. A manufacturing method of the optical component and an optical-electro circuit board having the optical component are also provided.

CIRCUIT BOARD AND FABRICATION METHOD THEREOF

A method for fabricating a circuit board is provided. A non-conductive material layer is provided on a core substrate, wherein the non-conductive material layer comprises a dielectric material and catalytic particles. A recessed circuit structure is then formed in the non-conductive material layer with a laser beam. Simultaneously, the catalytic particles in the recessed circuit structure are activated with aid of the laser. A buried conductive structure is then formed in the recessed circuit structure by chemical copper deposition methods. 1. A method for fabricating a circuit board , comprising:providing a substrate;forming a non-conductive material layer on the substrate, wherein the non-conductive material layer comprise a dielectric material and catalytic particles;projecting a laser beam onto the non-conductive material layer to etch at least one recessed circuit structure, and the laser beam simultaneously activating the catalytic particles in the recessed circuit structure; andforming a damascened conductive structure in the recessed circuit structure, wherein the damascened conductive structure comprises at least one fin-shaped protrusion.2. The method for fabricating a circuit board according to claim 1 , wherein the catalytic particles comprise nano-particles of metal or metal coordination compound.3. The method for fabricating a circuit board according to claim 1 , wherein the laser beam has a laser spot size ranging between 30-80 μm.4. The method for fabricating a circuit board according to claim 1 , wherein the laser beam has a laser spot pitch ranging between 15-80 μm.5. A method for fabricating a circuit board claim 1 , comprising:providing a substrate;forming a non-conductive material layer on the substrate, wherein the non-conductive material layer comprise a dielectric material and catalytic particles;projecting a laser beam onto the non-conductive material layer to etch a recessed reticular pattern into the non-conductive material layer, and the ...

MANUFACTURING METHOD OF MULTILAYER FLEXIBLE CIRCUIT STRUCTURE

A manufacturing method of multilayer flexible circuit structure including the following steps is provided. Two first flexible substrates are correspondingly bonded on two sides of a release film, and two conductive materials are correspondingly formed on the two first flexible substrates. The two conductive materials are patterned to form two first inner-layer circuits. Two outer build-up structures are bonded on the two corresponding first flexible substrates. The release film is removed, so as to separate the two first flexible substrates. An outer-layer circuit is formed on each of the first flexible substrates and the corresponding outer build-up structure, wherein the outer-layer circuit is connected to the corresponding first inner-layer circuit, and each of the first flexible substrates, the corresponding first inner-layer circuit, the outer build-up structure and the outer-layer circuit correspondingly form a multilayer flexible circuit structure. Another manufacturing method of multilayer flexible circuit structure is also provided.

Circuit board and method for manufacturing the same

A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface.

PREPARATION METHOD OF CONDUCTIVE SPONGE HAVING EFFECT OF SHIELDING ELECTROMAGNETIC WAVE

A preparation method of a conductive sponge includes the following steps. First, a sponge substrate is dipped in a metal solution and then taken out. A first drying process is performed. Next, the sponge substrate plated with metal particles is dipped in a carbon nanomaterial suspension and then taken out. Then, a second drying process is performed. 1. A preparation method of a conductive sponge , comprising:dipping a sponge substrate in a metal solution and then taking out the sponge substrate;performing a first drying process on the sponge substrate dipped in the metal solution;dipping the sponge substrate in a carbon nanomaterial suspension after the first drying process and then taking out the sponge substrate; andperforming a second drying process on the sponge substrate dipped in the carbon nanomaterial suspension.2. The preparation method of a conductive sponge of claim 1 , wherein a material of the sponge substrate comprises melamine or polyurethane.3. The preparation method of a conductive sponge of claim 1 , wherein the metal solution comprises a silver ion solution claim 1 , a nickel ion solution claim 1 , an iron ion solution claim 1 , or a cobalt ion solution.4. The preparation method of a conductive sponge of claim 1 , wherein the metal solution comprises a silver nitrate solution claim 1 , a nickel nitrate solution claim 1 , or a copper nitrate solution.5. The preparation method of a conductive sponge of claim 1 , wherein a solute of the carbon nanomaterial suspension comprises carbon black claim 1 , carbon nanotube claim 1 , graphene claim 1 , or carbon aerogel.6. The preparation method of a conductive sponge of claim 1 , further comprising claim 1 , before the sponge substrate is dipped in the metal solution claim 1 , performing a sensitizing treatment.7. The preparation method of a conductive sponge of claim 6 , further comprising claim 6 , after the sensitizing treatment is performed and before the sponge substrate is dipped in the metal solution ...

Method of fabricating circuit board structure

A method of fabrication a circuit board structure comprising providing a circuit board main body, forming a molded, irregular plastic body having a non-plate type, stereo structure and at least one scraggy surface by encapsulating at least a portion of said circuit board main body with injection molded material, and forming a first three-dimensional circuit pattern on said molded, irregular plastic body thereby defining a three-dimensional circuit device.

CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF

A circuit structure includes an inner circuit layer, a first and a second dielectric layers, a first and a second conductive material layers, and a second and a third conductive layers. The first dielectric layer covers a first conductive layer of the inner circuit layer and has a first surface and first circuit grooves. The first conductive material layer is disposed inside the first circuit grooves. The second conductive layer is disposed on the first surface and includes a signal trace and at least two reference traces. The second dielectric layer covers the first surface and the second conductive layer and has a second surface and second circuit grooves. Widths of the first and the second circuit grooves are smaller than that of the reference traces. The second conductive material layer is disposed inside the second circuit grooves. The third conductive layer is disposed on the second surface. 1. A circuit structure , comprising:an inner circuit layer, having an upper surface and a first conductive layer disposed on the upper surface;a first dielectric layer, disposed on the inner circuit layer and covering the upper surface and the first conductive layer, wherein the first dielectric layer includes a first surface and a plurality of first circuit grooves extending from the first surface to the first conductive layer, an extension direction of the first circuit grooves is perpendicular to an extension direction of the first conductive layer;a first conductive material layer, disposed in the first circuit grooves;a second conductive layer, disposed on the first surface of the first dielectric layer, and including a signal trace and at least two reference traces, wherein the signal trace is located between the reference traces, and the signal trace is not connected to the reference traces, the reference traces are electrically connected to the first conductive layer through the first conductive material layer, and a width of each of the reference traces is greater ...

MANUFACTURING METHOD OF CIRCUIT BOARD

A manufacturing method of a circuit board is provided. In the manufacturing method, an electrically insulating layer and at least one electrically insulating material are formed on a plane of a thermally conductive plate, and a metal pattern layer located on the electrically insulating layer is formed. The electrically insulating layer partially covers the plane, and the electrically insulating material covers the plane where is not covered by the electrically insulating layer. The electrically insulating material touches the thermally conductive plate. A thermal conductivity of the electrically insulating material is larger than that of the electrically insulating layer. 1. A manufacturing method of a circuit board , comprising:forming an electrically insulating layer and at least one electrically insulating material on a plane of a thermally conductive plate, wherein the electrically insulating layer partially covers the plane, the electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate, and a thermal conductivity of the electrically insulating material is larger than that of the electrically insulating layer; andforming a metal pattern layer located on the electrically insulating layer.2. The manufacturing method of a circuit board according to claim 1 , wherein the electrically insulating layer and the electrically insulating material are formed by laminating or printing.3. The manufacturing method of a circuit board according to claim 1 , wherein the method of forming the electrically insulating layer and the electrically insulating material comprises:laminating a prepreg with at least one opening in the plane; andlaminating a thermal pad on the plane, wherein the thermal pad is located in the opening.4. The manufacturing method of a circuit board according to claim 1 , wherein the method of forming the electrically insulating layer and the electrically insulating ...

HOUSING HAVING ACTIVATED STRUCTURE

A housing having activated structure by remotely activates an embedded switch. The case includes a front panel having an inner and outer surface, an operation button, a first elastic member, a latch member having a lead-in portion at one end and an activating portion at the other end, and a lever. The operation button is arranged on the outer face and contacts the lead-in portion. The lever pivotally connects the front panel and selectively contacts the latch member and the switch. When the operation button is pressed, the first elastic member is compressed and the lead-in portion shifts accordingly. The activating portion further applies a force to the lever which then tilts toward the switch, allowing activation. When the first elastic member decompresses, a force applies to the latch member and the latch member returns to the original position. 1. A housing having activated structure , comprising:a front panel having an outer surface and an inner surface;a latch member movably disposed on the inner surface, the latch member ending with a lead-in portion at one end and a activating portion at the other end;a first elastic member for exerting against the shifted latch member to an original position;{'b': 18', '121', '141, 'an operation button arranged on the outer surface and corresponding to the lead-in portion to lead the latch member shifting when pressed; and'}a lever coupling with the activating portion and a switch at one end and pivotally connecting the front panel at the other end;wherein when the operation button is pressed, the latch member shifts accordingly and the activating portion abuts the lever which then activates the switch.2. The housing having activated structure according to claim 1 , further comprising a second elastic member recovering the operation button after pressed.3. The housing having activated structure according to claim 2 , wherein the operation button has an assembly post extended from a back thereof claim 2 , and the second ...

System and Method for Operating System Initiated Firmware Update via UEFI Applications

An information handling system includes a memory and a central processor. The memory stores a firmware update for a component of the information handling system. The central processor is operable in a pre-boot mode and in an operating system runtime mode. The central processor, while in the operating system runtime, updates a location of the firmware update in the memory via a unified extensible firmware interface (UEFI) runtime service, and triggers a firmware update for the component, via the UEFI runtime service, by a boot option number being set to a BootNext EFI variable.

CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME

A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface. 1. A method for a circuit board with a heat-recovery function , comprising:forming a first opening in a first buildup-dielectric layer and disposing a heat-storing device into the first opening for embedding the heat-storing device in the first buildup-dielectric layer;disposing a first pattern-metal layer on the first buildup-dielectric layer and the heat-storing device;disposing a second buildup-dielectric layer on the first buildup-dielectric layer and the first pattern-metal layer, wherein the second buildup-dielectric layer comprises a second opening communicating to the first opening;disposing an interposer board on the heat-storing device and in the second opening, and disposing a second pattern-metal layer on the second buildup-dielectric layer and the interposer board; andforming a third opening at the first buildup-dielectric layer or the second buildup-dielectric layer, and disposing a thermoelectric device into the third opening for embedding the thermoelectric device in the first buildup-dielectric layer or the second buildup-dielectric layer, wherein the thermoelectric device is connected to the heat-storing device through the first pattern-metal layer.2. A method for a circuit board with a heat- ...

Method and Apparatus for UEFI Firmware Boot Journal Recording

An information handling system includes a flash memory and a processor. The processor executes boot instructions including a boot log agent configured to collect initialization phase messages. The flash memory device also includes a circular buffer configured to store the collected initialization phase messages.

Circuit board and method for manufacturing the same

A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface.

Safety system and method for preventing living body from being locked in vehicle

A safety system for preventing a living body from being locked in a vehicle comprises a warning unit, a detection device and a limiting device. The detection device is disposed in a passenger's protection device which has to be used by a passenger when the vehicle is being driven. The detection device detects whether the passenger's protection device is in use or not to generate a corresponding detection signal. The warning unit turns on or turns off a warning device according to the detection signal and generates a corresponding control signal. The limiting device locks the vehicle key in the key slot or to release the vehicle key from the key slot according to the control signal after the vehicle has been parked.

CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF

A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer. 1. A manufacturing method of a circuit board structure , comprising:providing an inner circuit structure, the inner circuit structure comprising a core layer having an upper surface and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface;forming an insulating material layer on a portion of the first patterned circuit layer, wherein the insulating material layer covers a portion of the upper surface;forming a laser resisting layer on at least a portion of the insulating material layer;adhering a release layer to the laser resisting layer;performing a build-up process so as to laminate a first build-up circuit structure and a second build-up circuit structure on the first patterned circuit layer and the second patterned circuit layer, respectively, wherein the first build-up circuit structure covers the release layer, andperforming a laser ablation process on the first build-up circuit structure to irradiate a laser beam on the laser resisting layer so as to remove a portion of the first build- ...

PACKAGING STRUCTURE AND PACKAGING METHOD OF ELECTRONIC PRODUCT

A packaging structure and a packaging method of an electronic product are disclosed. The packaging structure of an electronic product includes a supporting structure, a flexible board and a covering layer. The supporting structure has a shape. The flexible board is stacked on the supporting structure, and has an electronic device disposed thereon. The covering layer is attached on the stacked supporting structure and flexible board and covering the electronic device. The shapes of the flexible board and the covering layer conform to the shape of the supporting structure, and the flexible board and the electronic device are tightly interposed between the covering layer and the supporting structure. The covering layer includes a thermoforming film and at least a function film stacked on the thermoforming film. 1. A packaging structure of an electronic product , comprising:a supporting structure having a shape;a flexible board stacked on the supporting structure, wherein an electronic device is disposed on the flexible board; anda covering layer attached on the stacked supporting structure and flexible board and covering the electronic device,wherein shapes of the flexible board and the covering layer conforms to the shape of the supporting structure, the flexible board and the electronic device are tightly interposed between the covering layer and the supporting structure, and the covering layer comprises a thermoforming film and at least a function film stacked on the thermoforming film, wherein the function film is at least one of a decorative layer, a thermo-conducting layer, a shielding layer and a light diffusion layer.2. The packaging structure of an electronic product according to claim 1 , wherein the flexible board comprises an insulation substrate and an electronic circuit.3. The packaging structure of an electronic product according to claim 2 , wherein the function film is disposed between the thermoforming film and the flexible board.4. The packaging ...

ELECTRONIC PRODUCT AND MANUFACTURING METHOD THEREOF

An electronic product including a supporting structure, a first thermo-formable film, a conductive circuit and a protection layer is provided. The conductive circuit is formed on the first thermo-formable film, and an electronic component is mounted on the conductive circuit. The protection layer covers the electronic component, and includes a second thermo-formable film. The conductive circuit and the electronic component are enclosed between the first thermo-formable film and the second thermo-formable film, and the supporting structure, the first thermo-formable film and the protection layer are bonded and stacked to each other. 1. A manufacturing method of an electronic product , comprising:forming a conductive circuit on a first thermo-formable film;mounting an electronic component on the conductive circuit;forming a protection layer on the first thermo-formable film and covering the electronic component, wherein the protection layer comprises a second thermo-formable film, and the conductive circuit and the electronic component are enclosed between the first thermo-formable film and the second thermo-formable film; andforming a supporting structure, wherein the supporting structure, the first thermo-formable film and the protection layer are bonded and stacked to each other.2. The manufacturing method of an electronic product according to claim 1 , wherein at least one of the first thermo-formable film and the second thermo-formable film comprises at least a function film formed by at least one of a decorative layer claim 1 , a heat conducting layer claim 1 , a shielding layer claim 1 , and a function film compatible with a polymer film.3. The manufacturing method of an electronic product according to claim 1 , wherein the first thermo-formable film is a polymer film claim 1 , and the step of forming the conductive circuit comprises:forming a patterned ink layer having a circuit pattern on the polymer film;placing a conductive metal layer on the patterned ink ...

SYRINGE AND NEEDLE ASSEMBLY

A syringe and needle assembly includes an elongated hollow barrel, a needle unit, and a plunger assembly. The hollow barrel has a connecting portion. The needle unit is disposed at the connecting portion and has an engaging structure, and the engaging structure is located in the hollow barrel. A plunger rod of the plunger assembly is movably disposed in the hollow barrel and has a pushing portion and an operating portion formed in front and rear ends of the plunger rod respectively, and the pushing portion faces the connecting portion and has a plurality of elastic hooks. The plunger assembly is adapted to move towards the connecting portion to push a liquid in the hollow barrel to be injected through a needle of the needle unit, and the plunger assembly is adapted to keep moving towards the connecting portion, such that the elastic hooks are engaged with the engaging structure. 1. A syringe and needle assembly , comprising:an elongated hollow barrel, comprising proximal and distal ends, an interior wall, and openings at the proximal and distal ends, wherein the distal end defines a connecting portion at the opening of the distal end;a needle unit, comprising a hollow needle, a hub and an engaging structure connected to the hub, wherein the hub having an interior passageway is removably held in the opening of the distal end of the elongated hollow barrel through the connecting portion, the engaging structure is located in the elongated hollow barrel, and the hollow needle is mounted in the hub and the engaging structure; anda plunger assembly being axially displaceable within the elongated hollow barrel, and comprising an elongated plunger rod, a pushing portion formed in the front end of the plunger rod and an operating portion formed in the rear end of the plunger rod, wherein the pushing portion facing the connecting portion has a plurality of elastic hooks, and the elastic hooks are separated from each other and are disposed correspondingly to the engaging ...

System and Method for Automated BIOS Recovery After BIOS Corruption

A method includes determining that initial boot block (IBB) firmware at an information handling system is invalid. The method further includes identifying that a redundant copy of the IBB firmware is stored at the information handling system, and executing the redundant copy of the IBB firmware. 1. A method comprising:determining that initial boot block (IBB) firmware at an information handling system is invalid;identifying that a redundant copy of the IBB firmware is stored at the information handling system; andexecuting the redundant copy of the IBB firmware.2. The method of claim 1 , further comprising:determining that platform security processor (PSP) firmware at the information handling system is invalid;identifying a redundant copy of the PSP firmware is stored at the information handling system; andexecuting the redundant copy of the PSP firmware.3. The method of claim 2 , further comprising:in response to executing the redundant copy of the PSP firmware, performing a basic input/output system (BIOS) recovery procedure to update firmware stored at a BIOS non-volatile random access memory (NVRAM).4. The method of claim 2 , further comprising:in response to executing the redundant copy of the PSP firmware, setting a flag at a register identifying that the redundant copy of the IBB firmware was executed.5. The method of claim 1 , wherein the redundant copy of the IBB firmware is stored at a BIOS NVRAM.6. The method of claim 5 , wherein the redundant copy of the IBB firmware is stored at a sector at the BIOS NVRAM that is different than a sector storing the PSP firmware.7. The method of claim 1 , further comprising:in response to executing the redundant copy of the IBB firmware, setting a flag at a register identifying that the redundant copy of the PSP firmware was executed.8. The method of claim 1 , wherein the determining is in response to executing instructions stored at a read-only memory.9. The method of claim 1 , further comprising:in response to ...

CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME

A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface. 14-. (canceled)5. A circuit board with a heat-recovery function , comprising:a substrate having a top surface and a bottom surface which are opposite to each other;a heat-storing device embedded in the substrate and connected to a processor for performing heat exchange with the processor; and a first metal-junction surface connected to the heat-storing device for performing heat exchange with the heat-storing device; and', 'a second metal-junction surface joined with the first metal-junction surface, wherein the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface, wherein the substrate further comprises:', 'a first recess disposed at the top surface of the substrate, wherein the thermoelectric device is located in the first recess;', 'a second recess disposed at the bottom surface of the substrate, wherein the heat-storing device is located in the second recess, the first recess and the second recess are opposite to each other, and at least one portion of the substrate is located between the heat-storing device and the thermoelectric device;', 'at least one first via disposed at the portion of the ...

ADJUSTABLE PERFORMANCE BOOT SYSTEM

An adjustable performance boot system includes a processing system and an SPI memory storing firmware volumes. The processing system retrieves, via an SPI interface at a first SPI interface performance level, a first firmware volume including a first hash value generated using a second firmware volume. The processing system then increases the SPI interface performance level, retrieves the second firmware volume via the SPI interface at the increased SPI interface performance level, generates a second hash value using that second firmware volume and, in response to it not matching the first hash value, lowers the SPI interface performance level. The processing system then retrieves the second firmware volume via the SPI interface at the decreased SPI interface performance level, generates a third hash value using that second firmware volume and, in response to it matching the first hash value, uses that second firmware volume to provide a BIOS. 1. An adjustable performance boot system , comprising:a Serial Peripheral Interface (SPI) memory subsystem storing a plurality of firmware volumes; and retrieve, from the SPI memory subsystem via the SPI interface at a first SPI interface performance level, a first firmware volume of the plurality of firmware volumes that includes a first hash value that was previously generated by performing a hashing operation on a second firmware volume of the plurality of firmware volumes;', 'increase the first SPI interface performance level to a second SPI interface performance level;', 'retrieve, from the SPI memory subsystem via the SPI interface at the second SPI interface performance level, the second firmware volume;', 'perform, on the second firmware volume that was retrieved at the second SPI interface performance level, the hashing operation to generate a second hash value;', 'lower, in response to the second hash value not matching the first hash value included in the first firmware volume, the second SPI interface performance ...

EARLY BOOT EVENT LOGGING SYSTEM

An early boot debug system includes a first memory subsystem that includes boot instructions and a processing system that is coupled to the first memory subsystem. The processing system includes a primary processing subsystem, and a secondary processing subsystem that is coupled to the primary processing subsystem and a second memory subsystem. The secondary processing subsystem copies the boot instructions from the first memory subsystem to the second memory subsystem and executes the boot instructions from the second memory subsystem during a boot operation. The secondary processing subsystem then detects a first event during the execution of the boot instructions and, in response, generates a first event information. The secondary processing subsystem stores the first event information in the second memory subsystem to be retrieved on-demand by an administrator. 1. An early boot debug system , comprising:a first memory subsystem that includes boot instructions; and a primary processing subsystem; and', copy the boot instructions from the first memory subsystem to the second memory subsystem;', 'execute the boot instructions from the second memory subsystem during a boot operation;', 'detect a first event during the execution of the boot instructions and, in response, generate first event information; and', 'store the first event information in the second memory subsystem., 'a secondary processing subsystem that is coupled to the primary processing subsystem and a second memory subsystem, wherein the secondary processing subsystem is configured to], 'a processing system that is coupled to the first memory subsystem and that includes2. The system of claim 1 , wherein the secondary processing subsystem is configured to:determine that the second memory subsystem is full; andoverwrite a second event information that was previously stored in the second memory subsystem with the first event information.3. The system of claim 1 , wherein the secondary processing ...

OPTO-ELECTRONIC CIRCUIT BOARD AND METHOD FOR ASSEMBLING THE SAME

A method for assembling an opto-electronic circuit board is described as follows. A bottom cladding layer, a core layer and a top cladding layer are formed on the base orderly such that a waveguide is completed. A first light-guide hole is formed in a base material, and a light source is disposed on the base material thereby forming an emission component. A second light-guide hole is formed in another base material, and then an optic receiver is disposed on another base material thereby forming a receiver component. A circuit substrate is processed in order to form a first cavity, a second cavity and a third cavity on a first circuit layer of the substrate. The waveguide, the emission component and the receiver component are disposed respectively in the first cavity, the second cavity and the third cavity. 1. A method of assembling an opto-electronic circuit board , comprising:forming a bottom cladding layer, a core layer, and a top cladding layer on a base sequentially for forming a waveguide on the base;forming a first light-guide hole at a first base material and processing the first base material thereby forming a first inserting portion;disposing a light emitter on the first base material as an emitting component;forming a second light-guide hole at a second base material and processing the second base material thereby forming a second inserting portion;disposing a light receiver on the second base material as a receiving component;forming a first cavity, a second cavity and a third cavity on a first circuit layer of a circuit substrate, wherein the first cavity is located between the second cavity and the third cavity;disposing the waveguide in the first cavity, wherein the base is connected to the circuit substrate; anddisposing the emitting component and the receiving component in the second cavity and the third cavity respectively, wherein the light emitter and the light receiver align with the core layer.2. The method of claim 1 , further comprising: ...

CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME

A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface. 1. A circuit board with a heat-recovery function , comprising:a substrate;a heat-storing device embedded in the substrate and connected to a processor for performing heat exchange with the processor; and a first metal-junction surface connected to the heat-storing device for performing heat exchange with the heat-storing device; and', 'a second metal-junction surface joined with the first metal-junction surface, wherein the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface., 'a thermoelectric device embedded in the substrate, comprising2. The circuit board of claim 1 , further comprising: at least one via penetrating the interposer board; and', 'a heat-conducting pillar disposed in the via, wherein the heat-storing device performs heat exchange with the processor through the heat-conducting pillar., 'an interposer board disposed between the heat-storing device and the processor, the interposer board comprising3. The circuit board of claim 2 , wherein the substrate further comprises:a first opening disposed at a first surface of the substrate, wherein the heat-storing device is located in the first ...

Circuit board structure

Protocol security system

A protocol security system includes a protocol producer driver stored in a first memory range on a primary memory system, a protocol consumer driver stored on the primary memory system, and a firmware interface engine provided via the primary memory system. The firmware interface engine receives a protocol pointer from the protocol consumer driver, and identifies that the protocol pointer was provided by the protocol producer driver. If the firmware interface engine determines that the protocol pointer is not stored in the first memory range on the primary memory system, it generates a protocol security violation. If the firmware interface engine determines that the protocol pointer is stored in the first memory range on the primary memory system and points to an architectural protocol, it determines whether the protocol producer driver originated from a secondary memory system and, if not, generates a protocol security violation.

System and method for automated BIOS recovery after BIOS corruption

A method includes determining that initial boot block (IBB) firmware at an information handling system is invalid. The method further includes identifying that a redundant copy of the IBB firmware is stored at the information handling system, and executing the redundant copy of the IBB firmware.

Adjustable performance boot system

An adjustable performance boot system includes a processing system and an SPI memory storing firmware volumes. The processing system retrieves, via an SPI interface at a first SPI interface performance level, a first firmware volume including a first hash value generated using a second firmware volume. The processing system then increases the SPI interface performance level, retrieves the second firmware volume via the SPI interface at the increased SPI interface performance level, generates a second hash value using that second firmware volume and, in response to it not matching the first hash value, lowers the SPI interface performance level. The processing system then retrieves the second firmware volume via the SPI interface at the decreased SPI interface performance level, generates a third hash value using that second firmware volume and, in response to it matching the first hash value, uses that second firmware volume to provide a BIOS.

Multi-layer printed circuit board and method for fabricating the same

Three-dimensional patterned structure of circuit board and process thereof

Anchored circuit structure and method for making the same

Circuit board and manufacturing method thereof and electro-optic apparatus having the circuit board

Manufacturing method of circuit structure

Multi-injector module and coating process

Secure boot policy for platform security using neutral processors in an information handling system

A secure boot policy may be stored in the information handling system and used to create a trusted relationship with a CPU, including a neutral CPU that has not been fused with an OEM key. The secure boot policy may be a data blob including platform-specific identification information (e.g., one or more of flash memory unique ID, motherboard ePPID), a boot policy (e.g., specifying to enable or disable neutral CPU fusing), and a signature. The secure boot policy may be stored in a one-time-programmable (OTP) storage of the information handling system, such as an OTP region in the serial peripheral interface (SPI) flash memory part storing the basic input/output system (BIOS). The BIOS may verify the secure boot policy using a public key and check if the boot policy is bound to current BIOS flash part and/or system configuration, and then apply the boot policy if the verification is passed.

Circuit board and manufacturing method thereof

線路板及其製作方法與具有此線路板的光電裝置

一種線路板及其製作方法與具有此線路板的光電裝置。此線路板包括包括第一介電層與配置於第一介電層上的第一線路層的基板、光波導層、第二介電層、凸面結構以及第二線路層。光波導層配置於部分基板上。第二介電層配置於基板與光波導層上，其中第二介電層具有開口，且此開口暴露出光波導層的側壁與部分第一線路層。凸面結構配置於光波導層的側壁上，其中凸面結構具有折射率n1，光波導層具有折射率n2，且| n1-n2 |/n1＜1%，且凸面結構的表面粗糙度小於光波導層的側壁的表面粗糙度。第二線路層配置於第二介電層上。

Scheda a circuiti stampati multistrato e relativo procedimento di fabbricazione

線路板的線路結構的製造方法

Embedded wiring board and method for fabricating the same

Wiring board and fabrication process thereof

Process of fabricating circuit board

Method to from embedded circuit structure with embedded element

Multi-injector module and coating process

針腳結構及具有其之電子總成

Circuit board and manufacturing method thereof

線路板的製造方法

Circuit board and method for manufacturing the same

線路板及其製作方法

一種線路板及其製作方法。此製作方法是先於介電核心層上壓合第一預膠層與第一導電層，其中第一導電層的面向介電核心層的表面的粗糙度小於或等於1.5 μm。然後，於第一導電層、第一預膠層與介電核心層中形成第一導通孔。接著，將第一導電層與第一預膠層圖案化，以形成第一線路層。而後，壓合第一介電層、第二預膠層與第二導電層於第一線路層上，其中第二導電層的面向第一介電層的表面的粗糙度大於1.5 μm且小於3 μm。繼之，於第二導電層、第二預膠層與第一介電層中形成第二導通孔。之後，將第二導電層與第二預膠層圖案化，以形成第二線路層。

Transfer process and apparatus for inkjet pattern

線路板及其製作方法

一種線路板，包括一第一介電層、一第一圖案化金屬箔層、一第一線路圖案、至少一第一導電孔道、一疊層結構、一第二介電層、一第二圖案化金屬箔層、一第二線路圖案及至少一第二導電孔道。第一線路圖案埋入第一介電層。第一導電孔道之一端穿過第一介電層以連接第一圖案化金屬箔層，且第一導電孔道與第一圖案化金屬箔層之間具有界面。疊層結構配置於第一介電層的一第二表面上，且覆蓋第一線路圖案與第一導電孔道的另一端。第二介電層、第二圖案化金屬箔層及第二線路圖案依序配置於疊層結構上。第二導電孔道與第二線路圖案一體成形。第二導電孔道之一端穿過第二介電層以連接疊層結構。

Circuit board and method for managing quality thereof

Patterned structure of circuit board

針腳結構及具有其之電子總成

一種針腳結構及具有其之電子總成。電子總成適於安裝至一插座連接器，且插座連接器具有多個插孔。電子總成包括一線路基板、多個針腳結構及一銲料。線路基板具有一表面，針腳結構設置於表面上。各針腳結構包括一插接段及一銲接段，插接段適於插入插座連接器上對應之插孔，以與插座連接器電性連接。銲接段設置於線路基板上並與插接段連接，其中銲接段之直徑小於插接段之直徑。銲料包覆各銲接段，且銲料之厚度不大於插接段與銲接段的直徑差。

Peeling fixture and peeling method for substrate of the same

針格陣列的針腳

【物品用途】;本創作為一種應用於電子元件焊接用的針格陣列的針腳。;【創作特點】;本創作之外觀特點在於針格陣列的針腳具有一針柱部與一爬錫部。由立體圖與前視圖觀之，針柱部與爬錫部構成一近似I字形狀。此外，爬錫部具有多個環狀溝槽，且這些環狀溝槽等間隔地位於爬錫部的周圍。

Wiring board

Substrate process and substrate structure

Method for fabricating wiring structure of circuit board

Wiring board and process for fabricating the same

光電線路板及其製造方法

Trace structure of circuit board and process thereof

Method for fabricating wiring bord

Circuit board and method for manufacturing the same

Transfer process and apparatus for inkjet pattern