Composite retardation plate, composite polarizing plate and preparation methods for those

Disclosed are a composite retardation plate, a composite polarizing plate and a method for manufacturing the same. More particularly, the composite retardation plate is prepared by corona or plasma treatment of a face of a liquid crystal coating layer formed on a polymeric base film to improve adhesion therebetween and then directly providing a surface treatment coating layer above the coated film, thus being produced by a simple process without using a glass material while requiring neither an additional base material nor adhesive layer. Therefore, the retardation plate prepared as described above is desirably used as a retarder for a thin-film type display.

Polarizing plate and image display device comprising the same

The present invention relates to a polarizing plate and an image display device comprising the same. The present invention discloses a polarizing plate integrated with a delayer and the image display device comprising the same. The polarizing plate comprises a polarizing film which comprises a polarizing plate layer and a transparent bottom film attached to at least one surface of the polarizing plate layer; an orientation film layer applied to the other surface relative to the surface on which the polarizing plate layer is formed, of the transparent bottom film; and a cured liquid crystal layer formed on the orientation film layer. The polarizing plate of the invention can have reduced thickness and improved circular polarity.

ELECTROLESS SURFACE TREATMENT PLATED LAYERS OF PRINTED CIRCUIT BOARD AND METHOD FOR PREPARING THE SAME

Disclosed herein are an electroless surface treatment plated layer of a printed circuit board, a method for preparing the same, and printed circuit board including the same. The electroless surface treatment plated layer includes: electroless nickel (Ni) plated coating/palladium (Pd) plated coating/gold (Au) plated coating, wherein each of the electroless nickel, palladium, and gold plated coatings has a thickness of 0.02 to 1 μm, 0.01 to 0.3 μm, and 0.01 to 0.5 μm. In the electroless surface treatment plated layer of the printed circuit board, a thickness of the nickel plated coating is specially minimized to 0.02 to 1 μm, thereby making it possible to form an optimized electroless Ni/Pd/Au surface treatment plated layer. 1. An electroless surface treatment plated layer of an electroless printed circuit board , the electroless surface treatment plated layer comprising:nickel (Ni) plated coating/palladium (Pd) plated coating/gold (Au) plated coating,wherein each of the electroless nickel, palladium, and gold plated coatings has a thickness of 0.02 to 1 μm, 0.01 to 0.3 μm, and 0.01 to 0.5 μm.2. The electroless surface treatment plated layer according to claim 1 , wherein it is connected to external devices in a wire bonding scheme.3. The electroless surface treatment plated layer according to claim 1 , wherein 8 wt % or more of phosphorus (P) is contained in the electroless nickel plated coating.4. The electroless surface treatment plated layer according to claim 3 , wherein the phosphorus (P) is to prevent oxidation of the electroless nickel plated coating.5. A printed circuit board comprising the electroless surface treatment plated layer according to .6. The printed circuit board according to claim 5 , wherein even though a frequency band increases claim 5 , an electrical resistance value of the electroless surface treatment plated layer does not increase.7. The printed circuit board according to claim 5 , wherein plated layers formed as the electroless surface ...

CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME

A circuit board includes a circuit pattern formed on a substrate, a first solder resist layer formed on the circuit pattern, an electroless plating layer formed on the circuit pattern on which the first solder resist layer is opened, and a second solder resist layer formed on the first solder resist layer, and a method for manufacturing the same. According to certain embodiments, it is possible to cover a portion which has vulnerable plating quality due to solder resist residue or insufficient wetting around an edge of an existing solder resist layer by including an additional solder resist layer on a surface-treated plating layer. Further, it is possible to protect an undercut portion under the solder resist layer by forming the additional solder resist layer. 1. A circuit board comprising:a circuit pattern formed on a substrate;a first solder resist layer formed on the circuit pattern;an electroless plating layer formed on the circuit pattern on which the first solder resist layer is opened; anda second solder resist layer formed on the first solder resist layer.2. The circuit board according to claim 1 , wherein the second solder resist layer extends to a portion of the electroless plating layer including the region in which the first solder resist layer is formed.3. The circuit board according to claim 1 , wherein the electroless plating layer is formed of at least one layer selected from a nickel (Ni) layer claim 1 , a palladium (Pd) layer claim 1 , and a gold (Au) layer.4. The circuit board according to claim 1 , wherein the circuit pattern uses copper (Cu).5. A method for manufacturing a circuit board claim 1 , comprising:forming a circuit pattern on a substrate;applying a first solder resist layer on the circuit pattern;etching the first solder resist layer to open the circuit pattern;forming an electroless plating layer by surface-treating the circuit pattern; andforming a second solder resist layer on the surface-treated first solder resist layer.6. The ...

METHOD OF FORMING GOLD THIN FILM AND PRINTED CIRCUIT BOARD

There is provided a method of forming a gold thin film, the method including: forming a nickel plating layer on a surface of an object through electroless nickel (Ni) plating; forming a palladium-copper mixture plating layer on the nickel plating layer through electroless plating using a palladium-copper (Pd—Cu) mixture; and forming a first gold thin film by immersing the palladium-copper mixture plating layer in a gold (Au) galvanic electrolytic liquid to replace a portion of copper (Cu) particles in the palladium-copper mixture plating layer with gold particles through a replacement reaction. 1. A method of forming a gold thin film , the method comprising:forming a nickel plating layer on a surface of an object through electroless nickel (Ni) plating;forming a palladium-copper mixture plating layer on the nickel plating layer through electroless plating using a palladium-copper (Pd—Cu) mixture; andforming a first gold thin film by immersing the palladium-copper mixture plating layer in a gold (Au) galvanic electrolytic liquid to replace a portion of copper (Cu) particles in the palladium-copper mixture plating layer with gold particles through a replacement reaction.2. The method of claim 1 , further comprising claim 1 , before the forming of the palladium-copper mixture plating layer claim 1 , forming a palladium plating layer on the nickel plating layer through electroless palladium (Pd) plating.3. The method of claim 1 , further comprising claim 1 , after the forming of the first gold thin film claim 1 , forming a second gold thin film on the first gold thin film through electroless gold (Au) plating.4. The method of claim 1 , wherein the palladium-copper mixture contains a palladium salt claim 1 , a copper salt claim 1 , a complexing agent claim 1 , and a reducing agent.5. The method of claim 4 , wherein the palladium salt is one selected from the group consisting of palladium chloride claim 4 , palladium sulfate claim 4 , and dichlorotetraamine palladium.6. ...

ELECTRODE PAD, PRINTED CIRCUIT BOARD USING THE SAME, AND METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD

There is provided an electrode pad including: a connection terminal part; a first plating layer including palladium phosphorus (Pd—P) formed on the connection terminal part; and a second plating layer including palladium (Pd) formed on the first plating layer. 1. An electrode pad , comprising:a connection terminal part;a first plating layer including palladium phosphorus (Pd—P) formed on the connection terminal part; anda second plating layer including palladium (Pd) formed on the first plating layer.2. The electrode pad of claim 1 , wherein the connection terminal part includes copper (Cu).3. The electrode pad of claim 1 , wherein a content of phosphorus (P) included in the palladium phosphorus (Pd—P) is 0.1 to 6 wt %.4. The electrode pad of claim 1 , wherein a thickness of the first plating layer is 0.01 to 0.5 μm.5. The electrode pad of claim 1 , wherein the second plating layer is formed of pure palladium (Pd).6. The electrode pad of claim 1 , wherein a thickness of the second plating layer is 0.01 to 0.5 μm.7. The electrode pad of claim 1 , further comprising a third plating layer including gold (Au) formed on the second plating layer.8. The electrode pad of claim 7 , wherein a thickness of the third plating layer is 0.01 to 0.5 μm.9. A printed circuit board claim 7 , comprising:an insulating substrate;a connection terminal part formed on the insulating substrate;a first plating layer including palladium phosphorus (Pd—P) formed on the insulating substrate and an outer side of the connection terminal part; anda second plating layer including palladium (Pd) formed on the insulating substrate and an outer side of the first plating layer.10. The printed circuit board of claim 9 , wherein the connection terminal part includes copper (Cu).11. The printed circuit board of claim 9 , wherein a content of phosphorus (P) included in the palladium phosphorus (Pd—P) is 0.1 to 0.6 wt %.12. A method of manufacturing a printed circuit board claim 9 , the method comprising: ...

PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

A printed circuit board includes an insulating layer; a metal pad formed on the insulating layer; a surface treatment layer formed on the metal pad; a solder layer formed on the surface treatment layer and the insulating layer; and an intermetallic compound layer formed between the solder layer and the surface treatment layer. Further, a printed circuit board may include an insulating layer; a metal seed layer formed on the insulating layer; a metal pad formed on the metal seed layer; a surface treatment layer formed on the metal pad and the metal seed layer; a solder layer formed on the surface treatment layer of the metal pad and the surface treatment layer of the metal seed layer; and an intermetallic compound layer formed between the solder layer and the surface treatment layer. 1. A printed circuit board comprising:an insulating layer;a metal pad formed on the insulating layer;a surface treatment layer formed on the metal pad;a solder layer formed on the surface treatment layer and the insulating layer; andan intermetallic compound layer formed between the solder layer and the surface treatment layer.2. The printed circuit board according to claim 1 , wherein the plane shape of one or both of the surface treatment layer and the insulating layer on which the solder layer is formed is a ring shape.3. The printed circuit board according to claim 2 , wherein the ring-shaped surface treatment layer and the ring-shaped insulating layer are arranged alternately.4. The printed circuit board according to claim 2 , wherein the metal pad consists of an inner pad and an outer pad claim 2 , and the width between the inner pad and the outer pad is greater than 10 μm.5. The printed circuit board according to claim 1 , wherein the surface treatment layer is a metal surface treatment layer.6. The printed circuit board according to claim 5 , wherein the metal surface treatment layer comprises at least one of Cu claim 5 , Ni claim 5 , Pd claim 5 , Au claim 5 , Sn claim 5 , and Ag ...

Circuit board and method of manufacturing circuit board

The circuit board provided with a first conductive pattern and a second conductive pattern performed by different types of surface treatments are disclosed. The circuit board in accordance with one embodiment of the present invention forms the first conductive pattern and the second conductive pattern on an insulating layer, wherein the first metal plating layer and the second metal plating layer are formed on the surface of the first conductive pattern, the second metal plating layer is formed on the surface of the second conductive pattern, and the second metal plating layer is made of the material different from that of the first metal plating layer to be exposed to the outside, whereby the pattern pitch is easily reduced, the reduction of the electrical characteristics due to the surface treatment can be minimized and the efficiency of the manufacturing process may be improved.

Display device

A display device includes: a first electrode; a second electrode overlapping the first electrode; a light emission layer disposed between the first electrode and the second electrode; a partition wall overlapping a portion of the first electrode; and an inorganic layer disposed between the partition wall and the first electrode, wherein the inorganic layer covers an end of the first electrode.

DISPLAY DEVICE

A display device according to an exemplary embodiment of the present invention includes: a display panel including a plurality of pixels respectively displaying a first color, a second color, and a third color; and a signal controller controlling the display panel by processing an input image signal, wherein, in a color weakness mode, at least one color among the first to third colors is displayed with a higher gray than an input gray of the input image signal, and the other colors are displayed with the same gray as the input gray of the input image signal. 1. A display device , comprising:a display panel including a plurality of pixels respectively displaying a first color, a second color, and a third color; anda signal controller that is configured to control the display panel by processing an input image signal,wherein, in a color weakness mode, at least one color among the first color, the second color and the third color is displayed with a higher intensity than the input image signal.2. The display device of claim 1 , whereinthe color weakness mode includes a plurality of lower modes, and a protanomaly mode emphasizing red;', 'a deuteranomaly mode emphasizing green; and', 'a tritanomaly mode emphasizing blue., 'the lower modes include3. The display device of claim 1 , whereinin a normal mode, the first color, the second color and the third colors are displayed with the same intensity as the input image signal.4. The display device of claim 1 , whereinthe signal controller includes an image convertor converting the input image signal to generate a compensation image signal.5. The display device of claim 4 , whereinthe image convertor generates the compensation image signal by increasing a gray level of a predetermined color so as to increase luminance of the predetermined color related to the color weakness.6. The display device of claim 4 , whereinthe compensation image signal is stored to a storage unit as an image conversion setting value.7. The display ...

Coil component

A coil component includes a body, a coil portion embedded in the body, and external electrodes electrically connected to the coil portion. The coil portion includes coil patterns having trenches formed in surfaces thereof. The trenches extend through a partial thickness of the coil portion, and are located at aligned locations in adjacent windings of the coil portion. A method of forming the coil component includes forming a mask pattern having a coil shaped opening and including a plurality of bridges extending across the coil shaped opening in the mask pattern.

OPTICAL PATH CONVERTING ELEMENT AND DISPLAY DEVICE INCLUDING THE SAME

The present invention provides an optical path converting element. The optical path converting element includes a first layer, a second layer, and a liquid crystal layer. The first layer includes at least one first-layer electrode. The second layer includes at least one second-layer electrode. The liquid crystal layer is interposed between the first layer and the second layer. Liquid crystal of the liquid crystal layer has a first state or a second state in accordance with a voltage applied to the first-layer and second layer electrodes. The liquid crystal of the liquid crystal layer is vertically aligned in the first state. The liquid crystal of the liquid crystal layer is horizontally aligned in the second state. The liquid crystal of the liquid crystal layer is spirally aligned in a first direction in the second state. The liquid crystal of the liquid crystal layer has chirality. 1. An optical path converting element , comprising:a first layer including at least one first-layer electrode;a second layer including at least one second-layer electrode; anda liquid crystal layer interposed between the first layer and the second layer,wherein liquid crystal of the liquid crystal layer has a first state or a second state in accordance with a voltage which is applied to the first-layer and second-layer electrodes,wherein the liquid crystal of the liquid crystal layer is vertically aligned in the first state,wherein the liquid crystal of the liquid crystal layer is horizontally aligned in the second state, the liquid crystal of the liquid crystal layer being spirally aligned along a first direction in the second state, andwherein the liquid crystal of the liquid crystal layer has chirality.2. The optical path converting element of claim 1 , wherein the liquid crystal of the liquid crystal layer is spirally aligned in a clockwise direction in a plan view along the first direction in the second state to form a first optical path converting unit.3. The optical path ...

METHOD FOR PREPARING POLYOLEFIN RESIN COMPOSITION AND POLYOLEFIN RESIN COMPOSITION

The present invention relates to a method for preparing a polyolefin resin composition including the step of mixing a first resin chip including a first polyolefin resin and glass filaments and a second resin chip including a second polyolefin resin and an aerogel or glass bubbles, a polyolefin resin composition including a first resin chip including a first polyolefin resin and glass filaments and a second resin chip including a second polyolefin resin and an aerogel or glass bubbles, and a polyolefin resin molded article including an extrusion molded article of the polyolefin resin composition. 1. A method for preparing a polyolefin resin composition comprising the steps of:mixing a first resin chip comprising a first polyolefin resin and glass filaments impregnated in the first polyolefin resin; and a second resin chip comprising a second polyolefin resin and an aerogel or glass bubbles impregnated in the second polyolefin resin,wherein a ratio of a length of the second resin chip to a length of the first resin chip is 0.8 to 1.2.2. The method according to claim 1 ,wherein the first resin chip comprises 40 to 98 wt % of the first polyolefin resin and 2 to 60 wt % of the glass filaments, andthe second resin chip comprises 40 to 98 wt % of the second polyolefin resin and 2 to 60 wt % of the aerogel or glass bubbles.3. The method according to claim 1 ,wherein the first polyolefin resin and the second polyolefin resin respectively comprise isotactic polypropylene having a melt index (measured at 230° C. according to ASTM 3-1238) of 10 g/10 min to 40 g/10 min.4. The method according to claim 1 ,wherein the glass filament has a length of 5 mm to 15 mm and a cross-sectional diameter of 1 to 50 μm.5. The method according to claim 1 ,wherein the aerogel has a longest diameter of 1 to 50 μm.6. The method according to claim 1 ,{'sup': 3', '3, 'wherein the aerogel has a specific surface area of 100 cm/g to 1,000 cm/g.'}7. The method according to claim 1 ,wherein the glass ...

OPTICAL MODULATION DEVICE, OPTICAL DEVICE INCLUDING THE SAME, AND DRIVING METHOD THEREOF

A method for driving an optical modulation device is provided. The optical modulation device includes first and second portions. Each of the first and second portions includes a first plate, a second plate opposite to the first plate, and a liquid crystal layer disposed between the first and second plates. The method includes forming a forward phase gradient in the first portion by applying a first driving signal to first and second electrodes in the first plate of the first portion and a third electrode in the second plate of the first portion. The method further includes forming a reverse phase gradient in the second portion by applying a second driving signal differing from the first driving signal to fourth and fifth electrodes in the first plate of the second portion and a sixth electrode in the second plate of the second portion. 1. A method for driving an optical modulation device including a first portion and a second portion , wherein each of the first and second portions includes a first plate , a second plate opposite to the first plate , and a liquid crystal layer disposed between the first plate and the second plate , comprising:forming a forward phase gradient in the first portion by applying a first driving signal to first and second electrodes in the first plate of the first portion and a third electrode in the second plate of the first portion; andforming a reverse phase gradient in the second portion by applying a second driving signal differing from the first driving signal to fourth and fifth electrodes in the first plate of the second portion and a sixth electrode in the second plate of the second portion,wherein the first plate includes a first aligner,the second plate includes a second aligner, andan alignment direction of the first aligner and an alignment direction of the second aligner are substantially parallel to each other.2. The method of claim 1 , whereinwhen no electric field is formed in the liquid crystal layer, an alignment ...

CARBON FIBER REINFORCED POLYPROPYLENE RESIN COMPOSITION WITH EXCELLENT MOLDING PROPERTY

The present invention provides a carbon fiber reinforced polypropylene resin composition with improved molding property. In particular, provided is a carbon fiber reinforced polypropylene resin composition with significantly improved molding property, tensile strength, flexural strength and the like by adding a modified polypropylene grafted with maleic anhydride as a compatibilizer to a polypropylene resin to reinforce the carbon fiber. 1. A polypropylene resin composition , comprising:an amount of about 50 to about 80 wt % of a polypropylene resin as a homopolymer of propylene or a propylene-ethylene copolymer;an amount of about 1 to about 10 wt % of a modified polypropylene as a compatibilizer; andan amount of about 15 to about 40 wt % of carbon fiber,based on the total weight of the polypropylene resin composition,wherein the polypropylene resin has a melt index (MI) of about 20 to about 100 g/10 min at a temperature of about 230° C., a molecular weight distribution (MWD) of about 5 to about 10 and an isotactic index of about 97 to about 100, andwherein the modified polypropylene has a maleic anhydride graft ratio of about 0.5 to 15 wt %.2. The polypropylene resin composition of claim 1 , wherein the polypropylene resin composition includes an amount of about 60 to about 70 wt % of the polypropylene resin claim 1 , an amount of about 2 to about 7 wt % of the modified polypropylene claim 1 , and an amount of about 25 to about 35 wt % of the carbon fiber claim 1 , based on the total weight of the polypropylene resin composition.3. A carbon fiber reinforced polypropylene resin composite prepared by impregnating an amount of about 15 to about 40 wt % of carbon fiber in a melt mixture including an amount about 50 to about 80 wt % of a polypropylene resin as a homopolymer of propylene or a propylene-ethylene copolymer and an amount of about 1 to about 10 wt % of modified polypropylene as a compatibilizer claim 1 ,wherein the polypropylene resin has a melt index (MI) ...

Display device

A display device may include a sensor layer, a substrate, a pixel layer, and a black matrix. The sensor layer may include photo sensors. The substrate may be positioned on the sensor layer. The pixel layer may be positioned on the substrate and may include pixels. The substrate may be positioned between the sensor layer and the pixel layer. The pixels may include pixel electrodes. The black matrix may be positioned on the pixel layer, may include first-set openings respectively overlapping with the pixel electrodes, and may include second-set openings not overlapping with any pixel electrodes of the display device in a direction perpendicular to the substrate. The pixel layer may be positioned between the substrate and the black matrix.

THIN FILM TRANSISTOR FOR DISPLAY DEVICE AND ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE INCLUDING THE SAME

The described technology relates generally to a thin film transistor for a display device and an organic light emitting diode display device including the same. An exemplary embodiment provides a thin film transistor for a display device, including: a substrate; a semiconductor that is disposed on the substrate and includes a channel, and a source region and a drain region disposed at opposite sides of the channel; a gate insulating layer that includes a first gate insulating layer disposed on the substrate and the semiconductor, and a second gate insulating layer disposed on the first gate insulating layer and overlapping the channel; a gate electrode disposed on the second gate insulating layer; an interlayer insulating layer disposed directly on the first gate insulating layer and the gate electrode; and a source electrode and a drain electrode that are disposed on the interlayer insulating layer and are connected to the semiconductor, wherein a thickness of a portion of the gate insulating layer overlapped with the gate electrode may be larger than that of a portion of the gate insulating layer overlapped with the source region and that of a portion of the gate insulating layer overlapped with the drain region. 1. A thin film transistor for a display device , comprising:a substrate;a semiconductor that is disposed on the substrate and includes a channel, and a source region and a drain region disposed at opposite sides of the channel;a gate insulating layer that includes a first gate insulating layer disposed on the substrate and the semiconductor, and a second gate insulating layer disposed on the first gate insulating layer and overlapping the channel;a gate electrode disposed on the second gate insulating layer;an interlayer insulating layer disposed directly on the first gate insulating layer and the gate electrode; anda source electrode and a drain electrode that are disposed on the interlayer insulating layer and are connected to the semiconductor,wherein ...

OPTICAL MODULATION DEVICE INCLUDING LIQUID CRYSTALS, A DRIVING METHOD THEREOF, AND AN OPTICAL DISPLAY DEVICE USING THE SAME

An optical modulation device is provided. The optical modulation device includes first and second plates facing each other, a liquid crystal layer interposed between the first and second plates, and first and second electrodes. The liquid crystal layer includes a plurality of liquid crystal molecules. The first plate includes a first aligner. The second plate includes a second aligner. A first alignment direction of the first aligner and a second alignment direction of the second aligner are substantially parallel to each other. The first and second electrodes extend to cross each other. The first and second electrodes are insulated from each other. The second electrode extends to cross the second alignment direction. An angle θP formed between a vertical axis of the second alignment direction and an extending direction of the second electrode is a value between 5° and 45°. 1. An optical modulation device comprising:first and second plates facing each other;a liquid crystal layer interposed between the first and second plates, the liquid crystal layer including a plurality of liquid crystal molecules; andfirst and second electrodes,wherein the first plate includes a first aligner,the second plate includes a second aligner,a first alignment direction of the first aligner and a second alignment direction of the second aligner are substantially parallel to each other,the first and second electrodes extend to cross each other, andthe first and second electrodes are insulated from each other,wherein the second electrode extends to cross the second alignment direction, and{'sub': 'P', 'wherein an angle θformed between a vertical axis of the second alignment direction and an extending direction of the second electrode is a value between 5° and 45°.'}2. The optical modulation device of claim 1 , wherein a difference θbetween an azimuthal angle of the first alignment direction of the first aligner and an azimuthal angle of the second alignment direction of the second aligner ...

VERTICAL BIPOLAR JUNCTION TRANSISTOR AND MANUFACTURING METHOD THEREOF

The present disclosure relates to a vertical bipolar junction transistor. A vertical bipolar junction transistor includes a high concentration doping region emitter terminal disposed on a semiconductor substrate; a high concentration doping region collector terminal disposed on a semiconductor substrate; a high concentration doping region base terminal disposed between the emitter terminal and the collector terminal; a drift region having a first doping concentration surrounding the emitter terminal and being deeper than either the base terminal or the collector terminal; a base layer disposed below the drift region; a collector layer in contact with the base layer, the collector layer having a second doping concentration higher than the first doping concentration. The manufacturing cost of the vertical bipolar junction transistor can be lowered and a current gain can be elevated using a low-cost BCD process. 1. A vertical bipolar junction transistor comprising:a high concentration doping region emitter terminal disposed on a semiconductor substrate;a high concentration doping region collector terminal disposed on a semiconductor substrate;a high concentration doping region base terminal disposed between the emitter terminal and the collector terminal;a drift region having a first doping concentration surrounding the emitter terminal and being deeper than either the base terminal or the collector terminal;a base layer disposed below the drift region; anda collector layer in contact with the base layer, the collector layer having a second doping concentration higher than the first doping concentration.2. The vertical bipolar junction transistor of claim 1 , further comprising:a body region surrounding the base terminal; anda well ring of a first conductive type surrounding the collector terminal and extending to the collector layer.3. The vertical bipolar junction transistor of claim 1 , wherein the base layer is self-aligned with the drift region.4. The vertical ...

LOW-COST SEMICONDUCTOR DEVICE MANUFACTURING METHOD

Provided are a low-cost semiconductor device manufacturing method and a semiconductor device made using the method. The method includes forming multiple body regions in a semiconductor substrate, forming multiple gate insulating layers and multiple gate electrodes in the body region; implementing a blanket ion implantation in an entire surface of the substrate to form a low concentration doping region (LDD region) in the body region without a mask, forming a spacer at a side wall of the gate electrode, and implementing a high concentration ion implantation to form a high concentration source region and a high concentration drain region around the LDD region. According to the examples, devices have favorable electrical characteristics and at the same time, manufacturing costs are reduced. Since, when forming high concentration source region and drain regions, tilt and rotation co-implants are applied, an LDD masking step is potentially omitted. 1. A method of manufacturing a semiconductor device , the method comprising:preparing a first region and a second region in a semiconductor substrate;forming a first body region having a high concentration of dopant in the first region to form a high-threshold voltage device;forming a second body region having a low concentration of dopant in the second region to form a low-threshold voltage device;forming a gate electrode over the first body region and the second body region;blanket implanting dopants of a second conductivity type into the first body and second body region to form low-doped drain (LDD) regions;forming a spacer next to the gate electrode; andsource-drain implanting a second conductivity type of dopant to form a low-resistance source/drain region and low-doped extension that extends under the spacer,wherein the source-drain implantation comprises tilted and rotated implantation, andwherein the blanket implantation and the source-drain implantation are sufficient to compensate for enough of the first body region ...

Coil component and method of manufacturing the same

A coil component includes a magnetic body and a coil portion embedded in the magnetic body. The coil portion includes an internal insulating layer, coil patterns disposed on opposite surfaces of the internal insulating layer, an insulating wall disposed between turns of a coil pattern, an external insulating layer disposed on the insulating wall and the coil pattern, and a connection portion including a first conductive layer and a second conductive layer having a melting point lower than a melting point of the first conductive layer, and penetrating through the internal insulating layer to connect the coil patterns disposed on the opposite surfaces of the internal insulating layer to each other.

LOW-COST SEMICONDUCTOR DEVICE MANUFACTURING METHOD

Provided are a low-cost semiconductor device manufacturing method and a semiconductor device made using the method. The method includes forming multiple body regions in a semiconductor substrate, forming multiple gate insulating layers and multiple gate electrodes in the body region; implementing a blanket ion implantation in an entire surface of the substrate to form a low concentration doping region (LDD region) in the body region without a mask, forming a spacer at a side wall of the gate electrode, and implementing a high concentration ion implantation to form a high concentration source region and a high concentration drain region around the LDD region. According to the examples, devices have favorable electrical characteristics and at the same time, manufacturing costs are reduced. Since, when forming high concentration source region and drain regions, tilt and rotation co-implants are applied, an LDD masking step is potentially omitted. 1. A semiconductor structure , comprising:a first region and a second region in a semiconductor substrate;a lateral double diffused metal-oxide-silicon (LDMOS) device situated in the first region;a first buried layer having a second conductivity formed in the first region;a second buried layer having a first conductivity formed on the first buried layer;a drift region having the second conductivity formed on the second buried layer;a first body region of high concentration formed adjacent to the drift region;a first gate electrode formed over the drift region and the first body region;a spacer formed next to the gate electrode;a low resistance source region and a low-doped extension formed extending under the spacer;a body contact region having the first conductivity formed in the first body region;a low-resistance drain region spaced apart from the source region;a channel region formed in the first body region between the source region and the drain region; anda low resistance link between the source and drain regions and the ...

Absorptive Polarizer and Production Method Therefor

The present invention relates to an absorptive polarizer and a method for manufacturing the same, and more particularly, to an absorptive polarizer which includes a nano-composite layer in which nanoparticles including a light absorptive element or an oxide or compound thereof are selectively contained in a block copolymer having a first block and a second block which are separately aligned therein, thereby exhibiting excellent durability even when it is exposed under hot and humid environments for a long time, and having polarization degree and transmittance substantially equal to or greater than those of any typical absorptive polarizer manufactured through drawing, as well as a method of easily preparing such an absorptive polarizer as described above at low production costs. 1. An absorptive polarizer , comprising:a nano-composite layer in which nanoparticles including a light absorptive element or an oxide or compound thereof are selectively contained in a block copolymer having a first block and a second block which are separately aligned therein.2. The polarizer according to claim 1 , wherein the nanoparticles are subjected to surface treatment so as to have affinity with the first block or the second block.3. The polarizer according to claim 2 , wherein the nanoparticles have an average diameter of 1 to 100 nm.4. The polarizer according to claim 3 , wherein the light absorptive element or an oxide or compound thereof is at least one selected from a group consisting of Ag claim 3 , Au claim 3 , Pt claim 3 , Ti claim 3 , Fe claim 3 , Co claim 3 , Cr claim 3 , Cu claim 3 , Ni claim 3 , Zn claim 3 , Mn claim 3 , Cd claim 3 , W claim 3 , Al claim 3 , Pb claim 3 , Ga claim 3 , Si claim 3 , AS claim 3 , FeO claim 3 , FeO claim 3 , CrO claim 3 , SiO claim 3 , AlO claim 3 , TiO claim 3 , PbS claim 3 , FeS claim 3 , ZnS claim 3 , GaP claim 3 , GaAs claim 3 , InP claim 3 , InAs claim 3 , InSb and CdSe.5. The polarizer according to claim 1 , wherein the nanoparticles ...

PREPARING METHOD OF POLYOLEFIN RESIN MONO CHIP AND POLYOLEFIN RESIN MONO CHIP

The present invention relates to a preparing method of a polyolefin resin mono chip including: forming a thermoplastic resin composite by impregnating a fiber reinforcing agent having a length of 5 mm to 20 mm into a molten mixture including a propylene homopolymer of which a molecular weight distribution is 3 to 6, and a colorant, wherein a cooling speed at room temperature of the thermoplastic resin composite is 19° C./min or more. 1. A preparing method of a polyolefin resin mono chip comprising:forming a thermoplastic resin composite by impregnating a fiber reinforcing agent having a length of 5 mm to 20 mm into a molten mixture including a propylene homopolymer of which a molecular weight distribution is 3 to 6, and a colorant, {'br': None, 'i': T', '−T', 't', '−t, 'sub': c1', 'c2', 'c2', 'c1, 'Cooling speed(° C./min)=()/()\u2003\u2003[Equation 1]'}, 'wherein a cooling speed at room temperature of the thermoplastic resin composite obtained by Equation (1) below is 19° C./min or more.'}in Equation 1 above,{'sub': 'c1', 'Tis a temperature at which crystallization starts, measured by DSC,'}{'sub': 'c2', 'Tis a temperature at a time point at which the crystallization has been completed, measured by DSC,'}{'sub': 'c1', 'tis a time at which the crystallization starts, measured by DSC, and'}{'sub': 'c2', 'tis a time at which the crystallization has been completed, measured by DSC.'}2. The preparing method of claim 1 , further comprising:pelletizing the thermoplastic resin composite.3. A polyolefin resin mono chip comprising:a thermoplastic resin composite including a polymer substrate including a propylene homopolymer of which a molecular weight distribution is 3 to 6, and a colorant; and a fiber reinforcing agent having a length of 5 mm to 20 mm and impregnated into the polymer substrate,wherein an impact strength measured according to ASTM D256 is 200 J/m or more.4. The polyolefin resin mono chip of claim 3 , wherein:a melt index of the propylene homopolymer ( ...

POLYOLEFIN RESIN MOLDED PRODUCT, METHOD FOR PREPARING THE SAME, AND AIR DUCT USING THE SAME

A polyolefin resin molded product includes a base which comprises at least one kind of polypropylene resin having a crystallization temperature of 112° C. to 150° C.; low density polyethylene; an inorganic filler; and an olefin polymer comprising 2 wt % to 10 wt % of a reactive functional group bonded to a main chain or an end thereof and having a diameter of 0.5 μm to 200 μm. The base has foam cells having an average diameter of 20 μm to 50 μm are distributed on thereon. 1. A polyolefin resin molded product comprising a base:which comprises at least one kind of polypropylene resin having a crystallization temperature of 112° C. to 150° C.;low density polyethylene;an inorganic filler; andan olefin polymer comprising 2 wt % to 10 wt % of a reactive functional group bonded to a main chain or an thereof and having a diameter of 0.5 μm to 200 μm,wherein the base includes foam cells having an average diameter of 20 μm to 50 μm distributed thereon.2. The polyolefin resin molded product according to claim 1 ,wherein the polypropylene resin comprises at least one kind of polypropylene resin having a crystallization temperature of 125° C. to 150° C.3. The polyolefin resin molded product according to claim 2 ,wherein the polypropylene resin further comprises at least one kind of polypropylene resin having a crystallization temperature of 112° C. or more and less than 125° C.4. The polyolefin resin molded product according to claim 3 ,wherein a weight ratio of the polypropylene resin having the crystallization temperature of 112° C. or more and less than 125° C. to the polypropylene resin having the crystallization temperature of 125° C. to 150° C. is 1.5:1 to 10:1.5. The polyolefin resin molded product according to claim 1 ,wherein the polypropylene resin includes at least one selected from the group consisting of a propylene homopolymer, a copolymer of propylene and ethylene, a copolymer of propylene and C4-10 olefin monomer, and a block copolymer of polypropylene and ...

POLARIZING PLATE AND LIQUID CRYSTAL DISPLAY INCLUDING SAME

Disclosed are a polarizing plate and a liquid crystal display device comprising the same. The polarizing plate comprises a protective film having a primer layer provided on one surface thereof; and a polarizer adhered to the primer layer through a photo-curable adhesive layer formed on the primer layer, thereby it shows superior adhesion between the polarizer and the protective film with excellent durability, while it does not need hydrophilic surface treatment in order to adhere the polarizer to the primer layer. 1. A polarizing plate , comprising:a protective film having a primer layer provided on one surface thereof; anda polarizer adhered to the primer layer through a photo-curable adhesive layer formed on the primer layer.2. The polarizing plate according to claim 1 , wherein the primer layer is formed by application of a composition for forming a primer layer including a water-based resin.3. The polarizing plate according to claim 2 , wherein the water-based resin is a water-based urethane resin prepared by reacting a compound having at least one active hydrogen in a molecule with a multivalent isocyanate compound.4. The polarizing plate according to claim 3 , wherein the compound having at least one active hydrogen in a molecule is at least one selected from a group consisting of a low molecular weight diol compound claim 3 , a polyetherdiol compound claim 3 , a polyesterdiol compound claim 3 , a polyetheresterdiol compound and a polycarbonatediol compound.5. The polarizing plate according to claim 3 , wherein the multivalent isocyanate compound is at least one selected from a group of consisting of an aliphatic diisocyanate compound claim 3 , an alicyclic diisocyanate compound and an aromatic isocyanate compound.6. The polarizing plate according to claim 1 , wherein the photo-curable adhesive layer is formed by application of a photo-curable adhesive composition including a cationically polymerizable compound claim 1 , a photo-polymerization initiator and a ...

ELECTROLESS SURFACE TREATMENT PLATED LAYERS OF PRINTED CIRCUIT BOARD AND METHOD FOR PREPARING THE SAME

An electroless surface treatment plated layer of a printed circuit board, a method for preparing the same, and printed circuit board including the same. The electroless surface treatment plated layer includes: electroless nickel (Ni) plated coating/palladium (Pd) plated coating/gold (Au) plated coating, wherein the electroless nickel, palladium, and gold plated coatings have thicknesses of 0.02 to 1 μm, 0.01 to 0.3 μm, and 0.01 to 0.5 μm, respectively. In the electroless surface treatment plated layer of the printed circuit board, a thickness of the nickel plated coating is specially minimized to 0.02 to 1 μm, thereby making it possible to form an optimized electroless Ni/Pd/Au surface treatment plated layer. 1. An electroless surface treatment plated layer of an electroless printed circuit board , the electroless surface treatment plated layer comprising:nickel (Ni) plated coating, palladium (Pd) plated coating, gold (Au) plated coating,wherein each of the nickel, palladium, and gold plated coatings has a thickness of 0.02 to 1 μm, 0.01 to 0.3 μm, and 0.01 to 0.5 μm.2. The electroless surface treatment plated layer according to claim 1 , wherein it is connected to external devices in a wire bonding scheme.3. The electroless surface treatment plated layer according to claim 1 , wherein 8 wt % or more of phosphorus (P) is contained in the electroless nickel plated coating.4. The electroless surface treatment plated layer according to claim 3 , wherein the phosphorus (P) is to prevent oxidation of the electroless nickel plated coating.5. A printed circuit board comprising the electroless surface treatment plated layer according to .6. The printed circuit board according to claim 5 , wherein even though a frequency band increases claim 5 , an electrical resistance value of the electroless surface treatment plated layer does not increase.7. The printed circuit board according to claim 5 , wherein plated layers formed as the electroless surface treatment plated layer of ...

Carbon fiber reinforced polypropylene resin composition with excellent molding property

The present invention provides a carbon fiber reinforced polypropylene resin composition with improved molding property. In particular, provided is a carbon fiber reinforced polypropylene resin composition with significantly improved molding property, tensile strength, flexural strength and the like by adding a modified polypropylene grafted with maleic anhydride as a compatibilizer to a polypropylene resin to reinforce the carbon fiber.

Polarizing plate and method for preparing the same

Electrode pad, printed circuit board with an electrode pad and method of making a printed circuit board

Es wird ein Elektrodenpad vorgeschlagen, umfassend: einen Verbindungsanschluss; eine erste galvanisierte Schicht umfassend Palladiumphosphor (Pd-P), gebildet auf dem Verbindungsanschluss; und eine zweite galvanisierte Schicht umfassend Palladium (Pd), gebildet auf der ersten galvanisierten Schicht. An electrode pad is proposed, comprising: a connection terminal; a first galvanized layer comprising palladium phosphor (Pd-P) formed on the connection terminal; and a second galvanized layer comprising palladium (Pd) formed on the first galvanized layer.

Carrier for manufacturing substrate and method of manufacturing substrate using the same

Disclosed herein is a carrier for manufacturing a substrate, including: two insulation layers, each being provided on one side thereof with a first metal layer and on the other side thereof with a second metal layer; and a third metal layer having a lower melting point than the first metal layer and formed between the two first metal layers respectively formed on the two insulation layers such that the two first metal layers are attached to each other. The carrier is advantageous in that the carrier can be separated by heating the third metal layer, so that the size of a substrate does not change at the time of separating the carrier, thereby maintaining the compatibility between a substrate and manufacturing facilities.

Light emitting display device and manufacturing method thereof

A display device includes a substrate including a display area and a non-display area adjacent to the display area; a lower pad electrode on the substrate in the non-display area; a planarization layer overlapping the lower electrode; an upper pad electrode on the lower pad electrode and overlapping at least a portion of the lower planarization layer. The planarization layer includes an opening exposing an upper surface of the lower pad electrode, the lower pad electrode and the upper pad electrode are electrically connected to each other through the opening, the lower planarization layer includes an exposed portion exposing an upper surface of the lower planarization layer, and an overlapping portion overlapping at least a portion of the upper pad electrode, and a height of the upper surface of the exposed portion is lower than a height of an upper surface of the overlapping portion.

Optical modulation device, optical device including the same, and driving method thereof

A method for driving an optical modulation device is provided. The optical modulation device includes first and second portions. Each of the first and second portions includes a first plate, a second plate opposite to the first plate, and a liquid crystal layer disposed between the first and second plates. The method includes forming a forward phase gradient in the first portion by applying a first driving signal to first and second electrodes in the first plate of the first portion and a third electrode in the second plate of the first portion. The method further includes forming a reverse phase gradient in the second portion by applying a second driving signal differing from the first driving signal to fourth and fifth electrodes in the first plate of the second portion and a sixth electrode in the second plate of the second portion.

Carrier for manufacturing substrate and method of manufacturing substrate using the same

Disclosed herein is a carrier for manufacturing a substrate, including: an insulation layer including a first metal layer formed on one side or both sides thereof; a second metal layer formed on one side of the first metal layer; and a third metal layer formed on one side of the second metal layer, wherein the second metal layer has a lower melting point than the first metal layer or the third metal layer. The carrier is advantageous in that a build up layer can be separated from a carrier by heating, so that a routing process is not required, with the result that the size of a substrate does not change when the build up layer is separated from the carrier, thereby reusing to the carrier and maintaining the compatibility between the substrate and manufacturing facilities.

Display device

A display device according to an exemplary embodiment includes: a substrate including a display area and a transmission area; a metal blocking layer disposed in the display area of the substrate; an inorganic insulating layer disposed on the metal blocking film; a transistor disposed on the inorganic insulating layer; an emission layer connected to the transistor; and a light blocking layer and a color filter disposed on the emission layer of the display area, wherein the edge of the light blocking layer is protruded toward the transmission area more than the edge of the metal blocking layer.

Light emitting display device and manufacturing method thereof

A light emitting display device includes a substrate, an organic layer, a conductor, an anode, and a pixel definition layer. The organic layer overlaps the substrate and has a connection opening. The conductor is positioned between the substrate and the organic layer. The anode is positioned on the organic layer and is partially positioned inside the connection opening. The pixel definition layer exposes an exposed portion of the anode. The organic layer has a halftone exposure portion and a neighboring portion. The halftone exposure portion overlaps the exposed portion of the anode and overlaps the conductor. The neighboring portion neighbors the halftone exposure portion. A face of the halftone exposure portion and a face of the neighboring portion are spaced from the substrate by a first distance and a second distance, respectively. A difference between the first distance and the second distance is 30 nm or less.

Light emitting display device

A light emitting display device includes: a display area; a first component area positioned within the display area and that includes a plurality of pixels, each pixel of the plurality of pixels respectively includes a pixel circuit part, and the first component area further includes a first photosensor area and a second photosensor area between the plurality of pixels. The first photosensor area includes: a first sub-photosensor area positioned between adjacent pixel circuit parts; and a light blocking layer positioned on a front surface of the first sub-photosensor area and that includes an opening that overlaps the first sub-photosensor area on a plane. The second photosensor area includes: a second sub-photosensor area positioned between the adjacent pixel circuit parts; and the light blocking layer positioned on a front surface of the second sub-photosensor area and that overlaps the second sub-photosensor area.

Efficient quantum modular multiplier and quantum modular multiplication method

Provided are an efficient quantum modular multiplier using characteristics of a modular operation, that is, a quantum modular multiplier having low quantum circuit complexity, and a quantum modular multiplication method. A quantum modular multiplier according to one embodiment of the present invention is a quantum modular multiplier for multiplying first qubits having N digits by second qubits having N digits (N is a natural number that is greater than or equal to 2) and includes a first auxiliary register setting unit, a second auxiliary register setting unit, an addition unit, and an auxiliary register initialization unit.

複合位相差板、これを含む複合偏光板及びこれらの製造方法

【課題】本発明は、フィルム上にコーティングを形成する方法などによって簡単に製造することができる複合位相差板及びその製造方法を提供することを目的とする。 【解決手段】本発明は、複合位相差板、これを含む複合偏光板及びこれらの製造方法に関するものであって、高分子基材フィルム上に形成された液晶コーティング層の一面にコロナまたはプラズマ処理を施して接合力を向上させた後、その上に直に表面処理コーティング層を形成させることにより、ガラス基材などを使用せずに簡単な工程により製造することができるのみならず、機能性層の付加のための別途の基材及び接着剤層が不要であり、薄型ディスプレイ用のリターダとしての使用に適した複合位相差板、これを含む複合偏光板、及びこれらの製造方法に関するものである。 【選択図】図１

印刷電路板及其製造方法

依照本發明的一種印刷電路板，包括：一絕緣層；一金屬墊，形成於絕緣層上；一表面處理層，形成於金屬墊上；一焊料層，形成於表面處理層與絕緣層上；以及一介金屬化合物層，形成於焊料層與表面處理層之間。 此外，依照本發明的一種印刷電路板，包括：一絕緣層；一金屬晶種層，形成於絕緣層上；一金屬墊，形成於金屬晶種層上；一表面處理層，形成於金屬墊與金屬晶種層上；一焊料層，形成於金屬墊之表面處理層與金屬晶種層之表面處理層上；以及一介金屬化合物層，形成於焊料層與表面處理層之間。

コイル部品及びその製造方法

【課題】コイルパターンの高さは維持しながらも、コイル部全体の厚さを減少させることができるコイル部品を提供する。【解決手段】本発明のコイル部品は、磁性体部１００及び磁性体部１００の内部に埋設されたコイル部２００を含む。コイル部２００は、内部絶縁層１０と、内部絶縁層１０の両面に配置されたコイルパターン２１、２２と、コイルパターン２１、２２の各ターン（ｔｕｒｎ）の間に配置される絶縁壁３１、３２と、絶縁壁３１、３２及びコイルパターン２１、２２上に配置される外部絶縁層４１、４２と、第１導電層及び第１導電層の融点よりも低い融点の第２導電層を含み、内部絶縁層１０の両面に配置されたコイルパターン２１、２２を互いに連結するように内部絶縁層１０を貫通する連結部５０と、を含む。【選択図】図２

Particle measuring device

A particle measuring device includes a probe including a nozzle spraying a gas on a surface of an object and an inlet inhaling the gas and particles scattered from the surface by the gas; a main pipe including an inflow hole through which the gas flows and a discharge hole through which the gas is discharged; a first manifold provided to connect the main pipe to the nozzle, and supplying the gas to the nozzle; a second manifold provided to connect the main pipe to the inlet between a connecting portion of the first manifold and the discharge hole, and supplying the particles and the gas to the main pipe; a third manifold branched from the second manifold and supplying the particles and the gas; and a particle counter connected to the third manifold, and counting the particles included in the gas supplied through the third manifold.

Battery case and motor vehicle comprising same

Display device

A display device according to an exemplary embodiment includes: a substrate including a display area and a transmission area; a metal blocking layer disposed in the display area of the substrate; an inorganic insulating layer disposed on the metal blocking film; a transistor disposed on the inorganic insulating layer; an emission layer connected to the transistor; and a light blocking layer and a color filter disposed on the emission layer of the display area, wherein the edge of the light blocking layer is protruded toward the transmission area more than the edge of the metal blocking layer.

Composite retardation plate, composite polarizing plate comprising the same and preparation methods for those

High Temperature Polymer Electrolyte Membrane Fuel Cell and Method for Manufacturing Same

An embodiment fuel cell including a high temperature polymer electrolyte membrane includes an electrolyte membrane including a phosphoric acid-doped polymer of intrinsic microporosity, a cathode disposed on a first surface of the electrolyte membrane, and an anode disposed on a second surface of the electrolyte membrane, the second surface opposite the first surface.

Carrier for manufacturing substrate and method of manufacturing substrate using the same

Disclosed herein is a carrier for manufacturing a substrate, including: an insulation layer including a first metal layer formed on one side or both sides thereof; a second metal layer formed on one side of the first metal layer; and a third metal layer formed on one side of the second metal layer, wherein the second metal layer has a lower melting point than the first metal layer or the third metal layer. The carrier is advantageous in that a build up layer can be separated from a carrier by heating, so that a routing process is not required, with the result that the size of a substrate does not change when the build up layer is separated from the carrier, thereby reusing the carrier and maintaining the compatibility between the substrate and manufacturing facilities.

基板製造用キャリア部材及びこれを用いた基板の製造方法

【課題】加熱によって、キャリア部材からビルドアップ層を分離して、ルーティング工程を不要にし、キャリア部材の分離の際、基板のサイズを変更しなくてキャリア部材を再使用することができ、基板と製造設備の間に互換性を維持する基板製造用キャリア部材及びこれを用いた基板の製造方法を提供する。 【解決手段】片面または両面に第１金属層１１０が積層された絶縁層１００、第１金属層１１０の一面に形成された第２金属層１２０、及び第２金属層１２０の一面に形成された第３金属層１３０を含み、第２金属層１２０の融点は、第１金属層１１０の融点及び第３金属層１３０の融点より低い。 【選択図】図２

Carrier for manufacturing substrate and method of manufacturing substrate using the same

Light emitting display device and manufacturing method thereof

Method for preparing polyolefin resin composition and polyolefin resin composition

The present invention relates to a method for preparing a polyolefin resin composition including the step of mixing a first resin chip including a first polyolefin resin and glass filaments and a second resin chip including a second polyolefin resin and an aerogel or glass bubbles, a polyolefin resin composition including a first resin chip including a first polyolefin resin and glass filaments and a second resin chip including a second polyolefin resin and an aerogel or glass bubbles, and a polyolefin resin molded article including an extrusion molded article of the polyolefin resin composition.

Optical modulation device including liquid crystals, a driving method thereof, and an optical display device using the same

An optical modulation device is provided. The optical modulation device includes first and second plates facing each other, a liquid crystal layer interposed between the first and second plates, and first and second electrodes. The liquid crystal layer includes a plurality of liquid crystal molecules. The first plate includes a first aligner. The second plate includes a second aligner. A first alignment direction of the first aligner and a second alignment direction of the second aligner are substantially parallel to each other. The first and second electrodes extend to cross each other. The first and second electrodes are insulated from each other. The second electrode extends to cross the second alignment direction. An angle θP formed between a vertical axis of the second alignment direction and an extending direction of the second electrode is a value between 5° and 45°.

Polyolefin resin molded product, method for preparing the same, and air duct using the same

A polyolefin resin molded product includes a base which comprises at least one kind of polypropylene resin having a crystallization temperature of 112° C. to 150° C.; low density polyethylene; an inorganic filler; and an olefin polymer comprising 2 wt % to 10 wt % of a reactive functional group bonded to a main chain or an end thereof and having a diameter of 0.5 μm to 200 μm. The base has foam cells having an average diameter of 20 μm to 50 μm are distributed on thereon.

Display device

A display device according to an exemplary embodiment of the present invention includes: a display panel including a plurality of pixels respectively displaying a first color, a second color, and a third color; and a signal controller controlling the display panel by processing an input image signal, wherein, in a color weakness mode, at least one color among the first to third colors is displayed with a higher gray than an input gray of the input image signal, and the other colors are displayed with the same gray as the input gray of the input image signal.

Electroless surface treatment plated layers of printed circuit board and method for preparing the same

An electroless surface treatment plated layer of a printed circuit board, a method for preparing the same, and printed circuit board including the same. The electroless surface treatment plated layer includes: electroless nickel (Ni) plated coating/palladium (Pd) plated coating/gold (Au) plated coating, wherein the electroless nickel, palladium, and gold plated coatings have thicknesses of 0.02 to 1 μm, 0.01 to 0.3 μm, and 0.01 to 0.5 μm, respectively. In the electroless surface treatment plated layer of the printed circuit board, a thickness of the nickel plated coating is specially minimized to 0.02 to 1 μm, thereby making it possible to form an optimized electroless Ni/Pd/Au surface treatment plated layer.

Low-cost semiconductor device manufacturing method

Provided are a low-cost semiconductor device manufacturing method and a semiconductor device made using the method. The method includes forming multiple body regions in a semiconductor substrate, forming multiple gate insulating layers and multiple gate electrodes in the body region; implementing a blanket ion implantation in an entire surface of the substrate to form a low concentration doping region (LDD region) in the body region without a mask, forming a spacer at a side wall of the gate electrode, and implementing a high concentration ion implantation to form a high concentration source region and a high concentration drain region around the LDD region. According to the examples, devices have favorable electrical characteristics and at the same time, manufacturing costs are reduced. Since, when forming high concentration source region and drain regions, tilt and rotation co-implants are applied, an LDD masking step is potentially omitted.

Vertical bipolar junction transistor and manufacturing method thereof

The present disclosure relates to a vertical bipolar junction transistor. A vertical bipolar junction transistor includes a high concentration doping region emitter terminal disposed on a semiconductor substrate; a high concentration doping region collector terminal disposed on a semiconductor substrate; a high concentration doping region base terminal disposed between the emitter terminal and the collector terminal; a drift region having a first doping concentration surrounding the emitter terminal and being deeper than either the base terminal or the collector terminal; a base layer disposed below the drift region; a collector layer in contact with the base layer, the collector layer having a second doping concentration higher than the first doping concentration. The manufacturing cost of the vertical bipolar junction transistor can be lowered and a current gain can be elevated using a low-cost BCD process.