GENERIC UNPACKING OF APPLICATIONS FOR MALWARE DETECTION

A technique for detecting malware in an executable allows unpacking of a packed executable before determining whether the executable is malware. In systems with hardware assisted virtualization, hardware virtualization features may be used to iteratively unpack a packed executable in a controlled manner without needing knowledge of a packing technique. Once the executable is completely unpacked, malware detection techniques, such as signature scanning, may be employed to determine whether the executable contains malware. Hardware assisted virtualization may be used to facilitate the scanning of the run-time executable in memory. 1. A non-transitory computer-readable medium on which is stored software for unpacking a self-extracting executable , comprising instructions that when executed cause one or more processing units to:load a self-extracting executable into memory, the self-extracting executable comprising a first unpacking stub and a packed executable;allow the first unpacking stub to unpack the packed executable into an unpacked executable;detect an attempt to write to a memory page in which code was previously executed, by controlling memory page access permissions using hardware assisted virtualization;detect completion of unpacking the packed executable by the first unpacking stub using one or more heuristics; andscan the unpacked executable for malware, 'determining whether a write to a memory page that generates a page write exception is a write to a last page of a section of memory pages.', 'wherein the one or more heuristics comprise2. The non-transitory computer-readable medium of claim 1 ,wherein the packed executable is an iteratively packed executable comprising one or more intermediate self-extracting executables, allow the first unpacking stub to unpack the packed executable into one of the one or more intermediate self-extracting executables; and', 'allow the one of the one or more intermediate self-extracting executables to unpack successively ...

Managing an electronic mail in a communication network

A method, a system, and a computer program product for managing an electronic mail in a communication network. Recursive parameters are provided in a command list of a communication protocol associated with the electronic mail. The command list is partitioned into of command sub-lists using the recursive parameters.

Generic unpacking of applications for malware detection

A technique for detecting malware in an executable allows unpacking of a packed executable before determining whether the executable is malware. In systems with hardware assisted virtualization, hardware virtualization features may be used to iteratively unpack a packed executable in a controlled manner without needing knowledge of a packing technique. Once the executable is completely unpacked, malware detection techniques, such as signature scanning, may be employed to determine whether the executable contains malware. Hardware assisted virtualization may be used to facilitate the scanning of the run-time executable in memory.

MANAGING AN ELECTRONIC MAIL IN A COMMUNICATION NETWORK

A method for managing an electronic mail. A command list of a communication electronic mail transmission protocol is partitioned into command sub-lists using recursive parameters appearing in the command list prior to the partitioning of the command list. Each recursive parameter is a command that is repeated in respective command sub-lists as a result of the partitioning. Each command sub-list includes at least one command pertaining to a receiver or sender of the electronic mail. Each command sub-list is individually selectable for subsequent use of the at least one command in a subsequently selected command sub-list in implementing the electronic mail. A selection of at least one of the command sub-lists viewable in a user interface is received. Each command of the at least one command specifies a respective aspect of how to implement the electronic mail in a subsequent implementation of the electronic mail. 1. A method for managing an electronic mail , said method comprising: partitioning, by a processor of the computer system, a SMTP command list of a communication SMTP electronic mail transmission protocol associated with the electronic mail into a plurality of command sub-lists using a plurality of recursive parameters appearing in the SMTP command list prior to said partitioning, wherein each recursive parameter is a formal standard SMTP command that is repeated in respective command sub-lists as a result of said partitioning, wherein all command sub-lists of the plurality of command sub-lists are viewable simultaneously in a user interface of the computer system, wherein each command sub-list in the user interface comprises at least one command pertaining to a receiver or sender of the electronic mail, and wherein each command sub-list in the user interface is individually selectable, via the user interface, for subsequent use of the at least one command in a subsequently selected command sub-list in implementing the electronic mail; and', 'said processor ...

Generic unpacking of applications for malware detection

A technique for detecting malware in an executable allows unpacking of a packed executable before determining whether the executable is malware. In systems with hardware assisted virtualization, hardware virtualization features may be used to iteratively unpack a packed executable in a controlled manner without needing knowledge of a packing technique. Once the executable is completely unpacked, malware detection techniques, such as signature scanning, may be employed to determine whether the executable contains malware. Hardware assisted virtualization may be used to facilitate the scanning of the run-time executable in memory.

SYSTEMS AND METHODS FOR CELL CHANGE BASED ON TARGET CELL PERFORMANCE

Systems and methods for a cell change based on target cell performance are disclosed. In some embodiments, a method of operation of a network node in a cellular communications network comprises receiving a measurement report from a wireless device having a serving cell, the measurement report comprising an indication that another cell is better than the serving cell such that the other cell is identified as a target cell for a cell change and the serving cell is identified as a source cell for the cell change. The method further comprises determining whether to perform the cell change from the source cell to the target cell based on one or more parameters indicative of a performance of the target cell. The method further comprises performing the cell change upon determining that the cell change from the source cell to the target cell should be performed. 1. A method of operation of a network node in a cellular communications network , comprising:receiving a measurement report from a wireless device having a serving cell, the measurement report comprising an indication that another cell is better than the serving cell such that the other cell is identified as a target cell for a cell change and the serving cell is identified as a source cell for the cell change; an average number of active wireless devices in the target cell as compared to an average number of active wireless devices in the source cell; and', 'an average wireless device throughput in the target cell as compared to an average wireless device throughput in the source cell; and, 'determining whether to perform the cell change from the source cell to the target cell based on at least one ofperforming the cell change from the source cell to the target cell upon determining that the cell change from the source cell to the target cell should be performed.2. The method of wherein the cellular communications network is a High-Speed Download Packet Access claim 1 , HSDPA claim 1 , network claim 1 , the network ...

MANAGING AN ELECTRONIC MAIL IN A COMMUNICATION NETWORK

A method, a system, and a computer program product for managing an electronic mail in a communication network. Recursive parameters are provided in a command list of a communication protocol associated with the electronic mail. The command list is partitioned into of command sub-lists using the recursive parameters. 1. A method for managing an electronic mail in a communication network , said method comprising:providing a plurality of recursive parameters in a command list of a communication protocol associated with the electronic mail; andpartitioning, by a processor of a computer system, the command list into a plurality of command sub-lists using the plurality of recursive parameters.2. The method of claim 1 , said method further comprising:receiving a selection of at least one command sub-list of the plurality of command sub-lists; andidentifying at least one property corresponding to each selected command sub-list.3. The method of claim 2 , wherein said receiving the selection of the at least one command sub-list comprises receiving the selection of the at least one command sub-list via a graphical user interface.4. The method of claim 2 , wherein the at least one property corresponding to each selected command sub-list is selected from the group consisting of a cipher claim 2 , an encryption key claim 2 , a digital signature claim 2 , a return receipt claim 2 , a priority claim 2 , a confidentiality claim 2 , a mood stamp claim 2 , and combinations thereof.5. The method of claim 1 , wherein at least one recursive parameter of the plurality of recursive parameters is a DATA parameter specifying information of the electronic mail.6. The method of claim 1 , said method further comprising:preserving one or more properties corresponding to each command sub-list of the plurality of command sub-lists.7. The method of claim 1 , wherein the electronic mail is from a current sender to a receiver claim 1 , and wherein each command sub-list consists of at least one text ...

Software drive dynamic memory allocation and address mapping for disaggregated memory pool

The apparatus of a disaggregated memory architecture (DMA) including a shared memory and multiple nodes is programmable by a primary node of the DMA. The primary node executes a programming agent to, prior to memory access requests to access the shared memory, cause a programming of register entries of one or more registers of a memory pooling circuitry (MPC) with information to be used by a decoder of the MPC to translate host physical addresses (HPA) of memory access requests of the nodes to local memory addresses (LMAs). The LMAs are to be processed by one or more memory controllers (MCs) coupled to the one or more registers based on MC memory regions in each of the one or more MCs, the MC memory regions having a predetermined memory size granularity. At least some of the LMAs map to non-contiguous memory regions of the shared memory and of the one or more MCs.

APPARATUSES, METHODS, AND SYSTEMS FOR INSTRUCTIONS TO COMPARTMENTALIZE CODE

Systems, methods, and apparatuses relating to instructions to compartmentalize memory accesses and execution (e.g., non-speculative and speculative) are described. In one embodiment, a compartment manager circuit is to determine, when a compartment control register of a hardware processor core is set to an enable value, that a first subset of code requested for execution on the hardware processor core in user privilege is within a first compartment of memory, load a first compartment descriptor for the first compartment into one or more registers of the hardware processor core from the memory, check if the first compartment is marked in the first compartment descriptor, within the one or more registers of the hardware processor core, as a management compartment, and, when the first compartment is marked in the first compartment descriptor as the management compartment, allowing the first subset of the code within the first compartment to load a second compartment descriptor for a second compartment of the memory into the one or more registers of the hardware processor core from the memory, switching execution from the first subset of code within the first compartment to a second subset of code in user privilege within the second compartment, allowing speculative memory accesses for the second subset of code only within the second compartment, and preventing a memory access outside of the second compartment for the second subset of code as indicated by the second compartment descriptor stored within the one or more registers of the hardware processor core. 120.-. (canceled)21. A hardware processor comprising: determine, when a compartment control register of a processor core is set to an enable value, that a first subset of code requested for execution on the processor core in user privilege is within a first compartment of memory,', 'load a first compartment descriptor for the first compartment into one or more registers of the processor core from the memory, and', ...

Non-pertubative measurements of low and null magnetic field in high temperature plasmas

Systems and methods that facilitate non-pertubative measurements of low and null magnetic field in high temperature plasmas.

NON-PERTUBATIVE MEASUREMENTS OF LOW AND NULL MAGNETIC FIELD IN HIGH TEMPERATURE PLASMAS

Systems and methods that facilitate non-pertubative measurements of low and null magnetic field in high temperature plasmas. 1. A non-perturbative method of measuring magnetic fields in high-temperature plasmas , comprising:radially injecting a first plurality of laser beams into an FRC plasma, wherein each of the laser beams has a different polarization,intersecting a null location in a FRC magnetic field of the FRC plasma at two locations;imaging paths of the first plurality of laser beams in a vertical direction of a CCD;splitting light in the vertical direction is further split in orthogonal polarizations using a birefringent crystal; andmeasuring the null location of the FRC magnetic field.2. The method of claim 1 , further comprising:axially injecting a laser beam into the FRC magnetic field;illuminating each of two X-points of the FRC magnetic field; andmeasuring a distance between the two X-points to produce a length of the FRC magnetic field.3. The method of claim 1 , further comprising:radially injecting a second plurality of lasers into the FRC magnetic field;illuminating each of two X-points of the FRC magnetic field; andmeasuring a distance between the two X-points to produce a length of the FRC magnetic field.4. The method of claim 1 , further comprising:providing locations of the null location of the FRC magnetic field at two points along a diameter of the FRC plasma;calculating, using the locations of the null location, a radius and center of the FRC plasma; andproviding the radius and center to a feedback control system.5. The method of claim 4 , wherein the feedback control system controls a radial location and size of the FRC plasma by controlling the externally applied magnetic field.6. A non-perturbative method of measuring magnetic fields in high-temperature plasmas claim 4 , comprising:imaging a wavelength of an FRC plasma along a horizontal axis direction of a CCD;imaging a radial extent of the FRC plasma along a vertical axis direction of ...

DETECTION OF ANGIOPOIETIN-2 AND THROMBOSPONDIN-2 IN CONNECTION WITH DIAGNOSING ACUTE HEART FAILURE

Methods for detecting angiopoietin-2 (Angpt-2) and/or thrombospondin-2 (Tsp-2) in a sample involve obtaining or having obtained a blood or plasma sample from a subject; and detecting or Angpt-2 and Tsp-2 in the sample. Detecting can involve performing an assay to determine whether the sample includes Angpt-2 and/or Tsp-2 or elevated levels of Angpt-2 and/or Tsp-2. Elevated levels are indicative of acute heart failure. 1. A method for treating a subject , comprising: (i) obtaining or having obtained the blood or plasma sample from the subject;', '(ii) performing or having performed an assay to determine whether the sample includes elevated Angpt-2 and/or Tsp-2; and, '(a) determining whether there is angiopoietin-2 (Angpt-2) and/or thrombospondin-2 (Tsp-2) in a blood or plasma sample from the subject by(b) if there is elevated Angpt-2 and/or Tsp-2 in the sample, then administering treatment for acute heart failure to the subject.2. The method of claim 1 , wherein the subject has dyspnea.3. The method of claim 1 , and further comprising determining that there is elevated Angpt-2 in the sample when the level of Angpt-2 is above about 220 pg/ml and determining that there is elevated Tsp-2 in the sample when the level of Tsp-2 is above about 30 ng/ml.4. The method of claim 1 , and further comprising administering diuretics to the subject.5. The method of claim 1 , and further comprising detecting or having detected natriuretic peptides in the sample.6. A method of diagnosing and treating acute heart failure in a subject claim 1 , said method comprising:(a) obtaining or having obtained a blood or plasma sample from the subject to detect the levels in the sample of one or both of Angpt-2 and Tsp-2;(c) diagnosing the subject with acute heart failure when there is an elevated level of Angpt-2 and/or Tsp-2 in the sample; and(d) administering treatment for acute heart failure to the diagnosed subject.7. The method of claim 6 , wherein the subject has dyspnea.8. The method of ...

HARDWARE APPARATUSES, METHODS, AND SYSTEMS FOR INDIVIDUALLY REVOCABLE CAPABILITIES FOR ENFORCING TEMPORAL MEMORY SAFETY

Systems, methods, and apparatuses relating to circuitry to implement individually revocable capabilities for enforcing temporal memory safety are described. In one embodiment, a hardware processor comprises an execution unit to execute an instruction to request access to a block of memory through a pointer to the block of memory, and a memory controller circuit to allow access to the block of memory when an allocated object tag in the pointer is validated with an allocated object tag in an entry of a capability table in memory that is indexed by an index value in the pointer, wherein the memory controller circuit is to clear the allocated object tag in the capability table when a corresponding object is deallocated. 1. A processor comprising:a decoder circuit to decode an instruction into a decoded instruction, the instruction comprising a pointer to a block of memory and an opcode to indicate an execution circuit is to cause insertion of an entry comprising an allocated object tag into a capability table for the pointer and provide a resultant of an index value for the entry in the capability table;the execution circuit to execute the decoded instruction according to the opcode; anda memory controller circuit to, in response to a request to access the block of memory through the pointer to the block of memory, allow access to the block of memory in response to validation of an allocated object tag in the pointer with the allocated object tag in the entry of the capability table that is indexed by the index value in the pointer.2. The processor of claim 1 , wherein the memory controller circuit is to clear at least the allocated object tag in the capability table in response to deallocation of a corresponding object.3. The processor of claim 1 , wherein the entry in the capability table includes a field that indicates to the memory controller circuit a type of a corresponding object.4. The processor of claim 3 , wherein the memory controller circuit is to cause a ...

HARDWARE APPARATUSES AND METHODS TO SWITCH SHADOW STACK POINTERS

Methods and apparatuses relating to switching of a shadow stack pointer are described. In one embodiment, a hardware processor includes a hardware decode unit to decode an instruction, and a hardware execution unit to execute the instruction to: pop a token for a thread from a shadow stack, wherein the token includes a shadow stack pointer for the thread with at least one least significant bit (LSB) of the shadow stack pointer overwritten with a bit value of an operating mode of the hardware processor for the thread, remove the bit value in the at least one LSB from the token to generate the shadow stack pointer, and set a current shadow stack pointer to the shadow stack pointer from the token when the operating mode from the token matches a current operating mode of the hardware processor. 1. A hardware processor comprising:a hardware decode unit to decode an instruction; and pop a token for a thread from a shadow stack, wherein the token includes a shadow stack pointer for the thread with at least one least significant bit (LSB) of the shadow stack pointer overwritten with a bit value of an operating mode of the hardware processor for the thread,', 'remove the bit value in the at least one LSB from the token to generate the shadow stack pointer, and', 'set a current shadow stack pointer to the shadow stack pointer from the token when the operating mode from the token matches a current operating mode of the hardware processor., 'a hardware execution unit to execute the instruction to2. The hardware processor of claim 1 , wherein the operating mode of the hardware processor is selectable between a first operating mode with a first address size and a second operating mode with a second claim 1 , larger address size claim 1 , and the size of the token is the second claim 1 , larger address size for both of a token for a thread in the first operating mode and a token for a thread in the second operating mode.3. The hardware processor of claim 1 , wherein the hardware ...

METHOD TO MANAGE GUEST ADDRESS SPACE TRUSTED BY VIRTUAL MACHINE MONITOR

A processor comprises a register to store a first reference to a context data structure specifying a virtual machine context, the context data structure comprising a second reference to a target array and an execution unit comprising a logic circuit to execute a virtual machine (VM) based on the virtual machine context, wherein the VM comprises a guest operating system (OS) associated with a page table comprising a first memory address mapping between a guest virtual address (GVA) space and a guest physical address (GPA) space, receive a request by the guest OS to switch from the first memory address mapping to a second memory address mapping, the request comprising an index value and a first root value, retrieve an entry, identified by the index value, from the target array, the entry comprising a second root value, and responsive to determining that the first root value matches the second root value, cause a switch from the first memory address mapping to the second memory address mapping. 1. A processor comprising:a register to store a first reference to a context data structure specifying a virtual machine context, the context data structure comprising a second reference to a target array; and execute a virtual machine (VM) based on the virtual machine context, wherein the VM comprises a guest operating system (OS) associated with a page table comprising a first memory address mapping between a guest virtual address (GVA) space and a guest physical address (GPA) space;', 'receive a request by the guest OS to switch from the first memory address mapping to a second memory address mapping, the request comprising an index value and a first root value;', 'retrieve an entry, identified by the index value, from the target array, the entry comprising a second root value; and', 'responsive to determining that the first root value matches the second root value, cause a switch from the first memory address mapping to the second memory address mapping., 'an execution unit ...

Methods and systems for multimedia data processing

In certain embodiments, methods and systems for multimedia data processing are provided. In an embodiment, a method for processing multimedia data includes defining one or more pixel block regions in a first cache so as to cache a plurality of reference pixel blocks corresponding to reference data. A reference pixel block from among the plurality of reference pixel blocks is assigned to a pixel block region from among the one or more pixel block regions based on a predetermined criterion. The reference pixel block is associated with a tag based on the pixel block region so as to facilitate a search of the reference data in order to process a plurality of pixel blocks associated with a multimedia frame of the multimedia data.

SYSTEMS AND METHODS FOR LOCKING AN APPLICATION TO DEVICE WITHOUT STORING DEVICE INFORMATION ON SERVER

A system and method for locking an application to specific hardware device without storing device or user information on server. A lock registration is performed during the first usage of the application where the application sends a unique value to the server through secured channel. This unique value is combination of user specific information and device information. The server receives the unique value, and sends the encrypted value to the device, which is stored in predefined location of device. During lock validation, which is initiated during every request to the server or on every session creation, the device unique value and encrypted value is sent to the server. The server receives it, decrypts the encrypted value, and compares with the received unique value. If both the values are same, the server validates application instance by sending the response to the device else error message is sent to the device. 1. A computer implemented method for locking an application to a device , wherein device information is not stored on server side , the method comprising:receiving, through a processor, a first unique value of a device on first usage of an application, wherein the first unique value is derived based on one or more device parameters;encrypting, through a processor, the first unique value received from the device;sending, through a processor, the encryption result to the device, wherein the encryption result is stored in a predefined location of the device;receiving, through a processor, a second unique value of the device and the encryption result at the subsequent usage of the application, wherein the second unique value is derived based on the one or more device parameters;decrypting, by the processor, the encryption result to get the first unique value received at the time of the first usage of the application;comparing, by the processor, the decrypted first unique value and the received second unique value; andvalidating the device, by the processor, ...

ANTI-COUNTERFEITING MARK WITH 3-D FEATURES

Disclosed herein is an authenticating mark formed on the surface of a product or package. The said mark comprising: at least an overt portion of visible 3D random image in the form of physically unclonable function (PUF) characterized in that the said PUF is random cracks or colors. Additionally, phosphor particles might be added to this pattern as covert features. It further disclose a system and method for identifying genuine or counterfeited products by analyzing the image of a 3D-PUF and its encrypted image using a commonly held scanning device. 1. An authenticating mark formed on the surface of a product or package , said mark comprising:at least an overt portion of 3D visible random physical features, said features comprising a physically unclonable function (PUF) pattern, wherein the said PUF pattern is a 3D random pattern with tactile depth for quick verification of the product or package as authentic.2. The mark as claimed in claim 1 , wherein the PUF pattern is generated using crackle effect produced from crackle paints and crackle nail polishes.3. The mark as claimed in claim 1 , wherein the PUF pattern is generated by layered paints or low boiling solvents.4. The mark as claimed in claim 1 , wherein the PUF pattern is generated by one or more combinations of clay particles claim 1 , water claim 1 , paint or adhesive.5. The mark as claimed in claim 1 , wherein the PUF pattern further comprises a plurality of colors to provide additional security.6. The mark as claimed in claim 1 , wherein the PUF pattern further comprises luminescent or fluorescent phosphor particles to provide additional security.7. The mark as claimed in claim 1 , wherein the PUF pattern is monolithically integrated on the product or package.8. The mark as claimed in claim 1 , wherein the PUF pattern is encapsulated in a transparent claim 1 , non-glossy material.9. The mark as claimed in claim 1 , wherein said mark further comprises a 2D printed image generated from-the encrypted data ...

METHOD AND APPARATUS FOR LIGHT-WEIGHT VIRTUALIZATION CONTEXTS

A processor comprises a register to store a first pointer to a context data structure specifying a virtual machine context, the context data structure comprising a first field to store a second pointer to a plurality of realm switch control structures (RSCSs), and an execution unit comprising a logic circuit to execute a virtual machine (VM) according to the virtual machine context, wherein the VM comprises a guest operating system (OS) comprising a plurality of kernel components, and wherein each RSCS of the plurality of RSCSs specifies a respective component context associated with a respective kernel component of the plurality of kernel components, and execute a first kernel component of the plurality of kernel components using a first component context specified by a first RSCS of the plurality of RSCSs. 1. A processor comprising:a register to store a first pointer to a context data structure specifying a virtual machine context, the context data structure comprising a first field to store a second pointer to a plurality of realm switch control structures (RSCSs); and execute a virtual machine (VM) according to the virtual machine context, wherein the VM comprises a guest operating system (OS) comprising a plurality of kernel components, and wherein each RSCS of the plurality of RSCSs specifies a respective component context associated with a respective kernel component of the plurality of kernel components; and', 'execute a first kernel component of the plurality of kernel components using a first component context identified by a first RSCS of the plurality of RSCSs., 'an execution unit comprising a logic circuit to2. The processor of claim 1 , wherein the context data structure further comprises at least one of a second field to store an extended page table pointer (EPTP) claim 1 , a third field to store content of a control register (CR) claim 1 , a forth field to store content of an instruction pointer (IP) register claim 1 , or a fifth field to store ...

PROCESSOR EXTENSIONS TO PROTECT STACKS DURING RING TRANSITIONS

A processor implementing techniques for processor extensions to protect stacks during ring transitions is provided. In one embodiment, the processor includes a plurality of registers and a processor core, operatively coupled to the plurality of registers. The plurality of registers is used to store data used in privilege level transitions. Each register of the plurality of registers is associated with a privilege level. An indicator to change a first privilege level of a currently active application to a second privilege level is received. In view of the second privilege level, a shadow stack pointer (SSP) stored in a register of the plurality of registers is selected. The register is associated with the second privilege level. By using the SSP, a shadow stack for use by the processor at the second privilege level is identified. 1a plurality of registers to store shadow stack pointers (SSPs), wherein each register is associated with a privilege level; anda processor core, operatively coupled to the plurality of registers, to:receive an indicator to change a first privilege level associated with a currently active application to a second privilege level;select, in view of the second privilege level, a shadow stack pointer (SSP) stored in a register of the plurality of registers, wherein the register is associated with the second privilege level; andidentify, using the SSP, a shadow stack for use by the processor at the second privilege level.. A processor comprising: This application is a continuation of U.S. patent application Ser. No. 15/016,068, filed Feb. 4, 2016, now U.S. Pat. No. 10,430,580, issued Oct. 1, 2019, which is hereby incorporated in its entirety herein by reference.Embodiments of the disclosure relate generally to microprocessors and more specifically, but without limitation, for processor extensions to protect stacks during ring transitions.Return-oriented programming (ROP) is a computer security exploit technique in which an attacker uses software ...

SHADOW STACK ISA EXTENSIONS TO SUPPORT FAST RETURN AND EVENT DELIVERY (FRED) ARCHITECTURE

An apparatus and method for efficiently managing shadow stacks. For example, one embodiment of a processor comprises: a plurality of registers to store a plurality of shadow stack pointers (SSPs); event processing circuitry to select a first SSP of the plurality of SSPs from a first register of the plurality of registers responsive to receipt of a first event associated with a first event priority level, the first SSP usable to identify a top of a first shadow stack; verification and utilization checking circuitry to determine whether the first SSP has been previously verified, wherein if the first SSP has not been previously verified then initiating a set of atomic operations to verify the first SSP and confirm that the first SSP is not in use, the set of atomic operations using a locking operation to lock data until the set of atomic operations are complete. 1. A processor comprising:a plurality of fast return and event delivery (FRED) shadow stack pointer (SSP) registers that store shadow stack pointers (SSPs); and select a SSP from a FRED SSP register within the plurality of FRED SSP registers for the event level to check a shadow stack for a token,', 'determine whether the FRED SSP register has been verified,', read from an address specified by the SSP and lock the address read,', 'verify that a value read from the address specified by the SSP matches that of the shadow stack, and', 'upon verification, release the address and indicate the token as busy., 'when the FRED SSP register has not been verified,'}], 'circuitry to, responsive to receipt of an event associated with an event level,'}2. The processor of claim 1 , wherein each of the plurality of FRED SSP registers is a model specific register.3. The processor of claim 1 , wherein determining whether the FRED SSP register has been verified is to check whether a single bit in the FRED SSP register is set claim 1 , and it is determined that the FRED SSP register has been verified when the single bit is set.4. ...

SYSTEM AND METHOD OF AUTOMATIC OUTDOOR SMALL CELL PLANNING

A system and method for automatic deployment of at least one outdoor small cell. The method comprises dynamically collecting traffic data corresponding to a geographic location associated with a cellular network by a data collection module []. Next, a data collection module [] automatically identifies a group of spatial grids from the one or more cells within the geographic location based on the traffic data and automatically determines one or more locations within the geographic locations for deploying the at least one outdoor small cell based on the identified group of spatial grids. A backhaul link clearance module [] automatically determines a backhaul connection between the one or more determined locations with the cellular network. An azimuth planning module [] automatically determines an azimuth for the at least one outdoor small cell based on the determined connection. A deployment unit [] deploy the at least one outdoor small cell. 1. A method for automatic deployment of at least one outdoor small cell in a geographic location , the method comprising:{'b': '202', 'dynamically collecting, by a data collection module [], a traffic data corresponding to a geographic location associated with a cellular network comprising of one or more cells;'}{'b': '204', 'identifying, by a data collection module [], a group of spatial grids from the one or more cells within the geographic location based on the traffic data;'}{'b': '204', 'determining, by the data collection module [], one or more locations within the geographic locations for deploying the at least one outdoor small cell based on the identified group of spatial grids;'}{'b': '206', 'determining, by a backhaul link clearance module [], a backhaul connection between the one or more determined locations with the cellular network;'}{'b': '208', 'determining, by an azimuth planning module [], an azimuth for the at least one outdoor small cell based on the determined connection; and'}{'b': '210', 'deploying, by a ...

Flexible return and event delivery

Techniques for flexible return and event delivery are described. As an example, an exemplary apparatus includes decoder circuitry to decode a single instruction, the single instruction to include a field for an opcode; and execution circuitry to execute the decoded single instruction according to the opcode to cause a return from an event handler while staying in a most privileged level and establish a return context that was in effect before event delivery.

APPARATUSES AND METHODS FOR SPECULATIVE EXECUTION SIDE CHANNEL MITIGATION

Methods and apparatuses relating to mitigations for speculative execution side channels are described. Speculative execution hardware and environments that utilize the mitigations are also described. For example, three indirect branch control mechanisms and their associated hardware are discussed herein: (i) indirect branch restricted speculation (IBRS) to restrict speculation of indirect branches, (ii) single thread indirect branch predictors (STIBP) to prevent indirect branch predictions from being controlled by a sibling thread, and (iii) indirect branch predictor barrier (IBPB) to prevent indirect branch predictions after the barrier from being controlled by software executed before the barrier. 1. A processor core comprising:at least one logical core;a branch predictor to predict a target instruction of an indirect branch instruction;an instruction execution pipeline to perform at least one data fetch operation for the target instruction before execution of the target instruction; anda model specific register to store an indirect branch restricted speculation bit for a first logical core of the at least one logical core that, when set after a transition of the first logical core to a more privileged predictor mode, prevents the branch predictor from predicting the target instruction of the indirect branch instruction for the first logical core based on software executed in a less privileged predictor mode by any of the at least one logical core.2. The processor core of claim 1 , wherein the at least one logical core is a plurality of logical cores claim 1 , and a respective indirect branch restricted speculation bit being set in the model specific register for a logical core of the plurality of logical cores prevents the branch predictor from predicting the target instruction of the indirect branch instruction for the logical core of the plurality of logical cores based on software executed by the other of the plurality of logical cores.3. The processor core of ...

METHOD AND SYSTEM FOR INTERACTIVE SEARCH INDEXING

A method, computer system, and computer program product are provided for processing an output of batch processed information. A document storage system receives the output of batch processed information from a number of company portals, websites, and online systems of organization. The document storage system separates the output into individual documents and individual forms. The document storage system indexes the individual documents and forms according to metadata. The metadata includes structural attributes extracted from the individual documents and forms, and company relevant parameters identified from business intelligence for the organization. The document storage system stores the individual documents and forms in association with the metadata. Responsive to storing the individual documents and forms, the document storage system generates an event message. The event message comprises information about the storing of the individual documents and forms. The document storage system publishes the event message to a message pipeline. The document storage system notifies a subscribed client device about the event message, including a notification of availability of the individual documents and individual forms separated from the output. 1. A computer-implemented method for processing an output of batch processed information , the method comprising:receiving the output of information batch processed from a number of locations in a computer system for an organization;separating the output into individual documents and individual forms;indexing the individual documents and forms according to metadata, wherein the metadata includes structural attributes extracted from the individual documents and forms, and company relevant parameters identified from business intelligence for the organization;storing the individual documents and forms in association with the metadata;responsive to storing the individual documents and forms, generating an event message, wherein the ...

HOLOGRAPHIC IMAGE REPLICATION

A method and system for improving holographic image simulation and replication is provided. The method includes receiving data identifying a primary location and at least one secondary location associated with a holographic replication event. First video data describing first objects at the primary location is received and a first holographic simulation presentation comprising virtual representations of the first objects is generated. Second video data describing second objects at the at least one secondary location is received and a second holographic simulation presentation comprising virtual representations of the second objects is generated. The second holographic simulation presentation is projected such that said virtual representations of the second objects interact with the first objects at the primary location. The first holographic simulation presentation is projected such that said virtual representations of the first objects interact with the second objects at the at least one secondary location. 1. A holographic image simulation and replication improvement method comprising:receiving, by a processor of a holographic image generation device, data identifying a primary location and at least one secondary location associated with a holographic replication event;continuously receiving in real time, by said processor via a plurality of sensors at said primary location, first video data describing first objects at said primary location;continuously generating in real time, by said processor based on said first video data, a first holographic simulation presentation comprising virtual representations of said first objects with respect to said primary location;continuously receiving in real time, by said processor via a plurality of sensors at said at least one secondary location, second video data describing second objects at said at least one secondary location;continuously generating in real time, by said processor based on said second video data, a second ...

Microbe-based masters for micro contact printing and methods for their preparation and use

A master used for micro contact printing and methods of creating thereof are disclosed. The master may include a permeable membrane removed from a surface of a media plate having one or more microbial nutrients. The master may also include a plurality of microbes positioned upon at least a portion of the permeable membrane. The microbes may be grown in a vertical direction to form a patterned surface.

Enabling The Use Of Multiple Picture Archiving Communication Systems By One Or More Facilities On A Shared Domain

Methods, systems, and computer-storage media are provided for utilizing multiple Picture Archiving Communication Systems (PACS) to view one more medical images by storing one or more PACS at a database within the system. Requests are received from one or more users at one or more facilities to utilize one or more PACS to view one or more medical images. After accessing the database to determine one or more PACS authorized for each facility from which a request is received, one or more users are provided with one or more PACS to view medical images associated with radiological exams and provide the necessary assessments and reports for treatment. 1. A dynamic system useful in a computer healthcare system that allows a healthcare provider to utilize multiple Picture Archiving Communication Systems (PACS) to view one or more medical images , the system comprising one or more processors configured to:receive an indication to launch a radiology desktop (RDT) application on a first user interface at a first facility;receive a request from a first user to utilize one or more PACS to view one or more medical images;access a database to identify the one or more PACS authorized for use at the first facility;provide the first user, via the first user's interface of the RDT application, with a first PACS authorized for use by the first user at the first facility; andprovide the first user, via the first user's interface of the RDT application, with a second PACS authorized for use by the first user at the first facility.2. The system of claim 1 , wherein the system further generates a first medical image claim 1 , via the first PACS claim 1 , for review by the first user.3. The system of claim 2 , wherein the system receives an analysis report from the first user for the first medical image viewed via the first PACS.4. The system of claim 3 , wherein the system further stores the analysis report from the first user regarding the first medical image in the database.5. The system ...

System for address mapping and translation protection

This disclosure is directed to a system for address mapping and translation protection. In one embodiment, processing circuitry may include a virtual machine manager (VMM) to control specific guest linear address (GLA) translations. Control may be implemented in a performance sensitive and secure manner, and may be capable of improving performance for critical linear address page walks over legacy operation by removing some or all of the cost of page walking extended page tables (EPTs) for critical mappings. Alone or in combination with the above, certain portions of a page table structure may be selectively made immutable by a VMM or early boot process using a sub-page policy (SPP). For example, SPP may enable non-volatile kernel and/or user space code and data virtual-to-physical memory mappings to be made immutable (e.g., non-writable) while allowing for modifications to non-protected portions of the OS paging structures and particularly the user space.

HARDWARE APPARATUSES, METHODS, AND SYSTEMS FOR INDIVIDUALLY REVOCABLE CAPABILITIES FOR ENFORCING TEMPORAL MEMORY SAFETY

Systems, methods, and apparatuses relating to circuitry to implement individually revocable capabilities for enforcing temporal memory safety are described. In one embodiment, a hardware processor comprises an execution unit to execute an instruction to request access to a block of memory through a pointer to the block of memory, and a memory controller circuit to allow access to the block of memory when an allocated object tag in the pointer is validated with an allocated object tag in an entry of a capability table in memory that is indexed by an index value in the pointer, wherein the memory controller circuit is to clear the allocated object tag in the capability table when a corresponding object is deallocated. 1. A hardware processor comprising:an execution unit to execute an instruction to request access to a block of memory through a pointer to the block of memory; anda memory controller circuit to allow access to the block of memory when an allocated object tag in the pointer is validated with an allocated object tag in an entry of a capability table in memory that is indexed by an index value in the pointer, wherein the memory controller circuit is to clear the allocated object tag in the capability table when a corresponding object is deallocated.2. The hardware processor of claim 1 , wherein the memory controller circuit is to populate the entry of the capability table when allocating the block of memory for the corresponding object of a plurality of objects of object-oriented source code.3. The hardware processor of claim 1 , wherein the entry in the capability table includes a field that indicates to the memory controller circuit a type of the corresponding object.4. The hardware processor of claim 3 , wherein the memory controller circuit is to cause a fault when the allocated object tag in the pointer is not validated with the allocated object tag in the entry of the capability table claim 3 , and when the type indicated by the entry of the ...

MEMORY MANAGEMENT APPARATUS AND METHOD FOR COMPARTMENTALIZATION USING LINEAR ADDRESS METADATA

An apparatus and method for memory management using compartmentalization. For example, one embodiment of a processor comprises: execution circuitry to execute instructions and process data, at least one instruction to generate a system memory access request using a first linear address; and address translation circuitry to perform a first walk operation through a set of one or more address translation tables to translate the first linear address to a first physical address, the address translation circuitry to concurrently perform a second walk operation through a set of one or more linear address metadata tables to identify metadata associated with the linear address, and to use one or more portions of the metadata to validate access by the at least one instruction to the first physical address. 1. A processor comprising:execution circuitry to execute instructions and process data, at least one instruction to generate a system memory access request having a first linear address; andaddress translation circuitry to perform a first walk operation through a set of one or more address translation tables to translate the first linear address to a first physical address,the address translation circuitry to concurrently perform a second walk operation through a set of one or more linear address metadata tables to identify metadata associated with the linear address, and to use one or more portions of the metadata to validate access by the at least one instruction to the first physical address.2. The processor of wherein the metadata comprises one or more linear address tags claim 1 , wherein validating access comprises comparing the one or more linear address tags to a first security identifier stored in a first control register and providing access to the first physical address only if the one or more linear address tags match the first value.3. The processor of further comprising:a second control register to store a first base address associated with a base translation ...

APPARATUS AND METHOD FOR EFFICIENT PROCESS-BASED COMPARTMENTALIZATION

An apparatus and method for efficient process-based compartmentalization. For example, one embodiment of a processor comprises: execution circuitry to execute instructions and process data; memory management circuitry coupled to the execution circuitry, the memory management circuitry to manage access to a system memory by a plurality of related processes using one or more process-specific translation structures and one or more shared translation structures to be shared by the related processes; and one or more control registers to store a process-specific base address pointer associated with a first process of the plurality of related processes and to store a shared base address pointer to identify the shared translation structures; wherein the memory management circuitry is to use the process-specific base address pointer in combination with a first linear address provided by the first process to walk the process-specific translation structures to identify any permissions and/or physical address associated with the first linear address, wherein if permissions are identified, the memory management circuitry is to use the permissions in place of any permissions specified in the shared translation structures. 1. A processor comprising:execution circuitry to execute instructions and process data;memory management circuitry coupled to the execution circuitry, the memory management circuitry to manage access to a system memory by a plurality of related processes using one or more process-specific translation structures and one or more shared translation structures to be shared by the related processes; andone or more control registers to store a process-specific base address pointer associated with a first process of the plurality of related processes and to store a shared base address pointer to identify the shared translation structures;wherein the memory management circuitry is to use the process-specific base address pointer in combination with a first linear ...

Dynamic Dash Flow For Tracking Key Performance Indicators Of Tasks Associated With Particular Medical Order Types

Systems, methods, and user interfaces provide user-friendly interactive digital workflow graphics for displaying an order's journey through various tasks and key performance indicators (KPIs) for those tasks. The method may include mapping data from electronic medical records (EMR), such as KPIs of various tasks, onto a graphical depiction of a workflow for a particular order type, a particular patient, and/or over a particular period of time. The status of the tasks (e.g., completed, in progress, or queued) may also be visually depicted through color-coding within the interactive digital workflow graphics. The methods here described allow tracking of tasks in a workflow in a way that provides context to the data or KPIs. This not only increases efficiency and assists in streamlining the workflow, but also reduces confusion and documentation errors among different departments and healthcare workers, thereby increasing patient safety. 1. One or more computer storage media having computer-executable instructions embodied thereon , that when executed , perform a method of displaying updated process flow data in a distributed system , the method comprising:receiving a request for process flow data and key performance indicators (KPIs) for a particular order type within an electronic health record (EHR) database at a particular medical facility over a selected time period;displaying a flow chart on a graphical user interface including depictions of a plurality of tasks associated with the particular order type and at least some of the plurality of tasks connected by linking graphics indicating a required or desired sequence of completion of the plurality of tasks;visually indicating which of the plurality of tasks is completed, is in progress, or is queued for a pre-defined threshold number or percentage of orders of the particular order type within the selected time period; anddisplaying on the flow chart, on or adjacent to at least one of the depictions of the ...

Systems and methods for managing future radiology orders

Computerized systems and methods are provided for managing future radiology orders for multiple facilities. The systems and methods can include detecting a location identifier for each future radiology order, and in response to detecting the location identifier, determining a specific radiology facility for that location identifier. The respective future radiology orders can then be provided to the intended radiology facility.

DECISION SUPPORT APPLICATION FOR PCOS

Aspects of the present disclosure determine a risk level of Polycystic Ovarian syndrome (“PCOS”). Alongside the risk level of PCOS, aspects of the present disclosure simultaneously display the risk level of PCOS with patient information, which may be useful for clinicians. Aspects include receiving patient information of a patient, determining a patient criteria is satisfied based on the patient information, and applying a predictive diagnosis model to the patient information to determine a risk level of PCOS. 1. One or more non-transitory computer storage media having computer-executable instructions embodied thereon that , when executed , perform a method of causing for display a risk of polycystic ovarian syndrome (PCOS) , the method comprising:receiving patient information of a patient comprising characteristic data, physical examination data, and clinical diagnostic data;applying a predictive diagnosis model to the patient information to determine a risk level of PCOS from a plurality of risk levels;determining the risk level from the plurality of risk levels based on applying the predictive diagnosis model; andcausing for simultaneous display on a graphical user interface (GUI) the risk level from the plurality of risk levels and the patient information.2. The one or more non-transitory computer storage media of claim 1 , wherein the patient information is displayed on the GUI in a first region comprising the characteristic data claim 1 , a second region comprising the physical examination data claim 1 , and a third region comprising the clinical diagnostic data.3. The one or more non-transitory computer storage media of claim 1 , wherein the computer storage media receive the patient information from a plurality of disparate systems.4. The one or more non-transitory computer storage media of claim 1 , wherein the characteristic data comprises patient historical data claim 1 , and the patient demographic information.5. The one or more non-transitory computer ...

SYSTEMS AND METHODS FOR DETERMINING GESTATIONAL DIABETES MELLITUS RISK AND ASSIGNING WORKFLOWS

Computerized systems and methods are provided for determining the risk of developing gestation diabetes mellitus (GDM) and assigning workflows based on such a determination. The systems and methods can include receiving medical information associated with an individual, determining whether the individual is at risk of developing GDM based on the received medical information, and performing one or more response actions. The one or more response actions can include assigning a workflow for preventative treatment of GDM, providing a notification that the individual is at risk of GDM, or a combination thereof. 1. A computerized system comprising:one or more processors; and receive medical information associated with an individual, wherein the individual is less than 24 weeks into a pregnancy;', 'based on the received medical information, determine that the individual requires preventative treatment for gestational diabetes mellitus (GDM); and', 'initiate one or more response actions, based on determining that the individual requires preventative treatment for GDM., 'non-transitory computer storage media storing computer-useable instructions that, when used by the one or more processors, cause the one or more processors to2. The computerized system of claim 1 , wherein the medical information associated with the individual comprises: an age of the individual claim 1 , body mass index claim 1 , heart or pulse rate claim 1 , non-invasive systolic blood pressure claim 1 , non-invasive diastolic blood pressure claim 1 , estimated creatinine clearance claim 1 , ethnicity claim 1 , family medical history claim 1 , medical history of the individual associated with a prior pregnancy claim 1 , including any prior GDM diagnosis claim 1 , birth of prior child having macrosomia claim 1 , blood cortisol level claim 1 , or a combination thereof.3. The computerized system of claim 1 , wherein the medical information associated with the individual consists of: an age of the individual ...

Enhanced Efficiency of Induced Pluripotent Stem Cell Generation

Human somatic cells are reprogrammed to become induced pluripotent stem cells (iPS cells) by the introduction of a minicircle DNA vector. Cells of interest include adipose stem cells. 112-. (canceled)13. A population of induced human pluripotent stem cells comprising one or more minicircle DNA vectors comprising coding sequences encoding a plurality of reprogramming factors , wherein:(i) the coding sequence of each reprogramming factor is operably linked to a promoters(ii) the plurality of reprogramming factors comprises Oct4, Sox2, Lin28, and Nanog; or Oct4, Sox2, c-Myc, and Klf4; and(iii) each of the one or more minicircle DNA vectors is 0.3-10 Kb in length and lacks expression-silencing bacterial sequences.1416-. (canceled)17. The population of induced pluripotent stem cells of claim 13 , wherein the plurality of reprogramming factors comprises Oct4 claim 13 , Sox2 claim 13 , Lin28 claim 13 , and Nanog.18. The population of induced pluripotent stem cells of claim 13 , wherein the plurality of reprogramming factors comprises Oct4 claim 13 , Sox2 claim 13 , c-Myc claim 13 , and Klf4.19. The population of induced pluripotent stem cells of claim 28 , wherein the coding sequences of said reprogramming factors are operably linked to the same single promoter.20. The population of induced pluripotent stem cells of claim 19 , wherein said coding sequences are separated from each other by sequences encoding self-cleaving peptides.21. (canceled)22. A minicircle DNA vector comprising coding sequences encoding a cocktail plurality of reprogramming factors sufficient to induce pluripotency of a somatic cell population of human adipose stem cells claim 19 , wherein:(i) the coding sequence of each reprogramming factor is operably linked to a promoter;(ii) the plurality of reprogramming factors comprises Oct4, Sox2, Lin28, and Nanog; or Oct4, Sox2, c-Myc, and Klf4; and(iii) the minicircle DNA vector is 0.3-10 Kb in length and lacks expression-silencing bacterial sequences.23. The ...

HARDWARE APPARATUSES AND METHODS TO SWITCH SHADOW STACK POINTERS

Methods and apparatuses relating to switching of a shadow stack pointer are described. In one embodiment, a hardware processor includes a hardware decode unit to decode an instruction, and a hardware execution unit to execute the instruction to: pop a token for a thread from a shadow stack, wherein the token includes a shadow stack pointer for the thread with at least one least significant bit (LSB) of the shadow stack pointer overwritten with a bit value of an operating mode of the hardware processor for the thread, remove the bit value in the at least one LSB from the token to generate the shadow stack pointer, and set a current shadow stack pointer to the shadow stack pointer from the token when the operating mode from the token matches a current operating mode of the hardware processor. 1. A hardware processor comprising:a hardware decode unit to decode an instruction; and pop a token for a thread from a shadow stack, wherein the token includes a shadow stack pointer for the thread with at least one least significant bit (LSB) of the shadow stack pointer overwritten with a bit value of an operating mode of the hardware processor for the thread,', 'remove the bit value in the at least one LSB from the token to generate the shadow stack pointer, and', 'set a current shadow stack pointer to the shadow stack pointer from the token when the operating mode from the token matches a current operating mode of the hardware processor., 'a hardware execution unit to execute the instruction to2. The hardware processor of claim 1 , wherein the operating mode of the hardware processor is selectable between a first operating mode with a first address size and a second operating mode with a second claim 1 , larger address size claim 1 , and the size of the token is the second claim 1 , larger address size for both of a token for a thread in the first operating mode and a token for a thread in the second operating mode.3. The hardware processor of claim 1 , wherein the hardware ...

REQUIREMENT CREATION USING SELF LEARNING MECHANISM

A computer implemented method of creating a requirement document that may begin with receiving data feeds for requirement data correlated to historical projects; and using natural language processing to extract requirement data correlated to project type from the historical projects. The project types are tagged with the requirement data and stored in a database of tagged requirements to project type. A project description is analyzed for project type using natural language processing to extract the project type. The method further includes matching the project type extracted from the project description to the tagged requirements of project type. A report is generated of requirements including the tagged requirements matching the project type extracted from the project description. 1. A computer implemented method of creating a requirement document comprising:receiving data feeds for requirement data correlated to historical projects;employing natural language processing to extract requirement data correlated to project type from the historical projects;tagging the project types with the requirement data;analyzing a project description for project type using natural language processing to extract the project type;matching the project type extracted from the project description to the tagged requirements of project type; andgenerating a report of requirements including the tagged requirements matching the project type extracted from the project description.2. The computer implemented method of claim 1 , further comprising storing a database of tagged requirements to project type.3. The computer implemented method of claim 1 , wherein the receiving data feeds include a feed from a web crawler.4. The computer implemented method of claim 1 , wherein the receiving data feeds include an input from an administrator.5. The computer implemented method of claim 1 , further comprising updating the database of tagged requirements to project type with requirement/project type ...

Non-tracked control transfers within control transfer enforcement

A processor includes an execution unit and a processing logic operatively coupled to the execution unit, the processing logic to: enter a first execution state; responsive to executing a control transfer instruction having a pre-defined subcode, remain in the first execution state; responsive to executing a control transfer instruction not having the pre-defined subcode, transition into a second execution state; and responsive to determining, in the second execution state, that a next instruction to be executed differs from an ENDBRANCH instruction, raise an execution exception.

METHODS AND SYSTEM FOR ASSESSING FORM TO FORM COMPATIBILITY OF THERAPEUTIC AGENTS IN CLINICAL ENVIRONMENTS

Methods and systems are provided for assessing compatibility between forms of medication in a clinical setting. Generally, a medical order for a patient is received, which specifies a task with an initial form of a medical agent to be administered to the patient. When a clinician attempts to administer the medical agent to the patient, a current form of the medical agent is received from a scanning device, for example. As such, it may be determined whether the current form is compatible with the initial form. When it is determined that the current form is not compatible with the initial form, an error may be generated and issued in an effort to prevent administration of the current form to the patient. 1. A system useful for assessing compatibility between therapeutic agent forms during medical order task performance in a clinical setting , the system comprising:(a) a computer store containing data, including, for each of a plurality of therapeutic agents, a compatibility index of one or more forms of each of the plurality of therapeutic agents that are compatible; and receive an indication of a task corresponding to a medical order for a patient, wherein the task corresponding to the medical order specifies a current form of a therapeutic agent for administering to the patient;', 'identify an initial form previously assigned to the medical order for the patient;', 'determine whether the current form of the therapeutic agent is compatible with the initial form using the compatibility index; and', 'when it is determined that the current form of the therapeutic agent is not compatible with the initial form, issue an error., '(b) a computer server in a healthcare information system, the computer server coupled to the computer store and programmed to2. The system of claim 1 , wherein the computer server further comprises a backend logic programmed to parse a current form of the therapeutic agent.3. The system of claim 2 , where the computer server further comprises ...

GENERIC UNPACKING OF APPLICATIONS FOR MALWARE DETECTION

A technique for detecting malware in an executable allows unpacking of a packed executable before determining whether the executable is malware. In systems with hardware assisted virtualization, hardware virtualization features may be used to iteratively unpack a packed executable in a controlled manner without needing knowledge of a packing technique. Once the executable is completely unpacked, malware detection techniques, such as signature scanning, may be employed to determine whether the executable contains malware. Hardware assisted virtualization may be used to facilitate the scanning of the run-time executable in memory. 1. A non-transitory computer-readable medium comprising computer executable instructions stored thereon to cause one or more processing units to:load a self-extracting executable into memory, the self-extracting executable comprising a first unpacking stub and a packed executable;allow the first unpacking stub to unpack the packed executable into an unpacked executable;detect completion of the first unpacking stub using one or more heuristics; andscan the unpacked executable for malware.2. The non-transitory computer-readable medium of claim 1 ,wherein the packed executable is an iteratively packed executable comprising one or more intermediate self-extracting executables, allow the first unpacking stub to unpack the packed executable into one of the one or more intermediate self-extracting executables; and', 'allow the one of the one or more intermediate self-extracting executables to unpack successively until a final unpacking stub unpacks a final packed executable into a final unpacked executable,, 'wherein the instructions to cause one or more processing units to allow the first unpacking stub to unpack the packed executable comprise instructions to cause one or more processing units towherein the instructions to cause one or more processing units to scan the unpacked executable for malware comprise instructions to cause one or more ...

COOLING ASSEMBLY FOR REFRIGERATOR APPLIANCE

A refrigerator appliance includes a cabinet that defines first and second compartments. A fan assembly is configured to direct cooled air from a cooling assembly into the first and second compartments. The fan assembly includes a housing that defines an inlet, a first outlet, and a second outlet. The first outlet is in communication with the first compartment, and the second outlet is in communication with the second compartment. A fan is positioned within the housing and is configured to direct the cooled air from the inlet toward the first and second outlets. A damper assembly is configured to selectively obstruct one of the first outlet and the second outlet. 1. A cooling assembly for a refrigerator appliance , comprising:a housing defining an inlet, a first outlet, and a second outlet, wherein the first outlet is defined opposite the second outlet;a fan positioned within the housing, wherein the fan is configured to direct cooled air through the inlet and toward the first and second outlets; a rim coupled with a plurality of gear teeth positioned circumferentially about, and extending radially from, the rim; and', 'a sidewall extending from a surface of the rim, wherein the sidewall extends circumferentially about a portion of a circumference of the rim; and, 'a damper assembly configured to rotate between a first position and a second position, the damper assembly includingan actuator including an actuation gear configured to be engaged with the plurality of gear teeth, wherein the actuation gear is configured to rotate the damper assembly between the first and second positions.2. The cooling assembly of claim 1 , wherein the sidewall of the damper assembly is configured to obstruct the first outlet when the damper assembly is in the first position and is configured to obstruct the second outlet when the damper assembly is in the second position.3. The cooling assembly of claim 1 , wherein the damper assembly is configured to be moved to an intermediate ...

SHARING A GUEST PHYSICAL ADDRESS SPACE AMONG VIRTUALIZED CONTEXTS

Embodiments of an invention for sharing a guest physical address space between virtualized contexts are disclosed. In an embodiment, a processor includes a cache memory and a memory management unit. The cache memory includes a plurality of entry locations, each entry location having a guest physical address field and a host physical address field. The memory management unit includes page-walk hardware and cache memory access hardware. The page-walk hardware is to translate a guest physical address to a host physical address using a plurality of page table entries. The cache memory access hardware is to store the guest physical address and the host physical address in the cache memory only if a shareability indicator in at least one of the page table entries is set. 1. A processor comprising:a cache memory including a plurality of entry locations, each entry location having a guest physical address field and a host physical address field; and page-walk hardware to translate a guest physical address to a host physical address using a plurality of page table entries; and', 'cache memory access hardware to store the guest physical address and the host physical address in the cache memory only if a shareability indicator in at least one of the page table entries is set., 'a memory management unit including'}2. The processor of claim 1 , wherein the memory management unit is to perform a translation of the guest physical address to the host physical address using the cache memory instead of the page-walk hardware if the cache memory includes an entry corresponding to the guest physical address.3. The processor of claim 2 , wherein each entry location also has a namespace tag field in which to store a namespace tag.4. The processor of claim 3 , wherein the memory management unit is to perform the translation using the cache memory instead of the page-walk hardware only if the namespace tag in the entry corresponding to the guest physical address corresponds to a context in ...

METHOD OF FABRICATING HIGH-PERFORMANCE POLY (VINYLIDENEDIFLUORIDE-TRIFLUOROETHYLENE), P(VDF-TRFE) FILMS

The present invention relates to a process of fabricating P(VDF-TrFE) films by modifying the solvent composition. Two solvents MEK and DMSO were mixed in pre-determined ratios and that co-solvent mixture was used for fabricating the P(VDF-TrFE) films. By virtue of such method driven P(VDF-TrFE) films, the ferroelectric capacitors comprising of the same were found to achieve low voltage operation, thermal stability and fatigue endurance, which indicated improved ferroelectric performance of the devices. In addition, the films made by same process also yielded high piezo- and pyro-electric coefficient, indicating improved piezo- and pyro-electric performances of the devices. 1. A process for fabricating poly(vinylidenedifluoride-trifluoroethylene) [P(VDF-TrFE)] polymer films comprising steps of:a. preparing P(VDF-TrFE) solution in methylethylketone (MEK) and dimethyl sulfoxide (DMSO) co-solvent mixture,b. coating the solution obtained in step (a) on substrate to form P(VDF-TrFE) films, followed by annealing the films at a temperature between 138-142° C., andc. quenching the solution in ice water,wherein co-solvent mixture DMSO and MEK are present in a ratio ranging from 1:1 to 1:2.2. The process as claimed in claim 1 , wherein the co-solvent mixture DMSO and MEK are present in a ratio of 1:2.3. The process as claimed in claim 1 , wherein the substrate is selected from group consisting of polyethylene terephthalate (PET) claim 1 , polyimide claim 1 , polyethylene naphthalate (PEN) claim 1 , polyetherimide (PEI) claim 1 , flexible metal foils claim 1 , textiles.4. The process as claimed in claim 1 , wherein the substrate is further treated with UV ozone.5. The process as claimed in claim 1 , wherein concentration of P(VDF-TrFE) in co-solvent mixture is maintained at 25 mg/ml.6. The process as claimed in claim 1 , wherein P(VDF-TrFE) thin films formed have a low roughness of 6.2-7 nm.7. The process as claimed in claim 1 , wherein the P(VDF-TrFE) thin films formed exhibit ...

PREDICTION OF GENETIC TRAIT EXPRESSION USING DATA ANALYTICS

A computer generates a matrix using genetic code. The computer generates a result-set using the matrix and neighborhood clustering. The computer determines a match between a portion of the result-set and a known genetic pattern. The computer responds to identification of a match between a portion of the result-set and a known genetic pattern by determining a probability that the combination of the first source of genetic code and the second source of genetic code will result in expression of a trait associated with the known genetic pattern. The computer responds to the probability at least meeting a threshold, by generating a message that indicates at least a portion of the genetic code of the progeny and the probability that the combination of the genetic code has the probability to result in expression of the trait associated with the known genetic pattern. 1. A method of predicting genetic pattern expression , the method comprising:generating, by one or more processors, a matrix using a first source of genetic code and a second source of genetic code;generating, by the one or more processors, a result-set using the matrix and neighborhood clustering;determining, by the one or more processors, a match between a portion of the result-set and a known genetic pattern;responsive to an identification of a match between a portion of the result-set and a known genetic pattern, determining, by the one or more processors, a probability that the combination of the first source of genetic code and the second source of genetic code will result in expression of a trait associated with the known genetic pattern; andresponsive to the probability at least meeting a first threshold for expression of the trait, generating, by the one or more processors, a message that indicates (i) at least a portion of predicted genetic code of the progeny and (ii) the probability that the combination of the first source of genetic code and the second source of genetic code has the probability to ...

SYSTEM FOR ADDRESS MAPPING AND TRANSLATION PROTECTION

This disclosure is directed to a system for address mapping and translation protection. In one embodiment, processing circuitry may include a virtual machine manager (VMM) to control specific guest linear address (GLA) translations. Control may be implemented in a performance sensitive and secure manner, and may be capable of improving performance for critical linear address page walks over legacy operation by removing some or all of the cost of page walking extended page tables (EPTs) for critical mappings. Alone or in combination with the above, certain portions of a page table structure may be selectively made immutable by a VMM or early boot process using a sub-page policy (SPP). For example, SPP may enable non-volatile kernel and/or user space code and data virtual-to-physical memory mappings to be made immutable (e.g., non-writable) while allowing for modifications to non-protected portions of the OS paging structures and particularly the user space. 1. A device to protect address translation , comprising:memory circuitry including:at least one virtual machine (VM) in which an operating system executes;at least one operating system (OS)-administered page table to translate a linear memory address utilized by the OS into a physical memory address within the memory circuitry;at least one virtual machine manager (VMM)-administered page table to translate the linear memory address into the physical memory address when the linear memory address is determined to fall in a protected linear range (PLR); andprocessing circuitry including at least one VMM to receive a command indicating the linear address to translate to the physical address, determine if the linear address falls within the PLR, utilize the at least one OS-administered page table to translate the linear address into the physical address when the linear address is determined to not fall within the PLR, and utilize the at least one VMM-administered page table to translate the linear address into the ...

System for address mapping and translation protection

This disclosure is directed to a system for address mapping and translation protection. In one embodiment, processing circuitry may include a virtual machine manager (VMM) to control specific guest linear address (GLA) translations. Control may be implemented in a performance sensitive and secure manner, and may be capable of improving performance for critical linear address page walks over legacy operation by removing some or all of the cost of page walking extended page tables (EPTs) for critical mappings. Alone or in combination with the above, certain portions of a page table structure may be selectively made immutable by a VMM or early boot process using a sub-page policy (SPP). For example, SPP may enable non-volatile kernel and/or user space code and data virtual-to-physical memory mappings to be made immutable (e.g., non-writable) while allowing for modifications to non-protected portions of the OS paging structures and particularly the user space.

SYSTEM AND METHOD FOR DETECTING PHISHING WEBPAGES

A processor controlled hybrid method, an apparatus and a computer readable storage medium for identifying a phishing webpage are provided. The method comprises capturing overall visual information and overall structural information about a webpage being browsed by a user, comparing the overall visual information and overall structural information of the webpage with overall visual information and overall structural information of a legitimate webpage or a phishing webpage stored in a webpage database, calculating a measure of similarity, assessing the measure on the basis of a pre-determined threshold and concluding the measure of similarity is above the pre-determined threshold, thereby identifying a phishing webpage. The method may also provide for collecting and comparing visual information and, optionally, structural information. 1. A processor controlled hybrid method for identifying a phishing webpage , the method comprising:capturing overall visual information and overall structural information about a webpage being browsed by a user;comparing the overall visual information and the overall structural information of the webpage with overall visual information and overall structural information of a legitimate webpage or a phishing webpage stored in a webpage database;calculating a measure of similarity;assessing the measure on the basis of a pre-determined threshold; andconcluding the measure of similarity is above the pre-determined threshold, thereby identifying a phishing webpage.2. The method of claim 1 , further comprising scanning a priority list.3. The method of claim 2 , further comprising compiling claim 2 , storing and updating the webpage database.4. The method of claim 3 , further comprising compiling claim 3 , storing and updating the priority list.5. The method of claim 4 , wherein capturing overall visual information comprises:rendering the webpage with a pre-defined fixed resolution to provide a rendered webpage;customizing the rendered webpage ...

METHOD AND APPARATUS FOR LIGHT-WEIGHT VIRTUALIZATION CONTEXTS

A processor comprises a register to store a first pointer to a context data structure specifying a virtual machine context, the context data structure comprising a first field to store a second pointer to a plurality of realm switch control structures (RSCSs), and an execution unit comprising a logic circuit to execute a virtual machine (VM) according to the virtual machine context, wherein the VM comprises a guest operating system (OS) comprising a plurality of kernel components, and wherein each RSCS of the plurality of RSCSs specifies a respective component context associated with a respective kernel component of the plurality of kernel components, and execute a first kernel component of the plurality of kernel components using a first component context specified by a first RSCS of the plurality of RSCSs. 1. (canceled)2. A processor comprising:a register to store a first pointer to a context data structure specifying a virtual machine context comprising a first kernel component context; and execute a virtual machine (VM) according to the virtual machine context, wherein the VM comprises a guest operating system (OS) comprising a first kernel component specified according to the first kernel component context; and', 'execute the first kernel component using the first kernel component., 'an execution circuit to3. The processor of claim 2 , wherein the context data structure further comprises a first field to store a pointer to a plurality of real switch control structures (RSCSs) and at least one of a second field to store an extended page table pointer (EPTP) claim 2 , a third field to store content of a control register (CR) claim 2 , a fourth field to store content of an instruction pointer (IP) register claim 2 , or a fifth field to store content of a stack pointer (SP) register.4. The processor of claim 3 , wherein each of the plurality of RSCSs comprises at least one of a first field to store an identifier associated with the respective kernel component of a ...

BLOCKMAIL TRANSFER PROTOCOL

An example operation may include one or more of receiving an electronic message from a sender that is intended for a recipient, breaking-up the electronic message into a plurality of message components and storing each message component in a respective block from among a plurality of blocks, linking the plurality of blocks of the broken-up electronic message together in a chain such that each successive block in the chain includes a hash of content included in a previous block of the chain, and transmitting the hash-linked chain of blocks of the broken-up electronic message via a network to the recipient. 1. A computing system comprising:a processor configured to receive an electronic message from a sender that is intended for a recipient, break-up the electronic message into a plurality of blocks where each block stores a respective message component of the electronic message, and link the plurality of blocks of the broken-up electronic message together in a chain such that each successive block in the chain includes a hash of content included in a previous block of the chain; anda network interface configured to transmit the hash-linked chain of blocks of the broken-up electronic message via a network to the recipient.2. The computing system of claim 1 , wherein the processor is configured to store each of a sender claim 1 , a recipient claim 1 , a subject claim 1 , and a body of content from the electronic message in separate blocks of the plurality of blocks.3. The computing system of claim 2 , wherein the processor is further configured to store an attachment of the electronic message into a separate block of the plurality of blocks.4. The computing system of claim 1 , wherein claim 1 , for each successive block in the hash-linked chain of blocks claim 1 , the processor is configured to generate a hash of block content from the previous block in the hash-linked chain of blocks and insert the hashed block content in the successive block in the hash-linked chain ...

MANAGING ELECTRONIC MAIL IN A COMMUNICATION NETWORK

A method and system for managing an electronic mail. A command list of a communication electronic mail transmission protocol is partitioned into command sub-lists using recursive parameters appearing in the command list prior to the partitioning of the command list. Each recursive parameter is a command that is repeated in respective command sub-lists as a result of the partitioning. Each command sub-list includes at least one command pertaining to a receiver or sender of the electronic mail. Each command sub-list is individually selectable for subsequent use of the at least one command in a subsequently selected command sub-list in implementing the electronic mail. A selection of at least one of the command sub-lists viewable in a user interface is received. Each command of the at least one command specifies a respective aspect of how to implement the electronic mail in a subsequent implementation of the electronic mail. 1. A method for managing an electronic mail , said method comprising:during a Simple Mail Transfer Protocol (SMTP) session, conducted in a computer system, in which commands are initiated by a SMTP client and responses are from a SMTP server through which the SMTP session is opened:partitioning, by one or more processor of the computer system, a SMTP command list of a communication SMTP electronic mail transmission protocol associated with the electronic mail into a plurality of command sub-lists using a plurality of recursive parameters appearing in the SMTP command list prior to said partitioning, wherein the electronic mail is from a current sender to a receiver, wherein each recursive parameter is a formal standard SMTP command that is repeated in respective command sub-lists as a result of said partitioning, wherein the plurality of recursive parameters comprises a DATA parameter appearing in two different command sub-lists of the plurality of command sub-lists, wherein the DATA parameter appearing in the two different command sub-lists ...

INDIRECT LUGGAGE WEIGHT IDENTIFICATION

Embodiments of the present invention provides methods, computer program products, and a system for indirectly weighing a load. Embodiments of the present invention can be used to collect recordings of a user interacting with a load, analyzing the recordings based on baseline measurements and a variety of measurement techniques, and predicting a weight of the load based on the analysis without directly weighing the load. Embodiments of the present invention can be used to issue a notification to a user based on the weight of the load to inform the user the load is overweight, to allow the user to print luggage tickets, and to allow the user to pay for baggage fees. 1. A computer-implemented method comprising:analyzing recordings of a user interacting with a load based on a baseline measurement and a set of measurement techniques;predicting a weight of the load based on the analyzed recordings of the user interacting with the load; andgenerating a recommendation that includes a series of actions and notifications to be displayed on a user interface based on the predicted weight.2. The computer-implemented method of claim 1 , wherein predicting the weight of the load based on the analyzed recordings of the user interacting with the load comprises:generating a profile of the user;generating a set of statistical distributions of user-load interactions corresponding to the set of measurement techniques;matching a set of values to the generated set of statistical distributions of the user-load interactions, wherein the set of values are used to predict a weight and are based on the set of measurement techniques corresponding to the analyzed recordings; andassigning a weight to the load based on the matched set of values.3. The computer-implemented method of claim 1 , further comprising:recording the user interacting with one or more loads, wherein the recordings are continuously uploaded to a database of a transit server computer.4. The computer-implemented method of claim ...

MULTILINGUAL CONTENT MANAGEMENT

Disclosed aspects relate to multilingual content management. A set of language usage data for a set of languages may be ingested from a set of mobile computing devices by a multilingual content management engine. A language profile for a group of users that indicates relative usage of the set of languages with respect to the group of users by may determined by the multilingual content management engine using the set of language usage data for the set of languages. A multilingual message may be generated based on the language profile for the group of users by the multilingual content management engine. The multilingual message may be provided to the group of users by the multilingual content management engine. 1. A computer-implemented method for multilingual content management , the method comprising:ingesting, from a set of mobile computing devices by a multilingual content management engine, a set of language usage data for a set of languages;determining, by the multilingual content management engine using the set of language usage data for the set of languages, a language profile for a group of users that indicates relative usage of the set of languages with respect to the group of users;generating, by the multilingual content management engine, a multilingual message based on the language profile for the group of users;transmitting, by the multilingual content management engine, the multilingual message to the group of users using data associated with the first language;resolving a set of two or more languages, wherein the set of two or more languages includes a first subset of the set of languages and a second subset of the set of languages;computing, by the multilingual content management engine using the set of language usage data, a first proportional utilization value for the first subset of the set of languages that indicates relative usage of the first subset of the set of languages with respect to the group of users:computing, by the multilingual content ...

UTILIZING DEEP LEARNING WITH AN INFORMATION RETRIEVAL MECHANISM TO PROVIDE QUESTION ANSWERING IN RESTRICTED DOMAINS

A device receives documents and previously answered questions associated with a restricted domain, and processes the documents and the previously answered questions to generate a corpus of searchable information. The device receives a question associated with the restricted domain, and processes the question, with a machine learning model or a rule-based classifier model, to determine a classification type for the question. The device manipulates the question to generate a query from the question, and processes the query, with an expansion technique, to generate an expanded query. The device utilizes the expanded query, with the corpus of searchable information, to identify candidate answers to the question, and processes the candidate answers and the classification type for the question, with a deep learning model, to generate scored and ranked candidate answers to the question. The device selects an answer from the scored and ranked candidate answers, and provides information indicating the answer. 1. A device , comprising:one or more memories; and receive documents and previously answered questions associated with a restricted domain;', 'process the documents and the previously answered questions to generate a corpus of searchable information;', 'receive a question associated with the restricted domain;', 'process the question, with a machine learning model or a rule-based classifier model, to determine a classification type for the question;', 'manipulate the question to generate a query from the question;', 'process the query, with an expansion technique, to generate an expanded query;', 'utilize the expanded query, with the corpus of searchable information, to identify candidate answers to the question;', 'process the candidate answers and the classification type for the question, with a deep learning model, to generate scored and ranked candidate answers to the question;', 'select an answer to the question from the scored and ranked candidate answers; and', ' ...

CANNULA NEEDLE

According to a teaching of the present invention, having a flexible catheter attached to a housing. A needle having an exterior surface having a first roughness, the needle being within the flexible catheter and the housing. The needle has and interface surface angled with respect to a needle centerline. A portion of the interface surface having a second roughness which is more than the first roughness. 1. An intravenous catheter apparatus comprising:a flexible catheter attached to a housing;a needle having an exterior surface having a first roughness, the needle being within the flexible catheter and the housing, the needle having and interface surface angled with respect to a needle centerline, a portion of the interface surface having a second roughness which is more than the first roughness.2. The intravenous catheter apparatus of wherein second roughness has an Ra of 0.2 to 1.6 um.3. The intravenous catheter apparatus of wherein the exterior surface defined a first channel.4. The intravenous catheter apparatus of wherein the interface surface defines a second channel.5. The intravenous catheter apparatus of further comprising a member defining a flashback chamber.6. The intravenous catheter apparatus of further comprising a catheter base within the wing housing.7. An intravenous catheter apparatus comprising:a flexible catheter;a needle disposed in the flexible catheter, the needle having an exterior surface having a first roughness Ra of 0.2 to 0.6 um, the needle having and interface surface angled with respect to a needle centerline, a portion of the interface surface having a second roughness which is more than the first roughness.8. The intravenous catheter apparatus of wherein second roughness has an Ra of 0.2 to 1.6 um.9. The intravenous catheter apparatus of wherein the exterior surface defined a first channel.10. The intravenous catheter apparatus of wherein the interface surface defines a second channel.11. The intravenous catheter apparatus of further ...

Dynamic Search Service

A platform independent system for performing a search request provided by a user. The platform independent system includes a consuming application executing on a first computer that handles the search request provided by a user. The search request includes instructions to retrieve selected data from a second application. A web interface module executing on a second computer receives the search request and formulates search routines regardless of the search engine logic or infrastructure of the consuming application to connect to a data model that contains the selected data for retrieval. The web interface module structures data associated with the search request to be compatible for searching with the data model. 1. A platform independent system for performing a search request provided by a user comprising:a consuming application executing on a first computer handles the search request provided by a user, the search request includes instructions to retrieve selected data from a second application; anda web interface module executing on a second computer receives the search request and formulates search routines regardless of the search engine logic or infrastructure of the consuming application to connect to a data model that contains the selected data for retrieval, the web interface module structures data associated with the search request to be compatible for searching with the data model, the selected data from the data model includes structured data and un-structured data where the web interface module is capable of accessing disparate databases and applications for devising the search request, wherein the user is provided the flexibility to perform a search on a plurality of attributes simultaneously in a single request, the users also have an option to select or modify any number of search attributes for either display or filter purpose or both, the web interface module fetches the results from a structured data source while simultaneously fetching results ...

PREDICTING EARLY WARNING SIGNALS IN PROJECT DELIVERY

The disclosure is directed to project management. A method for predicting early warning signals in project delivery according to embodiments includes classifying data related to a project into a plurality of classes of data, the data including unstructured data related to the project and structured data related to the project; inputting each of the plurality of classes of data into a cognitive engine for predictive analysis, the cognitive engine outputting a prediction value for each of the plurality of classes; applying a weighting to each of the prediction values outputted by the cognitive engine; combining the weighted prediction values; and predictively outputting an early warning signal based on the combination of weighted prediction values. 1. A method for predicting early warning signals in project delivery , comprising:classifying data related to a project into a plurality of classes of data, the data including unstructured data related to the project and structured data related to the project;inputting each of the plurality of classes of data into a cognitive engine for predictive analysis, the cognitive engine outputting a prediction value for each of the plurality of classes;applying a weighting to each of the prediction values outputted by the cognitive engine;combining the weighted prediction values; andpredictively outputting an early warning signal based on the combination of weighted prediction values.2. The method according to claim 1 , wherein the plurality of classes of data includes class I data claim 1 , class II data claim 1 , and class III data claim 1 , and wherein the cognitive engine includes a first predictive analytic engine for generating a prediction value for the class I data claim 1 , a second predictive analytic engine for generating a prediction value for the class II data claim 1 , and a third predictive analytic engine for generating a prediction value for the class III data.3. The method according to claim 2 , wherein the class I ...

FLUID DELIVERY SYSTEM FOR A FRONT-LOAD WASHING APPLIANCE FOR DELIVERING FLUID TO LIFTERS OF THE DRUM

A front-load laundry appliance includes a drum that is rotationally operable within a tub about a generally horizontal rotational axis. A plurality of lifters are coupled to an interior surface of the drum. A fluid delivery path is at least partially defined within the drum and the plurality of lifters. A fluid delivery system delivers fluid into the fluid delivery path in a direction parallel to the generally horizontal rotational axis. 1. A front-load laundry appliance comprising:a drum that is rotationally operable within a tub about a generally horizontal rotational axis;a plurality of lifters coupled to an interior surface of the drum;a fluid delivery path at least partially defined within the drum and the plurality of lifters; anda fluid delivery system that delivers fluid into the fluid delivery path in a direction parallel to the generally horizontal rotational axis.2. The front-load laundry appliance of claim 1 , further comprising:a fluid delivery ring that is defined between the tub and the drum, the fluid delivery ring being concentric to a drive shaft of the drum; andan interior gasket operably positioned within the fluid delivery ring, wherein the interior gasket selectively operates to define a fluid channel within the fluid delivery ring.3. The front-load laundry appliance of claim 2 , wherein the interior gasket is minimally engaged with the drum when no fluid is delivered to the plurality of lifters claim 2 , wherein when fluid is delivered through the fluid delivery ring claim 2 , back pressure of the fluid biases the interior gasket against the drum to define the fluid channel within the fluid delivery ring claim 2 , and wherein fluid is delivered through the fluid channel and to the plurality of lifters.4. The front-load laundry appliance of claim 3 , wherein fluid is selectively delivered to the plurality of lifters at least when the drum is rotationally stationary relative to the tub.5. The front-load laundry appliance of claim 2 , wherein the ...

Anti-counterfeiting tag, system and method of manufacturing and authentication therefor

An anti-counterfeiting tag, system and method of manufacturing and authentication therefor are provided. The tag comprises a substrate; and a plurality of layers printed on at least a portion of the substrate; wherein one of said plurality of layers is configured to generate a self-forming three dimensional (3D) raised random pattern comprising physically unclonable function (PUF) and the other layers are configured to facilitate formation of the 3D pattern and/or to protect the formed 3D pattern.

AUTOMATICALLY OPTIMIZING CELL PARAMETER OF SERVING BASE STATION

The present disclosure relates to automatically optimizing cell parameter(s) of serving base station(s) to effectively serve a coverage hole. In an embodiment, the system receives parameters such as at least one first parameter, at least one second parameter, at least one network performance parameter and the at least one cell parameter of the at least one serving base station. Further, based on the at least one network performance parameter, at least one coverage hole is identified from a coverage area (containing a plurality of sectors), wherein the coverage area is served by the at least one serving base station. Thereafter, a first optimization of the at least one cell parameter is performed and subsequently a first value of the at least one second parameter is determined. Further, a second optimization is performed if the first optimization is un-successful. 1300102120300. A method [] for automatically optimising at least one cell parameter of at least one serving base station [] for serving at least one coverage hole [] , the method [] comprising:{'b': '102', 'receiving at least one first parameter, at least one second parameter, at least one network performance parameter and the at least one cell parameter of the at least one serving base station [], wherein the at least one second parameter comprises at least one of a RF coverage power (RSRP) and a Signal-to-Interference Noise Ratio (SINR);'}{'b': 120', '110', '102, 'claim-text': [{'b': 120', '110, 'the at least one coverage hole [] is identified based on the at least one network performance parameter of the coverage area [], and'}, {'b': 120', '102, 'the coverage hole [] is insufficiently served by the at least one serving base station [];'}], 'identifying the at least one coverage hole [] from a coverage area [] served by the at least one serving base station [], wherein'}{'b': 102', '120, 'determining a current value of the at least one second parameter of the at least one serving base station [], wherein ...

Automatically optimising cell parameter of serving base station

The present disclosure relates to automatically optimising cell parameter of serving base station [102] to effectively serve a coverage hole [120]. In an embodiment, the system [200] receives parameters such as least one first parameter, at least one second parameter, at least one network performance parameter and the at least one cell parameter of the at least one serving base station [102]. Further, based on the at least one network performance parameter, at least one coverage hole [120] is identified from a coverage area [110] (containing a plurality of sectors), wherein the coverage area [110] is served by the at least one serving base station [102]. Thereafter, a first optimization of the at least one cell parameter is performed and subsequently a first value of the at least one second parameter is determined. Further, a second optimization is performed if the first optimization is un-successful.

Method of treating hematologic tumors and cancers

Multiple myeloma and other hematologic tumors and/or malignancies can be treated by administration of a G1 and/or S phase drug, which is preferably .beta.-lapachone, or a derivative or analog thereof, combined with a G2/M phase drug such as taxane derivative, which is advantageously paclitaxel. This combination of the G1 and/or S phase drug with the G2/M phase drug results in an unexpectedly greater than additive (i.e., synergistic) apoptosis in multiple myeloma cells. The invention includes methods of treating multiple myeloma by administering the combination of the G1 and/or S phase drug and the G2/M phase drug, pharmaceutical compositions comprising the combination of drugs used in these methods, as well as pharmaceutical kits.

Managing an electronic mail in a communication network

A method, a system and a computer program product for managing an electronic mail in a communication network is disclosed. A plurality of recursive parameters in a command list of a communication protocol associated with the electronic mail is provided. At least one of the recursive parameters is a DATA parameter specifying information of the electronic mail. The command list is partitioned into a plurality of command sub-lists using the plurality of recursive parameters. At least one property corresponding to each of the command sub-lists is preserved. An interface for selecting each of the command sub-lists is provided and at least one of the command sub-lists is selected. At least one property corresponding to each of the command sub-lists is identified.

Systems and methods for cell change based on target cell performance

Systems and methods for a cell change based on target cell performance are disclosed. In some embodiments, a method of operation of a network node in a cellular communications network comprises receiving a measurement report from a wireless device having a serving cell, the measurement report comprising an indication that another cell is better than the serving cell such that the other cell is identified as a target cell for a cell change and the serving cell is identified as a source cell for the cell change. The method further comprises determining whether to perform the cell change from the source cell to the target cell based on one or more parameters indicative of a performance of the target cell. The method further comprises performing the cell change upon determining that the cell change from the source cell to the target cell should be performed.

Hardware apparatuses and methods to switch shadow stack pointers

Methods and apparatuses relating to switching of a shadow stack pointer are described. In one embodiment, a hardware processor includes a hardware decode unit to decode an instruction, and a hardware execution unit to execute the instruction to: pop a token for a thread from a shadow stack, wherein the token includes a shadow stack pointer for the thread with at least one least significant bit (LSB) of the shadow stack pointer overwritten with a bit value of an operating mode of the hardware processor for the thread, remove the bit value in the at least one LSB from the token to generate the shadow stack pointer, and set a current shadow stack pointer to the shadow stack pointer from the token when the operating mode from the token matches a current operating mode of the hardware processor.

Enhanced efficiency of induced pluripotent stem cell generation

Human somatic cells are reprogrammed to become induced pluripotent stem cells (iPS cells) by the introduction of a minicircle DNA vector. Cells of interest include adipose stem cells.

Apparatuses and methods for speculative execution side channel mitigation

Methods and apparatuses relating to mitigations for speculative execution side channels are described. Speculative execution hardware and environments that utilize the mitigations are also described. For example, three indirect branch control mechanisms and their associated hardware are discussed herein: (i) indirect branch restricted speculation (IBRS) to restrict speculation of indirect branches, (ii) single thread indirect branch predictors (STIBP) to prevent indirect branch predictions from being controlled by a sibling thread, and (iii) indirect branch predictor barrier (IBPB) to prevent indirect branch predictions after the barrier from being controlled by software executed before the barrier.

Method of treating hematologic tumors and cancers using beta lapachone

Managing an electronic mail in a communication network

A method for managing an electronic mail. A command list of a communication electronic mail transmission protocol is partitioned into command sub-lists using recursive parameters appearing in the command list prior to the partitioning of the command list. Each recursive parameter is a command that is repeated in respective command sub-lists as a result of the partitioning. Each command sub-list includes at least one command pertaining to a receiver or sender of the electronic mail. Each command sub-list is individually selectable for subsequent use of the at least one command in a subsequently selected command sub-list in implementing the electronic mail. A selection of at least one of the command sub-lists viewable in a user interface is received. Each command of the at least one command specifies a respective aspect of how to implement the electronic mail in a subsequent implementation of the electronic mail.

Non-pertubative measurements of low and null magnetic field in high temperature plasmas.

Sistemas y metodos que faciliten las mediciones no perturbadoras de campo magnetico nulo y bajo en plasmas de temperatura alta.

Automatically optimising cell parameter of serving base station

The present disclosure relates to automatically optimising cell parameter of serving base station [102] to effectively serve a coverage hole [120]. In an embodiment, the system [200] receives parameters such as least one first parameter, at least one second parameter, at least one network performance parameter and the at least one cell parameter of the at least one serving base station [102]. Further, based on the at least one network performance parameter, at least one coverage hole [120] is identified from a coverage area [110] (containing a plurality of sectors), wherein the coverage area [110] is served by the at least one serving base station [102]. Thereafter, a first optimization of the at least one cell parameter is performed and subsequently a first value of the at least one second parameter is determined. Further, a second optimization is performed if the first optimization is un-successful.

System and method for 3d propagation modelling for planning of a radio network

A system and method for 3D propagation modelling for planning of a radio network, is disclosed. In the present invention, automatic tuning of propagation path loss parameters of a Continuous Wave (CW) based 3D propagation model for LOS (line of sight) and NLOS (non-line of sight) radio transmissions in a first geographical area, is performed. Further, in the present invention, 3D propagation models for remaining geographies having similar geographical area and clutter types as the first geographical area, are generated without performing any drive test while compensating the propagation path loss parameters of the generated model using periodically measured user equipment (UE) data. The generated 3D models may be updated dynamically as the 3D models are developed based on UE data updated from time to time.

System and method for automatic deployment of an outdoor small cell

Pde9 inhibitors for treating cardiac failure

The present disclosure relates to PDE9 inhibitors, compositions comprising the PDE9 inhibitors, and methods of using the PDE9 inhibitors and compositions for treatment of cardiac failure.

Hardware apparatuses and methods to switch shadow stack pointers

Methods and apparatuses relating to switching of a shadow stack pointer are described. In one embodiment, a hardware processor includes a hardware decode unit to decode an instruction, and a hardware execution unit to execute the instruction to: pop a token for a thread from a shadow stack, wherein the token includes a shadow stack pointer for the thread with at least one least significant bit (LSB) of the shadow stack pointer overwritten with a bit value of an operating mode of the hardware processor for the thread, remove the bit value in the at least one LSB from the token to generate the shadow stack pointer, and set a current shadow stack pointer to the shadow stack pointer from the token when the operating mode from the token matches a current operating mode of the hardware processor.

Flexible return and event delivery

Techniques for flexible return and event delivery are described. As an example, an exemplary apparatus includes decoder circuitry to decode a single instruction, the single instruction to include a 5 field for an opcode; and execution circuitry to execute the decoded single instruction according to the opcode to cause a return from an event handler while staying in a most privileged level and establish a return context that was in effect before event delivery.

Snow free roof

SNOW FREE ROOF The present invention relates to a system of making roof (1) free from snow which consists of a wooden/ RCC sloppy slab (2), ceramic grooved strip (3), heating filaments (4), detachable metallic/Teflon sheet (5), wire connection (6) and control system (7). In the present disclosure, the top slab of housing is made of RCC or wood (2) and is given slope and as the snow falls over the roof top, the temperature in the coils start increasing due to heating effect of electricity by wire connection (6). Here, the heated Teflon sheet (5) starts melting the lower thin portion of the snow and automatically the whole slab slides down under gravity which prevents the roof from damaging over load. 6 Applicant: Lovely Professional University Sheet No: 1/2 Figure 1 7

Method and apparatus for light-weight virtualization contexts

A processor comprises a register to store a first pointer to a context data structure specifying a virtual machine context, the context data structure comprising a first field to store a second pointer to a plurality of realm switch control structures (RSCSs), and an execution unit comprising a logic circuit to execute a virtual machine (VM) according to the virtual machine context, wherein the VM comprises a guest operating system (OS) comprising a plurality of kernel components, and wherein each RSCS of the plurality of RSCSs specifies a respective component context associated with a respective kernel component of the plurality of kernel components, and execute a first kernel component of the plurality of kernel components using a first component context specified by a first RSCS of the plurality of RSCSs.

Non-pertubative measurements of low and null magnetic field in high temperature plasmas

Systems and methods that facilitate non-pertubative measurements of low and null magnetic field in high temperature plasmas.

Apparatus and method for efficient process-based compartmentalization

An apparatus and method for efficient process-based compartmentalization. For example, one embodiment of a processor comprises: execution circuitry to execute instructions and process data; memory management circuitry coupled to the execution circuitry, the memory management circuitry to manage access to a system memory by a plurality of related processes using one or more process-specific translation structures and one or more shared translation structures to be shared by the related processes; and one or more control registers to store a process-specific base address pointer associated with a first process of the plurality of related processes and to store a shared base address pointer to identify the shared translation structures; wherein the memory management circuitry is to use the process-specific base address pointer in combination with a first linear address provided by the first process to walk the process-specific translation structures to identify any permissions and/or physical address associated with the first linear address, wherein if permissions are identified, the memory management circuitry is to use the permissions in place of any permissions specified in the shared translation structures.

System and method for new issue management for conversion achievement

Methods, systems and computer storage media are disclosed for providing resources to a platform issue. Embodiments describe associating educational resources and an event resource to resolve the platform issue.

Smart lens artifact capture and review reception

Aspects of an embodiment of the present invention disclose a method, computer program product, and computing system that receives, at a processor, a review record comprising an image of an artifact and reference links associated with the artifact, wherein the image is recorded with a smart lens. The present invention also assigns the review record to a reviewer based on a qualification associated with the reviewer and the review record and receives a comment from the reviewer. The method performed in embodiments of the present invention also includes relaying the comment to the smart lens.

Wafer inspection recipe setup

Methods and systems for setting up a wafer inspection recipe are provided. Inspection results produced by complete wafer inspection recipe candidates, each of which includes one or more optical mode candidates with at least one set of defect detection parameters, are compared to determine which of the complete wafer inspection recipe candidates is the best for use as the wafer inspection recipe. The method does not involve making any decisions regarding performance of the complete wafer inspection recipe candidates until after the inspection results have been compared. In other words, the method does not involve selecting optical mode(s) that will be used in the wafer inspection recipe followed by selecting the defect detection parameters for the selected optical mode(s). In this manner, a greater number of optical mode and defect detection parameters can be considered in an efficient manner to determine the best wafer inspection recipe for any given wafer.

Apparatus and method for efficient process-based compartmentalization

An apparatus and method for efficient process-based compartmentalization. For example, one embodiment of a processor comprises: execution circuitry to execute instructions and process data; memory management circuitry coupled to the execution circuitry, the memory management circuitry to manage access to a system memory by a plurality of related processes using one or more process-specific translation structures and one or more shared translation structures to be shared by the related processes; and one or more control registers to store a process-specific base address pointer associated with a first process of the plurality of related processes and to store a shared base address pointer to identify the shared translation structures; wherein the memory management circuitry is to use the process-specific base address pointer in combination with a first linear address provided by the first process to walk the process-specific translation structures to identify any permissions and/or physical address associated with the first linear address, wherein if permissions are identified, the memory management circuitry is to use the permissions in place of any permissions specified in the shared translation structures.

System and method of automatic outdoor small cell planning

A system and method for automatic deployment of at least one outdoor small cell. The method comprises dynamically collecting traffic data corresponding to a geographic location associated with a cellular network by a data collection module [202]. Next, a data collection module [204] automatically identifies a group of spatial grids from the one or more cells within the geographic location based on the traffic data and automatically determines one or more locations within the geographic locations for deploying the at least one outdoor small cell based on the identified group of spatial grids. A backhaul link clearance module [206] automatically determines a backhaul connection between the one or more determined locations with the cellular network. An azimuth planning module [208] automatically determines an azimuth for the at least one outdoor small cell based on the determined connection. A deployment unit [210] deploy the at least one outdoor small cell.

Method of treating hematologic tumors and cancers

Multiple myeloma and other hematologic tumors and/or malignancies can be treated by administration of a G1 and/or S phase drug, which is preferably β-lapachone, or a derivative or analog thereof, combined with a G2/M phase drug such as a taxane derivative, which is advantageously paclitaxel. This combination of the G1 and/or S phase drug with the G2/M phase drug results in an unexpectedly greater than additive (i.e., synergistic) apoptosis in multiple myeloma cells. The invention includes methods of treating multiple myeloma by administering the combination of the G1 and/or S phase drug and the G2/M phase drug, pharmaceutical compositions comprising the combination of drugs used in these methods, as well as pharmaceutical kits.

System and method of aligning at least one antenna at a cell site

A system and method, of aligning at least one antenna at a cell site. The method receives, at an NB-IoT device, a data collection command from a server, based on a successful mapping of said NB-IoT device on a cell site comprising at least antenna. The method then collects, via the NB-IoT device, at least one first set of data relating to a location, based on said received data collection command. Further, the method transmits, via the NB-IoT device, to the server, said collected at least one first set of data. The method then receives, at the NB-IoT device from said server, at least one second set of data, based on said at least one first set of data. Further, the method aligns, said at least one antenna at said cell site, based on said received at least one second set of data.

Management of applications’ access to data resources

A method is described. The method includes receiving, at an intermediary such as a sidecar, a request from an application for a computing resource. The request is authenticated using a sidecar credential. The sidecar credential is verified to authenticate the application to the sidecar. The request is sent from the sidecar to the computing resource. A response from the computing resource is received at the sidecar and relayed from the sidecar to the application.

System and design method of antenna filter unit (afu) of a massive mimo radio unit

The present disclosure relates to an antenna filter unit (AFU) (280) communicatively coupled to a Radio Frequency (RF) Front End Module (RFEM) (250). The AFU (280) comprises a plurality of cavity filters and a Multiple-Input-Multiple-Output (MIMO) antenna unit to enable beam forming to multiple users.

First node and communications system methods performed thereby, for handling a change of a wireless device from a first cell to a second cell

A method, performed by a first node (111) serving a wireless device (130) in a secondary cell group (122), to handle a change of the device (130) from a first cell (123) to a second cell (124). The first node (111) determines (609) whether to proceed or to suspend the change, with the proviso that a probability of RLF at the first cell (123) is under a threshold. The determining (609) is based on whether or not a predicted quality of communication between the wireless device (130) and the second cell (124) exceeds another threshold. The first node (111) sends (610) an indication to a second node (112) indicating to proceed with the change, wherein the first node (111): i) if the result is to proceed with the change, sends the indication, and ii) if the result is to suspend the change, refrains from sending (610) the indication and suspends the change.

System and design method of massive mimo radio unit

The present disclosure relates to an 5G Massive MIMO Radio Unit (MRU) that is connected to a Combined Central and Distributed Unit (CCDU) on front haul interface using 25G optical interface and is compliant to 3 GPP (Third Generation Partnership Project) based ORAN (Open Radio Access Network) specifications. The proposed 5G MRU can include a lower PHY (Physical) portion of LI layer with network layer split of 7.2X, a baseband section, a RF (Radio Frequency) Front End module (RFEM), and an Antenna Filter Unit (AFU) as part of a single enclosure/unit for easy and efficient installation..

Cryptographic artifact generation using virtualized security modules

A pair of virtualized security device initialization data sets are received at a first virtualization server from respective sources prior to a launch of a compute instance at the server. A first virtualized security device is initialized using the data sets, and used to generate cryptographic artifacts used by the compute instance. A data item which was included in one of the data sets is modified after the cryptographic artifacts are generated. Additional cryptographic artifacts are generated by a second virtualized security device at a second virtualization server to which the compute instance has been migrated. The second virtualized security device is initialized using at least the modified data item.

Dynamic code generation utility with configurable connections and variables

A dynamic code generation process with configurable connections and variables for extraction, transformation, and load (ETL) processing and validation is disclosed. A code generator loads an input requirement document and a configuration file, and generates workflows, database objects, and parameters. Database code is deployed in a database, ETL code is deployed in an ETL repository, and server code is deployed in an ETL server. A code validator reads the ETL code from the ETL repository and the database code from the database, and performs in-built stage unit testing. The code validator performs a quality check, metadata validation, definition comparisons, and outputs validation results.

System and design method of high speed transceiver board (hstb) of a massive mimo radio unit

The present invention relates generally to network devices, and more particularly to design and architecture of a high speed transceiver board (HSTB) of a massive multiple-input multiple-output (MIMO) radio unit.

System and method for enabling a standalone outdoor small cell design

The present invention provides an efficient and reliable systems and methods for facilitating standalone mode for an outdoor Small Cell (ODSC) for 5G. The system can be an all-in-one self-contained unit that houses an entire next generation Node B (gNB) functionality including but not limited to radio transceiver, an RF front end as well as antenna. The system may further include a network processor and an FPGA integrated on at least 18 but not limited to the like layers of an Integrated baseband and Transceiver board. The Integrated baseband and Transceiver board may further include a Clock synchronization architecture using system synchronizer IC and clock generators. The system can develop an LI layer and generate a bitstream in the FPGA while providing blind mating and a cable less design.

Virtualization management system and/or operating system attestation from within a virtualized computing instance

A virtualized computing service provides a computing instance capable of requesting attestation of the authenticity of the hypervisor implementing the computing instances. An attestation device included in a virtualization host maintains a log of hash values representing hypervisor versions that have been implemented at the virtualization host. Also, an independent auditor (e.g., attestation service) is provided software configurations that are known to be authentic. The independent auditor generates hash values for the authentic hypervisor versions. The computing instance receives a response from the local attestation device indicating hash values of hypervisor versions currently and/or previously deployed on the virtualization host, and the computing instance forwards the hash values to the independent auditor to authenticate that they match the hash values of the known authentic hypervisor versions. In some embodiments, a similar process may also be used to attest to the authenticity of operating systems used by the computing instance.

Managing occlusion in siamese tracking using structured dropouts

A method for object tracking includes receiving a target image of an object of interest. Latent space features of the target image is modified at a forward pass for a neural network by dropping at least one channel of the latent space features, dropping a channel corresponding to a slice of the latent space features, or dropping one or more features of the latent space features. At the forward pass, a location of the object of interest in a search image is predicted based on the modified latent space features. The location of the object of interest is identified by aggregating predicted locations from the forward pass.

System and method for 3D propagation modelling for planning of a radio network

A system and method for 3D propagation modelling for planning of a radio network, is disclosed. In the present invention, automatic tuning of propagation path loss parameters of a Continuous Wave (CW) based 3D propagation model for LOS (line of sight) and NLOS (non-line of sight) radio transmissions in a first geographical area, is performed. Further, in the present invention, 3D propagation models for remaining geographies having similar geographical area and clutter types as the first geographical area, are generated without performing any drive test while compensating the propagation path loss parameters of the generated model using periodically measured user equipment (UE) data. The generated 3D models may be updated dynamically as the 3D models are developed based on UE data updated from time to time.

Apparatuses and methods for speculative execution side channel mitigation

Methods and apparatuses relating to mitigations for speculative execution side channels are described. Speculative execution hardware and environments that utilize the mitigations are also described. For example, three indirect branch control mechanisms and their associated hardware are discussed herein: (i) indirect branch restricted speculation (IBRS) to restrict speculation of indirect branches, (ii) single thread indirect branch predictors (STIBP) to prevent indirect branch predictions from being controlled by a sibling thread, and (iii) indirect branch predictor barrier (IBPB) to prevent indirect branch predictions after the barrier from being controlled by software executed before the barrier.

System and methods for a cloud-based user-interactive partogram

Methods, systems, and computer-readable media are disclosed herein for generating a user-interactive partogram in a graphical user interface using cloud deployment and multi-application integration.