Computer system and method for managing basic input/output system

一种除错装置及其方法

The device includes a CPU connected to a chip set possessing a pin with function of system management interrupt. The implementing method includes following steps: sending a signal of system management interrupt from pin of system management interrupt in chip set to CPU; CUP enters to system management mode, and executes a operation to jump out debugging operation window; selecting and executing each debugging items; when finishing execution, leaving the debugging operation window, and returning to next command to be executed; after executing each debugging items, CPU returns to operation system, and executes command before debugging right along. Thus, any state of operation system and execution of program will not be influenced, but the method can be utilized in any time to do debugging items.

Management method and system of chip identity information

The invention provides a management method and system of chip identity information. The management method comprises the following steps: providing a read-write buffer by a chip; providing chip information memory space by a basic input output system (BIOS) memory; filling the chip identity information into the read-write buffer provided by the chip; and calling first system management interrupt to drive BIOS firmware to copy the content in the read-write buffer provided by the chip to the chip information memory space provided by the BIOS memory for loading the chip identity information into the chip before subsequent use of the chip. The invention ensures the mainboard architecture to be more concise, can save the cost of EEPROM and has simple and practicable implementation method.

Bus trade collision prevention method and computer system

The invention discloses a method and a computer system for preventing bus transaction from colliding. The computer system comprises a bus, a first main device, a second main device and a processor; the bus comprises a data wire and a clock pulse wire; and the first main device is coupled with the bus. The first main device detects the start stage of a first transaction on the data wire, and when detecting the start stage, the first main device sends an interrupt signal and drives a second transaction of the first main device according to a transaction introduction; the processor is coupled with the first main device and used for receiving interrupt signal, and when receiving the interrupt signal, the processor sends a transaction introduction after certain period of time; and the second main device is coupled with the bus and drives the first transaction to complete within stated time. The invention can avoid the collision between the transactions which non-periodically occupy the bus and ...

Basic input/output system managing computer system and method

Computer system and starting-up method thereof

The invention provides a computer system and a starting method thereof. The computer comprises a central processing unit, a memory controller and a memory unit, wherein the memory unit stores basic input-output system programming codes and operating system programming codes. The method comprises the following steps: the memory controller is started according to preset electric potential in order to read data for initialization from a structure information zone in the memory unit; a read-only memory reading instruction sent by the central processing unit is transmitted to the memory controller finishing initialization; the memory controller converts the format of the read-only memory reading instruction and then loads the basic input-output system programming codes from an invisible zone in the memory unit; and after the loading of the basic input-output system programming codes is finished, the memory controller begins to load the operating system programming codes from a visible zone in ...

Management method and system of chip identity information

The invention provides a management method and system of chip identity information. The management method comprises the following steps: providing a read-write buffer by a chip; providing chip information memory space by a basic input output system (BIOS) memory; filling the chip identity information into the read-write buffer provided by the chip; and calling first system management interrupt todrive BIOS firmware to copy the content in the read-write buffer provided by the chip to the chip information memory space provided by the BIOS memory for loading the chip identity information into the chip before subsequent use of the chip. The invention ensures the mainboard architecture to be more concise, can save the cost of EEPROM and has simple and practicable implementation method.

Computer system and starting-up method thereof

The present invention provides a computer system and a starting method thereof. The computer comprises a central processing unit, a memory controller and a memory unit, wherein the memory unit stores basic input-output system programming codes and operating system programming codes. The method comprises the following steps: the memory controller is started according to preset electric potential in order to read data for initialization from a structure information zone in the memory unit; a read-only memory reading instruction sent by the central processing unit is transmitted to the memory controller finishing initialization; the memory controller converts the format of the read-only memory reading instruction and then loads the basic input-output system programming codes from an invisible zone in the memory unit according to the converted reading instruction of the read-only memory; and after the loading of the basic input-output system programming codes is finished, the memory controller ...

Bus trade collision prevention method and computer system

The invention discloses a method and a computer system for preventing bus transaction from colliding. The computer system comprises a bus, a first main device, a second main device and a processor; the bus comprises a data wire and a clock pulse wire; and the first main device is coupled with the bus. The first main device detects the start stage of a first transaction on the data wire, and when detecting the start stage, the first main device sends an interrupt signal and drives a second transaction of the first main device according to a transaction introduction; the processor is coupled with the first main device and used for receiving interrupt signal, and when receiving the interrupt signal, the processor sends a transaction introduction after certain period of time; and the second main device is coupled with the bus and drives the first transaction to complete within stated time. The invention can avoid the collision between the transactions which non-periodically occupy the busand ...

Method and system for modifying parameters of peripheral controller

固件集线器内存自动检测及读取方法

The automatic firmware hub memory detecting and reading method is used in a computer system, which includes one memory for storing BIOS program codes. The automatic detecting and reading method includes the following steps: testing the maximum data cluster sending reading length of the memory in starting the computer and recording in the maximum reading length, and reading the BIOS program codes stored in the memory in the maximum reading length.