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Применить Всего найдено 2. Отображено 2.
14-05-2020 дата публикации

DEFENSIVE ROUTING AND RELATED TECHNIQUES

Номер: US20200151368A1
Принадлежит:

Techniques are disclosed for defensive routing of guard wires for security-critical wires in an integrated circuit (IC). Defensive routing provides a routing-centric and preventive layout-level defense against IC fabrication time attacks against security-critical wires within an IC. An example methodology implementing the techniques includes identifying at least one security-critical wire in an IC design, identifying at least one unblocked surface of the identified at least one security-critical wire, and guarding the identified at least one surface of the identified at least one security-critical wire with a guard wire. In one example, the guard wire may be a natural guard wire. In another example, the guard wire may be a synthetic guard wire. 1. A method for forming an integrated circuit (IC) structure , the method comprising:identifying at least one security-critical wire in an IC design;identifying at least one unblocked surface of the identified at least one security-critical wire; andguarding the identified at least one surface of the identified at least one security-critical wire with a guard wire.2. The method of claim 1 , wherein the at least one unblocked surface of the identified at least one security-critical wire is identified based on a net blockage metric associated with a GDS2Score.3. The method of claim 1 , wherein the guard wire is in an adjacent layer above or below a layer that includes the identified at least one security-critical wire.4. The method of claim 1 , wherein the guard wire is a synthetic guard wire.5. The method of claim 4 , further comprising routing the synthetic guard wire to at least one input/output (I/O) pin for off-chip tamper analysis.6. The method of claim 4 , further comprising routing the synthetic guard wire to at least one internal sensor for on-chip tamper analysis.7. The method of claim 1 , wherein guarding the identified at least one surface of the identified at least one security-critical wire with a guard wire ...

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14-05-2020 дата публикации

INTEGRATED CIRCUIT (IC) PORTHOLES AND RELATED TECHNIQUES

Номер: US20200152561A1
Принадлежит:

An integrated circuit (IC) structure includes a device layer including a security-critical wire and a metal layer disposed over the device layer. The metal layer includes at least one wire and an IC porthole. The IC porthole has a perimeter that defines a shape such that, when the perimeter of the IC porthole is projected onto the device layer, the projection of the IC porthole perimeter includes at least a segment of the security-critical wire, and the at least one wire in the metal layer does not overlap the security-critical wire within the projection of the IC porthole perimeter to thereby allow post-fabrication optical inspection of the security-critical wire through the IC porthole. 1. An integrated circuit (IC) structure , comprising:a device layer including a security-critical wire; anda metal layer disposed over the device layer, the metal layer including at least one wire and an IC porthole, the IC porthole having a perimeter that defines a shape such that when the perimeter of the IC porthole is projected onto the device layer, the projection of the IC porthole perimeter includes at least a segment of the security-critical wire, wherein the at least one wire in the metal layer does not overlap the security-critical wire within the projection of the IC porthole perimeter to thereby allow post-fabrication optical inspection of the security-critical wire through the IC porthole.2. The IC structure of claim 1 , wherein the security-critical wire is a first security-critical wire claim 1 , the IC porthole is a first IC porthole claim 1 , and further comprising:a second security-critical wire disposed on the device layer; anda second IC porthole defined in the metal layer, the second IC porthole having a perimeter that defines a shape such that when the perimeter of the second IC porthole is projected onto the device layer, the projection of the second IC porthole perimeter includes at least a segment of the second security-critical wire, wherein the at least ...

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