Semiconductor device and manufacture thereof

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Semiconductor integrated circuit device and manufacture thereof

(57)【要約】 【課題】 表配線構造の採用によって弾性構造体を高精 度に安定して配線基板に搭載し、半導体チップの接着工 程を安定させて歩留まりの高い組み立てを行うことがで きる半導体集積回路装置を提供する。 【解決手段】 ボールグリッドアレイ形式の半導体パッ ケージであって、ボンディングパッドが形成された半導 体チップ１、半導体チップ１に接着されるエラストマ ２、エラストマ２に接着され、半導体チップ１のボンデ ィングパッドにリードが接続される配線が形成されたフ レキシブル配線基板３、フレキシブル配線基板３の主面 上に形成されるソルダレジスト４、配線のバンプランド に接続されるはんだバンプ５から構成され、フレキシブ ル配線基板３のテープ９の半導体チップ１側にエラスト マ２が接着され、かつ配線１０のはんだバンプ５側にソ ルダレジスト４が形成された、いわゆる表配線構造とな っている。

Semiconductor device

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Lead on chip semiconductor device and method of fabricating the same

The present invention provides a thin, inexpensive, high-performance semiconductor device provided with busbar leads, power leads and signal leads. A portion of the power lead connected to the busbar lead is depressed toward a major surface of a semiconductor chip to form a depressed portion, and the depressed portion is bonded to the major surface of the semiconductor chip by an adhesive layer. The signal lead and the busbar lead are spaced apart from the major surface of the semiconductor chip.

Insulating adhesive for electronic parts, and lead frame and semiconductor device using the same

An insulating adhesive for electronic parts usable for adhering a semiconductor chip to a lead frame which comprises a resin having (A) a weight average molecular weight (Mw) in terms of polystyrene of 30,000 to 300,000 and (B) a ratio of weight average molecular weight (Mw)/number average molecular weight (Mn) of 5 or less and a solvent and which has (C) a viscosity at 10 rpm of 5,000 to 100,000 mPa.s and a viscosity ratio (θ 1 rpm / θ 10 rpm) of 1.0 to 6.0, as measured with an E type viscometer at 25 °C.

Semiconductor device

As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Semiconductor device and manufacturing method therefor

(57)【要約】 【課題】 チップサイズの半導体装置における低コスト 化および封止性の向上を図る。 【解決手段】 電極パッド１ｂを露出させて半導体チッ プ１の主面１ａ上に配置されたエラストマ３と、一端が リード４ｃを介して半導体チップ１の電極パッド１ｂと 電気的に接続されかつ他端がバンプ電極２と電気的に接 続される配線４ｄが設けられた基板本体部４ａを備える とともに、電極パッド１ｂを露出させる開口部４ｅが設 けられ、かつ開口部４ｅおよび半導体チップ１の外方に 突出する基板突出部４ｂを備えた薄膜配線基板４と、半 導体チップ１の電極パッド１ｂおよび薄膜配線基板４の リード４ｃを封止する封止部５とからなり、薄膜配線基 板４における基板本体部４ａと基板突出部４ｂとが一体 に形成されている。

Plastic molded type semiconductor device and fabrication process thereof

A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold. The semiconductor chip and the die pad are disposed within a cavity of a mold so that the clearance from the reverse surface of the die pad to the inside wall surface of the cavity opposite to the reverse surface of the die pad becomes narrower, by a length corresponding to the thickness of the die pad, than the clearance from the principal surface of the semiconductor chip to the inside wall surface of the cavity opposite to the principal surface of the semiconductor chip; and a resin is poured from a center gate into said cavity to form a plastic mold, which makes it possible to prevent said semiconductor chip from being lifted upwardly by the resin flowing in a filling region on the reverse surface side of the semiconductor chip. As a result, inconvenient shifting of the semiconductor chip, bonding wires and the like in the plastic mold can be prevented, leading to an increase in the yield of the plastic molded type semiconductor device.

Plastic molded type semiconductor device and fabrication process thereof

A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold. The semiconductor chip and the die pad are disposed within a cavity of a mold so that the clearance from the reverse surface of the die pad to the inside wall surface of the cavity opposite to the reverse surface of the die pad becomes narrower, by a length corresponding to the thickness of the die pad, than the clearance from the principal surface of the semiconductor chip to the inside wall surface of the cavity opposite to the principal surface of the semiconductor chip; and a resin is poured from a center gate into said cavity to form a plastic mold, which makes it possible to prevent said semiconductor chip from being lifted upwardly by the resin flowing in a filling region on the reverse surface side of the semiconductor chip. As a result, inconvenient shifting of the semiconductor chip, bonding wires and the like in the plastic mold can be prevented, leading to an increase in the yield of the plastic molded type semiconductor device.

Semiconductor device

As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Semiconductor device, chip-mounted tape carrier used for manufacture of semiconductor device, outer lead bonding method and outer lead bonder

(57)【要約】 【課題】 ＴＡＢリードと金属板リードの接続強度向 上，接続の信頼性の向上。 【解決手段】 パッケージと、前記パッケージの内外に 亘って延在しかつ金属板リードフレームから形成された 複数の金属板リードと、前記パッケージ内に位置する絶 縁性フィルムからなるテープ部と、前記パッケージ内に 位置する半導体チップと、前記テープ部の表面に形成さ れ内端は前記半導体チップの電極に接続され外端は前記 パッケージ内に延在する前記金属板リード端に熱圧着に よって接続される複数のＴＡＢリードとを有する半導体 装置であって、前記ＴＡＢリードの外端の押し潰し部分 はＴＡＢリードの外端に向かって徐々に薄くなってい る。ＴＡＢリード接続用のヒートツールの圧着部分の先 端面（圧着面）は傾斜面になっている。

Semiconductor device

As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Resin-molded semiconductor device having a lead on chip structure

A SEMICONDUCTOR DEVICE IN WHICH INNER LEADS AMONG A PLURALITY OF LEADS (12A) ARE ARRANGED ON A CIRCUIT FORMATION FACE (15) OF A SEMICONDUCTOR CHIP (11) ENCAPSULATED BY A RESIN ENCAPSULATING BODY (10) AND BONDING PADS (14) FORMED ON THE CIRCUIT FORMATION FACE (15) OF THE CHIP AND THE INNER LEADS (12A) ARE ELECTRICALLY CONNECTED. AN ADHESIVE IS SELECTIVELY APPLIED ONLY TO THE INNER LEADS (12AA) ON THE OUTERMOST SIDES ARRANGED ON BOTH ENDS OF THE CHIP (11) AMONG THE PLURALITY OF INNER LEADS. THE CIRCUIT FORMATION FACE (15) OF THE CHIP (11) AND THE INNER LEADS OF THE SELECTED LEADS ARE JOINED WITH THE ADHESIVE. EACH OF THE SELECTED LEADS HAS A STEP ON THE MAIN FACE OF THE SEMICONDUCTOR CHIP AND THE LEADS EXCEPT FOR THE SELECTED LEADS HAVE ALMOST STRAIGHT SHAPES WITHOUT BEING PROCESSED TO HAVE STEPS.

Method for processing semiconductor wafer, method for manufacturing ic card, and carrier

A semiconductor wafer is thinned with an excellent workability without any crack and any warp. The thinning is performed through a first step of preparing a carrier (1) composed of a base material (1a) and a suction pad (1b) provided on one side of the material (1a), a second step of forming a composite wafer (10) by joining a semiconductor wafer (2) to the carrier (1) with the back having no circuit element of the wafer (2) opposite to the carrier (1), and a third step of thinning the wafer (2) by spin-coating the back of the wafer (2) with an etchant while clamping the carrier (1) with the wafer (2) side of the composite wafer (10) up.

Semiconductor device and method for making same

A semiconductor chip (105') is stuck to a substrate (412) with an organic adhesive layer (409) containing conductive particles (406) and electrodes (412) are electrically connected to pads (405) through the particles (406). The chip (105') is produced by a method of rotating at a high speed or horizontally reciprocally moving a semiconductor wafer (105) stuck on a tape (107) to flow etchant on the semiconductor wafer (105) rapidly and horizontally, etching uniformly the semiconductor wafer (105) by the etchant to thin the wafer (105), and dicing the wafer (105) into chips. The thin semiconductor chip (150) is stuck to the substrate (102) by heating and pressing the chip (105') to the substrate (102) by using a heating head (106). Therefore, the semiconductor chip (105') is stably produced at a low cost and is stuck to the substrate (412) without causing cracks in the chip and, as a result, a thin semiconductor device which is hardly destroyed by external bending stresses is obtained.

Semiconductor device with lead structure on principal surface of chip

A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.

Semiconductor device and manufacturing method thereof

A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.

Preheater

Method for mounting a thin semiconductor device

A semiconductor chip ( 105 ′) and a substrate ( 102 ) are bonded with an organic adhesive layer ( 409 ) containing conductive particles ( 406 ), and a pad ( 405 ) and an electrode ( 412 ) are mutually, electrically connected through the conductive particles ( 406 ). The semiconductor chip ( 105 ′) is formed by contacting a semiconductor wafer ( 105 ) attached to a tape ( 107 ) with an etchant while rotating the semiconductor wafer ( 105 ) within an in-plane direction at a high speed or reciprocating the wafer ( 105 ) laterally to uniformly etch the semiconductor wafer ( 105 ) thereby reducing the thickness thereof, and dicing the thus reduced wafer. The resultant thin chip ( 105 ′) is hot-pressed by means of a heating head ( 106 ) for bonding on the substrate ( 102 ). In this way, a thin semiconductor chip can be formed stably at low costs and bonded on a substrate without causing any crack of the chip, thereby obtaining a semiconductor device which is unlikely to break owing to the bending stress from outside.

Plastic molded type semiconductor device and fabrication process thereof

A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold. The semiconductor chip and the die pad are disposed within a cavity of a mold so that the clearance from the reverse surface of the die pad to the inside wall surface of the cavity opposite to the reverse surface of the die pad becomes narrower, by a length corresponding to the thickness of the die pad, than the clearance from the principal surface of the semiconductor chip to the inside wall surface of the cavity opposite to the principal surface of the semiconductor chip; and a resin is poured from a center gate into said cavity to form a plastic mold, which makes it possible to prevent said semiconductor chip from being lifted upwardly by the resin flowing in a filling region on the reverse surface side of the semiconductor chip. As a result, inconvenient shifting of the semiconductor chip, bonding wires and the like in the plastic mold can be prevented, leading to an increase in the yield of the plastic molded type semiconductor device.

Plastic molded type semiconductor device and fabrication process thereof

A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold. The semiconductor chip and the die pad are disposed within a cavity of a mold so that the clearance from the reverse surface of the die pad to the inside wall surface of the cavity opposite to the reverse surface of the die pad becomes narrower, by a length corresponding to the thickness of the die pad, than the clearance from the principal surface of the semiconductor chip to the inside wall surface of the cavity opposite to the principal surface of the semiconductor chip; and a resin is poured from a center gate into said cavity to form a plastic mold, which makes it possible to prevent said semiconductor chip from being lifted upwardly by the resin flowing in a filling region on the reverse surface side of the semiconductor chip. As a result, inconvenient shifting of the semiconductor chip, bonding wires and the like in the plastic mold can be prevented, leading to an increase in the yield of the plastic molded type semiconductor device.

Resin packaged type semiconductor device

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Semiconductor device and method for manufacturing the same

A semiconductor device having power supply leads and signal leads on the main surface of a semiconductor chip. Since floating capacitance applied to the power supply leads can be made large and floating capacitance applied to the signal leads can be made small by making the interval between the signal leads and the semiconductor chip larger than the interval between the power supply leads and the semiconductor chip, the prevention of fluctuations in power source potential and the acceleration of the signal propagation speed can be carried out at the same time. As a result, the electric characteristics of the semiconductor device can be improved.

Semiconductor device

In a semiconductor device having a heat radiation plate, the tips of inner leads connected to a semiconductor chip have a lead width w and a lead thickness t, the width being less than the thickness. The inner leads are secured to the heat radiation plate Fastening the inner leads to the heat radiation plate supports the latter and eliminates the need for suspending leads. A lead pitch p, the lead width w and lead thickness t of the inner lead tips connected to the semiconductor chip have the relations of w<t and p≦1.2t, with the inner leads secured to the heat radiation plate. The heat radiation plate has slits made therein to form radially shaped heat propagation paths between a semiconductor chip mounting area and the inner leads. In a molding member-sealed semiconductor device wherein the semiconductor chip is fixed to the heat radiation plate, the tip thickness t′ of the inner leads is made less than the thickness t of the other portions of the inner leads secured to the heat radiation plate.

Bga semiconductor package

(57)【要約】 【課題】半田ボール搭載によるバンプ形成法では、バン プピッチが狭くなって開口径が小さくなると、半田ボー ルと開口部底部の配線導体面の接触が保てなくなりバン プ形成が困難となる。 【解決手段】開口部底部の配線導体を開口部内に押出し 加工してパッケージ基板の裏面近くまで開口部底部を盛 り上げ、必ず半田ボールが開口部内の配線導体に接触で きる構造とする。このとき、配線導体には半田が濡れ広 がる必要があるため最表面にＡｕめっきを施した。 【効果】狭バンプピッチ・小開口径のμＢＧＡパッケー ジを、片面配線テープ基板を用いて製造可能なため、低 価格化可能である。また、半田ボールサイズを開口径に 関係なく大きな径もの使用できるため半田バンプ高さを 高くでき、また配線導体と半田の接合界面の面積を増加 できるため、半田バンプの実装信頼性を向上できる。

Semiconductor device and manufacturing method thereof

A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.

Semiconductor device and manufacturing method thereof

A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

Semiconductor arrangement in a package with a voltage-absorbing layer

Semiconductor device having all outer leads extending from one side of a resin member

As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Method for processing semiconductor wafer, method for manufacturing ic card, and carrier

A semiconductor wafer is thinned with an excellent workability without any crack and any warp. The thinning is performed through a first step of preparing a carrier (1) composed of a base material (1a) and a suction pad (1b) provided on one side of the material (1a), a second step of forming a composite wafer (10) by joining a semiconductor wafer (2) to the carrier (1) with the back having no circuit element of the wafer (2) opposite to the carrier (1), and a third step of thinning the wafer (2) by spin-coating the back of the wafer (2) with an etchant while clamping the carrier (1) with the wafer (2) side of the composite wafer (10) up.

Semiconductor device with elastic structure and wiring

A semiconductor device including a semiconductor chip having connection terminals in a peripheral part of a main surface thereof; an elastic body disposed on the main surface leaving the connection terminals exposed; an insulating tape formed on the elastic body and having openings in areas where the connection terminals are situated; plural leads formed on the top surface of the insulating tape, one end of each lead being connected to one of the connection terminals and the other end being disposed on the elastic body; plural bump electrodes formed on the other ends of the plural leads; and a resin body for sealing the connection terminals and one end of each of the leads, wherein the insulating tape protrudes beyond the chip where the plural connection terminals are arranged, and wherein the shape of the resin body is restricted by the protruding part of the insulating tape.

Semiconductor chip mfr. - applying first resin layer before and second after dividing wafer into chips

Semiconductor devices are produced by coating the wafer surface with an organic resin layer on top of a layer of a bonding agent before the wafer is divided into chips. The chips are surrounded by a second organic resin layer before they are encapsulated in plastic material. This prevents any detachment of the first organic resin layer form a chip and results in a more efficient encapsulation of integrated circuits.

Semiconductor device

Insulating adhesive for electronic parts, and lead frame and semiconductor device using the same

An insulating adhesive for electronic parts, which is to be used for bonding a semiconductor chip to a lead frame and comprises a resin and a solvent, the resin having (A) a weight average molecular weight (Mw) of 30,000 to 300,000 based on conversion into polystyrene and (B) a ratio of weight average molecular weight (Mw)/number average molecular weight (Mn) of 5 or less, and (C) the insulating adhesive for electronic parts having a viscosity of 5,000 to 100,000 mPa·s at a rotation number of 10 rpm and a viscosity ratio (η1rpm/η10rpm) of 1.0 to 6.0 as measured at 25°C with an E-type viscometer.

Semiconductor device and method for making same

A semiconductor chip ( 105 ′) and a substrate ( 102 ) are bonded with an organic adhesive layer ( 409 ) containing conductive particles ( 406 ), and a pad ( 405 ) and an electrode ( 412 ) are mutually, electrically connected through the conductive particles ( 406 ). The semiconductor chip ( 105 ′) is formed by contacting a semiconductor wafer ( 105 ) attached to a tape ( 107 ) with an etchant while rotating the semiconductor wafer ( 105 ) within an in-plane direction at a high speed or reciprocating the wafer ( 105 ) laterally to uniformly etch the semiconductor wafer ( 105 ) thereby reducing the thickness thereof, and dicing the thus reduced wafer. The resultant thin chip ( 105 ′) is hot-pressed by means of a heating head ( 106 ) for bonding on the substrate ( 102 ). In this way, a thin semiconductor chip can be formed stably at low costs and bonded on a substrate without causing any crack of the chip, thereby obtaining a semiconductor device which is unlikely to break owing to the bending stress from outside.

Semiconductor device

Semiconductor device and method of manufacturing the same

The occurrence of package crack in the vicinity of the rear surface at a die pad part is suppressed by setting the outer dimensions at the die pad part of a lead frame to be smaller than those of a semiconductor chip to be mounted thereon and the occurrence of package crack in the vicinity of the major surface of the semiconductor chip is suppressed by forming an organic layer exhibiting high adhesion to a resin composing the package body on a surface protective film (final passivation film) covering the uppermost layer wiring of the semiconductor chip.

Semiconductor device

Method for sealing semiconductor device

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Wrapping method of semiconductor element

半導体装置の実装方法

【課題】 パッケージの反りが生じても電気的接続不良のない実装及びＢＧＡ半導体装置の実装概外観検査が可能な技術を提供する。 【解決手段】 基板の半導体チップを搭載した面と反対側の面に複数のはんだバンプが設けられたボールグリッドアレイ半導体装置を実装基板に実装し、前記はんだをリフローした時に、前記ボールグリッドアレイ半導体装置の基板の中央部が前記半導体チップを搭載した面と反対側の面方向に凸に反らせて前記実装基板上の電極と前記はんだバンプとを電気的に接続することを特徴とする実装方法である。 【選択図】 図１

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樹脂封止型半導体装置

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Dispositivo a semiconduttore e procedimento per la sua fabbricazione

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電子デバイス検査用コンタクトシートおよびその製造方法

(57)【要約】 【課題】 電子デバイスと検査用回路基板との間に配設 され、電子デバイスの端子部と検査用回路基板の端子部 とを電気的に接続するための、シート状の中間接続用部 材で、 剛性の高い検査用多層回路基板を使わざるをえ ない場合おいて、測定する電子デバイスと検査用回路基 板間の電気接触を確実にできるコンタクトシートを提供 する。 【解決手段】 シート状の絶縁性の基材をベースとし、 基材の表裏面に直交する方向に基材を貫通して表裏を導 通する、導電性でゴム弾性を有するゴム弾性材からなる 表裏導通部を設け、該表裏導通部の一方の面側に電子デ バイスの端子部と接触するための接続用端子部を備え、 且つ、他方の面側に検査用回路基板の端子部と接触する ための接続用端子部を備えたもので、電子デバイスを検 査する際には、表裏導通部箇所において基材の表裏面に 直交する方向に、表裏導通部を介して電子デバイスの端 子部と検査用回路基板の端子部とを電気的に接続するも のである。

半導体装置

【課題】 狭リードピッチのボンディングを安定させ、かつ放熱板を設けた半導体装置のパッケージクラックを防止する。 【解決手段】 放熱板を設けた半導体装置について、半導体チップと接続されるインナーリード先端のリード幅ｗ，リード板厚ｔが、ｗ＜ｔとなっており、前記放熱板にインナーリードを固定する。更に、インナーリードとの固定によって放熱板を支持して吊りリードを排する。半導体チップと接続されるインナーリード先端のリードピッチｐ，リード幅ｗ，リード板厚ｔが、ｗ＜ｔ、ｐ≦１．２ｔとなっており、前記放熱板にインナーリードを固定する。放熱板には半導体チップ搭載領域とインナーリードまでの間に、放熱板の伝熱経路が放射状となる形状に孔を設ける。放熱板に半導体チップを固定し封止体によって封止した半導体装置について、前記インナーリードの先端の板厚ｔ´を他の部分の板厚ｔよりも薄くし、放熱板にインナーリードを固定する。 【選択図】 図６

半導体装置の製造方法

【課題】樹脂パッケージのリフロー・クラック耐性を向上させることのできる技術を提供することである。 【解決手段】半導体ウエハの主面上に最上層配線を形成した後、最上層配線の上部に無機系の絶縁材料からなる表面保護膜を形成し、表面保護膜の上部に有機層を形成する工程、有機層の上部に形成したフォトレジスト膜をマスクにしたエッチングで、最上層配線の上部の有機層と表面保護膜とを開孔することによりボンディングパッドを形成する工程、レジスト除去液を使ってフォトレジスト膜を除去した後、有機層を高温加熱する工程、半導体ウエハをダイシングして半導体チップを得る工程、半導体チップの外形寸法よりも小さい外形寸法を有するダイパッド部を備えたリードフレームを用意し、半導体チップを前記ダイパッド部に搭載する工程、半導体チップおよびダイパッド部を樹脂封止する工程を有する半導体装置の製造方法。 【選択図】図１４

Inspection contact sheet for electronic device and method of fabricating the same

電子デバイス検査用コンタクトシートとその製造方法

【課題】高剛性の検査用回路基板を使う場合でも、測定する電子デバイスと検査用回路基板間の電気接触を確実にでき、且つ量産性に適したコンタクトシートを提供する。 【解決手段】基材は、絶縁性でゴム弾性を有するゴム弾性層の両側に絶縁材層を積層した３層構造の若干の剛性を有するシート状の積層材で、基材の表裏面に直交する方向に基材を貫通する、表裏を導通する金属からなる表裏導通部を設け、基材の一方の面側には、絶縁材層の表面に沿って、配線部を介して表裏導通部から離れた位置に、表裏導通部に接続する接続用端子部を設け、基材の他方の面側には、表裏導通部領域に、表裏導通部をそのベース部とする接続用端子部を設けており、且つ、前記表裏導通部の全体と前記一方の面側の配線部および接続用端子部のベース部は一体として、金属の薄板の片面エッチング加工により表裏導通部の全体を突起部として形成したエッチング部材を形成したものである。 【選択図】　図１

狭ピッチ電極半導体装置

(57)【要約】 【課題】信頼性の高いワイヤボンディングを可能にする ことによって、狭ピッチのパッケージの半導体装置を実 現する。 【解決手段】Ａｕめっき外部電極表面の汚染元素をスパ ッタ及びイオンクリーニング等の物理的方法で除去しＡ ｕ濃度を１５ａｔ％以上に増加させる。 【効果】実際に接合している面積が見かけの接合面積の ５０％以上に増加し、信頼性の高い接合部が得られる。

ボンディング装置

(57)【要約】 【課題】超音波振動方向に対してどのような方向に向い たリードに対しても低チップダメージ接合できるボンデ ィング装置を提供することにある。 【解決手段】超音波振動系ヘッド部２を、ボンディング ツール５と圧電素子１が装着された柱状として、超音波 振動系をワーク設置面に対して回転させて、ボンディン グツールの主超音波振動方向とインナーリードの長手方 向とを平行にさせる。 【効果】インナーリードの方向に関わらず接合性を一様 にできる。

半導体装置

【課題】　小形で、薄く、信頼性の高いＴＣＰ構造を有する半導体装置を得る。 【解決手段】　テープキャリア１のテープ基材１ａに形成されたデバイスホール内に、テープ基材１ａよりも薄い半導体チップ２を配置し、その半導体チップ２の主面および裏面の両方が被覆されるように封止樹脂３で封止した。そして、テープ基材１ａの厚さ方向における半導体チップ２の位置がＴＣＰ全体の応力中立面と一致するようにした。これにより、ＴＣＰから受ける応力が最も小さい位置に半導体チップ２を配置することができる。 【選択図】　図１

電子装置およびその製造方法ならびにボンディング装置

(57)【要約】 【課題】 半導体チップの電極に接続されるリードのピ ッチの狭小化。半導体チップを搭載したテープキャリヤ を用いて裸の半導体チップを搭載する。 【解決手段】 電子装置は、回路基板と、半導体チップ と、前記半導体チップの電極に一端が固定され他端が前 記回路基板の配線に圧着によって固定された複数のリー ドとを有する構成になっている。前記リードの圧着部分 はリードの先端に向かって徐々に薄くなっている。前記 半導体チップの同一辺側の複数のリードは等ピッチでそ れぞれ平行に延在している。製造においては、テープキ ャリヤの各リードの内端を半導体チップの電極に接続し た後、切断刃と圧着面を有するボンディングツールで、 前記リードを切断するとともにリード切断端を回路基板 の配線に圧着して半導体チップを回路基板に搭載する。

The semiconductor device and its manufacturing method

半導体装置及び半導体装置用部材

(57)【要約】 【課題】 有機基板上に半導体素子を搭載し、且つ半導 体素子搭載領域の外側に外部端子領域を配置してなる半 導体装置において、搭載した半導体素子に反りを生じな いようにする。 【解決手段】 有機基板の半導体素子搭載領域周辺に貫 通孔２０を設けた状態にし、半導体素子１０を樹脂封止 するとともに、外部端子領域を除く半導体素子搭載領域 及びその周囲領域の有機基板の両面も前記貫通孔２０を 通して同時に樹脂封止する。半導体素子搭載領域及びそ の周辺領域の両面に樹脂１６が存在する結果、樹脂封止 領域の反り及び外部電極１７の平坦性が良好となり、ま た樹脂封止時に素子がクラックすることがない。

レジンモ−ルド型半導体装置

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

塗布装置

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Packaged semiconductor device having stress absorbing film

Method of fabricating a semiconductor device

The present invention provides a thin, inexpensive, high-performance semiconductor device provided with busbar leads, power leads and signal leads. A portion of the power lead connected to the busbar lead is depressed toward a major surface of a semiconductor chip to form depressed portion, and the depressed portion is bonded to the major surface of the semiconductor chip by an adhesive layer. The signal lead and the busbar lead are spaced apart from the major surface of the semiconductor chip.

クロマチックハーモニカ用加熱装置

【課題】ハーモニカの温度が低い場合でも、呼気中の水分がバルブとリードフレートの接触面に結露せず、バルブがリードプレートに張り付いて音が出難くくならないクロマチックハーモニカ用加熱装置を提供する。【解決手段】クロマチックハーモニカの外周金属部分と接触するように配置された熱拡散部材1、発熱部材2、温度制御装置3、保温部材4、容器5などから構成される。外部電源を温度制御装置3に接続して熱拡散部材1を一定温度に加熱することで、クロマチックハーモニカのリードプレートを体温程度の一定温度に加温し、結露の不具合を解消する。熱拡散部材1と発熱部材2を一つに纏めて、面状発熱部材に置換えることも可能である。【選択図】図１

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