Switched capacitor circuit with current source offset DAC and method

A switched-capacitor sample/hold circuit includes a switched-capacitor input sampling stage and a sample/hold amplifier circuit including an operational amplifier having first and second inputs coupled to first and second input sampling capacitors, respectively, and first and second feedback capacitors coupled between the first and second inputs and first and second outputs of the operational amplifier. A continuous-time offset DAC receives a digital input signal representative of an offset voltage produces first and second offset correction voltages. The first and second offset correction voltages are coupled to the switched-capacitor sample/hold circuit to adjust the amount of pre-charging of the first and second feedback capacitors, respectively, in accordance with the value of the digital input signal to compensate an offset component associated with the and second input voltages. The output of the switched-capacitor sample/hold circuit can be connected to an ADC.