Silicon photonic interposer with two metal redistribution layers

A first metallic trace of a redistribution layer 105 is coated by a dielectric layer 110 with contact openings 120, 125 for contacting a further conductive trace 115 and a bond pad. A first metallic barrier layer 116 is used to form an under bump metallization layer of the bond pad and also a layer of a second conductive trace. The second conductive trace contacts the first conductive trace of the redistribution layer through a via hole 120 formed in the dielectric layer 110. The IC may be a photonic IC.