Under layer composition and method of manufacturing semiconductor device

Under layer composition and methods of manufacturing semiconductor devices are disclosed. The method of manufacturing semiconductor device includes the following steps. A layer of an under layer composition is formed, wherein the under layer composition includes a polymeric material and a cross-linker, and the cross-linker includes at least one decomposable functional group. A curing process is performed on the layer of the under layer composition to form an under layer, wherein the cross-linker is crosslinked with the polymeric material to form a crosslinked polymeric material having the at least one decomposable functional group. A patterned photoresist layer is formed over the under layer. An etching process is performed to transfer a pattern of the patterned photoresist layer to the under layer. The under layer is removed by decomposing the decomposable functional group.

UNDER LAYER COMPOSITION AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Under layer composition and methods of manufacturing semiconductor devices are disclosed. The method of manufacturing semiconductor device includes the following steps. A layer of an under layer composition is formed, wherein the under layer composition includes a polymeric material and a cross-linker, and the cross-linker includes at least one decomposable functional group. A curing process is performed on the layer of the under layer composition to form an under layer, wherein the cross-linker is crosslinked with the polymeric material to form a crosslinked polymeric material having the at least one decomposable functional group. A patterned photoresist layer is formed over the under layer. An etching process is performed to transfer a pattern of the patterned photoresist layer to the under layer. The under layer is removed by decomposing the decomposable functional group.

Negative Tone Developer For Extreme Ultraviolet Lithography

The present disclosure provides NTD developers and corresponding lithography techniques that can overcome resolution, line edge roughness (LER), and sensitivity (RLS) tradeoff barriers particular to extreme ultraviolet (EUV) technologies, thereby achieving high patterning fidelity for advanced technology nodes. An exemplary lithography method includes forming a negative tone resist layer over a workpiece; exposing the negative tone resist layer to EUV radiation; and removing an unexposed portion of the negative tone resist layer in a negative tone developer, thereby forming a patterned negative tone resist layer. The negative tone developer includes an organic solvent having a log P value greater than 1.82. The organic solvent is an ester acetate derivative represented by RCOOR. Rand Rare hydrocarbon chains having four or less carbon atoms. In some implementations, R, R, or both Rand Rare propyl functional groups, such as n-propyl, isopropyl, or 2-methylpropyl. 2. The lithography method of claim 1 , wherein Ris n-propyl and Ris isopropyl.3. The lithography method of claim 1 , wherein Ris isopropyl and Ris n-propyl.4. The lithography method of claim 1 , wherein Ris ethyl and Ris 2-methylpropyl.5. The lithography method of claim 1 , wherein the resist layer includes a negative tone resist material claim 1 , wherein a solubility of the negative tone resist material decreases when exposed to the radiation.6. The lithography method of claim 1 , wherein the exposing the resist layer to radiation includes exposing the resist layer to an extreme ultraviolet (EUV) radiation.7. The lithography method of claim 1 , wherein the exposing the resist layer to radiation includes exposing the resist layer to an electron beam (e-beam).8. The lithography method of claim 1 , wherein the resist layer includes hydroxybenzyl.9. A lithography method comprising:forming a negative tone resist layer over a workpiece;exposing the negative tone resist layer to extreme ultraviolet (EUV) radiation ...

Method for performing lithography process with post treatment

Methods for performing a lithography process are provided. The method for performing a lithography process includes forming a resist layer over a substrate and exposing a portion of the resist layer to form an exposed portion between unexposed portions. The method for performing a lithography process further includes developing the resist layer to remove the exposed portion of the resist layer such that an opening is formed between the unexposed portions and forming a post treatment coating material in the opening and over the unexposed portions of the resist layer. The method for performing a lithography process further includes reacting a portion of the unexposed portions of the resist layer with the post treatment coating material by performing a post treatment process and removing the post treatment coating material.

PHOTORESIST LAYER SURFACE TREATMENT, CAP LAYER, AND METHOD OF FORMING PHOTORESIST PATTERN

A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

Negative tone developer for extreme ultraviolet lithography

The present disclosure provides NTD developers and corresponding lithography techniques that can overcome resolution, line edge roughness (LER), and sensitivity (RLS) tradeoff barriers particular to extreme ultraviolet (EUV) technologies, thereby achieving high patterning fidelity for advanced technology nodes. An exemplary lithography method includes forming a negative tone resist layer over a workpiece; exposing the negative tone resist layer to EUV radiation; and removing an unexposed portion of the negative tone resist layer in a negative tone developer, thereby forming a patterned negative tone resist layer. The negative tone developer includes an organic solvent having a log P value greater than 1.82. The organic solvent is an ester acetate derivative represented by R1COOR2. R1 and R2 are hydrocarbon chains having four or less carbon atoms. In some implementations, R1, R2, or both R1 and R2 are propyl functional groups, such as n-propyl, isopropyl, or 2-methylpropyl.

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE

A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers. The multilayer photoresist structure is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying developer to the selectively exposed multilayer photoresist structure to form the pattern.

Bottom-Up Material Formation for Planarization

The present disclosure provides a method for planarization. The method includes providing a substrate having a top surface and a trench recessed from the top surface; coating a sensitive material layer on the top surface of the substrate, wherein the sensitive material layer fills in the trench; performing an activation treatment to the sensitive material layer so that portions of the material layer are chemically changed; and performing a wet chemical process to the sensitive material layer so that top portions of the sensitive material layer above the trench are removed, wherein remaining portions of the sensitive material layer have top surfaces substantially coplanar with the top surface of the substrate. 1. A method for integrated circuit fabrication , comprising:providing a substrate having a top surface and a trench recessed from the top surface;coating a sensitive material layer on the top surface of the substrate, wherein the sensitive material layer substantially fills-in the trench;performing an activation treatment to the sensitive material layer so that portions of the material layer are chemically changed; andperforming a wet chemical process to the sensitive material layer so that top portions of the sensitive material layer above the trench are removed, wherein remaining portions of the sensitive material layer have top surfaces substantially coplanar with the top surface of the substrate.2. The method of claim 1 , prior to the coating of the sensitive material layer claim 1 , further comprising:performing an acid treatment to the top surface of the substrate and the trench; andperforming a first rinse process to the top surface of the substrate and the trench, thereby resulting in an acid layer on the substrate and the trench, wherein the acid layer is conformal to the top surface of the substrate and the trench.3. The method of claim 2 , wherein the coating of the sensitive material layer includes coating an acid sensitive material layer directly ...

Photoresist layer surface treatment, cap layer, and method of forming photoresist pattern

A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

Conformal Middle Layer For A Lithography Process

A method includes performing a first polymerization process on a monomer solution to form a partially processed resin solution, the partially processed resin solution comprising a solvent and a silicon-based resin, spin coating the partially processed resin solution on a substrate, and performing a second polymerization process on the partially processed resin solution to shrink the partially processed resin solution to form a conformal silicon-based resin layer.

Lithography Techniques for Reducing Resist Swelling

The present disclosure provides lithography resist materials and corresponding lithography techniques for improving lithography resolution, in particular, by reducing swelling of resist layers during development. An exemplary lithography method includes performing a treatment process on a resist layer to cause cross-linking of acid labile group components of the resist layer via cross-linkable functional components, performing an exposure process on the resist layer, and performing a development process on the resist layer. In some implementations, the resist layer includes an exposed portion and an unexposed portion after the exposure process, and the treatment process reduces solubility of the unexposed portion to a developer used during the development process by increasing a molecular weight of a polymer in the unexposed portion. The treatment process is performed before or after the exposure process. The treatment process can include performing a thermal treatment and/or an electromagnetic wave treatment to heat the resist layer. 1. A lithography method comprising:performing a treatment process on a resist layer to cause cross-linking of acid labile group (ALG) components of the resist layer via cross-linkable functional components;performing an exposure process on the resist layer; andperforming a development process on the resist layer, thereby forming a patterned resist layer over a workpiece.2. The lithography method of claim 1 , wherein the resist layer includes an exposed portion and an unexposed portion after the exposure process claim 1 , and further wherein the treatment process reduces solubility of the unexposed portion to a developer used during the development process by increasing a molecular weight of a polymer in the unexposed portion.3. The lithography method of claim 2 , wherein the developer removes the exposed portion.4. The lithography method of claim 1 , wherein the treatment process is performed before performing the exposure process.5. ...

Photoresist layer outgassing prevention

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate and forming a dehydrated film over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form an exposed portion and an unexposed portion of the photoresist layer. The photoresist layer is developed to remove the unexposed portion of the photoresist layer and a first portion of the dehydrated film over the unexposed portion of the photoresist layer. In an embodiment, the method includes etching the substrate by using the exposed portion of the photoresist layer as a mask.

Lithography process using photoresist material with photosensitive functional group

Methods for forming a semiconductor structure including using a photoresist material are provided. The method for forming a semiconductor structure includes forming a material layer over a substrate and forming a photoresist layer over the material layer. The method for forming a semiconductor structure further includes performing an exposure process on the photoresist layer and developing the photoresist layer. In addition, the photoresist layer is made of a photoresist material comprising a photosensitive polymer, and the photosensitive polymer has a first photosensitive functional group bonding to a main chain of the photosensitive polymer and a first acid labile group bonding to the first photosensitive functional group.

Formation of semiconductor structure with a photoresist cross link and de-cross link process

Methods of fabricating a semiconductor structure using a photoresist cross link process and a photoresist de-cross link process are described. A cross link bottom layer is employed during the fabricating process and the photoresist de-cross link process de-cross links the cross link bottom layer before the bottom layer is removed. The incorporation of the photoresist de-cross link process with the usage of the cross link bottom layer provides a cost effective and low defect level solution to fabricate the semiconductor structure.

Method for performing lithography process with post treatment

Methods for performing a lithography process are provided. The method for performing a lithography process includes forming a resist layer over a substrate and exposing a portion of the resist layer to form an exposed portion between unexposed portions. The method for performing a lithography process further includes developing the resist layer to remove the exposed portion of the resist layer such that an opening is formed between the unexposed portions and forming a post treatment coating material in the opening and over the unexposed portions of the resist layer. The method for performing a lithography process further includes reacting a portion of the unexposed portions of the resist layer with the post treatment coating material by performing a post treatment process and removing the post treatment coating material.

Lithography method for positive tone development

A lithography method includes forming a resist layer over a substrate. The resist layer is exposed to radiation. The exposed resist layer is developed using a developer that removes an exposed portion of the exposed resist layer, thereby forming a patterned resist layer. The patterned resist layer is rinsed using a basic aqueous rinse solution.

Lithography Techniques for Reducing Resist Swelling

The present disclosure provides lithography resist materials and corresponding lithography techniques for improving lithography resolution, in particular, by reducing swelling of resist layers during development. An exemplary lithography method includes performing a treatment process on a resist layer to cause cross-linking of acid labile group components of the resist layer via cross-linkable functional components, performing an exposure process on the resist layer, and performing a development process on the resist layer. In some implementations, the resist layer includes an exposed portion and an unexposed portion after the exposure process, and the treatment process reduces solubility of the unexposed portion to a developer used during the development process by increasing a molecular weight of a polymer in the unexposed portion. The treatment process is performed before or after the exposure process. The treatment process can include performing a thermal treatment and/or an electromagnetic wave treatment to heat the resist layer. 1. A lithography method comprising:performing a treatment process on a resist layer, the resist layer including acid labile group (ALG) components bonded to cross-linkable functional components, wherein the cross-linkable functional components are cross-linked to one another during the treatment process, and wherein the cross-linkable functional components include at least one of epoxy, alkene, alkyne, methoxyl, glycidyl ether, alkyl oxide, or triazene;performing an exposure process on the resist layer; andperforming a development process on the resist layer, thereby forming a patterned resist layer.2. The lithography method of claim 1 , wherein the ALG components are cross-linked to one another via the cross-linking of the cross-linkable functional components.3. The lithography method of claim 1 , wherein the ALG components include at least one of tert-butoxycarbonyl claim 1 , methylcyclopentyl claim 1 , or ethylcyclopentyl.4. The ...

Method of manufacturing a semiconductor device

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

Bump structure and method of manufacturing bump structure

A method of manufacturing a bump structure includes forming a passivation layer over a substrate. A metal pad structure is formed over the substrate, wherein the passivation layer surrounds the metal pad structure. A polyimide layer including a polyimide is formed over the passivation layer and the metal pad structure. A metal bump is formed over the metal pad structure and the polyimide layer. The polyimide is a reaction product of a dianhydride and a diamine, wherein at least one of the dianhydride and the diamine comprises one selected from the group consisting of a cycloalkane, a fused ring, a bicycloalkane, a tricycloalkane, a bicycloalkene, a tricycloalkene, a spiroalkane, and a heterocyclic ring.

Bump structure and method of manufacturing bump structure

A method of manufacturing a bump structure includes forming a passivation layer over a substrate. A metal pad structure is formed over the substrate, wherein the passivation layer surrounds the metal pad structure. A polyimide layer including a polyimide is formed over the passivation layer and the metal pad structure. A metal bump is formed over the metal pad structure and the polyimide layer. The polyimide is a reaction product of a dianhydride and a diamine, wherein at least one of the dianhydride and the diamine comprises one selected from the group consisting of a cycloalkane, a fused ring, a bicycloalkane, a tricycloalkane, a bicycloalkene, a tricycloalkene, a spiroalkane, and a heterocyclic ring.

Method of manufacturing a semiconductor device

A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers. The multilayer photoresist structure is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying developer to the selectively exposed multilayer photoresist structure to form the pattern.

Method for forming semiconductor structure

A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a resist layer over the material layer. The resist layer includes an inorganic material and an auxiliary. The inorganic material includes a plurality of metallic cores and a plurality of first linkers bonded to the metallic cores. The method includes exposing a portion of the resist layer. The resist layer includes an exposed region and an unexposed region. In the exposed region, the auxiliary reacts with the first linkers. The method also includes removing the unexposed region of the resist layer by using a developer to form a patterned resist layer. The developer includes a ketone-based solvent having a formula (a) or the ester-based solvent having a formula (b).

Extreme ultraviolet lithography system

Semiconductor systems, apparatuses and methods are provided. In one embodiment, an extreme ultraviolet lithography system includes a substrate stage configured to secure a substrate at a first vertical level, wherein the substrate is deposited with a resist layer thereon; at least one electrode positioned at a second vertical level above the first vertical level; and a power source configured to apply an electric field across the at least one electrode and the substrate stage, including across a thickness of the resist layer when the substrate is secured on the substrate stage.

Negative tone developer for extreme ultraviolet lithography

The present disclosure provides NTD developers and corresponding lithography techniques that can overcome resolution, line edge roughness (LER), and sensitivity (RLS) tradeoff barriers particular to extreme ultraviolet (EUV) technologies, thereby achieving high patterning fidelity for advanced technology nodes. An exemplary lithography method includes forming a negative tone resist layer over a workpiece; exposing the negative tone resist layer to EUV radiation; and removing an unexposed portion of the negative tone resist layer in a negative tone developer, thereby forming a patterned negative tone resist layer. The negative tone developer includes an organic solvent having a log P value greater than 1.82. The organic solvent is an ester acetate derivative represented by R1COOR2. R1 and R2 are hydrocarbon chains having four or less carbon atoms. In some implementations, R1, R2, or both R1 and R2 are propyl functional groups, such as n-propyl, isopropyl, or 2-methylpropyl.

Lithography techniques for reducing resist swelling

The present disclosure provides lithography resist materials and corresponding lithography techniques for improving lithography resolution, in particular, by reducing swelling of resist layers during development. An exemplary lithography method includes performing a treatment process on a resist layer to cause cross-linking of acid labile group components of the resist layer via cross-linkable functional components, performing an exposure process on the resist layer, and performing a development process on the resist layer. In some implementations, the resist layer includes an exposed portion and an unexposed portion after the exposure process, and the treatment process reduces solubility of the unexposed portion to a developer used during the development process by increasing a molecular weight of a polymer in the unexposed portion. The treatment process is performed before or after the exposure process. The treatment process can include performing a thermal treatment and/or an electromagnetic ...

Topographic planarization method for lithography process

Topographic planarization methods for a lithography process are provided. The method includes providing a substrate having a topography surface. A planarization stack is formed over the topography surface of the substrate. The optical material stack includes a first optical material layer and an overlying second optical material layer, and the first optical material layer has a higher etching rate than the second optical material layer with respect to an etchant. The planarization stack is etched using the etchant to entirely remove the second optical material layer and partially remove the first optical material layer, such that the remaining first optical material layer has a substantially planar surface over the topography surface of the substrate.

Negative Tone Developer for Extreme Ultraviolet Lithography

The present disclosure provides NTD developers and corresponding lithography techniques that can overcome resolution, line edge roughness (LER), and sensitivity (RLS) tradeoff barriers particular to extreme ultraviolet (EUV) technologies, thereby achieving high patterning fidelity for advanced technology nodes. An exemplary lithography method includes forming a negative tone resist layer over a workpiece; exposing the negative tone resist layer to EUV radiation; and removing an unexposed portion of the negative tone resist layer in a negative tone developer, thereby forming a patterned negative tone resist layer. The negative tone developer includes an organic solvent having a log P value greater than 1.82. The organic solvent is an ester acetate derivative represented by RCOOR. Rand Rare hydrocarbon chains having four or less carbon atoms. In some implementations, R, R, or both Rand Rare propyl functional groups, such as n-propyl, isopropyl, or 2-methylpropyl. 2. The lithography developing composition of claim 1 , wherein Ris n-propyl and Ris isopropyl.3. The lithography developing composition of claim 1 , wherein Ris isopropyl and Ris n-propyl.4. The lithography developing composition of claim 1 , wherein Ris ethyl and Ris 2-methylpropyl.5. The lithography developing composition of claim 1 , further configured for removing a resist layer that includes hydroxybenzyl.6. The lithography developing composition of claim 1 , further configured to remove an unexposed portion of a resist layer without removing an exposed portion of the resist layer claim 1 , wherein the exposed portion of the resist layer is exposed to extreme ultraviolet (EUV) radiation.7. The lithography developing composition of claim 1 , further configured to remove an unexposed portion of a resist layer without removing an exposed portion of the resist layer claim 1 , wherein the exposed portion of the resist layer is exposed to an electron beam (e-beam).8. The lithography developing composition of ...

Bottom-up material formation for planarization

The present disclosure provides a method for planarization. The method includes providing a substrate having a top surface and a trench recessed from the top surface; coating a sensitive material layer on the top surface of the substrate, wherein the sensitive material layer fills in the trench; performing an activation treatment to the sensitive material layer so that portions of the material layer are chemically changed; and performing a wet chemical process to the sensitive material layer so that top portions of the sensitive material layer above the trench are removed, wherein remaining portions of the sensitive material layer have top surfaces substantially coplanar with the top surface of the substrate.

Lithography techniques for reducing resist swelling

The present disclosure provides lithography resist materials and corresponding lithography techniques for improving lithography resolution, in particular, by reducing swelling of resist layers during development. An exemplary lithography method includes performing a treatment process on a resist layer to cause cross-linking of acid labile group components of the resist layer via cross-linkable functional components, performing an exposure process on the resist layer, and performing a development process on the resist layer. In some implementations, the resist layer includes an exposed portion and an unexposed portion after the exposure process, and the treatment process reduces solubility of the unexposed portion to a developer used during the development process by increasing a molecular weight of a polymer in the unexposed portion. The treatment process is performed before or after the exposure process. The treatment process can include performing a thermal treatment and/or an electromagnetic ...

Extreme Ultraviolet Lithography System

Semiconductor systems, apparatuses and methods are provided. In one embodiment, an extreme ultraviolet lithography system includes a substrate stage configured to secure a substrate at a first vertical level, wherein the substrate is deposited with a resist layer thereon; at least one electrode positioned at a second vertical level above the first vertical level; and a power source configured to apply an electric field across the at least one electrode and the substrate stage, including across a thickness of the resist layer when the substrate is secured on the substrate stage.

METHOD FOR FORMING SEMICONDUCTOR STRUCTURE

A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a resist layer over the material layer. The resist layer includes an inorganic material and an auxiliary. The inorganic material includes a plurality of metallic cores and a plurality of first linkers bonded to the metallic cores. The method includes exposing a portion of the resist layer. The resist layer includes an exposed region and an unexposed region. In the exposed region, the auxiliary reacts with the first linkers. The method also includes removing the unexposed region of the resist layer by using a developer to form a patterned resist layer. The developer includes a ketone-based solvent having a formula (a) or the ester-based solvent having a formula (b). 2. The method for forming the semiconductor structure as claimed in claim 1 , wherein Ris CH claim 1 , and Ris linear or branched C-Calkyl claim 1 , or linear or branched C-Calkoxy.3. The method for forming the semiconductor structure as claimed in claim 1 , wherein Ris CH claim 1 , and Ris linear or branched Calkyl.4. The method for forming the semiconductor structure as claimed in claim 1 , wherein Ris CH claim 1 , and Ris linear or branched C-Calkyl.5. The method for forming the semiconductor structure as claimed in claim 1 , wherein Ris CH claim 1 , and Ris linear or branched C-Calkyl.6. The method for forming the semiconductor structure as claimed in claim 1 , wherein Ris CH claim 1 , and Ris linear Calkyl.7. The method for forming the semiconductor structure as claimed in claim 1 , wherein Ris CHO claim 1 , and Ris linear or branched C-Calkyl.8. The method for forming the semiconductor structure as claimed in claim 1 , wherein the auxiliary comprises a plurality of second linkers claim 1 , and the second linkers react with the first linkers during the exposure process to form a plurality of chemical bonds between the auxiliary and the inorganic material.9. The ...

Method for performing lithography process with post treatment

Methods for performing a lithography process are provided. The method for performing a lithography process includes forming a resist layer over a substrate and exposing a portion of the resist layer to form an exposed portion between unexposed portions. The method for performing a lithography process further includes developing the resist layer to remove the exposed portion of the resist layer such that an opening is formed between the unexposed portions and forming a post treatment coating material in the opening and over the unexposed portions of the resist layer. The method for performing a lithography process further includes reacting a portion of the unexposed portions of the resist layer with the post treatment coating material by performing a post treatment process and removing the post treatment coating material.

Topographic planarization method for lithography process

Topographic planarization methods for a lithography process are provided. The method includes providing a substrate having a topography surface. A planarization stack is formed over the topography surface of the substrate. The optical material stack includes a first optical material layer and an overlying second optical material layer, and the first optical material layer has a higher etching rate than the second optical material layer with respect to an etchant. The planarization stack is etched using the etchant to entirely remove the second optical material layer and partially remove the first optical material layer, such that the remaining first optical material layer has a substantially planar surface over the topography surface of the substrate.

UNDERLAYER COMPOSITION AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE

A method for manufacturing a semiconductor device includes forming a resist underlayer over a substrate. The resist underlayer includes an underlayer composition, including: a polymer with pendant photoacid generator (PAG) groups, pendant thermal acid generator (TAG) groups, a combination of pendant PAG and pendant TAG groups, pendant photobase generator (PBG) groups, pendant thermal base generator (TBG) groups, or a combination of pendant PBG and pendant TBG groups. A photoresist layer including a photoresist composition is formed over the resist underlayer. The photoresist layer is selectively exposed to actinic radiation. The selectively exposed photoresist layer is developed to form a pattern in the photoresist layer. 1. A method for manufacturing a semiconductor device , comprising:forming a resist underlayer over a substrate,wherein the resist underlayer includes an underlayer composition, comprising: a polymer with pendant photoacid generator (PAG) groups, pendant thermal acid generator (TAG) groups, a combination of pendant PAG and pendant TAG groups, pendant photobase generator (PBG) groups, pendant thermal base generator (TBG) groups, or a combination of pendant PBG and pendant TBG groups;forming a photoresist layer comprising a photoresist composition over the resist underlayer;selectively exposing the photoresist layer to actinic radiation; anddeveloping the selectively exposed photoresist layer to form a pattern in the photoresist layer.2. The method according to claim 1 , further comprising heating the resist underlayer before forming the photoresist layer.3. The method according to claim 1 , wherein the actinic radiation has a wavelength of less than 250 nm.4. The method according to claim 1 , wherein the polymer is formed from one or more monomers selected from the group consisting of acrylates claim 1 , acrylic acids claim 1 , siloxanes claim 1 , hydroxystyrenes claim 1 , methacrylates claim 1 , vinyl esters claim 1 , maleic esters claim 1 , ...

LITHOGRAPHY TECHNIQUES FOR REDUCING DEFECTS

A lithography method is described. The method includes forming a resist layer over a substrate, performing a treatment on the resist layer to form an upper portion of the resist layer having a first molecular weight and a lower portion of the resist layer having a second molecular weight less than the first molecular weight, performing an exposure process on the resist layer, and performing a developing process on the resist layer to form a patterned resist layer. 1. A lithography method , comprising:forming a resist layer over a substrate;performing a treatment on the resist layer to form an upper portion of the resist layer having a first molecular weight and a lower portion of the resist layer having a second molecular weight less than the first molecular weight;performing an exposure process on the resist layer; andperforming a developing process on the resist layer to form a patterned resist layer.2. The lithography method of claim 1 , wherein the resist layer comprises a cross-linker prior to the developing process.3. The lithography method of claim 2 , wherein the cross-linker is a fluorine containing cross-linker.4. The lithography method of claim 1 , wherein the treatment comprises exposing the resist layer to an electromagnetic wave.5. The lithography method of claim 4 , wherein the electromagnetic wave comprises ultraviolet light.6. The lithography method of claim 1 , wherein the resist layer further comprises a thermal radical initiator and the treatment comprises heating the resist layer.7. The lithography method of claim 6 , wherein the resist layer is heated to a first temperature less than about 150 degrees Celsius.8. The lithography method of claim 7 , further comprising a post exposure bake process after the exposure process and before the developing process claim 7 , wherein the post exposure bake process comprising heating the resist layer to a second temperature greater than the first temperature.9. A lithography method claim 7 , comprising: ...

Lithography process using photoresist material with photosensitive functional group

Methods for forming a semiconductor structure including using a photoresist material are provided. The method for forming a semiconductor structure includes forming a material layer over a substrate and forming a photoresist layer over the material layer. The method for forming a semiconductor structure further includes performing an exposure process on the photoresist layer and developing the photoresist layer. In addition, the photoresist layer is made of a photoresist material comprising a photosensitive polymer, and the photosensitive polymer has a first photosensitive functional group bonding to a main chain of the photosensitive polymer and a first acid labile group bonding to the first photosensitive functional group.

Lithography method for positive tone development

A lithography method includes forming a resist layer over a substrate. The resist layer is exposed to radiation. The exposed resist layer is developed using a developer that removes an exposed portion of the exposed resist layer, thereby forming a patterned resist layer. The patterned resist layer is rinsed using a basic aqueous rinse solution.

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. 1. A method of manufacturing a semiconductor device , comprising: combining a first precursor and a second precursor in a vapor state to form a photoresist material, and', 'depositing the photoresist material over the substrate;, 'forming a photoresist layer over a substrate, comprisingforming a protective layer over the photoresist layer;selectively exposing the photoresist layer to actinic radiation through the protective layer to form a latent pattern in the photoresist layer;removing the protective layer; anddeveloping the latent pattern by applying a developer to the selectively exposed photoresist layer to form a pattern.2. The method according to claim 1 , wherein the protective layer comprises a hydrophilic polymer.3. The method according to claim 1 , wherein the protective layer comprises a hydrophobic polymer.4. The method accoring to wherein the protective layer comprises a polymer selected from the group consisting of a polyvinyl alcohol claim 1 , a polyacrylic acid claim 1 , a polymethylmethacrylate claim 1 , a polyacrylamide claim 1 , a polytetrafluoroethylene claim 1 , a polyethylene claim 1 , a polypropylene claim 1 , a polystyrene claim 1 , a polyhydroxystyrene claim 1 , a polymethylacrylic acid claim 1 , and combinations thereof.5. The method according to claim 1 , wherein the forming a protective layer over the photoresist ...

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE

Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MRX, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1≤a≤2, b≥1, c≥1, and b+c≤5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern. 1. A method of manufacturing a semiconductor device , comprising: combining a first precursor and a second precursor in a vapor state to form a photoresist material,', {'br': None, 'sub': a', 'b', 'c, 'MRX'}, 'wherein the first precursor is an organometallic having a formula, 'where M is at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, or Lu,', 'R is a substituted or unsubstituted alkyl, alkenyl, or carboxylate group,', 'X is a halide or sulfonate group, and', '1≤a≤2, b≥1, c≥1, and b+c≤5, and', 'the second precursor is at least one of an amine, a borane, or a phosphine; and', 'depositing the photoresist material over the substrate;, 'forming a photoresist layer over a substrate, comprisingselectively exposing the photoresist layer to actinic radiation to form a latent pattern; anddeveloping the latent pattern by applying a developer to the selectively exposed photoresist layer to form a pattern.2. The method according to claim 1 , wherein the actinic radiation is extreme ultraviolet radiation.3. The method according to claim 1 , further comprising ...

PHOTORESIST LAYER SURFACE TREATMENT, CAP LAYER, AND METHOD OF FORMING PHOTORESIST PATTERN

A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. 1. A method of forming a pattern in a photoresist layer , comprising:forming a photoresist layer over a substrate;reducing moisture or oxygen absorption characteristics of the photoresist layer;selectively exposing the photoresist layer to actinic radiation to form a latent pattern; anddeveloping the latent pattern by applying a developer to the selectively exposed photoresist layer to form a pattern.2. The method according to claim 1 , wherein the photoresist layer comprises a metal-containing photoresist composition.3. The method according to claim 2 , wherein the reducing moisture or oxygen absorption characteristics of the photoresist layer comprises forming a cap layer over the photoresist layer claim 2 , wherein the cap layer is made of a silicon oxide claim 2 , a silicon nitride claim 2 , a silicon carbide claim 2 , SiOC claim 2 , SiON claim 2 , or multilayer combinations thereof.4. The method according to claim 3 , wherein the cap layer is a monolayer.5. The method according to claim 3 , wherein the cap layer is formed by chemical vapor deposition or atomic layer deposition.6. The method according to claim 2 , wherein the reducing moisture or oxygen absorption characteristics of the photoresist layer comprises performing a surface treatment to a surface of the photoresist layer.7. The method according to claim 6 , wherein the surface treatment comprises reacting end groups of ligands in the photoresist layer with ammonia claim 6 , a silane claim 6 , an alkyl halide claim 6 , a silicon halide claim 6 , an amino alkyls claim 6 , or carboxyl alkyls.8. The ...

Method for performing lithography process with post treatment

Methods for performing a lithography process are provided. The method for performing a lithography process includes forming a resist layer over a substrate and exposing a portion of the resist layer to form an exposed portion between unexposed portions. The method for performing a lithography process further includes developing the resist layer to remove the exposed portion of the resist layer such that an opening is formed between the unexposed portions and forming a post treatment coating material in the opening and over the unexposed portions of the resist layer. The method for performing a lithography process further includes reacting a portion of the unexposed portions of the resist layer with the post treatment coating material by performing a post treatment process and removing the post treatment coating material.

Bump structure and method of manufacturing bump structure

A method of manufacturing a bump structure includes forming a passivation layer over a substrate. A metal pad structure is formed over the substrate, wherein the passivation layer surrounds the metal pad structure. A polyimide layer including a polyimide is formed over the passivation layer and the metal pad structure. A metal bump is formed over the metal pad structure and the polyimide layer. The polyimide is a reaction product of a dianhydride and a diamine, wherein at least one of the dianhydride and the diamine comprises one selected from the group consisting of a cycloalkane, a fused ring, a bicycloalkane, a tricycloalkane, a bicycloalkene, a tricycloalkene, a spiroalkane, and a heterocyclic ring.

Method for forming semiconductor structure

A method for forming a semiconductor device structure is provided. The method includes forming a resist layer over a material layer, the resist layer includes an inorganic material. The inorganic material includes a plurality of metallic cores and a plurality of first linkers bonded to the metallic cores. The method includes forming a modified layer over the resist layer, and the modified layer includes an auxiliary. The method includes performing an exposure process on the modified layer and the resist layer, and removing a portion of the modified layer and a first portion of the resist layer by a first developer. The first developer includes a ketone-based solvent having a substituted or unsubstituted C6-C7 cyclic ketone, an ester-based solvent having a formula (b), or a combination thereof.

Underlayer composition and method of manufacturing a semiconductor device

A polymer composition comprises a polymer having a main chain and pendant photobase generator (PBG) groups, pendant thermal base generator (TBG) groups, or a combination of pendant PBG and pendant TBG groups.

Method of manufacturing a semiconductor device

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

Verfahren zur herstellung einer halbleitervorrichtung

Ein Verfahren zur Herstellung einer Halbleitervorrichtung umfasst ein Ausbilden einer Mehrschicht-Photoresiststruktur mit einem metallhaltigen Photoresist über einem Substrat. Die Mehrschicht-Photoresiststruktur weist zwei oder mehr metallhaltige Photoresistschichten mit unterschiedlichen physischen Parametern auf. Der metallhaltige Photoresist ist ein Reaktionsprodukt eines ersten Vorläufers und eines zweiten Vorläufers, und jede Schicht der Mehrschicht-Photoresiststruktur wird unter Verwendung unterschiedlicher Photoresist-Ausbildungsparameter ausgebildet. Die unterschiedlichen Photoresist-Ausbildungsparameter sind eines oder mehrere, ausgewählt aus der Gruppe bestehend aus dem ersten Vorläufer, einer Menge des ersten Vorläufers, dem zweiten Vorläufer, einer Menge des zweiten Vorläufers, einer Zeitdauer für jeden Photoresistschicht-Ausbildungsvorgang und den Erwärmungsbedingungen der Photoresistschichten. Die Mehrschicht-Photoresiststruktur wird selektiv mit aktinischer Strahlung belichtet, um eine vorläufige Struktur auszubilden, und die vorläufige Struktur wird entwickelt, indem Entwickler auf die selektiv belichtete Mehrschicht-Photoresiststruktur aufgebracht wird, so dass die Struktur ausgebildet ist.

Ball game target gate

Höckerstruktur und herstellungsverfahren einer höckerstruktur

Ein Verfahren zur Herstellung einer Höckerstruktur umfasst das Bilden einer Passivierungsschicht über einem Substrat. Eine Metallpadstruktur wird über dem Substrat gebildet, wobei die Passivierungsschicht die Metallpadstruktur umgibt. Eine Polyimidschicht, die ein Polyimid enthält, wird über der Passivierungsschicht und der Metallpadstruktur gebildet. Ein Metallhöcker wird über der Metallpadstruktur und der Polyimidschicht gebildet. Das Polyimid ist ein Reaktionsprodukt eines Dianhydrids und eines Diamins, wobei mindestens eines von Dianhydrid und Diamin eines aus der folgenden Gruppe enthält: ein Cycloalkan, ein kondensierter Ring, ein Bicycloalkan, ein Tricycloalkan, ein Bicycloalken, ein Tricycloalken, ein Spiroalkan und ein heterocyclischer Ring.

Compositions for reducing resist consumption of extreme ultraviolet metallic type resist

A method for reducing resist consumption (RRC) is provided. The method includes treating a surface of a substrate using a RRC composition and forming a photoresist layer comprising a metal-containing material on the RRC composition treated surface. The RRC composition includes a solvent and an acid or a base. The solvent has a dispersion parameter between 10 and 25. The acid has an acid dissociation constant between -20 and 6.8. The base having an acid dissociation constant between 7.2 and 45.

Verhindern eines ausgasens einer fotolackschicht

Ein Verfahren zum Herstellen einer Halbleitervorrichtung umfasst ein Ausbilden einer Fotolackschicht über einem Substrat und ein Ausbilden eines dehydrierten Films über der Fotolackschicht. Die Fotolackschicht wird selektiv mit aktinischer Strahlung belichtet, um einen belichteten Abschnitt und einen nicht belichteten Abschnitt der Fotolackschicht auszubilden. Die Fotolackschicht wird entwickelt, um den nicht belichteten Abschnitt der Fotolackschicht und einen ersten Abschnitt des dehydrierten Films über dem nicht belichteten Abschnitt der Fotolackschicht zu entfernen. In einer Ausführungsform umfasst das Verfahren ein Ätzen des Substrats durch Verwenden des belichteten Abschnitts der Fotolackschicht als einer Maske.

Photoresist materials and associated methods

Photoresist materials described herein may include various types of tin (Sn) clusters having one or more types of ligands. As an example, a photoresist material described herein may include tin clusters bearing two or more different types of carboxylate ligands. As another example, a photoresist material described herein may include tin oxide clusters that include carbonate ligands. The two or more different types of carboxylate ligands and the carbonate ligands may reduce, minimize, and/or prevent crystallization of the photoresist materials described herein, which may increase the coating performance of the photoresist materials and may decrease the surface roughness of photoresist layers formed using the photoresist materials described herein.

Verfahren zur herstellung einer halbleitervorrichtung

Ein Verfahren zur Herstellung einer Halbleitervorrichtung umfasst das Bilden einer Photolackschicht über einem Substrat, umfassend das Kombinieren eines ersten Vorläufers und eines zweiten Vorläufers in einem Gaszustand zum Bilden eines Photolackmaterials und Abscheiden des Photolackmaterials über dem Substrat. Eine Schutzschicht wird über der Photolackschicht gebildet. Die Photolackschicht wird selektiv mit aktinischer Strahlung durch die Schutzschicht belichtet, um eine latente Struktur in der Photolackschicht zu bilden. Die Schutzschicht wird entfernt und die latente Struktur wird entwickelt, indem ein Entwickler auf die selektiv belichtete Photolackschicht aufgebracht wird, um eine Struktur zu bilden.

Bump structure and method of manufacturing bump structure

A method of manufacturing a bump structure includes forming a passivation layer over a substrate. A metal pad structure is formed over the substrate, wherein the passivation layer surrounds the metal pad structure. A polyimide layer including a polyimide is formed over the passivation layer and the metal pad structure. A metal bump is formed over the metal pad structure and the polyimide layer. The polyimide is a reaction product of a dianhydride and a diamine, wherein at least one of the dianhydride and the diamine comprises one selected from the group consisting of a cycloalkane, a fused ring, a bicycloalkane, a tricycloalkane, a bicycloalkene, a tricycloalkene, a spiroalkane, and a heterocyclic ring.

Photoresist layer surface treatment, cap layer, and method of forming photoresist pattern

A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

Bump structure and method of manufacturing bump structure

A method of manufacturing a bump structure includes forming a passivation layer over a substrate. A metal pad structure is formed over the substrate, wherein the passivation layer surrounds the metal pad structure. A polyimide layer including a polyimide is formed over the passivation layer and the metal pad structure. A metal bump is formed over the metal pad structure and the polyimide layer. The polyimide is a reaction product of a dianhydride and a diamine, wherein at least one of the dianhydride and the diamine comprises one selected from the group consisting of a cycloalkane, a fused ring, a bicycloalkane, a tricycloalkane, a bicycloalkene, a tricycloalkene, a spiroalkane, and a heterocyclic ring.

Lithography techniques for reducing defects

A lithography method is described. The method includes forming a resist layer over a substrate, performing a treatment on the resist layer to form an upper portion of the resist layer having a first molecular weight and a lower portion of the resist layer having a second molecular weight less than the first molecular weight, performing an exposure process on the resist layer, and performing a developing process on the resist layer to form a patterned resist layer.

Photoresist layer outgassing prevention

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate and forming a dehydrated film over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form an exposed portion and an unexposed portion of the photoresist layer. The photoresist layer is developed to remove the unexposed portion of the photoresist layer and a first portion of the dehydrated film over the unexposed portion of the photoresist layer. In an embodiment, the method includes etching the substrate by using the exposed portion of the photoresist layer as a mask.

Lithography techniques for reducing defects

A lithography method is described. The method includes forming a resist layer over a substrate, performing a treatment on the resist layer to form an upper portion of the resist layer having a first molecular weight and a lower portion of the resist layer having a second molecular weight less than the first molecular weight, performing an exposure process on the resist layer, and performing a developing process on the resist layer to form a patterned resist layer.

Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device includes the following operations. A metal oxide photoresist layer is formed over a target layer. The metal oxide photoresist layer comprises a metal oxide core with organic ligands, a metal oxide framework with organic ligands, or a combination thereof. The metal oxide photoresist layer is exposed to an extreme ultraviolet radiation. The metal oxide photoresist layer is treated with a ligand leaving promoter. The metal oxide photoresist layer is developed to form a patterned photoresist. The target layer is etched by using the patterned photoresist as an etching mask.

Photoresist layer surface treatment, cap layer, and method of forming photoresist pattern

A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

Method of manufacturing a semiconductor device

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

Photoresist developer and method of developing photoresist

A method of forming a pattern in a photoresist includes forming a photoresist layer over a substrate, and selectively exposing the photoresist layer to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer composition to the selectively exposed photoresist layer to form a pattern. The developer composition includes a first solvent having Hansen solubility parameters of 15<δd<25, 10<δp<25, and 6<δh<30; an acid having an acid dissociation constant, pKa, of −15<pKa<5, or a base having a pKa of 40>pKa>9.5; and a second solvent having a dielectric constant greater than 18. The first solvent and the second solvent are different solvents.

Photoresist developer and method of developing photoresist

A method of forming a pattern in a photoresist includes forming a photoresist layer over a substrate, and selectively exposing the photoresist layer to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer composition to the selectively exposed photoresist layer to form a pattern. The developer composition includes a first solvent, a second solvent, a surfactant, and at least one selected from an organic acid, an organic base, an inorganic acid, or an inorganic base. The first solvent and second solvent are different solvents.