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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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Применить Всего найдено 11. Отображено 10.
20-04-2017 дата публикации

SUBSTRATE TREATMENT APPARATUS

Номер: US20170110291A1
Принадлежит: Samsung Electronics Co., Ltd.

A substrate treatment apparatus may include one or more of a process chamber, a gas supply assembly that may supply one or more gases into the process chamber, a gas exhaust assembly that may exhaust gases from the process chamber, and a gas injector assembly connected to the gas exhaust assembly independently of the process chamber. The gas injector assembly may supply a control gas into the gas exhaust assembly. The apparatus may include a gas injection control device configured to adjustably control the supply of control gas. The gas inject control device may measure an internal pressure of the process chamber and control the supply of control gas based on the internal pressure. The apparatus may include a diffuser that couples the gas injector assembly to the gas exhaust assembly and is configured to diffuse the control gas supplied from the gas injector assembly into the gas exhaust assembly. 1. A substrate treatment apparatus , comprising:a process chamber; the first gas is supplied into the process chamber at a uniform first flow rate, and', 'the second gas is supplied into the process chamber at a second flow rate, the second flow rate varying according to a first pulse wave, the first pulse wave having a particular time period;, 'a gas supply assembly configured to supply a first gas and a second gas into the process chamber such that,'} an exhausting line coupled to the process chamber, the exhausting line being configured to discharge gas from the process chamber, and', 'a pump coupled to the exhausting line, the pump being configured to induce gas flow from the process chamber through the exhausting line;, 'a gas exhaust assembly configured to exhaust the first and second gases from the process chamber, the gas exhaust assembly including,'}an exhaust valve coupled to the exhausting line, the exhaust valve being configured to control a flow rate of gas into the exhausting line from the process chamber, the exhaust valve including a fixed opening extent; ...

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19-09-2019 дата публикации

SYSTEM FOR FABRICATING A SEMICONDUCTOR DEVICE

Номер: US20190287766A1
Принадлежит:

A system for fabricating a semiconductor device may include a chamber, an electrostatic chuck used to load a substrate, a power source supplying an RF power to the electrostatic chuck, an impedance matcher between the power source and the electrostatic chuck, and a power transmission unit connecting the electrostatic chuck to the impedance matcher. The power transmission unit may include a power rod, which is connected to the electrostatic chuck and has a first outer diameter, and a coaxial cable. The coaxial cable may include an inner wire, an outer wire, and a dielectric material between the outer and inner wires. The inner wire connects the power rod to the impedance matcher and has a second outer diameter less than the first outer diameter. The outer wire is connected to the chamber and is provided to enclose the inner wire and has a first inner diameter less than the first outer diameter and greater than the second outer diameter. A ratio of the first inner diameter to the second outer diameter is greater than a dielectric constant of the dielectric material and less than three times the dielectric constant of the dielectric material. 1. A system for fabricating a semiconductor device , comprising:a chamber;an electrostatic chuck provided in the chamber and used to load a substrate;a power source configured to supply an RF power to the electrostatic chuck;an impedance matcher provided between the power source and the electrostatic chuck to connect the power source to the electrostatic chuck; anda power transmission unit connecting the electrostatic chuck to the impedance matcher,wherein the power transmission unit comprises:a power rod connected to the electrostatic chuck, the power rod having a first outer diameter; anda coaxial cable including an inner wire, an outer wire, and a dielectric material between the outer and inner wires,wherein the inner wire connects the power rod to the impedance matcher and has a second outer diameter less than the first outer ...

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29-12-2016 дата публикации

Method of fabricating semiconductor device

Номер: US20160379903A1
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A method of fabricating a semiconductor device includes etching a stack of first-material layers and second-material layers alternately disposed one on another on a substrate. An upper portion of the stack is etched using an end point detection (EPD) signal of an etching reaction gas, and a function of an injection time of an etchant with respect to a depth of an opening is obtained while the upper portion of the stack is etched. A lower portion of the stack is etched using the obtained function.

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26-11-2020 дата публикации

SEMICONDUCTOR PROCESSING APPARATUS

Номер: US20200373124A1
Принадлежит:

A semiconductor processing apparatus includes an upper electrode and a substrate on a lower electrode disposed inside the process chamber, a first power generator configured to provide a low-frequency signal to the lower electrode, wherein the low-frequency signal varies between a reference voltage and a first voltage at intervals of a first cycle, a second power generator configured to provide a high-frequency signal to the lower electrode, wherein the high-frequency signal has a sinusoidal waveform that oscillates at intervals of a second cycle shorter than the first cycle, and a direct-current (DC) power generator configured to provide a DC bias to the upper electrode. The high-frequency signal is turned off during at least part of a duration for which the low-frequency signal has the first voltage, and the high-frequency signal is turned on and turned off at intervals of a third cycle different from the first and second cycles. 1. A semiconductor processing apparatus comprising:a process chamber in which a semiconductor process is performed;a lower electrode disposed inside the process chamber, the lower electrode having a top surface on which a substrate is loaded;an upper electrode disposed on the lower electrode;a first power generator configured to provide a low-frequency signal to the lower electrode, wherein the low-frequency signal varies between a reference voltage and a first voltage lower than the reference voltage at intervals of a first cycle;a second power generator configured to provide a high-frequency signal to the lower electrode, wherein the high-frequency signal has a sinusoidal waveform that oscillates at intervals of a second cycle shorter than the first cycle; anda direct-current (DC) power generator configured to provide a DC bias to the upper electrode, wherein the DC bias is lower than the reference voltage,wherein the high-frequency signal is turned off during at least part of a duration for which the low-frequency signal has the first ...

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13-07-2023 дата публикации

Semiconductor device

Номер: US20230225112A1
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A semiconductor device including a substrate, lower electrodes disposed on the substrate, at least one support layer in contact with the lower electrodes, a dielectric layer disposed on the lower electrodes, an upper electrode disposed on the dielectric layer, a first interfacial film between the lower electrodes and the dielectric layer, and a second interfacial film between the upper electrode and the dielectric layer. At least one of the first and second interfacial films includes a plurality of layers, wherein the plurality of layers include a first metal element, and a second metal element, and at least one of oxygen \and nitrogen. The lower electrodes include the first metal element. A first region of the first interfacial film includes the second metal element at a first concentration and a second region of the first interfacial film includes the second metal element at a second concentration different from the first concentration.

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01-02-2024 дата публикации

Semiconductor processing apparatus

Номер: US20240038493A1
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A semiconductor processing apparatus includes an upper electrode and a substrate on a lower electrode disposed inside the process chamber, a first power generator configured to provide a low-frequency signal to the lower electrode, wherein the low-frequency signal varies between a reference voltage and a first voltage at intervals of a first cycle, a second power generator configured to provide a high-frequency signal to the lower electrode, wherein the high-frequency signal has a sinusoidal waveform that oscillates at intervals of a second cycle shorter than the first cycle, and a direct-current (DC) power generator configured to provide a DC bias to the upper electrode. The high-frequency signal is turned off during at least part of a duration for which the low-frequency signal has the first voltage, and the high-frequency signal is turned on and turned off at intervals of a third cycle different from the first and second cycles.

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13-06-2024 дата публикации

Battery pack case

Номер: US20240194997A1
Принадлежит: Hyundai Motor Co, Kia Corp, Sungwoo Hitech Co Ltd

A battery pack case may include: i) a case panel; ii) a case outer frame including at least one aluminum sheet and coupled to edge portions of the case panel; iii) a case inner frame including at least one aluminum sheet and coupled to the edge portions and an upper surface of the case panel; and iv) a case cover coupled to upper portions of the case outer frame and case inner frame.

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26-09-2024 дата публикации

Integrated circuit device

Номер: US20240324183A1
Принадлежит: SAMSUNG ELECTRONICS CO LTD

An integrated circuit device includes a substrate having an active area, a plurality of bit line structures on the substrate, the plurality of bit line structures including insulating spacers on sidewalls thereof, a buried contact between the plurality of bit line structures and electrically connected to the active area, an insulation capping pattern on a bit line structure of the plurality of bit line structures, and a landing pad electrically connected to the buried contact, the landing pad arranged to vertically overlap the bit line structure on the insulation capping pattern, wherein an uppermost surface of the landing pad is higher than an uppermost surface of the insulation capping pattern, relative to the substrate.

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25-09-2024 дата публикации

Integrated circuit device

Номер: EP4436329A1
Принадлежит: SAMSUNG ELECTRONICS CO LTD

An integrated circuit device includes a substrate having an active area, a plurality of bit line structures on the substrate, the plurality of bit line structures including insulating spacers on sidewalls thereof, a buried contact between the plurality of bit line structures and electrically connected to the active area, an insulation capping pattern on a bit line structure of the plurality of bit line structures, and a landing pad electrically connected to the buried contact, the landing pad arranged to vertically overlap the bit line structure on the insulation capping pattern, wherein an uppermost surface of the landing pad is higher than an uppermost surface of the insulation capping pattern, relative to the substrate.

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19-12-2017 дата публикации

Method of fabricating semiconductor device

Номер: US09847266B2
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A method of fabricating a semiconductor device includes etching a stack of first-material layers and second-material layers alternately disposed one on another on a substrate. An upper portion of the stack is etched using an end point detection (EPD) signal of an etching reaction gas, and a function of an injection time of an etchant with respect to a depth of an opening is obtained while the upper portion of the stack is etched. A lower portion of the stack is etched using the obtained function.

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