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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Применить Всего найдено 8. Отображено 8.
29-03-2012 дата публикации

MULTI-LAYER TSV INSULATION AND METHODS OF FABRICATING THE SAME

Номер: US20120074584A1
Принадлежит:

Provided is a semiconductor device. The semiconductor device may include a substrate and a stacked insulation layer on a sidewall of an opening which penetrates the substrate. The stacked insulation layer can include at least one first insulation layer and at least one second insulation layer whose dielectric constant is different than that of the first insulation layer. One insulation layer may be a polymer and one insulation layer may be a silicon based insulation layer. The insulation layers may be uniform in thickness or may vary as a distance from the substrate changes. 1. A semiconductor device , comprising:a substrate; anda stacked insulation layer on a sidewall of an opening which penetrates the substrate,wherein the stacked insulation layer comprises at least one first insulation layer and at least one second insulation layer whose dielectric constant is different than that of the first insulation layer, wherein one insulation layer comprises a polymer and the other comprises a silicon based dielectric.2. The semiconductor device of claim 1 , wherein the second insulation layer is a CF-based polymer.3. The semiconductor device of claim 1 , wherein the first insulation layer comprises at least one material selected from the list including silicon oxide claim 1 , silicon oxinitride claim 1 , or silicon nitride.4. The semiconductor device of claim 1 , wherein a thickness of the second insulation layer is smaller at a lower part of the opening than at an upper part of the opening.5. The semiconductor device of claim 4 , wherein a thickness of the first insulation layer is smaller at the upper part of the opening than at the lower part of the opening.6. The semiconductor device of claim 1 , wherein a thickness of the second insulation layer is larger at a lower part of the opening than at an upper part of the opening.7. The semiconductor device of claim 6 , wherein a thickness of the first insulation layer is larger at the upper part of the opening than at the ...

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09-08-2012 дата публикации

Semiconductor device and method of fabricating the semiconductor device

Номер: US20120199981A1
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A semiconductor device includes a first device including a first substrate and a first external connection terminal for connecting outside the first device; a second device stacked on the first device, the second device including a second substrate and a second external connection terminal for connecting outside the second device; an adhesive pattern disposed between the first device and second device, the adhesive pattern disposed in locations other than locations where the first external connection terminal and second external connection terminal are disposed, and the adhesive pattern causing the first device and second device, when stacked, to be spaced apart by a predetermined distance; and a plated layer disposed between and electrically and physically connecting the first external connection terminal and the second external connection terminal.

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22-11-2012 дата публикации

APPARATUS AND METHOD FOR ELECTROPLATING FOR SEMICONDUCTOR SUBSTRATE

Номер: US20120292195A1
Принадлежит:

An apparatus for electroplating a semiconductor device includes a plating bath accommodating a plating solution, and a paddle in the plating bath, the paddle including a plurality of holes configured to pass the plating solution through the paddle toward a substrate, and a plating solution flow reinforcement portion configured to selectively reinforce a flow of the plating solution to a predetermined area of the substrate, the predetermined area of the substrate being an area requiring a relatively increased supply of metal ions of the plating solution. 1. An apparatus for electroplating a semiconductor device , the apparatus comprising:a plating bath accommodating a plating solution; anda paddle in the plating bath, the paddle including:a plurality of holes configured to pass the plating solution through the paddle toward a substrate, anda plating solution flow reinforcement portion configured to selectively reinforce a flow of the plating solution to a predetermined area of the substrate, the predetermined area of the substrate being an area requiring a relatively increased supply of metal ions of the plating solution.2. The apparatus as claimed in claim 1 , wherein the plating solution flow reinforcement portion is on the paddle and faces the substrate.3. The apparatus as claimed in claim 2 , wherein the plating solution flow reinforcement portion includes at least one protrusion member protruding from the paddle toward the substrate.4. The apparatus as claimed in claim 3 , wherein the plating solution flow reinforcement portion includes a plurality of the protrusion members claim 3 , the protrusion members being separated from each other and arranged along a circumference of the paddle at a same radius.5. The apparatus as claimed in claim 3 , wherein the at least one protrusion member is detachable claim 3 , the protrusion member being a tab coupled to a corresponding hole of the plurality of holes in the paddle.6. The apparatus as claimed in claim 5 , wherein ...

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29-05-2014 дата публикации

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Номер: US20140145327A1
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

Semiconductor devices and methods for fabricating the same are provided. For example, the semiconductor device includes a substrate, a first contact pad formed on the substrate, an insulation layer formed on the substrate and including a first opening which exposes the first contact pad, a first bump formed on the first contact pad and electrically connected to the first contact pad, and a reinforcement member formed on the insulation layer and adjacent to a side surface of the first lower bump. The first bump includes a first lower bump and a first upper bump, which are sequentially stacked on the first contact pad. 1. A semiconductor device comprising:a substrate;a first contact pad on the substrate;an insulation layer on the substrate, the insulation layer including a first opening which exposes the first contact pad;a first bump on the first contact pad and electrically connected to the first contact pad, the first bump including a first lower bump and a first upper bump; anda reinforcement member on the insulation layer and adjacent to a side surface of the first lower bump.2. The semiconductor device of claim 1 , wherein the first lower bump includes a first part having a first width and a second part having a second width claim 1 , the second width greater than the first width claim 1 , the first part filling the first opening claim 1 , and the second part being higher than the insulation layer and surrounded by the reinforcement member.3. The semiconductor device of claim 2 , wherein the second part has a pillar shape claim 2 , and includes a first surface facing the insulation layer claim 2 , and a second surface connecting the first surface to a side surface of the second part.4. The semiconductor device of claim 3 , wherein a cross-section between the second surface and the insulation layer is wedge-shaped claim 3 , and a portion of the reinforcement member is interposed between the second surface and the insulation layer.5. The semiconductor device of ...

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19-04-2018 дата публикации

Method of forming an interposer and a method of manufacturing a semiconductor package including the same

Номер: US20180108540A1
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A method of manufacturing a semiconductor package including forming a photoresist pattern on a first surface of an interposer substrate. The interposer substrate includes an electrode zone and a scribe line zone. The interposer substrate is etched using the photoresist pattern as a mask to form a first opening and a second opening respectively on the electrode zone and the scribe line zone. An insulation layer and a conductive layer are formed on the first surface of the interposer substrate. A width of the second opening is smaller than a width of the first opening. The insulation layer contacts each of the first surface of the interposer substrate, an inner surface of the first opening, and an inner surface of the second opening.

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22-09-2011 дата публикации

Apparatus and method for treating substrate

Номер: US20110226626A1
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A substrate treating device may include a plating treatment portion configured to perform a plating process of a substrate, a wet treatment portion configured to perform a wet treating process of the substrate, the wet treatment portion being under the plating treatment portion, and a substrate support portion configured to support the substrate so that a plating surface of the substrate faces upward, the substrate support portion being further configured to move the substrate between the plating treatment portion and the wet treatment portion.

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05-11-2013 дата публикации

Semiconductor devices having electrodes

Номер: US8575760B2
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A semiconductor device includes a substrate having a first surface and an opposite second surface. An electrode extends within the substrate towards the first surface and has a protruding portion extending from the first surface. A supporting portion extends from the first surface of the substrate to a sidewall of the protruding portion and supports the protruding portion.

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24-11-2011 дата публикации

Semiconductor device and method of fabricating the same

Номер: US20110284936A1
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A semiconductor device and a method of fabricating a semiconductor device. The semiconductor device includes an interlayer insulation layer pattern, a metal wire pattern exposed by a passage formed by a via hole formed in the interlayer insulation layer pattern to input and output an electrical signal, and a plated layer pattern directly contacting the metal wire pattern and filling the via hole. The method includes forming an interlayer insulation layer having a metal wire pattern to input and output an electrical signal formed therein, forming a via hole to define a passage that extends through the interlayer insulation layer until at least a part of the metal wire pattern is exposed, and forming a plated layer pattern to fill the via hole and to directly contact the metal wire pattern by using the metal wire pattern exposed through the via hole as a seed metal layer.

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