SENSE AMPLIFIER TIMING CIRCUIT

PROBLEM TO BE SOLVED: To optimize timing performance of a dynamic sense amplifier by having a sense amplifier provided with first and second differential input, strobe input and output, first and second differential input coupling respectively with bit lines and bit bar lines, plural storage cells and word lines. SOLUTION: Differential input of a dynamic sense amplifier 300 are connected respectively to BIT and BIT bar lines pre-charged to VCC using a pre-charge circuit 302. Typical SRAM cells 304 are respectively connected to BIT and BIT bar lines. The SRAM cells 304 comprise a storage latch consisting of TR 306, 308, load devices 310, 312, memory cell access transistors 314, 316. Gate electrodes of the memory cell access transistors 314, 316 are connected to a word line WL. COPYRIGHT: (C)1998,JPO ...