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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Применить Всего найдено 4. Отображено 4.
05-06-2001 дата публикации

Method and system for asynchronous array loading

Номер: US0006243822B1
Автор: Boris A. Babaian, Mikhail L. Chudakov, Oleg A. Konopleff, Yuli K. Sakhin, Andrey A. Vechtomov, BABAIAN BORIS A, CHUDAKOV MIKHAIL L, KONOPLEFF OLEG A, SAKHIN YULI K, VECHTOMOV ANDREY A, BABAIAN BORIS A., CHUDAKOV MIKHAIL L., KONOPLEFF OLEG A., SAKHIN YULI K., VECHTOMOV ANDREY A.
Принадлежит: Elbrus International Limited, ELBRUS INTERNAT LTD, ELBRUS INTERNATIONAL LIMITED

The present invention decreases the delay associated with loading an array from memory by employing an asynchronous array preload unit. The asynchronous array preload unit provides continuous preliminary loading of data arrays located in a memory subsystem into a prefetch buffer. Array loading is performed asynchronously with respect to execution of the main program.

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Номер записи: 1
06-05-2003 дата публикации

Branch preparation

Номер: US0006560775B1
Автор: Alexander M. Artymov, Boris A. Babaian, Feodor A. Gruzdov, Alexey P. Lizorkin, Yuli K. Sakhin, Evgeny Z. Stolyarsky, ARTYMOV ALEXANDER M, BABAIAN BORIS A, GRUZDOV FEODOR A, LIZORKIN ALEXEY P, SAKHIN YULI K, STOLYARSKY EVGENY Z, ARTYMOV ALEXANDER M., BABAIAN BORIS A., GRUZDOV FEODOR A., LIZORKIN ALEXEY P., SAKHIN YULI K., STOLYARSKY EVGENY Z.
Принадлежит: Elbrus International Limited, ELBRUS INTERNAT LTD, ELBRUS INTERNATIONAL LIMITED

A method and system for preparing branch instruction of a computer program, for compiling and execution in a computer system, in which each transfer instruction is split into two instructions: a control transfer preparation instruction and a control transfer instruction, wherein the control transfer preparation instruction contains the transfer address and is placed by the compiler several instructions ahead of the control transfer instruction, so that the number of clock cycles in the pipeline between transfer condition generation and transfer itself would be reduced.

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Номер записи: 2
21-02-2006 дата публикации

Method for prioritizing operations within a pipelined microprocessor based upon required results

Номер: US0007003650B2
Автор: Boris A. Babaian, Valeri G. Gorokhov, Feodor A. Gruzdov, Yuli K. Sakhin, Vladimir V. Rudometov, Valdimir Y. Volkonsky, BABAIAN BORIS A, GOROKHOV VALERI G, GRUZDOV FEODOR A, SAKHIN YULI K, RUDOMETOV VLADIMIR V, VOLKONSKY VALDIMIR Y, BABAIAN BORIS A., GOROKHOV VALERI G., GRUZDOV FEODOR A., SAKHIN YULI K., RUDOMETOV VLADIMIR V., VOLKONSKY VALDIMIR Y.
Принадлежит: Elbrus International, ELBRUS INTERNAT, ELBRUS INTERNATIONAL

A method and apparatus for solving the output dependence problem in an explicit parallelism architecture microprocessor with consideration for implementation of the precise exception. In case of an output dependence hazard, the issue into bypass of a result of the earlier issued operation having an output hazard is cancelled. Latencies of short instructions are aligned by including additional stages on the way of writing the results into the register file in shorter executive units, which allows to save the issue order while writing the results into the register file. For long and unpredictable latencies of the instructions, writing of the result of the earlier issued operation having an output dependence hazard into the register file is cancelled after checking for no precise exception condition. All additional stages are connected to the bypass not to increase the result access time in case of this result use in the following operations.

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Номер записи: 3
15-04-2003 дата публикации

Integrity of tagged data

Номер: US0006549903B1
Автор: Boris A. Babaian, Feodor A. Gruzdov, Vladimir Y. Volkonsky, Yuli K. Sakhin, BABAIAN BORIS A, GRUZDOV FEODOR A, VOLKONSKY VLADIMIR Y, SAKHIN YULI K, BABAIAN BORIS A., GRUZDOV FEODOR A., VOLKONSKY VLADIMIR Y., SAKHIN YULI K.
Принадлежит: Elbrus International Limited, ELBRUS INTERNAT LTD, ELBRUS INTERNATIONAL LIMITED

A method and computer apparatus are presented for providing a secure data architecture for computer memory of a processor. The apparatus comprises a memory unit and a processing unit. Data are stored in the memory unit and manipulated by the processing unit, which is programmed to implement the data architecture. Tagged single data words are formed by concatenating a tag to each of the single data words. Each of the tags takes a value that corresponds to the data type of the single data word to which it is concatenated. A data multiword is creating by concatenating tagged single data words having the same data type. The data multiword is stored within a location in the computer memory, the location selected to ensure alignment of the data multiword in accordance with its length. An effective tag value is constructed for the data multiword by concatenating all of its single word tags. An operation is prevented from being performed on the data multiword if the effective tag value is not one ...

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Номер записи: 4