WRITE DRIVER DC RESISTANCE CALIBRATION

An apparatus, according to one embodiment, includes: a controller having: a first circuit having a reference resistance, a second circuit having an adjustable resistance, and logic integrated with the controller, executable by the controller, or integrated with and executable by the controller to perform the following process: compare output voltages of the first and second circuits, alter the resistance of the second circuit until the output voltage of the first circuit is less than or equal to the output voltage of the second circuit, and extract setting information in response to determining that the output voltage of the first circuit is less than or equal to the output voltage of the second circuit.

In-circuit calibration of anti-aliasing filter

A computer-implemented method, according to one embodiment, includes, performing anti-aliasing filtering on each of a plurality of symmetrical square wave signals, each symmetrical square wave signal having a frequency that is a different fraction of a frequency of a data read clock. The filtered symmetrical square wave signals are passed through a band pass filter. An amplitude of each of the symmetrical square wave signals is measured after the band pass filtering. In response to the amplitudes of the symmetrical square wave signals being within a predefined range, anti-aliasing settings used during the anti-aliasing filtering are stored. In response to the amplitudes of the symmetrical square wave signals being outside the predefined range, the anti-aliasing settings are changed.

Detection of open write heads and/or cables in tape drives

A computer-implemented method, according to one embodiment, includes: receiving a first output signal from a write driver, the write driver having an operating voltage applied thereto, receiving a second output signal from a comparator circuit, the comparator circuit having a reference voltage applied thereto, comparing a voltage of the first output signal with a voltage of the second output signal, and detecting a high resistance condition in response to determining that the voltage of the first output signal is less than the voltage of the second output signal. According to the present embodiment, the high resistance condition indicates open and/or partially open circuitry in the write driver. Moreover, the operating voltage is equal to the reference voltage. Other systems, methods, and computer program products are described in additional embodiments.

Write driver DC resistance calibration

An apparatus, according to one embodiment, includes: a controller having: a first circuit having a reference resistance, a second circuit having an adjustable resistance, and logic integrated with the controller, executable by the controller, or integrated with and executable by the controller to perform the following process: compare output voltages of the first and second circuits, alter the resistance of the second circuit until the output voltage of the first circuit is less than or equal to the output voltage of the second circuit, and extract setting information in response to determining that the output voltage of the first circuit is less than or equal to the output voltage of the second circuit.

In-circuit calibration method of anti-aliasing filter

A computer-implemented method, according to one embodiment, includes, for a particular data read clock value, generating a series of symmetrical square wave signals, each having a frequency that is a different fraction of the data read clock frequency. Anti-aliasing filtering is performed on each of the symmetrical square wave signals using predefined anti-aliasing settings. The filtered symmetrical square wave signals are passed through a band pass filter, the band pass filter being set to pass a single harmonic frequency of each of the symmetrical square wave signals. An amplitude of each of the band pass filtered symmetrical square wave signals is measured. In response to the amplitudes of the symmetrical square wave signals being within a predefined range, the anti-aliasing settings are stored. In response to the amplitudes of the symmetrical square wave signals being outside the predefined range, the anti-aliasing settings are changed, and the method is repeated.

DETECTION OF OPEN WRITE HEADS AND/OR CABLES IN TAPE DRIVES

A computer-implemented method, according to one embodiment, includes: receiving a first output signal from a write driver, the write driver having an operating voltage applied thereto, receiving a second output signal from a comparator circuit, the comparator circuit having a reference voltage applied thereto, comparing a voltage of the first output signal with a voltage of the second output signal, and detecting a high resistance condition in response to determining that the voltage of the first output signal is less than the voltage of the second output signal. According to the present embodiment, the high resistance condition indicates open and/or partially open circuitry in the write driver. Moreover, the operating voltage is equal to the reference voltage. Other systems, methods, and computer program products are described in additional embodiments.

DEVICE SELECT SYSTEM FOR MULTI-DEVICE ELECTRONIC SYSTEM

In one general embodiment, a system includes a first device on a first substrate; a second device on a second substrate; and a device select system coupled to the first and second devices. The device select system includes: a first portion having an array of first electrical contacts; a second portion having an array of second electrical contacts, there being more second electrical contacts than first electrical contacts, the second portion being coupled to the first and second devices, each of the first electrical contacts being associated with at least two of the second electrical contacts; and a select mechanism for selectively placing each of the first electrical contacts in electrical communication with one of the second electrical contacts associated therewith. 1. A system , comprising:a first device on a first substrate;a second device on a second substrate, the second substrate being positioned relative to the first substrate to allow transduction of data by the first and second devices to and/or from data tracks on a same side of a recording medium, wherein longitudinal axes of each of the data tracks are oriented in a direction extending along a length of the tape defined between ends of the medium positioned farthest apart;a device select system coupled to the first and second devices,the device select system moving with the first and second devices relative to a direction of travel of the recording medium thereacross, a first portion having an array of first electrical contacts;', 'a second portion having an array of second electrical contacts, there being more second electrical contacts than first electrical contacts, the second portion being coupled to the first and second devices, each of the first electrical contacts being associated with at least two of the second electrical contacts; and', 'a select mechanism for selectively placing each of the first electrical contacts in electrical communication with one of the second electrical contacts ...

IN-CIRCUIT CALIBRATION OF ANTI-ALIASING FILTER

A computer-implemented method, according to one embodiment, includes, performing anti-aliasing filtering on each of a plurality of symmetrical square wave signals, each symmetrical square wave signal having a frequency that is a different fraction of a frequency of a data read clock. The filtered symmetrical square wave signals are passed through a band pass filter. An amplitude of each of the symmetrical square wave signals is measured after the band pass filtering. In response to the amplitudes of the symmetrical square wave signals being within a predefined range, anti-aliasing settings used during the anti-aliasing filtering are stored. In response to the amplitudes of the symmetrical square wave signals being outside the predefined range, the anti-aliasing settings are changed. 1. A computer-implemented method , comprising:performing anti-aliasing filtering on each of a plurality of symmetrical square wave signals, each symmetrical square wave signal having a frequency that is a different fraction of a frequency of a data read clock;passing the filtered symmetrical square wave signals through a band pass filter;measuring an amplitude of each of the symmetrical square wave signals after the band pass filtering;in response to the amplitudes of the symmetrical square wave signals being within a predefined range, storing anti-aliasing settings used during the anti-aliasing filtering; andin response to the amplitudes of the symmetrical square wave signals being outside the predefined range, changing the anti-aliasing settings.2. A method as recited in claim 1 , comprising establishing an automatic gain control level and locking an automatic gain control loop prior to performing the anti-aliasing filtering on each of the symmetrical square wave signals.3. A method as recited in claim 1 , wherein the symmetrical square wave signals are generated at least two different frequencies corresponding to the data read clock divided by integers selected from a group consisting ...

IN-CIRCUIT CALIBRATION OF ANTI-ALIASING FILTER

A computer-implemented method according to one embodiment includes performing anti-aliasing filtering on each of a plurality of signals, each signal having a frequency that is a different fraction of a frequency of a data read clock. An amplitude of each of the signals is measured after the anti-aliasing filtering. In response to the amplitudes of the signals being within a predefined range, anti-aliasing settings used during the anti-aliasing filtering are stored. In response to the amplitudes of the signals being outside the predefined range, the anti-aliasing settings are changed. A computer program product according to another embodiment includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. The program instructions are executable by a processing circuit to cause the processing circuit to perform the foregoing method. 1. A computer-implemented method , comprising:performing anti-aliasing filtering on each of a plurality of signals, each signal having a frequency that is a different fraction of a frequency of a data read clock;measuring an amplitude of each of the signals after the anti-aliasing filtering;in response to the amplitudes of the signals being within a predefined range, storing anti-aliasing settings used during the anti-aliasing filtering; andin response to the amplitudes of the signals being outside the predefined range, changing the anti-aliasing settings.2. A computer-implemented method as recited in claim 1 , comprising establishing an automatic gain control level and locking an automatic gain control loop prior to performing the anti-aliasing filtering on each of the plurality of signals.3. A computer-implemented method as recited in claim 1 , wherein the signals are generated at at least two different frequencies corresponding to the data read clock divided by integers selected from a group consisting of 4 claim 1 , 8 claim 1 , 16 and 32 ...

IN-CIRCUIT CALIBRATION OF ANTI-ALIASING FILTER

An apparatus according to one embodiment includes a hardware based controller that is configured to perform operations. The operations include performing anti-aliasing filtering on each of a plurality of signals, each signal having a frequency that is a different fraction of a frequency of a data read clock. An amplitude is measured of each of the signals after the anti-aliasing filtering. Moreover, the operations include determining whether the measured amplitudes of the signals are within a predefined range. Anti-aliasing settings used during the anti-aliasing filtering are stored in response to a determination that the amplitudes of the signals are within the predefined range. The anti-aliasing settings are changed in response to a determination that the amplitudes of the signals are outside the predefined range. 1. An apparatus having a hardware based controller , the controller being configured to perform the following operations:perform anti-aliasing filtering on each of a plurality of signals, each signal having a frequency that is a different fraction of a frequency of a data read clock;measure an amplitude of each of the signals after the anti-aliasing filtering;determine whether the measured amplitudes of the signals are within a predefined range;store anti-aliasing settings used during the anti-aliasing filtering in response to a determination that the amplitudes of the signals are within the predefined range; andchange the anti-aliasing settings in response to a determination that the amplitudes of the signals are outside the predefined range.2. The apparatus as recited in claim 1 , comprising a drive mechanism for passing a magnetic medium over a magnetic head claim 1 , the controller being electrically coupled to the magnetic head.3. The apparatus as recited in claim 1 , the controller being configured to: establish an automatic gain control level and lock an automatic gain control loop prior to performing the anti-aliasing filtering on each of the ...

Communication among computers

Variable Power Write Driver Circuit

A storage system (e.g., a magnetic disk system or a magnetic tape system) employing a write head, a write controller and a write driver circuit. In operation, the write head records data on a magnetic media (e.g., a magnetic tape or a magnetic disk) based on a flow of a write current through the write head, and the write driver circuit includes a variable power supply network and a variable power return network driving the write current through the write head based on a selection by the write controller of an operating power mode among a plurality of selectable power modes of the variable power supply network and the variable power return network. Each power mode of the variable power supply network and the variable power return network drives the write current with a different magnitude from the variable power supply network through the write head to the variable power return network.

Detection of open write heads and/or cables in tape drives

An apparatus, according to one embodiment, includes a controller having a write driver, and a comparator circuit configured to detect a high resistance condition by comparing a first output voltage of the write driver with a second output voltage of the comparator circuit. A high resistance condition is detected in response to determining that the second output voltage of the comparator circuit is greater than the first output voltage of the write driver. Other systems, methods, and computer program products are described in additional embodiments.

Sensing mechanism for reading magnetic storage medium

A sensing mechanism for reading a magnetic storage medium includes first and second variable resistive elements, and sensing elements. Each first and second variable resistive element has a variable resistance. Each sensing element has a resistance depending at least on a portion of the medium currently being read. First and second ends of each sensing element are electrically connected to corresponding first and second variable resistive elements, respectively. For each sensing element, the resistance value of the first variable resistive element to which it is electrically connected is equal to the resistance of the second variable resistive element to which it is electrically connected, so that a mid-point voltage at each sensing element is equal. For each sensing element, the variable resistances of the first and second variable resistive elements to which it is electrically connected are selected so that the desired current flows through the sensing element.

Open Write-Head-Cable Test Method and Detector

A storage drive implements a method for operating the storage drive between a plurality of operational modes. For a test mode of the storage drive, a write current driver circuit and a test current sensor are electrically connected to the write head, wherein the test current sensor generates a sense signal indicative of a degree of a flow of a test current through the write head to thereby facilitate a detection of any presence of an open write condition of the storage drive (i.e., any impedance condition impeding a flow of a write current through the write head). For a write mode of the storage drive, the write current driver circuit is electrically connected to the write head and the test current sensor is electrically disconnected from the write head, wherein the write head records data on a magnetic media based on a flow of the write current through the write head.