Настройки

Укажите год
-

Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

Подробнее
-

Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

Подробнее

Форма поиска

Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
Ведите корректный номера.
Ведите корректный номера.
Ведите корректный номера.
Ведите корректный номера.
Укажите год
Укажите год
Применить Всего найдено 32. Отображено 27.
25-04-2017 дата публикации

Delaying execution in a processor to increase power savings

Номер: US0009632560B2
Автор: Pradip Bose, Alper Buyuktosunoglu, Hans M. Jacobson, Augusto J. Vega, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, JACOBSON HANS M, VEGA AUGUSTO J, Bose Pradip, Buyuktosunoglu Alper, Jacobson Hans M., Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION, IBM, International Business Machines Corporation

Embodiments relate to storing data in memory. An aspect includes applying a power savings technique to at least a subset of a processor. Pending work items scheduled to be executed by the processor are monitored. The pending work items are grouped based on the power savings technique. The grouping includes delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor. It is determined that an execution criteria has been met. The pending work items are executed based on the execution criteria being met and the grouping.

Подробнее
Номер записи: 1
29-12-2016 дата публикации

CLUSTERING EXECUTION IN A PROCESSING SYSTEM TO INCREASE POWER SAVINGS

Номер: US20160378163A1
Автор: Pradip Bose, Alper Buyuktosunoglu, Hans M. Jacobson, Augusto J. Vega, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, JACOBSON HANS M, VEGA AUGUSTO J, Bose Pradip, Buyuktosunoglu Alper, Jacobson Hans M., Vega Augusto J.
Принадлежит: International Business Machines Corp

Embodiments relate to clustering execution in a processing system. An aspect includes accessing a control flow graph that defines a data dependency and an execution sequence of a plurality of tasks of an application that executes on a plurality of system components. The execution sequence of the tasks in the control flow graph is modified as a clustered control flow graph that clusters active and idle phases of a system component while maintaining the data dependency. The clustered control flow graph is sent to an operating system, where the operating system utilizes the clustered control flow graph for scheduling the tasks.

Подробнее
Номер записи: 2
25-04-2017 дата публикации

Delaying execution in a processor to increase power savings

Номер: US0009632559B2
Автор: Pradip Bose, Alper Buyuktosunoglu, Hans M. Jacobson, Augusto J. Vega, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, JACOBSON HANS M, VEGA AUGUSTO J, Bose Pradip, Buyuktosunoglu Alper, Jacobson Hans M., Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION, IBM, International Business Machines Corporation

Embodiments relate to storing data in memory. An aspect includes applying a power savings technique to at least a subset of a processor. Pending work items scheduled to be executed by the processor are monitored. The pending work items are grouped based on the power savings technique. The grouping includes delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor. It is determined that an execution criteria has been met. The pending work items are executed based on the execution criteria being met and the grouping.

Подробнее
Номер записи: 3
20-03-2018 дата публикации

Clustering execution in a processing system to increase power savings

Номер: US0009921639B2
Автор: Pradip Bose, Alper Buyuktosunoglu, Hans M. Jacobson, Augusto J. Vega, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, JACOBSON HANS M, VEGA AUGUSTO J, Bose Pradip, Buyuktosunoglu Alper, Jacobson Hans M., Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION, IBM, International Business Machines Corporation

Embodiments relate to clustering execution in a processing system. An aspect includes accessing a control flow graph that defines a data dependency and an execution sequence of a plurality of tasks of an application that executes on a plurality of system components. The execution sequence of the tasks in the control flow graph is modified as a clustered control flow graph that clusters active and idle phases of a system component while maintaining the data dependency. The clustered control flow graph is sent to an operating system, where the operating system utilizes the clustered control flow graph for scheduling the tasks.

Подробнее
Номер записи: 4
29-12-2016 дата публикации

OPTIMIZATION OF APPLICATION WORKFLOW IN MOBILE EMBEDDED DEVICES

Номер: US20160378550A1
Автор: Ramon Bertran Monfort, Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, Hans M. Jacobson, William J. Song, Karthik V. Swaminathan, Augusto J. Vega, Liang Wang, BERTRAN MONFORT RAMON, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, CHER CHEN-YONG, JACOBSON HANS M, SONG WILLIAM J, SWAMINATHAN KARTHIK V, VEGA AUGUSTO J, WANG LIANG, Bertran Monfort Ramon, Bose Pradip, Buyuktosunoglu Alper, Cher Chen-Yong, Jacobson Hans M., Song William J., Swaminathan Karthik V., Vega Augusto J., Wang Liang
Принадлежит: International Business Machines Corp

An aspect includes optimizing an application workflow. The optimizing includes characterizing the application workflow by determining at least one baseline metric related to an operational control knob of an embedded system processor. The application workflow performs a real-time computational task encountered by at least one mobile embedded system of a wirelessly connected cluster of systems supported by a server system. The optimizing of the application workflow further includes performing an optimization operation on the at least one baseline metric of the application workflow while satisfying at least one runtime constraint. An annotated workflow that is the result of performing the optimization operation is output.

Подробнее
Номер записи: 5
03-04-2018 дата публикации

Clustering execution in a processing system to increase power savings

Номер: US0009933844B2
Автор: Pradip Bose, Alper Buyuktosunoglu, Hans M. Jacobson, Augusto J. Vega, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, JACOBSON HANS M, VEGA AUGUSTO J, Bose Pradip, Buyuktosunoglu Alper, Jacobson Hans M., Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION, IBM, International Business Machines Corporation

Embodiments relate to clustering execution in a processing system. An aspect includes accessing a control flow graph that defines a data dependency and an execution sequence of a plurality of tasks of an application that executes on a plurality of system components. The execution sequence of the tasks in the control flow graph is modified as a clustered control flow graph that clusters active and idle phases of a system component while maintaining the data dependency. The clustered control flow graph is sent to an operating system, where the operating system utilizes the clustered control flow graph for scheduling the tasks.

Подробнее
Номер записи: 6
18-08-2016 дата публикации

DELAYING EXECUTION IN A PROCESSOR TO INCREASE POWER SAVINGS

Номер: US20160239077A1
Автор: Pradip Bose, Alper Buyuktosunoglu, Hans M. Jacobson, Augusto J. Vega, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, JACOBSON HANS M, VEGA AUGUSTO J, Bose Pradip, Buyuktosunoglu Alper, Jacobson Hans M., Vega Augusto J.
Принадлежит:

Embodiments relate to storing data in memory. An aspect includes applying a power savings technique to at least a subset of a processor. Pending work items scheduled to be executed by the processor are monitored. The pending work items are grouped based on the power savings technique. The grouping includes delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor. It is determined that an execution criteria has been met. The pending work items are executed based on the execution criteria being met and the grouping. 1. A computer implemented method comprising:applying a power savings technique to at least a subset of a processor;monitoring pending work items scheduled to be executed by the processor;grouping the pending work items based on the power savings technique, the grouping including delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor;determining that an execution criteria has been met; andexecuting the pending work items based on the execution criteria being met and the grouping, wherein:the power savings technique is power gating,the pending work items are off-chip memory requests located in a queue,the executing includes a burst of contents of the queue to an off-chip memory, the off-chip memory connected to the memory controller via a memory link,the power savings technique is applied to at least one of the processor, a memory located on the processor, the memory link, and the off-chip memory, and a number of pending working items in the queue exceeds a threshold number of pending work items and', 'a number of cycles since a last burst is longer than a threshold amount of time., 'the execution criteria includes at least one of2. The method of claim 1 , further comprising deactivating the power savings ...

Подробнее
Номер записи: 7
09-03-2017 дата публикации

OPTIMIZATION OF APPLICATION WORKFLOW IN MOBILE EMBEDDED DEVICES

Номер: US20170068521A1
Автор: Ramon Bertran Monfort, Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, Hans M. Jacobson, William J. Song, Karthik V. Swaminathan, Augusto J. Vega, Liang Wang, BERTRAN MONFORT RAMON, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, CHER CHEN-YONG, JACOBSON HANS M, SONG WILLIAM J, SWAMINATHAN KARTHIK V, VEGA AUGUSTO J, WANG LIANG, Bertran Monfort Ramon, Bose Pradip, Buyuktosunoglu Alper, Cher Chen-Yong, Jacobson Hans M., Song William J., Swaminathan Karthik V., Vega Augusto J., Wang Liang
Принадлежит:

An aspect includes optimizing an application workflow. The optimizing includes characterizing the application workflow by determining at least one baseline metric related to an operational control knob of an embedded system processor. The application workflow performs a real-time computational task encountered by at least one mobile embedded system of a wirelessly connected cluster of systems supported by a server system. The optimizing of the application workflow further includes performing an optimization operation on the at least one baseline metric of the application workflow while satisfying at least one runtime constraint. An annotated workflow that is the result of performing the optimization operation is output. 113.-. (canceled)14. A system for optimizing an application workflow , comprising:a memory having computer readable instructions; anda processor for executing the computer readable instructions, the computer readable instructions including:characterizing the application workflow by determining at least one baseline metric related to an operational control knob of an embedded system processor, the application workflow configured to perform a real-time computational task encountered by at least one mobile embedded system of a wirelessly connected cluster of systems supported by a server system;performing an optimization operation on at least one baseline metric of the application workflow while satisfying at least one runtime constraint; andoutputting an annotated workflow, the annotated workflow being a result of the performing of the optimization operation.15. The system of claim 14 , wherein the optimization operation comprises a static preparation of the application workflow claim 14 , the static preparation comprising:characterizing the at least one baseline metric of the application workflow as a function of time; andoptimizing the at least one baseline metric within the at least one runtime constraint.16. The system of claim 14 , wherein the ...

Подробнее
Номер записи: 8
23-08-2016 дата публикации

Delaying execution in a processor to increase power savings

Номер: US0009423859B2
Автор: Pradip Bose, Alper Buyuktosunoglu, Hans M. Jacobson, Augusto J. Vega, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, JACOBSON HANS M, VEGA AUGUSTO J, Bose Pradip, Buyuktosunoglu Alper, Jacobson Hans M., Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION, IBM, International Business Machines Corporation

Embodiments relate to storing data in memory. An aspect includes applying a power savings technique to at least a subset of a processor. Pending work items scheduled to be executed by the processor are monitored. The pending work items are grouped based on the power savings technique. The grouping includes delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor. It is determined that an execution criteria has been met. The pending work items are executed based on the execution criteria being met and the grouping.

Подробнее
Номер записи: 9
29-12-2016 дата публикации

CLUSTERING EXECUTION IN A PROCESSING SYSTEM TO INCREASE POWER SAVINGS

Номер: US20160378161A1
Автор: Pradip Bose, Alper Buyuktosunoglu, Hans M. Jacobson, Augusto J. Vega, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, JACOBSON HANS M, VEGA AUGUSTO J, Bose Pradip, Buyuktosunoglu Alper, Jacobson Hans M., Vega Augusto J.
Принадлежит: International Business Machines Corp

Embodiments relate to clustering execution in a processing system. An aspect includes accessing a control flow graph that defines a data dependency and an execution sequence of a plurality of tasks of an application that executes on a plurality of system components. The execution sequence of the tasks in the control flow graph is modified as a clustered control flow graph that clusters active and idle phases of a system component while maintaining the data dependency. The clustered control flow graph is sent to an operating system, where the operating system utilizes the clustered control flow graph for scheduling the tasks.

Подробнее
Номер записи: 10
27-06-2017 дата публикации

Optimization of application workflow in mobile embedded devices

Номер: US0009690555B2
Автор: Ramon Bertran Monfort, Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, Hans M. Jacobson, William J. Song, Karthik V. Swaminathan, Augusto J. Vega, Liang Wang, BERTRAN MONFORT RAMON, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, CHER CHEN-YONG, JACOBSON HANS M, SONG WILLIAM J, SWAMINATHAN KARTHIK V, VEGA AUGUSTO J, WANG LIANG, Bertran Monfort Ramon, Bose Pradip, Buyuktosunoglu Alper, Cher Chen-Yong, Jacobson Hans M., Song William J., Swaminathan Karthik V., Vega Augusto J., Wang Liang
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION, IBM, International Business Machines Corporation

An aspect includes optimizing an application workflow. The optimizing includes characterizing the application workflow by determining at least one baseline metric related to an operational control knob of an embedded system processor. The application workflow performs a real-time computational task encountered by at least one mobile embedded system of a wirelessly connected cluster of systems supported by a server system. The optimizing of the application workflow further includes performing an optimization operation on the at least one baseline metric of the application workflow while satisfying at least one runtime constraint. An annotated workflow that is the result of performing the optimization operation is output.

Подробнее
Номер записи: 11
30-03-2017 дата публикации

ADAPTIVE NETWORK WITH INTERCONNECTED AUTONOMOUS DEVICES

Номер: US20170094558A1
Автор: Alper Buyuktosunoglu, Pradip Bose, Augusto J. Vega, BUYUKTOSUNOGLU ALPER, BOSE PRADIP, VEGA AUGUSTO J, Buyuktosunoglu Alper, Bose Pradip, Vega Augusto J.
Принадлежит:

A computer-implemented method includes determining, by a first base station, that the first base station is overloaded with connections from mobile devices. Responsive to the first base station being overloaded, a status update may be received, by the first base station, from each of a plurality of base stations, where each base station is configured to provide connections to a plurality of mobile devices. Responsive to the first base station being overloaded, a second base station may be selected, by a computer processor of the first base station, from among the plurality of base stations. Responsive to the first base station being overloaded, the second base station may be instructed, by the first base station, to relocate from a first position to a new position closer to the first base station. The plurality of base stations automatically relocate to load-balance connections from the plurality of mobile devices. 17-. (canceled)8. A system comprising a first base station , the first base station comprising:a memory having computer readable instructions; and determining that the first base station is overloaded with connections from one or more mobile devices; and', receiving a status update from each of a plurality of base stations, each base station in the plurality of base stations configured to provide connections to a plurality of mobile devices;', 'selecting a second base station from among the plurality of base stations, the second base station located at a first position; and', 'instructing the second base station to relocate from the first position to a new position closer to the first base station;, 'responsive to the first base station being overloaded], 'one or more processors for executing the computer readable instructions, the computer readable instructions comprisingwherein the plurality of base stations automatically relocate to load-balance connections from the plurality of mobile devices.9. The system of claim 8 , wherein each of the plurality of ...

Подробнее
Номер записи: 12
18-08-2016 дата публикации

DELAYING EXECUTION IN A PROCESSOR TO INCREASE POWER SAVINGS

Номер: US20160239066A1
Автор: Pradip Bose, Alper Buyuktosunoglu, Hans M. Jacobson, Augusto J. Vega, BOSE PRADIP, BUYUKTOSUNOGLU ALPER, JACOBSON HANS M, VEGA AUGUSTO J, Bose Pradip, Buyuktosunoglu Alper, Jacobson Hans M., Vega Augusto J.
Принадлежит:

Embodiments relate to storing data in memory. An aspect includes applying a power savings technique to at least a subset of a processor. Pending work items scheduled to be executed by the processor are monitored. The pending work items are grouped based on the power savings technique. The grouping includes delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor. It is determined that an execution criteria has been met. The pending work items are executed based on the execution criteria being met and the grouping. 1. A computer implemented method comprising:applying a power savings technique to at least a subset of a processor;monitoring pending work items scheduled to be executed by the processor;grouping the pending work items based on the power savings technique, the grouping including delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor;determining that an execution criteria has been met; andexecuting the pending work items based on the execution criteria being met and the grouping, wherein:the power savings technique is transparent clock gating (TCG),the pending work items include data to be inserted into a pipeline,the grouping results in an idle clock cycle being inserted between two of the pending work items,the executing is by an execution unit on the processor,the power savings technique is applied to the pipeline, andthe execution criteria includes receiving a specified number of pending work items.2. The method of claim 1 , further comprising deactivating the power savings technique based on the execution criteria being met.3. The method of claim 1 , wherein the at least one of the pending work items is a non-critical pending work item.4. A system comprising a processor claim 1 , the system ...

Подробнее
Номер записи: 13
21-02-2013 дата публикации

Local Computation Logic Embedded in a Register File to Accelerate Programs

Номер: US20130046955A1
Автор: Bose Pradip, Buyuktosunoglu Alper, Derby Jeffrey Haskell, Franceschini Michele Martino, Montoye Robert Kevin, Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION

A system and methods for improving performance of an central processing unit. The central processing unit system includes: a pipeline configured to receive an instruction; and a register file partitioned into a one or more subarrays where (i) the register file includes one or more computation elements and (ii) the one or more computation elements are directly connected to one or more subarrays. 1. A central processing unit system , comprising:a pipeline configured to receive an instruction; anda register file partitioned into a plurality of subarrays wherein (i) said register file comprises at least one computation element and (ii) said at least one computation element is directly connected to at least one of said plurality of subarrays.2. The central processing unit system according to wherein said pipeline is configured to execute instructions using either (i) a resource which is part of said pipeline wherein said resource uses at least one register from said register file or (ii) said plurality of computation elements.3. The central processing unit system according to wherein (i) said register file is organized into a plurality of concurrently operable subspaces of registers and (ii) each of said plurality of concurrently operable subspaces comprises at least one of said plurality of subarrays.4. The central processing unit system according to wherein said pipeline is further configured to forward said instruction to said at least one computation element.5. The central processing unit system according to wherein said at least one computation element is configured to:transform said instruction to a control signal; andsend said control signal to said at least one computation element.6. The central processing unit system according to wherein said pipeline is further configured to:transform said instruction to a control signal; andsend said control signal to said at least one computation element.7. The central processing unit system according to wherein said at least ...

Подробнее
Номер записи: 14
22-05-2014 дата публикации

THREAD CONSOLIDATION IN PROCESSOR CORES

Номер: US20140143570A1
Автор: Bose Pradip, Buyuktosunoglu Alper, Rosenburg Bryan S., Ryu Kyung D., Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION

According to one embodiment, a method for thread consolidation is provided for a system that includes an operating system and a multi-core processing chip in communication with an accelerator chip. The method includes running an application having software threads on the operating system, mapping the software threads to physical cores in the multi-core processing chip, identifying one or more idle hardware threads in the multi-core processing chip and identifying one or more idle accelerator units in the accelerator chip. The method also includes executing the software threads on the physical cores and the accelerator unit. The method also includes the controller module consolidating the software threads executing on the physical cores, resulting in one or more idle physical cores and a consolidated physical core. The method also includes the controller module activating a power savings mode for the one or more idle physical cores. 1. A method for thread consolidation in a system that includes an operating system and a multi-core processing chip in communication with an accelerator chip , the method comprising:running an application having software threads on the operating system;mapping the software threads to physical cores in the multi-core processing chip;identifying one or more idle hardware threads in the multi-core processing chip;identifying one or more idle accelerator units in the accelerator chip;executing the software threads on the physical cores and the accelerator unit;consolidating, by the controller module, the software threads executing on the physical cores, resulting in one or more idle physical cores and a consolidated physical core; andactivating, by the controller module, a power savings mode for the one or more idle physical cores.2. The method of claim 1 , further comprising:consolidating, by the controller module, the software threads executing on the accelerator units to provide one or more idle accelerator units; andactivating, by the ...

Подробнее
Номер записи: 15
22-05-2014 дата публикации

THREAD CONSOLIDATION IN PROCESSOR CORES

Номер: US20140143783A1
Автор: Bose Pradip, Buyuktosunoglu Alper, Rosenburg Bryan S., Ryu Kyung D., Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION

According to one embodiment, a method for thread consolidation is provided for a system that includes an operating system and a multi-core processing chip in communication with an accelerator chip. The method includes running an application having software threads on the operating system, mapping the software threads to physical cores in the multi-core processing chip, identifying one or more idle hardware threads in the multi-core processing chip and identifying one or more idle accelerator units in the accelerator chip. The method also includes executing the software threads on the physical cores and the accelerator unit. The method also includes the controller module consolidating the software threads executing on the physical cores, resulting in one or more idle physical cores and a consolidated physical core. The method also includes the controller module activating a power savings mode for the one or more idle physical cores. 111-. (canceled)12. A system for thread consolidation , the system comprising:an operating system and a multi-core processing chip in communication with an accelerator chip, the system configured to perform a method comprising:running an application having software threads on the operating system;mapping the software threads to physical cores in the multi-core processing chip;identifying one or more idle hardware threads in the multi-core processing chip;identifying one or more idle accelerator units in the accelerator chip;executing the software threads on the physical cores and the accelerator unit;consolidating, by the controller module, the software threads executing on the physical cores, resulting in one or more idle physical cores and a consolidated physical core; andactivating, by the controller module, a power savings mode for the one or more idle physical cores.13. The system of claim 12 , further comprising:consolidating, by the controller module, the software threads executing on the accelerator units to provide one or more ...

Подробнее
Номер записи: 16
30-03-2017 дата публикации

ADAPTIVE NETWORK WITH INTERCONNECTED AUTONOMOUS DEVICES

Номер: US20170094559A1
Автор: Bose Pradip, Buyuktosunoglu Alper, Vega Augusto J.
Принадлежит:

A computer-implemented method includes determining, by a first base station, that the first base station is overloaded with connections from mobile devices. Responsive to the first base station being overloaded, a status update may be received, by the first base station, from each of a plurality of base stations, where each base station is configured to provide connections to a plurality of mobile devices. Responsive to the first base station being overloaded, a second base station may be selected, by a computer processor of the first base station, from among the plurality of base stations. Responsive to the first base station being overloaded, the second base station may be instructed, by the first base station, to relocate from a first position to a new position closer to the first base station. The plurality of base stations automatically relocate to load-balance connections from the plurality of mobile devices. 1. A computer-implemented method , comprising:determining, by a first base station, that the first base station is overloaded with connections from one or more mobile devices; and receiving, by the first base station, a status update from each of a plurality of base stations, each base station in the plurality of base stations configured to provide connections to a plurality of mobile devices;', 'selecting, by a computer processor of the first base station, a second base station from among the plurality of base stations, the second base station located at a first position; and', 'instructing, by the first base station, the second base station to relocate from the first position to a new position closer to the first base station;, 'responsive to the first base station being overloadedwherein the plurality of base stations automatically relocate to load-balance connections from the plurality of mobile devices.2. The method of claim 1 , wherein each of the plurality of base stations comprises a transportation mechanism claim 1 , and wherein each of the ...

Подробнее
Номер записи: 17
25-06-2015 дата публикации

POWER MANAGEMENT FOR IN-MEMORY COMPUTER SYSTEMS

Номер: US20150177811A1
Автор: Bose Pradip, Buyuktosunoglu Alper, Fleischer Bruce M., Fox Thomas W., Jacobson Hans M., Nair Ravi, Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION

According to one embodiment, a method for power management of a compute node including at least two power-consuming components is provided. A power capping control system compares power consumption level of the compute node to a power cap. Based on determining that the power consumption level is greater than the power cap, actions are performed including: reducing power provided to a first power-consuming component based on determining that it has an activity level below a first threshold and that power can be reduced to the first power-consuming component. Power provided to a second power-consuming component is reduced based on determining that it has an activity level below a second threshold and that power can be reduced to the second power-consuming component. Power reduction is forced in the compute node based on determining that power cannot be reduced in either of the first or second power-consuming component. 1. A method for power management of a compute node comprising at least two power-consuming components , the method comprising:determining, by a power capping control system of the compute node, a power consumption level of the compute node;comparing, by the power capping control system, the power consumption level to a power cap; and reducing power provided to a first power-consuming component of the compute node based on determining that the first power-consuming component has an activity level below a first threshold and that power can be reduced to the first power-consuming component;', 'reducing power provided to a second power-consuming component of the compute node based on determining that the second power-consuming component has an activity level below a second threshold and that power can be reduced to the second power-consuming component; and', 'forcing a power reduction in the compute node based on determining that power cannot be reduced in either of the first or second power-consuming component., 'based on determining that the power ...

Подробнее
Номер записи: 18
23-08-2018 дата публикации

Adaptive network with interconnected autonomous devices

Номер: US20180242194A1
Автор: Alper Buyuktosunoglu, Augusto J. Vega, Pradip Bose
Принадлежит: International Business Machines Corp

A computer program product includes a computer readable storage medium having program instructions embodied therewith. The program instructions are executable by a processor to cause the processor to perform a method that includes determining, by a first base station, that the first base station is overloaded with connections from mobile devices. Responsive to the first base station being overloaded, a status update may be received, by the first base station, from each of a plurality of base stations. A second base station may be selected, by the first base station, from among the plurality of base stations. Responsive to the first base station being overloaded, the second base station may be instructed, by the first base station, to relocate from a first position to a new position closer to the first base station. The plurality of base stations automatically relocate to load-balance connections from the plurality of mobile devices.

Подробнее
Номер записи: 19
24-09-2015 дата публикации

POWER MANAGEMENT FOR MULTI-CORE PROCESSING SYSTEMS

Номер: US20150268710A1
Автор: Bose Pradip, Buyuktosunoglu Alper, Floyd Michael S., Hanson Heather L., Jacobson Hans M., Rajamani Karthick, RAMANI Srinivasan, ROSEDAHL Todd J., Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION

According to an aspect, power management of a multi-core processing system includes determining workload characteristics in the multi-core processing system. A power adjustment scenario is identified based on the workload characteristics. A predetermined actuation order for at least two power adjustment actuators is identified based on the power adjustment scenario. Based on the predetermined actuation order, it is determined whether there is an adequate adjustment capacity for a power adjustment action associated with one of the at least two power adjustment actuators. The power adjustment action is initiated based on the predetermined actuation order and determining that the adequate adjustment capacity is available. 1. A method for power management of a multi-core processing system , the method comprising:determining workload characteristics in the multi-core processing system;identifying a power adjustment scenario based on the workload characteristics;identifying a predetermined actuation order for at least two power adjustment actuators based on the power adjustment scenario;based on the predetermined actuation order, determining whether there is an adequate adjustment capacity for a power adjustment action associated with one of the at least two power adjustment actuators; andinitiating the power adjustment action based on the predetermined actuation order and determining that the adequate adjustment capacity is available.2. The method of claim 1 , wherein the workload characteristics comprise at least one of a level of processor core utilization claim 1 , a level of memory system activity claim 1 , or a level of cache system activity.3. The method of claim 1 , further comprising:determining whether there is a second adequate adjustment capacity for a second power adjustment action associated with a second of the at least two power adjustment actuators based on determining that there is an inadequate adjustment capacity for the power adjustment action of the ...

Подробнее
Номер записи: 20
20-09-2018 дата публикации

Model training by discarding relatively less relevant parameters

Номер: US20180268290A1
Автор: Alper Buyuktosunoglu, Augusto J. Vega, Pradip Bose
Принадлежит: International Business Machines Corp

Embodiments of the present invention include a system, computer-implemented method, and a computer program product. A non-limiting example of the method includes a processor utilizing a model having a plurality of parameters. The processor compares a current value of a model parameter to a prior value of the model parameter. Based at least in part on comparing the current value of the model parameter to the prior value of the model parameter, a determination is made that the model being utilized by the processor has changed. The current value of the model parameter is transmitted by the processor.

Подробнее
Номер записи: 21
08-10-2015 дата публикации

DELAYING EXECUTION IN A PROCESSOR TO INCREASE POWER SAVINGS

Номер: US20150286261A1
Автор: Bose Pradip, Buyuktosunoglu Alper, Jacobson Hans M., Vega Augusto J.
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION

Embodiments relate to storing data in memory. An aspect includes applying a power savings technique to at least a subset of a processor. Pending work items scheduled to be executed by the processor are monitored. The pending work items are grouped based on the power savings technique. The grouping includes delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor. It is determined that an execution criteria has been met. The pending work items are executed based on the execution criteria being met and the grouping. 1. A computer implemented method comprising:applying a power savings technique to at least a subset of a processor;monitoring pending work items scheduled to be executed by the processor;grouping the pending work items based on the power savings technique, the grouping including delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor;determining that an execution criteria has been met; andexecuting the pending work items based on the execution criteria being met and the grouping.2. The method of claim 1 , further comprising deactivating the power savings technique based on the execution criteria being met.3. The method of claim 1 , wherein the at least one of the pending work items is a non-critical pending work item.4. The method of claim 1 , wherein the power savings technique is power gating.5. The method of claim 4 , whereinthe pending work items are ready instructions located in an issue queue, the executing is by an execution unit on the processor,the power savings technique is applied to the execution unit, and a number of pending working items in the issue queue exceeds a threshold number of pending work items and', 'an oldest pending work item in the issue queue is older than a threshold age., ' ...

Подробнее
Номер записи: 22
25-10-2018 дата публикации

Parameter criticality-aware resilience

Номер: US20180307968A1
Автор: Alper Buyuktosunoglu, Augusto J. Vega, Pradip Bose
Принадлежит: International Business Machines Corp

A computer-implemented method optimizes a neural network. One or more processors define layers in a neural network based on neuron locations relative to incoming initial inputs and original outgoing final outputs of the neural network, where a first defined layer is closer to the incoming initial inputs than a second defined layer, and where the second defined layer is closer to the original outgoing final outputs than the first defined layer. The processor(s) define parameter criticalities for parameter weights stored in a memory used by the neural network, and associate defined layers in the neural network with different memory banks based on the parameter criticalities for the parameter weights. The processor(s) store parameter weights used by neurons in the first defined layer in the first memory bank and parameter weights used by neurons in the second defined layer in the second memory bank.

Подробнее
Номер записи: 23
23-11-2021 дата публикации

Model training by discarding relatively less relevant parameters

Номер: US11182674B2
Автор: Alper Buyuktosunoglu, Augusto J. Vega, Pradip Bose
Принадлежит: International Business Machines Corp

Embodiments of the present invention include a system, computer-implemented method, and a computer program product. A non-limiting example of the method includes a processor utilizing a model having a plurality of parameters. The processor compares a current value of a model parameter to a prior value of the model parameter. Based at least in part on comparing the current value of the model parameter to the prior value of the model parameter, a determination is made that the model being utilized by the processor has changed. The current value of the model parameter is transmitted by the processor.

Подробнее
Номер записи: 24
12-07-2016 дата публикации

Power management for in-memory computer systems

Номер: US9389675B2
Автор: Alper Buyuktosunoglu, Augusto J. Vega, Bruce M. Fleischer, Hans M. Jacobson, Pradip Bose, Ravi Nair, Thomas W. Fox
Принадлежит: International Business Machines Corp

According to one embodiment, a method for power management of a compute node including at least two power-consuming components is provided. A power capping control system compares power consumption level of the compute node to a power cap. Based on determining that the power consumption level is greater than the power cap, actions are performed including: reducing power provided to a first power-consuming component based on determining that it has an activity level below a first threshold and that power can be reduced to the first power-consuming component. Power provided to a second power-consuming component is reduced based on determining that it has an activity level below a second threshold and that power can be reduced to the second power-consuming component. Power reduction is forced in the compute node based on determining that power cannot be reduced in either of the first or second power-consuming component.

Подробнее
Номер записи: 25
29-09-2015 дата публикации

Thread consolidation in processor cores

Номер: US9146609B2
Автор: Alper Buyuktosunoglu, Augusto J. Vega, Bryan S. Rosenburg, Kyung D. Ryu, Pradip Bose
Принадлежит: International Business Machines Corp

According to one embodiment, a method for thread consolidation is provided for a system that includes an operating system and a multi-core processing chip in communication with an accelerator chip. The method includes running an application having software threads on the operating system, mapping the software threads to physical cores in the multi-core processing chip, identifying one or more idle hardware threads in the multi-core processing chip and identifying one or more idle accelerator units in the accelerator chip. The method also includes executing the software threads on the physical cores and the accelerator unit. The method also includes the controller module consolidating the software threads executing on the physical cores, resulting in one or more idle physical cores and a consolidated physical core. The method also includes the controller module activating a power savings mode for the one or more idle physical cores.

Подробнее
Номер записи: 26
30-07-2019 дата публикации

Adaptive network with interconnected autonomous devices

Номер: US10368267B2
Автор: Alper Buyuktosunoglu, Augusto J. Vega, Pradip Bose
Принадлежит: International Business Machines Corp

A computer-implemented method includes determining, by a first base station, that the first base station is overloaded with connections from mobile devices. Responsive to the first base station being overloaded, a status update may be received, by the first base station, from each of a plurality of base stations, where each base station is configured to provide connections to a plurality of mobile devices. Responsive to the first base station being overloaded, a second base station may be selected, by a computer processor of the first base station, from among the plurality of base stations. Responsive to the first base station being overloaded, the second base station may be instructed, by the first base station, to relocate from a first position to a new position closer to the first base station. The plurality of base stations automatically relocate to load-balance connections from the plurality of mobile devices.

Подробнее
Номер записи: 27