Collapsible warning device

A collapsible warning device has a body structure composed of three coupling members--a base member (11), a left side member (12) and a right side member (13); each coupling member is integrally formed with a unilateral open section (111, 121, 131), and includes: a plurality of light supporting seats (20) each with a plurality of light receiving holes (21) respectively installed on the open sections (111, 121, 131) with a plurality of light emitting diodes (22) disposed in the light receiving holes (21); a power source (41) provided at the base member (11); a circuit board (43) with an IC flickering circuit disposed on the base member (11) and connected to the diodes (22); a power switch (42) connected with the power source (41) and the IC flickering circuit; a power socket (45) installed at an lower edge of the base member (11) and connected to the power switch (42); and a plurality of light reflecting members (30) separately connected to each member over the open sections (111, 121, 131 ...

Method for forming a via of printed board and structure thereof

A method for forming a via of printed board and structure thereof is provided. The forming method includes the steps as followed. First, a circuit substrate is provided, and first and second circuits are formed on an upper side and a lower side of the circuit substrate. A first through hole is formed through the circuit board. A first metal layer is formed on an inner surface of the first through hole, and is contacted with the first circuit on the circuit substrate. An insulated stuff is filled between the first metal layer in the first through hole, and is partially covered on the first circuit. A second through hole is formed through the insulated stuff. A second metal layer is formed on an inner surface of the second through hole, and is partially contacted the second circuit to electrically connect with the second circuit on the upper side and the lower side of the circuit board. Therefore, the same one via can electrically connect the first circuits and the second circuits respectively ...

A rapid and low cost technique has been developed to identify porcine insulin-like-growth factor 2 intron 7 point mutation and served as a marker

A rapid and low cost technique has been developed to identify porcine insulin-like-growth factor 2 intron 7 point mutation and served as a marker. We used the published primers to amplify the target DNA fragment by polymerase chain reaction (PCR). And the DNA fragment was cloned and then sequenced. According to the sequences, we modified the key positions of the sequence to design three primers. The three primes were used to amplify different DNA fragments with different genotypes by PCR to avoid extra restriction cut reaction. Among three primers, C1 was long to specifically amplify muscular allele, G1 was short to specifically amplify non-muscular allele, and R1 was mutual and complementary to the sequence. After PCR and electrophoresis, the sample with 92 bp band only was identified as muscular genotype; the sample with 72 bp band only was identified as non-muscular genotype; the sample with both 92 bp and 72 bp bands was identified as hetero-genotype.

OPTOELECTRONIC MODULE AND METHOD OF PRODUCING SAME

An optoelectronic module includes an interposer base having first and second recesses formed on a specified surface thereof; a joint material layer filled in the first and second recesses; a first optoelectronic element placed in the first recess and coupled to the interposer base via the joint material layer, wherein an optical signal is emitted from or passes through a lateral surface of the first optoelectronic element; and a second optoelectronic element placed in the second recess and coupled to the interposer base via the joint material layer, wherein a lateral surface of the second optoelectronic element faces the lateral surface of the first optoelectronic element for coupling to and receiving the optical signal emitted from or passing through the lateral surface of the first optoelectronic element. A fixture is used to place the first and second optoelectronic elements into the first and second recesses while controlling some critical distances. 1. An optoelectronic module , comprising:an interposer base having a first recess and a second recess, both formed on a specified surface thereof;a joint material layer filled in the first recess and the second recess;a first optoelectronic element placed in the first recess and coupled to the interposer base via the joint material layer, wherein an optical signal is emitted from or passes through a lateral surface of the first optoelectronic element; anda second optoelectronic element placed in the second recess and coupled to the interposer base via the joint material layer, wherein a lateral surface of the second optoelectronic element faces the lateral surface of the first optoelectronic element for coupling to and receiving the optical signal emitted from or passing through the lateral surface of the first optoelectronic element.2. The optoelectronic module according to claim 1 , wherein the interposer base is a silicon interposer base.3. The optoelectronic module according to claim 1 , wherein the interposer ...

ELECTROMAGNETIC INTERFERENCE SHIELDING STRUCTURE AND MANUFACTURING METHOD THEREOF

An electromagnetic interference (EMI) shielding structure, which includes: a substrate, at least one chip unit, a packing layer, and an EMI shielding unit. The chip unit is disposed on the surface of the substrate and electrically coupled thereto. The packing layer is formed on the substrate and covers the chip unit. The EMI shielding unit includes: a first, second, and third shielding layer. The first shielding layer covers the outer surface of the packing layer and the lateral surface of the substrate. The second and third shielding layer respectively covers the outer surface of the first and second shielding layer. Based on the instant disclosure, the EMI shielding unit uses the methods of sputtering and electroless plating, to increase the adhesion strength of the EMI shielding unit and make the thickness of the shielding layer uniform. The instant disclosure raises the EMI shielding efficiency and lowers the manufacturing cost.

Vertical TFT with tunnel barrier

A vertically oriented thin film transistor (TFT) having a tunnel barrier is disclosed. The tunnel barrier may be formed from a dielectric such as silicon oxide or hafnium oxide. The vertically oriented TFT selection device with tunnel barrier may serve as a selection device in a 3D memory array. The vertically oriented TFT may be used to connect/disconnect a global bit line to/from a vertical bit line in a 3D memory array. The vertically oriented TFT may be used to connect/disconnect a source line to/from a channel of a vertical NAND string in a 3D memory array. A vertical TFT with tunnel barrier has a high breakdown voltage, low leakage current, and high on current. The tunnel barrier can be at the top junction or bottom junction of the TFT.

Wireless physiological monitoring equipment for radiation therapy

Electronic module with electromagnetic shielding structure and manufacturing method of same

The present invention relates to an electronic module with an electromagnetic shielding structure and a manufacturing method. The method includes: providing a first substrate, at least one surface of which is disposed with at least one electronic element and at least one wiring pad; providing a second substrate having a conductive film and at least one conductive micro-bump disposed on the conductive film at a position corresponding to the wiring pad; and coupling the first and second substrates to have the conductive micro-bump in contact with the wiring pad to achieve electrical connection.

Chip stacked structure

A chip package structure is provided. The chip package structure includes a first die and a second die stacked on the first die. The first die has a plurality of connection structures each which has a through hole, a connection pad and a solder bump. The connection pad has a terminal connected to the through hole. The solder bump is disposed on the connection pad and located around the through hole. The second die has a plurality of through holes which are aligned and bonded to the solder bump respectively. The chip package structure may simplify the package process and improve the process yield rate.

Portable electronic device

Chip stacked structure and method of fabricating the same

A chip stacked structure and method of fabricating the same are provided. The chip stacked structure includes a first chip and a second chip stacked on the first chip. The first chip has a plurality of metal pads disposed on an upper surface thereof and grooves disposed on a side surface thereof. The metal pads are correspondingly connected to upper openings of the grooves. The second chip has a plurality of grooves on a side surface of the second chip, locations of which are corresponding to that of the grooves on the side surface of the first chip. Conductive films are formed on the grooves of the first chip and the second chip and the metal pads to electronically connect the first chip and second chip. The chip stacked structure may simplify the process and improve the process yield rate.

Semiconductor package with conformal EM shielding structure and manufacturing method of same

A semiconductor package includes a substrate having a front side, a bottom side, and a sidewall along a perimeter of the substrate, a plurality of solder pads on the bottom side, at least one EM shielding contact structure on the bottom side and partially exposed on the sidewall, a semiconductor device mounted on the front side, a mold compound on the front side and covering the semiconductor device, and an EM shielding layer conformally covering the mold compound and the sidewall. The EM shielding layer is in direct contact with the exposed portion of the EM shielding contact structure on the sidewall.

Dual gate structure

Methods for forming a dual gate structure for a vertical TFT are described. The dual gate structure may be formed by performing a first etching process that includes forming a first set of trenches by etching a first set of oxide pillars to a first depth and forming a second set of trenches by etching a second set of oxide pillars to a second depth higher than the first depth, forming a first set of gate structures within the first set of trenches, forming a second set of gate structures within the second set of trenches, performing a second etching process that includes forming a third set of trenches by etching the first set of gate structures from a second initial depth to a third depth and forming a fourth set of trenches by etching the second set of gate structures to a fourth depth higher than the third depth.

Multi-wavelength light-emitting module

A multi-wavelength light-emitting module includes: a PCB, a drive IC structure, a conductive structure, a multi-wavelength LED array set, a plurality of conductive elements, and an optical amplifier structure. The PCB has an input/output pad. The drive IC structure is disposed on the PCB and has at least one concave groove. The conductive structure is electrically connected between the drive IC structure and the input/output pad. The multi-wavelength LED array set is received in the at least one concave groove. The conductive elements are electrically connected between drive IC structure and the multi-wavelength LED array set, respectively. The optical amplifier structure is disposed over the multi-wavelength LED array set for receiving light source from the multi-wavelength LED array set.

Light emitting device and LED print head using the same

Structure of self-weight dual movable sliding window

Light emitting module

The light emitting module includes a substrate, a light emitting element and a driving circuit chip. The light emitting element is attached to the substrate and has a plurality of first contacts on a top surface thereof. The driving circuit chip is attached onto the substrate and has a plurality of second contacts in direct connection to the first contacts one on one when being placed above the light emitting element.

Method of a wafer level packaging of a module

LIGHT-EMITTING MODULE

A light-emitting module includes a base, a connecting unit disposed on the base, a light-emitting unit disposed on the base, and a drive unit electrically coupled to and bridging the connecting unit and the light-emitting unit for driving the light-emitting unit. The base includes a plurality of first bonding pads formed thereon. The connecting unit is electrically coupled to the first bonding pads, and the light-emitting unit is electrically coupled to the first bonding pads via the drive unit and the connecting unit. The connecting unit includes a plurality of connectors aligned in a first direction of the base, and the light-emitting unit includes a plurality of light-emitting elements aligned in the first direction and respectively spaced apart from and aligned with the connectors in a second direction perpendicular to the first direction.

Apparel stand

Embedded package structure module with high-density electrical connections and method for making the same

An embedded package structure module with high-density electrical connections, including: a drive IC structure, an LED array structure and a plurality of conductive structures. The drive IC structure has at least one concave groove. The LED array structure is received in the at least one concave groove of the drive IC structure, and the LED array structure has a plurality of second open grooves formed on its lateral wall and close to the drive IC structure. The conductive structures respectively traverse the second open grooves in order to make the conductive structures electrically connect between the drive IC structure and the LED array structure.

In-situ overlay alignment

A semiconductor wafer is disclosed that includes a plurality of fields, including a plurality of alignment fields. Each alignment field includes a plurality of intra-field small scribe lane primary mark (SSPM) overlay mark pairs there around. The SSPM mark pairs allow for in-situ, non-passive intra-field alignment correction. In one embodiment, there may be between two and four alignment fields, and between two and four SSPM mark pairs around each alignment field. The SSPM marks of each mark pair may be extra scribe-lane marks.

Multi-wavelength light-emitting module

A multi-wavelength light-emitting module that includes a PCB, a drive IC structure, a conductive structure, a multi-wavelength LED array set, a plurality of conductive elements, and an optical amplifier structure. The PCB has at least one input/output pad. The drive IC structure is disposed on the PCB and having at least one concave groove formed on top surface thereof. The conductive structure is electrically connected between the drive IC structure and the at least one input/output pad. The multi-wavelength LED array set is received in the at least one concave groove. The conductive elements are electrically connected between drive IC structure and the multi-wavelength LED array set, respectively. The optical amplifier structure is disposed over the multi-wavelength LED array set for receiving light sources from the multi-wavelength LED array set.

Circuit layout structure and method

A symmetrical circuit layout structure includes a number of signal wires, a ground wire and a dielectric layer. The signal wires include a first portion placed on a first plane and a second portion placed on a second plane. The ground wire includes a first portion placed above the first portion of the signal wires and adjacent to the second portion of the signal wires, and a second portion placed below the second portion of the signal wires and adjacent to the first portion of the signal wires. The dielectric layer is placed between the first plane and the second plane.

Resistive memory device having sidewall spacer electrode and method of making thereof

A resistive memory device includes a first electrode, a sidewall spacer electrode located on a sidewall of a dielectric material contacting the first electrode, a resistive memory cell containing a resistive memory material and contacting the sidewall spacer electrode, and a second electrode containing the resistive memory cell.

Method for rapidly identifying porcine estrogen receptor marker

A method for rapidly identifying porcine estrogen receptor (ESR) marker comprises using published primers to amplify the target DNA fragment by polymerase chain reaction (PCR). The DNA fragment is cloned and then sequenced. The key positions of the sequence are modified to generate three primers which are used to amplify different DNA fragments with different genotypes by PCR to eliminate extra restriction cut reaction. A long one of the primers is to specifically amplify non-prolific allele, a short one of the primers is to specifically amplify prolific allele, and the remaining one is mutual and complimentary to the sequence. After PCR and electrophoresis, the sample with 90 bp band is identified as prolific genotype, the sample with 110 bp band is identified as non-prolific genotype, and the sample with 90 bp and 110 bp bands is identified as hetero-genotype.

In-situ overlay alignment

A semiconductor wafer is disclosed that includes a plurality of fields, including a plurality of alignment fields. Each alignment field includes a plurality of intra-field small scribe lane primary mark (SSPM) overlay mark pairs there around. The SSPM mark pairs allow for in-situ, non-passive intra-field alignment correction. In one embodiment, there may be between two and four alignment fields, and between two and four SSPM mark pairs around each alignment field. The SSPM marks of each mark pair may be extra scribe-lane marks.

Method for deodorization and bacteriostasis for drain piping of toilet and kitchen

THRESHOLD SWITCH FOR MEMORY

The switching device includes three terminals including an inner surface, an oxide layer on the inner surface of the third terminal, and a chalcogenide pillar extending through the oxide layer and the third terminal, the pillar being in electrical communication with the first terminal and the second terminal, wherein the voltage difference between the first terminal and the second terminal changes the channel from a first state to a second state when a threshold voltage between the first terminal and the second terminal is exceeded, the threshold voltage being dependent on temperature. The third terminal is resistive and receives a control signal to apply heat to the pillar and modulate the threshold voltage. The switching device can be used to select the memory stack through the bitline and provide a nearly limitless current based on the threshold switching conduction providing avalanche current conduction through the switching device.

Multi-wavelength light-emitting module with high density electrical connection

Threshold switch for memory

The switching device includes three terminals including an inner surface, an oxide layer on the inner surface of the third terminal, and a chalcogenide pillar extending through the oxide layer and the third terminal, the pillar being in electrical communication with the first terminal and the second terminal, wherein the voltage difference between the first terminal and the second terminal changes the channel from a first state to a second state when a threshold voltage between the first terminal and the second terminal is exceeded, the threshold voltage being dependent on temperature. The third terminal is resistive and receives a control signal to apply heat to the pillar and modulate the threshold voltage. The switching device can be used to select the memory stack through the bitline and provide a nearly limitless current based on the threshold switching conduction providing avalanche current conduction through the switching device.

Multi-wavelength LED array package module and method for packaging the same

A method for packaging a multi-wavelength LED array package module includes: forming at least one concave groove on a drive IC structure; arranging a multi-wavelength LED array set in the at least one concave groove; solidifying a plurality of liquid conductive materials to form a plurality of conductive elements that is electrically connected between the drive IC structure and the multi-wavelength LED array set by a printing, a coating, a stamping, or a stencil printing process; arranging the drive IC structure on a PCB with at least one input/output pad; and then forming a conductive structure that is electrically connected between the drive IC structure and the at least one input/output pad.

Miniaturized electromagnetic interference shielding structure and manufacturing method thereof

An automatic video fortune-telling system

Method of wafer level packaging of a module

The method of a wafer level packaging includes preparing a substrate, assembling a system on a first side of the substrate, and placing solder balls on a second side of the substrate. The soldering balls s fixed on to the second side of the substrate after the module has been assembled. 1. A method of a wafer level packaging of a module , comprising:a step of preparing a substrate;a step of attaching a carrier on a second side of the substrate;a step of attaching at least one element on a first side of the substrate after the carrier is attached;a step of attaching a ring and a lid on the first side of the substrate after the at least one element is attached;a step of removing the carrier on the second side of the substrate after the ring and lid are attached;anda step of placing solder balls on a second side of the substrate after the carrier has been removed.2. The method of claim 1 , wherein the substrate is a glass wafer or a silicon wafer.3. The method of claim 1 , wherein the step of preparing the substrate comprises:etching the substrate to form vias;filling each of the vias with a conductive material;bonding a carrier to the second side of the substrate;grinding the first side of the substrate to reduce the thickness of the substrate.4. The method of claim 3 , wherein the carrier is a glass wafer or a silicon wafer.5. The method of claim 3 , wherein the step of preparing the substrate comprises forming a layout on the second side of the substrate.6. The method of claim 3 , wherein the step of preparing the substrate comprises forming a layout on the first side of the substrate.7. The method of claim 3 , wherein the lid is a glass wafer or a silicon wafer.8. The method of claim 3 , wherein a polymer is used to bond the carrier to the second side of the substrate.9. The method of claim 3 , wherein a layout on the second side of the substrate comprises pads claim 3 , a redistribution layer (RDL) and/or an under bump metallization (UBM) layer.10. The method of ...

Method and system for managing a cloud bookcase

The application is related to a method for managing the cloud bookcase, wherein the method includes the following steps. A download request transmitted from a mobile device using a sub id is received. The download request at least includes a device id and an Ebook id. A determine process is executed to determine whether the Ebook corresponding to the Ebook id would be produced or not and the Ebook would be allowed to be downloaded to the mobile device. The determine process includes the following steps. When the sub id or the device id is included in a group registered by the user id, the Ebook is produced and allowed to be downloaded to the mobile device. When the sub id or the device id is not included in the group, the sub id or the device id would be allowed to join the group according a default condition.

MODULE AND METHOD OF A SELECTIVE ELECTRONIC-MAGNETIC INTERFERENCE SHIELDING

Module and method of a selective electronic-magnetic interference shielding includes a substrate, at least a first electronic element deployed on a principle surface of the substrate, an mold resin covering the first electronic element, and an electronic-magnetic interference shielding, wherein the mold resin has a mold surface relatively far above the substrate and is divided into a central area and an outer area surrounding the central area. The mold resin installs a trench between the central area and the outer area, the trench forms a closed route enfolding the first electronic element, and the electro-magnetic interference shielding distributes over the central area and the trench. Therefore the module and method of a selective electronic-magnetic interference shielding is adaptable to various required designs with lower manufacturing cost.

Semiconductor package with conformal EM shielding structure and manufacturing method of same

A semiconductor package includes a substrate having a front side, a bottom side, and a sidewall along a perimeter of the substrate, a plurality of bump pads on the bottom side, at least one EM shielding contact structure on the bottom side and partially exposed on the sidewall, a semiconductor device mounted on the front side, a mold compound on the front side and covering the semiconductor device, and an EM shielding layer conformally covering the mold compound and the sidewall. The EM shielding layer is in direct contact with the exposed portion of the EM shielding contact structure on the sidewall.

Low power barrier modulated cell for storage class memory

Systems and methods for providing a Barrier Modulated Cell (BMC) structure that may comprise a reversible resistance-switching memory element within a memory array are described. The BMC structure may include a barrier layer comprising a layer of amorphous germanium or amorphous silicon germanium paired with a conductive metal oxide, such as titanium dioxide (TiO2), strontium titanate (SrTiO3), or a binary metal oxide. The BMC structure may include a conductive metal oxide in series with an amorphous layer of a low bandgap material. The low bandgap material may comprise a semiconductor material with a bandgap energy (Eg) less than 1.0 eV. The improved BMC structure may be used for providing multi-level memory elements within a three dimensional memory array.

Digital picture frame with picture acquisition

An digital picture frame capable of acquiring image of the picture independently, especially to digitalize the image of photos to a digital format and then display it on a display panel. The digital picture frame includes a display module which supports the image display, a scanning module which scans photos, and an input/output module for image delivery over external image processing/storing devices, such as the hard disk, camcorder, digital still camera and network image server.

Table rotating device

A rotating device has a turning wheel, a threaded sleeve, and a nut. The turning wheel has a hub having a center hole, a wheel rim, and a plurality of spokes connected to the hub and the wheel rim. The threaded sleeve has a flange and an outer thread. The threaded sleeve is inserted through the center hole of the hub and a through hole of a table plate. The nut engages with the outer thread of the threaded sleeve. An umbrella has a center post inserted through the threaded sleeve.

Method of a wafer level packaging of a module

The method of a wafer level packaging of a module includes preparing a substrate, assembling at least one element on a first side of the substrate, and placing solder balls on a second side of the substrate after the module has been assembled.

LIGHT EMITTING MODULE

PROBLEM TO BE SOLVED: To provide a light emitting module of high connection reliability even when a bonding pitch is small. SOLUTION: The light emitting module comprises a substrate 311, a drive circuit chip 731, a light emitting element 321 and a connector 700. The drive circuit 731 is provided with conductive bumps 941 and 942, and arranged as a flip chip, and the conductive bump 942 is brought into contact with a bond pad 521 of the light emitting element 321. Therefore the light emitting module, with a small pitch of bonding, having performance of high reliability is manufactured. As another method, the connector may be made as the flip chip instead of the drive circuit chip. In this case, the connector comprises the conductive bumps which is brought into contact with the light emitting element and the bond pad of the drive circuit chip. COPYRIGHT: (C)2006,JPO&NCIPI ...

Resistive memory device containing carbon barrier and method of making thereof

A resistive memory device, such as a BMC ReRAM device, includes at least one resistive memory element which contains a carbon barrier material portion and a resistive memory material portion that is disposed between a first electrode and a second electrode.

Light emitting module

The light emitting module includes a substrate, a light emitting element and a driving circuit chip. The light emitting element is attached to the substrate and has a plurality of first contacts on a top surface thereof. The driving circuit chip is attached onto the substrate and has a plurality of second contacts in direct connection to the first contacts one on one when being placed above the light emitting element.

Chip level EMI shielding structure and manufacture method thereof

A chip level EM1 shielding structure and a manufacture method thereof are provided. The chip level EMI shielding structure includes a semiconductor substrate, at least a ground conductor line, a ground layer and a connection structure. The ground conductor lines is disposed on a first surface of the semiconductor substrate and the ground layer is disposed on a second surface of the semiconductor substrate, while the connection structure is formed on a sidewall of the semiconductor substrate to connecting the ground conductor lines and the ground layer to form a shielding. The chip level EMI shielding structure has merits of small package volume and low manufacture cost.

Electronic module with electromagnetic shielding structure and manufacturing method of same

Easy Curtain Structure

An easy curtain structure contains a curtain piece formed in a continuous curve and concave shape, allowing to be folded, including a plurality of bores disposed on a number of raised folding ribs thereof respectively in a cross arrangement, and including at least one positioning structure mounted on a top and a bottom ends thereof respectively so as to be expended and to be fixed by using the positioning structure, wherein the positioning structure includes at lease one sucker fixed on the top and the bottom ends of the curtain piece, thereby the sunshine is stopped to directly shine indoors by the continuously curved and concaved curtain piece or through the bores to obtain heatproof, anti-sun, and bright effect.

ELECTROMAGNETIC INTERFERENCE SHIELDING STRUCTURE FOR INTEGRATED CIRCUIT SUBSTRATE AND METHOD FOR FABRICATING THE SAME

An electromagnetic interference (EMI) shielding structure for integrated circuit (IC) substrate includes a plurality of conductive contacts, a covering layer, and a sputtered layer. The conductive contacts are formed at the perimeter of a chip area on the IC substrate. The covering layer is formed on the conductive contacts and covers the chip area. A groove is formed on the covering layer for exposing the conductive contacts. The sputtered layer is formed on the covering layer and connected to the conductive contacts. The EMI shielding structure can restrain the interference in the chip area.

Method of deodorant for kitchen disposal and toilet pipeline

A method of deodorant for kitchen disposal or toilet pipeline is to prearrange fermentation catalyst at a water inlet with preserved water therein to dissolve a portion of the fermentation catalyst and to flow through a pipeline to the final destination.

Method of producing zirconia slurry

The present invention provides a method of producing zirconia slurry, comprising: preparing an initial solution which at least contains zirconyl nitrate as raw material; adding ammonium hydroxide (NH4OH) and zirconia powder to the initial solution and mixing well to form a colloidal suspension; and drying the colloidal suspension by microwave to obtain zirconia slurry. Particularly, the zirconia slurry of this invention uses zirconium hydroxide colloid as a binder so that the requirement for plasticity of extrusion formation can be achieved without using conventional organic additive, thereby solving air pollution problems resulting from the use of organic additive. In addition, this invention also discloses a method of using said zirconia slurry to produce a honey-comb sintered body. In this invention, the zirconia slurry is processed by vacuum kneading, microwave drying and sintering to form a honey-comb sintered body having the characteristic of sintered densification. In addition, the ...

Light-emitting module and methods for optically aligning and assembling the same

An optical alignment method is for a light-emitting module that includes a housing unit, a light-emitting unit disposed in the housing unit, and a lens unit. The optical alignment method includes: (a) through image-capturing techniques, finding a light-emitting point of the light-emitting unit and a predetermined reference point, and determining a total optical path length between the light-emitting point and an imaging plane; (b) finding a first center line that divides the total optical path length in half; (c) through image-capturing techniques, finding opposite first and second edges of the lens unit, and determining a lens length between the first and second edges; (d) finding a second center line that divides the lens length in half; and (e) assembling the lens unit to the housing unit so that the first and second center lines overlap. A light-emitting module and an assembly method therefor are also disclosed.

Multi-wavelength LED array package module and method for packaging the same

A method for packaging a multi-wavelength LED array package module includes: forming at least one concave groove on a drive IC structure; arranging a multi-wavelength LED array set in the at least one concave groove; solidifying a plurality of liquid conductive materials to form a plurality of conductive elements that is electrically connected between the drive IC structure and the multi-wavelength LED array set by a printing, a coating, a stamping, or a stencil printing process; disposing the drive IC structure on a PCB with at least one input/output pad; and then forming a conductive structure that is electrically connected between the drive IC structure and the at least one input/output pad.

METHOD FOR ARRANGING PRINT HEAD CHIPS

A method for arranging print head chips, includes: (a) setting a first fiducial mark and a second fiducial mark on a PCB for determining coordinate positions of a plurality of array units that are arranged on the PCB and calculating a print range of the array units, wherein each array unit has a plurality of spots that are transversely arranged from the first one of the spots to the last one of the spots in sequence; (b) setting a third fiducial mark as a start point for arranging the first spot of a first array unit of the array units on the PCB; and (c) arranging other array units on the PCB in sequence according to the coordinate positions and the start point.

Multi-wavelength light-emitting module with high density electrical connections

A multi-wavelength light-emitting module with high density electrical connections includes a drive IC structure and a multi-wavelength LED array structure. The drive IC structure has a drive IC unit formed on a top surface thereof. The multi-wavelength LED array structure is disposed on the top surface of the drive IC structure, and the multi-wavelength LED array structure has a conductive trace unit formed on an outer surface thereof and electrically connected to the drive IC unit.

WAFER-LEVEL ELECTROMAGNETIC INTERFERENCE SHIELDING STRUCTURE AND MANUFACTURING METHOD THEREOF

A wafer-level electromagnetic interference (EMI) shielding structure, which includes: a wafer, an exposed circuit unit, and an EMI shielding unit. The exposed circuit unit is disposed on the top surface of the wafer. At least one conductor is disposed on the exposed circuit unit. The EMI shielding unit has a first EMI shielding layer set around the surrounding surface of the wafer, and a second EMI shielding layer coated to the bottom surface of the wafer. Based on the wafer-level manufacturing process of the instant disclosure, the EMI shielding structure is miniaturized, and each individual wafer is protected against the EMI effect.

Projector and its starting method

Air hockey table that produces atomized gas

A hockey table includes a table body, a top board mounted on a top of the table body and formed with a plurality of ventilating holes, and an atomizer mounted in the table body to spray an atomized gas which passes through the ventilating holes of the top board and protrudes outwardly from the top board. Thus, the atomized gas encompasses the top board to simulate a real and lively scene for the players to play the table hockey game, thereby enhancing the amusement effect of playing the hockey.

Embedded package structure module with high-density electrical connections and method for making the same

An embedded package structure module with high-density electrical connections, including: a drive IC structure, an LED array structure and a plurality of conductive structures. The drive IC structure has at least one concave groove. The LED array structure is received in the at least one concave groove of the drive IC structure, and the LED array structure has a plurality of second open grooves formed on its lateral wall and close to the drive IC structure. The conductive structures respectively traverse the second open grooves in order to make the conductive structures electrically connect between the drive IC structure and the LED array structure.

Functional spacer for SIP and methods for forming the same

A device includes a spacer, which includes a recess extending from a top surface of the spacer into the spacer, and a conductive feature including a first portion and a second portion continuously connected to the first portion. The first portion extends into the recess. The second portion is on the top surface of the spacer. A die is attached to the spacer, and a lower portion of the first die extends into the recess.

Methods and apparatus for three-dimensional nonvolatile memory

A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and conductive oxide material layer, forming a first barrier material layer between the word line and the nonvolatile memory material, forming a second barrier material layer between the bit line and the nonvolatile memory material, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line.

Optoelectronic module and method for producing same

For producing a optoelectronic module, an intermediate substrate having a first recess and a second recess on the same surface is provided. Fill a joint material in the first recess and the second recess. Put a first optoelectronic element in the first recess to have the first optoelectronic element secured to the intermediate substrate via the joint material, and put a second chip in the second recess to have the second optoelectronic element secured to the intermediate substrate via the joint material. Accordingly, in the resulting photovoltaic module, the first optoelectronic element emits or transmits a photo signal from a specified side thereof, and the second optoelectronic element has a side facing the specified side, from which the second optoelectronic element receives the photo signal by way of coupling.

Package structure module with high density electrical connection and method for packaging the same

A package structure module with high density electrical connection includes a drive IC structure, an LED array structure, and a plurality of conductive structures. The drive IC structure has a plurality of first open grooves formed on a lateral wall thereof. The LED array structure has a plurality of second open grooves formed on a lateral wall thereof to respectively face the first open grooves. Each conductive structure traverse the corresponding first open groove and the corresponding second open groove in order to electrically connect between the drive IC structure and the LED array structure.

Package structure module with high density electrical connection

A package structure module with high density electrical connection includes a drive IC structure having at least one concave groove, an LED array structure received in the at least one concave groove of the drive IC structure, and a plurality of conductive structures. The drive IC structure has a plurality of first open grooves formed on a lateral wall thereof. The LED array structure has a plurality of second open grooves formed on a lateral wall thereof to respectively face the first open grooves. Each conductive structure traverse the corresponding first open groove and the corresponding second open groove in order to electrically connect between the drive IC structure and the LED array structure.

Earthquake Warning Disaster Prevention and Safety Report-Back System

An earthquake warning disaster prevention and safety report-back system comprises a servo host group constituted by servo hosts and a mobile communication device. When an earthquake is formed, the servo hosts that are distributed by location in Taiwan are utilized for simultaneously receiving earthquake real-time data information transmitted from the Central Weather Bureau, using the servo hosts to evaluate a physical location of a client, and using one servo host that is located at an optimum (nearest) site to distributively transmit earthquake real-time data information to the mobile communication device of the client. When the mobile communication device receives the earthquake information, the mobile communication device transmits a warning message to the client and provides earthquake magnitude and an earthquake wave arrival time of the physical location as instructions to perform prevention and escape measures, thereby seizing the recuse golden hour. Besides, the invention can provide a safety report-back system for the family members, thus to understand the damage condition and real-time coordinates of the family member and to obtain an emergency help and a rescue searching after disaster. With the above-described frame of the system, the family members can receive the real-time earthquake prediction notification to seize the escape time and to reduce casualties and deaths, and the family member can mutually transmit safety-back report states to conveniently and practically ensure the searching and rescuing direction. 1. An earthquake warning disaster prevention and safety report-back system comprising a servo host group and a mobile communication device , in which:the servo host group is constituted by networking a plurality of servo hosts distributed by location and utilized for simultaneously receiving earthquake real-time data information, and the servo host comprises a client location evaluation unit that is utilized for evaluating a physical location of ...

LED array module and method of packaging the same

An LED array module includes a drive IC structure, at least one LED array, an adhesive element, and a first conductive structure. The drive IC structure has a concave groove formed on a top side thereof. The at least one LED array is received in the at least one concave groove. The adhesive element is disposed between the at least one LED array and the drive IC structure. The first conductive structure is electrically connected between the drive IC structure and the at least one LED array. Moreover, the LED array module can be disposed on a PCB that has at least one input/output pad. A second conductive structure is electrically connected between the drive IC structure and the at least one input/output pad.

Dispenser for self-adhesive labels

Signal line layout structure and method thereof

The present invention discloses a signal line layout structure with multi-layer metal wires and an associated layout method. The layout structure at least includes a first and a second metal wire layers which include a set of parallel first signal lines with equal length and at least a set of parallel second signal lines with equal length respectively. Each set of second signal lines is one-to-one coupled to the set of first signal lines by a plurality of vias, and the crossing section of each second signal line over the set of first signal lines is with equal length in the same set of second signal lines.

Method for packaging an LED array module

Magnetically floating hockey playing table

A hockey playing table includes a main body, a panel mounted on the main body, a magnetic board mounted on the panel, a disk movably mounted on the magnetic board, and a circular magnetic plate mounted on a bottom of the disk and rested on the magnetic board. Thus, the disk is floating on the magnetic board during movement by the repulsive force between the magnetic plate and the magnetic board, so that the disk is moved on the magnetic board easily and conveniently, thereby facilitating the player playing the hockey game.

Electromagnetic interference shielding structure for integrated circuit substrate and method for fabricating the same

An electromagnetic interference (EMI) shielding structure for an integrated circuit (IC) substrate is provided. The EMT shielding structure includes a plurality of conductive contacts, a cover layer and a sputter layer. The conductive contacts are formed around a chip area on the IC substrate. The cover layer is formed on the conductive contacts and covers the chip area, wherein the cover layer has a groove for exposing the conductive contacts. The sputter layer is formed on the cover layer and connected to the conductive contacts. The EMI shielding structure may restrain the EMI in the chip area.

Semiconductor package with conformal em shielding structure and manufacturing method of same

Adhesive label dispenser

An adhesive label dispenser includes a drive unit for moving a carrier sheet with adhesive labels thereon, a support plate for guiding the carrier sheet, a conveying mechanism driven by the drive unit, and a sensor unit. The support plate includes a label output end at which the carrier sheet bends downward, freeing the adhesive labels from the carrier sheet. The conveying mechanism is located below the label output end. The conveying mechanism conveys the adhesive labels freed from the carrier sheet to an output end for fetch. The sensor unit detects whether one of the adhesive labels freed from the carrier sheet has reached a predetermined position and sends a signal for stopping or activating the drive unit.

Projection apparatus and method for activating a projection apparatus

A projection apparatus includes an illuminating unit, an imaging unit, a lens unit, and a control unit. The illuminating unit includes a light source, and a light source driving module operable to drive the light source to provide an illumination beam. The imaging unit is operable so as to modulate the illumination beam into an image beam. The lens unit is disposed on an optical path of the image beam for projecting the image beam. The control unit is coupled electrically to the illuminating unit and the imaging unit. The control unit is configured to execute an activating thread for initializing the imaging unit after controlling initial driving of the light source by the light source driving module, and a monitoring thread for monitoring the light source driving module for a success signal that indicates successful provision of the illumination beam by the light source.

Method for rapid identification of porcine insulin-like growth factor 2 intron 7 point mutation

A method for rapidly identifying a point mutation in porcine insulin-like-growth factor 2 intron 7 uses published primers to amplify the target DNA fragments by polymerase chain reaction. The DNA fragments are cloned and sequenced for confirmation and method validation. The key positions of the sequence are modified to generate three primers for amplifying different DNA fragments with different genotypes by PCR to avoid additional restriction enzyme digestion. A long primer is used to specifically amplify the lean muscle mass-enhancing allele, a short primer is used to specifically amplify the lean muscle mass-suppressing allele, and the third primer is shared and anneals to the complementary strand. After PCR and electrophoresis, samples with only the 92 bp band are identified as the CC genotype, samples with only the 72 bp band are identified as the GG genotype, and samples with both 92 bp and 72 bp bands are identified as heterozygotes.

METHODS AND APPARATUS FOR THREE-DIMENSIONAL NONVOLATILE MEMORY

A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line. The word line includes a first portion and a second portion including an electrically conductive carbon-containing material. The nonvolatile memory material includes a semiconductor material layer and a conductive oxide material layer, with the semiconductor material layer disposed adjacent the second portion of the word line. 1. A method comprising:forming a word line above a substrate, the word line disposed in a first direction, the word line comprising a first portion and a second portion comprising an electrically conductive carbon-containing material;forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction;forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material comprising a semiconductor material layer and a conductive oxide material layer, the semiconductor material layer disposed adjacent the second portion of the word line; andforming a memory cell comprising the nonvolatile memory material at an intersection of the bit line and the word line.2. The method of claim 1 , further comprising:forming a plurality of word lines above the substrate, each of the word lines disposed in the first direction and comprising a corresponding first portion and a corresponding second portion; andforming a plurality of memory cells comprising the nonvolatile memory material, each of the memory cells formed at an intersection of the bit line and a corresponding one of the word lines.3. The method of claim 1 , further comprising: ...

Method for arranging print head chips

A method for arranging print head chips, includes: (a) setting a first fiducial mark and a second fiducial mark on a PCB for determining coordinate positions of a plurality of array units that are arranged on the PCB and calculating a print range of the array units, wherein each array unit has a plurality of spots that are transversely arranged from the first one of the spots to the last one of the spots in sequence; (b) setting a third fiducial mark as a start point for arranging the first spot of a first array unit of the array units on the PCB; and (c) arranging other array units on the PCB in sequence according to the coordinate positions and the start point.

Electronic module having electromagnetic shielding structure and manufacturing method thereof

An electronic module having an electromagnetic shielding structure and its manufacturing method are provided. At first, a first substrate and a second substrate are separately provided. At least one electronic element and at least one connection pad are formed on a surface of the first substrate. The second substrate includes a conductive film and at least one conductive bump is formed on a surface of the conductive film. The first substrate and the second substrate are laminated together wherein the conductive bump is aligned with and connected to the connection pad to obtain the electronic module.

Low power barrier modulated cell for storage class memory

Systems and methods for providing a Barrier Modulated Cell (BMC) structure that may comprise a reversible resistance-switching memory element within a memory array are described. The BMC structure may include a barrier layer comprising a layer of amorphous germanium or amorphous silicon germanium paired with a conductive metal oxide, such as titanium dioxide (TiO2), strontium titanate (SrTiO3), or a binary metal oxide. The BMC structure may include a conductive metal oxide in series with an amorphous layer of a low bandgap material. The low bandgap material may comprise a semiconductor material with a bandgap energy (Eg) less than 1.0 eV. The improved BMC structure may be used for providing multi-level memory elements within a three dimensional memory array.

Method for rapid identification of porcine insulin-like growth factor 2 intron 7 point mutation

A method for rapidly identifying a point mutation in porcine insulin-like-growth factor 2 intron 7 uses published primers to amplify the target DNA fragments by polymerase chain reaction. The DNA fragments are cloned and sequenced for confirmation and method validation. The key positions of the sequence are modified to generate three primers for amplifying different DNA fragments with different genotypes by PCR to avoid additional restriction enzyme digestion. A long primer is used to specifically amplify the lean muscle mass-enhancing allele, a short primer is used to specifically amplify the lean muscle mass-suppressing allele, and the third primer is shared and anneals to the complementary strand. After PCR and electrophoresis, samples with only the 92 bp band are identified as the CC genotype, samples with only the 72 bp band are identified as the GG genotype, and samples with both 92 bp and 72 bp bands are identified as heterozygotes.

Chip stacked structure and method of fabricating the same

A chip stacked structure and method of fabricating the same are provided. The chip stacked structure includes a first chip and a second chip stacked on the first chip. The first chip has a plurality of metal pads disposed on an upper surface thereof and grooves disposed on a side surface thereof. The metal pads are correspondingly connected to upper openings of the grooves. The second chip has a plurality of grooves on a side surface of the second chip, locations of which are corresponding to that of the grooves on the side surface of the first chip. Conductive films are formed in the grooves of the first chip and the second chip and on the metal pads to electronically connect the first chip and second chip. The chip stacked structure may simplify the process and improve the process yield rate.

Optoelectronic module and method for producing same

Golf practicing device having velocity detection function

A golf practicing device includes a housing, a sensor mounted in the housing and provided with a velocity sensing member and a position sensing member, and a rotation disk rotatably mounted in the housing and having a periphery formed with a protruding velocity sensed portion that is movable to pass through the sensor to connect the velocity sensing member of the sensor, and a protruding position sensed portion that is movable to pass through the sensor to connect the position sensing member of the sensor. Thus, the golf practicing device has a velocity detection function.

Multi-step EBR process for liquid photosensitive material removal

An edge bead removal process is disclosed. The process includes providing a wafer having a feature layer, spin-coating a liquid photosensitive material with an edge bead on the feature layer, and removing an edge bead from the wafer by removing an edge bump portion from the edge bead and removing an edge region from the edge bead.

Support stand

A support stand includes a folding board, an upper cover mounted on an upper end of the folding board and having a bottom formed with an insert inserted into the upper end of the folding board, and a lower cover mounted on a lower end of the folding board and having a top formed with an insert inserted into the lower end of the folding board. Thus, the support stand is assembled easily and conveniently, thereby facilitating the user assembling the support stand. In addition, the support stand is mounted on the playing table easily, thereby facilitating the user mounting the support stand on the playing table.

PALLET ASSEMBLY

A pallet assembly is composed of multiple pallet pieces and multiple wedging elements. Each pallet piece has four corners with four individual legs and multiples engaging holes defined on sides of the pallet piece. Each leg is rectangular in transversal cross-section and selectively has a mortise or a tenon to detachably and engages with other corresponding leg on an adjacent stacked pallet piece in the pallet assembly. Moreover, each wedging element is clamped between two adjacent juxtaposed pallet pieces to widen the pallet assembly. Thereby, the pallet assembly is versatile in changing sizes, easy to be assembled and disassembled, stable in use and convenient in storage.

Cleaning device

Circuit board module

Electromagnetic interference shielding structure and manufacturing method thereof

An electromagnetic interference (EMI) shielding structure, which includes: a substrate, at least one chip unit, a packing layer, and an EMI shielding unit. The chip unit is disposed on the surface of the substrate and electrically connected thereto. The packing layer is disposed on the substrate and covers the chip unit. The EMI shielding unit includes: a first shielding layer, a second shielding layer, and a third shielding layer. The first shielding layer covers the outer surface of the packing layer and the lateral surface of the substrate. The second shielding layer covers the outer surface of the first shielding layer. The third shielding layer covers the outer surface of the second shielding layer. Based on the instant disclosure, the EMI shielding unit uses the methods of sputtering and electroless plating, to increase the adhesion strength of the EMI shielding unit and make the thickness of the shielding layer to become uniform. So, the instant disclosure raises the EMI shielding ...

Bottom board for playing table

A bottom board for a playing table includes a board body, at least one anti-slip cloth layer enclosed around the board body entirely, and at least one fiber cloth layer enclosed around the anti-slip cloth layer entirely. Each of the board body, the anti-slip cloth layer and the fiber cloth layer has a surface sprayed with a resin layer. Thus, the bottom board has a reinforced hardness, so that the bottom board will not be dimpled due to a violent hit, thereby enhancing the lifetime of the bottom board. In addition, the bottom board is formed integrally and has a smaller volume and a light weight, thereby facilitating assembly, transportation and storage of the bottom board. Further, the bottom board has a waterproof feature so that the bottom board can be used outdoors.

3D package structure and manufacturing method thereof

ELECTRONIC MODULE HAVING ELECTROMAGNETIC SHIELDING STRUCTURE AND MANUFACTURING METHOD THEREOF

An electronic module having an electromagnetic shielding structure and its manufacturing method are provided. At first, a first substrate and a second substrate are separately provided. At least one electronic element and at least one connection pad are formed on a surface of the first substrate. The second substrate includes a conductive film and at least one conductive bump is formed on a surface of the conductive film. The first substrate and the second substrate are laminated together wherein the conductive bump is aligned with and connected to the connection pad to obtain the electronic module. 1. An electronic module having an electromagnetic shielding structure , the electronic module comprising:a first substrate having a first surface and a second surface opposite to each other, at least one electronic element and at least one connection pad being formed on the first surface of the first substrate; anda second substrate comprising a conductive film and at least one conductive bump formed on a first surface of the conductive film, the conductive bump being connected to the connection pad.2. The electronic module according to claim 1 , wherein the electronic element is mounted on the first surface of the first substrate by surface-mount technology claim 1 , and the connection pad is electrically connected to a ground pin formed on the second surface of the first substrate.3. The electronic module according to claim 2 , wherein the connection pad is electrically connected to the ground pin through a via connection in the first substrate.4. The electronic module according to claim 3 , wherein the first substrate comprises a ground plane disposed on the first surface of the first substrate or buried in the first substrate claim 3 , the connection pad being electrically connected to the ground pin through the via connection and/or the ground plane.5. The electronic module according to claim 1 , wherein the conductive bump is formed on the first surface of the ...

Functional spacer for SIP and methods for forming the same

A device includes a spacer, which includes a recess extending from a top surface of the spacer into the spacer, and a conductive feature including a first portion and a second portion continuously connected to the first portion. The first portion extends into the recess. The second portion is on the top surface of the spacer. A die is attached to the spacer, and a lower portion of the first die extends into the recess.

Methods and apparatus for three-dimensional nonvolatile memory

A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line. The word line includes a first portion and a second portion including an electrically conductive carbon-containing material. The nonvolatile memory material includes a semiconductor material layer and a conductive oxide material layer, with the semiconductor material layer disposed adjacent the second portion of the word line.

Method for arranging print head chips

A method for arranging print head chips, includes: (a) setting a first fiducial mark and a second fiducial mark on a PCB for determining coordinate positions of a plurality of array units arranged on the PCB and calculating a print range of the array unit and each array unit having a plurality of spots that are transversely arranged from the first spot to the last spot in sequence; (b) setting a third fiducial mark as a start point to arrange the first spot of the first array unit of the array units on the PCB; and (c) arranging the array unit on the PCB in sequence according to the coordinate positions and the start point.

High Capacity Select Switches for Three-Dimensional Structures

A three-dimensional nonvolatile memory array includes a select layer that selectively connects vertical bit lines to horizontal bit lines. Individual select switches of the select layer include two separately controllable transistors that are connected in series between a horizontal bit line and a vertical bit line. Each transistor in a select switch is connected to a different control circuit by a different select line.

CHIP STACKED STRUCTURE

A chip stacked structure is provided. The chip stacked structure includes a first die and a second die stacked on the first die. The first die has a plurality of connection structures each which has a through hole, a connection pad and a solder bump. The connection pad has a terminal connected to the through hole. The solder bump is disposed on the connection pad and located around the through hole. The second die has a plurality of through holes which are aligned and bonded to the solder bump respectively. The chip stacked structure may simplify the process and improve the process yield rate.

Package structure of light emitting diode

Optical module and methods for optically aligning and assembling the same

An optical alignment method is for an optical module including a housing unit, a light-sensing unit, and a lens unit. The method includes: (a) through image-capturing techniques, finding a light-sensing component of the light-sensing unit and a predetermined reference point, and determining an actual total optical path length between the light-sensing component and an object position; (b) subtracting a correction distance from the actual total optical path length to obtain a corrected total optical path length; (c) finding a first center line that divides the corrected total optical path length in half; (d) through image-capturing techniques, finding opposite first and second edges of the lens unit, and determining a lens length between the first and second edges; (e) finding a second center line that divides the lens length in half; and (f) assembling the lens unit to the housing unit such that the first and second center lines overlap.

Methods and apparatus for three-dimensional nonvolatile memory

A method is provided that includes forming a word line above a substrate, forming a bit line above the substrate, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and a conductive oxide material layer, forming a barrier material layer between the semiconductor material layer and the conductive oxide material layer, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line. The word line is disposed in a first direction, the bit line is disposed in a second direction perpendicular to the first direction. The barrier material layer has an ionic conductivity of greater than about 0.1 Siemens/cm @ 1000° C.

MINIATURIZED ELECTROMAGNETIC INTERFERENCE SHIELDING STRUCTURE AND MANUFACTURING METHOD THEREOF

A miniaturized electromagnetic interference (EMI) shielding structure is disclosed, which includes a substrate and a plurality of chip modules disposed thereon. The substrate has a plurality of ground portions formed thereon. Each chip module includes: at least one chip unit disposed on the substrate and connected electrically thereto; at least one conductive bump disposed on the substrate adjacent to the chip unit and connected electrically to the corresponding ground portion; an encapsulation layer arranged on the substrate and covers the chip unit and the conductive bump; and an EMI shielding layer covering the encapsulation layer and electrically connected with an exposed surface of the conductive bump, to allow the EMI shielding layer be electrically connected to the ground portion. The disclosure of the present invention allows each chip module to have its own EMI shielding capability. 1. A miniaturized electromagnetic interference shielding structure , comprising:a substrate having a plurality of ground portions formed thereon; and at least one chip unit arranged on the top surface of the substrate and electrically connected thereto;', 'at least one conductive bump disposed on the top surface of the substrate in close proximity to the chip unit, wherein the conductive bump is electrically connected to the corresponding ground portion on the substrate;', 'an encapsulation layer disposed on the substrate for covering the chip unit and the conductive bump; and', 'an electromagnetic interference (EMI) shielding layer covering the encapsulation layer and electrically connected to an exposed surface of the conductive bump for electrically connecting with the ground portions of the substrate., 'a plurality of chip modules disposed on the top surface of the substrate, wherein each of the chip modules includes2. The miniaturized electromagnetic interference shielding structure according to claim 1 , wherein the substrate is a printed circuit board (PCB) or a silicon ...

Functional Spacer for SIP and Methods for Forming the Same

A device includes a spacer, which includes a recess extending from a top surface of the spacer into the spacer, and a conductive feature including a first portion and a second portion continuously connected to the first portion. The first portion extends into the recess. The second portion is on the top surface of the spacer. A die is attached to the spacer, and a lower portion of the first die extends into the recess. 1. A device comprising: a recess extending from a top surface of the spacer into the spacer; and', 'a conductive feature comprising a first portion, and a second portion continuously connected to the first portion, wherein the first portion extends into the recess, and the second portion is on the top surface of the spacer; and, 'a spacer comprisinga first die attached to the spacer, wherein a lower portion of the first die extends into the recess.2. The device of claim 1 , wherein the spacer is free from active devices and passive devices therein.3. The device of further comprising an adhesive disposed at a bottom of the recess claim 1 , wherein a back surface of the first die is attached to the adhesive.4. The device of claim 3 , wherein the adhesive comprises an epoxy.5. The device of further comprising:a second die; andan additional adhesive between and adjoining a bottom surface of the spacer to the second die.6. The device of claim 1 , wherein the conductive feature comprises a metal film covering substantially an entirety of the top surface of the spacer claim 1 , edges of the recess claim 1 , and a bottom of the recess.7. The device of claim 1 , wherein the conducive feature comprises a conductive redistribution line claim 1 , wherein the first die is bonded to the first portion of the conductive feature through flip-chip bonding claim 1 , and wherein the second portion of the conductive feature is connected to a metal wire.8. A device comprising: a recess extending from a top surface of the wafer into the wafer; and', 'a metal feature ...

Functional Spacer for SIP and Methods for Forming the Same

A device includes a spacer, which includes a recess extending from a top surface of the spacer into the spacer, and a conductive feature including a first portion and a second portion continuously connected to the first portion. The first portion extends into the recess. The second portion is on the top surface of the spacer. A die is attached to the spacer, and a lower portion of the first die extends into the recess.

SEMICONDUCTOR PACKAGE WITH CONFORMAL EM SHIELDING STRUCTURE AND MANUFACTURING METHOD OF SAME

A semiconductor package includes a substrate having a front side, a bottom side, and a sidewall along a perimeter of the substrate, a plurality of solder pads on the bottom side, at least one EM shielding contact structure on the bottom side and partially exposed on the sidewall, a semiconductor device mounted on the front side, a mold compound on the front side and covering the semiconductor device, and an EM shielding layer conformally covering the mold compound and the sidewall. The EM shielding layer is in direct contact with the exposed portion of the EM shielding contact structure on the sidewall. 1. A semiconductor package , comprising:a substrate having a front side, a bottom side, and a sidewall along a perimeter of the substrate;a plurality of solder pads on the bottom side;at least one electromagnetic (EM) shielding contact structure on the bottom side and partially exposed from the sidewall;a semiconductor device mounted on the front side;a mold compound on the front side and covering the semiconductor device; andan EM shielding layer conformally covering the mold compound and the sidewall, wherein the EM shielding layer is in direct contact with a portion of the EM shielding contact structure exposed from the sidewall.2. The semiconductor package according to claim 1 , wherein the substrate comprises a conductive via claim 1 , a ground pad claim 1 , and a ground layer claim 1 , wherein the conductive via electrically connects the ground pad to the ground layer.3. The semiconductor package according to claim 2 , wherein the EM shielding contact structure is electrically connected to the ground layer through the conductive via.4. The semiconductor package according to claim 2 , wherein the conductive via electrically connects the ground pad to the ground layer claim 2 , and the EM shielding contact structure and the ground pad are structurally and electrically independent and separated from each other.5. The semiconductor package according to further ...

DUAL GATE STRUCTURE

Methods for forming a dual gate structure for a vertical TFT are described. The dual gate structure may be formed by performing a first etching process that includes forming a first set of trenches by etching a first set of oxide pillars to a first depth and forming a second set of trenches by etching a second set of oxide pillars to a second depth higher than the first depth, forming a first set of gate structures within the first set of trenches, forming a second set of gate structures within the second set of trenches, performing a second etching process that includes forming a third set of trenches by etching the first set of gate structures from a second initial depth to a third depth and forming a fourth set of trenches by etching the second set of gate structures to a fourth depth higher than the third depth. 1. A method for forming a dual gate structure for a vertical TFT , comprising:performing a first etching process, the first etching process includes etching a first set of oxide pillars of a plurality of oxide pillars to a first initial depth, the plurality of oxide pillars includes a second set of oxide pillars different from the first set of oxide pillars;performing a second etching process subsequent to the performing the first etching process, the second etching process forms a first set of trenches by etching the first set of oxide pillars from the first initial depth to a first depth, the second etching process forms a second set of trenches by etching the second set of oxide pillars to a second depth higher than the first depth;forming a plurality of gate dielectrics within the first set of trenches and the second set of trenches; andforming a first set of gate structures and a second set of gate structures, the forming the first set of gate structures and the second set of gate structures includes filling the first set of trenches and the second set of trenches with a gate material subsequent to the forming the plurality of gate dielectrics.2. ...

Low power barrier modulated cell for storage class memory

Systems and methods for providing a Barrier Modulated Cell (BMC) structure that may comprise a reversible resistance-switching memory element within a memory array are described. The BMC structure may include a barrier layer comprising a layer of amorphous germanium or amorphous silicon germanium paired with a conductive metal oxide, such as titanium dioxide (TiO2), strontium titanate (SrTiO3), or a binary metal oxide. The BMC structure may include a conductive metal oxide in series with an amorphous layer of a low bandgap material. The low bandgap material may comprise a semiconductor material with a bandgap energy (Eg) less than 1.0 eV. The improved BMC structure may be used for providing multi-level memory elements within a three dimensional memory array.

Tungsten-Filament-Like Light-Emitting Diode Lamp Structure

A tungsten-filament-like LED lamp structure includes a lamp shade, a heat dissipating frame, a lamp holder, a LED substrate, a LED light source and a light spreader assembly. The light spreader assembly includes a reflective device and a diverging element, wherein light rays transmitting through a light-permeable portion of the reflective device are diverged by the diverging element to generate frontward lighting, and reflective surfaces of the reflective device control the reflected light rays to generate sideward lighting and backward lighting and thus generate an optical field similar to that of a conventional tungsten filament lamp. Thus, the properties of energy saving, vibration resistant and long lifetime better than those of the conventional lamp can be achieved, and the invention can be directly applied to the conventional lamp structure to decrease the production and maintenance costs. 1. A tungsten-filament-like light-emitting diode (LED) lamp structure , comprising:a LED substrate having a bottom surface combined with a top portion of a heat dissipating frame;a lamp shade having a bottom portion combined with the heat dissipating frame so that the LED substrate is disposed in the lamp shade;a LED light source disposed on a surface of the LED substrate; and a reflective device, which is disposed above the LED substrate, has a light-permeable portion at a position corresponding to the LED light source, and has a plurality of reflective surfaces between the light-permeable portion and a periphery of the reflective device;', 'a diverging element, which is disposed above the reflective device and for diverging an angle of light rays emitted from the light-permeable portion; and', 'a lamp holder combined with a bottom portion of the heat dissipating frame, wherein a circuit board electrically connected to the LED substrate is disposed in the lamp holder., 'a light spreader assembly, which is combined with a combination portion of a top portion of the lamp ...

Methods and apparatus for three-dimensional nonvolatile memory

A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and conductive oxide material layer, forming a first barrier material layer between the word line and the nonvolatile memory material, forming a second barrier material layer between the bit line and the nonvolatile memory material, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line.

Low power barrier modulated cell for storage class memory

Systems and methods for providing a Barrier Modulated Cell (BMC) structure that may comprise a reversible resistance-switching memory element within a memory array are described. The BMC structure may include a barrier layer comprising a layer of amorphous germanium or amorphous silicon germanium paired with a conductive metal oxide, such as titanium dioxide (TiO2), strontium titanate (SrTiO3), or a binary metal oxide. The BMC structure may include a conductive metal oxide in series with an amorphous layer of a low bandgap material. The low bandgap material may comprise a semiconductor material with a bandgap energy (Eg) less than 1.0 eV. The improved BMC structure may be used for providing multi-level memory elements within a three dimensional memory array.

METHODS AND APPARATUS FOR THREE-DIMENSIONAL NONVOLATILE MEMORY

A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line. The nonvolatile memory material includes a semiconductor material layer, and a conductive oxide material layer including a first conductive oxide material layer portion and a second conductive oxide material layer portion. The method also includes forming a barrier material layer between the first conductive oxide material layer portion and the second conductive oxide material layer portion. 1. A method comprising:forming a word line above a substrate, the word line disposed in a first direction;forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction;forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material comprising a semiconductor material layer, and a conductive oxide material layer comprising a first conductive oxide material layer portion and a second conductive oxide material layer portion;forming a barrier material layer between the first conductive oxide material layer portion and the second conductive oxide material layer portion; andforming a memory cell comprising the nonvolatile memory material at an intersection of the bit line and the word line.2. The method of claim 1 , further comprising forming a first supplemental barrier material layer between the semiconductor oxide material layer and the first conductive oxide material layer portion.3. The method of claim 1 , further comprising forming a second supplemental barrier material layer between the second conductive oxide material layer portion and the ...

Multiple Junction Thin Film Transistor

A multiple junction thin film transistor (TFT) is disclosed. The body of the TFT may have an n+ layer residing in a p− region of the body. The TFT may have an n+ source and an n+ drain on either side of the p− region of the body. Thus, the TFT has an n+/p−/n+/p−/n+ structure in this example. The n+ layer in the p− region increases the breakdown voltage. Also, drive current is increased. The impurity concentration in the n+ layer in the p− body and/or thickness of the n+ layer in the p− body may be tuned to increase performance of the TFT. In an alternative, the body of the TFT has a p+ layer residing in an n− region of the body. The TFT may have a p+ source and a p+ drain on either side of the p− region of the body. 1. A semiconductor device , comprising:a substrate having a major surface;a first conductive region;a second conductive region;a thin film transistor comprising:i) a first source/drain having a first type of conductivity, wherein the first source/drain is electrically connected to the first conductive region;ii) a second source/drain having the first type of conductivity, wherein the second source/drain is electrically connected to the second conductive region;iii) a body between the first source/drain and the second source/drain, wherein the body comprises a first body region having a second type of conductivity that is opposite first type of conductivity, a second body region having the first type of conductivity, and a third body region having the second type of conductivity, wherein the second body region is between the first body region and the third body region, wherein the second body region has a thickness as measured between the first body region and the third body region in the range between 50 to 120 nanometers, wherein a peak doping concentration of the second body region is greater than a peak doping concentration of the first body region and is greater than a peak doping concentration of the third body region, wherein the first source/drain ...

Resistive memory device containing carbon barrier and method of making thereof

A resistive memory device, such as a BMC ReRAM device, includes at least one resistive memory element which contains a carbon barrier material portion and a resistive memory material portion that is disposed between a first electrode and a second electrode.

Led array module and method of packaging the same

Bottom board for playing table

A bottom board for a playing table includes a board body, at least one anti-slip cloth layer enclosed around the board body entirely, and at least one fiber cloth layer enclosed around the anti-slip cloth layer entirely. Each of the board body, the anti-slip cloth layer and the fiber cloth layer has a surface sprayed with a resin layer. Thus, the bottom board has a reinforced hardness, so that the bottom board will not be dimpled due to a violent hit, thereby enhancing the lifetime of the bottom board. In addition, the bottom board is formed integrally and has a smaller volume and a light weight, thereby facilitating assembly, transportation and storage of the bottom board. Further, the bottom board has a waterproof feature so that the bottom board can be used outdoors.

FOLDING SIGNALING DEVICE

Ce dispositif comprend une structure composée de trois éléments d'assemblage 11, 12, 13 combinés de manière amovible pour former un triangle. Chacun de ces éléments comprend une pluralité de diodes électroluminescentes 22 électriquement connectées à un circuit intégré de clignotement 43, disposé sur l'élément de base 11 et relié à une source d'alimentation 41. Des éléments réfléchissants 30 sont en outre fixés séparément sur chacun des éléments d'assemblage 11, 12, 13. Applications notamment pour signaler la présence d'un véhicule en panne lorsque les conditions de visibilité sont médiocres. This device comprises a structure composed of three assembly elements 11, 12, 13 removably combined to form a triangle. Each of these elements comprises a plurality of light emitting diodes 22 electrically connected to an integrated flashing circuit 43, disposed on the base element 11 and connected to a power source 41. Reflective elements 30 are further separately attached to each one. assembly elements 11, 12, 13. Applications in particular for signaling the presence of a broken-down vehicle when the visibility conditions are poor.

Multi-dimensional antenna in RFID system for reading tags and orientating multi-dimensional objects

Radio frequency (RF) sensing system, RF display device, and puzzle system using the same

This invention discloses a RF sensing system, a RF display device and a puzzle system using the same. The RF sensing system includes a platform, at least one RF reader and a RF display device. The RF reader is installed at the platform for generating a radio signal. The RF display device includes a display panel and a flat panel. If the RF display device receives the radio signal, the display panel can change a display state. The flat panel has a text or an image. If the display panel is at an opaque state, at least a portion of the text or the image is blocked by the display panel. If the display panel is at a transparent state, the text or the image is exposed. If the flat panel has a puzzle pattern, several RF display devices can be used for forming a puzzle.

Height adjustable golf practicing device

A golf practicing device includes a rotation disk, a cover, a bar, and an adjusting knob. The golf practicing device has a height adjustable function. Thus, the height of the practicing ball of the bar can be adjusted arbitrarily so as to fit users of different heights and statures, thereby facilitating the users operating the golf practicing device.

Multi-dimensional antenna in RFID system for reading tags and orientating multi-dimensional objects

A RFID system applying to a three-dimensional jigsaw is provided. The RFID system includes a jigsaw substrate having a plurality of blocks, a plurality of jigsaw units corresponding to each blocks of the jigsaw substrate, a RFID reader having a plurality of antennas positioned in a position of each blocks of the jigsaw substrate, and a plurality of tags positioned in a position of each face of a three-dimensional jigsaw unit corresponding to the positions of the antennas, wherein the RFID reader communicates to the tags using modulated radio signals through the antennas and the tags respond with modulated radio signals in order to determine whether the orientation of the three-dimensional jigsaw unit is correct or not.

Comparator with self-biased reference voltage for an oscillator

A comparator with a fixed reference voltage (self bias) for an oscillator is disclosed. The comparator includes: a depletion MOS network to form a source current, wherein the gate and the source has a connection; and an enhanced MOS transistor, wherein the drain or the source connects with the depletion MOS transistor in series. The gate of the enhanced MOS transistor receives an input voltage when the input voltage is lower than the reference voltage, and the comparator outputs a high level voltage, or the enhanced MOS transistor outputs a low level voltage if the input voltage is higher then the reference voltage. Moreover, the oscillator's comparator has a reference voltage that is independent from temperature and supply voltage source.

Comparator with self-biased reference voltage for an oscillator

A comparator with a fixed reference voltage (self bias) for an oscillator is disclosed. The comparator includes: a depletion MOS network to form a source current, wherein the gate and the source has a connection; and an enhanced MOS transistor, wherein the drain or the source connects with the depletion MOS transistor in series. The gate of the enhanced MOS transistor receives an input voltage when the input voltage is lower than the reference voltage, and the comparator outputs a high level voltage, or the enhanced MOS transistor outputs a low level voltage if the input voltage is higher then the reference voltage. Moreover, the oscillator's comparator has a reference voltage that is independent from temperature and supply voltage source.

Radio frequency identification (rfid) positioning apparatus and method thereof

This invention discloses a RFID positioning apparatus and a method for identifying and positioning at least one RFID tag. The apparatus comprises a transmission module for transmitting a frequency, a capacitor, sensing modules, an identification module and circuit modules. A first switching unit of the sensing module performs a connection operation according to the frequency to form a magnetic flux of a induction coil and the capacitor, such that the first induction coil senses an identification signal of a RFID tag. The identification module receives the identification signal for identifying and positioning the RFID tag. Each circuit module is connected to the transmission module, sensing module, capacitor and identification module, and transmits the identification signal. The circuit modules have substantially equal length to achieve a matched status of all induction coils.

Radio frequency (RF) sensing system, RF display device, and puzzle system using the same

RFID positioning apparatus and method thereof

Method for deodorization and bacteriostasis for drain piping of toilet and kitchen

タグ方位検出可能な周波数識別（ｒｆｉｄ）システムとそのｒｆｉｄタグ

【課題】 一種の無線周波数識別（ＲＦＩＤ）システム、そのＲＦＩＤタグとそのジグゾーパズルシステム 【解決手段】 ＲＦＩＤタグに複数のアンテナを設け、それぞれのアンテナが無線信号を受信すると、ＲＦＩＤタグもそれに対応して、おのおのの識別データを送信する。これにより、リーダーは読み取ったデータをもとに、ＲＦＩＤタグの置く位置を識別できる特徴を有する。 【選択図】図１

發光二極體的封裝結構

Moving cage

Avian girdle

An avian girdle comprises a frame, which includes a mounting part connecting a first assembly structure to a front section in a distance, and the front section linking between a rear section and a second assembly structure. When the avian girdle has been putting onto a bird for a flight practice, its mechanism distributes a counterweight from the mounting part, with equipment of a data collection device for collecting information on the back of the bird, and decreases the air resistance. Therefore, the bird can carry a heavier load than it does when wearing a foot ring, with unilateral configuration of a tracking device on one foot affecting bird's flying performance.

RFID card reader device having multi-dimensional antenna array

Methods and apparatus for three-dimensional nonvolatile memory

A method is provided that includes forming a word line above a substrate, forming a bit line above the substrate, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and a conductive oxide material layer, forming a barrier material layer between the semiconductor material layer and the conductive oxide material layer, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line. The word line is disposed in a first direction, the bit line is disposed in a second direction perpendicular to the first direction. The barrier material layer has an ionic conductivity of greater than about 0.1 Siemens/cm @1000°C.

Method for improving intrafield overlay accuracy

可攜式電子裝置

Moving cage

Multi-wavelength light-emitting module with high density electrical connections

A multi-wavelength light-emitting module with high density electrical connections includes a drive IC structure and a multi-wavelength LED array structure. The drive IC structure has a drive IC unit formed on a top surface thereof. The multi-wavelength LED array structure is disposed on the top surface of the drive IC structure, and the multi-wavelength LED array structure has a conductive trace unit formed on an outer surface thereof and electrically connected to the drive IC unit.

Multi-wavelength led array package module and method for packaging the same

Projection apparatus and method for activating a projection apparatus

A projection apparatus includes an illuminating unit, an imaging unit, a lens unit, and a control unit. The illuminating unit includes a light source, and a light source driving module operable to drive the light source to provide an illumination beam. The imaging unit is operable so as to modulate the illumination beam into an image beam. The lens unit is disposed on an optical path of the image beam for projecting the image beam. The control unit is coupled electrically to the illuminating unit and the imaging unit. The control unit is configured to execute an activating thread for initializing the imaging unit after controlling initial driving of the light source by the light source driving module, and a monitoring thread for monitoring the light source driving module for a success signal that indicates successful provision of the illumination beam by the light source.

Light emitting module

Method for packaging an led array module

In-situ overlay alignment

A semiconductor wafer is disclosed that includes a plurality of fields, including a plurality of alignment fields. Each alignment field includes a plurality of intra-field small scribe lane primary mark (SSPM) overlay mark pairs there around. The SSPM mark pairs allow for in-situ, non-passive intra-field alignment correction. In one embodiment, there may be between two and four alignment fields, and between two and four SSPM mark pairs around each alignment field. The SSPM marks of each mark pair may be extra scribe-lane marks.

Control system of antenna array of RFID reader applications

The present invention provides a control apparatus of an antenna array. The control apparatus of an antenna array comprises a control circuit including a serial interface circuit connected to the first switch and the second switch by a first control line and a second control line separately, and an antenna coupled between the first switch and the second switch. The serial interface circuit controls On/Off status of the first switch and the second switch separately through the first control line and the second control line. Furthermore, the control circuit and the others can be connected serially through the included serial interface circuits to increase the number of antennas.

Multi-wavelength light-emitting module with high density electrical connections

A multi-wavelength light-emitting module with high density electrical connections includes a drive IC structure and a multi-wavelength LED array structure. The drive IC structure has a drive IC unit formed on a top surface thereof. The multi-wavelength LED array structure is disposed on the top surface of the drive IC structure, and the multi-wavelength LED array structure has a conductive trace unit formed on an outer surface thereof and electrically connected to the drive IC unit.

Light emitting device and LED print head using the same

Light-emitting module and methods for optically aligning and assembling the same

An optical alignment method is for a light-emitting module that includes a housing unit, a light-emitting unit disposed in the housing unit, and a lens unit. The optical alignment method includes: (a) through image-capturing techniques, finding a light-emitting point of the light-emitting unit and a predetermined reference point, and determining a total optical path length between the light-emitting point and an imaging plane; (b) finding a first center line that divides the total optical path length in half; (c) through image-capturing techniques, finding opposite first and second edges of the lens unit, and determining a lens length between the first and second edges; (d) finding a second center line that divides the lens length in half; and (e) assembling the lens unit to the housing unit so that the first and second center lines overlap. A light-emitting module and an assembly method therefor are also disclosed.

Method for rapid identification of porcine insulin-like growth factor 2 intron 7 point mutation

A method for rapidly identifying a point mutation in porcine insulin-like-growth factor 2 intron 7 uses published primers to amplify the target DNA fragments by polymerase chain reaction. The DNA fragments are cloned and sequenced for confirmation and method validation. The key positions of the sequence are modified to generate three primers for amplifying different DNA fragments with different genotypes by PCR to avoid additional restriction enzyme digestion. A long primer is used to specifically amplify the lean muscle mass-enhancing allele, a short primer is used to specifically amplify the lean muscle mass-suppressing allele, and the third primer is shared and anneals to the complementary strand. After PCR and electrophoresis, samples with only the 92 bp band are identified as the CC genotype, samples with only the 72 bp band are identified as the GG genotype, and samples with both 92 bp and 72 bp bands are identified as heterozygotes.

LED array module and method of packaging the same

An LED array module includes a drive IC structure, at least one LED array, an adhesive element, and a first conductive structure. The drive IC structure has a concave groove formed on a top side thereof. The at least one LED array is received in the at least one concave groove. The adhesive element is disposed between the at least one LED array and the drive IC structure. The first conductive structure is electrically connected between the drive IC structure and the at least one LED array. Moreover, the LED array module can be disposed on a PCB that has at least one input/output pad. A second conductive structure is electrically connected between the drive IC structure and the at least one input/output pad.

Optoelectronic module and method of producing same

An optoelectronic module includes an interposer base having first and second recesses formed on a specified surface thereof; a joint material layer filled in the first and second recesses; a first optoelectronic element placed in the first recess and coupled to the interposer base via the joint material layer, wherein an optical signal is emitted from or passes through a lateral surface of the first optoelectronic element; and a second optoelectronic element placed in the second recess and coupled to the interposer base via the joint material layer, wherein a lateral surface of the second optoelectronic element faces the lateral surface of the first optoelectronic element for coupling to and receiving the optical signal emitted from or passing through the lateral surface of the first optoelectronic element. A fixture is used to place the first and second optoelectronic elements into the first and second recesses while controlling some critical distances.

Multiple junction thin film transistor

A multiple junction thin film transistor (TFT) is disclosed. The body of the TFT may have an n+ layer residing in a p− region of the body. The TFT may have an n+ source and an n+ drain on either side of the p− region of the body. Thus, the TFT has an n+/p−/n+/p−/n+ structure in this example. The n+ layer in the p− region increases the breakdown voltage. Also, drive current is increased. The impurity concentration in the n+ layer in the p− body and/or thickness of the n+ layer in the p− body may be tuned to increase performance of the TFT. In an alternative, the body of the TFT has a p+ layer residing in an n− region of the body. The TFT may have a p+ source and a p+ drain on either side of the p− region of the body.