Detector presetting pit and hole signal

Compact disc burning-recording signal control circuit having alignment function

It is a CD recording signal control circuit with the collimation function. It uses a collimated unit to align plural recording signals. The CD recording signal control circuit consists of: a EFM encoder, which can receive the input signal and encode them to EFM signal; a recording strategy waveform generating unit, which can receive the EFM signal and convert it to plural recording signals according to the recording strategy waveform generating rule; a collimated unit, which can receive plural recording signals, and align these signals by delay method, and output as plural aligned signals, a delay corrective unit, which can receive the plural aligned recording signals that outputted from collimated unit and detect the delay difference between these aligned recording signal then output the delay revising signal. The collimated unit can also receive the delay-revising signal to adjust the delay of every recording signal.

跨导电容滤波器缩减面积的方法

The transconductance circuit includes the 1st current source connected to its 1st node to provide the 1st input current to the circuit; the 2nd current source connected to its 2nd node to provide the 2nd input current; the 1st transistor with the 1st electrode connected to the 1st node, control electrode connected to the 1st input voltage and the 3rd electrode connected to the 3rd node to output the 1st output current; the 2nd transistor with the 1st electrode connected to the 1st node, control electrode connected to the 1st input voltage and the 2nd electrode connected to the 4th node to output the 2nd output current; the 3rd transistor with the 1st electrode connected to the 2nd node, control electrode connected to 2nd input voltage and the 2nd electrode connected to the 4th node; and the 4th transistor with the 1st electrode connected to the 2nd node, control electrode connected to 2nd voltage and the 2nd electrode connected to the 3rd node. It has transconductance value regulated via ...

降低时钟恢复系统中相位抖动的方法及装置

The invention provides a method to reduce phase shake in clock recovering system and the equipment. The clock recovering system has a phase detector to detect the phase difference between an input signal and a clock signal output by a voltage controlled oscillator, generates a rising pulse and a descending pulse according to the phase difference, and uses the two pulses to generate a control voltage of the voltage controlled oscillator. It uses a time delay component to make the two pulses overlap in the time field, to eliminate the ripple generated on the control voltage, so as to prevent the clock signal from producing phase shake.

预置坑洞信号的侦测装置

The detector is used in CD machine to detect the preset pit and hole signal in burning state and reading state. The detector includes one gain unit to receive the wave signal picked from the CD and produce a regulation signal; one multiplexer to receive the wave signal and the regulation signal and to select the wave signal or the regulation signal based on one state signal to produce cutting signal; and one cutting unit to receive the cutting signal and cut the cutting signal based on some required position to produce preset pit and hole signal. The present invention has only one cutting unit needed for correct cutting of preset pit and hole signal.

自动功率控制器

The invention provides an automatic power controller, automatically controlling the output power of an optical head and able to quickly reach stable state. It contains a detector to detect the output power of the optical head and produce a detecting signal; a comparer, to compare the detected signal with a reference signal and output a compared signal; a signal source, to provide different reference voltage signals as the references of producing different output powers; a switchable gain amplifier, to receive the compared signal and process the compared signal by different gains according to the different reference voltage signals, and produce output signal; and a driving unit, to receive the output signal and produce a driving signal to drive the optical head. Because in different power states, the voltage differences between the compared signals and the corresponding reference signals are the same, it is not necessary to wait for the capacitor in the comparer a charging/discharging time ...

回路滤波器及其补偿电流调整方法

This invention provides loop filter and the adjustment method for its compensation current, This filter includes: a first resistance, its first end receives a control current; a capacitance, is the second end connected with first resistance; second resistance, its first end is connected with first end of first resistance; voltage compensation unit, its first end is connected with second end of second resistance, produces a compensation voltage; OP operational amplifier, its output end is connected with second end of second resistance, its first input end is connected with second end of first resistance, its second input end is connected with second end of voltage compensation unit; a current source: is connected with second end of voltage compensation unit, and provides a compensation current. This filter utilizes the compensation voltage provided by voltage compensation unit to make the output voltage of OP equaling the voltage of first input end, stabilizes the output control voltage ...

锁相环路

The present invention relates to a phase lock loop for receiving data signal and producing clock pulse signal, specially, it is applicable to treatment of high frequency signal, and can accelerate operation speed and raise resolution. The phase lock loop contains the components of voltage control oscillator, multiphase generator, conversion detector, optimum phase translator and phase selector. It also provides the functions of the above-mentioned all the components.

差动式电荷泵

The present invention relates to a differential charge pump, including first current source, second current source, first switch, second switch, first reversing switch, second reversing switch and common-mode feedback device. According to the common-mode voltage of differential charge pump the common-mode feedback device can be used for correcting output current of first current source to make the current intensities of currents outputted by above-mentioned both current sources be identical. It can accurately correct the output current of charge pump.

最大抖动容许偏差校准方法及其装置

The invention provides a phase-locked loop maximum vibration allowable error calibrating method and its device. The phase-locked loop includes a phase detector and a charge dipper set in series. The method provides a first correcting signal and a second one for the phase detector to detect the phases, then according to the phase difference between the two correct signals to generate a rising pulse and a descending pulse to control the charge dipper so as to generate a net current, and uses a correcting unit to selectively adjust the width of the rising or descending pulse according to the netcurrent until the net current reaches an object value, so as to calibrate the vibration error caused by the property curves of the phase detector and charge dipper.

Sawtooth wave elementary value detecting circuits

A detection circuit consists of the first band pass filter for filtering wave signal to generate the first filter signal, the second one to generate the second signal, the first comparator for comparing the first filter signal with a refreence voltage (RV) to generate a doubling frequency, the second one to generate a base frequency by comparing the second signal with RV a pulse generator for generating double frequency reference pulse and a bit value identifying unit for judging bit value of sawtooth wave based on reference pulse and doubling frequency.

低稳态误差的锁相回路及其校正电路

The correcting circuit includes following parts. Based on oscillation clock, the clock generator generates analog input signal and analog reference clock in approximative or same phase. Time-delayed unit delays phase of analog reference clock. Based on phase different between received analog input signal and delayed reference clock output from time-delayed unit, the phase detector outputs signal to control electric charge. Based on received signal of charge control, the charge pump outputs control current. Integrator creates error voltage by controlling current integration. Based on error voltage, delay time control unit generates signal for controlling delayed time of delay unit. The voltage-controlled oscillator receives reference control voltage and generates desired oscillation clock. Phases of delayed input signal of delay unit of reference clock are utilized in the phase locked loop to compensate circuit specification, and to lower steady state error.

CD recording signal control circuit

It is a kind of CD-recording signal control circuit that adjusts the responsibility cycle of recording signal by one responsibility cycle adjusting unit. This CD-recording signal control circuit comprising: one EFM encoder receive the imported signal and encode it to EFM signal; one recording strategic wave generating unit receive the EFM signal and generate several groups of recording signals according to this EFM signal; one responsibility cycle adjusting unit receive these recording signals and adjust the responsibility cycle of these recording signals and export them as several groups of adjusted recording signals; one responsibility cycle detecting unit receive several groups of adjusted recording signals that exported by the responsibility cycle adjusting unit and detect the responsibility cycle of several groups of adjusted recording signals and export the responsibility cycle adjusted signal. This responsibility cycle adjusting unit also receive responsibility cycle adjusted signal ...

自动调整压控振荡器频率范围的时钟脉冲恢复电路

... 8-14 modulation circuit for restoring clock pulse includes following parts. A phase-frequency detector is utilized to receive 8-14 modulation pulse and pulse of an oscillation clock, and control signal is output based on difference of phase and frequency of the said pulse. A charge pump is utilized to receive control signal output by phase-frequency detector, and charging and discharging is carried out based on the control signal. A filter is connected to the charge pump, and a voltage signal is output under combined actions between the filter and the charge pump. A voltage-controlled oscillator is utilized to receive voltage signal at filter, and outputs oscillation clock pulse. A frequency counter calculates frequency of the oscillation clock pulse and outputs value of the frequency. A frequency control unit receives value of oscillation frequency, and a value of frequency is set based on the value received, a control voltage is output to voltage-controlled oscillator.

Frequency divider, frequency dividing method and phase locked loop thereof

The invention provides a frequency divider, frequency dividing method thereof, and phase locked loop utilizing the rrequency divider; the frequency divider includes a phase selector for receiving a plurality of clock signals and outputting an intermediate signal corresponding to phase characteristic of at least one of the clock signals, and an adjustable delay circuit for receiving the intermediate signal and generating an output signal by delaying the received intermediate signal. The frequency divider of the invention can reduce jitter and power consumption.

Control circuit for optical read-write head of CD-ROM drive

The invention relates to a control circuit used to control the optical read-write head in the CD-ROM drive, which filters the high frequency component of the main beam push-pull signal with a low pass filter and outputs the filtered main beam push-pull signal additionally. The read-write head control circuit is composed of the laser drive circuit, which receives the laser power control signal to control the laser beam intensity of the laser source, the light detection circuit, which receives the reflex light beam reflected from the disc and outputs the main electric signal, and a low pass filter, which outputs the filtered signal after having filtered the high frequency component according to the main electric signal. Because the high frequency component has been filtered before the optical read-write head outputs the filtered signal, which limited by the slew rate won't be changed while being transferred to the processing IC through the cable conductor. So the CD-ROM driver may recovery ...

Delay line calibration mechanism and related multi-clock signal generator

The invention provides a delay line calibration mechanism and related multi-clock signal generator. The calibration mechanism includes a delay line, a phase detector, and a controller. The delay line receives an input pulse, a calibration pulse, a first delay selection signal, and a second delay selection signal, delays the input pulse for a delay period according to the first delay selection signal to output a delayed pulse, and delays the calibration pulse for a calibration delay period according to the second delay selection signal to output a delayed calibration pulse. The controller is for generating the input pulse, the calibration pulse, and a reference pulse. The controller also generates the first delay selection signal, and generates the second delay selection signal according to a phase difference signal. The phase detector is for generating the phase difference signal indicating the difference between the delayed calibration pulse and the reference pulse by comparing the delayed ...

Optical reading device for reducing single distortion and single processing method

Differential driving circuit capable of operating at low supply voltage without requiring common mode reference voltage

The present invention provides a differential drive circuit that can be operated in low voltage environment without common mode reference voltage, which includes a couple of input terminal port, a couple of differential output terminal port, a first differential pair, a second differential pair, a a load unit, and a current source. The first differential pair is directly connected to a first voltage level, and is coupled to the pair of input ports and the pair of differential output ports. The second differential pair is coupled to the pair of input ports and the pair of differential output ports. The load unit is coupled to the pair of differential output ports. The current source is coupled between the second differential pair and a second voltage level. The invention can work in low supply pressure environment without common mode reference voltage and provide same output voltage swing without increasing extra power consumption.

双阶段的峰值侦测器

The present invention relates to a peak valve detection equipment with two-stage peak value detection unit. It can retain the peak value for a long period of time and its reaction speed is quick. Two-stage peak value detector includes: an amalog peak value detection unit, it is used for receiving an analog input signal, and using a first time as detection period to detect the peak value of analog input signal and output analog peak value signal; an analog digital conversion unit, it is used for receiving the described analog peak value signal and converting it into digital signal; and a digital peak value detection unit, it is used for receiving the described digital signal, and using a second time as detection period to detect maximum value of digital signal and output digital peak value signal.

Automatic power controller

电荷泵的校正装置及方法

The present invention relates to a correcting equipment for charge pump. It is formed from detection circuit, current regulating circuit and correcting circuit. The detection circuit and charge pump are coupled, and can be used for outputting detection signal according to the intensity and direction of outputted current, the current regulating circuit and detection circuit are coupled for outputting correcting signal according to the polarity and quantity value of detection signal conversion rate. The correcting circuit includes first correcting current source and second correcting current source which are respectively coupled with charge pump and current regulating circuit for respectively regulating correcting current according to correcting signal and making the outputted current of charge pump be reached to minimum.