DISPLAY DEVICE

A display device includes a transparent active element array substrate and a color display layer. The transparent active element array substrate has a first surface and a second surface opposite to the first surface. The color display layer disposed on the first surface of the transparent active element array substrate. 1. A display device comprising:a transparent active element array substrate having a first surface and a second surface, the second surface being opposite to the first surface; anda color display layer disposed on the first surface of the transparent active element array substrate.2. The display device according to claim 1 , wherein the color display layer comprises:a first color filter layer; anda display layer disposed between the transparent active element array substrate and the first color filter layer.3. The display device according to claim 2 , further comprising a second color filter layer disposed between the display layer and the transparent active element array substrate.4. The display device according to claim 2 , wherein the display layer comprises a microcapsule electrophoretic display layer or a microcup electrophoretic display layer.5. The display device according to claim 2 , further comprising an adhesive layer disposed between the first color filter layer and the display layer.6. The display device according to claim 1 , wherein the color display layer comprises:a display layer; anda second color filter layer disposed between the display layer and the transparent active element array substrate.7. The display device according to claim 1 , wherein the color display layer comprises transparent electrophoretic liquid and a plurality of color electrophoretic particles claim 1 , and the color electrophoretic particles are dispersed in the transparent electrophoretic liquid.8. The display device according to claim 1 , further comprising:a first protecting layer disposed on the color display layer; anda second protecting layer disposed on ...

Transistor Structure

A transistor structure comprises a patterned N-type transparent oxide semiconductor formed over a substrate as a base, and a patterned p-type organic polymer semiconductor formed on the patterned N-type transparent oxide semiconductor comprising a first portion and a second portion so that the patterned N-type transparent oxide semiconductor and the first portion and the second portion of the patterned p-type organic polymer semiconductor form heterojunctions therebetween respectively, wherein the first portion of the patterned p-type organic polymer semiconductor is used as an emitter, and the second portion of the patterned p-type organic polymer semiconductor is used as a collector. 1. A transistor structure , comprising:a patterned N-type transparent oxide semiconductor layer formed over a substrate as a base; anda patterned P-type organic polymer semiconductor layer formed on the patterned N-type transparent oxide semiconductor layer, wherein the patterned P-type organic polymer semiconductor layer comprises a first portion and a second portion so that the patterned N-type transparent oxide semiconductor layer and the first portion and the second portion of the patterned P-type organic polymer semiconductor layer form heterojunctions therebetween respectively, wherein the first portion of the patterned P-type organic polymer semiconductor layer is used as an emitter, and the second portion of the patterned P-type organic polymer semiconductor layer is used as a collector.2. The transistor structure according to claim 1 , wherein the patterned N-type transparent oxide semiconductor layer comprises IGZO claim 1 , and the patterned P-type organic polymer semiconductor layer comprises Pentacene.3. The transistor structure according to claim 1 , further comprising an insulation layer formed between the substrate and the patterned N-type transparent oxide semiconductor layer.4. A transistor structure claim 1 , comprisinga patterned P-type organic polymer ...

Method for forming electrode structure

In a method for forming an electrode structure in a display device, e.g. a source, drain or gate electrode or a pixel electrode, a photoactive conductive layer, which includes conductive material containing photoactive material, is formed above a substrate of the display device. The photoactive conductive layer is then patterned with a photo-mask and partially removed without the presence of a photo-resist to form the electrode structure.

SWITCHABLE THREE-DIMENSIONAL DISPLAY

A switchable three-dimensional display includes a display panel and a switchable parallax barrier. The switchable parallax barrier is configured over the display panel and includes a first substrate, a second substrate, an insulating layer, a common electrode, and a light-valve layer. The first substrate has a touch-sensing circuit. The second substrate has a plurality of control electrodes and is configured between the first substrate and the display panel. The touch-sensing circuit and the control electrodes are located between the first substrate and the second substrate. The insulating layer is configured over the first substrate and covers the touch-sensing circuit. The common electrode is configured on the insulating layer. The light-valve layer is configured between the common electrode and the control electrodes. 1. A switchable three dimensional display comprising:a display panel; and a first substrate having a touch-sensing circuit;', 'a second substrate configured between the first substrate and the display panel, the second substrate having a plurality of control electrodes, the touch-sensing circuit and the control electrodes being located between the first substrate and the second substrate;', 'an insulating layer configured over the first substrate and covering the touch-sensing circuit;', 'a common electrode configured on the insulating layer; and', 'a light-valve layer configured between the common electrode and the control electrodes., 'a switchable parallax barrier configured over the display panel and comprising2. The switchable three-dimensional display as claimed in claim 1 , wherein the display panel comprises a liquid crystal display panel claim 1 , an organic electro-luminescent display panel claim 1 , a plasma display panel claim 1 , or an electrophoretic display panel.3. The switchable three-dimensional display as claimed in claim 1 , wherein the control electrodes define a plurality of slits parallel to one another.4. The switchable three ...

METHOD FOR PATTERNING A METAL LAYER AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES BY USING THE SAME

Disclosed herein is a method for patterning a metal layer, which includes the following steps. A substrate having a metal layer thereon is provided. A patterned conductive polymeric layer is formed on the metal layer, wherein a portion of the metal layer is exposed by the patterned conductive polymeric layer. The substrate having the patterned conductive polymer layer is disposed in an electrolytic cell, so that the exposed portion of the metal layer is immersed in the electrolytic solution of the electrolytic cell. The anode of the electrolytic cell is electrically coupled to the patterned conductive polymeric layer, while the cathode of the electrolytic cell is immersed in the electrolytic solution. Sequentially, an electrical potential is applied across the anode and the cathode to perform an electrolysis reaction so that the exposed portion of the metal layer is dissolved in the electrolytic solution. 1. A method for patterning a metal layer , comprising:providing a substrate having a metal layer thereon;forming a patterned conductive polymeric layer on the metal layer, wherein a portion of the metal layer is exposed by the patterned conductive polymeric layer;subjecting the substrate formed with the patterned conductive polymeric layer to an electrolytic cell, such that the exposed portion of the metal layer is immersed in an electrolytic solution of the electrolytic cell, wherein an anode of the electrolytic cell is electrically coupled to the patterned conductive polymeric layer, and a cathode of the electrolytic cell is immersed in the electrolytic solution; andapplying an electrical potential across the anode and the cathode to perform an oxidation-reduction reaction such that the exposed portion of the metal layer is dissolved in the electrolytic solution.2. The method according to claim 1 , further comprising:removing the patterned conductive polymeric layer from the substrate after the step of applying the electrical potential.3. The method according to ...

PHOTO SENSING UNIT AND PHOTO SENSOR THEREOF

A photo sensing unit used in a photo sensor includes a photo sensing transistor, a storage capacitor, and a switching transistor. The photo sensing transistor receives a light signal for inducing a photo current correspondingly, and a source and a gate thereof are respectively coupled to the first signal source and the second signal source. The storage capacitor stores electrical charges induced by the light signal, one terminal thereof is coupled to drain of the photo sensing transistor, and another terminal thereof is coupled to a low voltage. The switching transistor is controlled by the second signal source for outputting a readout signal from the storage capacitor to the signal readout line. The threshold voltage of the photo transistor is higher than that of the switching transistor. 1. A photo sensing unit , comprising:a photo sensing transistor, having a first gate, a first source, and a first drain, used to receive a light signal for inducing a photo current correspondingly, wherein the first source is coupled to a first signal source, and the first gate is coupled to a second signal source;a storage capacitor, having a first end and a second terminal, used to store a plurality of electrical charges induced from the light signal, wherein the first end is coupled to the first drain, and the second end is coupled to a low voltage; anda switching transistor, having a second gate, a second source, and a second drain, controlled by the second signal source, and used to output a readout signal stored in the storage capacitor to signal readout line, wherein the second source is coupled to the first end, and the second drain is coupled to the signal readout line, and the second gate is coupled to the second signal source;wherein a threshold voltage of the photo sensing transistor is higher than that of the switching transistor.2. The photo sensing unit according to claim 1 , wherein the photo sensing transistor and the switching transistor are two oxide thin film ...

ELECTROTHERMAL TRANSFER DEVICE AND ELECTROTHERMAL TRANSFER METHOD

An electrothermal transfer device includes a substrate, a plurality of electrothermal components and a heating circuit. The electrothermal components are disposed on a surface of the substrate and arranged in a pattern. The heating circuit is electrically connected to the electrothermal components. In an electrothermal transfer method, at first, a transfer substrate is disposed on a workpiece substrate. Then, the electrothermal transfer device is disposed on the transfer substrate so that the electrothermal components contact with the transfer substrate. Thereafter, the heating circuit is used to heat the electrothermal transfer components so that the transfer substrate is heated to be transferred to the workpiece substrate. The electrothermal transfer device and the electrothermal transfer method can reduce cost. 1. An electrothermal transfer device , comprising:a substrate having a surface;a plurality of electrothermal components disposed on the surface of the substrate and arranged in a pattern; anda heating circuit electrically connected to the electrothermal components.2. The electrothermal transfer device according to claim 1 , wherein a material of the electrothermal components is selected from a group consisting of metal claim 1 , metal oxide and graphite.3. The electrothermal transfer device according to claim 1 , wherein a material of the heating circuit is either metal or metal oxide.4. The electrothermal transfer device according to claim 1 , wherein the heating circuit is disposed on the surface of the substrate.5. The electrothermal transfer device according to claim 1 , wherein the substrate is a roller and the surface of the substrate is a circumferential surface of the roller.6. The electrothermal transfer device according to claim 1 , wherein the substrate is a plate and the surface of the substrate is a planar surface of the plate.7. The electrothermal transfer device according to claim 1 , further comprising an aligning unit connected to the ...

SMART WINDOW AND SMART WINDOW SYSTEM USING THE SAME

A smart window includes a windowpane, at least one sensor and a wireless signal transceiver. The sensor is disposed on the windowpane and configured for detecting an environmental factor and accordingly outputting a sensing signal. The wireless signal transceiver is disposed on the windowpane and electrically connected to the sensor. The wireless signal transceiver is configured for further transmitting the sensing signal from the sensor. A smart window system includes the aforementioned smart window. The smart window and the smart window system adopt wireless communication manner to transmit the sensing signals, and thereby the smart window system has an overall modulation to an environmental factor. 1. A smart window comprising:a windowpane;at least one sensor disposed on the windowpane, and the sensor being configured for detecting an environmental factor and accordingly outputting a sensing signal; anda wireless signal transceiver disposed on the windowpane and electrically connected to the sensor, and the wireless signal transceiver being configured for transmitting the sensing signal from the sensor.2. The smart window according to claim 1 , wherein the sensor is an organic-inorganic composite sensor.3. The smart window according to claim 2 , wherein the organic-inorganic composite sensor comprises at least a transparent oxide semiconductor thin film transistor.4. The smart window according to claim 1 , wherein the wireless signal transceiver is an antenna which is implemented by at least a fine metal wire or at least a transparent electrode.5. The smart window according to claim 1 , wherein an electric connection between the sensor and the wireless signal transceiver is realized by a transparent conductive material.6. The smart window according to claim 1 , wherein the at least one sensor is at least one of an image sensor claim 1 , a temperature sensor claim 1 , a vibration sensor claim 1 , a poison gas sensor and a bursting gas sensor.7. A smart window ...

E-PAPER DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

A display device includes a substrate, a driving circuit, an E-paper display layer and a protective coating layer. The driving circuit is arranged on the substrate. The E-paper display layer is disposed on and driven by the driving circuit. The protective coating layer is coated on and in contact with the E-paper display layer. The protective coating layer can provide protection and better optical performance, and it is advantageous to the manufacturing method to overcome the problems such as bubbles and low light transmittance occurring in the conventional manufacturing method. 1. A display device , comprising:a substrate;a driving circuit, formed on the substrate;an E-paper display layer, formed on the driving circuit; anda protective coating layer, coated on the E-paper display layer and in contact with the E-paper display layer.2. The display device of claim 1 , wherein the protective coating layer comprises a moisture barrier film.3. The display device of claim 2 , wherein the material of the moisture barrier film comprises inorganic ceramics claim 2 , organic polymers or organic/inorganic composites.4. The display device of claim 3 , wherein the material of the moisture barrier film comprises silicon oxide claim 3 , silicon nitride claim 3 , parylene claim 3 , polypropylene claim 3 , amorphous silicon/parylene composite claim 3 , or polypropylene/polyacrylate/aluminum composite.5. The display device of claim 2 , wherein the protective coating layer further comprises an optical film disposed on the moisture barrier film.6. The display device of claim 5 , wherein the optical film comprises a non-interference cut-off filter or an interference cut-off filter for absorbing or blocking ultraviolet rays.7. The display device of claim 6 , wherein the interference cut-off filter comprises multiple refractive films with varying refractive indexes.8. The display device of claim 7 , wherein the material of the refractive films comprises magnesium fluoride claim 7 , ...

Color Display and Method for Manufacturing Color Display

A method for manufacturing a color display provides a bottom substrate, injects a liquid display media onto the bottom substrate, and disposes a sealing substrate on the liquid display media, such that the liquid display media is contained between the sealing substrate and the bottom substrate. The method also aligns an image device corresponding to the bottom substrate and transfers a color coating onto the sealing substrate by a laser device through a laser thermal transfer process to form a color filter layer on the sealing substrate.

SIGNAL LINE STRUCTURE OF A FLAT DISPLAY

The signal line structure is disposed between a gate driver and a display area of a display. The signal line structure includes a substrate, first metal layers, a first insulation layer, second metal layers, a second insulation layer and third metal layers. The first metal layers are arranged in parallel and toward a first direction in the substrate. The first insulation layer is disposed in the substrate and covers the first metal layers. The second metal layers are disposed on the positions of the first insulation layer corresponding to the first metal layers. The second insulation layer is disposed on the second metal layers and the first insulation layer. The third metal layers are disposed on the positions corresponding to the second metal layers in the second insulation layer. The distance between two adjacent second metal layers is less than that between two adjacent first metal layers. 1. A signal line structure disposed between a gate driver and a display area of a display , comprising:a substrate;a plurality of first metal layer, wherein the first metal layers are arranged in parallel and toward a first direction in the substrate;a first insulation layer, wherein the first insulation layer is disposed in the substrate and covers the first metal layers;a plurality of second metal layer, wherein the second metal layers are disposed on positions corresponding to the first metal layers in the first insulation layer;a second insulation layer, wherein the second insulation layer is disposed on the second metal layers and the first insulation layer; anda plurality of third metal layer, wherein the third metal layers are disposed on the positions corresponding to the second metal layers in the second insulation layer,wherein the distance between two adjacent second metal layers is less than the distance between two adjacent first metal layers.2. The signal line structure of claim 1 , wherein the substrate is a glass substrate or a plastic substrate.3. The signal ...

ATMOSPHERIC FILM-COATING DEVICE AND FILM-MANUFACTURING APPARATUS

An atmospheric film-coating device and a film-manufacturing apparatus are described. The atmospheric film-coating device includes a delivery device and a nebulization device. The delivery device is suitable for delivering at least one substrate. The nebulization device is used to gasify a film coating solution toward a direction indirectly to the at least one substrate into a plurality of film coating vapor molecules to deposit on a surface of the at least one substrate. 1. An atmospheric film-coating device , including:a delivery device suitable for delivering at least one substrate; anda nebulization device used to gasify a film coating solution toward a direction indirectly to the at least one substrate into a plurality of film coating vapor molecules to deposit on a surface of the at least one substrate.2. The atmospheric film-coating device according to claim 1 , further including a protective cover suitable for covering the at least one substrate and the nebulization device claim 1 , wherein the protective cover and the delivery device define a confined space or a semi-confined space.3. The atmospheric film-coating device according to claim 1 , wherein the nebulization device includes:at least one coating carrier suitable for carrying a film coating solution; andat least one nebulization element disposed on the at least one coating carrier and suitable for gasifying the film coating solution into the film coating vapor molecules.4. The atmospheric film-coating device according to claim 3 , wherein the at least one nebulization element includes an ultrasonic nebulization vibration sheet claim 3 , a heating evaporation nebulization element claim 3 , a high-pressure gas jet element or a nozzle nebulization element.5. The atmospheric film-coating device according to claim 3 , wherein the at least one nebulization element is disposed on a top portion of the at least one coating carrier claim 3 , and the nebulization device further includes at least one coating- ...

Color Electrophoretic Display

A color electrophoretic display includes a substrate, a segment electrode circuit layer, a transparent electrode layer, an electrophoretic display medium layer, and a colored polymer film. The segment electrode circuit layer is disposed on the substrate and is configured to display a letter and/or a pattern. The transparent electrode layer is disposed opposing the segment electrode circuit layer, and the electrophoretic display medium layer is disposed between the segment electrode circuit layer and the transparent electrode layer. The electrophoretic display medium layer is controlled by an electric field that is produced and varied by the segment electrode circuit layer and the transparent electrode layer to change brightness. The color polymer film is disposed on the transparent electrode layer to produce color. The colored polymer film includes a polymer layer and pigment particles distributed in the polymer layer. 1. A color electrophoretic display , comprising:a substrate;a segment electrode circuit layer disposed on the substrate and configured to display at least one of a letter and a pattern;a transparent electrode layer disposed opposing the segment electrode circuit layer;an electrophoretic display medium layer disposed between the segment to electrode circuit layer and the transparent electrode layer, wherein the electrophoretic display medium layer is controlled by an electric field that is produced and varied by the segment electrode circuit layer and the transparent electrode layer to change brightness; anda colored polymer protection film disposed on the transparent electrode layer for producing color, wherein the colored polymer protection film includes a polymer layer and a plurality of pigment particles distributed in the polymer layer.2. The color electrophoretic display as claimed in claim 1 , further comprising an adhesive layer adhered to the segment electrode circuit layer for protecting the segment electrode circuit layer.3. The color ...

DRIVING SUBSTRATE AND DISPLAY APPARATUS USING THE SAME

An exemplary driving substrate includes a substrate, a plurality of first and second signal transmission lines, a first insulation layer and a plurality of switch devices. The first signal transmission lines are disposed on the substrate, and each includes a first line segment(s) and a first connecting segment(s). The first insulation layer is disposed between each first line segment and each first connecting segment, and each first connecting segment is electrically connected to the adjacent first line segment(s) through an opening(s) of the first insulation layer. The second signal transmission lines are disposed on the substrate and electrically insulated and intersected with the first signal transmission lines thereby defining a plurality of pixel regions on the substrate. The switch devices are respectively disposed in the pixel regions, and each is electrically connected to corresponding first and second signal transmission lines. The driving substrate has better reliability. 1. A driving substrate , comprising:a substrate; at least one first line segment; and', 'at least one first connecting segment, electrically connected to the adjacent at least one first line segment;, 'a plurality of first signal transmission lines, disposed on the substrate in a first direction, and each the first signal transmission line comprisinga first insulation layer, disposed between each the first line segment and each the first connecting segment, wherein the first insulation layer comprises at least one first opening to expose at least one portion of each the first line segment, and each the first connecting segment is electrically connected to the first line segment through the corresponding at least one first opening;a plurality of second signal transmission lines, disposed on the substrate in a second direction and electrically insulated and intersected with the first signal transmission lines thereby defining a plurality of pixel regions on the substrate, wherein the first ...

METAL OXIDE THIN FILM TRANSISTOR

A metal oxide thin film transistor (TFT) includes a gate electrode, a gate insulating layer, a metal oxide active layer, a source electrode, and a drain electrode. The gate electrode is formed on a substrate. The gate insulating layer is formed on the substrate and covers the gate electrode. The metal oxide active layer is formed on the gate insulating layer. The drain electrode and the source electrode are formed on two opposite ends of the metal oxide active layer in a spaced-apart manner, in which at least one of the orthographic projection of the source electrode and the orthographic projection of the drain to electrode on the substrate does not overlap the gate electrode. 1. A metal oxide thin film transistor (TFT) comprising:a gate electrode formed on a substrate;a gate insulating layer formed on the substrate and covering the gate electrode;a metal oxide active layer formed on the gate insulating layer; anda source electrode and a drain electrode formed on two opposite ends of the metal oxide active layer in a spaced-apart manner, wherein at least one of an orthographic projection of the source electrode and an orthographic projection of the drain electrode on the substrate does not overlap the gate electrode.2. The metal oxide thin film transistor of claim 1 , wherein the orthographic projection of the source electrode on the substrate overlaps the gate electrode claim 1 , and the orthographic projection of the drain electrode on the substrate does not overlap the gate electrode.3. The metal oxide thin film transistor of claim 2 , wherein an interval between the orthographic projection of the drain electrode on the substrate and the gate electrode is from 1 to 2.5 μm.4. The metal oxide thin film transistor of claim 2 , wherein an interval between the orthographic projection of the drain electrode on the substrate and the gate electrode is from 0.5 to 1 μm.5. The metal oxide thin film transistor of claim 2 , wherein an interval between the orthographic ...

Transistor Structure

A transistor structure comprises a patterned N-type transparent oxide semiconductor formed over a substrate as a base, and a patterned p-type organic polymer semiconductor formed on the patterned N-type transparent oxide semiconductor comprising a first portion and a second portion so that the patterned N-type transparent oxide semiconductor and the first portion and the second portion of the patterned p-type organic polymer semiconductor form heterojunctions therebetween respectively, wherein the first portion of the patterned p-type organic polymer semiconductor is used as an emitter, and the second portion of the patterned p-type organic polymer semiconductor is used as a collector. 1. A transistor structure , comprising:a patterned first-type transparent oxide semiconductor layer formed over a substrate as a base; anda patterned second-type organic polymer semiconductor layer formed on the patterned first-type transparent oxide semiconductor layer, wherein the patterned second-type organic polymer semiconductor layer comprises a first portion and a second portion so that the patterned first-type transparent oxide semiconductor layer and the first portion and the second portion of the patterned second-type organic polymer semiconductor layer form heterojunctions therebetween respectively, wherein the first portion of the patterned second-type organic polymer semiconductor layer is used as an emitter, and the second portion of the patterned second-type organic polymer semiconductor layer is used as a collector.2. The transistor structure according to claim 1 , wherein the patterned first-type transparent oxide semiconductor layer comprises a patterned P-type transparent oxide semiconductor layer and the patterned second-type organic polymer semiconductor layer comprises a N-type organic polymer semiconductor layer.3. The transistor structure according to claim 2 , wherein the patterned P-type transparent oxide semiconductor layer comprises IGZO claim 2 , and the ...

ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode. 1. A method for manufacturing an array substrate , comprising:providing a substrate;forming a source electrode and a drain electrode on the substrate;sequentially forming a semiconductor layer, an organic insulating layer and a gate electrode layer to cover the substrate, the source electrode and the drain electrode;forming a patterned photoresist layer on the gate electrode layer, wherein a portion of the gate electrode layer is exposed;removing the exposed portion of the gate electrode layer, and a portion of the organic insulating layer and a portion of the semiconductor layer under the exposed portion of the gate electrode layer to form a gate electrode;forming an organic passivation layer on the gate electrode, the source electrode and the drain electrode, wherein the organic passivation layer has a contact window to expose a portion of the drain electrode; andforming a pixel electrode on the organic passivation layer, wherein the pixel electrode is electrically connected to the drain electrode through the contact window.2. The method of claim 1 , wherein the step of providing the ...

LIGHT SENSING DEVICE

A light sensing device is disclosed. The light sensing device includes a first light sensor and a second light sensor. The first light sensor formed on a substrate includes a first metal oxide semiconductor layer for absorbing a first light having a first waveband. The second light sensor formed on the substrate includes a second metal oxide semiconductor layer and an organic light-sensitive layer on the second metal oxide semiconductor layer for absorbing a second light having a second waveband. 1. A light sensing device , comprising:A first light sensor formed on a substrate, wherein the first light sensor comprises a first metal oxide semiconductor layer for absorbing a first light having a first waveband; anda second light sensor formed on the substrate, wherein the second light sensor comprises a second metal oxide semiconductor layer and an organic light-sensitive layer on the second metal oxide semiconductor layer for absorbing a second light having a second waveband.2. The light sensing device of claim 1 , wherein the first and the second metal oxide semiconductor layers are made from indium gallium zinc oxide claim 1 , indium zinc oxide claim 1 , indium zinc tin oxide claim 1 , or any combinations thereof for absorbing ultraviolet light.3. The light sensing device of claim 2 , wherein the organic light-sensitive layer is made from poly(3-hexylthiophene) for absorbing visible light.4. The light sensing device of claim 1 , wherein thicknesses of the first and the second metal oxide semiconductor layers are different.5. The light sensing device of claim 1 , wherein oxygen contents of the first and the second metal oxide semiconductor layers are different.6. The light sensing device of claim 1 , wherein the first light sensor is a staggered type or a coplanar type light-sensing thin film transistor.7. The light sensing device of claim 1 , wherein the second light sensor is a staggered type or a coplanar type light-sensing thin film transistor.8. The light ...

THREE-DIMENSION CIRCUIT STRUCTURE AND SEMICONDUCTOR DEVICE

A three-dimension circuit structure includes a substrate, a first conductive layer, a filled material and a second conductive layer. The substrate has an upper surface and a cavity located at the upper surface. The first conductive layer covers the inside walls of the cavity and protrudes out the upper surface. The filled material fills the cavity and covers the first conductive layer. The second conductive layer covers the filled material and a portion of the first conductive layer, and the first conductive layer and the second conductive layer encapsulate the filled material. The material of the filled material is different from that of the first conductive layer and the second conductive layer. 1. A three-dimension circuit structure , comprising:a substrate, having an upper surface and a cavity located at the upper surface;a first conductive layer, covering the inside walls of the cavity and protruding out the upper surface;a filled material, filling the cavity and covering the first conductive layer; anda second conductive layer, covering the filled material and a portion of the first conductive layer, wherein the first conductive layer and the second conductive layer encapsulate the filled material, and the material of the filled material is different from that of the first conductive layer and the second conductive layer.2. The three-dimension circuit structure according to claim 1 , wherein the material of the substrate comprises an organic material or an inorganic material.3. The three-dimension circuit structure according to claim 1 , wherein the depth of the cavity is 1/10 to ½ of the thickness of the substrate.4. The three-dimension circuit structure according to claim 1 , wherein the filled material comprises an organic material claim 1 , a polymer material or a polymer material containing a plurality of metal particles or a plurality of non-metal particles.5. The three-dimension circuit structure according to claim 4 , wherein the material of the metal ...

THIN FILM TRANSISTOR

A thin film transistor suitable for being disposed on a substrate is provided. The thin film transistor includes a gate electrode, an organic gate dielectric layer, a metal oxide semiconductor layer, a source electrode and a drain electrode. The gate electrode is disposed on the substrate. The organic gate dielectric layer is disposed on the substrate to cover the gate electrode. The source electrode, the drain electrode and the metal oxide semiconductor layer are disposed above the organic gate dielectric layer, and the metal oxide semiconductor layer contacts with the source electrode and the drain electrode. Because the channel layer of the thin film transistor is a layer of metal oxide semiconductor formed at a lower temperature, thus the thin film transistor can be widely applied into various display applications such as flexible display devices. 1. A thin film transistor , configured for being disposed on a substrate , comprising:a gate electrode, disposed on the substrate;an organic gate dielectric layer, disposed on the substrate to cover the gate electrode;a source electrode and a drain electrode, disposed above the organic gate dielectric layer; anda metal oxide semiconductor layer, disposed on the organic gate dielectric layer and contacts with the source electrode and the drain electrode.2. The thin film transistor of claim 1 , wherein the metal oxide semiconductor layer comprises indium gallium zinc oxide claim 1 , indium zinc oxide or a combination thereof.3. The thin film transistor of claim 1 , wherein the organic gate dielectric layer comprises a flexible organic material.4. The thin film transistor of claim 1 , wherein the organic gate dielectric layer comprises an organic polymer.5. The thin film transistor of claim 1 , further comprising a barrier layer disposed between the metal oxide semiconductor layer and the organic gate dielectric layer.6. The thin film transistor of claim 5 , wherein the barrier layer comprises silicon oxide.7. A thin film ...

THIN-FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME

Disclosed herein is a thin film transistor. The thin film transistor is characterized in having a source interconnect layer and a drain interconnect layer. The source electrode and the drain electrode are respectively disposed above and in contact with the source interconnect layer and the drain interconnect layer. The semiconductor layer is in contact with both the source interconnect layer and the drain interconnect layer, but is not in contact with the source electrode and the drain electrode. 1. A thin film transistor , comprising:a substrate;a gate electrode disposed on the substrate;a gate insulating layer covering the gate electrode and the substraa source interconnect layer and a drain interconnect layer disposed on the gate insulating layer, wherein the source interconnect layer is spaced apart from the drain interconnect layer;a source electrode and a drain electrode respectively disposed above and in contact with the source interconnect layer and the drain interconnect layer; anda semiconductor layer disposed above the gate insulating layer at a position overlapped with the gate electrode, and in contact with both the source interconnect layer and the drain interconnect layer, wherein the semiconductor layer is not in contact with the source electrode and the drain electrode.2. The thin film transistor according to claim 1 , further comprising a dielectric layer sandwiched between the source electrode and the gate insulating layer claim 1 ,and between the drain electrode and the gate insulating layer claim 1 , wherein the source interconnect layer interconnects the source electrode and the semiconductor layer claim 1 , and the drain interconnect layer interconnects the drain electrode and the semiconductor layer.3. The thin film transistor according to claim 1 , further comprising a dielectric layer sandwiched between the semiconductor layer and the gate insulating layer claim 1 , wherein the source interconnect layer interconnects the source electrode ...

COURT BORDER MODULE USING DISPLAY APPARATUS

A court border module using a display apparatus is disclosed, which uses piezoelectric elements to drive the display apparatus. When a ball hits a court border, which is defined by the display apparatus, a force is applied to the piezoelectric elements which then generate power to drive the corresponding part of the display apparatus. The color of the part of the display apparatus hit by the ball is switched. Therefore the change in the color of the court border can be observed by officials and others to instantly and objectively determine whether the ball has hit the court border. 1. A court border module using a display apparatus comprising:a top electrode for defining a court border, the top electrode connecting to a voltage level;a plurality of bottom electrodes, wherein a plurality of display areas are defined between the top electrode and the bottom electrodes;a display layer disposed between the top electrode and the bottom electrodes; anda plurality of piezoelectric elements connected to the bottom electrodes respectively.2. The court border module using a display apparatus of claim 1 , wherein the display layer comprises a plurality of microcapsules claim 1 , and at least one of the microcapsules is driven to switch a color shown by the corresponding display area when a force is applied to at least one of the corresponding piezoelectric elements.3. The court border module using a display apparatus of claim 2 , wherein each of the microcapsules comprises a plurality of white particles each having a first type of charge and a plurality of black particles each having a second type of charge.4. The court border module using a display apparatus of claim 1 , further comprising a transparent protective layer disposed on the top electrode.5. The court border module using a display apparatus of claim 1 , further comprising a plurality of capacitors each connecting one of the bottom electrodes and the voltage level.6. The court border module using a display apparatus ...

THIN FILM TRANSISTOR

A thin film transistor (TFT) is provided, which includes a gate, a semiconductor layer, an insulation layer, a source and a drain. The semiconductor layer has a first end and a second end opposite to the first end. The insulation layer is disposed between the gate and the semiconductor layer. The source clamps the first end of the semiconductor layer and the drain clamps the second end of the semiconductor layer. 1. A thin film transistor , comprising:a gate;a semiconductor layer, having a first end and a second end opposite to the first end;an insulation layer, disposed between the gate and the semiconductor layer;a source, clamping the first end of the semiconductor layer; anda drain, clamping the second end of the semiconductor layer.2. The thin film transistor as claimed in claim 1 , wherein the insulation layer has a first surface facing away from the gate claim 1 , the semiconductor layer has a second surface facing the gate claim 1 , and the source has:a first electrode portion, connected to the first end of the semiconductor layer; anda second electrode portion, connected to the first electrode portion and the first end of the semiconductor layer, wherein at least a part of the second electrode portion is disposed between the first surface and the second surface, andthe drain has:a third electrode portion, connected to the second end of the semiconductor layer; anda fourth electrode portion, connected to the third electrode portion and the second end of the semiconductor layer, wherein at least a part of the fourth electrode portion is disposed between the first surface and the second surface.3. The thin film transistor as claimed in claim 2 , wherein the second electrode portion and the fourth electrode portion are respectively located at two opposite sides of an orthogonal projection of the gate onto the second surface.4. The thin film transistor as claimed in claim 3 , wherein the second electrode portion and the orthogonal projection are not overlapped ...

ELECTROSTATIC DISCHARGE PROTECTION STRUCTURE FOR AN ACTIVE ARRAY SUBSTRATE

Disclosed herein is an electrostatic discharge protection structure which includes a signal line, a thin-film transistor and a shunt wire. The thin-film transistor includes a gate electrode, a metal-oxide semiconductor layer, a source electrode and a drain electrode. The first metal-oxide semiconductor layer is disposed above the first gate electrode. The metal-oxide semiconductor layer has a channel region characterized in having a width/length ratio of less than 1. The source electrode is equipotentially connected to the gate electrode. The shunt wire is electrically connected to the drain electrode. When the signal line receives a voltage surge of greater than a predetermined magnitude, the voltage surge is shunted through the thin-film transistor to the shunt wire. 1. An electrostatic discharge protection structure positioned on an active array substrate , the electrostatic discharge protection structure comprising:a signal line; a first gate electrode electrically connected to the signal line;', 'a first metal-oxide semiconductor layer comprising a channel region that has a width/length ratio of less than 1, the first metal-oxide semiconductor layer being disposed above the first gate electrode;', 'a first source electrode equipotentially connected to the first gate electrode; and', 'a first drain electrode connected to the first source electrode through the first metal-oxide semiconductor layer, wherein the first source electrode and the first drain electrode are positioned at opposite sides of the channel region; and, 'a first thin-film transistor, comprisinga shunt wire electrically connected to the first drain electrode;wherein when the signal line receives a voltage surge of greater than a predetermined magnitude, the voltage surge is shunted through the first thin-film transistor to the shunt wire.2. The electrostatic discharge protection structure according to claim 1 , further comprising a second thin-film transistor that electrically interconnects the ...

Thin film transistor

A thin film transistor (TFT) includes a gate, a semiconductor layer, an insulating layer, a source, a drain, and a current reduction layer. The insulating layer is disposed between the gate and the semiconductor layer. The source is connected to the semiconductor layer. The drain is connected to the semiconductor layer, and the source and the drain are separated from each other. The current reduction layer has a first part and a second part. The first part is disposed between the semiconductor layer and at least a part of the source, and the second part is disposed between the semiconductor layer and at least a part of the drain.

TOUCH PANEL, TOUCH DISPLAY DEVICE AND ASSEMBLING METHOD THEREOF

A touch panel including a substrate, a light shielding layer, a touch sensing device layer, a protective layer, and at least one light transmission protrusion is provided. The substrate has a first surface and a second surface opposite to the first surface, wherein the first surface is divided into a visual region and a non-visual region. The light shielding layer is disposed in the non-visual region. The touch sensing device layer is disposed on the first surface of the substrate. The protective layer disposed on the first surface of the substrate covers the light shielding layer and the touch sensing device layer. The light transmission protrusion is disposed on the protective layer, and at least part of the light transmission protrusion is in the non-visual region. A light enters the light transmission protrusion from the second surface. A touch display device and an assembling method thereof are also provided. 1. A touch panel for a touch display device , the touch panel comprising:a substrate having a first surface and a second surface opposite to the first surface, the first surface including a visual region and a non-visual region;a light shielding layer disposed in the non-visual region of the substrate;a touch sensing device layer disposed on the first surface of the substrate;a protective layer disposed on the first surface of the substrate and covering the light shielding layer and the touch sensing device layer; andat least one light transmission protrusion disposed on the protective layer, wherein at least a part of the at least one light transmission protrusion is located in the non-visual region, and a light enters the at least one light transmission protrusion from the second surface.2. The touch panel as claimed in claim 1 , wherein a cross-section of the at least one light transmission protrusion is a shape with an arc edge or a polygonal shape.3. The touch panel as claimed in claim 1 , wherein a light curable adhesive is used in bonding the touch ...

SEMICONDUCTOR DEVICE

A semiconductor device including a substrate, a metal layer, an insulating layer, a semiconductor layer, a drain and a source is provided. The substrate has a surface and a first cavity. The metal layer is disposed on the substrate and covers the surface and inner-wall of the first cavity to define a second cavity corresponding to the first cavity. The insulating layer covers the metal layer and inner-wall of the second cavity to define a third cavity corresponding to the second cavity. The semiconductor layer exposes out a portion of the insulating layer and covers the inner-wall of the third cavity to define a fourth cavity corresponding to the third cavity. The drain and source are disposed on the semiconductor layer and covers a portion of the semiconductor layer and a portion of the insulating layer, in which the drain and source expose out the fourth cavity. 1. A semiconductor device , disposed on a base-plate , the semiconductor device comprising:a substrate, having a surface and a first cavity located at the surface;a metal layer, disposed on the substrate, covering the surface and covering an inner-wall of the first cavity so as to define a second cavity corresponding to the first cavity;an insulating layer, disposed on the metal layer and covering the metal layer and an inner-wall of the second cavity so as to define a third cavity corresponding to the second cavity;a semiconductor layer, disposed on the insulating layer, exposing out a portion of the insulating layer and covering an inner-wall of the third cavity so as to define a fourth cavity corresponding to the third cavity;a drain, disposed on the semiconductor layer and covering a portion of the semiconductor layer and a portion of the insulating layer, wherein the drain exposes out the fourth cavity; anda source, disposed on the semiconductor layer and covering a portion of the semiconductor layer and a portion of the insulating layer, wherein the source exposes out the fourth cavity.2. The ...

Active device

An active device is disposed on a substrate. The active device includes a metal layer, a semiconductor channel layer, an insulating layer, a source and a drain. The metal layer has a metal oxide surface away from the substrate. The insulating layer is disposed between the metal layer and the semiconductor channel layer. The source and the drain are disposed at one side of the semiconductor channel layer. A portion of the semiconductor channel layer is exposed between the source and the drain. An orthogonal projection of the metal layer on the substrate at least covers an orthogonal projection of the portion of the semiconductor channel layer exposed by the source and the drain on the substrate.

TOUCH PANEL AND METHOD OF FABRICATING THE SAME

A touch panel and fabricating method thereof are provided. The touch panel includes a substrate, a touch-sensing circuit, and fan-out traces. The substrate has a touch-sensing region and an adjoined peripheral region. The touch-sensing circuit is disposed on the touch-sensing region. The fan-out traces are disposed on the peripheral region and electrically connected to the touch-sensing circuit. Each fan-out trace includes a first conductive line, a first dielectric layer and a second conductive line. The first conductive line is disposed on the peripheral region. The first dielectric layer is disposed on the peripheral region to cover the first conductive line, and has at least one contact window located above the first conductive line. The second conductive line is disposed on the first dielectric layer, wherein the first and the second conductive line of the same fan-out trace have the same pattern and are electrically connected through the contact window. 1. A touch panel , comprising:a substrate having a touch-sensing region and a peripheral region adjacent to the touch-sensing region;a touch-sensing circuit disposed on the touch-sensing region of the substrate; anda plurality of fan-out traces disposed on the peripheral region of the substrate and electrically connected to the touch-sensing circuit, and each of the fan-out traces comprising:a first conductive line disposed on the peripheral region of the substrate;a first dielectric layer disposed on the peripheral region of the substrate to cover the first conductive line, wherein the first dielectric layer has at least one contact window located above the first conductive line; anda second conductive line disposed on the first dielectric layer, wherein the first conductive line and the second conductive line of a same fan-out trace are electrically connected to each other through the contact windows, and the first conductive line and the second conductive line which are electrically connected to each other ...

TOUCH PANEL AND TOUCH DISPLAY PANEL

A touch panel includes a substrate, a transparent sensor electrode pattern, a patterned compensation electrode, a passivation layer, a transparent shielding electrode and at least one connection structure. The substrate has a surface and includes a sensor region and a peripheral region. The transparent sensor electrode pattern is disposed on the surface of the substrate and in the sensor region. The patterned compensation electrode is disposed on the surface of the substrate and in the peripheral region, and the patterned compensation electrode and the transparent sensor electrode pattern are electrically isolated. The passivation layer is disposed on the surface of the substrate, covers the transparent sensor electrode pattern, and at least partially exposes the patterned compensation electrode. The transparent shielding electrode is disposed on the passivation layer. The connection structure is electrically connected to the transparent shielding electrode and the patterned compensation electrode exposed by the passivation layer. 1. A touch panel , comprising:a substrate having a surface, the substrate comprising a sensor region and a peripheral region;a transparent sensor electrode pattern, disposed on the surface of the substrate and in the sensor region;a patterned compensation electrode, disposed on the surface of the substrate and in the peripheral region, the patterned compensation electrode being electrically isolated from the transparent sensor electrode pattern;a passivation layer, disposed on the surface of the substrate, the passivation layer covering the transparent sensor electrode pattern and at least partially exposing the patterned compensation electrode;a transparent shielding electrode, disposed on the passivation layer; andat least one connection structure, electrically connected to the transparent shielding electrode and the patterned compensation electrode exposed by the passivation layer.2. The touch panel of claim 1 , wherein the patterned ...

ELECTRIC APPARATUS

An electric apparatus including a display and a process unit is provided. The display has an active area and a peripheral area. The display panel including an active device array substrate, an opposite substrate opposite to the active device array substrate and a display medium between the active device array substrate and the opposite substrate. The active device array substrate has a plurality of active devices disposed in the active area and a humidity sensor disposed in the peripheral area. The humidity sensor is a thin film transistor having a metal oxide semiconductor layer. The process unit is electrically connected to the humidity sensor. The process unit calculates a humidity value according to a sensing current from the humidity sensor. 1. An electric apparatus comprising: an active device array substrate having a plurality of active devices disposed in the active area and a humidity sensor disposed in the peripheral area, wherein the humidity sensor is a thin film transistor having a first metal oxide semiconductor layer;', 'an opposite substrate disposed opposite to the active device array substrate; and', 'a display medium disposed between the active device array substrate and the opposite substrate; and, 'a display having an active area and a peripheral area connected to the active area, the display comprisinga process unit electrically connected to the humidity sensor and calculating a humidity value according to a sensing current from the humidity sensor.2. The electric apparatus as claimed in claim 1 , wherein the active device array substrate further has a temperature sensor disposed in the peripheral area and electrically connected to the process unit claim 1 , the process unit calculating a temperature of the active device array substrate according to characteristics of the temperature sensor.3. The electric apparatus as claimed in claim 2 , wherein the temperature sensor is a metal wire surrounding the active area claim 2 , and the process unit ...

TOUCH DISPLAY PANEL AND FABRICATING METHOD THEREOF

A touch display panel including an active device array substrate, an opposite substrate and a liquid crystal layer is provided. The active device array substrate includes a first substrate, a black matrix, a touch-sensing device layer, a dielectric layer and an active device array layer. The black matrix is disposed on the first substrate. The touch-sensing device layer is disposed on the first substrate to cover a portion of the black matrix. The dielectric layer covers the touch-sensing device layer. The active device array layer is disposed on the dielectric layer. The touch-sensing device layer and the active device array substrate are located at two opposite sides of the dielectric layer. The liquid crystal layer is disposed between the active device array layer and the opposite substrate. Moreover, a fabricating method of the touch display panel is also provided. 1. A touch display panel , comprising: a first substrate;', 'a black matrix, disposed on the first substrate;', 'a touch-sensing device layer, disposed on the first substrate to cover a portion of the black matrix;', 'a dielectric layer, covering the touch-sensing device layer;', 'an active device array layer, disposed on the dielectric layer, the touch-sensing device layer and the active device array layer are located at two opposite sides of the dielectric layer;, 'an active device array substrate, comprisingan opposite substrate; anda liquid crystal layer, disposed between the active device array layer and the opposite substrate.2. The touch display panel as claimed in claim 1 , wherein the opposite substrate comprises:a second substrate;a color filter layer, disposed on the second substrate; anda common electrode, disposed over the color filter layer, wherein the common electrode and the second substrate are located at the two opposite sides of the color filter layer.3. The touch display panel as claimed in claim 1 , wherein the active device array layer comprises a plurality of pixels arranged in ...

Thin film transistor structure and array substrate using the same

A thin film transistor structure is provided. The thin film transistor structure includes a first transistor having a first active layer, a second transistor having a second active layer, a first protection layer contacting the first active layer, and a second protection layer contacting the second active layer. The oxygen contents of the first and the second protection layers are controlled to affect the oxygen vacancy number of the first and the second active layers to satisfy the various electronic requirements of the first and the second transistors.

THIN FILM TRANSISTOR, ARRAY SUBSTRATE, AND DISPLAY APPARATUS

A thin film transistor disposed on a substrate is provided. The TFT includes a gate layer, an insulation layer, a carrier transmission layer, a passivation layer, a first source/drain layer, and a second source/drain layer. The gate layer is disposed on the substrate. The insulation layer is disposed on the gate layer. The carrier transmission layer is disposed on the insulation layer. The carrier transmission layer includes an active layer and a mobility enhancement layer. The passivation layer is disposed on the active layer. The first source/drain layer is disposed on the active layer. The second source/drain layer is disposed on the active layer. The mobility enhancement layer includes a first element. The active layer includes a second element. The electronegativity of the first element is smaller than that of the second element to enhance the carrier mobility of the active layer. 1. A thin film transistor adapted to be arranged on a substrate , the thin film transistor comprising:a gate layer disposed on the substrate;an insulation layer disposed on the gate layer;a carrier transmission layer disposed on the insulation layer and comprising an active layer and a mobility enhancement layer;a passivation layer disposed on the active layer;a first source/drain layer disposed on the active layer and connected with the active layer; anda second source/drain layer disposed on the active layer and connected with the active layer.2. The thin film transistor as claimed in claim 1 , wherein the mobility enhancement layer comprises a first element claim 1 , the active layer comprises a second element claim 1 , and an electronegativity of the first element is smaller than an electronegativity of the second element claim 1 , so that a carrier mobility of the active layer is enhanced.3. The thin film transistor as claimed in claim 1 , wherein the mobility enhancement layer is disposed on the active layer.4. The thin film transistor as claimed in claim 1 , wherein the first ...

ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode. 1. An array substrate , comprising:a substrate comprising a flexible polymer layer;a source electrode and a drain electrode disposed on the substrate, wherein the source electrode and the drain electrode are disposed on the flexible polymer layer;a semiconductor layer disposed on the source electrode, the drain electrode and the substrate;an organic insulating layer disposed on the semiconductor layer, wherein a sidewall of the semiconductor layer is continuous with a sidewall of the organic insulating layer;a gate electrode disposed on the organic insulating layer, wherein an area of the gate electrode is less than an area of the organic insulating layer, and the sidewall of the organic insulating layer is not continuous with a sidewall of the gate electrode;an organic passivation layer covering the gate electrode, the source electrode, the drain electrode and the substrate, wherein the organic passivation layer has a contact window to expose a portion of the drain electrode; anda pixel electrode disposed on the organic passivation layer and electrically connected to the drain electrode ...

FOLDABLE DISPLAY DEVICE

A foldable display device includes a display panel having two flat portions and a bend portion between the two flat portions; a hinge substantially aligned with and beneath the bend portion of the display panel; a plurality of slidable platforms between the hinge and a bottom surface of the bend portion of the display panel; and a repeatable adhering component between one of the slidable platforms and the bottom surface of the bend portion of the display panel, wherein the repeatable adhering component comprises a self-adhesive pad or a weak adhesive. 1. A foldable display device , comprising:a display panel having two flat portions and a bend portion between the two flat portions;a hinge substantially aligned with and beneath the bend portion of the display panel;a plurality of slidable platforms between the hinge and a bottom surface of the bend portion of the display panel; anda repeatable adhering component between one of the slidable platforms and the bottom surface of the bend portion of the display panel, wherein the repeatable adhering component comprises a self-adhesive pad or a weak adhesive.2. The foldable display device of claim 1 , wherein the repeatable adhering component is fixed on the one of the slidable platforms.3. The foldable display device of claim 1 , further comprising a fastening adhesive adjacent to the repeatable adhering component and adhered between the one of the slidable platforms and the bottom surface of the bend portion of the display panel.4. The foldable display device of claim 1 , further comprising a fastening adhesive adhered between one of the slidable platforms and the bottom surface of the bend portion of the display panel.5. The foldable display device of claim 1 , further comprising a support platform beneath one of the two flat portions of the display panel.6. The foldable display device of claim 5 , wherein the support platform is fixed on a bottom surface of the one of the two flat portions of the display panel.7. The ...

DISPLAY DEVICE

A display device includes a flexible display panel, a sealant, and a first reinforcing structure. The flexible display panel includes a lower substrate, an upper substrate, and a display medium layer disposed between the lower substrate and the upper substrate. Each of the lower substrate and the upper substrate has an edge region. A centerline of the flexible display panel is parallel to a short side of the flexible display panel. The sealant is disposed between the edge region of the lower substrate and the edge region of the upper substrate. The first reinforcing structure is disposed among the sealant, the edge region of the lower substrate, and the edge region of the upper substrate. The centerline of the flexible display panel passes through the first reinforcing structure, and the elastic modulus of the first reinforcing structure is greater than that of the sealant. 1. A display device , comprising:a flexible display panel comprising a lower substrate, an upper substrate and a display medium layer disposed between the lower substrate and the upper substrate, wherein each of the lower substrate and the upper substrate has an edge region, and a centerline of the flexible display panel is parallel to a short side of the flexible display panel;a sealant disposed between the edge region of the lower substrate and the edge region of the upper substrate; anda first reinforcing structure disposed among the sealant, the edge region of the lower substrate, and the edge region of the upper substrate, wherein the centerline passes through the first reinforcing structure, and an elastic modulus of the first reinforcing structure is greater than an elastic modulus of the sealant.2. The display device of claim 1 , wherein the first reinforcing structure is a heat-curing adhesive or a photo-curing adhesive.3. The display device of claim 1 , wherein the elastic modulus of the first reinforcing structure is in a range from 3 GPa to 4 GPa.4. The display device of claim 1 , ...

ELECTRONIC DEVICE PACKAGE

An electronic device package includes a carrying board, an electronic device, a first insulating layer, and a barrier layer. The carrying board includes a central area, an inner edge area, and an outer edge area. The inner edge area is located between the central area and the outer edge area. The electronic device is located in the central area. The first insulating layer is located on the carrying board and overlapped with the electronic device and extends from the central area to the inner edge area. The barrier layer is located on the carrying board. Here, the barrier layer includes a sidewall contact portion and an extending portion. The sidewall contact portion surrounds a side surface of the first insulating layer, and the extending portion extends from the sidewall contact portion to the outer edge area in a direction away from the first insulating layer. 1. An electronic device package comprising:a carrying board comprising a central area, an inner edge area, and an outer edge area, the inner edge area being located between the central area and the outer edge area;an electronic device located in the central area of the carrying board;a first insulating layer located on the carrying board and overlapped with the electronic device, the first insulating layer extending from the central area to the inner edge area; anda barrier layer located on the carrying board, the barrier layer comprising a sidewall contact portion and an extending portion, the sidewall contact portion surrounding a side surface of the first insulating layer, the extending portion extending from the sidewall contact portion to the outer edge area in a direction away from the first insulating layer.2. The electronic device package of claim 1 , wherein the barrier layer further comprises a cover portion claim 1 , the cover portion extends from the sidewall contact portion in a direction away from the extending portion and covers the first insulating layer claim 1 , and the cover portion ...

BACKLIGHT DISPLAY DEVICE

A backlight display device includes a pixel region, a light-emitting region, a control element, a plurality of first flexible printed circuit board (FPCB) contacts, and a plurality of first driving circuits. The pixel region has a first edge, a second edge opposite to the first edge, a third edge, and a fourth edge opposite to the third edge. A corner region is formed between the first edge and the fourth edge. The light-emitting region is located on the corner region of the pixel region. The control element is located on the corner region of the pixel region and between the light-emitting region and the first edge. The first FPCB contacts are located on the second edge. Each of the first driving circuits is electrically connected to one of the first FPCB contacts and the control element. 1. A backlight display device for assembling a display wall , wherein the backlight display device comprises:a pixel region having a first edge, a second edge opposite to the first edge, a third edge, and a fourth edge opposite to the third edge, wherein a corner region is formed between the first edge and the fourth edge;a light-emitting region located on the corner region of the pixel region;a control element located on the corner region of the pixel region and between the light-emitting region and the first edge;a plurality of first flexible printed circuit board contacts located on the second edge; anda plurality of first driving circuits, wherein each of the first driving circuits is electrically connected to one of the first flexible printed circuit board contacts and the control element.2. The backlight display device of claim 1 , wherein the light-emitting region comprises:a plurality of positive contacts;a plurality of negative contacts; anda plurality of light-emitting diodes, wherein each of the light-emitting diodes is electrically connected to one of the positive contacts and one of the negative contacts.3. The backlight display device of claim 2 , further comprising:a ...

Display device

A display device includes an array substrate and two electronic ink layers. The array substrate includes two active regions and a folding region that connects these two active regions. The two active regions are located at two opposite sides of the folding region. The two electronic ink layers are respectively located on the two active regions. The folding region of the array substrate is located below a gap between the two electronic ink layers. When the display device is at an unfolded state, two edges of the two electronic ink layers are adjacent to each other. When the display device is at a folded state, the two electronic ink layers are located between the two active regions of the array substrate.

ORGANIC LIGHT-EMITTING DISPLAY DEVICE

An organic light-emitting display device includes an active array substrate, an encapsulating layer, an organic light-emitting layer, an absorption layer and a sealant. The encapsulating layer is opposite to the active array substrate, and the encapsulating layer has an inner surface facing the active array substrate. The organic light-emitting layer is disposed on the active array substrate. The absorption layer is configured to absorb at least one of moisture and oxygen, and is positioned on the inner surface of the encapsulating layer. The sealant is disposed between the active array substrate and the encapsulating layer, and encircles the organic light-emitting layer and the absorption layer 1. An organic light-emitting display device , comprising:an active array substrate;an encapsulating layer opposite to the active array substrate and having an inner surface facing the active array substrate;an organic light-emitting layer disposed on the active array substrate;an absorption layer configured to absorb at least one of moisture and oxygen, the absorption layer being positioned on the inner surface of the encapsulating layer; anda sealant disposed between the active array substrate and the encapsulating layer, and encircling the organic light-emitting layer and the absorption layer.2. The organic light-emitting display device according to claim 1 , wherein the encapsulating layer comprises a polymer layer and an inorganic barrier layer configured to block penetration of at least one of moisture and oxygen claim 1 , wherein the absorption layer is positioned on the inorganic barrier layer.3. The organic light-emitting display device according to claim 2 , wherein the polymer layer has a thickness of approximately between 0.005 mm and 0.5 mm.4. The organic light-emitting display device according to claim 2 , wherein the inorganic barrier layer comprises silicon oxide claim 2 , silicon nitride claim 2 , or a combination thereof.5. The organic light-emitting display ...

THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF

A thin film transistor and a fabrication method thereof are provided. A metal patterning layer is formed on the metal oxide semiconductor layer of a thin film transistor to shield the metal oxide semiconductor layer from the water, oxygen and light in the environment. 1. A thin film transistor , comprising:a gate disposed on a substrate;a gate insulating layer disposed on the gate and the substrate;a metal oxide semiconductor layer disposed on the gate insulating layer;an insulating layer disposed on the metal oxide semiconductor layer;a source and a drain respectively disposed on the two sides of the metal oxide semiconductor layer and connecting to the metal oxide semiconductor layer;a metal pattering layer disposed on the insulating layer; andtwo openings respectively located between the metal pattering layer and the source as well as the metal pattering layer and the drain to expose portions of the metal oxide semiconductor layer.2. The thin film transistor of claim 1 , wherein the exposed metal oxide semiconductor layer has a higher density of oxygen vacancy than the unexposed metal oxide semiconductor layer.3. The thin film transistor of claim 1 , wherein the exposed metal oxide semiconductor layer has a higher conductivity than the unexposed metal oxide semiconductor layer.4. The thin film transistor of claim 1 , wherein the metal pattering layer is made from a material of Al claim 1 , Cu claim 1 , Ti claim 1 , Mo claim 1 , or a MoCr alloy.5. The thin film transistor of claim 1 , further comprising a passivation layer covering the source claim 1 , the drain claim 1 , the metal patterning layer claim 1 , and the metal oxide semiconductor layer.6. A method of fabricating a thin film transistor claim 1 , the method comprising:forming a gate on a substrate;forming a gate insulating layer on the gate and the substrate;forming a metal oxide semiconductor layer on the gate insulating layer;forming an insulating layer on the metal oxide semiconductor layer;forming a ...

THIN FILM TRANSISTOR

A thin file transistor includes a gate electrode, a source electrode, a drain electrode, a gate-insulating layer, and an oxide semiconductor layer. The oxide semiconductor layer includes indium-gallium-zinc oxide with a formula of InGaZnO, in which x, y and z satisfy the following formulas 1.5≦(y/x)≦2 and 1.5≦(y/z)≦2. The gate-insulating layer is positioned between the gate electrode and the oxide semiconductor layer. The source electrode and the drain electrode are respectively connected to two different sides of the oxide semiconductor. 1. A thin film transistor , comprising:{'sub': x', 'y', 'z', 'w, 'b': '2', 'an oxide semiconductor layer comprising indium gallium zinc oxide represented by a general formula of InGaZnO, wherein x, y, z and w respectively represent atomic ratios of indium, zinc and oxygen, and x, y and z satisfy the requirements of the following formulae: 1.5≦(y/x)≦2 and 1.5≦(y/z)≦;'}a gate electrode;a gate insulating layer positioned between the gate electrode and the oxide semiconductor layer; anda source electrode and a drain electrode respectively connected to different sides of the oxide semiconductor layer.2. The thin film transistor according to wherein x and z satisfy the following formula: 0.9≦(x/z)≦1.13. The thin film transistor according to claim 1 , wherein y and w satisfy the following formula: 0.375≦(y/w)≦0.5.4. The thin film transistor according to claim 1 , wherein when (x+y+z) is defined as 1 claim 1 , x satisfies the following formula: 0.25≦x≦0.3.5. The thin film transistor according to claim 1 , wherein when (x+y+z) is defined as 1 claim 1 , y satisfies the following formula: 0.42≦y≦0.5.6. The thin film transistor according to claim 1 , wherein when (x+y+z) is defined as 1 claim 1 , z satisfies the following formula: 0.25≦z≦0.3.7. The thin film transistor according to claim 1 , wherein when (x+y+z±w) is defined as 1 claim 1 , x satisfies the following formula: 0.125≦x≦0.134.8. The thin film transistor according to claim 1 , ...

Vertical transistor and manufacturing method thereof

A vertical transistor and a manufacturing method thereof are provided herein. The manufacturing method includes forming a first patterned conductive layer on a substrate; forming a patterned metal oxide layer on the first patterned conductive layer, in which the patterned metal oxide layer includes a first patterned insulator layer, a second patterned insulator layer, and a second patterned conductive layer; forming a semiconductor layer; and forming a third patterned conductive layer. The first patterned insulator layer, the second patterned insulator layer, and the second patterned conductive layer are made by using a single metal oxide material. The oxygen concentration of the second patterned conductive layer is different from the oxygen concentrations of the first patterned insulator layer and the second patterned insulator layer.

ELECTRONIC APPARATUS

An electronic apparatus includes a flexible display device and a roller. The flexible display device includes a driving substrate, a display layer on the driving substrate, and a front protective layer covering the display layer. The flexible display device has an end portion fixed to the roller. The roller includes a holding groove, a receiving slot, and a retraction assembly. The holding groove is recessed from an external surface of the roller. The end portion is in the holding groove. The flexible display device further includes a main body portion outside the holding groove. A thickness of the end portion is less than a thickness of the main body portion. The receiving slot is recessed from the external surface. The retraction assembly is disposed in the receiving slot. When the retraction assembly abuts against the flexible display device, the retraction assembly is pressed into the receiving slot. 1. An electronic apparatus , comprising: a driving substrate;', 'a display layer over the driving substrate; and', 'a front protective layer covering the display layer; and, 'a flexible display device, comprising a holding groove recessed from an external surface of the roller, wherein the end portion of the flexible display device is in the holding groove, and the flexible display device further includes a main body portion outside the holding groove, and a thickness of the end portion is less than a thickness of the main body portion;', 'a receiving slot recessed from the external surface of the roller; and', 'a retraction assembly disposed in the receiving slot, wherein when the retraction assembly abuts against the flexible display device, the retraction assembly is pressed into the receiving slot., 'a roller, wherein an end portion of the flexible display device is fixed to the roller, the roller comprising2. The electronic apparatus of claim 1 , wherein the holding groove has an inner wall claim 1 , and the roller has a round-corner at the external surface ...

Display apparatus and driving method thereof

A display apparatus including a display panel and a display driver is provided. The display driver is coupled to the display panel. The display driver is configured to drive the display panel by at least one of a plurality of gray levels to display an image frame in a first state. The display driver is configured to drive the display panel by a predetermined gray level to display a standby frame in a second state. The display driver determines the predetermined gray level of the standby frame according to the gray levels of the image frame. In addition, a driving method of a display apparatus is also provided.

Foldable display device

A foldable display device includes a central connector, a first support structure, a second support structure, a cable, and a display panel. The central connector has an abutment post. The first support structure is pivoted to the central connector and includes a first recess, a first plate, a first support element, and plural first flexible elements. The second support structure is pivoted to the central connector and has a second recess, a second plate, a second support element, and plural second flexible elements. Two ends of the cable are respectively connected to one end of the first support element and one end of the second support element, and the cable abuts beneath the abutment post. A portion of the display panel is movably disposed over the first support structure, and another portion of the display panel is fixed on the second support structure.

WET COATING METHOD

A wet coating method is described, which includes the following steps. A film coating is applied to at least one surface of a substrate using a wet process. A plasma-assisted filling treatment is performed on the film coating to crystallize the film coating into a film. The plasma-assisted filling treatment includes using a filling coating. 1. A wet coating method , the wet coating method comprising:applying a film coating to at least one surface of a substrate using a wet process; andperforming a plasma-assisted filling treatment on the film coating to crystallize the film coating into a film, wherein the plasma-assisted filling treatment comprises using a filling coating.2. The wet coating method according to claim 1 , before the step of applying the film coating claim 1 , further comprising performing a plasma treatment on the at least one surface of the substrate to form a plurality of functional groups on the at least one surface.3. The wet coating method according to claim 2 , wherein the plasma treatment comprises using an atmospheric pressure plasma.4. The wet coating method according to claim 2 , wherein the plasma treatment comprises using a working gas claim 2 , and the working gas comprises nitrogen claim 2 , argon claim 2 , helium claim 2 , nitrogen and oxygen claim 2 , argon and oxygen claim 2 , or helium and oxygen.5. The wet coating method according to claim 1 , wherein the wet process comprises a slot die coating process claim 1 , a dipping process claim 1 , a spin coating process claim 1 , a brush coating process claim 1 , a spray coating process claim 1 , an electrostatic coating process or an electrospinning coating process.6. The wet coating method according to claim 1 , wherein the step of applying the film coating comprises using a twin-fluid high pressure airflow atomization nozzle claim 1 , a high speed centrifugal spin coater claim 1 , an electrostatic atomization disc coater claim 1 , a sheet piezoelectric ceramics high speed vibration ...

TOUCH DISPLAY PANEL AND FABRICATING METHOD THEREOF

A touch display panel including an active device array substrate, an opposite substrate and a liquid crystal layer is provided. The active device array substrate includes a first substrate, a black matrix, a touch-sensing device layer, a dielectric layer and an active device array layer. The black matrix is disposed on the first substrate. The touch-sensing device layer is disposed on the first substrate to cover a portion of the black matrix. The dielectric layer covers the touch-sensing device layer. The active device array layer is disposed on the dielectric layer. The touch-sensing device layer and the active device array substrate are located at two opposite sides of the dielectric layer. The liquid crystal layer is disposed between the active device array layer and the opposite substrate. Moreover, a fabricating method of the touch display panel is also provided. 1. A touch display panel , comprising: a first substrate;', 'a black matrix, disposed on and directly in contact with the first substrate;', a plurality of first sensing series, wherein a side of the plurality of first sensing series is directly in contact with both the black matrix and a surface of the first substrate, and the black matrix is sandwiched between the first sensing series and the first substrate;', 'a plurality of second sensing series; and', 'an insulation layer, disposed between the plurality of first sensing series and the plurality of second sensing series;, 'a touch-sensing device layer, disposed on the first substrate to cover a portion of the black matrix, the touch-sensing device layer comprises, 'a dielectric layer, disposed on and covering the touch-sensing device layer, wherein the dielectric layer is directly in contact with the touch-sensing device layer; and', 'an active device array layer, disposed on and directly in contact with the dielectric layer, the touch-sensing device layer and the active device array layer are located at two opposite sides of the dielectric layer ...

ORGANIC-INORGANIC HYBRID TRANSISTOR

An organic-inorganic hybrid transistor comprises a flexible substrate, a gate electrode, an organic gate dielectric layer, an oxide semiconductor layer, a first passivation layer, a source electrode and a drain electrode. The gate electrode is disposed on the flexible substrate. The organic gate dielectric layer covers the gate electrode and a portion of the flexible substrate. The oxide semiconductor layer is disposed over the organic gate dielectric layer. The first passivation layer is interposed between and in contact with the oxide semiconductor layer and the organic gate dielectric layer. The source electrode and the drain electrode are respectively connected to different sides of the oxide semiconductor layer. 1. An organic-inorganic hybrid transistor , comprising:a flexible substrate;a gate electrode disposed on the flexible substrate;an organic gate dielectric layer covering the gate electrode and a portion of the flexible substrate;an oxide semiconductor layer disposed over the organic gate dielectric layer, wherein the oxide semiconductor layer overlaps the gate electrode when viewed in a direction vertical to the flexible substrate;a first passivation layer comprising an inorganic material, wherein the first passivation layer is interposed between and in contact with the oxide semiconductor layer and the organic gate dielectric layer; anda source electrode and a drain electrode respectively connected to two different sides of the oxide semiconductor layer.2. The organic-inorganic hybrid transistor according to claim 1 , wherein the first passivation layer consists essentially of an inorganic material claim 1 , and comprises at least one material selected from the group consisting of aluminum oxide claim 1 , silicon oxide claim 1 , silicon nitride and a combination thereof.3. The organic-inorganic hybrid transistor according to claim 2 , wherein the first passivation layer is about 100 Angstrom (A) to about 1000 Angstrom (A) in thickness.4. The organic- ...

FLEXIBLE ELECTRONIC DEVICE

A flexible electronic device has a display region and a package region surrounding the display region. The flexible electronic device includes a substrate, a first protection film, a first adhesive layer, a display medium layer, and a flexible auxiliary layer. The first protection film is disposed to be opposite to the substrate. The first adhesive layer is disposed between the substrate and the first protection film, and at least located within the package region. The display medium layer is disposed between the substrate and the first protection film, and located within the display region. The flexible auxiliary layer is disposed on a surface of the first protection film, and located within the package region, wherein the flexible auxiliary layer overlaps the first adhesive layer in a thickness direction. 1. A flexible electronic device , having a display region and a package region surrounding the display region , the flexible electronic device comprising:a substrate;a first protection film disposed opposite to the substrate;a first adhesive layer disposed between the substrate and the first protection film and located within the package region;a display medium layer disposed between the substrate and the first protection film and located within the display region; anda flexible auxiliary layer disposed on a surface of the first protection film and located within the package region, wherein the flexible auxiliary layer overlaps the first adhesive layer in a thickness direction.2. The flexible electronic device according to claim 1 , wherein the first protection film is bonded to the substrate via the first adhesive layer.3. The flexible electronic device according to claim 1 , wherein a first distance exists between the substrate and the first protection film in the package region claim 1 , and a second distance exists between the substrate and the first protection film in the display region claim 1 , and the first distance is smaller than the second distance.4. ...

Pixel structure and driving method

A pixel structure includes data lines disposed along a first direction, scan lines disposed along a second direction and pixel units periodically disposed along the first and the second directions. In a first pixel unit, a first switch element is coupled to a first scan line and a first data line, the second switch element is coupled to the first scan line, and a third switch element is coupled to the first scan line. In a second pixel unit, a fourth switch element is coupled to a second scan line, the first data line and the second switch element, and a fifth switch element is electrically coupled to the second scan line and the third switch element. In a third pixel unit, a sixth switch element is coupled to a third scan line, the first data line and the fifth switch element.

FOLDABLE DISPLAY DEVICE AND HOLDING STRUCTURE THEREOF

A foldable display device includes a holding structure and a flexible display panel. The holding structure includes a soft outer housing, a first inner housing, a second inner housing, a first supporting stage, a second supporting stage, a first hinge, a first spring element, a second hinge, and a second spring element. The first hinge is connected to a same side of the first inner housing and the first supporting stage. The first spring element is connected to another same side of the first inner housing and the first supporting stage. The second hinge is connected to a same side of the second inner housing and the second supporting stage. The second spring element is connected to another same side of the second inner housing and the second supporting stage. The flexible display panel is located on the first and second supporting stages. 1. A foldable display device , comprising: a soft outer housing having an accommodating space therein;', 'a first inner housing located in the accommodating space;', 'a second inner housing located in the accommodating space, wherein a first gap is formed between the first inner housing and the second inner housing;', 'a first supporting stage above the first inner housing, wherein a third gap is formed between at least one portion of the first supporting stage and the first inner housing;', 'a second supporting stage above the second inner housing, wherein a second gap is formed between the first supporting stage and the second supporting stage;', 'a first hinge connected to a side of the first inner housing facing away from the first gap, and connected to a side of the first supporting stage facing away from the second gap;', 'a first spring element connected to a side of the first inner housing adjacent to the first gap, and connected to a side of the first supporting stage adjacent to the second gap;', 'a second hinge connected to a side of the second inner housing facing away from the first gap, and connected to a side of the ...

Semiconductor sensing device and manufacturing method thereof

A semiconductor sensing device that includes a nanowire conductive layer, a semiconductor sensing layer, and a conductive layer is provided. The nanowire conductive layer includes a plurality of connected conductive nanowires, and gaps are formed between the conductive nanowires. The semiconductor sensing layer is electrically connected to the nanowire conductive layer. The conductive layer is electrically connected to the semiconductor sensing layer. The semiconductor sensing layer is located between the nanowire conductive layer and the conductive layer. A manufacturing method of a semiconductor sensing device is also provided.

TOUCH PANEL AND MANUFACTURING METHOD OF TOUCH DISPLAY PANEL

A touch panel including a substrate, at least one touch-sensing unit, at least one connecting pad, at least a testing line, at least one ESD protection circuit, and a first isolation layer is provided. The touch-sensing unit is disposed on the substrate. The connecting pad is disposed on the substrate and electrically connected to the touch-sensing unit. The testing line is disposed on the substrate, electrically connected to the connecting pad, and extends to at least an edge of the substrate. The ESD protection circuit is disposed in the edge of the substrate and electrically connected to a ground voltage, wherein a vertical projection of the testing line to the substrate and that of the ESD protection circuit to the substrate is at least partially overlapped. The first isolation layer is disposed between the testing line and the ESD protection circuit. 1. A touch panel , comprising:a substrate;at least one touch-sensing unit disposed on the substrate;at least one connecting pad disposed on the substrate, the connecting pad electrically connected to the touch-sensing unit;at least one testing line disposed on the substrate, the testing line electrically connected to the connecting pad and extending to at least one edge of the substrate;at least one ESD protection circuit disposed at the edge of the substrate, wherein a vertical projection of the testing line on the substrate at least partially overlaps a vertical projection of the ESD protection circuit on the substrate; anda first isolation layer disposed between the testing line and the ESD protection circuit.2. The touch panel of claim 1 , wherein the ESD protection circuit is disposed between the substrate and the testing line.3. The touch panel of claim 1 , wherein the testing line is disposed between the substrate and the ESD protection circuit.4. The touch panel of claim 1 , further comprising:at least one grounding pad disposed on the substrate;a second isolation layer covering the substrate, the touch- ...

METAL OXIDE THIN FILM TRANSISTOR

A metal oxide thin film transistor (TFT) includes a gate electrode, a gate insulating layer, a metal oxide active layer, a source electrode, and a drain electrode. The gate electrode is formed on a substrate. The gate insulating layer is formed on the substrate and covers the gate electrode. The metal oxide active layer is formed on the gate insulating layer. The drain electrode and the source electrode are formed on two opposite ends of the metal oxide active layer in a spaced-apart manner, in which at least one of the orthographic projection of the source electrode and the orthographic projection of the drain electrode on the substrate does not overlap the gate electrode. 1. A metal oxide thin film transistor (TFT) comprising:a gate electrode formed on a substrate;a gate insulating layer formed on the substrate and covering the gate electrode;a metal oxide active layer formed on the gate insulating layer; anda source electrode and a drain electrode formed on two opposite ends of the metal oxide active layer in a spaced-apart manner and defining a gap, wherein at least one of an orthographic projection of the source electrode and an orthographic projection of the drain electrode on the substrate does not overlap the gate electrode,wherein the metal oxide active layer has a top surface, the top surface is located on the gap between the source electrode and the drain electrode, the top surface and the source electrode cross at a first boundary, the top surface and the drain electrode cross at a second boundary, the top surface has a gate-overlaying zone, an orthographic projection of the gate-overlaying zone on the substrate overlaps the gate electrode, wherein the first boundary, the second boundary and the gate-overlaying zone are coplanar.2. The metal oxide thin film transistor of claim 1 , wherein the orthographic projection of the source electrode on the substrate overlaps the gate electrode claim 1 , and the orthographic projection of the drain electrode on the ...

CARRIER APPARATUS AND DISPLAY

A carrier apparatus is adapted to carry a flexible substrate. The carrier apparatus includes two carrier plates, two adhesive layers, and two supporting units. The carrier plates have a gap with respect to each other, and each of the carrier plates has a first region and a second region, wherein the second regions of the carrier plates are adjacent to each other and are located between the first regions. The adhesive layers are respectively disposed in the first regions of the carrier plates. The supporting units are respectively disposed in the second regions of the carrier plates and are coplanar with the adhesive layers, wherein the flexible substrate is fixed on the carrier plates through the adhesive layers, and the supporting units are detachably attached to a bending zone of the flexible substrate by attractive force. A display including the carrier apparatus and a flexible display panel is provided. 1. A carrier apparatus adapted to carry a flexible substrate , the carrier apparatus comprising:two carrier plates having a gap with respect to each other, each of the carrier plates having a first region and a second region, wherein the second regions of the carrier plates are adjacent to each other and are located between the first regions;two adhesive layers respectively disposed in the first regions of the carrier plates; andtwo supporting units respectively disposed in the second regions of the carrier plates and coplanar with the adhesive layers, wherein the flexible substrate is fixed on the carrier plates through the adhesive layers, and the supporting units are detachably attached to a bending zone of the flexible substrate by attractive force.2. The carrier apparatus as recited in claim 1 , wherein when the flexible substrate is not bent claim 1 , the supporting units are attached on the flexible substrate by attractive force claim 1 , such that the bending zone of the flexible substrate is evenly attached on the supporting units claim 1 , and when the ...

DISPLAY APPARATUS, DISPLAY MODULE AND PIXEL STRUCTURE THEREOF

A pixel structure located on a periphery of a display module includes a substrate, a flexible circuit board and a plurality of LED chips. The substrate has at least one scribing tolerance reserving zone and a display unit mounting zone. The flexible circuit board is disposed on the display unit mounting zone of the substrate. The LED chips are mounted on the flexible circuit board. 1. A pixel structure of a display , comprising:a substrate having a scribing tolerance reserving zone and a display unit mounting zone;a flexible circuit board disposed on the display unit mounting zone of the substrate, the flexible circuit board being spaced apart from the scribing tolerance reserving zone; anda plurality of LED chips mounted on the flexible circuit board, the LED chips respectively emitting lights in different wavelengths.2. The pixel structure of claim 1 , further comprising:a thin film transistor electrically connected to at least one of the LED chips.3. The pixel structure of claim 2 , wherein the thin film transistor is disposed on the substrate claim 2 , and the flexible circuit board comprises a driving wire connected between the thin film transistor and the at least one of the LED chips.4. The pixel structure of claim 3 , wherein the flexible circuit board comprises a first surface and a second surface opposite to each other claim 3 , and the driving wire comprises a first connection pad located on the first surface and a second connection pad disposed on the second surface claim 3 , wherein the at least one of the LED chips is disposed on the first connection pad claim 3 , and the second connection pad is electrically connected to the thin film transistor.5. The pixel structure of claim 1 , further comprising:a passive matrix driving module, wherein the flexible circuit board comprises a driving wire that comprises a connection pad located on one surface of the flexible circuit board, and at least one of the LED chips is disposed on the connection pad and is ...

FLEXIBLE LAMINATED STRUCTURE AND DISPLAY

A flexible laminated structure includes a first protection layer, a second protection layer directly contacting the first protection layer and a flexible material layer. The second protection layer having a plurality of openings, which are used to expose a portion of the first protection layer. The flexible material layer is disposed on the second protection layer and extends into the openings, and directly contacts the first protection layer exposed by the openings. An adhesion between the flexible material layer and the first protection layer is greater than an adhesion between the second protection layer and the first protection layer. 1. A flexible laminated structure , comprising:a first protection layer;a second protection layer, directly contacting the first protection layer and comprising a plurality of openings, wherein the openings expose a portion of the first protection layer; anda flexible material layer, disposed on the second protection layer, extending into the openings and directly contacting the first protection layer exposed by the openings, wherein an adhesion between the flexible material layer and the first protection layer is greater than an adhesion between the second protection layer and the first protection layer.2. The flexible laminated structure as recited in claim 1 , wherein the flexible material layer is a pressure sensitive adhesive layer claim 1 , and the flexible material layer is filled up in the openings.3. The flexible laminated structure as recited in claim 1 , further comprising:a patterned metal layer, disposed between an upper surface of the second protection layer and the flexible material layer.4. The flexible laminated structure as recited in claim 1 , wherein the flexible material layer is a metal layer covering an upper surface of the second protection layer and an inner wall of the openings claim 1 , and comprising a plurality of contact openings exposing a portion of the upper surface of the second protection layer.5. ...

FLEXIBLE LAMINATED STRUCTURE AND DISPLAY

A flexible laminated structure includes a first protective layer, a plurality of patterned structures, and a second protective layer. The patterned structures are disposed on the first protective layer and expose a portion of the first protective layer. Each of the patterned structures has a first width adjacent to the first protective layer and a second width away from the first protective layer, and the first width is smaller than the second width. The second protective layer is disposed on the first protective layer and covers the patterned structures and the first protective layer. 1. A flexible laminated structure , comprising:a first protective layer;a plurality of patterned structures, disposed on the first protective layer and exposing a portion of the first protective layer, wherein each of the plurality of patterned structures has a first width adjacent to the first protective layer and a second width away from the first protective layer, the first width is smaller than the second width; anda second protective layer, disposed on the first protective layer and covering the plurality of patterned structures and the first protective layer.2. The flexible laminated structure as recited in claim 1 , wherein each of the patterned structures comprises a first pattern structure and a second pattern structure claim 1 , the first pattern structure is located between the second pattern structure and the first protective layer claim 1 , the first pattern structure has the first width claim 1 , and the second pattern structure has the second width.3. The flexible laminated structure as recited in claim 2 , wherein a material of the first pattern structure is a silicon oxide claim 2 , and a material of the second pattern structure is a silicon nitride.4. The flexible laminated structure as recited in claim 1 , wherein a material of each of the patterned structures is a silicon oxynitride claim 1 , and an oxygen content of the silicon oxynitride gradually reduces from a ...

ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode. 1. A method for manufacturing an array substrate , comprising:providing a substrate;forming a source electrode and a drain electrode on the substrate;sequentially forming a semiconductor layer, an organic insulating layer and a gate electrode layer to cover the substrate, the source electrode and the drain electrode;forming a patterned photoresist layer on the gate electrode layer, wherein a portion of the gate electrode layer is exposed;removing the exposed portion of the gate electrode layer, and a portion of the organic insulating layer and a portion of the semiconductor layer under the exposed portion of the gate electrode layer to form a gate electrode and let a sidewall of the semiconductor layer be continuous with a sidewall of the organic insulating layer;forming an organic passivation layer on the gate electrode, the source electrode and the drain electrode, wherein the organic passivation layer has a contact window to expose a portion of the drain electrode; andforming a pixel electrode on the organic passivation layer, wherein the pixel electrode is electrically connected to the ...

CIRCUIT STRUCTURE

A circuit structure includes a flexible substrate, an inorganic barrier layer, a first wire, a second wire, a third wire, a fourth wire, an organic dielectric layer, a first conductive via, and a second conductive via. The inorganic barrier layer is disposed over the flexible substrate. The first and second wires are disposed on the inorganic barrier layer and contact the inorganic barrier layer. The first and second wires are separated from each other. The organic dielectric layer is disposed over the first and second wires. The third wire is disposed in the organic dielectric layer. The fourth wire is disposed above the organic dielectric layer. The first conductive via is disposed in the organic dielectric layer and contacts the first and third wires. The second conductive via is disposed in the organic dielectric layer and contacts the second and fourth wires. 1. A circuit structure , comprising:a flexible substrate;an inorganic barrier layer disposed over the flexible substrate;a first wire and a second wire disposed on the inorganic barrier layer and in contact with the inorganic barrier layer, wherein the first wire and the second wire are separated from each other;an organic dielectric layer disposed over the first wire and the second wire;a third wire disposed in the organic dielectric layer;a fourth wire disposed over the organic dielectric layer;a first conductive via disposed in the organic dielectric layer and in contact with the first wire and the third wire; anda second conductive via disposed in the organic dielectric layer and in contact with the second wire and the fourth wire.2. The circuit structure of claim 1 , wherein the first wire is substantially parallel with the second wire.3. The circuit structure of claim 2 , wherein a distance between the first wire and the second wire ranges from 4 to 10 micrometers.4. The circuit structure of claim 1 , wherein the organic dielectric layer has a first via hole exposing an exposed portion of the first ...

Touch panel and touch display panel

Display apparatus, display module and pixel structure thereof

A pixel structure located on a periphery of a display module includes a substrate, a flexible circuit board and a plurality of LED chips. The substrate has at least one scribing tolerance reserving zone and a display unit mounting zone. The flexible circuit board is disposed on the display unit mounting zone of the substrate. The LED chips are mounted on the flexible circuit board.

Electrostatic discharge protection structure for an active array substrate

Disclosed herein is an electrostatic discharge protection structure which includes a signal line, a thin-film transistor and a shunt wire. The thin-film transistor includes a gate electrode, a metal-oxide semiconductor layer, a source electrode and a drain electrode. The first metal-oxide semiconductor layer is disposed above the first gate electrode. The metal-oxide semiconductor layer has a channel region characterized in having a width/length ratio of less than 1. The source electrode is equipotentially connected to the gate electrode. The shunt wire is electrically connected to the drain electrode. When the signal line receives a voltage surge of greater than a predetermined magnitude, the voltage surge is shunted through the thin-film transistor to the shunt wire.

Array substrate and method for manufacturing the same

Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.

Thin film transistor, array substrate, and display apparatus

Transistor structure

A transistor structure comprises a patterned N-type transparent oxide semiconductor formed over a substrate as a base, and a patterned p-type organic polymer semiconductor formed on the patterned N-type transparent oxide semiconductor comprising a first portion and a second portion so that the patterned N-type transparent oxide semiconductor and the first portion and the second portion of the patterned p-type organic polymer semiconductor form heterojunctions therebetween respectively, wherein the first portion of the patterned p-type organic polymer semiconductor is used as an emitter, and the second portion of the patterned p-type organic polymer semiconductor is used as a collector.

Color electrophoretic display

A color electrophoretic display includes a substrate, a segment electrode circuit layer, a transparent electrode layer, an electrophoretic display medium layer, and a colored polymer film. The segment electrode circuit layer is disposed on the substrate and is configured to display a letter and/or a pattern. The transparent electrode layer is disposed opposing the segment electrode circuit layer, and the electrophoretic display medium layer is disposed between the segment electrode circuit layer and the transparent electrode layer. The electrophoretic display medium layer is controlled by an electric field that is produced and varied by the segment electrode circuit layer and the transparent electrode layer to change brightness. The color polymer film is disposed on the transparent electrode layer to produce color. The colored polymer film includes a polymer layer and pigment particles distributed in the polymer layer.

Thin film transistor, array substrate, and display apparatus

一種薄膜電晶體，適於設置於一基板上。所述薄膜電晶體包括一閘極層、一絕緣層、一載子傳輸層、一保護層、一第一源/汲極層以及一第二源/汲極層。閘極層配置於基板上。絕緣層配置於閘極層上。載子傳輸層配置於絕緣層上。載子傳輸層包括一主動層以及一遷移率增進層。保護層配置於主動層上。第一源/汲極層配置於主動層上。第二源/汲極層配置於主動層上。遷移率增進層包括一第一元素。主動層包括一第二元素。第一元素之電負度小於第二元素之電負度，以提高主動層之載子遷移率。

Thin film transistor

Flexible laminated structure and display

A flexible laminated structure includes a first protective layer, a plurality of patterned structures, and a second protective layer. The patterned structures are disposed on the first protective layer and expose a portion of the first protective layer. Each of the patterned structures has a first width adjacent to the first protective layer and a second width away from the first protective layer, and the first width is smaller than the second width. The second protective layer is disposed on the first protective layer and covers the patterned structures and the first protective layer.

Three-dimension circuit structure and semiconductor device

A three-dimension circuit structure includes a substrate, a first conductive layer, a filled material and a second conductive layer. The substrate has an upper surface and a cavity located at the upper surface. The first conductive layer covers the inside walls of the cavity and protrudes out the upper surface. The filled material fills the cavity and covers the first conductive layer. The second conductive layer covers the filled material and a portion of the first conductive layer, and the first conductive layer and the second conductive layer encapsulate the filled material. The material of the filled material is different from that of the first conductive layer and the second conductive layer.

Examining system and method thereof

E-paper display device and method for manufacturing the same

A display device includes a substrate, a driving circuit, an E-paper display layer and a protective coating layer. The driving circuit is arranged on the substrate. The E-paper display layer is disposed on and driven by the driving circuit. The protective coating layer is coated on and in contact with the E-paper display layer. The protective coating layer can provide protection and better optical performance, and it is advantageous to the manufacturing method to overcome the problems such as bubbles and low light transmittance occurring in the conventional manufacturing method.

Thin film transistor structure and manufacturing method thereof

Array substrate and method for manufacturing the same

Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode.

Driving substrate and display apparatus using the same

一種驅動基板，包括基板、多條第一訊號傳輸線、第一絕緣層、多條第二訊號傳輸線以及多個開關元件。第一訊號傳輸線配置於基板上，每一第一訊號傳輸線包括至少一第一線段以及至少一第一連接段。第一絕緣層配置於第一線段與第一連接段之間，第一連接段經第一絕緣層的開口而電性連接至對應的第一線段。第二訊號傳輸線配置於基板上，且與第一訊號傳輸線絕緣相交，以於基板上畫分出多個畫素區。所述開關元件分別配置於畫素區內，每一開關元件電性連接至對應的第一訊號傳輸線與對應的第二訊號傳輸線。此驅動基板具有可靠度較佳的優點。

薄膜電晶體

一種薄膜電晶體，包含閘極、源極、汲極、閘絕緣層以及氧化物半導體層。氧化物半導體層包含銦鎵鋅氧化物，其化學式為InxGayZnzOw，其中x、y及z滿足數學式：1.5≦(y/x)≦2以及1.5≦(y/z)≦2。閘絕緣層位於閘極與氧化物半導體層之間。源極和汲極分別連接氧化物半導體層之不同兩側。

Flexible display panel

A flexible display panel can be bent around an axis, and includes a flexible substrate and an accommodating structure. The accommodating structure is disposed on the flexible substrate and includes a plurality of polygonal microcups connected to each other, where the polygonal microcups are arranged regularly, and the axis is not substantially parallel to any sidewall of each polygonal microcup.

Color display and method for manufacturing color display

A method for manufacturing a color display provides a bottom substrate, injects a liquid display media onto the bottom substrate, and disposes a sealing substrate on the liquid display media, such that the liquid display media is contained between the sealing substrate and the bottom substrate. The method also aligns an image device corresponding to the bottom substrate and transfers a color coating onto the sealing substrate by a laser device through a laser thermal transfer process to form a color filter layer on the sealing substrate.

Thin film transistor structure and array substrate using the same

A thin film transistor structure is provided. The thin film transistor structure includes a first transistor having a first active layer, a second transistor having a second active layer, a first protection layer contacting the first active layer, and a second protection layer contacting the second active layer. The oxygen contents of the first and the second protection layers are controlled to affect the oxygen vacancy number of the first and the second active layers to satisfy the various electronic requirements of the first and the second transistors.

主動元件

一種主動元件，配置於一基板上。主動元件包括一金屬層、一半導體通道層、一絕緣層、一源極以及一汲極。金屬層具有一遠離基板的金屬氧化物表面。絕緣層配置於金屬層與半導體通道層之間。源極與汲極配置於半導體通道層之一側。半導體通道層的一部分暴露於源極與汲極之間。金屬層於基板上的正投影至少覆蓋被源極與汲極所暴露出半導體通道層的部分於基板上的正投影。

薄膜之蒸鍍方法

一種薄膜之蒸鍍方法，包含下列步驟。提供一基材於一真空腔室內。對真空腔室進行一抽氣處理，以使此真空腔室具有第一壓力。對一薄膜塗料溶液進行一霧化及氣化步驟，以形成複數個薄膜塗料蒸氣分子。使這些薄膜塗料蒸氣分子於真空腔室內擴散。沉積這些薄膜塗料蒸氣分子於基材之一表面上，以形成薄膜鍍覆在此基材之表面上。

Photo sensing unit

表示装置

【課題】表示装置を提供する。【解決手段】下基板、上基板、及び下基板と上基板との間に位置する表示媒体層を含み、中心線が短辺に平行であり、下基板と上基板がそれぞれ縁部領域を有するフレキシブルディスプレイパネルと、下基板の縁部領域と上基板の縁部領域との間に位置するシーラントと、シーラントと下基板の縁部領域と上基板の縁部領域との間に位置し、フレキシブルディスプレイパネルの中心線が通過し、且つ弾性率がシーラントの弾性率よりも大きい第１の補強構造と、を備える表示装置。【選択図】図３

Flexible display device

A flexible display device includes a thin-film transistor (TFT) array substrate, a cover film, an electronic ink layer, an edge sealant, an electrode layer, and a reinforcement layer. The electronic ink layer is located between the TFT array substrate and the cover film. The edge sealant is located between the TFT array substrate and the cover film and surrounds the electronic ink layer. The edge sealant defines a packaging area that vertically overlaps the edge sealant. The electrode layer is located on the electronic ink layer. The reinforcement layer is disposed along the packaging area.

Electronic paper display device

An electronic paper display device includes an upper supporting layer, a lower supporting layer, and an electronic ink layer. The lower supporting layer is opposite to the upper supporting layer. At least one of the upper supporting layer and the lower supporting layer has a thickness in a range from 1 μm to 50 μm and has a storage modulus in a range from 1 kPa to 100 kPa in 0° C. to 70° C. The electronic ink layer is located between the upper supporting layer and the lower supporting layer.

薄膜電晶體

一種薄膜電晶體，包括閘極、半導體層、絕緣層、源極、汲極以及電流抑制層。絕緣層配置於閘極與半導體層之間。源極連接至半導體層。汲極連接至半導體層，其中源極與汲極彼此分離配置。電流抑制層具有第一部分與第二部分，其中第一部分配置於半導體層與至少部分源極之間，且第二部分配置於半導體層與至少部分汲極之間。

觸控裝置的製作方法

本發明提供一種觸控裝置的製作方法，包括提供具第一透明導電層之基板，圖案化第一透明導電層形成下部觸控感測層，再於基板上形成第一保護層與第一光阻層，利用一光罩圖案化第一光阻層使其具有第一開口並具有不同之厚度，移除厚度較小的部份以形成第二開口，然後圖案化暴露出的第一保護層而形成開孔與接觸洞。移除第一光阻層後，依序形成第二透明導電層與第二光阻層，利用同一光罩以圖案化第二光阻層，使第二光阻層具有對應於第一保護層開孔之第三開口，暴露出第二透明導電層，接著移除被暴露之第二透明導電層，形成上部觸控感測層。