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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Применить Всего найдено 11595. Отображено 100.
12-01-2012 дата публикации

Semiconductor wet etchant and method of forming interconnection structure using the same

Номер: US20120009792A1
Автор: Hun-jung Yi, Jung-dae Park, Kun-Hyung Lee, Tae-Hyo Choi, Young You
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A semiconductor wet etchant includes deionized water, a fluorine-based compound, an oxidizer and an inorganic salt. A concentration of the fluorine-based compound is 0.25 to 10.0 wt % based on a total weight of the etchant, a concentration of the oxidizer is 0.45 to 3.6 wt % based on a total weight of the etchant, and a concentration of the inorganic salt is 1.0 to 5.0 wt % based on a total weight of the etchant. The inorganic salt comprises at least one of an ammonium ion (NH 4 + ) and a chlorine ion (Cl − ).

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Номер записи: 1
22-03-2012 дата публикации

Composition for Wet Etching of Silicon Dioxide

Номер: US20120070998A1
Автор: Chang Jin Yoo, Dae Hyun Kim, Jung Hun Lim, Seong Hwan Park
Принадлежит: Techno Semichem Co Ltd

Provided is an etching composition for electively removing silicon dioxide at a high etch rate, more particularly, a composition for wet etching of silicon dioxide, including 1 to 40 wt % of hydrogen fluoride (HF); 5 to 40 wt % of ammonium hydrogen fluoride (NH 4 HF 2 ); and water, and further including a surfactant to improve selectivity of the silicon dioxide and a silicon nitride film. Since the composition for wet etching of silicon dioxide has the high etch selectivity of the silicon dioxide to the silicon nitride film, it is useful for selectively removing silicon dioxide.

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Номер записи: 2
29-03-2012 дата публикации

Semiconductor structure and method for making same

Номер: US20120074572A1
Автор: Andreas STUECKJUERGEN, Juergen Foerster, Thomas Fischer, Werner Robl
Принадлежит: INFINEON TECHNOLOGIES AG

One or more embodiments relate to a method for making a semiconductor structure, comprising: providing a workpiece; forming a barrier layer over the workpiece; forming a separation layer over the barrier layer; forming a conductive layer over the separation layer; and wet etching the conductive layer.

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Номер записи: 3
14-06-2012 дата публикации

Substrate processing apparatus and method of manufacturing semiconductor device

Номер: US20120149208A1
Автор: Takahito Nakajima
Принадлежит: Toshiba Corp

According to one embodiment, a substrate processing apparatus includes a substrate support unit configured to support a substrate by fixing the substrate from a back surface side of a surface to be processed; and a substrate processing unit in which a pad into which a predetermined liquid is soaked is arranged and which performs a substrate process on the surface to be processed of the substrate with the liquid. The surface to be processed of the substrate is brought into contact with the liquid on the pad surface by bringing the surface to be processed of the substrate close to a side of the pad, without rotating the substrate and the pad, to perform a substrate process.

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Номер записи: 4
19-07-2012 дата публикации

Semiconductor device manufacturing method

Номер: US20120184107A1
Автор: Tatsuo Nishita, Toshihiko Shiozawa, Yoshihiro Hirota, Yoshihiro Sato
Принадлежит: Tokyo Electron Ltd

In a semiconductor device manufacturing method, the formation of a sacrificial oxide film and removal thereof by wet etching and/or the formation of a silicon dioxide film and removal thereof by wet etching are performed. In the process for manufacturing a semiconductor device, the formation of the sacrificial oxide film and/or the silicon dioxide film is performed within a processing chamber of a plasma processing apparatus using a plasma in which O( 1 D 2 ) radicals produced using a processing gas that contains oxygen are dominant.

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Номер записи: 5
02-08-2012 дата публикации

Method and apparatus for etching the silicon oxide layer of a semiconductor substrate

Номер: US20120196445A1
Автор: Kwon-Taek Lim
Принадлежит: Pukyong National University

An aspect of the invention is to provide a method and apparatus for etching the silicon oxide layer of a semiconductor substrate, whereby the processing time for cleaning or rinsing, as well as any undesired aftereffects by residual hydrofluoric acid, may be reduced, in using the dry etching method involving the use of dense carbon dioxide that contains hydrofluoric acid, during the manufacturing process of a micro-electronic device.

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Номер записи: 6
09-08-2012 дата публикации

Method and apparatus for fabricating or altering microstructures using local chemical alterations

Номер: US20120201956A1
Автор: Hendrik F. Hamann, Herschel M. Marchman, Robert J. Von Gutfeld, Supratik Guha
Принадлежит: International Business Machines Corp

A method and apparatus for fabricating or altering a microstructure use means for heating to facilitate a local chemical reaction that forms or alters the submicrostructure.

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Номер записи: 7
23-08-2012 дата публикации

Method for obtaining extreme selectivity of metal nitrides and metal oxides

Номер: US20120214306A1
Автор: Kevin R. Shea
Принадлежит: Micron Technology Inc

Methods for etching metal nitrides and metal oxides include using ultradilute HF solutions and buffered, low-pH HF solutions containing a minimal amount of the hydrofluoric acid species H 2 F 2 . The etchant can be used to selectively remove metal nitride layers relative to doped or undoped oxides, tungsten, polysilicon, and titanium nitride. A method is provided for producing an isolated capacitor, which can be used in a dynamic random access memory cell array, on a substrate using sacrificial layers selectively removed to expose outer surfaces of the bottom electrode.

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Номер записи: 8
25-10-2012 дата публикации

Polycrystalline texturing composition and method

Номер: US20120267627A1
Автор: Corey OCONNOR, Robert K. Barr
Принадлежит: Rohm and Haas Electronic Materials LLC

An aqueous acidic composition which includes alkaline compounds, fluoride ions and oxidizing agents is provided for texturing polycrystalline semiconductors. Methods for texturing are also disclosed. The textured polycrystalline semiconductors have reduced reflectance of light incidence.

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Номер записи: 9
22-11-2012 дата публикации

Method for determining the concentration of nitric acid

Номер: US20120292522A1
Автор: Hubert Reger
Принадлежит: RENA GMBH

The present invention relates to the field of wet chemical treatment of silicon substrates. The invention particularly relates to a method for the determination of the concentration of nitric acid in aqueous process solutions as being used for the treatment of substrates such as those made from silicon. The method is based on the determination of nitrate by means of UV spectroscopy/photometry with the aid of eliminating agents which effectively remove disturbing absorptions caused by other substances. Therein, the concentration of nitrate corresponds to that of nitric acid. According to the invention, a robust method is proposed by means of which the content of nitric acid in acid mixtures can be determined very precisely, and in fact likewise in fresh as well as in acid mixtures that have been used according to their intended purpose.

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Номер записи: 10
29-11-2012 дата публикации

Semiconductor structure with suppressed sti dishing effect at resistor region

Номер: US20120299115A1
Автор: Bao-Ru Young, Hak-Lay Chuang, Lee-Wee Teo, Ming Zhu
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A method includes forming a first isolation feature of a first width and a second isolation feature of a second width in a substrate, the first width being substantially greater than the second width; forming an implantation mask on the substrate, wherein the implantation mask covers the first isolation feature and exposes the second isolation feature; performing an ion implantation process to the substrate using the implantation mask; and thereafter performing an etching process to the substrate.

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Номер записи: 11
06-12-2012 дата публикации

Method of fabricating semiconductor devices

Номер: US20120309150A1
Автор: QIYANG He, YIYING Zhang
Принадлежит: Semiconductor Manufacturing International Beijing Corp

A method of fabricating a semiconductor device is provided. The method includes forming a gate having a first material on a substrate and a layer of a second material overlaying the gate. Sidewall spacers are formed on opposite sides of the gate. A characteristic of a portion of the substrate between adjacent sidewall spacers is changed using the layer of second material and the sidewall spacers as a mask. An isotropic wet etch process is performed to remove the substrate portion with a changed characteristic to form a recess in the substrate. An orientation selective wet etching process is performed on the recess to shape the inner walls of the recess into sigma-shape. Changing a substrate characteristic in conjunction with isotropic wet etching prevents the substrate from being damaged, and therefore can obtain defect free epitaxial SiGe growth performance.

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Номер записи: 12
17-01-2013 дата публикации

Substrate processing method and substrate processing apparatus

Номер: US20130014785A1
Автор: Masahiro Kimura, Masayuki Otsuji
Принадлежит: Dainippon Screen Manufacturing Co Ltd

A substrate processing method includes a removing step of removing unwanted matter from a substrate and a vaporizing step performed in parallel to the removing step. In the removing step, an HF vapor that contains hydrogen fluoride and a solvent vapor that contains a solvent capable of dissolving water and having a lower boiling point than water is supplied onto the substrate to etch and remove the unwanted matter. In the vaporizing step, the solvent on the substrate is vaporized.

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Номер записи: 13
07-02-2013 дата публикации

Chemical dispersion method and device

Номер: US20130034966A1
Автор: Chi-Ming Yang, Chi-Wen Liu, Chin-Hsiang Lin, Kuo-Sheng Chuang, Ming-Hsi Yeh, Ying-Hsueh Chang Chien
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A method of semiconductor fabrication including providing a semiconductor wafer and dispensing a first chemical spray onto the wafer using a first nozzle and dispensing a second chemical spray using a second nozzle onto the wafer. These dispensing may be performed simultaneously. The method may further include moving the first and second nozzle. The first and second nozzle may provide the first and second chemical spray having at least one different property. For example, different chemical compositions, concentrations, temperatures, angles of dispensing, or flow rate. A chemical dispersion apparatus providing two nozzles which are operable to be separately controlled is also provided.

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Номер записи: 14
02-05-2013 дата публикации

PLASMA REACTOR WITH CHAMBER WALL TEMPERATURE CONTROL

Номер: US20130105085A1
Автор: Agarwal Ankur, BANNA SAMER, BERA KALLOL, LUBOMIRSKY DMITRY, NGUYEN ANDREW, SALINAS MARTIN JEFFREY, TODOROW VALENTIN, YOUSIF IMAD
Принадлежит: Applied Materials, Inc.

Apparatus for processing substrates are provided herein. In some embodiments, an apparatus includes a first conductive body disposed about a substrate support in the inner volume of a process chamber; a first conductive ring having an inner edge coupled to a first end of the second conductive body and having an outer edge disposed radially outward of the inner edge; a second conductive body coupled to the outer edge of the first conductive ring and having at least a portion disposed above the first conductive ring, wherein the first conductive ring and the at least a portion of the second conductive body partially define a first region above the first conductive ring; and a heater configured to heat the first conductive body, the second conductive body, and the first conductive ring. 1. An apparatus , comprising:a first conductive body disposed about a substrate support in the inner volume of a process chamber;a first conductive ring having an inner edge coupled to a first end of the first conductive body and having an outer edge disposed radially outward of the inner edge;a second conductive body coupled to the outer edge of the first conductive ring and having at least a portion disposed above the first conductive ring, wherein the first conductive ring and the at least a portion of the second conductive body partially define a first region above the first conductive ring; anda heater configured to heat the first conductive body, the second conductive body, and the first conductive ring.2. The apparatus of claim 1 , further comprising:a third conductive body coupled to a second end of the first conductive body opposing the first end, wherein the third conductive body, the first conductive ring, and the first conductive body partially define a second region disposed below the first region.3. The apparatus of claim 2 , wherein the first conductive ring further comprises:a plurality of openings disposed through the first conductive ring to fluidly couple the first ...

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Номер записи: 15
02-05-2013 дата публикации

Multilayer Construction

Номер: US20130109183A1
Автор: Ballen Todd A., Haase Michael A., Smith Terry L., Zhang Jun-Ying
Принадлежит: 3M INNOVATIVE PROPERTIES COMPANY

A multilayer construction is disclosed. The multilayer construction includes a -II-VI semiconductor layer ()x and a SiNlayer () disposed directly on the II-VI semiconductor layer. To improve the adhesion of the SiN layer () a native oxide on the II-VI semiconductor layer is removed. 135-. (canceled)36. A method of fabricating a multilayer construction comprising the steps of:(a) providing a II-VI semiconductor layer comprising a native oxide layer at a first major surface of the II-VI semiconductor layer;(b) removing the native oxide layer; and{'sub': 3', '4, '(c) depositing an SiNlayer directly on the first major surface of the II-VI semiconductor layer.'}37. The method of claim 36 , wherein step (b) comprises an ion milling of the native oxide layer.38. The method of claim 36 , wherein step (b) comprises a reactive ion etching of the native oxide layer.39. The method of claim 36 , wherein step (b) comprises an inductive coupled plasma reactive ion etching of the native oxide layer.40. The method of claim 36 , wherein step (b) comprises a chemically assisted ion beam etching of the native oxide layer.41. The method of claim 36 , wherein step (b) comprises a sputter etching of the native oxide layer.42. The method of claim 36 , further comprising the step of: (d) depositing an oxide layer directly on the SiNlayer.4351-. (canceled)52. The method of claim 42 , wherein steps (a) through (d) are carried out sequentially.53. The method of further comprising the step of: (e) depositing an adhesive layer directly on the oxide layer.54. The method of claim 53 , wherein steps (a) through (e) are carried out sequentially.55. The method of claim 53 , wherein the adhesive layer comprises silicone.56. The method of further comprising the step of: (f) removing contaminants from the first major surface of the II-VI semiconductor layer.57. The method of claim 56 , wherein steps (a) through (f) are carried out sequentially.58. The method of further comprising the step of: (f) ...

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Номер записи: 16
02-05-2013 дата публикации

METHOD TO PREPARE SEMI-CONDUCTOR DEVICE COMPRISING A SELECTIVE ETCHING OF A SILICIUM-GERMANIUM LAYER

Номер: US20130109191A1
Автор: Grenouillet Laurent, Le Tiec Yannick, Posseme Nicolas, Vinet Maud
Принадлежит: Commissariat A L'Energie Atomique Et Aux Energies Alternatives

The present invention relates to a method for manufacturing a semiconductor device by wet-process chemical etching, the device comprising at least one layer of silicon (Si) and at least one layer of silicon-germanium (SiGe) and at least one layer of photosensitive resin forming a mask partly covering the layer of silicon-germanium (SiGe) and leaving the layer of silicon-germanium uncovered in certain zones, characterized in that it comprises a step of preparation of an etching solution, having a pH between 3 and 6, from hydrofluoric acid (HF), hydrogen peroxide (HO), acetic acid (CHCOOH) and ammonia (NHOH), and a step of stripping of the layer of silicon-germanium (SiGe) at least at the said zones by exposure to the said etching solution. 1272828. A method for manufacturing a semiconductor device by wet-process chemical etching , the device comprising at least one layer of silicon (Si) and at least one layer of silicon-germanium (SiGe) () and at least one layer of photosensitive resin () forming a mask partly covering the layer of silicon-germanium (SiGe) () and leaving the layer of silicon-germanium uncovered in certain zones () , characterized in that it comprises a step of preparation of an etching solution , having a pH between 3 and 6 , from hydrofluoric acid (HF) , hydrogen peroxide (HO) , acetic acid (CHCOOH) and ammonia (NHOH) , and a step of stripping of the layer of silicon-germanium (SiGe) () at least at the said zones () by exposure to the said etching solution.2. A method according to the preceding claim , wherein the pH of the etching solution is between 3.5 and 4.3. A method according to any one of the preceding claims , wherein the etching solution is prepared from 49% hydrofluoric acid (HF) , hydrogen peroxide (HO) , 100% acetic acid (CHCOOH) and 28% ammonia (NHOH) in respective ratios of 1/2/3/4 by volume.4. A method according to any one of the preceding claims , wherein the etching solution is diluted in deionized water by a factor of 5 to 500 in ...

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Номер записи: 17
09-05-2013 дата публикации

METHOD OF FORMING WIDE TRENCHES USING A SACRIFICIAL SILICON SLAB

Номер: US20130115775A1
Автор: OBrien Gary
Принадлежит: ROBERT BOSCH GMBH

A method of forming an encapsulated wide trench includes providing a silicon on oxide insulator (SOI) wafer, defining a first side of a first sacrificial silicon slab by etching a first trench in a silicon layer of the SOI wafer, defining a second side of the first sacrificial silicon slab by etching a second trench in the silicon layer, forming a first sacrificial oxide portion in the first trench, forming a second sacrificial oxide portion in the second trench, forming a polysilicon layer above the first sacrificial oxide portion and the second sacrificial oxide portion, and etching the first sacrificial oxide portion and the second sacrificial oxide portion. 1. A method of forming an encapsulated wide trench comprising:providing a silicon on oxide insulator (SOI) wafer;defining a first side of a first sacrificial silicon slab by etching a first trench in a silicon layer of the SOI wafer;defining a second side of the first sacrificial silicon slab by etching a second trench in the silicon layer;forming a first sacrificial oxide portion in the first trench;forming a second sacrificial oxide portion in the second trench;forming a polysilicon layer above the first sacrificial oxide portion and the second sacrificial oxide portion; andetching the first sacrificial oxide portion and the second sacrificial oxide portion.2. The method of claim 1 , wherein forming a first sacrificial oxide portion comprises:oxidizing at least a portion of the first sacrificial slab.3. The method of claim 2 , further comprising:forming an oxide layer on an upper surface of the first sacrificial oxide portion.4. The method of claim 1 , further comprising:etching the first sacrificial slab to expose opposing sides of the first sacrificial oxide portion and the second sacrificial oxide portion;forming a third sacrificial oxide portion between the exposed opposing sides of the first sacrificial oxide portion and the second sacrificial oxide portion; andetching the third sacrificial oxide ...

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Номер записи: 18
09-05-2013 дата публикации

PROCESS FOR REMOVING MATERIAL FROM SUBSTRATES

Номер: US20130115782A1
Автор: Christenson Kurt Karl, Hanestad Ronald J., Ruether Patricia Ann, Wagener Thomas J.
Принадлежит: TEL FSI, Inc.

A method of removing materials, and preferably photoresist, from a substrate comprises dispensing a liquid sulfuric acid composition comprising sulfuric acid and/or its desiccating species and precursors and having a water/sulfuric acid molar ratio of no greater than 5:1 onto an material coated substrate in an amount effective to substantially uniformly coat the material coated substrate. The substrate is preferably heated to a temperature of at least about 90° C., either before, during or after dispensing of the liquid sulfuric acid composition. After the substrate is at a temperature of at least about 90° C., the liquid sulfuric acid composition is exposed to water vapor in an amount effective to increase the temperature of the liquid sulfuric acid composition above the temperature of the liquid sulfuric acid composition prior to exposure to the water vapor. The substrate is then preferably rinsed to remove the material. 1. A method for varying direction of a spray of a liquid from a three orifice nozzle , comprising the steps of i) a first orifice provided with liquid from a liquid source under sufficient pressure to eject a stream of liquid therefrom;', 'ii) a first gas orifice provided with a gas from a gas source, the gas being provided at a regulated pressure to eject a stream of gas from the first gas orifice to at least partially deflect the stream of liquid;', 'iii) a second gas orifice provided with a second gas from a second gas source, the gas being provided at a regulated pressure to eject a stream of gas from the second gas orifice to at least partially deflect the stream of liquid; and, 'a) providing a nozzle having'}b) adjusting the spray direction of liquid from the nozzle by modifying the flow of the gas streams of at least one of the first gas orifice and the second gas orifice to impart a direction to the stream of liquid from the central orifice.2. The method of claim 1 , wherein the spray direction of liquid from the nozzle is changed during a ...

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Номер записи: 19
16-05-2013 дата публикации

ETCHING APPARATUS

Номер: US20130118688A1
Автор: NISHINO Masaru, Tahara Shigeru
Принадлежит: TOKYO ELECTRON LIMITED

When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion. 1. An etching apparatus for performing etching an etching target film of a substrate by using a processing gas which is a gaseous mixture including a first gas containing halogen and carbon and having a carbon number of two or less per molecule and a second gas containing halogen and carbon and having a carbon number of three or more per molecule , the etching apparatus comprising:a processing chamber in which a susceptor for mounting the substrate thereon is disposed;a gas supply unit, disposed in the processing chamber to face the susceptor, for supplying the processing gas, the gas supply unit having a gas supply surface facing the susceptor;a first gas introduction line connected to a central portion of the gas supply unit for supplying the processing gas to the central portion of the gas supply unit;a second gas introduction line connected to a peripheral portion of the gas supply unit for supplying the processing gas to the peripheral portion of the gas supply unit;a first flow rate control unit disposed at the first gas introduction line;a second flow rate control unit disposed at the second gas introduction line;means for controlling a pressure inside the processing chamber;means for ...

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Номер записи: 20
16-05-2013 дата публикации

METHOD OF FABRICATING STRUCTURED PARTICLES COMPOSED OF SILICON OR SILICON-BASED MATERIAL AND THEIR USE IN LITHIUM RECHARGEABLE BATTERIES

Номер: US20130122717A1
Автор: Green Mino, Jiang Yuxiong, Liu Feng-Ming, Mills-Lamptey Benjamin Odarkwei, Stevens Valerie Elizabeth Dawn
Принадлежит: Nexeon Limited

A method for treating silicon to form pillars, especially for use as the active anode material in Li-ion batteries, is disclosed. The process is simple to operate on a commercial scale since it uses a solution containing only a small number of ingredients whose concentration needs to be controlled and it can be cheaper to operate than previous processes. The solution includes: 0.01 to 5M HF 0.002 to 0.2M of metal ions capable of nucleating on and forming a porous layer comprising regions of elemental metal on the silicon surface; 0.001 to 0.7M of an oxidant selected from the group O, O, HO, the acid, ammonium or alkali metal salt of NO, SO, NO, BO and ClO or a mixture thereof. The treated silicon is suitably removed from the solution. 1. A process for treating silicon comprising the steps of exposing silicon containing material to a solution comprising:0.01 to 5M HF0.002 to 0.2M of metal ions capable of nucleating on and forming a porous layer comprising regions of elemental metal on the silicon surface;{'sub': 2', '3', '2', '2', '3', '2', '8', '2', '4', '7', '4, 'sup': −', '2−', '−', '2−', '−, '0.001 to 0.7M of an oxidant selected from the group O, O, HO, the acid, ammonium or alkali metal salt of NO, SO, NO, BO and ClO or a mixture thereof.'}2. A process according to claim 1 , wherein the metal ions are selected from the group silver claim 1 , gold claim 1 , platinum claim 1 , copper claim 1 , nickel claim 1 , lead claim 1 , cobalt claim 1 , cadmium claim 1 , chromium claim 1 , zinc and tin.3. A process according to claim 2 , wherein the metal ion is a silver ion (Ag).4. A process according to or claim 2 , wherein the oxidant is selected from the group O claim 2 , O claim 2 , HOand the acid claim 2 , ammonium or alkali metal salt of NO.5. A process according to claim 4 , wherein the oxidant is NO.6. A process according to any one of the preceding claims claim 4 , which further comprises the step of adding further oxidant to the treating solution to maintain the ...

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Номер записи: 21
23-05-2013 дата публикации

COMPOSITION FOR REMOVAL OF NICKEL-PLATINUM ALLOY-BASED METALS

Номер: US20130130500A1
Автор: Saito Yasuo, SATO Fuyuki
Принадлежит: SHOWA DENKO K.K.

A composition for the removal of nickel-platinum alloy metal, said composition being characterised by including 3-55 mass % of at least one kind selected from the group consisting of hydrochloric acid, hydrobromic acid, and nitric acid, 0.5-20 mass % of a chelating agent other than oxalic acid, 0.1-4 mass % of an anionic surfactant, and water; and also characterised by not including fluorine-containing compounds or hydrogen peroxide, and having a pH of 1 or less. Nickel-platinum alloy metal can be selectively removed without damaging silicon substrate material. 1. A composition for removal of nickel-platinum alloy-based metals , comprising at least one compound selected from the group consisting of hydrochloric acid , hydrobromic acid and nitric acid at 3 to 55 mass % , a chelating agent other than oxalic acid at 0.5 to 20 mass % , an anionic surfactant at 0.1 to 4 mass % and water , while comprising no fluorine-containing compound or hydrogen peroxide , and having a pH of not greater than 1.2. The composition for removal of nickel-platinum alloy-based metals according to claim 1 , which consists of at least one compound selected from the group consisting of hydrochloric acid claim 1 , hydrobromic acid and nitric acid claim 1 , a chelating agent other than oxalic acid claim 1 , an anionic surfactant and water.3. The composition for removal of nickel-platinum alloy-based metals according to claim 1 , wherein the chelating agent is at least one selected from the group consisting of citric acid claim 1 , ethylenediaminetetraacetic acid claim 1 , catechol claim 1 , acetylacetone and their salts.4. The composition for removal of nickel-platinum alloy-based metals according to claim 1 , wherein the anionic surfactant is at least one selected from the group consisting of sulfuric acid esters claim 1 , sulfonic acids claim 1 , carboxylic acids and phosphoric acid esters claim 1 , each having C8-20 straight-chain alkyl groups claim 1 , and their derivatives and salts.5. The ...

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Номер записи: 22
23-05-2013 дата публикации

Method for the purification of fluorine

Номер: US20130130505A1
Автор: Diana Oliviero, Morelle Philippe, Paganin Maurizio, Predikant Peter M., Sommer Christoph
Принадлежит: SOLVAY SA

Elemental fluorine is often manufactured electrochemically from a solution of KF in hydrogen fluoride and contains varying amounts of entrained electrolyte salt in solid form as impurity. The invention concerns a process for the purification of such impure elemental fluorine by contact with liquid hydrogen fluoride, e.g., in a jet gas scrubber or by bubbling the raw fluorine through liquid hydrogen fluoride. After this purification step, any entrained hydrogen fluoride is removed by adsorption, condensing it out or both. After passing through a filter with very small pores, the purified fluorine is especially suited for the semiconductor industry as etching gas or as chamber cleaning gas in the manufacture of semiconductors, TFTs and solar cells, or for the manufacture of micro-electromechanical systems (“MEMS”). 1. A process for the manufacture of purified fluorine wherein , comprising subjecting fluorine which contains solid impurities to a solid-removing treatment wherein the solid-removing treatment comprises at least one step of contacting the fluorine with liquid hydrogen fluoride; subsequently subjecting the fluorine to a purification treatment comprising at least one step of removing hydrogen fluoride from the fluorine after contact with liquid hydrogen fluoride; and optionally , subjecting the fluorine to a step of contacting said fluorine with an adsorbent for HF; and optionally , subjecting the fluorine to a step of passing said fluorine through a particle filter for the removal of entrained solids.2. The process of claim 1 , wherein claim 1 , in the solid-removing treatment claim 1 , the fluorine is contacted with liquid hydrogen fluoride in a jet gas scrubber.3. The process of claim 1 , wherein claim 1 , in the solid-removing treatment claim 1 , the fluorine is contacted with liquid HF by bubbling said fluorine through liquid HF in a vessel.4. The process of claim 1 , wherein the at least one step of removing hydrogen fluoride is a low temperature ...

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Номер записи: 23
23-05-2013 дата публикации

Compositions and Methods for Texturing of Silicon Wafers

Номер: US20130130508A1
Автор: RAO Madhukar Bhaskara, Tamboli Dnyanesh Chandrakant, WU Aiping
Принадлежит: AIR PRODUCTS AND CHEMICALS, INC.

Texturing composition for texturing silicon wafers having one or more surfactants. Methods of texturing silicon wafers having the step of wetting said wafer with a texturing composition having one or more surfactants. 1. A texturing composition for texturing silicon wafers comprising one or more acids , one or more anionic sulfur-containing surfactants and water.2. The texturing composition of wherein said one or more anionic sulfur-containing surfactants is selected from the group consisting of linear alkylbenzenesulfonates (LAS) claim 1 , secondary alkylbenzenesulfonate claim 1 , lignin sulfonates claim 1 , N-acyl-N-alkyltaurates claim 1 , fatty alcohol sulfates (FAS) claim 1 , petroleum sulfonates claim 1 , secondary alkanesulfonates (SAS) claim 1 , paraffin sulfonates claim 1 , fatty alcohol ether sulfates (FAES) claim 1 , α-Olefin sulfonates claim 1 , sulfosuccinate esters claim 1 , alkylnapthalenesulfonates claim 1 , isethionates claim 1 , sulfuric acid esters claim 1 , sulfated linear primary alcohols claim 1 , sulfated polyoxyethylenated straight chain alcohols claim 1 , sulfated triglyceride oils and mixtures thereof.3. The texturing composition of wherein said one or more anionic sulfur-containing surfactants is selected from the group consisting of secondary alkanesulfonate sodium salts claim 1 , diphenyl oxide disulfonic acids and ether sulfates.4. The texturing composition of wherein said texturing composition comprises hydrofluoric acid.5. The texturing composition of wherein said texturing composition comprises nitric acid and hydrofluoric acid.7. The texturing composition of wherein said one or more acids comprise one or more selected from the group consisting of phosphoric acid claim 1 , sulfuric acid or a water-soluble carboxylic acid claim 1 , for example acetic acid claim 1 , propionic acid claim 1 , butyric acid claim 1 , valeric acid claim 1 , caproic acid claim 1 , tartaric acid claim 1 , succinic acid claim 1 , adipic acid claim 1 , propane- ...

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Номер записи: 24
30-05-2013 дата публикации

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS

Номер: US20130137272A1
Автор: ISHIBASHI Kiyohisa, MORIYA Atsushi
Принадлежит: HITACHI KOKUSAI ELECTRIC INC.

A method of manufacturing a semiconductor device, includes supplying a first etching gas and a second etching gas having a decomposition rate lower than that of the first etching gas from one end of a substrate accommodating region in a process chamber where a plurality of substrates are stacked while exhausting an inside of a process chamber from other end of the substrate accommodating region; and etching a first portion of the plurality of substrate at the one end of the substrate accommodating region using a portion of radicals generated from the first etching gas and second etching gas, and etching a second portion of the plurality of substrates at the other end of the substrate accommodating region using at least a portion of a remaining radicals of the radicals generated from the first etching gas and second etching gas. 1. A method of manufacturing a semiconductor device , comprising:supplying a first etching gas and a second etching gas having a decomposition rate lower than that of the first etching gas from one end of a substrate accommodating region in a process chamber where a plurality of substrates are stacked while exhausting an inside of a process chamber from other end of the substrate accommodating region; andetching a first portion of the plurality of substrate at the one end of the substrate accommodating region using a portion of radicals generated from the first etching gas and second etching gas, and etching a second portion of the plurality of substrates at the other end of the substrate accommodating region using at least a portion of a remaining radicals of the radicals generated from the first etching gas and second etching gas.2. The method of claim 1 , wherein the first etching gas comprises a chlorine gas claim 1 , and the second etching gas comprises a hydrogen chloride gas.3. The method of claim 2 , wherein claim 2 , when the plurality of substrates are etched claim 2 , an amount of the chlorine gas supplied from the one end of the ...

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Номер записи: 25
06-06-2013 дата публикации

METHODS FOR FORMING SEMICONDUCTOR STRUCTURES USING SELECTIVELY-FORMED SIDEWALL SPACERS

Номер: US20130143409A1
Автор: JOHNSON Frank Scott
Принадлежит: GLOBALFOUNDRIES INC.

Methods for forming semiconductor structures using selectively-formed sidewall spacers are provided. One method comprises forming a first structure and a second structure. The second structure has a height that is greater than the first structure's height. A first sidewall spacer-forming material is deposited overlying the first structure and the second structure. A second sidewall spacer-forming material is deposited overlying the first sidewall spacer-forming material. A composite spacer is formed about the second structure, the composite spacer comprising the first sidewall spacer-forming material and the second sidewall spacer-forming material. The second sidewall spacer-forming material is removed from the first structure and the first sidewall spacer-forming material is removed from the first structure. 1. A method for forming a semiconductor structure , the method comprising the steps of:forming a first structure overlying a semiconductor substrate, wherein the first structure has a first height;forming a second structure overlying the semiconductor substrate, wherein the second structure has a second height and wherein the second height is greater than the first height;depositing a first sidewall spacer-forming material overlying the first structure and the second structure;depositing a second sidewall spacer-forming material overlying the first sidewall spacer-forming material, wherein the second sidewall spacer-forming material has an etch rate when subjected to an etchant that is different from an etch rate of the first sidewall spacer-forming material when subjected to the same etchant;forming a composite spacer about the second structure, the composite spacer comprising the first sidewall spacer-forming material and the second sidewall spacer-forming material;at least substantially removing the second sidewall spacer-forming material from the first structure; andat least substantially removing the first sidewall spacer-forming material from the first ...

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Номер записи: 26
13-06-2013 дата публикации

ETCHANT FOR CONTROLLED ETCHING OF GE AND GE-RICH SILICON GERMANIUM ALLOYS

Номер: US20130146805A1
Автор: Bedell Stephen W., Daval Nicolas, Fogel Keith E.
Принадлежит:

The present disclosure provides a chemical etchant which is capable of removing Ge and Ge-rich SiGe alloys in a controlled manner. The chemical etchant of the present disclosure includes a mixture of a halogen-containing acid, hydrogen peroxide, and water. Water is present in the mixture in an amount of greater than 90% by volume of the entire mixture. The present disclosure also provides a method of making such a chemical etchant. The method includes mixing, in any order, a halogen-containing acid and hydrogen peroxide to provide a halogen-containing acid/hydrogen peroxide mixture, and adding water to the halogen-containing acid/hydrogen peroxide mixture. Also disclosed is a method of etching a Ge or Ge-rich SiGe alloy utilizing the chemical etchant of the present application. 1. A method of making a chemical etchant for etching of Ge or a Ge-rich SiGe alloy in a controlled manner , said method comprising:mixing, in any order, a halogen-containing acid and hydrogen peroxide to provide a halogen-containing acid/hydrogen peroxide mixture; andadding water to the halogen-containing acid/hydrogen peroxide mixture to provide a solution of the halogen-containing acid, hydrogen peroxide, and water, wherein the water is present in an amount of greater than 90% by volume of the total solution.2. The method of claim 1 , wherein said mixing comprises adding said halogen-containing acid to said hydrogen peroxide.3. The method of claim 1 , wherein said mixing comprises adding said hydrogen peroxide to said halogen-containing acid.4. The method of claim 1 , wherein said halogen-containing acid comprises hydrofluoric (HF) acid claim 1 , hydrochloric (HCl) acid claim 1 , hydrobromic (HBr) acid claim 1 , hydriodic (HI) acid claim 1 , or any mixtures thereof.5. The method of claim 1 , wherein said halogen-containing acid is hydrofluoric (HF) acid.6. The method of claim 1 , wherein said amount of water in said solution is greater than 98% by volume of the total solution.7. The method ...

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Номер записи: 27
13-06-2013 дата публикации

Method for forming buried bit line, semiconductor device having the same, and fabricating method thereof

Номер: US20130146958A1
Автор: Jin-Ki Jung, You-Song Kim
Принадлежит: Individual

A method for fabricating a semiconductor device includes: etching a semiconductor substrate and forming a plurality of bodies separated from one another by a plurality of trenches; forming a protective layer with open parts to expose both sidewalls of each of the bodies; forming buried bit lines in the bodies by silicidizing exposed portions of the bodies through the open parts; and forming a dielectric layer to gap-fill the trenches and define air gaps between adjacent buried bit lines.

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Номер записи: 28
20-06-2013 дата публикации

ETCHING COMPOSITION AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING THE SAME

Номер: US20130157427A1
Автор: CHO Sung-Hyuk, HAN Ji-Hye, Hong Kwon, Jung Chan-Keun, KIM Gyu-Hyun, LEE Jin-Uk, LIM Jung-Hun, PARK Hyung-Soon, PARK JAE-WAN
Принадлежит:

The present invention provides an etching composition, comprising a silyl phosphate compound, phosphoric acid and deionized water, and a method for fabricating a semiconductor, which includes an etching process employing the etching composition. The etching composition of the invention shows a high etching selectivity for a nitride film with respect to an oxide film. Thus, when the etching composition of the present invention is used to remove a nitride film, the effective field oxide height (EEH) may be easily controlled by controlling the etch rate of the oxide film. In addition, the deterioration in electrical characteristics caused by damage to an oxide film or etching of the oxide film may be prevented, and particle generation may be prevented, thereby ensuring the stability and reliability of the etching process. 2. The etching composition of claim 1 , wherein Ris selected from the group consisting of hydrogen claim 1 , (C-C)alkyl claim 1 , (C-C)alkenyl claim 1 , (C-C)cycloalkyl claim 1 , amino(C-C)alkyl claim 1 , and (C-C)alkyl substituted with one or more substituents selected from the group consisting of halogen claim 1 , phenyl and cyclohexene oxide.4. The etching composition of claim 1 , wherein the etching composition comprises 0.01-15 wt % of the silyl phosphate compound claim 1 , 70-99 wt % of phosphoric acid and a balance of deionized water.5. The etching composition of claim 1 , wherein the etching composition further comprises one or more additives selected from the group consisting of surfactants claim 1 , sequestering agents claim 1 , and anti-corrosive agents.6. The etching composition of claim 1 , wherein the etching composition is used for etching of a nitride film.7. A method for fabricating a semiconductor device claim 1 , the method comprising an etching process that is carried out using the etching composition of .8. The method of claim 7 , wherein the etching process comprises etching a nitride film.9. The method of claim 8 , wherein the ...

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Номер записи: 29
20-06-2013 дата публикации

SILICON NITRIDE FILMS FOR SEMICONDUCTOR DEVICE APPLICATIONS

Номер: US20130157466A1
Автор: "OLOUGHLIN Jennifer", ANTONELLI George Andrew, FOX Keith, Niu Dong, SRIRAM Mandyam, van Schravendijk Bart J., Womack Joseph L.
Принадлежит:

The embodiments herein relate to plasma-enhanced chemical vapor deposition methods and apparatus for depositing silicon nitride on a substrate. The disclosed methods provide silicon nitride films having wet etch rates (e.g., in dilute hydrofluoric acid or hot phosphoric acid) suitable for certain applications such as vertical memory devices. Further, the methods provide silicon nitride films having defined levels of internal stress suitable for the applications in question. These silicon nitride film characteristics can be set or tuned by controlling, for example, the composition and flow rates of the precursors, as well as the RF power supplied to the plasma and the pressure in the reactor. In certain embodiments, a boron-containing precursor is added. 1. A method for forming a silicon nitride film on a substrate in a plasma-enhanced chemical vapor deposition apparatus , the method comprising:flowing a silicon-containing reactant, a nitrogen-containing reactant, and a boron-containing reactant through the plasma-enhanced chemical vapor deposition apparatus containing the substrate, wherein the flowing is conducted such that the ratio of flow rates of the silicon-containing reactant to the nitrogen-containing reactant is about 0.02 or less;generating or maintaining a plasma in the plasma-enhanced chemical vapor deposition apparatus; anddepositing the silicon nitride film on the substrate.2. The method of claim 1 , wherein the silicon-containing reactant is selected from the group consisting of silane claim 1 , disilane claim 1 , trisilane or an alkyl silane.3. The method of claim 1 , wherein the nitrogen-containing reactant is selected from the group consisting of ammonia claim 1 , hydrazine or nitrogen.4. The method of claim 1 , wherein the boron-containing reactant is selected from the group consisting of diborane and trimethyl borate.5. The method of claim 4 , wherein the flowing is conducted by flowing diborane at a rate of about 4 to 15 sccm.6. The method of ...

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Номер записи: 30
27-06-2013 дата публикации

METHOD, APPARATUS FOR HOLDING AND TREATMENT OF A SUBSTRATE

Номер: US20130164939A1
Автор: Lackner Gerald, Maier Christian, Santos Rodriguez Francisco Javier
Принадлежит: INFINEON TECHNOLOGIES AG

Some embodiments discussed relates to an apparatus for holding a substrate, comprising a body with a surface for a semiconductor wafer to rest on, with the surface having a first surface area on which a first area of the semiconductor wafer can rest, and a second surface area on which a second area of the semiconductor wafer can rest, wherein the second surface area protrudes with respect to the first surface area. 1. A method comprising:placing a semiconductor wafer in contact with a substrate holder at a first location and a second location of the substrate holder, wherein the second location projects with respect to the first location; andprocessing the semiconductor wafer.2. The method of claim 1 , further comprising producing a reduced pressure between the semiconductor wafer and the substrate holder.3. The method of claim 1 , further comprising moving the second location with respect to the first location until the first location is in contact with the semiconductor wafer and the second location is in contact with the semiconductor wafer.4. The method of claim 1 , further comprising forcing the second location away from the first location.5. The method of claim 4 , wherein forcing the second location away from the first location further comprises forcing the second location away from the first location with springs.6. The method of claim 1 , further comprising pressing a contact needle in a direction of the semiconductor wafer.7. The method of claim 1 , further comprising pressing a plurality of contact needles in a direction of the semiconductor wafer.8. The method of claim 1 , wherein placing the semiconductor wafer in contact with the substrate holder further comprises placing the semiconductor wafer in contact with the substrate holder at a first surface area and a second surface area of the substrate holder claim 1 , wherein the second surface area projects with respect to the first surface area.9. The method of claim 1 , wherein processing the ...

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Номер записи: 31
04-07-2013 дата публикации

AQUEOUS ACIDIC SOLUTION AND ETCHING SOLUTION AND METHOD FOR TEXTURIZING THE SURFACE OF SINGLE CRYSTAL AND POLYCRYSTAL SILICON SUBSTRATES

Номер: US20130171765A1
Автор: Bittner Christian, Braun Simon, Klipp Andreas, LIN Chengwei, Roeger-Goepfert Cornelia, Shen MeiChin
Принадлежит: BASF SE

An aqueous acidic solution and an aqueous acidic etching solution suitable for texturizing the surface of single crystal and polycrystal silicon substrates, hydrofluoric acid; nitric acid; and at least one anionic polyether, which is surface active; a method for texturizing the surface of single crystal and polycrystal silicon substrates comprising the step of () contacting at least one major surface of a substrate with the said aqueous acidic etching solution; () etching the at least one major surface of the substrate for a time and at a temperature sufficient to obtain a surface texturization consisting of recesses and protrusions; and () removing the at least one major surface of the substrate from the contact with the aqueous acidic etching solution; and a method for manufacturing photovoltaic cells and solar cells using the said solution and the said texturizing method. 1. An aqueous acidic solution comprisinghydrofluoric acid;nitric acid; anda surface active anionic polyether.2. The aqueous acidic solution according to claim 1 , wherein the surface active anionic polyether is selected from the group consisting of a linear water soluble and water dispersible alkylene oxide homopolymer claim 1 , a branched water soluble and water dispersible alkylene oxide homopolymer claim 1 , a linear water soluble and water dispersible alkylene oxide copolymer claim 1 , a branched water soluble and water dispersible alkylene oxide copolymer claim 1 , and any mixture thereof;at least one end group of the linear alkylene oxide homopolymer or copolymer is an anionic group selected from the group consisting of a carboxylate group, a sulphate group, a sulfonate group, a phosphate group, a diphosphate group, a phosponate group, and a polyphosphate group; andan end group of at least one branch of the branched alkylene oxide homopolymer or copolymer is an anionic group selected from the group consisting of a carboxylate group, a sulphate group, a sulfonate group, a phosphate group, a ...

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Номер записи: 32
04-07-2013 дата публикации

METHOD AND APPARATUS FOR MANUFACTURING THREE-DIMENSIONAL-STRUCTURE MEMORY DEVICE

Номер: US20130171827A1
Автор: Cho Sung Kil, Jang Gil Sun, Kim Hai Won, Oh Wan Suk, Shin Seung Woo, Woo Sang Ho
Принадлежит: EUGENE TECHNOLOGY CO., LTD.

A method for manufacturing a memory device having a vertical structure according to one embodiment of the present invention comprises: a step for alternatingly laminating one or more insulation layers and one or more sacrificial layers on a substrate; a step for forming a penetration hole for penetrating the insulation layer and the sacrificial layer; a step for forming a pattern for filling up the penetration hole; a step for forming an opening for penetrating the insulation layer and the sacrificial layer; and a step for removing the sacrificial layer by supplying an etchant through the opening, wherein the step for laminating the insulation layer includes a step for depositing a first silicon oxide film by supplying to the substrate at least one gas selected from the group consisting of SiH, SiH, SiH, SiH, and the step for laminating the sacrificial layer includes a step for depositing a second silicon oxide film by supplying dichlorosilane (SiClH) to the substrate. 1. A method for manufacturing a semiconductor device having a 3-dimensional structure , the method comprising:alternately stacking at least one insulation layer and at least one sacrificial layer on a substrate;forming a through hole passing through the insulation layer and the sacrificial layer;forming a pattern filling the through hole;forming an opening passing through the insulation layer and the sacrificial layer; andsupplying an etchant through the opening to remove the sacrificial layer,{'sub': 4', '2', '6', '3', '8', '4', '10, 'wherein the stacking of the insulation layer comprises supplying at least one gas selected from the group comprising SiH, SiH, SiH, and SiHonto the substrate to deposit a first silicon oxide, and'}{'sub': 2', '2, 'the stacking of the sacrificial layer comprises supplying dichlorosilane (SiClH) onto the substrate to deposit a second silicon oxide.'}2. The method of claim 1 , wherein the insulation layer and the sacrificial layer have etch selectivity with respect to the ...

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Номер записи: 33
04-07-2013 дата публикации

SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD

Номер: US20130171831A1
Автор: Amano Yoshifumi, Fitrianto , Namba Hiromitsu, TOKUNAGA Yoichi
Принадлежит: TOKYO ELECTRON LIMITED

A substrate processing apparatus includes a substrate holding unit configured to hold a substrate; a first processing liquid nozzle configured to supply a first processing liquid to a peripheral portion of the substrate; a second processing liquid nozzle configured to supply a second processing liquid, the temperature of which is lower than that of the first processing liquid, to the peripheral portion of the substrate; a first gas supply port configured to supply a first gas at a first temperature to a first gas supplied place on the peripheral portion of the substrate; and a second gas supply port configured to supply a second gas at a second temperature lower than the first temperature to a place closer to the center in the radial direction as compared to the first gas supplied place with respect to the substrate. 1. A substrate processing apparatus comprising:a substrate holding unit configured to hold a substrate horizontally;a rotation driving unit configured to rotate the substrate holding unit;a first processing liquid nozzle configured to supply a first processing liquid to a peripheral portion of the substrate held by the substrate holding unit;a second processing liquid nozzle configured to supply a second processing liquid, the temperature of which is lower than that of the first processing liquid, to the peripheral portion of the substrate held by the substrate holding unit;a first gas supply port configured to supply a first gas at a first temperature to a first gas supplied place on the peripheral portion of the substrate held by the substrate holding unit; anda second gas supply port configured to supply a second gas at a second temperature lower than the first temperature to a place closer to the center in the radial direction as compared to the first gas supplied place with respect to the substrate held by the substrate holding unit.2. The substrate processing apparatus of claim 1 , further comprising a cover plate having a bottom surface opposite ...

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Номер записи: 34
11-07-2013 дата публикации

METHOD AND APPARATUS FOR MANUFACTURING THREE-DIMENSIONAL-STRUCTURE MEMORY DEVICE

Номер: US20130178066A1
Автор: Cho Sung Kil, Jang Gil Sun, Kim Hai Won, Oh Wan Suk, Shin Seung Woo, Woo Sang Ho
Принадлежит: EUGENE TECHNOLOGY CO., LTD.

Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH, SiH, SiH, and SiH, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH, SiH, SiH, SiH, and dichloro silane (SiClH), and ammonia-based gas, to deposit a silicon nitride layer. 1. A method of manufacturing a memory device having a 3-dimensional structure , the method comprising:alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate;forming a through hole passing through the dielectric layers and the sacrificial layers;forming a pattern filling the through hole;forming an opening passing through the dielectric layers and the sacrificial layers; andsupplying an etchant through the opening to remove the sacrificial layers,{'sub': 4', '2', '6', '3', '8', '4', '10, 'wherein the stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH, SiH, SiH, and SiH, to deposit a silicon oxide layer, and'}{'sub': 4', '2', '6', '3', '8', '4', '10', '2', '2, 'the stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH, SiH, SiH, SiH, and dichloro silane (SiClH), and ammonia-based gas, to deposit a silicon nitride layer.'}2. The method of claim 1 , ...

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Номер записи: 35
11-07-2013 дата публикации

Silicon etching fluid and method for producing transistor using same

Номер: US20130178069A1
Автор: Hiroshi Matsunaga, Kenji Shimada
Принадлежит: Mitsubishi Gas Chemical Co Inc

The present invention relates to a silicon etching solution which is used for selectively etching a dummy gate made of silicon in a process for producing a transistor including a laminate formed of at least a high dielectric material film and a metal gate containing hafnium, zirconium, titanium, tantalum or tungsten by the method of removing the dummy gate made of silicon to replace the dummy gate with the metal gate and which includes 0.1 to 40% by weight of at least one alkali compound selected from the group consisting of ammonia, a diamine and a polyamine represented by the general formula (1), 0.01 to 40% by weight of at least one polyhydric alcohol selected from the group consisting of specific polyhydric alcohols and a non-reducing sugar, and 40 to 99.89% by weight of water, and a process for producing a transistor using the silicon etching solution.

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Номер записи: 36
25-07-2013 дата публикации

Method of producing insulation trenches in a semiconductor on insulator substrate

Номер: US20130189825A1
Автор: Laurent Grenouillet, Maud Vinet, Yannick Le Tiec
Принадлежит: Commissariat a lEnergie Atomique et aux Energies Alternatives CEA

A method for producing one or plural trenches in a device comprising a substrate of the semiconductor on insulator type formed by a semiconductive support layer, an insulating layer resting on the support layer and a semiconductive layer resting on said insulating layer, the method comprising steps of: a) localised doping of a given portion of said insulating layer through an opening in a masking layer resting on the fine semiconductive layer, b) selective removal of said given doped area at the bottom of said opening.

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Номер записи: 37
01-08-2013 дата публикации

SEMICONDUCTOR SUBSTRATE HAVING DOT MARKS AND METHOD OF MANUFACTURING THE SAME

Номер: US20130193560A1
Автор: Usui Yukiya
Принадлежит: Panasonic Corporation

A semiconductor substrate having dot marks is provided. Particularly, a semiconductor substrate having dot marks having an improved reading rate is provided. In a semiconductor substrate having a plurality of dot marks formed of recess portions having an inverted frustum shape, the plurality of dot marks constitutes a two-dimensional code disposed in a rectangular region of 0.25 mmto 9 mm, the diameter W of the recess portion on the surface of the semiconductor substrate is 20 μm to 200 μm, is larger than the diameter w of the bottom surface of the recess portion, and is smaller than the thickness of the semiconductor substrate, the side surface of the recess portion has four or more trapezoidal flat taper surfaces, and the taper angle of the taper surface is in a range of 44° to 65° with respect to the surface of the semiconductor substrate. 1. A semiconductor substrate having a plurality of dot marks each formed of a recess portion having an inverted frustum shape ,{'sup': 2', '2, 'wherein the plurality of dot marks constitutes a two-dimensional code disposed in a rectangular region of 0.25 mmto 9 mm,'}a diameter W of the recess portion on a surface of the semiconductor substrate is 20 μm to 200 μm, is larger than a diameter w of a bottom surface of the recess portion, and is smaller than a thickness of the semiconductor substrate,a depth of the recess portion of the dot marks is smaller than the thickness of the semiconductor substrate,a side surface of the recess portion has four or more trapezoidal flat taper surfaces, and a taper angle of the taper surface is in a range of 44° to 65° with respect to the surface of the semiconductor substrate.2. The semiconductor substrate according to claim 1 ,wherein a shape of the recess portion on the surface of the semiconductor substrate is tetragonal, anda shape of the bottom surface of the recess portion is tetragonal or octagonal.3. The semiconductor substrate according to claim 1 ,wherein a shape of the recess portion ...

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Номер записи: 38
01-08-2013 дата публикации

PROCESSING METHOD

Номер: US20130196513A1
Автор: Kubota Akihisa, Touge Mutsumi
Принадлежит:

Disclosed is a processing method which can achieve a high processing rate, and is capable of making a surface smooth, In order to achieve this an SiC substrate is arranged in a potassium hydroxide solution containing hydrogen peroxide, and ultraviolent radiation is irradiated on the surface of the SiC substrate. An SiO2 layer is formed on the surface of the SiC substrate due to the irradiation of ultraviolet radiation, and this SiO2 layer is chemically removed by means of the potassium hydroxide solution, and also removed by a synthetic quartz surface plate 1. A processing method comprises a step in which , on a surface of a work piece arranged in an alkaline solution , ultraviolet light having energy greater than a bandgap of the work piece is irradiated , and also in a state that a processing member comprising a synthetic quartz , or sapphire is kept in contact with the surface of the work piece on which the ultraviolet light has been irradiated , the work piece and the processing member are subjected to relative displacement , and wherein the ultraviolet light is irradiated at the work piece via the processing member.23.-. (canceled)4. The processing method according to claim 1 , wherein the alkaline solution comprises at least one of a potassium hydroxide solution claim 1 , a sodium hydroxide solution claim 1 , an alkaline electrolyte and a calcium hydroxide solution.5. The processing method according to claim 4 , wherein the work piece comprises any one of silicon carbide claim 4 , silicon nitride claim 4 , GaN claim 4 , diamond claim 4 , sapphire and AlN.6. The processing method according to claim 1 , wherein the work piece comprises any one of silicon carbide claim 1 , silicon nitride claim 1 , GaN claim 1 , diamond claim 1 , sapphire and AlN. The present invention relates to a processing method, more particularly; to a processing method which is capable of processing highly efficiently and accurately a surface of a high-performance material difficult in ...

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Номер записи: 39
08-08-2013 дата публикации

METHOD OF FORMING NANOGAP PATTERN, BIOSENSOR HAVING THE NANOGAP PATTERN, AND METHOD OF MANUFACTURING THE BIOSENSOR

Номер: US20130200437A1
Автор: Rha Kwan Goo
Принадлежит: MICOBIOMED CO., LTD.

Provided is a method of forming a nanogap pattern of a biosensor. First, an oxide layer is formed on a substrate and a first nitride layer is formed on the oxide layer. The first nitride layer is partially etched to form a first nitride layer pattern having a first gap that gradually narrows from a top portion to a bottom portion thereof and exposes the oxide layer. A second nitride layer is formed along the first nitride layer and along sidewalls and a bottom surface of the first gap. The second nitride layer is etched to form a second nitride layer pattern having a second gap narrower than the first gap on the sidewalls of the first gap. The oxide layer is etched by using the second nitride layer pattern as an etching mask to form an oxide layer pattern having a third gap, and thus, the nanogap pattern is completed. 1. A method of forming a nanogap pattern , the method comprising:forming an oxide layer on a substrate;forming a first nitride layer on the oxide layer;partially etching the first nitride layer to form a first nitride layer pattern having a first gap that exposes the oxide layer and gradually narrows from a top portion to a bottom portion thereof;forming a second nitride layer along the first nitride layer and along sidewalls and a bottom surface of the first gap; andetching the second nitride layer to form a second nitride layer pattern having a second gap narrower than the first gap on the sidewalls of the first gap.2. The method of claim 1 , further comprising etching the oxide layer by using the second nitride layer pattern as an etching mask to form an oxide layer pattern having a third gap.3. The method of claim 2 , wherein the first gap has a micron size claim 2 , and the second gap and the third gap each have a nano size.4. The method of claim 1 , wherein an inclination angle of the first gap is in a range of 15 degrees to 75 degrees.5. A biosensor comprising:a substrate;a nanogap pattern including an oxide layer pattern disposed on the ...

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Номер записи: 40
08-08-2013 дата публикации

METHODS AND APPARATUS FOR LITHOGRAPHY USING A RESIST ARRAY

Номер: US20130200498A1
Автор: Mangan Shmuel
Принадлежит: Applied Materials, Inc.

Methods, apparatus, and systems are provided for forming a resist array on a material to be patterned. The resist array may include an arrangement of two different materials that are adapted to react to activation energy differently relative to each other to enable selective removal of only one of the materials (e.g., one is reactive and the other is not reactive; one is slightly reactive and the other is very reactive; one is reactive in one domain and the other in an opposite domain). The first material may be disposed as isolated nodes between the second material. A subset of nodes may be selected from among the nodes in the array and the selected nodes may be exposed to activation energy to activate the nodes and create a mask from the resist array. Numerous additional aspects are disclosed. 1. A method for patterning material on a substrate , the method comprising:forming a resist array on the material to be patterned, the resist array including an arrangement of a first material and a second material, the first material being disposed as isolated nodes between the second material, wherein the first and second materials are adapted to react to activation energy differently relative to each other to enable selective removal of one of the first and second materials;selecting a subset of nodes from among the nodes in the array; andexposing the selected nodes to activation energy to activate the nodes and create a mask from the resist array.2. The method of further comprising etching the material to be patterned using the mask created from the resist array.3. The method of wherein one of the first and second materials is a chemically amplified resist.4. The method of wherein one of the first and second materials is a non-chemically amplified resist.5. The method of wherein one of the first and second materials is a resist claim 1 , and wherein a chemical amplifier is added to the resist after a phase separation occurs.6. The method of wherein one of the first and ...

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Номер записи: 41
08-08-2013 дата публикации

Methods for pfet fabrication using apm solutions

Номер: US20130203244A1
Автор: Berthold Reimer, Joanna WASYLUK, Kai Tern Sih, Richard J. Carter, Stephan Kronholz, Yew-Tuck Chow
Принадлежит: Globalfoundries Inc

A method for fabricating an integrated circuit is disclosed that includes, in accordance with an embodiment, providing an integrated circuit comprising a p-type field effect transistor (pFET), recessing a surface region of the pFET using an ammonia-hydrogen peroxide-water (APM) solution to form a recessed pFET surface region, and depositing a silicon-based material channel on the recessed pFET surface region.

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Номер записи: 42
08-08-2013 дата публикации

Process for Silicon Nitride Removal Selective to SiGex

Номер: US20130203262A1
Автор: Butterbaugh Jeffery W., Ratkovich Anthony S.
Принадлежит: TEL FSI, Inc.

A method for selectively removing silicon nitride is described. In particular, the method includes providing a substrate having a surface with silicon nitride exposed on at least one portion of the surface and SiGe(x is greater than or equal to zero) exposed on at least another portion of the surface, and dispensing an oxidizing agent onto the surface of the substrate to oxidize the exposed SiGe. Thereafter, the method includes dispensing a silicon nitride etching agent as a liquid stream onto the surface of the substrate to remove at least a portion of the silicon nitride. 1. A method for selectively removing silicon nitride , comprising:{'sub': 'x', 'providing a substrate having a surface with silicon nitride exposed on at least one portion of said surface and SiGe, wherein x is greater than or equal to zero, exposed on at least another portion of said surface;'}{'sub': 'x', 'dispensing an oxidizing agent onto said surface of said substrate to oxidize said exposed SiGe; and'}following said dispensing said oxidizing agent, dispensing a silicon nitride etching agent as a liquid stream onto said surface of said substrate to remove at least a portion of said silicon nitride.2. The method of claim 1 , further comprising:prior to dispensing a silicon nitride etching agent, dispensing a heating agent onto said surface of said substrate to pre-heat said substrate to a target temperature.3. The method of claim 2 , wherein said target temperature exceeds 150 degrees C.4. The method of claim 2 , wherein said dispensing said oxidizing agent and dispensing said heating agent are performed simultaneously.5. The method of claim 1 , wherein said dispensing said oxidizing agent includes exposing said substrate to a mixture containing sulfuric acid and hydrogen peroxide.6. The method of claim 5 , wherein said sulfuric acid is heated to a temperature in excess of 150 degrees C.7. The method of claim 5 , wherein said sulfuric acid is heated to a temperature in excess of 200 degrees C ...

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Номер записи: 43
08-08-2013 дата публикации

SILICON ETCHANT AND METHOD FOR PRODUCING TRANSISTOR BY USING SAME

Номер: US20130203263A1
Автор: Matsunaga Hiroshi, SHIMADA Kenji
Принадлежит: MITSUBISHI GAS CHEMICAL COMPANY, INC.

According to the present invention, there is provided an etching solution used for selectively etching a dummy gate made of silicon in a process for producing a transistor including a laminate formed of at least a high dielectric material film and an aluminum metal gate by the method of removing the dummy gate made of silicon to replace the dummy gate with the aluminum metal gate, and a process for producing a transistor using the etching solution. The present invention relates to a silicon etching solution used for etching the dummy gate made of silicon which includes 0.1 to 40% by weight of at least one alkali compound selected from the group consisting of ammonia, a diamine and a polyamine represented by the general formula (1), 5 to 50% by weight of at least one polyhydric alcohol represented by the general formula (2) and 40 to 94.9% by weight of water, and a process for producing a transistor using the silicon etching solution. 1. A silicon etching solution for etching a dummy gate made of silicon in a process for producing a transistor using a structural body comprising a substrate , and a dummy gate laminate formed by laminating at least a high dielectric material film and the dummy gate made of silicon , a side wall disposed to cover a side surface of the laminate and an interlayer insulating film disposed to cover the side wall which are provided on the substrate , in which the dummy gate is replaced with an aluminum metal gate , {'br': None, 'sub': 2', '2', '2', 'm, 'HN—(CHCHNH)—H\u2003\u2003(1)'}, 'said silicon etching solution comprising 0.1 to 40% by weight of at least one alkali compound selected from the group consisting of ammonia, a diamine and a polyamine represented by the following general formula (1), 5 to 50% by weight of at least one polyhydric alcohol represented by the following general formula (2) and 40 to 94.9% by weight of water {'br': None, 'sub': 'n', 'H—(CH(OH))—H\u2003\u2003(2)'}, 'wherein m is an integer of 2 to 5; and'}wherein n ...

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Номер записи: 44
15-08-2013 дата публикации

Semiconductor device and method of fabricating the same

Номер: US20130207183A1
Автор: Ching-Hung Kao
Принадлежит: United Microelectronics Corp

A semiconductor device includes a semiconductor substrate, a buried layer, a deep well having a first conductivity type being disposed on the buried layer, a first doped region having the first conductivity type and a well having the second conductivity type being disposed in the deep well, a first heavily doped region having the first conductivity type being disposed in the first doped region, a second heavily doped region having the first conductivity type being disposed in the well, a gate disposed between the first heavily doped region and the second heavily doped region, and a first trench structure and a second trench structure being disposed at the two sides of the gate in the semiconductor substrate. The first trench structure contacts the buried layer, and a depth of the second trench structure is substantially larger than a depth of the buried layer.

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Номер записи: 45
22-08-2013 дата публикации

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Номер: US20130217225A1
Автор: Hara Kenichi, Hayakawa Takashi, Tanaka Takashi
Принадлежит: TOKYO ELECTRON LIMITED

A method comprising the steps of: forming a copper film () on a Cu barrier film (); forming a mask material () on the copper film (); anisotropically etching the copper film () until the Cu barrier film () is exposed, using the mask material () as a mask; and removing the mask material () and subsequently forming a plating film () that contains a substance for suppressing copper diffusion on the anisotropically etched copper film (), using an electroless plating method that utilizes a selective deposition in which catalytic action occurs with respect to the copper film () but not the Cu barrier film (). 1. A semiconductor device manufacturing method comprising:forming a copper film on a Cu barrier film;forming a mask material on the copper film;anisotropically etching the copper film using the mask material as a mask until the Cu barrier film is exposed; andafter removing the mask material, forming a plating film including a material that suppresses the diffusion of the copper on the anisotropically etched copper film using an electroless plating method using a selective precipitation phenomenon that has a catalytic action on the copper film but does not have the catalytic action on the Cu barrier film,wherein the anisotropically oxidizing of the copper film is a process of anisotropically oxidizing the copper film to form a copper oxide up to the Cu barrier film using the mask material as a mask, and etching the copper oxide formed up to the Cu barrier film.2. The method of claim 1 , further comprising forming an interlayer dielectric film around the copper film which is formed with the plating film thereon.3. (canceled)4. The method of claim 1 , wherein the plating film is an alloy made of cobalt containing at least a tungsten.5. The method of claim 1 , wherein the anisotropically etching the copper film is a process of irradiating oxygen ions to the copper film under an organic acid gas atmosphere using the mask material as a mask claim 1 , and anisotropically ...

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Номер записи: 46
22-08-2013 дата публикации

Apparatus and method for controlling silicon nitride etching tank

Номер: US20130217235A1
Автор: Cheng-Chen Calvin Hsueh, Ming-Tsao Chiang, Tsung-Min Huang, Zin-Chang Wei
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A method and apparatus for controlling a silicon nitride etching bath provides the etching bath including phosphoric acid heated to an elevated temperature. The concentration of silicon in the phosphoric acid is controlled to maintain a desired level associated with a desired silicon nitride/silicon oxide etch selectivity. Silicon concentration is measured while the silicon remains in soluble form and prior to silica precipitation. Responsive to the measuring, fresh heated phosphoric acid is added to the etching bath when necessary to maintain the desired concentration and silicon nitride:silicon oxide etch selectivity and prevent silica precipitation. The addition of fresh heated phosphoric acid enables the etching bath to remain at a steady state temperature. Atomic absorption spectroscopy may be used to monitor the silicon concentration which may be obtained by diluting a sample of phosphoric acid with cold deionized water and measuring before silica precipitation occurs.

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Номер записи: 47
29-08-2013 дата публикации

METHOD FOR REMOVING OXIDE FILM FORMED ON SURFACE OF SILICON WAFER

Номер: US20130224438A1
Автор: KOMATSU Hiroyuki, Matsuo Junichi, Matsuyama Hiroyuki, TAKADA Chieko
Принадлежит: SUMCO CORPORATION

Disclosed is a method for removing an oxide film formed on a surface of a silicon wafer, comprising steps of: preparing a silicon wafer having an oxide film formed thereon; arranging a discoid wafer mounting stage, which has a contact portion with the oxide film being formed of an acid-resistant resin layer, in a reaction container of a vapor-phase etching apparatus; mounting the silicon wafer on the mounting stage in such a manner that a wafer center coincides with a central axis of the mounting stage; and circulating a hydrogen fluoride containing gas into the reaction container and removing the oxide film from an interface between a chamfered surface and a wafer lower surface toward the inner side of the wafer until a desired interval a is obtained, wherein the desired interval a is adjusted by changing a stage diameter of the mounting stage. 1. A method for removing an oxide film formed on a surface of a silicon wafer , comprising steps of: preparing a silicon wafer which has an upper surface , a lower surface , a chamfered surface , and an end surface and has an oxide film formed on at least the entire lower surface of the silicon wafer; arranging one or more discoid wafer mounting stages , each of which has at least a contact portion with the oxide film being formed of an acid-resistant resin layer , in a reaction container of a vapor-phase etching apparatus; mounting the silicon wafer on the mounting stage in such a manner that the lower surface of the silicon wafer faces an upper face of the mounting stage and a wafer center coincides with a central axis of the mounting stage; and circulating a hydrogen fluoride containing gas into the reaction container and removing the oxide film from an interface between the chamfered surface and the wafer lower surface toward the inner side of the wafer until a desired interval a is obtained , wherein the desired interval a is adjusted by changing a stage diameter of the mounting stage.2. A method according to claim 1 , ...

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Номер записи: 48
29-08-2013 дата публикации

SUBSTRATE TREATMENT APPARATUS AND SUBSTRATE TREATMENT METHOD

Номер: US20130224956A1
Автор: Hashimoto Koji, HAYASHI Toyohide, MURAMOTO Ryo, NAGAI Yasuhiko, NEGORO Sei
Принадлежит: DAINIPPON SCREEN MFG. CO., LTD.

A substrate treatment apparatus is used for treating a major surface of a substrate with a chemical liquid. The substrate treatment apparatus includes: a substrate holding unit which holds the substrate; a chemical liquid supplying unit having a chemical liquid nozzle which supplies the chemical liquid onto the major surface of the substrate held by the substrate holding unit; a heater having an infrared lamp to be located in opposed relation to the major surface of the substrate held by the substrate holding unit to heat the chemical liquid supplied onto the major surface of the substrate by irradiation with infrared radiation emitted from the infrared lamp, the heater having a smaller diameter than the substrate; and a heater moving unit which moves the heater along the major surface of the substrate held by the substrate holding unit. 1. A substrate treatment apparatus to be used for treating a major surface of a substrate with a chemical liquid , the apparatus comprising:a substrate holding unit which holds the substrate;a chemical liquid supplying unit having a chemical liquid nozzle which supplies the chemical liquid onto the major surface of the substrate held by the substrate holding unit;a heater having an infrared lamp to be located in opposed relation to the major surface of the substrate held by the substrate holding unit to heat the chemical liquid supplied onto the major surface of the substrate by irradiation with infrared radiation emitted from the infrared lamp, the heater having a smaller diameter than the substrate; anda heater moving unit which moves the heater along the major surface of the substrate held by the substrate holding unit.2. The substrate treatment apparatus according to claim 1 , further comprising a heater head provided separately from the chemical liquid nozzle and including the heater claim 1 ,wherein the heater moving unit includes a heater head moving unit which moves the heater head.3. The substrate treatment apparatus ...

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Номер записи: 49
12-09-2013 дата публикации

WET-CHEMICAL SYSTEMS AND METHODS FOR PRODUCING BLACK SILICON SUBSTRATES

Номер: US20130234072A1
Автор: Page Matthew, Yost Vernon, YUAN Hao-Chih
Принадлежит: ALLIANCE FOR SUSTANABLE ENERGY, LLC

A wet-chemical method of producing a black silicon substrate. The method comprising soaking single crystalline silicon wafers in a predetermined volume of a diluted inorganic compound solution. The substrate is combined with an etchant solution that forms a uniform noble metal nanoparticle induced Black Etch of the silicon wafer, resulting in a nanoparticle that is kinetically stabilized. The method comprising combining with an etchant solution having equal volumes acetonitrile/acetic acid:hydrofluoric acid:hydrogen peroxide. 1. A wet-chemical method of producing black silicon substrates , comprising:soaking crystalline silicon wafers in a predetermined volume of a diluted inorganic compound solution;combining the wafers with an etchant solution wherein the solution comprises having equal volumes of an acetonitrile solution from acetic acid combined with a hydrofluoric acid and hydrogen peroxide etching solution; andproviding a kinetically stabilized and uniform noble metal nanoparticle induced Black Etch of the silicon wafer.2. The method of claim 1 , wherein the inorganic compound solution comprises chlorauric acid.3. The method of claim 1 , wherein the wafers are doped with n-type dopant phosphorus from phosphorous oxychloride gaseous diffusion.4. The method of claim 1 , wherein the wafers are doped with p-type dopant.5. The method of claim 1 , wherein the noble metal nanoparticle comprises gold claim 1 , silver claim 1 , platinum claim 1 , palladium claim 1 , copper claim 1 , nickel or cobalt.6. The method of claim 1 , further comprising reducing reflective losses to less than about 3% across the useful solar spectrum and over a wide range of incident angles.7. The method of claim 1 , further comprising texturing a heavily phosphorus-doped wafer.8. The method of claim 1 , wherein use of an organic HF activity modifier and a silicon-surface hydrophyllicity modifier in conjunction with the chlorauric acid solution and a 1:1 mixture of hydrofluoric acid and ...

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Номер записи: 50
19-09-2013 дата публикации

METHOD OF MANUFACTURING NOZZLE PLATE

Номер: US20130244352A1
Автор: Takahashi Shuji
Принадлежит: FUJIFILM Corporation

A method of manufacturing a nozzle plate includes: a mask pattern layer forming step of, with respect to a laminated substrate constituted of a first silicon substrate having a (111) surface orientation and a second silicon substrate having a (100) surface orientation, forming a frame-shaped mask pattern layer on the second silicon substrate; a non-through hole forming step of forming a straight section of the nozzle in the first silicon substrate; a protective film forming step of forming a protective film over a first portion on the second silicon substrate that is not covered with the mask pattern layer, and over inner surfaces of the first and second silicon substrates defining the non-through hole; and an anisotropic etching step of anisotropically etching the second silicon substrate so as to form a tapered section of the nozzle defined with {111} surfaces exposed in the second silicon substrate by the anisotropic etching. 1. A method of manufacturing a nozzle plate , comprising:a mask pattern layer forming step of, with respect to a laminated substrate having a structure in which a first silicon substrate having a (111) surface orientation and a second silicon substrate having a (100) surface orientation are sequentially laminated on a surface of an oxide film, forming a frame-shaped mask pattern layer on the second silicon substrate, the frame-shaped mask pattern layer having a first opening section at a position where a nozzle is to be formed;a non-through hole forming step of forming a straight section of the nozzle in the first silicon substrate by forming a non-through hole that passes from the first opening section through the second silicon substrate and the first silicon substrate to the surface of the oxide film;a protective film forming step of forming a protective film over a first portion on the second silicon substrate that is not covered with the mask pattern layer, and over inner surfaces of the first and second silicon substrates defining the ...

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Номер записи: 51
19-09-2013 дата публикации

Cleaning method of silicon substrate and manufacturing method of solar battery

Номер: US20130244369A1
Автор: Nozomu Yasunaga, Takayoshi Matsuda, Yoichiro Nishimoto
Принадлежит: Mitsubishi Electric Corp

A cleaning method of a silicon substrate includes a first step of etching a surface of a silicon substrate by a metal-ion-containing mixed aqueous solution of an oxidizing agent and hydrofluoric acid and of forming a porous layer on the surface of the silicon substrate, a second step of etching a pore of the porous layer by mixed acid mainly containing hydrofluoric acid and nitric acid and of forming texture on the surface of the silicon substrate, a third step of etching the surface of the silicon substrate on which the texture is formed with an alkaline chemical solution, and a fourth step of treating the silicon substrate etched by the alkaline chemical solution by ozone-containing water, of generating an air bubble within the pore formed in the silicon substrate, and of removing metal and organic impurities from within the pore.

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Номер записи: 52
19-09-2013 дата публикации

METHOD OF PRODUCING A SEMICONDUCTOR SUBSTRATE PRODUCT AND ETCHING LIQUID

Номер: US20130244443A1
Автор: KAMIMURA Tetsuya, MIZUTANI Atsushi, SHIMIZU Tetsuya, YOSHII Akiko
Принадлежит: FUJIFILM Corporation

A method for manufacturing a semiconductor substrate product having: providing an etching liquid containing water, a hydrofluoric acid compound and an organic solvent, and applying the etching liquid to a semiconductor substrate, the semiconductor substrate having a silicon layer and a silicon oxide layer, the silicon layer containing an impurity, and thereby selectively etching the silicon oxide layer. 1. A method for manufacturing a semiconductor substrate product comprising:providing an etching liquid containing water, a hydrofluoric acid compound and an organic solvent, andapplying the etching liquid to a semiconductor substrate, the semiconductor substrate having a silicon layer and a silicon oxide layer, the silicon layer containing an impurity, and thereby selectively etching the silicon oxide layer.2. The method for manufacturing a semiconductor substrate product according to claim 1 , wherein the concentration of the hydrofluoric acid compound is 3% by mass or less.3. The method for manufacturing a semiconductor substrate product according to claim 1 , wherein the organic solvent comprises an alcohol compound and/or an ether compound.4. The method for manufacturing a semiconductor substrate product according to claim 1 , wherein the content of the organic solvent in the etching liquid is in a range of from 25% by mass to 80% by mass.5. The method for manufacturing a semiconductor substrate product according to claim 1 , wherein the organic solvent comprises an alkylene glycol alkylether.6. The method for manufacturing a semiconductor substrate product according to claim 1 , wherein the etching is conducted under the condition that the liquid temperature of the etching liquid on the substrate is 30° C. or lower.7. The method for manufacturing a semiconductor substrate product according to claim 1 , wherein the etching is conducted by a single wafer etching equipment.8. The method for manufacturing a semiconductor substrate product according to claim 1 , ...

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Номер записи: 53
19-09-2013 дата публикации

METHOD OF PRODUCING A SEMICONDUCTOR SUBSTRATE PRODUCT AND ETCHING LIQUID

Номер: US20130244444A1
Автор: KAMIMURA Tetsuya, MIZUTANI Atsushi, SHIMIZU Tetsuya, YOSHII Akiko
Принадлежит: FUJIFILM Corporation

A method of producing a semiconductor substrate product, having the steps of: providing an etching liquid containing water, a hydrofluoric acid compound, and a water-soluble polymer; and applying the etching liquid to a semiconductor substrate, the semiconductor substrate having a silicon layer and a silicon oxide layer, the silicon layer containing an impurity, and thereby selectively etching the silicon oxide layer. 1. A method of producing a semiconductor substrate product , comprising the steps of:providing an etching liquid containing water, a hydrofluoric acid compound, and a water-soluble polymer; andapplying the etching liquid to a semiconductor substrate, the semiconductor substrate having a silicon layer and a silicon oxide layer, the silicon layer containing an impurity, and thereby selectively etching the silicon oxide layer.2. The method of producing a semiconductor substrate product according to claim 1 , wherein the concentration of the hydrofluoric acid compound in the etching liquid is 3% by mass or less.3. The method of producing a semiconductor substrate product according to claim 1 , wherein the concentration of the water-soluble polymer in the etching liquid is 1% by mass or less.4. The method of producing a semiconductor substrate product according to claim 1 , wherein the water-soluble polymer is a poly(vinyl alcohol).5. The method of producing a semiconductor substrate product according to claim 1 , wherein the etching liquid has an antifoaming agent.6. The method of producing a semiconductor substrate product according to claim 5 , wherein the antifoaming agent is acetylene alcohol claim 5 , silicone oil claim 5 , or a water-soluble organic solvent.7. The method of producing a semiconductor substrate product according to claim 6 , wherein the water-soluble organic solvent is an alcohol compound or an ether compound.8. The method of producing a semiconductor substrate product according to claim 6 , wherein the water-soluble organic solvent is ...

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Номер записи: 54
03-10-2013 дата публикации

SUBSTRATE TREATING APPARATUS

Номер: US20130255882A1
Автор: ARAKI Hiroyuki, TAKAHASHI Tomohiro
Принадлежит: DAINIPPON SCREEN MFG. CO., LTD.

A substrate treating apparatus includes a circulating line having a treating tank for storing a phosphoric acid aqueous solution, a circulating pump for feeding the phosphoric acid aqueous solution, a heater for circulation for heating the phosphoric acid aqueous solution, a filter for filtering the phosphoric acid aqueous solution, the circulating line causing the phosphoric acid aqueous solution discharged from the treating tank to flow in order of the circulating pump, the heater for circulation and the filter, and returning the phosphoric acid aqueous solution from the filter to the treating tank. The apparatus also includes a branch pipe branching from the circulating line between the heater for circulation and the filter for extracting the phosphoric acid aqueous solution from the circulating line, and a concentration measuring station connected to the branch pipe for measuring silicon concentration in the phosphoric acid aqueous solution by potentiometry. 1. A substrate treating apparatus comprising:a circulating line including a treating tank for storing a phosphoric acid aqueous solution, a circulating pump for feeding the phosphoric acid aqueous solution, a heater for circulation for heating the phosphoric acid aqueous solution, a filter for filtering the phosphoric acid aqueous solution, the circulating line causing the phosphoric acid aqueous solution discharged from the treating tank to flow in order of the circulating pump, the heater for circulation and the filter, and returning the phosphoric acid aqueous solution from the filter to the treating tank;a branch pipe branching from the circulating line between the heater for circulation and the filter for extracting the phosphoric acid aqueous solution from the circulating line; anda concentration measuring station connected to the branch pipe for measuring silicon concentration in the phosphoric acid aqueous solution by potentiometry.2. The substrate treating apparatus according to further comprising a ...

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Номер записи: 55
03-10-2013 дата публикации

SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD

Номер: US20130260570A1
Автор: ARAI Kenichiro, ENDO Toru, MASUHARA Hirofumi, MIYAGI Masahiro
Принадлежит: DAINIPPON SCREEN MFG. CO., LTD

In a substrate processing apparatus, with an internal space of a chamber brought into a pressurized atmosphere, an etching process is performed by continuously supplying a first processing liquid onto an upper surface of a substrate while rotating the substrate. 1. A substrate processing apparatus for processing a substrate , comprising:a substrate holding part for holding a substrate with a main surface thereof directed upward;a processing liquid supply part for supplying a processing liquid onto a center portion of said main surface of said substrate;a substrate rotating mechanism for rotating said substrate together with said substrate holding part;a chamber for containing said substrate holding part in an internal space thereof;a pressure changing part for changing pressure in said internal space of said chamber; anda control part for controlling said processing liquid supply part, said substrate rotating mechanism, and said pressure changing part to bring said internal space of said chamber into a pressurized atmosphere and continuously supply said processing liquid onto said center portion of said main surface of said substrate while rotating said substrate in said pressurized atmosphere, to thereby perform a predetermined processing.2. The substrate processing apparatus according to claim 1 , further comprising:a heating part for heating said substrate,wherein said control part controls said pressure changing part and said heating part to bring said internal space of said chamber into a reduced pressure atmosphere and heat said substrate in said reduced pressure atmosphere.3. The substrate processing apparatus according to claim 2 , whereinsaid heating part emits light toward said substrate, to thereby heat said substrate.4. The substrate processing apparatus according to claim 3 , whereinsaid control part controls said pressure changing part and said substrate rotating mechanism to bring said internal space of said chamber into said reduced pressure ...

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Номер записи: 56
10-10-2013 дата публикации

USE OF ETCH PROCESS POST WORDLINE DEFINITION TO IMPROVE DATA RETENTION IN A FLASH MEMORY DEVICE

Номер: US20130264628A1
Автор: Graettinger Thomas M., Hineman Max F., Koval Randy J., Kueber William R., Larsen Christopher, Schrinsky Alex J., Shamanna Vinayak K., Weimer Ronald A.
Принадлежит:

Embodiments of the present disclosure describe techniques and configurations relating to use of an etch process post wordline definition to improve data retention in a flash memory device. In one embodiment, a method includes forming a plurality of wordline structures on a substrate, wherein individual wordline structures of the plurality of wordline structures include a control gate having an electrically conductive material and a cap having an electrically insulative material formed on the control gate, depositing an electrically insulative material to form a liner on a surface of the individual wordline structures, and etching the liner to remove at least a portion of the liner. Other embodiments may be described and/or claimed. 1. A method comprising:forming a plurality of wordline structures on a substrate, wherein individual wordline structures of the plurality of wordline structures include a control gate having an electrically conductive material and a cap having an electrically insulative material formed on the control gate;depositing an electrically insulative material to form a liner on a surface of the individual wordline structures; andetching the liner to remove at least a portion of the liner.2. The method of claim 1 , wherein forming a plurality of wordline structures includes:depositing an electrically conductive material to form a control gate layer on a charge storage node layer formed on the substrate;depositing an electrically insulative material on the control gate layer to form a cap layer coupled with the control gate layer; andremoving at least a portion of the cap layer, the control gate layer, and the charge storage node layer to define the plurality of wordline structures and a plurality of charge storage nodes.3. The method of claim 1 , wherein depositing an electrically insulative material to form the liner includes:depositing an electrically insulative material on sidewall surfaces of the control gate and the cap and on a top surface ...

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Номер записи: 57
17-10-2013 дата публикации

METHOD OF FORMING CONNECTION HOLES

Номер: US20130273742A1
Автор: CHEN Yuwen, Li Cheng, YANG Yushu
Принадлежит: SHANGHAI HUALI MICROELECTRONICS CORPORATION

The present invention provides a method of forming connection holes. The method utilizes two different gases to perform two etching processes for the interlayer dielectric layer so as to form connection holes. The etching rate of the interlayer dielectric layer in the first etching process using the first etching gas is proportional to the size of the openings which defines the connection hole while the etching rate of the interlayer dielectric layer in the second etching process using the second etching gas is inversely related with size of the openings. According to the present invention, the first etching gas and the second etching gas compensate for each other to eliminate the loading effect, thus the connection holes are formed with almost the same depth. Therefore the damage of the etching stopper layer due to the high etching rate in the larger connection holes can be avoided, which prevents the excessive variation of the connecting resistance and expands the process window. 1. A method of forming connection holes comprising:providing a semiconductor substrate having a metal layer on the surface thereof;forming an etching stopper layer, a first dielectric anti-reflective coating layer, an interlayer dielectric layer and a second dielectric anti-reflective coating layer successively on the surface of the metal layer;forming photoresist patterns on the second dielectric anti-reflective coating layer, wherein the openings of the photoresist pattern are different in size;etching the second dielectric anti-reflective coating layer using the photoresist patterns as a mask until exposing the interlayer dielectric layer;performing a first etching process to the interlayer dielectric layer by using a first etching gas to form multiple openings of different sizes, and stopping the first etching process when the first dielectric anti-reflective coating layer is exposed through the opening of the maximum size;performing a second etching process to the interlayer ...

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Номер записи: 58
17-10-2013 дата публикации

ETCHING PASTE, PRODUCTION METHOD THEREOF, AND PATTERN FORMING METHOD USING THE SAME

Номер: US20130273745A1
Автор: SHIM Jae Joon
Принадлежит:

An etching paste and a method of forming a pattern, the etching paste including an organic binder; phosphoric acid; a nitrogen-containing compound; and a solvent, the nitrogen-containing compound including at least one selected from amine compounds represented by Formula 1 and ammonium compounds represented by Formula 2. 1. An etching paste , comprising:an organic binder;phosphoric acid;a nitrogen-containing compound; anda solvent, {'br': None, 'sub': n', 'm, '(R)—N—H, \u2003\u2003[Formula 1]'}, 'the nitrogen-containing compound including at least one selected from amine compounds represented by Formula 1 and ammonium compounds represented by Formula 2 {'br': None, 'sub': 4', 'k, 'sup': '+', '(NH)X, \u2003\u2003[Formula 2]'}, 'wherein, in Formula 1, R is a C1 to C12 alkyl group or a C6 to C12 substituted or unsubstituted aryl group; n is an integer from 1 to 3; m is an integer from 0 to 2; and n+m is 3,'}wherein, in Formula 2, X is a carbonate anion, a hydroxide anion, or a carbamate anion, and k is 1 or 2.2. The etching paste according as claimed in claim 1 , wherein the organic binder is a water-soluble polymer.3. The etching paste according as claimed in claim 1 , wherein the organic binder includes at least one selected from the group of cellulose resins claim 1 , xanthan gum claim 1 , polyvinylpyrrolidone claim 1 , polyvinyl alcohol claim 1 , water-soluble (meth)acrylic resins claim 1 , polyether-polyol claim 1 , and poly(ether urea)-polyurethane.4. The etching paste as claimed in claim 1 , wherein the nitrogen-containing compound includes at least one selected from the group of methylamine claim 1 , ethylamine claim 1 , propylamine claim 1 , butylamine claim 1 , dodecylamine claim 1 , benzylamine claim 1 , ammonium hydroxide claim 1 , ammonium carbonate claim 1 , and ammonium carbamate.5. The etching paste as claimed in claim 1 , wherein a mole ratio of the nitrogen-containing compound to the phosphoric acid ranges from 1:1 to 1.5:1.6. The etching paste as ...

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Номер записи: 59
24-10-2013 дата публикации

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MANUFACTURING APPARATUS

Номер: US20130280911A1
Автор: Aoyama Tomonori, KAI Wakana
Принадлежит: KABUSHIKI KAISHA TOSHIBA

In one embodiment, a method of manufacturing a semiconductor device includes forming a concave portion on a surface of a substrate to be processed. The method further includes forming a coating film on the substrate to embed the coating film in the concave portion. The method further includes performing a first heat treatment in an atmosphere including an oxidant which contains polar molecules. The method further includes performing a second heat treatment after the first heat treatment by irradiating the coating film with a microwave after or while exposing the coating film to a liquid or a gas containing polar molecules. 1. A method of manufacturing a semiconductor device , comprising:forming a concave portion on a surface of a substrate to be processed;forming a coating film on the substrate to embed the coating film in the concave portion;performing a first heat treatment for heating the coating film in an atmosphere including an oxidant which contains polar molecules; andperforming a second heat treatment after the first heat treatment for heating the coating film by irradiating the coating film with a microwave after or while exposing the coating film to a liquid or a gas containing polar molecules.2. The method of claim 1 , wherein the coating film is a polysilazane film.3. The method of claim 1 , wherein the oxidant is water vapor.4. The method of claim 1 , wherein the first heat treatment heats the coating film by lamp annealing or laser annealing.5. The method of claim 1 , wherein the polar molecules contained in the liquid or the gas are water molecules claim 1 , ozone molecules or hydrogen peroxide molecules.6. The method of claim 1 , wherein the second heat treatment heats the coating film at 200 to 500° C.7. The method of claim 1 , wherein a decomposition reaction in which the polar molecules decompose the coating film is generated in the second heat treatment.8. The method of claim 1 , wherein wet etching is performed after the second heat treatment ...

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Номер записи: 60
24-10-2013 дата публикации

ETCHING AGENT, ETCHING METHOD AND LIQUID FOR PREPARING ETCHING AGENT

Номер: US20130280916A1
Автор: Hayashida Ichiro, Kikuchi Nobuyuki, MATSUDA Osamu, Shirahata Satoshi
Принадлежит:

An etching agent for a semiconductor substrate, which is capable of etching a titanium (Ti)-based metal film on a semiconductor substrate and an etching method using the etching agent, and relates to a liquid for preparing the etching agent for a semiconductor substrate composed of a solution comprising (A) hydrogen peroxide, (B) a phosphonic acid chelating agent having a hydroxyl group, (C) a basic compound, and (D-1) a copper anticorrosive. An etching method for etching a titanium (Ti)-based metal film on a semiconductor substrate using the etching agent. A solution comprising (B) a phosphonic acid chelating agent having a hydroxyl group, (C) a basic compound, and (D-1) a copper anticorrosive. 2. The etching agent according to claim 1 , wherein the semiconductor substrate is the one on which copper wiring has been formed.3. The etching agent according to claim 2 , wherein the semiconductor substrate claim 2 , on which the copper wiring has been formed claim 2 , is the semiconductor substrate claim 2 , in which copper wiring has been formed on a titanium (Ti)-based metal film.4. The etching agent according to claim 2 , wherein the copper wiring is the one for forming a lead (Pb)-free solder bump.5. The etching agent according to claim 1 , wherein the etching agent is used in a Pb-free solder bump forming step.6. The etching agent according to claim 1 , wherein pH of the solution is 8 to 9.5.7. The etching agent according to claim 1 , wherein pH of the solution is 8.5 to 9.5.8. The etching agent according to claim 1 , wherein pH of the solution is 8.5 to 9.2.9. The etching agent according to claim 1 , wherein the (B) a phosphonic acid chelating agent having a hydroxyl group is the one to be selected from the group consisting of 1-hydroxyethylidene-1 claim 1 ,1′-diphosphonic acid claim 1 , 1-hydroxypropylidene-1 claim 1 ,1′-diphosphonic acid claim 1 , and 1-hydroxybutylidene-1 claim 1 ,1′-diphosphonic acid.10. The etching agent according to claim 1 , wherein the (C) ...

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Номер записи: 61
14-11-2013 дата публикации

Glass Etching Media And Methods

Номер: US20130299452A1
Автор: II Alan Thomas, Myers Timothy Edward, Shanmugam Shyamala, Stephens, Towner Matthew John, Uhlig Kevin William, Zhang Lu
Принадлежит: CORNING INCORPORATED

A glass etching medium and a method for etching the surface of a glass sheet to modify surface flaw characteristics without degrading the optical quality of the sheet surface, wherein the etching medium is a thickened aqueous acidic fluoride-containing paste comprising at least one dissolved, water-soluble, high-molecular-weight poly (ethylene oxide) polymer thickener. 1. A glass etching medium comprising at least one water-soluble inorganic fluoride compound , at least one secondary strong acid , water , and a dissolved , water-soluble , high-molecular-weight poly (ethylene oxide) polymer thickener.2. A medium in accordance with claim 1 , wherein the at least one fluoride compound comprises HF claim 1 , and wherein the HF is present in the medium at a concentration in the range of about 1-7M.3. A medium in accordance with claim 1 , wherein the at least one secondary strong acid comprises an acid selected from the group consisting of mineral acids and strong organic acids.4. A medium in accordance with claim 1 , wherein the at least one secondary strong acid comprises a mineral acid selected from the group consisting of HSO claim 1 , HNO claim 1 , HCl claim 1 , and HPO.5. A medium in accordance with wherein the secondary strong acid is HSOand is present in the medium at a concentration in the range of about 1-7M.6. A medium in accordance with claim 1 , wherein the water-soluble polymer thickener is a non-ionic claim 1 , poly (ethylene oxide) polymer having a molecular weight of substantially at least 10g/mol.7. A medium in accordance with claim 1 , wherein the polymer thickener has a molecular weight in the range of about 2×10-4×10g/mol.8. A medium in accordance with that is stable against separation and precipitation claim 5 , and stable against oxidative decomposition in aqueous HSOat HSOconcentrations in the range of about 1-7M.9. A medium in accordance with claim 1 , having an etching rate substantially equivalent to that of a second medium of equivalent ...

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Номер записи: 62
14-11-2013 дата публикации

Methods Of Treating Semiconductor Substrates, Methods Of Forming Openings During Semiconductor Fabrication, And Methods Of Removing Particles From Over Semiconductor Substrates

Номер: US20130302995A1
Автор: Flynn Patrick M., Fucsko Janos, Grant Kyle, Hanson Robert J., Raghu Prashant, Rana Niraj B., Sabde Gundu M., Tagg Sandra, Yates Donald L.
Принадлежит: MICRON TECHNOLOGY, INC.

Some embodiments include methods of treating semiconductor substrates. The substrates may be exposed to one or more conditions that vary continuously. The conditions may include temperature gradients, concentration gradients of one or more compositions that quench etchant, pH gradients to assist in removing particles, and/or concentration gradients of one or more compositions that assist in removing particles. The continuously varying conditions may be imparted by placing the semiconductor substrates in a bath of flowing rinsing solution, with the bath having at least two feed lines that provide the rinsing solution therein. One of the feed lines may be at a first condition, and the other may be at a second condition that is different from the first condition. The relative amount of rinsing solution provided to the bath by each feed line may be varied to continuously vary the condition within the bath. 1. A method of treating a semiconductor substrate comprising exposing the substrate to one or more compositions to quench an etch process , wherein said exposure to the one or more compositions comprises exposure to a continuously varying concentration gradient of at least one of the one or more compositions for a duration of at least several seconds; the continuously varying concentration gradient including repetitive iterations of increasing concentration from a low concentration to a high concentration and of decreasing concentration from the high concentration to the low concentration; the low and high concentrations differing from one another by at least a factor of ten.2. The method of wherein the one or more compositions include one or more inorganic acids.3. The method of wherein the one or more compositions include one or more organic acids.4. The method of wherein the one or more compositions include one or more inorganic bases.5. The method of wherein the one or more compositions include one or more organic bases.6. A method of treating a semiconductor ...

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Номер записи: 63
21-11-2013 дата публикации

METHOD FOR TREATING THE SURFACE OF A SILICON SUBSTRATE

Номер: US20130309449A1
Автор: Grenouillet Laurent, Le Tiec Yannick, Vinet Maud, WACQUEZ Romain
Принадлежит: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

The present invention relates to a method for chemically treating the surface condition of a silicon substrate for the roughness contrast characterized in that it comprises at least two successive treatment cycles, with each treatment cycle comprising a first step including placing in contact the silicon substrate with a first solution containing water diluted hydrofluoric (HF) acid and then a second step carried out at a temperature of less than 40° C., comprising placing in contact the silicon layer with a second solution containing water (HO) diluted ammonium hydroxide (NHOH) and hydrogen peroxide (HO), in order to obtain a roughness of less than 0.100 nanometer on a 1 μm×1 μm area upon completion of the treatment cycles. 1. A method for chemically treating a surface condition of a silicon substrate for controlling roughness , the method comprising at least two successive treatment cycles , with each treatment cycle comprising:first contacting the silicon substrate with a first solution comprising water diluted hydrofluoric (HF) acid, then{'sub': 2', '4', '2', '2, 'second, at a temperature of less than 40° C., contacting the silicon substrate with a second solution comprising water (HO) diluted ammonium hydroxide (NHOH) and hydrogen peroxide (HO).'}2. The method of claim 1 , wherein the successive treatment cycles are repeated until a RMS roughness of less than 0.100 nanometer is obtained in a 1 μm×1 μm area.3. The method of claim 1 , comprising from 2 to 15 treatment cycles.4. The method of claim 1 , wherein the temperature of the second contacting is from 18 to 25° C.5. The method of claim 1 , wherein a temperature of the first contacting is less than or equal to 40° C.6. The method of claim 1 , wherein a temperature of the first contacting is from 18 to 25° C.7. The method of claim 1 , wherein a dilution of the first solution is from 50 to 500/1 claim 1 , for 49% specific volume hydrofluoric (HF) acid.8. The method of claim 1 , wherein the silicon substrate in ...

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Номер записи: 64
21-11-2013 дата публикации

LATERAL SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME

Номер: US20130309867A1
Автор: Eguchi Hiroomi, Okawa Takashi, Onogi Atsushi
Принадлежит: TOYOTA JIDOSHA KABUSHIKI KAISHA

A manufacturing method for manufacturing a lateral semiconductor device having an SOI (Silicon on Insulator) substrate, the lateral semiconductor device comprising a semiconductor layer that includes a buried oxide layer and a drift region, the manufacturing method comprising an etching process of etching, by a predetermined depth, a LOCOS oxide that projects from a surface of the semiconductor layer by a predetermined thickness and is embedded in the semiconductor layer by a predetermined thickness, and a trench forming process of simultaneously forming a first trench extending from the drift region toward the buried oxide layer, and a second trench extending from a portion obtained by the etching in the etching process toward the buried oxide layer, at a same etching rate, and stopping forming the first trench and the second trench at a time when the second trench reaches the buried oxide layer. 1. (canceled)2. (canceled)3. (canceled)4. (canceled)5. (canceled)6. A manufacturing method for manufacturing a lateral semiconductor device having an SOI (Silicon on Insulator) substrate , the lateral semiconductor device comprising a semiconductor layer that includes a buried oxide layer and a drift region , the manufacturing method comprisingan etching process of etching, by a predetermined depth, a LOCOS oxide film film that projects from a surface of the semiconductor layer by a predetermined thickness and is embedded in the semiconductor layer by a predetermined thickness, anda trench forming process of simultaneously forming a first trench extending from the region toward the buried oxide layer, and a second trench extending from a portion obtained by the etching in the etching process toward the buried oxide layer, at a same etching rate, and stopping forming the first trench and the second trench at a time when the second trench reaches the buried oxide layer. The present invention relates to semiconductor devices, and more particularly to lateral IGBTs (Insulated ...

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Номер записи: 65
05-12-2013 дата публикации

METHOD OF ETCHING OF SOI SUBSTRATE, AND BACK-ILLUMINATED PHOTOELECTRIC CONVERSION MODULE ON SOI SUBSTRATE AND PROCESS OF MANUFACTURE THEREOF

Номер: US20130320477A1
Автор: Ohashi Tomotsugu, Ohmi Tadahiro, Soeda Kazuki, Sugawa Shigetoshi, Uchimura Teppei, Yoshida Tatsuro, Yoshikawa Kazuhiro
Принадлежит: TOHOKU UNIVERSITY

A method of etching capable of rapidly and flatly performing wet etching on a Si substrate using fluonitric acid represented by HF(a)HNO(b)HO(c) (where the unit of a, b and c is wt % and a+b+c=100). The etching rate of an SiOlayer with the highly concentrated fluonitric acid is significantly lowered by the appropriate selection of its composition as compared with the etching rate of the Si substrate, and etch the Si substrate until the SiOlayer is exposed. In this way, it is possible to rapidly etch the Si substrate and significantly enhance the flatness of the etched surface. 1. A method of etching an SOI substrate , comprising ,{'sub': 2', '3', '2', '2, 'a step of exposing a free surface of a Si substrate in the SOI substrate in which an SiOlayer is inserted between the Si substrate and a surface Si layer, to a fluonitric acid HF(a)HNO(b)HO(c) (where a, b and c are numerical values representing concentrations, the unit thereof is wt % and a+b+c=100), until at least a part of the SiOlayer is exposed, wherein a composition of the fluonitric acid satisfies a+b≧50.'}2. The etching method according to claim 1 , wherein the SiOlayer is a SiOlayer having a stoichiometric composition ratio.3. The etching method according to claim 1 , wherein the composition of the fluonitric acid satisfies 19≦a≦42.4. The etching method according to claim 3 , wherein the composition of the fluonitric acid further satisfies 23≦a≦40.5. The etching method according to claim 4 , wherein the composition of the fluonitric acid further satisfies 27≦a≦37.6. A backside illumination type photoelectric conversion module comprising:{'sub': '2', 'an SOI substrate in which an SiOlayer is inserted between a Si substrate and a surface Si layer; and'}a photoelectric conversion portion that has a plurality of photoelectric conversion elements provided on the surface Si layer, wherein{'sub': '2', 'the Si substrate has an opening portion that exposes the SiOlayer, and'}the opening portion is an entrance ...

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Номер записи: 66
19-12-2013 дата публикации

METAL CONSERVATION WITH STRIPPER SOLUTIONS CONTAINING RESORCINOL

Номер: US20130334679A1
Автор: Atkinson John, Goebel Gene, Pollard Kimberly Dona
Принадлежит: Dynaloy, LLC

Resist stripping agents useful for fabricating circuits and/or forming electrodes on semiconductor devices for semiconductor integrated circuits and/or liquid crystals with reduced metal and metal alloy etch rates (particularly copper etch rates and TiW etch rates), are provided with methods for their use. The preferred stripping agents contain low concentrations of resorcinol or a resorcinol derivative, with or without an added copper salt, and with or without an added amine to improve solubility of the copper salt. Further provided are integrated circuit devices and electronic interconnect structures prepared according to these methods. 1. A method for removing a resist from a substrate comprising the acts of:(a) providing a substrate having a resist and metal thereon; and(b) contacting said substrate with a composition including a stripper solution and resorcinol, said resorcinol present in an amount within a range of 0.02 wt % to 1 wt %, based on the weight of said composition.2. The method of claim 1 , wherein said contacting includes contacting said substrate with a composition including resorcinol.3. The method of claim 1 , wherein said contacting includes contacting said substrate with a composition having a metal conservation factor (MCF) having a value of >0 and <1 claim 1 , said MCF being defined as:{'br': None, 'i': a−b', 'a,, 'MCF=()/'}where ‘a’ is an etch rate determined with said stripper solution not containing said resorcinol and ‘b’ is an etch rate determined with said stripper solution containing said resorcinol.4. The method of claim 1 , wherein said contacting includes contacting said substrate with a composition including from about 0.1 wt. % to about 0.25 wt. % of a resorcinol claim 1 , based on the weight of the composition.5. The method of claim 1 , wherein said contacting includes contacting said substrate with a composition including dimethyl sulfoxide (DMSO) claim 1 , a quaternary ammonium hydroxide claim 1 , and an alkanolamine.6. The ...

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Номер записи: 67
02-01-2014 дата публикации

INVERTED 45 DEGREE MIRROR FOR PHOTONIC INTEGRATED CIRCUITS

Номер: US20140003766A1
Автор: HECK John, Rong Haisheng
Принадлежит:

Inverted 45° semiconductor mirrors as vertical optical couplers for PIC chips, particularly optical receivers and transmitters. An inverted 45° semiconductor mirror functions to couple light between a plane in the PIC chip defined by thin film layers and a direction normal to a top surface of the PIC chip where it may be generated or collected by an off-chip component, such as a wire terminal. In an exemplary embodiment, a (110) plane of a cubic crystalline semiconductor may provide a 45° facet inverted relative to a (100) surface of the semiconductor from which light is to be emitted. In further embodiments, a (110) plane may be exposed by undercutting a device layer of a semiconductor on insulator (SOI) substrate. Alternatively, a pre-etched substrate surface may be bonded to a handling wafer, thinned, and then utilized for PIC waveguide formation. 1. A photonic integrated circuit (PIC) , comprising:a thin film dielectric layer disposed over a substrate;a {100} crystalline device layer disposed over the thin film dielectric layer;an optical waveguide formed in the device layer, wherein a {110} crystal plane of the device layer forms an end facet optically coupled the optical waveguide.2. The PIC of claim 1 , wherein the end facet has an index contrast with an interfacing media sufficient for the {110} crystal plane to induce internal reflection of an optical mode propagated by the waveguide into a <100> direction.3. The PIC of claim 2 , wherein the waveguide is to propagate the optical mode in a first of the <100> directions claim 2 , toward or away from the end facet claim 2 , and the end facet is to reflect the optical mode claim 2 , into or from claim 2 , a second of the <100> directions.4. The PIC of claim 1 , wherein the {110} crystal plane is reentrant from a top surface of the device layer.5. The PIC of claim 4 , further comprises an anti-reflective coating (ARC) layer disposed on the device layer and over the optical waveguide proximate to the end facet.6. ...

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Номер записи: 68
02-01-2014 дата публикации

METHOD FOR PROCESSING SILICON WAFER

Номер: US20140004629A1
Автор: Fujita Hirohisa, Furusawa Kenta, Koyama Shuji, MATSUMOTO Keiji
Принадлежит:

A method for processing a silicon wafer is provided, the method including allowing an etchant to flow along a surface of the silicon wafer to form a line in which a plurality of apertures are arranged in a flow direction of the etchant from an upstream side to a downstream side, wherein the apertures arranged in the line includes a first aperture formed on the most upstream side and a second aperture formed downstream of the first aperture in the flow direction of the etchant, and wherein the first aperture and the second aperture are subjected to different processes after being formed. 1. A method for processing a silicon wafer , the method comprising:allowing an etchant to flow along a surface of the silicon wafer to form a line in which a plurality of apertures are arranged in a flow direction of the etchant from an upstream side to a downstream side,wherein the apertures arranged in the line includes a first aperture formed on the most upstream side and a second aperture formed downstream of the first aperture in the flow direction of the etchant, andwherein the first aperture and the second aperture are subjected to different processes after being formed.2. The method according to claim 1 , whereinthe apertures are arranged in a plurality of lines, andin each of the lines in which the apertures are arranged, the apertures include a first aperture formed on the most upstream side and a second aperture formed downstream of the first aperture in the flow direction of the etchant.3. The method according to claim 1 , wherein claim 1 , in the different processes to which the first aperture and the second aperture are subjected after being formed claim 1 , the first aperture is not used as a liquid supply port formed in a silicon substrate of a liquid ejection head claim 1 , and the second aperture is used as a liquid supply port formed in a silicon substrate of a liquid ejection head.4. The method according to claim 1 , further comprising claim 1 , in the different ...

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Номер записи: 69
16-01-2014 дата публикации

VAPOUR ETCH OF SILICON DIOXIDE WITH IMPROVED SELECTIVITY

Номер: US20140017901A1
Автор: OHARA Anthony
Принадлежит: MEMSSTAR LIMITED

The etching of a sacrificial silicon dioxide (SiO) portion in a microstructure such as a microelectro-mechanical structures (MEMS) by the use an etchant gas, namely hydrogen fluoride (HF) vapour is performed with greater selectivity to other portions within the MEMS, and in particular portions of silicon nitride (SiN). This is achieved by the addition of a secondary non-etchant gas suitable for increase the ratio of difluoride reactive species (HF and HF) to monofluoride reactive species (F, and HF) within the HF vapour. The secondary non-etchant gas may comprise a hydrogen compound gas. The ratio of difluoride reactive species (HF and HF) to the monofluoride reactive species (F, and HF) within the HF vapour can also be increased by setting an etch operating temperature to 20° C. or below. 1. A method of selectively etching silicon dioxide (SiO) from silicon nitride (SiN) in a process chamber so as to produce one or more microstructures , the method comprising:providing the process chamber with an etching vapour comprising hydrogen fluoride (HF); and{'sub': 2', '2', '2, 'sup': −', '−, 'increasing a ratio of difluoride reactive species (HF and HF) to monofluoride reactive species (F, and HF) within the etching vapour by setting an etch operating temperature to 20° C. or below.'}2. A method of selectively etching silicon dioxide (SiO) as claimed in wherein the step of increasing the ratio of difluoride reactive species (HF and HF) to monofluoride reactive species (F claim 1 , and HF) within the etching vapour further comprises providing the process chamber with a non-etchant gas.3. A method of selectively etching silicon dioxide (SiO) as claimed in wherein the non-etchant gas comprises a hydrogen compound gas.4. A method of selectively etching silicon dioxide (SiO) as claimed in wherein the hydrogen compound comprises a compound selected from the group of compounds comprising hydrogen (H) claim 3 , ammonia (NH) claim 3 , methane (CH) claim 3 , ethane (CH) and mixtures ...

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Номер записи: 70
16-01-2014 дата публикации

NONAQUEOUS CLEANING LIQUID AND METHOD FOR ETCHING PROCESSING OF SILICON SUBSTRATE

Номер: US20140017902A1
Автор: Haraguchi Takayuki, Mori Daijiro
Принадлежит:

A nonaqueous cleaning liquid comprising a fluoroalkanol, a quaternary ammonium hydroxide, and an organic solvent. Compounds represented by formulae (1) and (2). Fluoroalkanol compounds include (1) H(CF)CH—OH and (2) F(CF)(CH)—OH In which a and b are each an integer of from 2 to 6, and c is an integer of 1 or 2. 1. A nonaqueous cleaning liquid comprising: (A) a fluoroalkanol; (B) a quaternary ammonium hydroxide; and (C) an organic solvent.3. The nonaqueous cleaning liquid according to claim 1 , wherein the nonaqueous cleaning liquid is used for removal of a fluorocarbon layer.4. The nonaqueous cleaning liquid according to claim 1 , wherein the content of the (A) fluoroalkanol is 0.1 to 50% by mass.5. The nonaqueous cleaning liquid according to claim 1 , wherein the (C) organic solvent comprises an organic solvent selected from glycols and glycol ethers claim 1 , and an aprotic polar organic solvent.6. A nonaqueous cleaning liquid comprising (A) a fluoroalkanol and (C) an organic solvent claim 1 , wherein the (C) organic solvent is a non-amine-based organic solvent which does not contain a fluorine atom.8. The nonaqueous cleaning liquid according to claim 6 , wherein the nonaqueous cleaning liquid is used for removal of a fluorocarbon layer.9. The nonaqueous cleaning liquid according to claim 6 , wherein the content of the (A) fluoroalkanol is 0.1 to 50% by mass.10. The nonaqueous cleaning liquid according to claim 6 , wherein the (C) organic solvent comprises an organic solvent selected from glycols and glycol ethers claim 6 , and an aprotic polar organic solvent.11. A method for etching processing of a silicon substrate claim 6 , comprising:(A-I) forming an etching mask layer having a predetermined pattern on the surface of a silicon substrate;(A-II) etching the surface of the substrate uncovered by the etching mask layer;(A-III) forming a recessed portion having a predetermined depth in the silicon substrate by repeating the following steps (i) and (ii) a ...

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Номер записи: 71
23-01-2014 дата публикации

Silicon substrate having textured surface, and process for producing same

Номер: US20140020750A1
Автор: Hiroshi Tanabe, Ichiro Nakayama, Kouji Arai, Naoshi Yamaguchi, Shigeru Sankawa, Yasushi Taniguchi
Принадлежит: Panasonic Corp

The present invention addresses the problem of providing a novel silicon substrate having a textured surface by dry-etching the surface of a silicon substrate having (111) orientation and thereby forming a texture thereon. The present invention provides a silicon substrate having (111) orientation, said silicon substrate having a textured surface that includes multiple protrusions which each comprise three slant faces and have heights of 100 to 8000 nm. This process for producing a silicon substrate includes: a step of preparing a silicon substrate having (111) orientation; and a step of blowing an etching gas onto the surface of the silicon substrate, said etching gas containing one or more gases selected from the group consisting of ClF3, XeF2, BrF3, BrF5 and NF3.

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Номер записи: 72
23-01-2014 дата публикации

HIGH THROUGHPUT EPITAXIAL LIFT OFF FOR FLEXIBLE ELECTRONICS

Номер: US20140024222A1
Автор: Cheng Cheng-Wei, Shiu Kuen-Ting
Принадлежит: INTERNATIONAL BUSINESS MACHINES CORPORATION

A method of removing a semiconductor device layer from an underlying base substrate is provided in which a sacrificial phosphide-containing layer is formed between a semiconductor device layer and a base substrate. In some embodiments, a semiconductor buffer layer can be formed on an upper surface of the base substrate prior to forming the sacrificial phosphide-buffer layer. The resultant structure is then etched utilizing a non-HF etchant to release the semiconductor device layer from the base semiconductor substrate. After releasing the semiconductor device layer from the base substrate, the base substrate can be re-used. 1. A method of releasing a semiconductor device layer from a base substrate , said method comprising:forming a sacrificial phosphide-containing layer on an upper surface of a base substrate;forming a semiconductor device layer on an upper surface of the sacrificial phosphide-containing layer; andremoving the sacrificial phosphide-containing layer from between the semiconductor device layer and the base substrate, wherein said removing comprises etching with a non-HF containing etchant.2. The method of claim 1 , wherein said base substrate is an III-V compound semiconductor material.3. The method of claim 1 , wherein said base substrate is a Ge-containing semiconductor material.4. The method of claim 3 , further comprising forming a semiconductor buffer layer between the Ge-containing semiconductor substrate and the sacrificial phosphide-containing layer.5. The method of claim 3 , wherein said semiconductor buffer layer is an III-V compound semiconductor material.6. The method of claim 1 , wherein said non-HF etchant is a non-HF containing acid.7. The method of claim 6 , wherein said non-HF containing acid is selected from the group consisting of HCl claim 6 , HBr claim 6 , HI and mixtures thereof.8. The method of claim 1 , wherein said removing the sacrificial phosphide-containing layer utilizing said non-HF containing etchant is performed at a ...

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Номер записи: 73
30-01-2014 дата публикации

METHOD FOR FABRICATING PATTERNED SILICON NANOWIRE ARRAY AND SILICON MICROSTRUCTURE

Номер: US20140030873A1
Автор: Hung Yung-jr, Lee San-liang
Принадлежит: National Taiwan University of Science and Technology

A method for fabricating a patterned silicon nanowire array is disclosed. The method includes: forming a patterned protective layer on silicon nanowire array structures, forming a patterned protective layer on the array of silicon nanowire structures, the patterned protective layer defining a covered region and a uncovered region on the array of silicon nanowire structures; using a selective etching to remove the array of silicon nanowire structures defined on the uncovered region; and removing the patterned protective layer remained on the array of silicon nanowire structures. A method for fabricating a silicon microstructure is also disclosed. 1. A method for fabricating a patterned silicon nanowire array , the method comprising:forming an array of silicon nanowire structures;forming a patterned protective layer on the array of silicon nanowire structures, the patterned protective layer defining a covered region and a uncovered region on the array of silicon nanowire structures;using a selective etching to remove the array of silicon nanowire structures defined on the uncovered region; andremoving the patterned protective layer remained on the array of silicon nanowire structures.2. The method of claim 1 , wherein the step of forming the array of silicon nanowire structures comprises:forming a metal layer with a predetermined thickness on a silicon substrate by a coating process;performing a metal-induced chemical etching for the silicon substrate by using an etching solution;rinsing the metal layer from the silicon substrate.3. The method of claim 1 , wherein the step of forming the patterned protective layer comprises:oxidizing the array of silicon nanowire structures forming an oxide layer on a surface of the array of silicon nanowire structures; andpatterning the oxide layer so that the array of silicon nanowire structures have the oxide layer on the covered region and expose a plurality of silicon nanowires on the uncovered region.4. The method of claim 3 , ...

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Номер записи: 74
30-01-2014 дата публикации

METHODS AND SYSTEM FOR GENERATING A THREE-DIMENSIONAL HOLOGRAPHIC MASK

Номер: US20140030895A1
Автор: Menon Rajesh, WANG Peng
Принадлежит:

A system for surface patterning using a three dimensional holographic mask includes a light source configured to emit a light beam toward the holographic mask. The holographic mask can be formed as a topographical pattern on a transparent mask substrate. A semiconductor substrate can be positioned on an opposite site of the holographic mask as the light source and can be spaced apart from the holographic mask. The system can also include a base for supporting the semiconductor substrate. 1. An iterative pixelated perturbation method of generating a three dimensional holographic mask based on a predetermined three dimensional pattern , comprising:providing a starting pattern for the holographic mask;computing images at multiple planes parallel to the holographic mask using a processor;computing an image metric representing a combination of diffraction efficiency of the holographic mask and fidelity of a resulting image compared with the predetermined pattern for the images at the multiple planes using the processor;perturbing an optic height of a first pixel in the starting pattern to create an intermediate pattern;computing the resulting intermediate images and computing an intermediate metric for the intermediate pattern; anddetermining whether the intermediate metric for the intermediate pattern is an improvement over the metric for the starting pattern.2. The method of claim 1 , wherein the image metric includes at least one of diffraction efficiency claim 1 , image fidelity claim 1 , exposure latitude claim 1 , line-edge roughness claim 1 , manufacturability claim 1 , normalized inverse image slope claim 1 , robustness claim 1 , and throughput.3. The method of claim 2 , wherein the image metric includes diffraction efficiency and image fidelity.4. The method of claim 1 , wherein perturbing the optic height of the first pixel comprises at least one of increasing or decreasing the optic height by a predetermined height unit.5. The method of claim 4 , the method ...

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Номер записи: 75
30-01-2014 дата публикации

POLISHING COMPOSITION AND POLISHING METHOD USING THE SAME

Номер: US20140030897A1
Автор: Ogata Shinichi, Tanimoto Ryuichi, TERAMOTO Masashi
Принадлежит:

Provided is a polishing composition that does not contain abrasives and that is used for polishing a silicon wafer, the polishing composition including a pH buffer, a polishing accelerator, a water-soluble polymer, and a block-type compound. By polishing a silicon wafer by using the polishing composition, a polishing speed of greater than 0.1 μm/min can be achieved. 1. A polishing composition that does not contain abrasives and that is used for polishing a silicon wafer , the polishing composition comprising:a polishing accelerator including an amine compound or an inorganic alkaline compound;a water-soluble polymer; anda block-type compound in which an oxyethylene group and an oxypropylene group are included in a block-type polyether.2. The polishing composition according to claim 1 , further comprising:a pH buffer including a carbonate and a hydrogencarbonate.3. A polishing method for polishing a silicon wafer using the polishing composition according to . The present invention relates to a polishing composition for polishing a silicon wafer, and a polishing method using the same.Conventionally, multi-stage polishing has been performed generally in the polishing of a silicon wafer. More specifically, the following multi-stage polishing has been performed: a silicon wafer is flattened in the primary polishing, and the surface of the silicon wafer is finished more finely in the secondary polishing and subsequent stages.In the primary polishing, a high polishing rate is required and flatness of a silicon wafer is demanded. The conventional polishing composition for the primary polishing contains abrasives in order to improve the polishing rate. As the abrasives, nanometer-order colloidal particles or the like are used.In recent years, as the required accuracy regarding wafer quality increases, the prevention and countermeasure to scratches and LPDs (light point defects) come to be needed in the primary polishing as well.The mechanical polishing with a polishing ...

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Номер записи: 76
06-02-2014 дата публикации

Compositions of Matter, and Methods of Removing Silicon Dioxide

Номер: US20140037527A1
Автор: Nishant Sinha
Принадлежит: Micron Technology Inc

Some embodiments include methods of removing silicon dioxide in which the silicon dioxide is exposed to a mixture that includes activated hydrogen and at least one primary, secondary, tertiary or quaternary ammonium halide. The mixture may also include one or more of thallium, BX 3 and PQ 3 , where X and Q are halides. Some embodiments include methods of selectively etching undoped silicon dioxide relative to doped silicon dioxide, in which thallium is incorporated into the doped silicon dioxide prior to the etching. Some embodiments include compositions of matter containing silicon dioxide doped with thallium to a concentration of from about 1 weight % to about 10 weight %.

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Номер записи: 77
13-02-2014 дата публикации

Semiconductor device and method for fabricating the same

Номер: US20140042554A1
Автор: Ahn Sook YOON
Принадлежит: SK hynix Inc

A semiconductor device is formed by depositing a nitride material having a lower etch rate than an oxide material over or between buried gates when forming a metal contact at an end portion of a cell region, to prevent a lower substrate from being etched during an etching process forming a metal contact hole. The semiconductor device includes at least one buried gate formed in a device isolation film of a semiconductor substrate, an etch stop film formed over and between the buried gates, and a metal contact formed perpendicular to the buried gate in the etch stop film.

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Номер записи: 78
13-02-2014 дата публикации

Method for fabricating an inter dielectric layer in semiconductor device

Номер: US20140045325A1
Автор: Byung Soo Eun
Принадлежит: SK hynix Inc

In a method for fabricating an inter dielectric layer in semiconductor device, a primary liner HDP oxide layer is formed by supplying a high density plasma (HDP) deposition source to a bit line stack formed on a semiconductor substrate. A high density plasma (HDP) deposition source is supplied to the bit line stack to form a primary liner HDP oxide layer. The primary liner HDP oxide layer is etched to a predetermined depth to form a secondary liner HDP oxide layer. An interlayer dielectric layer is formed to fill the areas defined by the bit line stack where the secondary liner HDP oxide layer is located.

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Номер записи: 79
13-02-2014 дата публикации

SUBSTRATE TREATMENT APPARATUS AND SUBSTRATE TREATMENT METHOD

Номер: US20140045339A1
Автор: ANO Seiji, IWATA Keiji, TSUDA Shotaro, TSUJIKAWA Hiroki
Принадлежит:

A substrate treatment apparatus is provided which is used for removing a resist from a front surface of a substrate. The apparatus includes a substrate holding unit which holds the substrate, and a sulfuric acid ozone/water mixture supplying unit which supplies a sulfuric acid ozone/water mixture to the front surface of the substrate held by the substrate holding unit, the sulfuric acid ozone/water mixture being a mixture which is prepared by mixing water with sulfuric acid ozone prepared by dissolving ozone gas in sulfuric acid. 1. A substrate treatment apparatus to be used for removing a resist from a front surface of a substrate , the apparatus comprising:a substrate holding unit which holds the substrate; anda sulfuric acid ozone/water mixture supplying unit which supplies a sulfuric acid ozone/water mixture to the front surface of the substrate held by the substrate holding unit, the sulfuric acid ozone/water mixture being a mixture which is prepared by mixing water with sulfuric acid ozone prepared by dissolving ozone gas in sulfuric acid.2. The substrate treatment apparatus according to claim 1 , wherein the sulfuric acid ozone/water mixture supplying unit includes a liquid mixture nozzle which spouts the sulfuric acid ozone/water mixture toward the front surface of the substrate held by the substrate holding unit.3. The substrate treatment apparatus according to claim 2 , wherein the sulfuric acid ozone/water mixture supplying unit further includes:a mixing portion which mixes the sulfuric acid ozone and the water together;a sulfuric acid ozone supplying portion which feeds the sulfuric acid ozone to the mixing portion; anda liquid mixture supply pipe which supplies the sulfuric acid ozone/water mixture prepared by the mixing in the mixing portion to the liquid mixture nozzle.4. The substrate treatment apparatus according to claim 3 , wherein the sulfuric acid ozone supplying portion includes a sulfuric acid ozone retaining portion which retains the sulfuric ...

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Номер записи: 80
20-02-2014 дата публикации

Substrate processing device and substrate processing method for carrying out chemical treatment for substrate

Номер: US20140051258A1
Автор: Kenji Izumoto, Nobuyuki Shibayama
Принадлежит: Dainippon Screen Manufacturing Co Ltd

It is an object to carry out a chemical treatment for a peripheral edge part of a substrate while suppressing an amount of consumption of a processing liquid and a time required for processing. In order to achieve the object, a substrate processing device injects heating steam to a peripheral edge part of a substrate to heat the peripheral edge part when carrying out a chemical treatment for the peripheral edge part of the substrate while rotating the substrate in a substantially horizontal posture. Moreover, the substrate processing device injects a gas from above the substrate toward a predetermined injection target region defined within a range surrounded by a rotating track of the peripheral edge part of the substrate in an upper surface of the substrate, thereby generating, on the substrate, a gas flow which flows from the injection target region toward the peripheral edge part of the substrate.

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Номер записи: 81
20-02-2014 дата публикации

SUBSTRATE PROCESSING DEVICE AND SUBSTRATE PROCESSING METHOD FOR CARRYING OUT CHEMICAL TREATMENT FOR SUBSTRATE

Номер: US20140051259A1
Автор: SHIBAYAMA Nobuyuki
Принадлежит: DAINIPPON SCREEN MFG. CO., LTD.

It is an object to reduce a chemical treating width in a peripheral edge part of a substrate while suppressing deterioration in each of uniformity of the chemical treating width and processing efficiency. In order to achieve the object, a substrate processing device for carrying out a chemical treatment for a substrate using a processing liquid having a reaction rate increased with a rise in temperature includes a substrate holding portion, a rotating portion for rotating the substrate held in the substrate holding portion in a substantially horizontal plane, a heating portion for injecting heating steam to a central part of a lower surface of the substrate to entirely heat the substrate, and a peripheral edge processing portion for supplying the processing liquid from above to a peripheral edge part of the substrate heated by the heating portion, thereby carrying out a chemical treatment for the peripheral edge part. 1. A substrate processing device for carrying out a chemical treatment for a substrate by using a processing liquid having a reaction rate increased with a rise in temperature , the device comprising:a substrate holding portion for holding a substrate in a substantially horizontal posture;a rotating portion for rotating said substrate held in said substrate holding portion in a substantially horizontal plane;a heating portion for injecting heating steam into a central part of a lower surface of said substrate to entirely heat said substrate; anda peripheral edge processing portion for supplying a processing liquid from above to a peripheral edge part of said substrate which is heated by said heating portion, thereby carrying out a chemical treatment for said peripheral edge part.2. The substrate processing device according to claim 1 , wherein said heating portion injects said steam to the lower surface of said substrate via a supply tube inserted into a rotating support shaft of said substrate holding portion.3. The substrate processing device ...

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Номер записи: 82
27-02-2014 дата публикации

HIGH PRODUCTIVITY COMBINATORIAL WORKFLOW FOR POST GATE ETCH CLEAN DEVELOPMENT

Номер: US20140057371A1
Автор: Foster John
Принадлежит: Intermolecular Inc.

Combinatorial workflow is provided for evaluating cleaning processes after forming a gate structure of transistor devices, to provide optimized process conditions for gate stack formation, including metal gate stack using high-k dielectrics. NMOS and PMOS transistor devices are combinatorially fabricated on multiple regions of a substrate, with each region exposed to a different cleaning chemical and process. The transistor devices are then characterized, and the data are compared to categorize the potential damages of different cleaning chemicals and processes. Optimized chemicals and processes can be obtained to satisfy desired device requirements. 1. A method , comprising:forming a dielectric layer on a substrate;forming a plurality of metal gate stacks over the dielectric layer;defining site isolated regions on the substrate, wherein each site isolated region comprises at least one of the metal gate stacks;{'b': '1', 'applying chemicals to each of the site isolated regions, wherein at least one of the composition or the application condition of the chemicals is varied in a combinatorial manner between the site isolated regions; and p measuring a structural characteristic of a metal-containing layer in the metal gate stacks;'}wherein the chemicals remove a contaminant from at least one of the metal gate stacks.2. The method of claim 1 , wherein varying the application condition comprises:varying a process temperature between room temperature and 85° C.;varying a process time between 10 seconds and 10 minutes; andvarying a concentration of the chemicals between 1 part per 1000 diluted hydrochloric acid and 100% concentration hydrochloric acid.3. The method of claim 1 , wherein removing the contaminant comprises selectively etching the contaminant from the at least one metal gate stack.4. The method of claim 1 , further comprising rinsing the substrate after the chemicals are applied to each of the site isolated regions.5. The method of claim 1 , wherein the ...

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Номер записи: 83
27-02-2014 дата публикации

Method of manufacturing semiconductor device

Номер: US20140057404A1
Автор: Changliang Qin, Huaxiang Yin, Peizhen Hong
Принадлежит: Institute of Microelectronics of CAS

A method of manufacturing a semiconductor device is disclosed. In one embodiment, the method comprises: forming a gate stack on a substrate; etching the substrate on both sides of the gate stack to form C-shaped source/drain grooves; and wet-etching the C-shaped source/drain grooves to form Σ-shaped source/drain grooves. With this method, it is possible to effectively increase stress applied to a channel region, to accurately control a depth of the source/drain grooves, and to reduce roughness of side walls and bottom portions of the grooves and thus reduce defects by etching the C-shaped source/drain grooves and then further wet-etching them to form the Σ-shaped source/drain grooves.

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Номер записи: 84
06-03-2014 дата публикации

REDUCED ISOTROPIC ETCHANT MATERIAL CONSUMPTION AND WASTE GENERATION

Номер: US20140061158A1
Автор: Mayer Steven T., PORTER David W.
Принадлежит: NOVELLUS SYSTEMS, INC.

Methods and apparatus for isotropically etching a metal from a work piece, while recovering and reconstituting the chemical etchant are described. Various embodiments include apparatus and methods for etching where the recovered and reconstituted etchant is reused in a continuous loop recirculation scheme. Steady state conditions can be achieved where these processes are repeated over and over with occasional bleed and feed to replenish reagents and/or adjust parameters such as pH, ionic strength, salinity and the like. 1. A method for processing a work piece , comprising:(a) etching copper from a surface of the work piece in a wet chemical etch chamber with a peroxide-based etchant;(b) electrowinning ions of copper from the used peroxide-based etchant after it exits the wet chemical etch chamber, in an electrowinning module, wherein the electrowinning module is located downstream of the wet chemical etch chamber and comprises an electrowinning cell comprising an anode and a cathode;(c) regenerating the peroxide-based etchant by adding one or more reagents to the electrowinned peroxide-based etchant; and(d) reusing the regenerated peroxide-based etchant for wet chemical etching.2. The method of claim 1 , further comprising passing the peroxide-based etchant through a decomposition tank claim 1 , after wet chemical etching and before electrowinning claim 1 , in order to decompose a peroxide in the peroxide-based etchant.3. The method of claim 2 , wherein greater than about 50% of the peroxide in the peroxide-based etchant decomposes without applying heat or additional reagents to the peroxide-based etchant in the decomposition tank.4. The method of claim 2 , wherein greater than about 50% of the peroxide in the peroxide-based etchant decomposes and a decomposition catalyst is added to the peroxide-based etchant.5. The method of claim 1 , wherein the electrowinning cell comprises a plurality of porous anodes and cathodes6. The method of claim 1 , wherein ...

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Номер записи: 85
06-03-2014 дата публикации

METHODS, PROCESS AND FABRICATION TECHNOLOGY FOR HIGH-EFFICIENCY LOW-COST CRYSTALLINE SILICON SOLAR CELLS

Номер: US20140061531A1
Автор: Faur Horia M., Faur Maria, Faur Mircea
Принадлежит:

Disclosed is a method, process, solar cell design, and fabrication technology for high-efficiency, low-cost, crystalline silicon (Si) solar cells including but not restricted to solar grade single crystal Si (c-Si), multi-crystalline Si (mc-Si), poly-Si, and micro-Si solar cells and solar modules. The RTWCG solar cell fabrication technology creates a RTWCG SiOx thin film antireflection coating (ARC) with a graded index of refraction and a selective emitter (SE). The resulting top surface of the SiOx oxide can be textured (TO) concomitant with the growth process or through an additional mild wet chemical step. 172-. (canceled)73. A composition for room temperature wet chemical growth of an oxide layer on a substrate , the composition comprising:a fluoride source to facilitate etching of the substrate;an inorganic reduction-oxidation system, containing one or more elements selected from I, V, Co, Pb and Ag, to promote an oxidation reaction at a surface of the substrate and thereby facilitate growing of the oxide layer on the substrate based at least in part on consumed substrate resulting from the etching of the substrate; anda non-invasive additive to control a balance between a first rate of the etching of the substrate and a second rate of the growing of the oxide layer;wherein the composition is substantially free of silicon.74. The composition of claim 73 , wherein the composition is substantially free of organic components.75. The composition of claim 73 , wherein the fluoride source is selected from NHF claim 73 , HF claim 73 , HTiF claim 73 , BaF claim 73 , BFand NaF.76. The composition of claim 75 , wherein the fluoride source is HF.77. The composition of claim 73 , wherein said inorganic reduction-oxidation system contains iodine.78. The composition of claim 77 , wherein said inorganic reduction-oxidation system is selected from HIO claim 77 , K claim 77 , BI claim 77 , IO claim 77 , IO claim 77 , IO claim 77 , IF claim 77 , PI claim 77 , PI claim 77 , TiI ...

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Номер записи: 86
13-03-2014 дата публикации

ETCHING METHOD, ETCHING APPARATUS AND CHEMICAL SOLUTION

Номер: US20140073069A1
Автор: Takami Nagisa, Uozumi Yoshihiro
Принадлежит: KABUSHIKI KAISHA TOSHIBA

An etching method according to an embodiment, includes performing etching on a material having tungsten (W) as a main component by using as an etchant a chemical solution having hydrogen peroxide as a main component. The chemical solution contains 12 ppm or more and 100,000 ppm or less of W. 1. An etching method , comprising:performing etching on a material having tungsten (W) as a main component by using as an etchant a chemical solution having hydrogen peroxide as a main component, the chemical solution containing 12 ppm or more and 100,000 ppm or less of W.2. The method according to claim 1 , wherein the chemical solution having been used for the etching is circulated to be used for the etching again.3. The method according to claim 1 , wherein the material to be etched is formed in a bevel portion of a semiconductor substrate.4. The method according to claim 3 , wherein the chemical solution is supplied to the bevel portion.5. The method according to claim 4 , wherein the chemical solution is supplied to the bevel portion on a front surface of the semiconductor substrate.6. The method according to claim 4 , wherein the chemical solution is supplied to a back surface of the semiconductor substrate.7. The method according to claim 4 , wherein the chemical solution is supplied to the bevel portion on a front surface of the semiconductor substrate and a back surface of the semiconductor substrate at a same time.8. The method according to claim 1 , wherein a film of the material is formed on an entire surface of a front surface of a semiconductor substrate.9. The method according to claim 8 , wherein a W film is used as the film.10. The method according to claim 1 , further comprising:measuring a concentration of the W in the chemical solution directly or indirectly before performing etching.11. The method according to claim 1 , further comprising:supplying a solution containing a hydrogen peroxide with or without W into a tank storing the chemical solution to adjust ...

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Номер записи: 87
20-03-2014 дата публикации

METHOD OF FABRICATING SEMICONDUCTOR DEVICE

Номер: US20140080296A1
Автор: Baek Jae-Jik, CHA Ji-Hoon, Han Jeong-Nam, LEE Kwang-Wook, Yoon Bo-Un
Принадлежит:

A method of fabricating a semiconductor device includes forming a gate pattern on a substrate, and etching sides of the gate pattern using a first wet-etching process to form a first recess. The first wet-etching process includes using an etchant containing a first chemical substance including a hydroxyl functional group (—OH) and a second chemical substance capable of oxidizing the substrate. The concentration of the second chemical substance is 1.5 times or less the concentration of the first chemical substance. 1. A method of fabricating a semiconductor device , the method comprising:forming a gate pattern on a substrate; andetching sides of the gate pattern using a first wet-etching process to form a first recess, the first wet-etching process including, using an etchant containing a first chemical substance including a hydroxyl functional group (-OH) and a second chemical substance capable of oxidizing the substrate, and a concentration of the second chemical substance is 1.5 times or less a concentration of the first chemical substance.2. The method of claim 1 , further comprising:etching the first recess on the sides of the gate pattern using a second wet-etching process to form a second recess.3. The method of claim 2 , further comprising:forming a semiconductor pattern in the second recess.4. The method of claim 2 , wherein the etching the first recess forms the second recess having a sigma shaped cross-section.5. The method of claim 1 , wherein the etching uses the first wet-etching process including the etchant containing the first chemical substance including at least one of ammonium hydroxide (NHOH) claim 1 , potassium hydroxide (KOH) and tetramethyl ammonium hydroxide (TMAH) claim 1 , and the second chemical substance including hydrogen peroxide (HO).6. The method of claim 5 , wherein the etching uses the first wet-etching process including the etchant containing NHOH and HO.7. A method of fabricating a semiconductor device claim 5 , the method ...

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Номер записи: 88
20-03-2014 дата публикации

PATTERN-FORMING METHOD AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Номер: US20140080307A1
Автор: Hayashi Teruyuki, Ishikawa Hiraku, Matsuoka Takaaki, Ono Yuji
Принадлежит: TOKYO ELECTRON LIMITED

A pattern-forming method for forming a predetermined pattern serving as a mask when etching film on a substrate includes the steps of: an organic film pattern-forming step for forming an organic film pattern on a film to be processed; forming a silicon nitride film on the organic film pattern; etching the silicon nitride film so that the silicon nitride film remains only on the lateral wall sections of the organic film pattern; and removing the organic film, thereby forming the predetermined silicon nitride film pattern on the film to be processed on a substrate. With the temperature of the substrate maintained at no more than 100° C., the film-forming step excites a processings gas and generates a plasma, performs plasma processing with the plasma, and forms a silicon nitride film having stress of no more than 100 MPa. 1. A method of forming a pattern which serves as a mask when etching a film to be processed on a substrate , the method comprising:forming a pattern of an organic film on the film to be processed of the substrate;forming a silicon nitride film on the pattern of the organic film;etching the silicon nitride film such that the silicon nitride film remains only on a lateral wall section of the pattern of the organic film; andremoving the pattern of the organic film, thereby forming a pattern of the silicon nitride film on the film to be processed on the substrate,wherein when forming the silicon nitride film, a processing gas is excited to generate plasma and a plasma processing by the plasma is performed in a state where the temperature of the substrate is maintained at a temperature of 100° C. or less, thereby forming a silicon nitride film having a film stress of 100 MPa or less.2. The method of claim 1 , wherein the processing gas includes silane gas claim 1 , a gas having a nitrogen atom claim 1 , and hydrogen gas claim 1 , andwhen forming the silicon nitride film, a supply flow rate of the hydrogen gas is controlled to control the film stress of ...

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Номер записи: 89
20-03-2014 дата публикации

ETCHING COMPOSITION AND METHOD FOR ETCHING A SEMICONDUCTOR WAFER

Номер: US20140080313A1
Автор: CHEN Yi-Fan, CHIANG Chi-Fan, CHIANG Hao-Hsiang, LIAO Pin-Guan, Lin Tzer-Shen, Sun Chia-Liang, SUN Wen-Ching, Wang Tai-Jui, Yu Sheng-Min
Принадлежит: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

An etching composition for a semiconductor wafer is provided, including 0.5-50 wt % base, 10-80 wt % alcohol, 0.01-15 wt % additive and water. A method for etching a semiconductor wafer is also provided. When the etching composition is applied to the entire surface or a partial surface of the semiconductor wafer at 60-200° C., the etching composition reacts on the semiconductor wafer to form a foam that etches the semiconductor wafer and includes a solid, a liquid and a gas. At the same time, the additive forms an oxide mask on the surface of the semiconductor wafer. Therefore, an excellent texture structure is formed on the surface of the semiconductor wafer, and a single surface of the semiconductor wafer is etched. 1. An etching composition for etching a semiconductor wafer , comprising:(A) 0.5-50 wt % of base, based on the total weight of the etching composition;(B) 10-80 wt % alcohol, based on the total weight of the etching composition;(C) 0.01-15 wt % additive, based on the total weight of the etching composition,wherein the additive comprises at least one selected from the group consisting of boron oxide, boric acid, potassium borate, sodium tetraborate, aluminum chloride, silicon phosphate, boron phosphate, aluminum phosphate, sulfuric acid, formic acid, acetic acid, citric acid, nitric acid and a combination thereof; and(D) water,wherein the etching composition reacts on the semiconductor wafer at an etching temperature ranging between 120° C. and 200° C. to form a foam that etches the semiconductor wafer and includes a solid, a liquid and a gas.2. The etching composition for etching a semiconductor wafer of claim 1 , wherein the semiconductor wafer is fabricated from silicon claim 1 , germanium or a combination thereof.3. The etching composition for etching a semiconductor wafer of claim 1 , wherein the semiconductor wafer is fabricated from monocrystalline silicon claim 1 , polycrystalline silicon or a combination thereof.4. The etching composition for ...

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Номер записи: 90
05-01-2017 дата публикации

Electronic systems with through-substrate interconnects and mems device

Номер: US20170001858A1
Автор: Charles W. Blackmer, Scott G. Adams
Принадлежит: Kionix Inc

Disclosed are systems, methods, and computer program products for electronic systems with through-substrate interconnects and mems device. An interconnect formed in a substrate having a first surface and a second surface, the interconnect includes: a bulk region; a via extending from the first surface to the second surface; an insulating structure extending through the first surface into the substrate and defining a closed loop around the via, wherein the insulating structure comprises a seam portion separated by at least one solid portion; and an insulating region extending from the insulating structure toward the second surface, the insulating region separating the via from the bulk region, wherein the insulating structure and insulating region collectively provide electrical isolation between the via and the bulk region.

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Номер записи: 91
02-01-2020 дата публикации

METHODS FOR REDUCING GLASS SHEET EDGE PARTICLES

Номер: US20200002222A1
Автор: Liu Jia, Venkatachalam Siva, Zhao Jing
Принадлежит:

A method of manufacturing a glass article includes application of an etch cream to an edge surface of the article. Application of the etch cream can reduce a density of particles on the edge surface to less than about 200 per 0.1 square millimeter. The etch cream can, for example, contain hydrofluoric acid, hydrochloric acid and a thickener. 1. A method for manufacturing a glass article comprising:forming the glass article, wherein the glass article comprises a first major surface, a second major surface parallel to the first major surface, and an edge surface extending between the first major surface and the second major surface in a perpendicular direction to the first and second major surfaces;applying an etch cream to the edge surface of the glass article, wherein application of the etch cream reduces a density of particles on the edge surface.2. The method of claim 1 , wherein the etch cream comprises hydrofluoric acid and hydrochloric acid.3. The method of claim 2 , wherein the method further comprises combining an etch solution and a thickener to make the etch cream claim 2 , wherein a concentration of hydrochloric acid in the etch solution is at least about twice a concentration of hydrofluoric acid in the etch solution.4. The method of claim 3 , wherein the concentration of hydrofluoric acid in the etch solution is at least about 1.5 molar.5156. The method of claim 4 , wherein the concentration of hydrofluoric acid in the etch solution ranges from about . molar to about molar.6. The method of claim 4 , wherein the concentration of hydrochloric acid in the etch solution ranges from about 3 molar to about 12 molar.7. The method of claim 3 , wherein the concentration ratio of hydrochloric acid to hydrofluoric acid in the etch solution ranges from about 2:1 to about 6:1.8. The method of claim 1 , wherein application of the etch cream reduces a density of particles on the edge surface to less than about 200 per 0.1 square millimeter.9. The method of claim 1 , ...

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Номер записи: 92
02-01-2020 дата публикации

THIN-FILM DEPOSITION METHOD AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

Номер: US20200002812A1
Автор: Choi SeungWoo, Kang SungKyu, KIM Minsoo, LEE Eunsook, Lee ManSu
Принадлежит:

A method of depositing a thin film having a desired etching characteristic while improving a loss amount and loss uniformity of a lower film includes, on the semiconductor substrate and the pattern structure: a first operation of depositing a portion of the thin film by repeating a first cycle comprising (a1) a source gas supply operation, (b1) a reactant gas supply operation, and (c1) a plasma supply operation for a certain number of times; a second operation of depositing a remaining portion of the thin film by repeating a second cycle comprising (a2) a source gas supply operation, (b2) a reactant gas supply operation, and (c2) a plasma supply operation for a certain number of times after the first operation, wherein a supply time of the source gas supply operation (a1) is longer than a supply time of the source gas supply operation (a2). 1. A method of depositing a thin film on a pattern structure of a semiconductor substrate , the method comprising , on the semiconductor substrate and the pattern structure:a first operation of depositing a portion of the thin film by repeating a first cycle comprising a source gas supply operation (a1), a reactant gas supply operation (b1), and a plasma supply operation (c1) for a certain number of times; anda second operation of depositing a remaining portion of the thin film by repeating a second cycle comprising a source gas supply operation (a2), a reactant gas supply operation (b2), and a plasma supply operation (c2) for a certain number of times after the first operation,wherein a supply time of the source gas supply operation (a1) is longer than a supply time of the source gas supply operation (a2).2. The method of claim 1 , wherein the supply time of the source gas supply operation (a1) is two to five times the supply time of the source gas supply operation (a2).3. The method of claim 1 , wherein the supply time of the source gas supply operation (a1) is 0.2 seconds to 1 second.4. The method of claim 1 , wherein the ...

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Номер записи: 93
05-01-2017 дата публикации

PATTERN-FORMING METHOD

Номер: US20170003592A1
Автор: ISHIKAWA Masayoshi, Kawazu Tomoharu, SEKO Tomoaki, SUZUKI Junya, TAKIMOTO Yoshio, Tanaka Hiromitsu
Принадлежит: JSR Corporation

A pattern-forming method comprises: forming a resist underlayer film on an upper face side of a substrate; forming a silicon-containing film on an upper face side of the resist underlayer film; and removing the silicon-containing film with a basic aqueous solution. The pattern-forming method does not include, after the forming of the silicon-containing film and before the removing of the silicon-containing film, treating the silicon-containing film with a treatment liquid comprising an acid or a fluorine compound. The silicon-containing film is preferably formed a hydrolytic condensation product of a composition containing a compound represented by formula (1) in an amount of no less than 60 mol % with respect to total silicon compounds. X represents a halogen atom or —OR, and Rrepresents a monovalent organic group. 1. A pattern-forming method comprising:forming a resist underlayer film on an upper face side of a substrate;forming a silicon-containing film on an upper face side of the resist underlayer film;forming a resist pattern on an upper face side of the silicon-containing film;etching the silicon-containing film using the resist pattern as a mask; andremoving the silicon-containing film with a basic aqueous solution,wherein the pattern-forming method does not comprise, after the forming of the silicon-containing film and before the removing of the silicon-containing film, treating the silicon-containing film with a treatment liquid comprising an acid or a fluorine compound.2. The pattern-forming method according to claim 1 , wherein the silicon-containing film is formed from a hydrolytic condensation product of a composition comprising a compound represented by formula (1) in an amount of no less than 60 mol % with respect to total silicon compounds claim 1 ,{'br': None, 'sub': '4', 'SiX\u2003\u2003(1)'}{'sup': 2', '2, 'wherein, in the formula (1), X represents a halogen atom or —OR, wherein Rrepresents a monovalent organic group.'}3. The pattern-forming ...

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Номер записи: 94
01-01-2015 дата публикации

ETCHANT, METHOD OF MANUFACTURING METAL WIRING AND THIN FILM TRANSISTOR SUBSTRATE USING THE ETCHANT

Номер: US20150004758A1
Автор: CHOUNG Jong-Hyun, JEONG Jae-Woo, KIM In-Bae, Kuk In-Seol, LEE Suck-Jun, Nam Gi-Yong, PARK Hong-Sick, PARK Young-Chul, YOON Young-Jin, YU In-Ho
Принадлежит:

An etchant composition includes about 0.5 weight % to about 20 weight % of persulfate, about 0.01 weight % to about 2 weight % of a fluoride compound, about 1 weight % to about 10 weight % of an inorganic acid, about 0.5 weight % to about 5 weight % of a cyclic amine compound, about 0.1 weight % to about 10.0 weight % of a compound having an amino group and a sulfonic acid, about 0.1 weight % to about 15.0 weight % of an organic acid or a salt thereof, and water to 100 weight % of the etchant composition. 1. An etchant composition comprising:0.5 weight % to 20 weight % of persulfate,0.01 weight % to 2 weight % of a fluoride compound,1 weight % to 10 weight % of an inorganic acid,0.5 weight % to 5 weight % of a cyclic amine compound0.1 weight % to 10.0 weight % of a compound having an amino group and a sulfonic acid,0.1 weight % to 15.0 weight % of an organic acid or a salt thereof, andwater to a total of 100 weight % of the etchant composition;wherein the weight percents are based on a total weight of the etchant composition.2. The etchant composition of claim 1 , wherein the persulfate is at least one of potassium persulfate (KSO) claim 1 , sodium persulfate (NaSO) claim 1 , and ammonium persulfate ((NH)SO).3. The etchant composition of claim 1 , wherein the fluoride compound is at least one of ammonium fluoride claim 1 , sodium fluoride claim 1 , potassium fluoride claim 1 , ammonium bifluoride claim 1 , sodium bifluoride claim 1 , and potassium bifluoride.4. The etchant composition of claim 1 , wherein the inorganic acid is at least one of nitric acid claim 1 , sulphuric acid claim 1 , phosphoric acid claim 1 , and perchloric acid.5. The etchant composition of claim 1 , wherein the cyclic amine compound is at least one of aminotetrazole claim 1 , imidazole claim 1 , indole claim 1 , purine claim 1 , pyrazole claim 1 , pyridine claim 1 , pyrimidine claim 1 , pyrrole claim 1 , pyrrolidine claim 1 , and pyrroline.7. The etchant composition of claim 6 , wherein the ...

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Номер записи: 95
01-01-2015 дата публикации

INTEGRATED CIRCUIT FABRICATION

Номер: US20150004786A1
Автор: Freeman Eric, Lee John, Liu Zengtao, Nielsen Russell, Tran Luan C.
Принадлежит:

A method for defining patterns in an integrated circuit comprises defining a plurality of features in a first photoresist layer using photolithography over a first region of a substrate. The method further comprises using pitch multiplication to produce at least two features in a lower masking layer for each feature in the photoresist layer. The features in the lower masking layer include looped ends. The method further comprises covering with a second photoresist layer a second region of the substrate including the looped ends in the lower masking layer. The method further comprises etching a pattern of trenches in the substrate through the features in the lower masking layer without etching in the second region. The trenches have a trench width. 1. (canceled)2. A method for integrated circuit fabrication , comprising:forming a plurality of mask lines in a first region of an integrated circuit structure, wherein the mask lines form loops, each loop having looped ends at ends of the loop;depositing a selectively definable material over the integrated circuit structure;patterning the selectively definable material to expose portions of the mask lines between the loop ends, while covering a width of the mask lines at the loop ends, and while defining a plurality of features in a second region of the integrated circuit structure, wherein the patterned selectively definable material and the exposed portions of the mask lines form a mask; andtransferring a pattern defined by the mask to underlying material.3. The method of claim 2 , wherein the selectively definable material comprises photoresist.4. The method of claim 2 , wherein the selectively definable material is disposed on a level above the mask lines claim 2 , further comprising a layer of planarizing material disposed on a same level as the mask lines.5. The method of claim 2 , wherein the first region is an array region.6. The method of claim 5 , wherein the second region is a periphery region.7. The method of ...

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Номер записи: 96
07-01-2016 дата публикации

Lcd panel and method for forming the same

Номер: US20160004133A1
Автор: Chenghung Chen, Chengming He
Принадлежит: Shenzhen China Star Optoelectronics Technology Co Ltd

The present invention discloses a liquid crystal display (LCD) panel and method for forming the same. In the LCD panel, the TFT includes a source and a drain formed by a transparent conducting layer, and a gate formed by a metal layer. The source is electrically connected with a data line through a via hole over the data line. The source connects to the drain via an active layer. Whatever the number of data lines are, each pixel corresponds to an associated via hole, so the number of via holes does not increase, and not reduce the aperture ratio. Therefore, the present invention is very proper to a design using more data lines and working in a high frequency. Moreover, the matrix circuitry of LCD of the present invention is well applied in a display which not only increases a density of data lines to raise the frame rate, but also maintains the aperture ratio and brightness.

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Номер записи: 97
05-01-2017 дата публикации

SELECTIVE DEPOSITION OF SILICON OXIDE FILMS

Номер: US20170004974A1
Автор: Mallick Abhijit Basu, Manna Pramit
Принадлежит:

Embodiments described herein generally provide a method for filling features formed on a substrate. In one embodiment, a method for selectively forming a silicon oxide layer on a substrate is provided. The method includes selectively depositing a silicon oxide layer within a patterned feature formed on a surface of a substrate, wherein the patterned feature comprises one or more sidewalls and a deposition surface at a bottom of the patterned feature, the one or more sidewalls comprise a silicon oxide, a silicon nitride, or a combination thereof, the deposition surface essentially consists of silicon, and the selectively deposited silicon oxide layer is formed on the deposition surface by flowing tetraethyl orthosilicate (TEOS) and ozone over the patterned feature. 1. A method for selectively forming a silicon oxide layer on a substrate , comprising:selectively depositing a silicon oxide layer within a patterned feature formed on a surface of a substrate, wherein the patterned feature comprises one or more sidewalls and a deposition surface at a bottom of the patterned feature, the one or more sidewalls comprise a silicon oxide, a silicon nitride, or a combination thereof, the deposition surface essentially consists of silicon, and the selectively deposited silicon oxide layer is formed on the deposition surface by exposing the patterned feature to tetraethyl orthosilicate (TEOS) and ozone.2. The method of claim 1 , further comprising:after the selectively depositing a silicon oxide layer within the patterned feature, annealing the selectively deposited silicon oxide layer.3. The method of claim 2 , further comprising:after the annealing the selectively deposited silicon oxide layer, wet etching the silicon oxide layer.4. The method of claim 1 , wherein the tetraethyl orthosilicate (TEOS) flows into a 300 mm substrate processing chamber at a rate between 400 mg/minute and 2 g/minute.5. The method of claim 4 , wherein the ozone flows into the 300 mm substrate ...

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Номер записи: 98
05-01-2017 дата публикации

Monitor process for lithography and etching processes

Номер: US20170005015A1
Автор: Jhen-Cyuan Li, Shui-Yen Lu, Yi-Lin Chen
Принадлежит: United Microelectronics Corp

A monitor process for lithography and etching processes includes the following steps. A first lithography process and a first etching process are performed to define a first alignment mark having a first direction portion orthogonal to a second direction portion. A second lithography process is performed to overlap a part of the first direction portion as well as a part of the second direction portion, thereby maintaining an exposed area of the first alignment mark having a first corresponding direction portion and a second corresponding direction portion. A first critical dimension of the first corresponding direction portion and a second critical dimension of the second corresponding direction portion are measured.

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Номер записи: 99
13-01-2022 дата публикации

FINFET DEVICES

Номер: US20220013413A1
Автор: Basker Veeraraghavan S., Cheng Kangguo, STANDAERT Theodorus E., Wang Junli
Принадлежит:

FinFET devices and processes to prevent fin or gate collapse (e.g., flopover) in finFET devices are provided. The method includes forming a first set of trenches in a semiconductor material and filling the first set of trenches with insulator material. The method further includes forming a second set of trenches in the semiconductor material, alternating with the first set of trenches that are filled. The second set of trenches form semiconductor structures which have a dimension of fin structures. The method further includes filling the second set of trenches with insulator material. The method further includes recessing the insulator material within the first set of trenches and the second set of trenches to form the fin structures. 1. A method of forming dummy gates in a semiconductor structure , the method comprising:providing a substrate comprising one or more semiconductor fins and providing a dummy gate material over the substrate;etching a first set of trenches through the dummy gate material;filling the first set of trenches with one or more first trench-filling materials;subsequent to filling the first set of trenches, etching a second set of trenches, alternating with the first set of trenches, through the dummy gate material; andfilling the second set of trenches with one or more second trench-filling materials to form dummy gates in regions between the first trench-filling materials and the second trench-filling materials.2. The method of claim 1 , wherein forming the first set of trenches comprises:forming a plurality of first mandrels;forming first sidewall spacers on the plurality of first mandrels; andremoving the plurality of first mandrels.3. The method of claim 2 , wherein a pitch of the first set of trenches is approximately one-half of a pitch of the plurality of first mandrels.4. The method of claim 1 , wherein etching the second set of trenches comprises:using portions of the one or more first trench-filling materials extending above the ...

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Номер записи: 100