УСТРОЙСТВО ДЛЯ ПОЛУЧЕНИЯ ПОСЛЕДОВАТЕЛЬНОСТИ КАДРОВ ИЗОБРАЖЕНИЯ

Изобретение относится к телевизионной технике и может быть использовано в системах наблюдения быстропротекающих процессов. Устройство для получения последовательности кадров изображения содержит оптически связанные и последовательно соединенные оптоволоконный преобразователь и камеру с матричным фотоприемником, который работает в режиме переноса зарядовых пакетов из области фотоэлектрического преобразования в область буферного хранения. Области фотоэлектрического преобразования и буферного хранения разделены на чередующиеся между собой секции, причем рядом с каждой секцией фотоэлектрического преобразования расположена секция буферного хранения, количество строк в которой в k раз больше количества строк в секции фотоэлектрического преобразования, где k - количество получаемых кадров, а оптоволоконный преобразователь на выходе разделен на блоки, представляющие собой упорядоченные ряды оптических волокон, торцы которых состыкованы и оптически связаны с секциями фотоэлектрического преобразования ...

ФОТОЧУВСТВИТЕЛЬНЫЙ ПРИБОР С ЗАРЯДОВОЙ СВЯЗЬЮ

... 1. Фоточувствительный прибор с зарядовой связью, содержащий полупроводниковую подложку первого типа проводимости, область подложки с объемным каналом переноса второго типа проводимости в приповерхностной части полупроводниковой подложки первого типа проводимости, области стоп - диффузии с высокой концентрацией примеси первого типа проводимости в приповерхностной области подложки, ограничивающие по периметру область канала переноса, слой подзатворного диэлектрика на поверхности подложки, обеспечивающую перенос заряда, фоточувствительную область первого типа проводимости в приповерхностной области подложки внутри области объемного канала переноса второго типа проводимости, имеющую область перекрытия с областью стоп - диффузии с образованием в этой области перекрытия омического контакта, причем область объемного канала переноса второго типа проводимости под обеспечивающей перенос заряда фоточувствительной областью имеет меньшую по величине концентрацию примеси, чем эта фоточувствительная область ...

СПОСОБ И УСТРОЙСТВО ИЗМЕРЕНИЯ УГЛОВЫХ КООРДИНАТ ЗВЕЗД

Изобретение относится к оптико-электронному приборостроению и может быть использовано в оптико-электронных приборах (ОЭП) ориентации по звездам, содержащих матричный фотоприемник с накоплением заряда. Решение заключается в проецировании на фоточувствительную площадку фотоприемника через объектив изображения участка звездного неба в трех или более спектральных диапазонах и калибрационных меток с изменяемым временем экспозиции, выделении изображений звездных объектов во всех спектральных диапазонах и формировании мультиспектрального изображения звездных объектов путем выбора по каждому звездному объекту изображения того спектрального диапазона, средняя величина амплитуды в котором оказывается наибольшей, измерении линейных координат центров изображений звезд и калибрационных отметок и пересчете линейных координат центров изображений звезд в угловые координаты звезд в базовой приборной системе координат с учетом результатов измерений линейных координат центров изображений калибрационных отметок ...

ЭЛЕКТРОННО-ЧУВСТВИТЕЛЬНАЯ МАТРИЦА С ПЕРЕНОСОМ ЗАРЯДА ДЛЯ ЭЛЕКТРОННО-ОПТИЧЕСКИХ ПРЕОБРАЗОВАТЕЛЕЙ (ВАРИАНТЫ)

Изобретение относится к области производства электронно-оптических приборов, а именно к области производства электронно-чувствительных матриц для электронно-оптических преобразователей (ЭОП), и может быть использовано при изготовлении указанных преобразователей. Технический результат заключается в создании конструкции ЭЧПЗС-матрицы, которая обеспечивает работоспособность ЭОП при таком расположении матрицы, когда она обращена к микроканальной пластине своей рабочей поверхностью. При этом ЭОП может работать при пониженном напряжении, прикладываемом между микроканальной пластиной и поверхностью ПЗС-матрицы, и, кроме того, уменьшается диаметр ЭОП. Этот результат достигается тем, что электронно-чувствительная матрица содержит систему электропроводящих островков, изолированных друг от друга слоем диэлектрика, который также покрыт электропроводящим слоем, не контактирующим с островками. 2 н.п. ф-лы, 2 ил.

УСТРОЙСТВО ВВОДА НА ПРИБОРАХ С ЗАРЯДОВОЙ СВЯЗЬЮ

Устройство ввода на приборах с зарядовой связью, содержащее МДП транзисторы, шины управления и ячейку ввода, затворы которой изолированы от полупроводниковой подложки диэлектриком, отличающееся тем, что, с целью повышения чувствительности, устройство содержит дополнительную ячейку ввода, причем входной затвор дополнительной ячейки ввода электрически изолирован от шин управления, расположен по крайней мере на 1/10 под входным затвором ячейки и изолирован от него дополнительным диэлектриком.

ФОТОЧУВСТВИТЕЛЬНАЯ МАТРИЦА ПРИБОРОВ С ПЕРЕНОСОМ ЗАРЯДА

Фоточувствительная матрица приборов с переносом заряда, включающая полупроводниковую подложку дырочного типа проводимости, легированную индием, эпитаксиальный слой электронного типа, диэлектрический слой SiO2 и размещенные на его поверхности затворы переноса из поликристаллического кремния, отличающаяся тем, что, с целью разделения функций считывания и накопления, эпитаксиальный слой на границе с подложкой содержит подслой, легированный индием.

ЯЧЕЙКА ПРИЕМНИКА ИЗОБРАЖЕНИЯ

Изобретение относится к интегральным фотоэлектричеким преобразователям на приборах с зарядовой связью. Цель изобретения - повышение чувствительности и расширение динамического диапазона. Ячейка содержит элемент ввода заряда, электроды переноса регистра сдвига и области, ограничивающие канал переноса. Электрод переноса разделен на две части, между которыми размещен элемент ввода заряда. В такой конструкции элемент ввода заряда и области, ограничивающие канал переноса, являясь высоколегированными областями, максимально удалены друг от друга, в результате увеличивается пробивное напряжение и соответственно уровень питающих напряжений и снижение шумов, что и приводит к расширению динамического диапазона и повышению чувствительности. 1 ил.

УСТРОЙСТВО ВВОДА СИГНАЛА НА ПРИБОРАХ С ЗАРЯДОВОЙ СВЯЗЬЮ

УСТРОЙСТВО СЧИТАВАНИЯ НА ПРИБОРАХ С ЗАРЯДОВОЙ СВЯЗЬЮ

Изобретение относится к интегральной микроэлектронике и может быть использовано в системах обработки оптической информации. Целью изобретения является выделение разности двух последовательных сигналов. Устройство считывания содержит полупроводниковую подложку с выходной диффузионной областью противоположного типа проводимости, слой диэлектрика и расположенные на нем два входных затвора, последовательный многовходовый коммутатор, при этом каждый канал дополнительно содержит два идентичных выходных устройства, включающих затвор переноса и выходную диффузионную область, три МДН-транзистора, три шины управления, шину считывания, причем затвор переноса подключен к первой шине управления, сток первого МДП-транзистора соединен с второй шиной управления, затвор с третьей шиной управления, исток с выходной диффузионной областью, сток второго МДП-транзистора с шиной питания, затвор с выходной областью, сток третьего МДП-транзистора с истоком второго МДП-транзистора, затвор с выходом МДП-коммутатора ...

СПОСОБЫ ПРЕДОТВРАЩЕНИЯ ГЛЮКОНИЛИРОВАНИЯ БЕЛКОВ

... 1. Способ предотвращения глюконилирования полипептида, экспрессируемого в микроорганизме, включающий в себя выращивание указанного микроорганизма в насыщенной культуральной среде. 2. Способ по п.1, где микроорганизм не обладает существенной 6-фосфоглюконолактоназной активностью при росте на минимальной среде. 3. Способ по п.1, где микроорганизм представляет собой E. coli. 4. Способ по п.3, где микроорганизм E. coli представляет собой В-штамм. 5. Способ по п.1, где насыщенная культуральная среда включает в себя комплексный источник азота. 6. Способ по п.5, где насыщенная культуральная среда способна поддерживать клеточный рост при концентрации комплексного источника азота и плотности клеток в соотношении 1:1. 7. Способ по п.5, где комплексный источник азота содержит триптон. 8. Способ по п.5, где комплексный источник азота содержит пептон. 9. Способ по п.5, где комплексный источник азота содержит дрожжевой экстракт. 10. Способ по п.1, где культуральная среда представляет собой Superbroth ...

MATRIX ON INSTRUMENTS WITH CHARGE CONNECTION

CHARGE-TRANSFER DEVICE FOR CODING IMAGE BY ORTHOGONAL FUNCTIONS

MATPИЦA HA OCHOBE ПPИБOPOB C ЗAPЯДOBOЙ CBЯЗЬЮ

DEVICE FOR PROCESSING INFORMATION

ПPИБOP C ЗAPЯДOBOЙ CBЯЗЬЮ C BИPTУAЛЬHOЙ ФAЗOЙ

ЛИHEЙHЫЙ ФOTOЧУBCTBИTEЛЬHЫЙ ПPИБOP C ПEPEHOCOM ЗAPЯДOB

ФOTOЧУBCTBИTEЛЬHЫЙ ПPИБOP C ЗAPЯДOBOЙ CBЯЗЬЮ

Матричный формирователь сигналов изображения

Фоточувствительная микросхема с зарядовой связью

ФОТОЧУВСТВИТЕЛЬНАЯ МИКРОСХЕМА С ЗАРЯДОВОЙ СВЯЗЬЮ, содержащая, по крайней мере, два ряда фоточувствительных элементов и, по крайней меИзобретение относится к оптоэлектронике и может быть использовано в качестве приемника изображения в спектроаональных сканирующих устройствах, ; Известен формирователь сигналов изображения (ФСИ) с зарядовой связью, содержащий один ряд фоточувствительнык элементов, сдвиговый регистр с устройством вывода, отделенный от фо-точувствительных элементов затвором переноса. Недостатком такого ФСИ с зарядовой связью является низкая надежность , так как он выходит из строя при отказе хотя бы одного функционального элемента. Наиболее близким техническим решением является фоточувствительная микросхема с зарядовой связью, содержащая по крайней мере два ряда фоточувствительных элементов и по крайней ре, два сдвиговых регистра с устройствами вывода, отделенные от фоточувствительных элементов электродами переноса , причем каждый ряд фоточувствительных элементов, сдвиговый ...

Способ управления фоточувствительным прибором с зарядовой связью

Применение: изобретение относится к области фоточувствительных микросхем, в частности к способу управления ФПЗС, и может быть использовано в автоматике и робототехнике для обработки изображений. Сущность изобретения: распознавание образов на изображении, описываемых одноИзобретение относится к области фоточувствительных микросхем, в частности к способу управления ФПЗС и может быть использовано в автоматике и робототехнике для обработки изображения. Целью изобретения является повышение точности распознавания образов на изображении, описываемых однозначными функциями по вертикальной координате за счет согласованных с заданной траекторией выборки и накоплении информации. значными по кооолинате ФУНКЦИЯМИ, за счет согласованной с заданной траекторией выборки и накопления информации. Способ управления фоточувствительным прибором с зарядовой связью, состоящим из матрицы фоточувствительных элементов и выходного сдвигового регистра, допускающим передачу информации в обоих направлениях, включает ...

Матрица на основе приборов с зарядовой связью

Формирователь кодированных сигналов

Использование: формирователь кодированных сигналов предназначен для использования в качестве датчика видеосигнала в системах обнаружения, передачи и анализа изображений. Сущность изобретения: упрощение блока коммутации, который необходим для управления формированием. К транзисторам сброса, входящим в блоки коммутации, подключены пары горизонтальных кодирующих шин: одна к истоку, другая - к стоку, б ил.

Architektur für fixierende Fokalebenenmatrix von Mehrfachanwendungen

FARBFILTER UND VERFAHREN ZUR HERSTELLUNG DESSELBEN

Divided drain horizontally constructed charge coupled device - has N-plus heat diffusion region with divided drain controlled by reset-gate spanning both drain sections

The device comprises alternating two-phase overlapping double gate structures (2, 5) overlaying an n+ float diffusion region (1) that divides into two sections as it passes under the overlying reset gate (2). The overlapping gate structures cover the float diffusion region to form a charge coupled device with buried canals (3), while the reset gate control line (RG) is connected to the second double gate so as to operate in conjunction with the applied switching signal. Both of the divided float diffusion areas are connected to the reset drain (RD), so that in operation, the reset gate connection to the second double gate control signal controls the flow of charge to the divided float diffusion areas. ADVANTAGE - Average noise value is lower across divided float diffusion area.

OPTOELEKTRONISCHER SENSOR

Two-dimensional CCD image sensor, image acquisition method for a moving scene and control device and method for the image sensor

This two-dimensional CCD image sensor has photosensor (photodetector) elements 1 arranged in a matrix (array) with associated row storage cells 2, 3 and column storage cells 4, 5. Each sensor (detector) element 1 is surrounded in a ring by at least eight storage cells 2 to 9 arranged one after another, four of which are in each case disconnected by potential-blocking regions 10, 11 from the sensor element 1 and are assigned to the corresponding neighbouring sensor elements. The electrodes 26, 27 of the mutually corresponding row storage cells 2, 3 of a sensor-element row are each connected to one common row-control line A, B and the electrodes 34, 35 of the mutually corresponding column storage cells 4, 5 of a sensor-element column are each connected to a common column-control line C, D. The row storage cells 3, 55 lying opposite each other in each case and the column storage cells 34, 54 lying opposite each other in each case, of neighbouring sensor elements, are disconnected from one ...

Verfahren zur Herstellung eines ladungsgekoppelten Halbleiterbauelements mit vergrabenem Kanal (BCCD)

Aktive Pixelsensorzelle

CCD-Bildwandler mit senkrechtem Ueberlaufdrain.

Lichtempfindliche Vorrichtung mit nebeneinanderliegenden Leseregistern

HALBLEITER

PBS-PBSE-INFRAROTDETEKTOR-ANORDNUNG UND VERFAHREN ZU IHRER HERSTELLUNG

OPTISCHE SENSORVORRICHTUNG

Bildfächensensor vom Interline-Transfer-Typ mit einer Elektrodenstruktur für jeden Pixel

Burried channel charge injection device sensor - has imaging points, each with adjacent spaced overflow channel with threshold adjusting electrode inbetween

The substrate of doped semiconductor material has a substrate terminal and one or several matrix-shaped separate imaging points in rows and columns. Each imaging point consists of an insulating layer capacitor(s). The capacitor electrodes are conductively connected in each imaging point row, or column. An overflow channel (9) passes each imaging point at a set distance. An electrode (90) is provided between the imaging point and the overflow channel for adjustment of variable potential thresholds. Preferably an overflow channel extends along each imaging point row and/or column at the longitudinal side. The adjusting electrode is strip-shaped and covers the entire intermediate space between the row and/or column and the overflow channel.

HALBLEITER-BILDSENSOR MIT CCD-SCHIEBEREGISTER

HALBLEITER-FERNSEHKAMERA

Festkörper-Bildaufnehmer mit hoher Empfindlichkeit und geringem Rauschen durch Verringerung der elektrostatischen Kapazität der Verdrahtung

Sensor module for measurement camera has charge-coupled device sensor unit in housing and plate-shaped bearer unit between housing surface and charge-coupled device sensor unit that carries sensor unit

The sensor module has a charge-coupled device sensor unit (4) arranged in a housing and a plate-shaped bearer unit (6) between a housing surface (8) and the charge-coupled device sensor unit that carries the charge-coupled device sensor unit. The thermal expansion of the aluminum nitrite bearer unit corresponds to the thermal expansion of the charge-coupled device sensor unit. Independent claims are also included for the following: (a) a charge-coupled device sensor unit (b) and a camera with an inventive sensor module.

VERFAHREN ZUR HERSTELLUNG EINES INFRAROTEMPFINDLICHEN SILIZIUM-SUBSTRATS MIT INTEGRIERTER VERARBEITUNGSELEKTRONIK

FESTKÖRPERBILDSENSOR.

BILDWANDLER MIT REDUZIERTEM SCHMIEREFFEKT.

Strahlungsarme Abdeckgläser und deren Verwendung

Die Erfindung betrifft strahlungsarme Abdeckgläser für strahlungsempfindliche Sensoren, insbesondere in der Halbleitertechnologie, mit geringer alpha-Eigenstrahlung, umfassend eine Glaszusammensetzung, ausgewählt aus Aluminosilikatglas, Aluminoborosilikatglas, Borosilikatglas, insbesondere alkalifreiem Borosilikatglas, mit einem TiO¶2¶-Gehalt im Bereich von > 0,1-10 Gew.-%, insbesondere 1-8 Gew.-%.

Ladungsgekoppelte Vorrichtung

Eine Metallverdrahtungsschicht (2), eine Mehrzahl von Metallpfropfen (3), eine Metallverdrahtungsschicht (4), eine Mehrzahl von Metallpfropfen (5), eine Metallverdrahtungsschicht (6), eine Mehrzahl von Metallpfropfen (7) und eine Metallverdrahtungsschicht (8) sind so bereitgestellt, dass sie einen Raum umgeben, der sich von einem photoelektrischen Wandlerelement (1) aus in der Richtung senkrecht zu einer Hauptoberfläche eines Halbleitersubstrats (10) befindet. Diese Metallteile bilden einen Lichtpfad. Der Lichtpfad reflektiert von außen einfallendes Licht und verhindert dadurch, dass das einfallende Licht zu anderen photoelektrischen Wandlerelementen gelangt. Somit ist es möglich, eine ladungsgekoppelte Vorrichtung zu gewinnen, in der der Nachteil von Farbdispersion und Farbverschmierung zwischen einander benachbarten Pixeln verringert ist.

LADUNGSGEKOPPELTE HALBLEITERBAUELEMENTE

Charge injection photoelectric sensor matrix - for large number of picture elements has current amplifier and integrator giving output independent of chip size

The charge injection photoelectric sensor matrix consists of an n-type Si substrate with a transparent SiO2 layer on one side carrying the transparent electrode matrix and a substrate electrode on the other side. The substrate electrode is connected to the low-ohmic input (61) of a current amplifier (6). The output of this amplifier is coupled to the input of a resettable integrator (7) whose own output is connected via an on/off switch (9) to a capacitive store (8). The output signal from this circuit decreases as the area of the matrix increases -- i.e. the output is independent of chip size and therefore allows the matrix to have more than 104 picture elements.

Festkörper-Bildaufnahmeanordnung und Steuerverfahren dafür

Ein Verfahren und eine Vorrichtung zur selektiven Beleuchtung bei einem Scanner

Es ist ein Scanner offenbart, der eine Teilbreite einer Abtastlinie beleuchtet. Der Scanner bestimmt zuerst die benötigte Abtastbreite und führt dann eine Abtastung durch, bei der nicht die volle Breite der Abtastung beleuchtet ist.

FESTKOERPER-BILDWANDLER

LADUNGS-TRANSFERVORRICHTUNG

BILDAUFNAHMEANORDNUNG

Verfahren und Vorrichtung zum Sortieren von körnigen Objekten mit mindestens zwei verschiedene Schwellwerten

Image sensor with vertical and horizontal CCDs

A solid state image sensor, with a horizontal CCD (HCCD) and several vertical CCDs (VCCDs), has a second conductivity type well region (33) formed in a first conductivity type semiconductor substrate (31), a first conductivity type horizontal CCD (HCCD) formed on the well region and several spaced polysilicon gate electrodes (37) formed with sequentially different lengths on the substrate or on a gate insulation layer (39) on the HCCD. Also claimed is a process for producing the above image sensor by producing the well region (33) and the HCCD, producing a gate insulation layer (39) on the HCCD and then producing and structuring a polysilicon layer (37a) on the gate insulation layer to form gate electrodes (37) with sequentially decreasing length in the charge passage direction.

VON HINTEN BELEUCHTETE BILDAUFNAHMEVORRICHTUNG MIT ERHÖHTER EMPFINDLICHKEIT VOM UV BIS NAH-IR-BEREICH

CHARGE-COUPLED SEMICONDUCTOR DEVICE AND IMAGE SENSOR DEVICE OF HIGH INFORMATION DENSITY

OPTISCHE ABTASTVORRICHTUNG MIT UMSCHALTBARER AUFLÖSUNG

Verfahren zur Herstellung einer DRAM-Speicherzellenanordnung mit Stegfeldeffekttransistoren und DRAM-Speicherzellenanordnung mit CFETs

Die Erfindung bezieht sich auf die Herstellung von DRAM-Speicherzellenanordnungen mit Stegfeldeffekttransistoren (FinFETs) und Feldeffekttransistoren mit gekrümmtem Kanal (CFETs). Die FinFETs (4) bzw. CFETs (4) werden, orientiert an in zu Zellenzeilen (110) angeordneten Halbleiterstegen (11), ausgebildet. Innerhalb der Zellenzeilen (110) sind die Halbleiterstege (11) durch Zellenisolatorstrukturen (3) voneinander beabstandet. Benachbarte Zellenzeilen (110) werden durch streifenartige Grabenisolatorstrukturen (2) voneinander beabstandet. Die Halbleiterstege (11) werden jeweils in einem oder in zwei inneren Grabenabschnitten durch Gategräben (13) eingekerbt, die sich von einer Längsseite des jeweiligen Halbleiterstegs (11) zur gegenüberliegenden Längsseite erstrecken. Durch isotrope Ätzung des Oxids der Grabenisolatorstrukturen (2) werden selbstjustiert zu den Gategräben (13) Taschen (fin trenches) (22) in den Grabenisolatorstrukturen (2) ausgebildet und mit einem Gateleitermaterial gefüllt ...

Einrichtung zur Mikrobilderzeugung mittels ionisierender Strahlung

Bildaufnahmevorrichtung

Solid-state image sensor

The sensor includes several adjacent, vertical columns, along which are located several photodiodes (PD). Also provided are several vertical VCCDs of strip shape, and several micro-lenses. Each VCCD is spaced from a vertical column in its longitudinal extension. The microlenses are provided above a respective photodiode. The photodiodes of the even-numbered and odd-numbered vertical columns are mutually offset in the column direction. Pref. each photodiode is shaped like a ground nut shell with a narrower middle region. Each VCCD is typically of zigzag, or tooth shape.

Kameramodul

DYNAMIC CONTROL OF BLOOMING IN CHARGE COUPLED IMAGE-SENSING ARRAYS

... 1446046 Charge coupled imaging device RCA CORPORATION 27 Sept 1973 [2 Oct 1972] 45266/73 Heading H1K In a charge coupled imaging device including two adjacent rows of sites in a substrate, located under conductors common to the two rows, at which sites charge carriers produced by an image can be integrated and stored and subsequently transferred to a read-out area, a bus embedded in the substrate between the rows is maintained at such a potential that it acts as a drain and means are provided for establishing between the sites and the bus a potential barrier which varies in response to voltages present on the conductors but is such that charge in excess of the storage capacity of a site flows over the barrier to the drain rather than to adjacent sites. In one device in which charge is transferred by three-phase voltages comprising a P type silicon substrate, from which the conductors are separated by a uniform 2500 Š layer of silicon and provided with diffused N type buses, the potential ...

PHOTOSENSITIVE CHARGE TRANSFER DEVICE

MONOLITHIC IMAGE RECEIVER

CHARGE-COUPLED DEVICE

IMAGE SENSORS

A MONOLITHIC IMAGE RECEIVER

An image receiver, eg for infra-red radiation, comprises a plate-shaped monocrystalline semiconductor substrate 2 having image sensors 3 surrounded by read-out structures 4 arranged in a mosaic pattern on the one side 0 thereof. On the reverse side R thereof, an arrangement for concentrating the radiation which is incident onto this side R, onto the image sensors 3 is formed by etching pits 8 or 8' which are triangular or trapezoidal in cross-section and are formed directly into the substrate by anisotropic etching along crystal planes (1 1 1) inclined to the substrate surface 0. In this way, the "virtual" surface of the image sensors 3 can be increased by twice to three times as much as their actual surface. ...

Charge coupled device (CCD)image sensors

In a frame transfer CCD image sensor the number of charge storage locations per channel (25) in the store section (35A, B) is greater than in the image section (33). Frame transfer is effected so that after each frame transfer the image charge pattern in the image section is transferred to the store section so as to leave at least one line of charge storage locations (35B) in the store section between the image section and the charge pattern transferred to the store section which contains charge resulting only from frame shift smear and is otherwise empty of charge. Electrical circuitry (41 to 57) is provided to subtract electrical signals representing charges in the line or lines containing frame shift smear charge only from electrical signals representing the image charge pattern, thereby to cancel frame shift smear in the signals representing the image charge pattern.

METHOD OF MAKING A CHARGE-COUPLED DEVICE IMAGER

METHOD FOR MANUFACTURING A PHOTO DIODE FOR A CCD IMAGE SENSOR

A method for manufacturing a photo diode of a CCD image sensor, comprises the steps of forming an oxide layer on an N<-> type substrate; implanting N<+> ions into a selected portion of the N<-> type substrate to form a N<+> type buried region; growing a P type epitaxial layer between the N<-> type substrate and the oxide layer; forming P<+> type channel stop regions by implanting P<+> ions into selected portions of the P type epitaxial layer; and forming a N<+> type photo diode region and a N<-> type well between the P<+> type channel stop regions, the N<+> photo diode being formed over the N<+> type buried region. ...

Charge - coupled device

Image reading apparatus

Light detector array

A silicon wafer is provided which does not employ individually bonded leads between the IR sensitive elements and the input stages of multiplexers. The wafer is first coated with lead selenide in a first detector array area and is thereafter coated with lead sulfide within a second detector array area. The described steps result in the direct chemical deposition of lead selenide and lead sulfide upon the silicon wafer to eliminate individual wire bonding, bumping, flip chipping, planar interconnecting methods of connecting detector array elements to silicon chip circuitry, e.g., multiplexers, to enable easy fabrication of very long arrays. The electrode structure employed, produces an increase in the electrical field gradient between the electrodes for a given volume of detector material, relative to conventional electrode configurations.

IMAGE SENSORS

THERMAL DETECTOR ARRAY

SEMICONDUCTOR DEVICES

... 1340617 Electroluminescence WESTERN ELECTRIC CO Inc 19 April 1971 [16 Feb 1970] 21830/71 Heading C4S [Also in Division H1] A semi-conductor device comprises a semiconductive, electroluminescent, charge carrier storage medium, a means for storing the carriers at a first site in the medium, and a means for transferring the carriers to a second site, a radiative output being obtainable on the recombination of the carriers with the bulk carriers of the medium. Electrode and insulator materials and thicknesses are given. The principle of operation is shown in the shift register of Fig. 2 wherein a series of electrodes 22a, 23a &c. overlie the medium 20 on an insulating layer 21. Carriers at the input 25 migrate to the depletion region 27a under electrode 22a, formed by suitable biasing, and is thereafter sequentially transferred to depletion regions sequentially formed under the next electrode by suitably timed voltage pulses on 221, 231 and 241. The carriers may alternatively ...

CHARGE COUPLED DEVICE AREA IMAGING ARRAY

... 1394520 Semi-conductor devices WESTINGHOUSE ELECTRIC CORP 21 Nov 1973 [29 Nov 1972] 53974/73 Heading H1K A light sensitive semi-conductor array comprises light sensitive cells 10 arranged in rows and columns, each row having an adjacent CCD shift register 22 leading to a further shift register 40 at the end of the rows, from which a video signal, derived from the carriers generated in the cells, is obtained. In an embodiment, a silicon substrate provides the sensor cells 10 each with a sensor element 12 defined by a partially encircling stopper diffusion 14 of the same conductivity type as, but of higher impurity concentration than, element 12, and a complex pattern of electrodes 24, 26 is produced on the substrate using two insulating layers 82, 96. Each electrode forms a conductive track of the two-phase CCD shift register 22. A third conductive track 16 is produced on the top insulating layer 96 to transfer charges from the element 12 to the shift register. This transfer is aided by ...

SOLID STATE IMAGE PICK-UP DEVICE

INFRARED SENSOR

CHARGE COUPLED DEVICE IMAGE SENSORS

Charge-coupled image sensor

Solid state image sensor

A solid state image sensor comprises a semiconductor substrate 32 of a first conductivity type having one or more photosensistive pixels formed therein, the photosensitive area 20 of the or each pixel being formed by the semiconductor substrate and one or more impurity layers 33,34 of a second conductivity type formed within an active area of the semiconductor substrate. The photosensitive area has one or more edge portions defined by isolation 31 separating the active area of the semiconductor substrate from other active areas thereof, and the doping density of the impurity at the edge portion(s) of the photosensitive area is substantially restricted. A preferred embodiment is a CMOS photodiode sensor in which each pixel thereof includes a photodiode 20 formed by two N-type layers 33,34 in a P-type substrate. The lower N-type layer 33 is more heavily doped than the upper layer 34 and the edges of the lower layer 33 are set back from the edges of the upper layer 34. Alternatively, the lower ...

Imaging array with discharge of first sensor region via second sensor region

A photosensor assembly comprises a first row of photosensors 100, a second row of photosensors 102 and a charge transfer region 104. The first and second photosensors in the array may be of different sizes, i.e. CCD image sensors 102 having larger light collecting areas than small image detectors 100, and may detect different colours. The imaging array may operate in different modes: as shown in Figure 1A, if only charges from the smaller photosensors 100 are required, charges from detectors 102 are discharged into shutter 112; as shown in Figure 1C, charges from photosensors 102 may be transferred via or through photosensors 100 to the charge transfer register or array, where the signal charges may be added. The positioning of the electric shutter may be varied (212, 312; Figures 2B and 3B), and further sensor rows may be added - see Figure 4. The sensor arrangement allows both high and low detector sampling rates and resolutions, as required, while avoiding blooming or detector saturation ...

Imaging apparatus and imaging system

Back side illuminated imaging apparatus including a plurality of photo-sensitive imaging pixels and associated circuits and further comprising a semiconductor layer 108 disposed a substrate (404 fig 4B). The imaging apparatus (photo sensor) is laterally divided into a first (light receiving) portion 101, a second discharge portion 103 and optionally a middle third charge transfer portion 102. A single upper electrode S106 (or double contact (first/third upper electrode (106-1, 106-2 figure 18)) is defined on the illuminated surface and contacts the semiconductor layer 108 directly or via a hole blocking layer 107. On the lower surface, a charge sensing (second) electrode P 110 (node B) detects photon induced electron-hole charges created within semiconductor 108. This (node-B) is connected to transistor amplifier 118 and AC bias source 113 via capacitor 116. Lower electrodes 111 (transfer electrode) and 112 D discharge (fourth) electrode enable the discharge of the stored charge near the ...

Improvements in or relating to methods of fabricating semiconductor devices

In a method of fabricating a semiconductor device, a region containing a first species of ionised dopant formed by diffusion into a body of semiconductor material, creates an internal electric field which provides a barrier against the penetration of a second species of ionised dopant from a first region into a selected region of the semiconductor body. In the application of the method to the fabrication of a monolithic infra-red charge coupled device comprising detectors 1, ionised dopant is diffused into the semiconductor substrate 10 to render it sensitive to infra-red radiation, and the barrier layer 12, which is formed by diffusion into layer 11 of ionised dopant, serves to prevent the penetration of dopant from substrate 10 into the epitaxial layer 11. ...

METHOD OF CONTROLLING PENETRATION OF DOPANT INTO SEMICONDUCTOR DEVICES

CHARGE-COUPLED DEVICE

CHARGE TRANSFER DEVICE

PBS-PBSE IR DETECTOR ARRAYS

IMAGE SENSORS

SOLID STATE IMAGING DEVICE

METHOD FOR FABRICATING A CCD CHANNEL BY SELF-ALIGNMENT

Imaging devices,systems and methods

CHARGE COUPLED DEVICES

... 1496081 Charge-coupled devices HUGHES AIRCRAFT CO 24 Jan 1975 [25 Jan 1974] 3205/75 Heading H1K Means for injecting charge into a CCD while avoiding firstly the coupling back of voltage spikes from the clocked transfer electrodes into the injecting junction and secondly deleterious charge accumulation and bias voltage build up at the injecting junction during the OFF clock period on the first transfer electrode comprises an electrode structure 41 (Fig. 2) between the injecting junction 19 and the first clocked electrode 17, the electrode structure having applied thereto a steady bias voltage which induces a potential wall in the underlying semi-conductor 13. The wall serves as a reservoir of charge during the OFF clock period of the first clocked electrode 17, and isolates the injecting junction 19 against the coupling back of voltage spikes. The electrode structure 41 comprises a transfer portion 43 adjacent the injecting junction 19 and a storage portion 45 adjacent the first clocked ...

ARRANGEMENT FOR EXTENDING PHOTOSENSOR ARRAY RESOLUTION

Multi-purpose architecture for ccd image sensors

A charge-coupled device (CCD) image sensor includes multiple vertical charge-coupled device (VCCD) shift registers and independently-controllable gate electrodes disposed over the VCCD shift registers and arranged into physically separate and distinct sections that are non-continuous across the plurality of VCCD shift registers. The CCD image sensor can be configured to operate in two or more operating modes, including a full resolution charge multiplication mode.

Multiple clocking modes for a ccd imager

A CCD image sensor includes vertical CCD shift registers and gate electrodes disposed over the vertical CCD shift registers. The gate electrodes are divided into distinct groups of gate electrodes. The CCD image sensor is adapted to operate in an accumulation mode and a charge transfer mode, an accumulation mode and a charge shifting mode, or an accumulation mode, a charge transfer mode, and a charge shifting mode. The charge transfer mode has an initial charge transfer phase and a final charge transfer phase. The charge shifting mode has an initial charge shifting phase and a final charge shifting phase.

PHOTOELECTRIC CONVERSION APPARATUS AND IMAGING SYSTEM USING THE SAME

A plurality of photoelectric conversion elements including a first photoelectric conversion element, a second photoelectric conversion element, and a third photoelectric conversion element, are arranged in a photoelectric conversion apparatus of the present invention. Provided, between the first photoelectric conversion element and the second photoelectric conversion element, is a first semiconductor region of a first conductivity type and of a first width in which a signal charge is a minor charier. And, provided, between the first photoelectric conversion element and the third photoelectric conversion element, is a second semiconductor region of the first conductivity type in a higher impurity concentration and of a second width narrower than the first width at a position deeper in a semiconductor substrate rather than a depth of the first semiconductor region. 117.-. (canceled)18. A photoelectric conversion apparatus comprising:a plurality of photoelectric conversion elements including first, second, and third photoelectric conversion elements for generating signal charges;a plurality of color filters including a first color filter arranged above the first photoelectric conversion element, a second color filter arranged above the second photoelectric conversion element, and a third color filter arranged above the third photoelectric conversion element;a first semiconductor region of a first conductivity type arranged between the first photoelectric conversion element and the second photoelectric conversion element, and extended from a predetermined position toward a depth direction, the first semiconductor region having a first width; anda second semiconductor region of the first conductivity type arranged between the first photoelectric conversion element and the third photoelectric conversion element, and extended from the predetermined position toward the depth direction to a position deeper than that of the first semiconductor region, the second semiconductor ...

Method of producing a solid-state image pickup apparatus, solid-state image pickup apparatus, and electronic apparatus

A method of producing a solid-state image pickup apparatus, including the steps of: forming a plurality of light-receiving portions on a substrate; forming a plurality of transfer gates to be connected to the plurality of light-receiving portions formed on the substrate; forming an insulation film on the substrate; exposing a base by etching the insulation film so that the etched part of the insulation film between the adjacent transfer gates tapers away; and injecting an impurity into the exposed part using the insulation film that has remained after the etching as a mask to thus form an impurity injection portion.

SOLID-STATE IMAGING APPARATUS

There is provided a solid-state imaging apparatus that can prevent degradation of image quality. The solid-state imaging apparatus includes a plurality of pixels () including a photoelectric conversion element that performs photoelectric conversion; a signal line () to which the plurality of pixels output signals; and a first constant current circuit configured to supply a constant current to the signal line, wherein the first constant current circuit has a first transistor () having a drain or collector node connected to the signal line, and a first resistor () connected between a reference voltage node and a source or emitter node of the first transistor. 1. A solid-state imaging apparatus comprising:a plurality of pixels each including a photoelectric conversion element;a signal line to which the plurality of pixels output signals; anda first current source circuit configured to supply a current to the signal line, whereinthe first current source circuit hasa first transistor having a drain or collector node capable of being connected electrically to the signal line, anda first resistor electrically connected between a reference voltage node and a source or emitter node of the first resistor.2. The solid-state imaging apparatus according to claim 1 , further comprising a second current source circuit claim 1 , whereinthe second current source circuit hasa second transistor having a gate or base node being connected electrically to a gate or base node of the first transistor, anda second resistor electrically connected between a reference voltage node and a source or emitter node of the second resistor.3. The solid-state imaging apparatus according to claim 2 , whereina current supplied by the second current source circuit is M-times larger than a current supplied by the first current source circuit, anda resistance value of the second resistor is 1/M of a resistance value of the first resistor.4. The solid-state imaging apparatus according to claim 2 , whereinthe ...

SOLID STATE IMAGE PICKUP DEVICE AND CAMERA

A solid state image pickup device which can prevent color mixture by using a layout of a capacitor region provided separately from a floating diffusion region and a camera using such a device are provided. A photodiode region is a rectangular region including a photodiode. A capacitor region includes a carrier holding unit and is arranged on one side of the rectangle of the photodiode region as a region having a side longer than the one side. In a MOS unit region, an output unit region including an output unit having a side longer than the other side which crosses the one side of the rectangle of the photodiode region is arranged on the other side. A gate region and the FD region are arranged between the photodiode region and the capacitor region. 1. A solid state image pickup device comprising a plurality of unit pixels in a matrix shape , in which each of said unit pixels comprises:a photoelectric conversion unit where carriers are generated by incident light;a transfer unit adapted to transfer the carriers;a floating diffusion region where the carriers are transferred by said transfer unit;a carrier holding unit adapted to accumulate the carriers overflowed from said photoelectric conversion unit; andan output unit adapted to output a signal corresponding to the carriers transferred to said floating diffusion region,wherein one of said carrier holding unit and said output unit is provided between the photoelectric conversion unit included in the first pixel and the photoelectric conversion unit included in the second pixel adjacent to the first pixel in the row direction,the other one of said carrier holding unit and said output unit is provided between the photoelectric conversion unit included in the first pixel and the photoelectric conversion unit included in the third pixel adjacent to the first pixel in the column direction.29-. (canceled) 1. Field of the InventionThe invention relates to a solid state image pickup device and a camera and, more particularly ...

PHOTOELECTRIC CONVERSION DEVICE AND IMAGE-PICKUP APPARATUS

In a photoelectric conversion device, groups of unit pixels are arranged in a well, where each of the unit pixels includes photoelectric conversion elements, an amplifier transistor, and transfer transistors. The photoelectric conversion device includes a line used to supply a voltage to the well, a well-contact part used to connect the well-voltage-supply line to the well, and transfer-control lines used to control the transfer transistors. The transfer-control lines are symmetrically arranged with respect to the well-voltage-supply line in respective regions of the unit-pixel groups. 1. A photoelectric conversion device including unit cells arranged in a well , where each of the unit cells includes a plurality of photoelectric conversion elements , an amplifier transistor , and a plurality of transfer transistors arranged between the photoelectric conversion elements and a gate electrode of the amplifier transistor , the photoelectric conversion device , wherein each of the unit cells is comprised of:a well-voltage-supply line configured to supply a voltage to the well;a well-contact part used to connect the well-voltage-supply line; andplural transfer-control lines configured to respectively control the transfer transistors,wherein, in a region of the unit cell, the plural transfer-control lines are symmetrically arranged with respect to the well-voltage-supply line.28-. (canceled) 1. Field of the InventionThe present invention relates to a photoelectric conversion device including unit cells arranged in a well, where each of the unit cells includes a plurality of photoelectric conversion elements, and to an image pickup apparatus including the photoelectric conversion device.2. Description of the Related ArtSolid-state image pickup devices manufactured by using complementary metal oxide semiconductor (CMOS) technologies have been shown to be high performance, multifunctional, and low power solid-state image pickup devices. The above-described solid-state image ...

MATRIX CHARGE-TRANSFER IMAGE SENSOR WITH ASYMMETRIC GATE

The invention relates to image sensors, more particularly but not exclusively to scanning sensors with signal integration (or TDI sensors, for ‘Time Delay Integration linear sensors’). The adjacent pixels along a column each comprise an alternation of at least one photodiode and one storage gate adjacent to the photodiode. The gates comprise a main body and, on the upstream side in the direction of the transfer of the charges but not on the downstream side, a series of narrow fingers extending from the main body toward the upstream side, the ends of the fingers on the upstream side being adjacent to a photodiode situated upstream of the gate, the narrow fingers being separated from one another by doped insulating regions of the first type of conductivity, with a higher doping and preferably deeper than the surface regions, connected, as they are, to the reference potential of the active layer, these insulating regions being interposed between the main body of the gate and the photodiode. These fingers induce a directionality on the charge transfer. 1. A charge transfer image sensor , the sensor comprising N adjacent rows of P pixels , the adjacent pixels of same rank belonging to two consecutive rows each comprising an alternation of at least one photodiode and one storage gate adjacent to the photodiode , the gates covering an active layer region of a first type of conductivity and the photodiodes being formed within the active layer by an individual region of a second type of conductivity , itself covered by an individual surface region of the first type connected to a reference potential of the active layer , characterized in that the gates comprise a main body and , on the upstream side in the direction of the transfer of the charges but not on the downstream side , a series of narrow fingers extending from the main body toward the upstream side , the ends of the fingers on the upstream side being adjacent to a photodiode situated upstream of the gate , the ...

Solid state image pickup device and camera

A solid state image pickup device which can prevent color mixture by using a layout of a capacitor region provided separately from a floating diffusion region and a camera using such a device are provided. A photodiode region is a rectangular region including a photodiode. A capacitor region includes a carrier holding unit and is arranged on one side of the rectangle of the photodiode region as a region having a side longer than the one side. In a MOS unit region, an output unit region including an output unit having a side longer than the other side which crosses the one side of the rectangle of the photodiode region is arranged on the other side. A gate region and the FD region are arranged between the photodiode region and the capacitor region.

PHOTOELECTRIC CONVERSION DEVICE AND OPERATION METHOD FOR PHOTOELECTRIC CONVERSION DEVICE

A photoelectric conversion unit generates an amount of charges. A differential amplifier has first and second input transistors and is configured to output a current signal based on the amount of charges. A reset voltage providing unit is configured to provide a reset voltage for input nodes of the first and second input transistors. A transfer transistor is electrically connected to, and configured to transfer a charge to, the input node of the first input transistor. A reset transistor is electrically connected to one of the input nodes, and configured to control an electrical connection between the reset voltage providing unit and the input node connected to the reset transistor. A connection transistor has first and second nodes and is configured to control an electrical connection between the input nodes. The first and second nodes are connected to the input nodes of the first and second input transistors, respectively. 1. A photoelectric conversion device comprising:a photoelectric conversion unit;a differential amplifier configured to output a current signal based on an amount of charges generated by the photoelectric conversion unit, wherein the differential amplifier includes a first input transistor and a second input transistor forming a differential pair;a transfer transistor electrically connected to an input node of the first input transistor, and configured to transfer a charge generated by the photoelectric conversion unit to the input node of the first input transistor;a reset voltage providing unit configured to provide a reset voltage for the input node of the first input transistor and an input node of the second input transistor;a reset transistor electrically connected to either one of the input node of the first input transistor or the input node of the second input transistor, and configured to control an electrical connection between the reset voltage providing unit and the input node connected to the reset transistor; anda connection ...

IMAGING APPARATUS, RADIATION IMAGING SYSTEM, AND METHOD FOR DRIVING IMAGING APPARATUS

A source follower connection line connects a gate of a source follower thin film transistor in a first pixel with a gate of a source follower thin film transistor in a second pixel, between adjacent first and second pixel, and a driving circuit turns the transfer thin film transistor in the first pixel region ON and turns the transfer thin film transistor in the second pixel OFF to make the transfer thin film transistor in the first pixel region output the signal of the first pixel. 1. An imaging apparatus comprising:first and second pixels each including a conversion element, a first transistor and a second transistor, wherein one of a source and a drain of the first transistor is connected to the conversion element, and the other of the source and the drain of the first transistor is connected to a gate of the second transistor, and the gate of the second transistor of the first pixel is connected to the gate of the second transistor of the second pixel; anda driving circuit connected to a gate of the first transistor of the first pixel and to a gate of the first transistor of the second pixel, whereinthe driving circuit turns ON the first transistor of the first pixel and turns OFF the first transistor of the second pixel, to output a signal from the first pixel.2. The imaging apparatus according to claim 1 , whereineach of the first and second pixels includes a third transistor having a source and a drain one of which is connected to the one of a source and a drain of the second transistor and outputting a signal amplified by the second transistor to a signal line,the imaging apparatus comprises a further driving circuit connected to a gate of the third transistor of the first pixel and to a gate of the third transistor of the second pixel, and,after the driving circuit turns ON the first transistor of the first pixel and turns OFF the first transistor of the second pixel,the further driving circuit turns ON the third transistors of the first and second pixels, ...

SOLID STATE IMAGE PICKUP DEVICE AND MANUFACTURING METHOD THEREFOR

A MOS-type solid-state image pickup device includes a photoelectric conversion unit having a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type forming a pn-junction with the first semiconductor region, and a third semiconductor region of the first conductive type disposed on the second semiconductor region. In addition, a transfer gate electrode is disposed on an insulation film and transfers a carrier from the second semiconductor region to a fourth semiconductor region of the second conductivity type, an amplifying MOS transistor having a gate electrode is connected to the fourth semiconductor region, and a fifth semiconductor region of the second conductivity type is continuously disposed to the second semiconductor region, disposed under the gate electrode. An entire surface of the third semiconductor region is covered with the insulation film, and a side portion of the third semiconductor region that is laterally opposite to the transfer gate is in contact with the first semiconductor region. 115.-. (canceled)16. A MOS-type solid-state image pickup device , on a semiconductor substrate of a second conductivity type , comprising:a photoelectric conversion unit having a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type forming a pn-junction with the first semiconductor region, and a third semiconductor region of the first conductive type disposed on the second semiconductor region;a transfer gate electrode disposed on an insulation film and transferring a carrier from the second semiconductor region to a fourth semiconductor region of the second conductivity type;an amplifying MOS transistor having a gate electrode connected to the fourth semiconductor region; anda fifth semiconductor region of the second conductivity type that is continuously disposed to the second semiconductor region, disposed under the gate electrode,wherein an entire ...

IMAGE PICKUP APPARATUS

An image pickup apparatus includes a plurality of pixels each including a photoelectric conversion unit, an amplification element configured to amplify a signal based on a signal charge generated in the photoelectric conversion unit, and a first signal holding unit and a second signal holding unit located at a stage following the first signal holding unit and arranged on an electric path between the photoelectric conversion unit and an input node of the amplification element, in which a coverage by a light-shielding member of the first signal holding unit is lower than a coverage by a light-shielding member of the second signal holding unit. 1. An image pickup apparatus comprising:a plurality of pixels each including a photoelectric conversion unit;an amplification element configured to amplify a signal based on a signal charge generated in the photoelectric conversion unit; anda first signal holding unit and a second signal holding unit located at a stage following the first signal holding unit and arranged on an electric path between the photoelectric conversion unit and an input node of the amplification element,wherein a coverage by a light-shielding member of the first signal holding unit is lower than a coverage by a light-shielding member of the second signal holding unit.2. The image pickup apparatus according to claim 1 ,wherein the first signal holding unit holds a signal in one exposure period in the photoelectric conversion unit.3. The image pickup apparatus according to claim 1 ,wherein a potential barrier height with respect to a signal charge between the photoelectric conversion unit and the first signal holding unit is lower than a potential barrier height with respect to a signal charge between the first signal holding unit and the second signal holding unit.4. The image pickup apparatus according to claim 1 ,wherein the first signal holding unit includes a first semiconductor region having a same polarity as the signal charge, a second ...

IMAGE PICKUP APPARATUS, IMAGE PICKUP SYSTEM, AND IMAGE PICKUP APPARATUS MANUFACTURING METHOD

An image pickup apparatus includes a semiconductor substrate, and multiple pixels. Each of the multiple pixels includes a photoelectric-conversion unit disposed in the semiconductor substrate, a first conductive first semiconductor region disposed in the semiconductor substrate, which holds charge generated by the photoelectric-conversion unit at a place different from the photoelectric-conversion unit, a first transfer unit which transfers charge to the first semiconductor region, and a second transfer unit which transfers charge held at the first semiconductor region. The first semiconductor region includes a first portion, a second portion, and a third portion. At the depth where the third portion is disposed, the first portion is disposed between the third portion and first transfer unit, and the second portion is disposed between the third portion and second transfer unit. Impurity concentration of the third portion is lower than that of the first and second portions. 1. An image pickup apparatus comprising:a semiconductor substrate; anda plurality of pixels; a photoelectric conversion unit disposed in the semiconductor substrate,', 'a first conductive-type first semiconductor region disposed in the semiconductor substrate, and configured to hold charge generated by the photoelectric conversion unit at a place different from the photoelectric conversion unit,', 'a first transfer unit configured to transfer charge to the first semiconductor region, and', 'a second transfer unit configured to transfer charge held at the first semiconductor region;, 'wherein each of the plurality of pixels includes'} a first portion,', 'a second portion, and', 'a third portion;, 'wherein the first semiconductor region includes'}wherein, at a depth where the third portion is disposed, the first portion is disposed between the third portion and the first transfer unit, and the second portion is disposed between the third portion and the second transfer unit; andwherein impurity ...

METHOD FOR DRIVING PHOTOELECTRIC CONVERSION APPARATUS

In a photoelectric conversion apparatus including a plurality of pixels arranged in a matrix, each pixel including a photoelectric conversion unit, first and second holding units that hold electric charge, a first transfer unit that connects the photoelectric conversion unit and the first holding unit, a second transfer unit that connects the first and second holding units, and a third transfer unit that connects the photoelectric conversion unit and a power supply, each pixel is controlled so that the potential of the third transfer unit for electric charge held in the photoelectric conversion unit is higher than that of the first transfer unit at least during a charge accumulation period of the pixel, and thereafter, the potential of the third transfer unit is higher than that of the photoelectric conversion unit while the potentials of the first and second transfer units are lower than that of the photoelectric conversion unit. 1. A method for driving a photoelectric conversion apparatus , the photoelectric conversion apparatus including a plurality of pixels arranged in a matrix , each of the plurality of pixels includinga photoelectric conversion unit,a first holding unit configured to hold electric charge,a second holding unit configured to hold electric charge,a first transfer unit configured to connect the photoelectric conversion unit and the first holding unit,a second transfer unit configured to connect the first holding unit and the second holding unit, anda third transfer unit configured to connect the photoelectric conversion unit and a power supply, the method comprising: a potential of the third transfer unit with respect to electric charge held in the photoelectric conversion unit is higher than a potential of the first transfer unit with respect to the electric charge held in the photoelectric conversion unit at least in a period during which the pixel accumulates electric charge, and', 'thereafter, the potential of the third transfer unit is ...

SOLID-STATE IMAGE PICKUP DEVICE AND IMAGE PICKUP SYSTEM

A solid-state image pickup device has an image pickup pixel including a first photoelectric conversion portion and a first transistor and a focus detection pixel including a second photoelectric conversion portion, a second transistor, and a light shielding portion, in which a reflection preventing portion is provided on the underface side of the light shielding portion. 1. A solid-state image pickup device , comprising:an image pickup pixel having a first photoelectric conversion portion and a first transistor for reading out a signal based on a charge generated in the photoelectric conversion portion; anda focus detection pixel having a second photoelectric conversion portion, a second transistor for reading out a signal based on a charge generated in the second photoelectric conversion portion, and a light shielding portion, whereina reflection preventing portion being provided on a side of an underface of the light shielding portion.2. The solid-state image pickup device according to claim 1 , whereinthe light shielding portion contains aluminum, andthe reflection preventing portion contains titanium nitride.3. The solid-state image pickup device according to claim 2 , whereinthe light shielding portion is provided on an insulating film covering the second photoelectric conversion portion, anda member containing titanium is provided between the insulating film and the reflection preventing portion.4. The solid-state image pickup device according to claim 3 , wherein a film thickness of the member containing titanium is 8 nm or more and 15 nm or lower.5. The solid-state image pickup device according to claim 3 , wherein the insulating film contains BPSG.6. The solid-state image pickup device according to claim 1 , wherein another reflection preventing portion is provided on a side of an upper face of the light shielding portion.7. The solid-state image pickup device according to claim 6 , wherein the another reflection preventing portion contains titanium nitride ...

Solid-state imaging apparatus

A solid-state imaging apparatus includes a plurality of pixels, each pixel including: a photoelectric conversion unit; an amplification element; a first signal holding unit and a second signal holding unit arranged on an electric pathway between the photoelectric conversion unit and an input node of the amplification element; a first electric charge transfer unit configured to transfer an electron of the photoelectric conversion unit to the first signal holding unit; and a second electric charge transfer unit configured to transfer an electron held by the first signal holding unit to the second signal holding unit, wherein a voltage supplied to a first control electrode when the electron of the photoelectric conversion unit is transferred to the first signal holding unit is lower than a voltage supplied to a second control electrode when the electron held by the first signal holding unit is transferred to the second signal holding unit.

PHOTOELECTRIC CONVERSION APPARATUS AND IMAGING SYSTEM USING THE PHOTOELECTRIC CONVERSION APPARATUS

A photoelectric conversion apparatus of the present invention includes: a plurality of photoelectric conversion elements arranged on a substrate; a transistor for transferring a signal charge; and a plurality of transistors for reading out the signal charge transferred. The plurality of photoelectric conversion elements include a first photoelectric conversion element and a second photoelectric conversion element adjacent to each other. The photoelectric conversion apparatus of the present invention includes: a first semiconductor region having a first conductivity type arranged between the first photoelectric conversion element and the second photoelectric conversion element; and a second semiconductor region having the first conductivity type that is arranged on a region where the plurality of transistors are arranged and that has a width larger than that of the first semiconductor region of the first conductivity type. 1. A photoelectric conversion apparatus comprising:a substrate; anda plurality of pixels, wherein each of the pixels includes:a photoelectric conversion element arranged on the substrate, a plurality of transistors arranged on the substrate for reading out the signal charge transferred, wherein', 'the plurality of pixels include first and second photoelectric conversion elements adjacent to each other,', 'a first semiconductor region having a first conductivity type, such that the signal charge is a minority carrier, is arranged between the first and second photoelectric conversion elements, and, 'a transistor arranged on the substrate for transferring a signal charge generated in the photoelectric conversion element, and'}a second semiconductor region having the first conductivity type and having a width larger than that of the first semiconductor region is arranged in a region in which the plurality of transistors for reading out the signal charge transferred are arranged.25-. (canceled) 1. Field of the InventionThe present invention relates to a ...

SOLID-STATE IMAGE SENSOR AND IMAGE SENSING APPARATUS

In an image sensor including a first column readout line and a second column readout line provided to each pixel column, a plurality of pixel rows are divided into pixel rows of a first group and pixel rows of a second group, pixels of the pixel rows of the first group output signals to the first column readout line, and pixels of the pixel rows of the second group output signals to the second column readout line. A shortest distance between a conversion region of a first pixel of a pixel row of the first group and the first column readout line to which a signal from the first pixel is output is not more than a shortest distance between the conversion region of the first pixel and the second column readout line to which signals from the pixels belonging to the pixel rows of the second group are output. 1. A solid-state image sensor which includes a pixel array in which a plurality of pixels are two-dimensionally arranged so as to form a plurality of pixel rows and a plurality of pixel columns , and a first column readout line and a second column readout line provided to each pixel column , whereinthe plurality of pixel rows which form the pixel array are divided into pixel rows of a first group and pixel rows of a second group,each pixel includes a photoelectric conversion element, a conversion region which converts a charge generated in the photoelectric conversion element into a voltage, a transfer element which transfers the charge generated in the photoelectric conversion element to the conversion region, and an amplification element which outputs a signal in accordance with the voltage converted in the conversion region,pixels belonging to the pixel rows of the first group output signals to the first column readout line, and pixels belonging to the pixel rows of the second group output signals to the second column readout line,a shortest distance between the conversion region of a first pixel belonging to a pixel row of the first group and the first column ...

Solid-state imaging element and electronic apparatus

A solid-state imaging element includes a light receiving unit formed on a semiconductor base, and an anti-reflection film formed on the light receiving unit. The anti-reflection film has a plurality of planar layers whose planar layer in an upper layer is narrower than the planar layer in a lower layer.

SOLID-STATE IMAGING APPARATUS AND ELECTRONIC DEVICE

Disclosed herein is a solid-state imaging apparatus including: a semiconductor base; a photodiode created on the semiconductor base and used for carrying out photoelectric conversion; a pixel section provided with pixels each having the photodiode; a first wire created by being electrically connected to the semiconductor base for the pixel section through a contact section and being extended in a first direction to the outside of the pixel section; a second wire made from a wiring layer different from the first wire and created by being extended in a second direction different from the first direction to the outside of the pixel section; and a contact section for electrically connecting the first and second wires to each other. 1. A solid-state imaging apparatus comprising:a semiconductor base;a photodiode created on said semiconductor base and used for carrying out photoelectric conversion;a pixel section provided with pixels each having said photodiode;a first wire created by being electrically connected to said semiconductor base for said pixel section through a contact section and being extended in a first direction to the outside of said pixel section;a second wire made from a wiring layer different from said first wire and created by being extended in a second direction different from said first direction to the outside of said pixel section; anda contact section for electrically connecting said first and second wires to each other.2. The solid-state imaging apparatus according to wherein a plurality of said pixels share an electric-charge accumulating section and a transistor section.3. The solid-state imaging apparatus according to claim 2 , said solid-state imaging apparatus further comprising:a transfer gate provided between said electric-charge accumulating section and said photodiode; anda control line electrically connected to said transfer gate,wherein said second wire is provided between any adjacent ones of a plurality of said control lines each ...

SOLID-STATE IMAGING DEVICE

A solid-state imaging device is provided with a plurality of photoelectric converting portions each having a photosensitive region and an electric potential gradient forming region, and which are juxtaposed so as to be along a direction intersecting with a predetermined direction, a plurality of buffer gate portions each arranged corresponding to a photoelectric converting portion and on the side of the other short side forming a planar shape of the photosensitive region, and accumulates a charge generated in the photosensitive region of the corresponding photoelectric converting portion, and a shift register which acquires charges respectively transferred from the plurality of buffer gate portions, and transfers the charges in the direction intersecting with the predetermined direction, to output the charges. The buffer gate portion has at least two gate electrodes to which predetermined electric potentials are respectively applied so as to increase potential toward the predetermined direction. 1. A solid-state imaging device comprising:a plurality of photoelectric converting portions, each having a photosensitive region which generates a charge according to incidence of light, and which has a planar shape of a nearly rectangular shape formed by two long sides and two short sides, and an electric potential gradient forming region which forms an electric potential gradient increasing along a predetermined direction parallel to the long sides forming the planar shape of the photosensitive region with respect to the photosensitive region, the plurality of photoelectric converting portions being juxtaposed along a direction intersecting with the predetermined direction;a plurality of charge accumulating portions, each being arranged corresponding to the photoelectric converting portion and on the side of the other short side forming the planar shape of the photosensitive region, and each accumulating a charge generated in the photosensitive region of the corresponding ...

SOLID-STATE IMAGE SENSOR, METHOD OF MANUFACTURING THE SAME, AND CAMERA

A solid-state image sensor comprises a first substrate and a second substrate combined with each other, the first substrate comprising a photoelectric conversion portion, a holding portion which holds a charge generated in the photoelectric conversion portion, a transfer portion which transfers the charge generated in the photoelectric conversion portion to the holding portion, and a first electrode connected to the holding portion, and the second substrate comprising a second electrode and an amplifier portion which is connected to the second electrode and amplifies a signal in the holding portion, wherein the holding portion and the amplifier portion are electrically connected to each other by a capacitance formed by the first electrode and the second electrode. 1. A solid-state image sensor comprising a first substrate and a second substrate combined with each other ,the first substrate comprising a photoelectric conversion portion, a holding portion which holds a charge generated in the photoelectric conversion portion, a transfer portion which transfers the charge generated in the photoelectric conversion portion to the holding portion, and a first electrode connected to the holding portion, andthe second substrate comprising a second electrode and an amplifier portion which is connected to the second electrode and amplifies a signal in the holding portion,wherein the holding portion and the amplifier portion are electrically connected to each other by a capacitance formed by the first electrode and the second electrode.2. A solid-state image sensor comprising a first substrate and a second substrate combined with each other ,the first substrate comprising a photoelectric conversion portion, a holding portion which holds a charge generated in the photoelectric conversion portion, a transfer portion which transfers the charge generated in the photoelectric conversion portion to the holding portion, and a first electrode connected to the holding portion, andthe ...

SOLID STATE IMAGING DEVICE

A solid state imaging device is provided with a photoelectric conversion portion having a plurality of photosensitive regions and a potential gradient forming portion having an electroconductive member arranged opposite to the photosensitive regions A planar shape of each photosensitive region is a substantially rectangular shape. The photosensitive regions are juxtaposed in a first direction intersecting with the long sides. The potential gradient forming portion forms a potential gradient becoming higher along a second direction from one of the short sides to the other of the short sides of the photosensitive regions The electroconductive member includes a first region extending in the second direction and having a first electric resistivity, and a second region extending in the second direction and having a second electric resistivity smaller than the first electric resistivity. 1. A solid state imaging device comprising:a photoelectric conversion portion having a plurality of photosensitive regions which generate respective charges according to incidence of light and a planar shape of each of which is a substantially rectangular shape composed of two long sides and two short sides, the photosensitive regions being juxtaposed in a first direction intersecting with the long sides;a potential gradient forming portion having an electroconductive member arranged opposite to the plurality of photosensitive regions, and forming a potential gradient becoming higher along a second direction from one of the short sides to the other of the short sides of the photosensitive regions; anda charge output portion which acquires the charges transferred from the respective photosensitive regions and which transfers the charges in the first direction to output the charges,wherein the electroconductive member includes a first region extending in the second direction between two ends in the second direction and having a first electric resistivity, and a second region extending in ...

Methods for producing image sensors having multi- purpose architectures

A charge-coupled device (CCD) image sensor includes multiple vertical charge-coupled device (VCCD) shift registers and independently-controllable gate electrodes disposed over the VCCD shift registers and arranged into physically separate and distinct sections that are non-continuous across the plurality of VCCD shift registers. The CCD image sensor can be configured to operate in two or more operating modes, including a full resolution charge multiplication mode.

SPATIALLY RESOLVED SPECTRAL-IMAGING DEVICE

A spatially resolved spectral device comprising a dispersive array to receive an incident light comprising a principal ray. The dispersive array comprising a plurality of dichroic layers, each of the plurality of dichroic layers disposed in a path of a direction of the principal ray. Each of the plurality of dichroic layers configured to at least one of reflect or transmit a different wavelength range of the incident light. The device further comprising a detection array operatively coupled with the dispersive array. The detection array comprising a photosensitive component including a plurality of detection pixels, each of the plurality of detection pixels having a light-receiving surface disposed parallel to the direction of the principal ray to detect a respective one of the different wavelength ranges of incident light reflected from a corresponding one of the plurality of dichroic layers. 1. An apparatus , comprising:a dispersive array to receive an incident light comprising a principal ray, the dispersive array comprising a plurality of dichroic layers, each of the plurality of dichroic layers disposed in a path of a direction of the principal ray, each of the plurality of dichroic layers configured to at least one of reflect or transmit a different wavelength range of the incident light; anda detection array operatively coupled with the dispersive array, the detection array comprising a photosensitive component further comprising a plurality of detection pixels, each of the plurality of detection pixels having a light receiving surface disposed parallel to the direction of the principal ray to detect a respective one of the different wavelength ranges of incident light reflected from a corresponding one of the plurality of dichroic layers.2. The apparatus of claim 1 , wherein the detection array further comprises an electronic gate structure.3. The apparatus of claim 2 , wherein the detection array is front-side illuminated claim 2 , the electronic gate ...

IMAGE SENSOR DEVICES HAVING DUAL-GATED CHARGE STORAGE REGIONS THEREIN

An image sensor device may include a dual-gated charge storage region within a substrate. The dual-gated charge storage region includes first and second diodes within a common charge generating region. This charge generating region is configured to receive light incident on a surface of the image sensor device. The first and second diodes include respective first conductivity type regions responsive to first and second gate signals, respectively. These first and second gate signals are active during non-overlapping time intervals. 1. An image sensor device , comprising:a dual-gated charge storage region within a substrate, said dual-gated charge storage region comprising first and second diodes within a common charge generating region configured to receive light incident on a surface of the image sensor device, said first and second diodes comprising respective first conductivity type regions responsive to first and second gate signals, respectively, which are active during non-overlapping time intervals, and respective second conductivity type regions that form non-rectifying semiconductor junctions with the common charge generating region;a first transfer transistor having a first source/drain region electrically coupled to the common charge generating region; anda second transfer transistor having a first source/drain region electrically coupled to the common charge generating region.2. The image sensor device of claim 1 , wherein the first conductivity type regions of the first and second diodes are P-type anode regions; and wherein the second conductivity type regions of the first and second diodes are N-type cathode regions.3. The image sensor device of claim 2 , wherein the first source/drain region of said first transistor is in the N-type cathode region associated with the first diode.4. The image sensor device of claim 2 , wherein the substrate comprises a well region of first conductivity type therein; wherein the common charge generating region forms a P ...

SOLID-STATE IMAGE SENSOR, CONTROL METHOD FOR THE SAME, AND ELECTRONIC DEVICE

There is provided a solid-state image sensor including unit pixels each including a photoelectric transducer which generates a charge corresponding to an amount of incident light and accumulates the charge therein, a first transfer gate which transfers the charge accumulated in the photoelectric transducer, a charge holding region in which the charge transferred from the photoelectric transducer by the first transfer gate is held, a second transfer gate which transfers the charge held in the charge holding region, a floating diffusion region in which the charge transferred from the charge holding region by the second transfer gate is held to be read out as a signal, and a reset section which resets the charge in the floating diffusion region. The first transfer gate and the reset section are connected to an identical drive section through a drive line shared thereby, and are simultaneously driven by the drive section. 1. A solid-state image sensor comprising: a photoelectric transducer which generates a charge corresponding to an amount of incident light and accumulates the charge therein,', 'a first transfer gate which transfers the charge accumulated in the photoelectric transducer,', 'a charge holding region in which the charge transferred from the photoelectric transducer by the first transfer gate is held,', 'a second transfer gate which transfers the charge held in the charge holding region,', 'a floating diffusion region in which the charge transferred from the charge holding region by the second transfer gate is held to be read out as a signal, and', 'a reset section which resets the charge in the floating diffusion region,, 'a plurality of unit pixels each including'}wherein the first transfer gate and the reset section are connected to an identical drive section through a drive line shared by the first transfer gate and the reset section, and are simultaneously driven by the drive section.2. The solid-state image sensor according to claim 1 ,wherein the ...

Method of producing an image sensor having multiple output channels

A method for producing an image sensor includes providing a horizontal shift register electrically connected to a pixel array for receiving charge packets from the pixel array. A non-destructive sense node is provided that is connected to an output of the horizontal shift register. A charge directing switch is provided that is electrically connected to the non-destructive sense node. The charge directing switch includes first and second outputs. A charge multiplying horizontal shift register is provided that is electrically connected to the first output of the charge directing switch. A bypass horizontal shift register or an amplifier is provided that is connected to the second output of the charge directing switch.

IMAGING DEVICE AND IMAGING SYSTEM

An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes A and B, plural transfer MOSFETs A and B arranged corresponding to the plural photodiodes, respectively, and a common MOSFET which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET. 112-. (canceled)13. An imaging device comprising a plurality of pixel units ,wherein each of the plurality of pixel units includes:a first photoelectric conversion region;a second photoelectric conversion region;a first transfer MOS transistor including a first transfer gate electrode and configured to transfer a charge generated by the first photoelectric conversion region;a second transfer MOS transistor including a second transfer gate electrode and configured to transfer a charge generated by the second photoelectric conversion region, andan amplification MOS transistor including a gate electrode and configured to output a signal based on the charge generated by the first photoelectric conversion region and a signal based on the charge generated by the second photoelectric conversion region;wherein the plurality of pixel units includes a first pixel unit and a second pixel unit,wherein the first and second photoelectric conversion regions, the gate electrode of the amplification MOS transistor and the first and second transfer gate electrodes, of the first pixel unit, are respectively arranged in translational symmetry with the first and second photoelectric conversion regions, the gate electrode of the amplification MOS transistor and the first and second transfer gate electrodes, of the second pixel unit,wherein the amplification MOS transistor of the ...

SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD THEREOF, AND CAMERA WITH ALTERNATELY ARRANGED PIXEL COMBINATIONS

A solid-state imaging device includes a semiconductor substrate; a first conductive region of the semiconductor substrate; a first conductive region on an upper surface side of the first conductive region of the semiconductor substrate; a second conductive region below the first conductive region on the upper surface side of the first conductive region of the semiconductor substrate. The solid-state imaging device further includes a photoelectric conversion region including the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate and the second conductive region and a transfer transistor transferring charges accumulated in the photoelectric conversion region to a readout region; and a pixel including the photoelectric conversion region and the transfer transistor. The first conductive region, which is included in the photoelectric conversion region, extends to the lower side of a sidewall of a gate electrode of the transfer transistor. 1. A solid-state imaging device comprising:a semiconductor substrate;an epitaxial growth layer being located on the substrate; anda gate electrode being located in the epitaxial growth layer.2. The solid-state imaging device according to the claim 1 , wherein the gate electrode is a part of a transfer transistor.3. The solid-state imaging device according to the claim 1 , wherein a readout region being formed on the side of the gate electrode located on the epitaxial growth layer.4. The solid-state imaging device according to the claim 1 , wherein a photoelectric conversion region being formed in the semiconductor substrate.5. The solid-state imaging device according to the claim 1 , wherein the gate electrode having sidewalls.6. The solid-state imaging device according to the claim 3 , wherein the readout region is a drain region.7. The solid-state imaging device according to the claim 4 , wherein the photoelectric conversion region is a source region of the transfer ...

LINEAR SENSOR, IMAGE SENSOR, AND ELECTRONIC APPARATUS

There is provided a linear sensor including a plurality of sensor elements that are disposed in line, each including a light sensing part that senses light, generates an electric charge according to an amount of the sensed light, and accumulates the electric charge, a readout gate used to read out the electric charge accumulated in the light sensing part, and a reset gate used to discharge the electric charge accumulated in the light sensing part so as to be reset, wherein a region having a highest concentration of an impurity included in the light sensing part is formed in a position similarly away from the readout gate and the reset gate in the light sensing part. 1. A linear sensor comprising: a light sensing part that senses light, generates an electric charge according to an amount of the sensed light, and accumulates the electric charge,', 'a readout gate used to read out the electric charge accumulated in the light sensing part, and', 'a reset gate used to discharge the electric charge accumulated in the light sensing part so as to be reset,, 'a plurality of sensor elements that are disposed in line, each including'}wherein a region having a highest concentration of an impurity included in the light sensing part is formed in a position similarly away from the readout gate and the reset gate in the light sensing part.2. The linear sensor according to claim 1 ,wherein the readout gate is disposed along a lower side surface that is a short side of the light sensing part formed in an elongated shape, andwherein the reset gate is disposed in an end portion of one side surface that is a long side of the light sensing part on the lower side surface side.3. The linear sensor according to claim 2 ,wherein a width of the readout gate is narrower than the width between side surfaces that are long sides of the light sensing part, andwherein the readout gate is disposed nearer to the one side surface of the light sensing part where the reset gate is disposed.4. The linear ...

SOLID-STATE IMAGING APPARATUS AND METHOD FOR DRIVING THE SAME

A solid-state imaging apparatus includes a pixel array in which pixels are arranged in a matrix. Each pixel includes a photoelectric conversion element, a transfer transistor, an amplifier transistor, and a reset transistor. The pixel array an effective pixel part in which light enters the photoelectric conversion element and which is configured to output a video signal, an optical black pixel part in which the photoelectric conversion element is shielded from light and which is configured to output a reference signal, and a dummy pixel part. Of pixels connected to the same signal output line, effective pixels of the effective pixel part are configured such that a first potential is supplied from the reset transistor to a floating diffusion part, and clipping pixels of the dummy pixel part are configured such that a second potential is supplied from the reset transistor to the floating diffusion part. 1. A solid-state imaging apparatus comprising:a pixel array in which a plurality of unit pixels are arranged in a matrix, a photoelectric conversion element configured to perform photoelectric conversion,', 'a transfer transistor configured to transfer signal charge from the photoelectric conversion element to a floating diffusion part,', 'an amplifier transistor configured to amplify the signal charge and output the amplified signal charge to a signal output line as an analog signal, and', 'a reset transistor configured to reset the floating diffusion part by supplying a potential of a reset line to the floating diffusion part,, 'wherein each unit pixel includes'} an effective pixel part which is formed in a light-irradiated pixel part where light enters the photoelectric conversion element and in which the signal charge is used as a video signal,', 'an optical black pixel part which is formed in a light-shielded pixel part where the photoelectric conversion element is shielded from light and in which the signal charge is used as a reference signal, and', 'a dummy ...

DETECTION APPARATUS, DETECTION SYSTEM, AND METHOD FOR MANUFACTURING DETECTION APPARATUS

A detection apparatus includes a plurality of pixels and a plurality of signal wires arranged on a substrate, in which each of the plurality of pixels includes a switch element arranged on the substrate and a conversion element arranged on the switch element, the conversion element includes a first electrode which is arranged on the switch element and electrically connected to the switch element and a semiconductor layer arranged over a plurality of the first electrodes, and a plurality of the switch elements is electrically connected to the plurality of signal wires, and the detection apparatus further includes a constant potential wire which is supplied with a constant potential, in which the first electrode is electrically connected to the constant potential wire in apart of pixels among the plurality of pixels. 1. A detection apparatus comprising:a plurality of signal wires arranged on a substrate;a plurality of pixels arranged on the substrate,wherein each of the plurality of pixels includes a switch element arranged on the substrate and a conversion element arranged on the switch element,wherein the conversion element includes a first electrode arranged on the switch element and electrically connected to the switch element and a semiconductor layer arranged over a plurality of the first electrodes, andwherein a plurality of the switch elements is electrically connected to the plurality of signal wires; anda constant potential wire arranged on the substrate and supplied with a constant potential,wherein the first electrode is electrically connected to the constant potential wire in a part of pixels among the plurality of pixels.2. The detection apparatus according to claim 1 ,wherein the connection between the switch elements of the part of pixels and signal wires electrically connected to the switch elements of the part of pixels among the plurality of signal wires is cut off.3. The detection apparatus according to claim 2 , further comprising a plurality of ...

SOLID-STATE IMAGING DEVICE, METHOD FOR MANUFACTURING THE SAME, METHOD FOR DRIVING THE SAME, AND ELECTRONIC APPARATUS

An imaging device with () a substrate; () a substrate voltage supply that applies a first potential to the substrate during a light receiving period and applies a second potential to the substrate during a no-light receiving period; and () a plurality of pixels each including (a) a light conversion portion, (b) a storage portion that stores signal charges g from the light conversion portion when the first potential is applied to the substrate, (c) a first layer that is in the substrate and set apart from the storage portion by a predetermined distance and adjusts potential distribution in the substrate so that the signal charges generated in the light receiving portion when the second potential is applied to the substrate are swept to a rear surface side of the substrate, and (d) a vertical transfer portion that transfers a signal based on the signal charges in a vertical direction. 1. An imaging device comprising:a substrate;a substrate voltage supply that applies a first potential to the substrate during a light receiving period and applies a second potential to the substrate during a no-light receiving period; anda plurality of pixels each including (a) a light receiving portion that generates signal charges in response to received light, (b) a storage portion that stores the signal charges generated in and transferred from the light receiving portion when the first potential is applied to the substrate, (c) a first layer that is in the substrate and set apart from the storage portion by a predetermined distance and adjusts potential distribution in the substrate so that the signal charges generated in the light receiving portion when the second potential is applied to the substrate are swept to a rear surface side of the substrate, and (d) a vertical transfer portion that transfers a signal based on the signal charges in a vertical direction.2. The imaging device of claim 1 , wherein the imaging device is a CCD image sensor.3. The imaging device of claim 3 , ...

SOLID-STATE IMAGING DEVICE

In an embodiment, each of first and second pixel rows has pixels. A first transfer gate is arranged between the first and second pixel rows. Second transfer gates are arranged adjacently to odd-numbered pixels of the second pixel row, respectively. Third transfer gates are arranged adjacently to even-numbered pixels of the second pixel row, respectively. A first CCD register is arranged adjacently to the second transfer gates and third transfer gates. Fourth transfer gates are arranged adjacently to odd-numbered accumulation gates of the first CCD register. A second CCD register is arranged adjacently to the fourth transfer gates. An output portion converts transferred charges into a voltage signal. A clear gate controls draining of the charges accumulated in the first pixel row to a first drain portion. A switch gate controls draining of charges transferred in a row direction in the second CCD register to a second drain portion. 1. A solid-state imaging device , comprising:a first pixel row including pixels which convert incident light photoelectrically and accumulate acquired charges;a second pixel row including pixels which convert incident light photoelectrically and accumulate acquired charges;a first transfer gate arranged between the first pixel row and the second pixel row;second transfer gates arranged adjacently to odd-numbered ones of the pixels of the second pixel row, respectively;third transfer gates arranged adjacently to even-numbered ones of the pixels of the second pixel row, the third transfer gates being provided alternately with the second transfer gates, respectively;a first CCD register arranged adjacently to the second transfer gates and third transfer gates provided alternately, the a first CCD register accumulating transferred charges;fourth transfer gates arranged adjacently to odd-numbered accumulation gates of the first CCD register;a second CCD register arranged adjacently to the fourth transfer gates, the a second CCD register ...

SOLID-STATE IMAGING DEVICE AND METHOD OF CONTROLLING THE SAME

According to one embodiment, a solid-state imaging device includes a semiconductor region, a first diffusion layer, a second diffusion layer, a third diffusion layer, an insulating film, a potential layer, and a read electrode. The semiconductor region includes first and second surfaces. The first diffusion layer is formed in the first surface. The first diffusion layer's concentration is a maximum value in a position at a first depth. The charge accumulation layer has a second depth. The second diffusion layer contacts the first diffusion layer. The third diffusion layer is formed in a position which faces the second diffusion layer in respect to the first diffusion layer. The insulating film is formed on the first surface. The potential layer is formed on the insulating film and has a predetermined potential. The read electrode is formed on the insulating film. 1. A solid-state imaging device comprising:a pixel which includes a photodiode, a potential layer, and a read transistor, the photodiode carrying out photoelectric conversion on received light and receiving an electron, the potential layer being provided in a cathode of the photodiode, the read transistor transferring the electron subjected to photoelectric conversion by the photodiode to a floating diffusion layer; anda power module which transfers a voltage to the potential layer,wherein the voltage is a negative voltage, andwhen the negative voltage is applied to the potential layer, a capacitance is formed between the potential layer and the photodiode.2. The device according to claim 1 , wherein the photodiode includes a first diffusion layer formed in a semiconductor region surface of a first or second conductivity type claim 1 ,the first diffusion layer is formed to a position at a first depth from the semiconductor region surface, anda distance between the read electrode and the potential layer included in the read transistor is smaller than the first depth.3. The device according to claim 1 , ...

SOLID-STATE IMAGING DEVICE

A solid-state imaging device including: a semiconductor substrate of a first conductivity type, having a fixed electric potential; a dark-current drain region of a second conductivity type, formed on a portion of the semiconductor substrate; a connection region of the first conductivity type, formed on another portion of the semiconductor substrate where the dark-current drain region is not formed; a well region of the first conductivity type, covering the dark-current drain region and the connection region; and a first region and a second region, formed within the well region and constituting a part of a read transistor that reads signal charge generated by photoelectric conversion. The well region is maintained at a fixed electric potential by being connected to the semiconductor substrate via the connection region. 1. A solid-state imaging device comprising:a semiconductor substrate of a first conductivity type, having a fixed electric potential;a dark-current drain region of a second conductivity type, formed on a portion of the semiconductor substrate;a connection region of the first conductivity type, formed on another portion of the semiconductor substrate where the dark-current drain region is not formed;a well region of the first conductivity type, covering the dark-current drain region and the connection region; anda first region and a second region, formed within the well region and constituting a part of a read transistor that reads signal charge generated by photoelectric conversion, the first region and the second region respectively serving as a source region and a drain region of the read transistor, whereinthe well region is maintained at a fixed electric potential by being connected to the semiconductor substrate via the connection region.2. The solid-state imaging device of further comprising:a third region formed within the well region, the third region in combination with the second region constituting a part of a reset transistor that resets an ...

SOLID-STATE IMAGING APPARATUS AND ELECTRONIC APPARATUS

A solid-state imaging apparatus includes a charge accumulation unit, a signal voltage detection unit, a transfer transistor, and a pinning layer. The charge accumulation unit accumulates photoelectrically converted charges, and is formed on a silicon substrate. The signal voltage detection unit detects signal voltage corresponding to the charges accumulated in the charge accumulation unit, and is formed on the silicon substrate. The transfer transistor transfers the charges accumulated in the charge accumulation unit to the signal voltage detection unit, and is formed on the silicon substrate. The pinning layer pins a surface of the silicon substrate so that the surface is filled with electron holes, and is formed directly on the silicon substrate at a gate end at which a gate electrode of the transfer transistor and the charge accumulation unit come into contact with each other on the silicon substrate. 1. A solid-state imaging apparatus , comprising:a charge accumulation unit configured to accumulate photoelectrically converted charges, the charge accumulation unit being formed on a silicon substrate;a signal voltage detection unit configured to detect signal voltage corresponding to the charges accumulated in the charge accumulation unit, the signal voltage detection unit being formed on the silicon substrate;a transfer transistor configured to transfer the charges accumulated in the charge accumulation unit to the signal voltage detection unit, the transfer transistor being formed on the silicon substrate; anda pinning layer configured to pin a surface of the silicon substrate so that the surface is filled with electron holes, the pinning layer being formed directly on the silicon substrate at a gate end at which a gate electrode of the transfer transistor and the charge accumulation unit come into contact with each other on the silicon substrate.2. The solid-state imaging apparatus according to claim 1 , wherein an n-type semiconductor area formed in the ...

PHOTOELECTRIC CONVERSION DEVICE AND IMAGING SYSTEM

A photoelectric conversion device includes: a first semiconductor region of a first conductivity type, which configures a first photoelectric conversion element; a second semiconductor region of the first conductivity type, which configures a second photoelectric conversion element; a third semiconductor region of the first conductivity type; a fourth semiconductor region of the first conductivity type; a first gate electrode, configuring a first transfer transistor conjointly; and a second gate electrode, configuring a second transfer transistor. At a side of the first gate electrode which is toward the first semiconductor region in plan view of the surface of the semiconductor substrate, a length of the side of the first gate electrode toward the first semiconductor region, is shorter than a length of the active region, and a length of the side of the first gate electrode toward the first semiconductor region, is longer than a length of the first semiconductor region.

SOLID-STATE IMAGING APPARATUS AND IMAGING SYSTEM

Provided is a solid-state imaging apparatus including plural pixels each including a first pixel connecting transistor and a second pixel connecting transistor each connected at one end to a floating diffusion node, a first pixel connecting line connected to the other end of the first pixel connecting transistor, and a second pixel connecting line connected to the other end of the second pixel connecting transistor. The first pixel connecting line provided in a first pixel of the plural pixels is connected to the second pixel connecting line provided in a second pixel of the plural pixels, and the second pixel connecting line provided in the first pixel is connected to the first pixel connecting line provided in a third pixel of the plural pixels. 1. A solid-state imaging apparatus comprising: a photoelectric converter configured to generate an electric charge by photoelectric conversion;', 'a transfer transistor configured to transfer the electric charge;', 'a floating diffusion node configured to hold the electric charge transferred by the transfer transistor;', 'a source follower transistor configured to output a signal based on an electric potential of the floating diffusion node;', 'a first pixel connecting transistor and a second pixel connecting transistor each having a drain node and a source node, one of the drain node and the source node being connected to the floating diffusion node;', 'a first pixel connecting line connected to the other of the drain node and the source node of the first pixel connecting transistor; and', 'a second pixel connecting line connected to the other of the drain node and the source node of the second pixel connecting transistor,, 'a plurality of pixels each includingwherein the first pixel connecting line included in a first pixel of the plurality of pixels is connected to the second pixel connecting line included in a second pixel of the plurality of pixels, andwherein the second pixel connecting line included in the first ...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

According to the embodiments, a semiconductor device having a CMOS image sensor is provided. The CMOS image sensor includes a plurality of photoelectric conversion units adapted to photoelectrically convert an incident light into signal charges; and a transfer unit adapted to transfer the signal charges generated by the photoelectric conversion unit to a floating diffusion unit from the photoelectric conversion unit. A channel portion of a transfer gate transistor of the transfer unit has at least one SiGe layer. 1. A semiconductor device comprising a CMOS image sensor , the CMOS image sensor comprising:a plurality of photoelectric conversion units adapted to photoelectrically convert an incident light into signal charges; anda transfer unit which comprises a transfer gate under which a channel region is formed, adapted to transfer the signal charges generated by the photoelectric conversion unit to a floating diffusion unit from the photoelectric conversion unit through the channel region,wherein the channel portion of the transfer gate of the transfer unit has at least one SiGe layer.2. The semiconductor device according to claim 1 , wherein the SiGe layer is extended to the floating diffusion unit claim 1 , and is fully removed in at least a contact region of the floating diffusion unit.3. The semiconductor device according to claim 1 , wherein the photoelectric conversion unit comprises a photodiode unit claim 1 , and the SiGe layer is provided in an upper layer of the photodiode unit.4. The semiconductor device according to claim 1 , wherein an uppermost layer of the channel portion of the transfer gate is a Si layer claim 1 , and its lower layer is a SiGe layer.5. The semiconductor device according to claim 1 , wherein the uppermost layer of the channel portion of the transfer gate is a SiGegradient composition layer (X: 0 Подробнее

IMAGERS WITH IMPROVED ANALOG-TO-DIGITAL CIRCUITRY

An imager may include an array of pixels. The pixel array may be arranged in rows and columns. Each pixel of the pixel array may include a photodiode that is coupled to a floating diffusion region by a transfer gate. A source-follower transistor may be coupled between the floating diffusion region and a pixel output node. The imager may include ramp circuitry that provides a ramp signal to the floating diffusion region. A capacitor interposed between the ramp circuitry and the floating diffusion region may be used in conveying the ramp signal to the floating diffusion region. The pixel may be coupled to a comparator that is implemented using separate circuitry or may include portions of the pixel. 1. A pixel array , comprising:an imaging pixel having a floating diffusion region; andramp circuitry that provides a ramp signal to the floating diffusion region of the imaging pixel.2. The pixel array defined in further comprising a capacitor that is coupled between the floating diffusion region and a signal path that is coupled to the ramp circuitry claim 1 , wherein the ramp signal is conveyed over the capacitor and the signal path to the floating diffusion region of the imaging pixel.3. The pixel array defined in further comprising a comparator that receives a pixel output signal of the imaging pixel.4. The pixel array defined in wherein the comparator comprises:a comparator output that provides a comparator output signal;a first input that receives the pixel output signal; anda second input that is coupled to the comparator output by a feedback path.5. The pixel array defined in wherein the feedback path comprises a switch that is interposed between the second input and the comparator output.6. The pixel array defined in further comprising a capacitor coupled between the second input and a ground terminal.7. The pixel array defined in further comprising:analog-to-digital circuitry that is coupled to the comparator output.8. The pixel array defined in wherein the image ...

Solid-state imaging element and method of manufacturing the same

Provided are a solid-state imaging element which can be simply manufactured and can control movement of electric charges in an accumulation region with a high degree of accuracy, and a method of manufacturing the same. A solid-state imaging element ( 1 a ) includes a substrate ( 11 ) having a first conductivity type; an accumulation region ( 12 ) having a second conductivity type and provided in the substrate ( 11 ); a read-out region ( 13 ) for receiving the transferred electric charges accumulated in the accumulation region ( 12 ); and a transfer section ( 14 ) for transferring the electric charges from the accumulation region ( 12 ) to the read-out region ( 13 ). An impurity concentration modulation region 121 having a locally high concentration of an impurity having the second conductivity type, or having a locally low concentration of an impurity having the first conductivity type is formed in a part of the accumulation region ( 12 ). An area of the impurity concentration modulation region ( 121 ) per unit distance with respect to the transfer section ( 14 ), or a density of the discretely provided impurity concentration modulation region ( 121 ) increases with decreasing distance to the transfer section ( 14 ).

PHOTOELECTRIC CONVERSION DEVICE AND IMAGING SYSTEM

Provided is a photoelectric conversion device including: a photoelectric conversion portion in a substrate that photoelectrically converts incident light to generate charges; a transfer transistor including a control electrode on the substrate that transfers the charges from the photoelectric conversion portion; wiring layers above the control electrode; a first wiring in a first wiring layer of the wiring layers that is the closest to the substrate; and a drive wiring in a second wiring layer above the first wiring layer, a control signal for controlling the transfer transistor being transferred to the control electrode via the drive wiring and first wiring and, in a plan view, at least part of the first wiring overlapping with at least part of the control electrode and at least part of an edge of the first wiring extending along an edge of the control electrode on a side facing the photoelectric conversion portion. 1. A photoelectric conversion device comprising:a substrate;a first photoelectric conversion portion that is formed in the substrate and photoelectrically converts an incident light to generate charges;a first transfer transistor that includes a first control electrode formed on the substrate and transfers the charges from the first photoelectric conversion portion;a plurality of wiring layers arranged above the first control electrode;a first wiring included in a first wiring layer of the plurality of wiring layers, the first wiring layer being the closest to the substrate;a drive wiring included in a second wiring layer arranged above the first wiring layer; anda scanning circuit that outputs a control signal for controlling the first transfer transistor,wherein the control signal is transferred to the first control electrode via the drive wiring and the first wiring, andwherein at least a part of the first wiring is arranged so as to overlap with at least a part of the first control electrode in a plan view, and at least a part of an edge of the ...

PHOTOSENSITIVE CELL OF AN IMAGE SENSOR

An image sensor cell formed inside and on top of a substrate of a first conductivity type includes: a storage region of the second conductivity type; a read region of the second conductivity type; a transfer region located between the storage region and the read region; and a transfer gate topping the transfer region and which does not or does not totally top the storage region. The transfer region comprises a first area of the first conductivity type in the vicinity of the storage region, and a second area of the second conductivity type extending between the first area and the read region. 1. An image sensor cell , comprising:a storage region formed in a semiconductor substrate of a first conductivity type, the storage region being of a second conductivity type;a read region of the second conductivity type formed in the substrate;a transfer region located between the storage region and the read region; anda transfer gate completely topping the transfer region and which does not or does not totally top the storage region,wherein the transfer region comprises a first area of the first conductivity type adjacent to the storage region, and a second area of the second conductivity type extending between the first area and the read region.2. The cell of claim 1 , wherein the first and second areas both extend all the way to a surface of the substrate and have a common lateral edge.3. The cell of claim 1 , wherein the second area has a thickness and doping level selected so that:the second area is configured to store photogenerated charges in a first operating mode in response to a voltage ranging between 2 and 4 V being applied to the gate; andthe second area is configured to be fully depleted of photogenerated charges in a second operating mode in response to a voltage ranging between −1 and 0 V being applied to the gate.4. The cell of claim 1 , wherein the second area and the read region having substantially equal doping levels.5. The cell of claim 1 , wherein the ...

METHOD FOR PRODUCTION OF SOLID-STATE IMAGING ELEMENTS, SOLID-STATE IMAGING ELEMENT, AND IMAGING APPARATUS

A method for producing a solid-state imaging element which has photoconversion pixels, the method including forming an impurity region of the first conduction type and a second impurity region of the second conduction type on the impurity region of the first conduction type by ion implantation by using the same mask; forming on the surface of the semiconductor substrate a transfer gate constituting the charge transfer section which extends over the second impurity region of the second conduction type; forming a charge accumulating region of the first conduction type constituting the sensor section by ion implantation; and forming a first impurity region of the second conduction type, which has a higher impurity concentration than the second impurity region of the second conduction type, by ion implantation. 1. A method for production of a solid-state imaging element which has pixels , each including a sensor section that performs photoelectric conversion and a charge transfer section that transfers charges generated by said sensor section , said method comprising:forming in a semiconductor substrate an impurity region of the first conduction type and a second impurity region of the second conduction type on said impurity region of the first conduction type by ion implantation by using the same mask;forming on the surface of said semiconductor substrate a transfer gate constituting the charge transfer section which extends over said second impurity region of the second conduction type;forming in said semiconductor substrate a charge accumulating region of the first conduction type constituting said sensor section by ion implantation; andforming on the surface of said semiconductor substrate of said sensor section a first impurity region of the second conduction type, which has a higher impurity concentration than said second impurity region of the second conduction type, by ion implantation.2. The method for production of a solid-state imaging element as defined in ...

SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD OF SOLID-STATE IMAGING DEVICE, AND IMAGING SYSTEM

A solid-state imaging device has: a counter dope region of a first conductivity type which is formed so as to surround a drain region of a transfer transistor of the solid-state imaging device and in which impurity concentration of the first conductivity type is lower than that of the drain region; and an isolating region of a second conductivity type which is formed in a deep region below channel regions of a plurality of transistors and in which impurity concentration of the second conductivity type is higher than that of a well region, wherein a depth position of a lower surface of the counter dope region is deeper than a depth position of a lower surface of a buried channel region. 1. A solid-state imaging device having a pixel in which a photoelectric conversion unit configured to accumulate electric charges generated by photoelectrically converting incident light , a transfer transistor of an MOS type configured to transfer the electric charges from the photoelectric conversion unit to a floating diffusion unit , and an outputting unit configured to output a signal corresponding to an amount of electric charges transferred to the floating diffusion unit are arranged in a well region of a second conductivity type , whereina first semiconductor region of the well region includesa first isolating region of the second conductivity type which is formed in a deep region below a drain region of a first conductivity type of the transfer transistor and in which impurity concentration of the second conductivity type is higher than that of the well region anda counter dope region of the first conductivity type which is formed in a region from an upper surface of the first semiconductor region to a depth position where impurity concentration of the first conductivity type of the photoelectric conversion unit becomes a peak so as to surround the drain region and in which the impurity concentration of the first conductivity type is lower than that of the drain region;a ...

SOLID-STATE IMAGING DEVICE AND LINE SENSOR

Certain embodiments provide a solid-state imaging device including a pixel portion, a charge storage portion, a first transfer gate portion, a charge detecting portion, a second transfer gate portion, and an offset gate portion. The charge storage portion stores the electrical charges generated in the pixel portion. The first transfer gate portion transfers electrical charges from the pixel portion to the charge storage portion, and the second transfer gate portion transfers the electrical charges from the charge storage portion to the charge detecting portion. The offset gate portion is provided between the second transfer gate portion and the charge detecting portion and is applied with a predetermined constant voltage. This offset gate portion includes an offset gate layer that has a plurality of projections formed at positions adjacent to the second transfer gate portion and an offset gate electrode. 1. A solid-state imaging device comprising:a pixel portion generating electrical charges according to an amount of received incident light;a charge storage portion storing the electrical charges generated in the pixel portion;a first transfer gate portion reading the electrical charges from the pixel portion and transferring the electrical charges to the charge storage portion;a charge detecting portion to which the electrical charges stored in the charge storage portion are transferred and which causes a voltage drop corresponding to the amount of the transferred electrical charges to occur;a second transfer gate portion reading the electrical charges stored in the charge storage portion and transferring the electrical charges to the charge detecting portion; andan offset gate portion provided between the second transfer gate portion and the charge detecting portion and applied with a predetermined constant voltage,wherein the offset gate portion includes an offset gate layer that is provided on a surface of a semiconductor substrate and has a plurality of ...

SOLID-STATE IMAGING DEVICE AND LINE SENSOR

Certain embodiments provide a solid-state imaging device including a pixel portion including a first light receiving layer, a charge accumulation portion including a first charge accumulation layer which accumulates a charge, a first transfer gate portion, a charge detection portion and a second transfer gate portion. The first transfer gate portion transfers the charge from the pixel portion to the charge accumulation portion, and the second transfer gate portion transfers the charge from the charge accumulation portion to the charge detection portion. The charge detection portion causes a voltage drop corresponding to an amount of the charge transferred to this region. An impurity layer of a ring shape which includes an opening portion is provided on a surface of at least one of the first light reception layer of the pixel portion and the first charge accumulation layer of the charge accumulation portion. 1. A solid-state imaging device comprising:a pixel portion having a first light receiving layer which is provided in a planar shape on a surface of a semiconductor substrate and which produces a charge according to an amount of received light of incident light;a charge accumulation portion having a first charge accumulation layer which is provided in a planar shape on the surface of the semiconductor substrate and which accumulates the charge produced in the pixel portion;a first transfer gate portion reading the charge from the pixel portion and transferring the charge to the charge accumulation portion;a charge detection portion to which the charge accumulated in the charge accumulation portion is transferred and which causes a voltage drop corresponding to an amount of the transferred charge to occur; anda second transfer gate portion reading the charge accumulated in the charge accumulation portion and transferring the charge to the charge detection portion,wherein an impurity layer of a ring shape which has an opening portion is provided on a surface of at ...

PHOTOELECTRIC CONVERSION DEVICE, METHOD OF MANUFACTURING THE SAME, AND CAMERA

A photoelectric conversion device, comprising a photoelectric conversion portion, provided in a semiconductor substrate, including a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type provided adjacent to the first semiconductor region, a third semiconductor region of the first conductivity type provided at a position away from the second semiconductor region, and a gate electrode provided between the second semiconductor region and the third semiconductor region, wherein the second semiconductor region is provided at a position away from the gate electrode, and the semiconductor substrate includes a region of a second conductivity type within a region extending from an edge of the second semiconductor region to below the gate electrode. 1. A photoelectric conversion device comprising:a photoelectric conversion portion, provided in a semiconductor substrate, including a first semiconductor region of a first conductivity type;a second semiconductor region of the first conductivity type, provided adjacent to the first semiconductor region, having a lower concentration of an impurity of the first conductivity than the first semiconductor region;a third semiconductor region of the first conductivity type provided at a position away from the second semiconductor region; anda gate electrode provided on an insulation film on the semiconductor substrate between the second semiconductor region and the third semiconductor region,wherein, in a planar view, the second semiconductor region is provided at a position away from the gate electrode, andthe semiconductor substrate includes a region of a second conductivity type different in polarity from the first conductivity type within a region extending from an edge of the second semiconductor region to below the gate electrode.2. The device according to claim 1 , wherein the concentration of the impurity of the first conductivity type of the second semiconductor ...

REAR-SURFACE-INCIDENT SOLID STATE IMAGING ELEMENT AND METHOD FOR MANUFACTURING SAME

In a back-illuminated solid-state image pickup device, first charge transfer electrode groups (vertical shift register) are present in an imaging region, and second charge transfer electrode groups (horizontal shift register) are present in a peripheral region of the imaging region. The light incident surface of the semiconductor substrate corresponding to the peripheral region is etched, and an inorganic light shielding substance SH is filled in the etched region. The amount of the inorganic light shielding substance that evaporates and vaporizes under the vacuum environment is extremely small, and the influence on the imaging by the vaporized gas is small. 1. A back-illuminated solid-state image pickup device comprising:a semiconductor substrate having a light incident surface;first charge transfer electrode groups provided on a surface of the semiconductor substrate opposite to the light incident surface; andsecond charge transfer electrode groups that further transfer charges transferred by the first charge transfer electrode groups in a horizontal direction,wherein the first charge transfer electrode groups are disposed in an imaging region,wherein the second charge transfer electrode groups are disposed in a peripheral region of the imaging region, andwherein the light incident surface of the semiconductor substrate corresponding to the peripheral region is etched, and an inorganic light shielding substance is filled in the etched region.2. The back-illuminated solid-state image pickup device according to claim 1 ,wherein a thickness of the semiconductor substrate is 200 μm or less in both the imaging region and the peripheral region.3. The back-illuminated solid-state image pickup device according to claim 1 ,wherein the inorganic light shielding substance is obtained by evaporating a solvent from a solution in which carbon black is dissolved in the solvent.4. The back-illuminated solid-state image pickup device according to claim 1 ,wherein an accumulation ...

PIXEL ARRAY INCLUDED IN AUTO-FOCUS IMAGE SENSOR AND AUTO-FOCUS IMAGE SENSOR INCLUDING THE SAME

A pixel array included in an auto-focus image sensor includes a substrate, a plurality of pixels, a deep device isolation region and a plurality of first ground regions. The substrate includes a first surface on which a gate electrode is disposed and a second surface opposite to the first surface. The plurality of pixels are disposed in the substrate, and include a plurality of first pixels configured to detect a phase difference and a plurality of second pixels configured to detect an image. The deep device isolation region is disposed in the substrate, extends substantially vertically from the second surface of the substrate to isolate the plurality of pixels from each other. The plurality of first ground regions are disposed adjacent to the first surface in the substrate and adjacent to only at least some of the plurality of first pixels. 1. A pixel array included in an auto-focus image sensor , comprising:a substrate including a first surface and a second surface opposite to the first surface, a gate electrode being disposed on the first surface;a plurality of pixels in the substrate, the plurality of pixels including a plurality of first pixels configured to detect a phase difference and a plurality of second pixels configured to detect an image;a deep device isolation region in the substrate, the deep device isolation region extending substantially vertically from the second surface of the substrate to isolate the plurality of pixels from each other; anda plurality of first ground regions adjacent to the first surface in the substrate and adjacent to only at least some of the plurality of first pixels.2. The pixel array of claim 1 , wherein:a number of the plurality of first ground regions is equal to a number of the plurality of first pixels, andthe plurality of first ground regions are adjacent to all of the plurality of first pixels.3. The pixel array of claim 1 , wherein:a number of the plurality of first ground regions is less than a number of the ...

UNIT PIXEL OF IMAGE SENSOR, IMAGE SENSOR INCLUDING THE SAME AND METHOD OF MANUFACTURING IMAGE SENSOR

Provided are a unit pixel, an image sensor including the same, a portable electronic device including the same, and a method of manufacturing the same. The method of manufacturing includes: forming a photoelectric conversion region in a substrate; forming, in the substrate, a first floating diffusion region spaced apart from the photoelectric conversion region of the substrate, and a second floating diffusion region spaced apart from the first floating diffusion region; forming a first recess spaced apart from the first floating diffusion region and the second floating diffusion region by removing a portion of the substrate from a first surface of the substrate; filling the first recess to form a dual conversion gain (DCG) gate that extends perpendicularly or substantially perpendicularly from the first surface of the substrate; and forming a conductive layer to fill an inside of the first recess. 1. A method of manufacturing a unit pixel of an image sensor , the method comprising:forming a photoelectric conversion region in a substrate;forming, in the substrate, a first floating diffusion region spaced apart from the photoelectric conversion region of the substrate, and a second floating diffusion region spaced apart from the first floating diffusion region;forming a first recess spaced apart from the first floating diffusion region and the second floating diffusion region by removing a portion of the substrate from a first surface of the substrate;filling the first recess to form a dual conversion gain (DCG) gate that extends perpendicularly or substantially perpendicularly from the first surface of the substrate; andforming a conductive layer to fill an inside of the first recess.2. The method as claimed in claim 1 , wherein the forming the recess comprises forming the recess to have a bottom surface with a rounded corner.34-. (canceled)5. The method as claimed in claim 1 , further comprising:forming a second recess spaced apart from the first floating diffusion ...

SEMICONDUCTOR LIGHT DETECTION ELEMENT

A semiconductor photodetector includes a semiconductor substrate including a silicon substrate. The semiconductor substrate includes a second main surface as a light incident surface and a first main surface opposing the second main surface. In the semiconductor substrate, carriers are generated in response to incident light. A plurality of protrusions is formed on the second main surface. The protrusion includes a slope inclined with respect to a thickness direction of the semiconductor substrate. At the protrusion, a (111) surface of the semiconductor substrate is exposed as the slope. The height of the protrusion is equal to or more than 200 nm. 1. A semiconductor photodetector , comprising a silicon substrate including a light incident surface and a back surface opposing the light incident surface and configured to generate carriers in response to incident light ,wherein a plurality of protrusions including slopes inclined with respect to a thickness direction of the silicon substrate is formed on the light incident surface,a (111) surface of the silicon substrate is exposed as the slope at the protrusion, anda height of the protrusion is equal to or more than 200 nm.2. The semiconductor photodetector according to claim 1 ,wherein a semiconductor region having a conductivity type different from that of the silicon substrate is provided on the back surface side of the silicon substrate,an accumulation layer is provided on the light incident surface side of the silicon substrate, andthe slope of the protrusion is included in a surface of the accumulation layer.3. The semiconductor photodetector according to claim 1 ,wherein a semiconductor region having a conductivity type different from that of the silicon substrate is provided on the light incident surface side of the silicon substrate.4. The semiconductor photodetector according to claim 1 , further comprising:an oxide film disposed on the light incident surface and configured to transmit the incident light, ...

PIXEL CIRCUIT

A pixel arrangement includes a photodiode, a reset transistor configured to be controlled by a reset signal and coupled to a reset input voltage, a transfer gate transistor configured to transfer charge from the photodiode to a node, wherein the transfer gate transistor is controlled by a transfer gate voltage, and a source follower transistor controlled by the voltage on the node and coupled to a source follower voltage. A capacitor is coupled between the node and an input voltage. During a read operation the input voltage is increased to boost the voltage at the node. The increased input voltage may, for example, be one the reset input voltage, said source follower voltage, said transfer gate voltage and a boosting voltage. 1. A pixel arrangement , comprising:at least one photodiode;at least one reset transistor configured to be controlled by a reset signal and coupled in use to a reset input voltage;a transfer gate transistor for each photodiode configured to transfer charge from the photodiode to a node, said transfer gate transistor configured to be controlled by a transfer gate voltage, andat least one source follower transistor configured to be controlled by the voltage on the node and coupled in use to a source follower voltage; andat least one capacitance coupled between the node and an input voltage;wherein during a read operation, the input voltage causes a voltage of said node to increase before said transfer gate transfers charge.2. The arrangement of claim 1 , wherein said input voltage is one or more of said reset input voltage claim 1 , said transfer gate voltage and said source follower voltage.3. The arrangement as claimed in claim 1 , comprising at least one read transistor configured to be controlled by a read voltage claim 1 , wherein during a read operation said read voltage has a read value.4. The arrangement as claimed in claim 3 , wherein said input voltage is said read voltage.5. The arrangement as claimed in claim 3 , wherein said input ...

RADIATION DETECTOR

A radiation detector may include: a common electrode; a thin film transistor (TFT) array; a photoconductor material layer disposed between the common electrode and the TFT array; and a diffusion stop layer, disposed between the common electrode and the TFT array, on a location corresponding to a connecting portion where the common electrode is connected to a bias voltage supply source, wherein the diffusion stop layer prevents a metal included in the connecting portion from diffusing to the photoconductor material layer. 1. A radiation detector comprising:a common electrode including a connecting portion configured to connect the common electrode and a bias voltage source;a thin film transistor (TFT) array;a photoconductor material layer between the common electrode and the TFT array; anda diffusion stop layer between the common electrode and the TFT array, in a location corresponding to the connecting portion, the diffusion stop layer configured to prevent a metal included in the connecting portion from diffusing to the photoconductor material layer.2. The radiation detector of claim 1 , wherein the diffusion stop layer comprises:a non-conductive tape.3. The radiation detector of claim 1 , whereinthe TFT array is below the photoconductor material layer and the diffusion stop layer is above the photoconductor material layer such that the diffusion stop layer is between the common electrode and the photoconductor material layer.4. The radiation detector of claim 1 , wherein the photoconductor material layer comprises:{'sub': 2', '2', '3, 'a photoconductor material, the photoconductor material being one of HgI, PbI, PbO, TlBr, CdTe, CdZnTe, CdS, BiI, and a compound thereof.'}5. The radiation detector of claim 1 , wherein the metal included in the connecting portion has a melting point of 200° C. or less.6. The radiation detector of claim 1 , wherein the diffusion stop layer has a thickness of 0.1 μm to 100 μm.7. The radiation detector of claim 1 , wherein the ...

SOLID-STATE IMAGING DEVICE WITH CHANNEL STOP REGION WITH MULTIPLE IMPURITY REGIONS IN DEPTH DIRECTION AND METHOD FOR MANUFACTURING THE SAME

Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate. 116-. (canceled)17. An imaging device , comprising:a semiconductor substrate having a first side and a second side opposite to the first side;a first photoelectric conversion section and a second photoelectric conversion section disposed in the semiconductor substrate;a transfer electrode adjacent to the first side of the semiconductor substrate;a channel stop section disposed between the first photoelectric conversion section and the second photoelectric conversion section;wherein,the first and second photoelectric conversion sections each include an N-type region,the channel stop section includes a P-type region, anda cross-section shape of the channel stop section is tapered in a direction from the first side to the second side.18. The imaging device according to claim 17 , wherein the channel stop section has a plurality of adjoining impurity regions including at least a first impurity region and a second impurity region associated with the first impurity region disposed along the direction from the first side to the second side.19. The imaging device according to claim 18 , further comprising a third impurity region associated with the second impurity region along the direction from the first side to the second side claim 18 , wherein when viewed in the direction from the first side to the second side ...

PHOTODETECTORS

A photodetector comprises a semiconductor substrate having an input surface for receiving illumination, control electrodes for control of photogenerated charge within the substrate and a filter on the radiation input surface of the substrate, the filter comprising a dielectric-metal band pass filter having a metal layer and one or more dielectric layers with one dielectric layer between the substrate surface and the metal layer. A connector is provided for applying a bias voltage to the metal layer with respect to the substrate. In effect, the metal layer of the band pass filter provides two functions. The first function is as part of the ITF filter selecting the wavelength desired for the device. The second function is as a conductive layer allowing a bias to be provided between the substrate and the metal layer thereby producing a field within the surface of the substrate to which the filter is applied. 1. A photodetector comprising:a semiconductor substrate having an input surface for receiving illumination;control electrodes for control of photogenerated charge within the substrate; anda filter on the radiation input surface of the substrate, the filter comprising a dielectric-metal band pass filter having a metal layer and one or more dielectric layers with one dielectric layer between the substrate surface and the metal layer; anda connector for applying a bias voltage to the metal layer with respect to the substrate.2. The photodetector according to claim 1 , wherein the band pass filter comprises the metal layer between two dielectric layers.3. The photodetector according to claim 1 , wherein the band pass filter is an induced transmission filter.4. The photodetector according to claim 1 , wherein the input surface of the substrate is the back surface and the control electrodes are on the front surface such that the photodetector is a back illuminated device.5. The photodetector according to claim 1 , wherein the input surface and control electrodes are on ...

Method for Detecting Depth of Vertical Gate of Transfer Transistor of CMOS Image Sensor

The disclosure discloses a method for detecting the depth of a vertical gate of a transfer transistor of a CMOS image sensor. The effective electrical thickness of planar gate polysilicon of a transfer transistor of a reference CMOS image sensor is obtained through a planar test, the capacitance of a vertical gate structure of a transfer transistor of a to-be-tested CMOS image sensor is obtained through a vertical test, and then the equivalent depth of the vertical gate of the transfer transistor of the to-be-tested CMOS image sensor is calculated accordingly. The depth of the gates of the transfer transistors of all CMOS image sensors can be monitored on line without damaging a silicon wafer, it is conducive to finding the abnormality of the depth of the gates of the transfer transistors in time, and the product quality of the CMOS image sensor can be effectively monitored. 2. The method for detecting depth of the vertical gate of the transfer transistor of the CMOS image sensor according to claim 1 , whereinthe cross section of the flat portion is rectangular.3. The method for detecting depth of the vertical gate of the transfer transistor of the CMOS image sensor according to claim 1 , whereinthe cross section of the flat portion is square.4. The method for detecting depth of the vertical gate of the transfer transistor of the CMOS image sensor according to claim 1 , whereinw=2π*r, each vertical column of the vertical gate polysilicon is cylindrical, and r is the cross-sectional radius of each cylindrical vertical column of the vertical gate polysilicon.5. The method for detecting depth of the vertical gate of the transfer transistor of the CMOS image sensor according to claim 1 , whereinn is 7, 8, 9 or 10.6. The method for detecting depth of the vertical gate of the transfer transistor of the CMOS image sensor according to claim 1 , whereinthe n vertical columns are uniformly formed in the first type doped epitaxial layer.7. The method for detecting depth of the ...

Image Sensor for Time Delay and Integration Imaging and a Method for Imaging Using an Array of Photo-Sensitive Elements

Example embodiments relate to image sensors for time delay and integration imaging and methods for imaging using an array of photo-sensitive elements. One example image sensor for time delay and integration imaging includes an array of photo-sensitive elements that includes a plurality of photo-sensitive elements arranged in rows and columns of the array. Each photo-sensitive element includes an active layer configured to generate charges in response o incident light on the active layer. Each photo-sensitive element also includes a charge transport layer. Further, each photo-sensitive element includes at least a first and a second gate, each separated by a dielectric material from the charge transport layer. The array of photo-sensitive elements is configured such that the second gate of a first photo-sensitive element and the first gate of a second photo-sensitive element in a direction along a column of the array are configured to control transfer of charges. 1. An image sensor for time delay and integration (TDI) imaging comprising: an active layer configured to generate charges in response to incident light on the active layer;', 'a charge transport layer formed of a semiconductor, wherein the charge transport layer comprises a first portion and a second portion, and wherein the second portion is laterally displaced in a direction along a column of the array in relation to the first portion; and', 'at least a first and a second gate, each separated by a dielectric material from the charge transport layer, wherein the charge transport layer is arranged between the active layer and the first and the second gate, wherein the first gate is configured to control a potential of the first portion of the charge transport layer and the second gate is configured to control a potential of the second portion of the charge transport layer, and wherein the first and the second gates are configured for controlling movement of charges from the first portion of the charge ...

SOLID STATE IMAGING DEVICE

According to one embodiment, an edge of the second opening is recessed further than an edge of the first opening away from a center of the first opening. The recess has an opening and a concave surface and is disposed in a region inward from the edge of the second opening. The opening has a circular configuration. The concave surface has a curvature. 1. A solid state imaging device , comprising:a substrate;a pixel provided at a surface of the substrate;a first interconnect layer provided on the substrate, the first interconnect layer having a first opening opposing the pixel;a second interconnect layer provided on the first interconnect layer, the second interconnect layer having a second opening opposing the first opening; andan insulating film covering the pixel, the first interconnect layer, and the second interconnect layer and having a plurality of recesses provided in a region opposing the second opening,an edge of the second opening being recessed further than an edge of the first opening away from a center of the first opening,the recess having an opening and a concave surface and being disposed in a region inward from the edge of the second opening, the opening having a circular configuration, the concave surface having a curvature.2. The device according to claim 1 , wherein the opening of the recess includes a region overlapping an opening of another recess.3. The device according to claim 1 , further comprising a plurality of vias provided between the second interconnect layer and the first interconnect layer at a vicinity of the edge of the second opening.4. The device according to claim 3 , wherein the vias are metal members.5. The device according to claim 3 , whereina plurality of the pixels is arranged in a first direction, andthe plurality of vias is arranged in the first direction.6. The device according to claim 5 , wherein the plurality of vias is arranged to sandwich claim 5 , in a second direction crossing the first direction claim 5 , a ...

SEMICONDUCTOR SENSORS WITH CHARGE DISSIPATION LAYER AND RELATED METHODS

Implementations of image sensors may include a passivation layer coupled over a silicon layer, a color-filter-array coupled over the passivation layer, a lens coupled over the color-filter-array, and at least two optically transmissive charge dissipation layers coupled over the silicon layer. 1. An image sensor comprising:a passivation layer coupled over a silicon layer;a color-filter-array coupled over the passivation layer;a lens coupled over the color-filter-array; andat least two optically transmissive charge dissipation layers coupled over the silicon layer.2. The image sensor of claim 1 , wherein one of the at least two optically transmissive charge dissipation layers is coupled between the lens and the color-filter array.3. The image sensor of claim 1 , wherein one of the at least two optically transmissive charge dissipation layers is coupled between the passivation layer and the color-filter array.4. The image sensor of claim 1 , wherein the at least two optically transmissive charge dissipation layers comprise a first optically transmissive charge dissipation layer coupled to a first side of the color-filter array and a second optically transmissive charge dissipation layer coupled to a second side of the color-filter-array opposite the first side of the color-filter-array.5. The image sensor of claim 1 , wherein each of the at least two optically transmissive charge dissipation layers comprise a thickness less than 0.5 microns.6. The image sensor of claim 1 , wherein at least one optically transmissive charge dissipation layer of the at least two optically transmissive charge dissipation layers comprise a conductive organic material.7. The image sensor of claim 1 , wherein the at least two optically transmissive charge dissipation layers comprise one of metallic carbon nanotubes or poly(3 claim 1 ,4-ethylenedioxythiophene):poly(styrenesulfonate).8. An image sensor comprising:an antireflective coating layer coupled over a silicon layer;a passivation layer ...

PHOTOELECTRIC CONVERSION DEVICE AND IMAGING SYSTEM

A photoelectric conversion device includes a photoelectric converter accumulating signal charge generated by photoelectric conversion in the first semiconductor region of a first conductivity type, a charge-to-voltage converter generating a voltage signal in accordance with amount of the signal charge, a transistor of a second conductivity type provided in a third semiconductor region of the first conductivity type and including a gate connected to the first semiconductor region, and a voltage supply circuit supplying voltage to the source and drain of the transistor. The voltage supply circuit supplies voltage that causes gate capacitance of the transistor to be a first capacitance value when signal charge accumulated in the first semiconductor region correspond to first amount and cause the gate capacitance to be a second capacitance value when signal charge accumulated in the first semiconductor region correspond to second amount. 1. A photoelectric conversion device comprising: a first semiconductor region of a first conductivity type, and', 'a second semiconductor region of a second conductivity type and accumulates signal charge generated by photoelectric conversion in the first semiconductor region;, 'a photoelectric converter that includes'}a charge-to-voltage converter that generates voltage signal in accordance with amount of the signal charge accumulated in the first semiconductor region;a first transistor of the second conductivity type that is provided in a third semiconductor region of the first conductivity type and includes a gate connected to the first semiconductor region; anda voltage supply circuit that supplies voltage to at least one of a source and a drain of the first transistor,wherein the voltage supply circuit supplies, to at least the one of the source and the drain, a voltage that causes gate capacitance of the first transistor to be first capacitance value when the signal charge accumulated in the first semiconductor region correspond ...

PHOTOELECTRIC CONVERSION DEVICE AND IMAGE READING DEVICE

Provided is a photoelectric conversion device including: a photoelectric conversion element row including photoelectric conversion elements arranged in one direction which faces from one end to the other end; a substrate to which the photoelectric conversion element row is attached; a processing circuit attached to the substrate on an outer side than the one end of the photoelectric conversion element row in the one direction and configured to perform a process on output signals output from photoelectric conversion elements disposed on the one end side in the photoelectric conversion element row; and another processing circuit attached to the substrate on an outer side than the other end of the photoelectric conversion element row in the one direction and configured to perform a process on another output signals output from photoelectric conversion elements disposed on the other end side in the photoelectric conversion element row. 1. A photoelectric conversion device comprising:a photoelectric conversion element row that includes a plurality of photoelectric conversion elements arranged in one direction which faces from one end to the other end;a substrate to which the photoelectric conversion element row is attached;a processing circuit that is attached to the substrate on an outer side than the one end of the photoelectric conversion element row in the one direction, and is configured to perform a process on output signals which are output from photoelectric conversion elements disposed on the one end side in the photoelectric conversion element row; andanother processing circuit that is attached to the substrate on an outer side than the other end of the photoelectric conversion element row in the one direction, and is configured to perform a process on another output signals which are output from photoelectric conversion elements disposed on the other end side in the photoelectric conversion element row.2. The photoelectric conversion device according to claim ...

IMAGING DEVICE AND IMAGING SYSTEM

An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes with plural transfer MOSFETs arranged respectively corresponding to the plural photodiodes, and a common MOSFET that amplifies and outputs signals read from the plural photodiodes. The unit cell includes reset and selecting MOSFETs. Within the unit cell, each pair of photodiode and corresponding transfer MOSFET has translational symmetry with respect to one another. 112-. (canceled)13. An imaging device comprising a plurality of pixel units including a first pixel unit and a second pixel unit , each of the first and second pixel units comprising:a first photoelectric conversion region;a second photoelectric conversion region;a first transfer MOS transistor including a first transfer gate electrode and configured to transfer a charge generated by the first photoelectric conversion region;a second transfer MOS transistor including a second transfer gate electrode and configured to transfer a charge generated by the second photoelectric conversion region,an amplification MOS transistor configured to output a signal based on the charge generated by the first photoelectric conversion region and/or a signal based on the charge generated by the second photoelectric conversion region, anda selection MOS transistor connected to the amplification MOS transistor, whereinthe amplification MOS transistor of the second pixel unit and the selection MOS transistor of the second pixel unit are provided in an active region,at least a part of the active region is provided between the first and second photoelectric conversion regions of the first pixel unit, andthe selection MOS transistor of the second pixel unit is provided between the first and second photoelectric conversion regions of the first pixel unit.14. The imaging device according to claim 13 , wherein the first and second photoelectric conversion regions are ...

SOLID-STATE IMAGE SENSOR AND CAMERA

An image sensor including a first semiconductor region of a first conductivity type that is arranged in a substrate, a second semiconductor region of a second conductivity type that is arranged in the first semiconductor region to form a charge accumulation region. The second semiconductor region includes a plurality of portions arranged in a direction along a surface of the substrate. A potential barrier is formed between the plurality of portions. The second semiconductor region is wholly depleted by expansion of a depletion region from the first semiconductor region to the second semiconductor region. A finally-depleted portion to be finally depleted, of the second semiconductor region, is depleted by the expansion of the depletion region from a portion of the first semiconductor region, located in a lateral direction of the finally-depleted portion. 116.-. (canceled)17. A solid-state image sensor comprising:a semiconductor substrate;a first semiconductor region of a first conductivity type arranged in the semiconductor substrate;a second semiconductor region of a second conductivity type constituting a charge accumulation region of a pixel, and being arranged in the first semiconductor region; anda lens for condensing light to the second semiconductor region, whereinthe second semiconductor region includes a first portion and a second portion which are arranged in a first direction parallel to a surface of the semiconductor substrate,a potential barrier to a charge accumulated in the charge accumulation region is formed between the first portion and the second portion, anda size of the first portion along a depth direction of the semiconductor substrate is larger than a size of the first portion along the first direction, and a size of the second portion along the depth direction is larger than a size of the second portion along the first direction.18. The sensor according to claim 17 , wherein the first portion and the second portion are electrically isolated ...

SEMICONDUCTOR DEVICE AND METHOD OF FORMING CURVED IMAGE SENSOR REGION ROBUST AGAINST BUCKLING

A semiconductor wafer has a plurality of non-rectangular semiconductor die with an image sensor region. The non-rectangular semiconductor die has a circular, elliptical, and shape with non-linear side edges form factor. The semiconductor wafer is singulated with plasma etching to separate the non-rectangular semiconductor die. A curved surface is formed in the image sensor region of the non-rectangular semiconductor die. The non-rectangular form factor effectively removes a portion of the base substrate material in a peripheral region of the semiconductor die to reduce stress concentration areas and neutralize buckling in the curved surface of the image sensor region. A plurality of openings or perforations can be formed in a peripheral region of a rectangular or non-rectangular semiconductor die to reduce stress concentration areas and neutralize buckling. A second semiconductor die can be formed in an area of the semiconductor wafer between the non-rectangular semiconductor die. 1. A method of making a semiconductor device , comprising:providing a semiconductor wafer including a base substrate material;singulating the semiconductor wafer into a plurality of non-rectangular semiconductor dies by removing stress concentration areas in the base substrate material along side edges of the non-rectangular semiconductor dies which are susceptible to a bending operation;forming a plurality of openings or perforations along the side edges of the non-rectangular semiconductor dies; andforming a curved surface in the non-rectangular semiconductor dies including along the side edges without the stress concentration areas.2. The method of claim 1 , wherein the non-rectangular semiconductor dies includes a form factor with non-linear side edges.3. The method of claim 1 , wherein the non-rectangular semiconductor dies includes a form factor selected from the group consisting of circular claim 1 , elliptical claim 1 , and shape with non-linear side edges.4. The method of claim 1 ...

SOLID-STATE IMAGING APPARATUS, METHOD FOR DRIVING THE SAME, AND IMAGING APPARATUS

A solid-state imaging apparatus includes a plurality of pixel cells arranged in a pixel array unit, a vertical signal line and a pixel power supply line each connected to a source electrode and a drain electrode of an amplifying transistor, a Pch transistor for supplying potential AVDD to the vertical signal line, a Pch transistor for supplying potential PBIAS_H higher than the potential AVDD to the vertical signal line, a Pch transistor for supplying the potential PBIAS_H to the pixel power supply line, wherein while the transfer transistor is turned ON and transfers signal charges photoelectrically converted by a photodiode to the floating diffusion portion, the Pch transistors are turned ON and the potential PBIAS_H is applied to the vertical signal line and the pixel power supply line. 1. A solid-state imaging apparatus comprising:a pixel array unit in which a plurality of pixel cells are arranged in a matrix, each of the plurality of the pixel cells including a photoelectric conversion element, a transfer transistor that transfers signal charges photoelectrically converted by the photoelectric conversion element to a floating diffusion, a reset transistor that resets the floating diffusion, and an amplifying transistor that outputs an amplified signal corresponding to an amount of the signal charges;a vertical signal line that is connected to a source electrode of the amplifying transistor and receives an output of the amplifying transistor;a pixel power supply line that is connected to a drain electrode of the amplifying transistor;a first control transistor for supplying a first potential to the vertical signal line;a second control transistor for supplying a second potential higher than the first potential to the vertical signal line; anda third control transistor for supplying the second potential to the pixel power supply line,wherein, during a period in which the transfer transistor is turned ON and transfers the signal charges to the floating diffusion, ...

SOLID-STATE IMAGING DEVICE, AND ELECTRONIC SYSTEM

A solid-state imaging device includes: a pixel array including a plurality of pixels disposed in a matrix, the pixels including a charge holding section configured to hold a signal charge transferred from a photoelectric conversion section, and to include a capacitor section having a first capacitance value and an additional capacitor section for increasing the first capacitance value to be a second capacitance value; and to part of a reset transistor configured to reset a charge held by the charge holding section, a test-voltage power source configured to apply a test voltage having a voltage different from a drive voltage of the reset transistor. 1. A solid-state imaging device comprising:a pixel array including a plurality of pixels disposed in a matrix, the pixels including a charge holding section configured to hold a signal charge transferred from a photoelectric conversion section, and to include a capacitor section having a first capacitance value and an additional capacitor section for increasing the first capacitance value to be a second capacitance value; andto part of a reset transistor configured to reset a charge held by the charge holding section, a test-voltage power source configured to apply a test voltage having a voltage different from a drive voltage of the reset transistor.2. The solid-state imaging device according to claim 1 ,wherein in each of the plurality of pixels in the pixel array,before a pixel signal corresponding to light received by the photoelectric conversion section is read, the reset transistor is turned on so that the charge holding section holds a charge corresponding to the test voltage.3. The solid-state imaging device according to claim 1 ,wherein in pixels in one predetermined row in the pixel array,before a pixel signal corresponding to light received by the photoelectric conversion section is read, the reset transistor is turned on so that the charge holding section holds a charge corresponding to the test voltage.4. The ...

SOLID-STATE IMAGING APPARATUS, MANUFACTURING METHOD THEREOF, AND ELECTRONIC INFORMATION DEVICE

The solid-state imaging apparatus comprises: photoelectric conversion elements PD and PD formed within a semiconductor substrate ; and transfer transistors Tt and Tt formed on a first main surface of the semiconductor substrate , for transferring the signal charge generated by the photoelectric conversion elements PD and PD. The gate electrode of each of the transfer transistors is configured to be disposed over a surface of a first main surface side of an electric charge accumulating region , which configures each of the photoelectric conversion elements. The gate electrode is configured with a polysilicon gate layer and a reflection film consisting of a high melting point metal silicide layer for covering the surface of the polysilicon gate layer . As a result, the improvement of sensitivity is achieved for the solid-state imaging apparatus. 1. A solid-state imaging apparatus comprising a photoelectric conversion element formed in a first conductivity type semiconductor substrate , for photoelectrically converting incident light to generate signal charges , in which the signal charges generated by the photoelectric conversion element are converted into an image signal by signal processing which is outputted ,the solid-state imaging apparatus further comprising a transfer transistor formed on a first main surface of the semiconductor substrate, for transferring the signal charges generated by the photoelectric conversion element to outside the photoelectric conversion element,wherein the transfer transistor comprises a gate electrode located in such a manner to extend from a region occupied by the transfer transistor on the first main surface to a region occupied by the photoelectric conversion element on the first main surface, and is disposed over the regions, andwherein at least one layer constituting the gate electrode of the transfer transistor is comprised of a reflection film having a reflection rate greater than that of polysilicon, or a reflection film ...

PHOTO-DETECTOR

A photo-detector includes a detection region for collecting minority carriers in a substrate, first and second field generating regions generating a majority carrier current to move the minority carriers towards the detection region, and a blocking region spaced apart from the detection region to block a leakage current. The photo-detector includes a ground region spaced apart from the detection region, and the blocking region is disposed between the detection region and the ground region. 1. A photo-detector comprising:a detection region for collecting minority carriers in a substrate;a first field generation region arranged adjacent to the detection region;a second field generating region spaced apart from the first field generation region and opposite the detection region such that, when a voltage difference is generated between the first field generation region and the second field generation region, an electric field is generated therebetween; anda blocking region spaced apart from the detection region opposite from the first field generation region to block a leakage current.2. The photo-detector of claim 1 , further comprising a ground region spaced apart from the detection region opposite from the detection region.3. The photo-detector of claim 2 , wherein the blocking region comprises a depletion region for blocking the leakage current between the detection region and the ground region.4. The photo-detector of claim 1 , wherein a voltage higher than a voltage applied to the second field generating region is applied to the first field generating region to generate the majority carrier current.5. The photo-detector of claim 4 , further comprising a second detection region disposed adjacent to the second field generating region.6. The photo-detector of claim 5 , wherein the detection region extends deeper into the substrate than the first field generating region claim 5 , andthe second detection region extends deeper into the substrate than the second field ...

PIXEL CIRCUIT FOR GLOBAL SHUTTER OF SUBSTRATE STACKED IMAGE SENSOR

A pixel circuit for a global shutter of a substrate-stacked image sensor may include a semiconductor chip including: a photodiode configured to output electric charges generated through a light sensing operation; and a reset node configured to receive a reset voltage from a reset voltage node and reset the photodiode. The semiconductor chip may have a structure in which the semiconductor chip is stacked over another semiconductor chip. 1. A pixel circuit for a global shutter of a substrate-stacked image sensor , comprising a semiconductor chip including:a photodiode configured to output electric charges generated through a light sensing operation; anda reset node configured to receive a reset voltage from a reset voltage node and reset the photodiode,wherein the semiconductor chip has a structure in which the semiconductor chip is stacked over another semiconductor chip.2. The pixel circuit of claim 1 , wherein the reset voltage node has a structure that blocks incident light.3. The pixel circuit of claim 1 , wherein the reset voltage node is installed outside the semiconductor chip.4. The pixel circuit of claim 1 , wherein the reset voltage node is formed around the photodiode.5. The pixel circuit of claim 1 , wherein the another semiconductor chip comprises a read-out circuit.6. The pixel circuit of claim 5 , wherein the read-out circuit comprises one or more of a reset transistor claim 5 , a drive transistor claim 5 , and a selective transistor.7. The pixel circuit of claim 1 , wherein the photodiode claim 1 , the reset node claim 1 , and a floating diffusion node for transferring electric charges outputted from the photodiode are formed over a substrate of the semiconductor chip.8. A pixel circuit for a global shutter of a substrate-stacked image sensor claim 1 , comprising one or more semiconductor chips each including:a photodiode configured to output electric charges generated through a light sensing operation;a first transfer transistor;a memory transistor; ...

Solid-state image sensor and method of manufacturing the same

A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.

PIXEL STRUCTURES OF CMOS IMAGING SENSORS AND FABRICATION METHOD THEREOF

A method is provided for fabricating a pixel structure of a CMOS transistor. The method includes providing a semiconductor substrate doped with first type doping ions; and forming a trench in the semiconductor substrate by etching the semiconductor substrate. The method also includes forming isolation layers on side surfaces of the trench to prevent dark current from laterally transferring; and forming an epitaxial layer doped with second type doping ions with a doping type opposite to a doping type of the first type doping ions in the trench. Further, the method includes forming a pinning layer on a top surface of the epitaxial layer; and forming a gate structure on a surface of the semiconductor substrate at one side of the epitaxial layer. Further, the method also includes forming a floating diffusion region in the semiconductor substrate at one side of the gate structure far from the epitaxial layer. 1. A method for fabricating a pixel structure of a CMOS imaging sensor , comprising:providing a semiconductor substrate doped with first type doping ions;forming a trench in the semiconductor substrate by etching the semiconductor substrate;forming isolation layers on side surfaces of the trench to prevent a dark current from laterally transferring;forming an epitaxial layer doped with second type doping ions with a doping type opposite to a doping type of the first type doping ions in the trench by filling up the trench and covering a portion of a surface of the semiconductor substrate around the trench;forming a pinning layer on the epitaxial layer;forming a gate structure on a surface of the semiconductor substrate at one side of the epitaxial layer; andforming a floating diffusion region in the semiconductor substrate at one side of the gate structure far from the epitaxial layer.2. The method according claim 1 , wherein:a photodiode is formed by the epitaxial layer and the semiconductor substrate.3. The method according to claim 1 , wherein:the epitaxial layer ...

Solid-state imaging apparatus and driving method thereof, manufacturing method of solid-state imaging apparatus, and electronic information device

A solid-state imaging apparatus 100 a comprises: photoelectric conversion elements PD 1 and PD 2 formed within a first conductivity type semiconductor substrate 100 ; and transfer transistors Tt 1 and Tt 2 formed on a first main surface of the semiconductor substrate 100 , for transferring the signal charge generated by the photoelectric conversion elements outside the photoelectric conversion elements. The gate electrode 107 of each of the transfer transistors is configured to be disposed over a surface of a first main surface side of an electric charge accumulating region 102 , which configures each of the photoelectric conversion elements PD 1 and PD 2 . As a result, a high-resolution image can be achieved, in which noises and afterimages are further suppressed.

ATOMIC LAYER DEPOSITION OF HIGH PERFORMANCE ANTI REFLECTION COATINGS ON DELTA-DOPED CCDS

A back-illuminated silicon photodetector has a layer of AlOdeposited on a region of a silicon oxide surface that is left uncovered, while deposition is inhibited in another region by a contact shadow mask. The AlOlayer is an antireflection coating. In addition, the AlOlayer can also provide a chemically resistant separation layer between the silicon oxide surface and additional antireflection coating layers. In one embodiment, the silicon photodetector has a delta-doped layer near (within a few nanometers of) the silicon oxide surface. The AlOlayer is expected to provide similar antireflection properties and chemical protection for doped layers fabricated using other methods, such as MBE, ion implantation and CVD deposition. 1. A silicon photodetector , comprising:a silicon die having at least one photodetector element configured to detect electromagnetic radiation in a wavelength of interest, said silicon die having a silicon surface configured to receive said electromagnetic radiation, and having at least one terminal configured to provide an electrical signal representative of a property of said electromagnetic radiation, said silicon die having a doped layer situated within 5 nanometers of said surface, said silicon die having a silicon oxide layer with a first oxide surface adjacent said silicon surface and a second oxide surface on a side opposite said first oxide surface; and{'sub': 2', '3, 'an antireflection layer comprising AlOconfigured to be transparent to electromagnetic radiation in said wavelength of interest, said antireflection layer having a first antireflection layer surface adjacent a defined portion of said second silicon oxide surface and a second antireflection layer surface on a side opposite said first antireflection layer surface.'}2. The silicon photodetector of claim 1 , wherein said AlOlayer has a thickness in the range of 1 nm to 23 nm.3. The silicon photodetector of claim 1 , wherein said doped layer situated within 5 nanometers of said ...

IMAGE SENSING DEVICE

An image sensing device includes a first subpixel block, a second subpixel block, a first conversion gain transistor, and a second conversion gain transistor. The first subpixel block includes a first floating diffusion region and a plurality of unit pixels sharing the first floating diffusion region. The second subpixel block includes a second floating diffusion region coupled to the first floating diffusion region and a plurality of unit pixels sharing the second floating diffusion region. The first conversion gain transistor includes a first impurity region coupled to the first and second floating diffusion regions and a second impurity region coupled to a first conversion gain capacitor. The second conversion gain transistor includes a third impurity region coupled to the second impurity region of the first conversion gain transistor and a fourth impurity region coupled to a second conversion gain capacitor. 1. An image sensing device comprising:a first subpixel block including a first floating diffusion region and a plurality of unit pixels sharing the first floating diffusion region;a second subpixel block including a second floating diffusion region and a plurality of unit pixels sharing the second floating diffusion region, the second floating diffusion region being coupled to the first floating diffusion region;a first conversion gain transistor including a first impurity region coupled to the first and second floating diffusion regions and a second impurity region coupled to a first conversion gain capacitor; anda second conversion gain transistor including a third impurity region coupled to the second impurity region of the first conversion gain transistor and a fourth impurity region coupled to a second conversion gain capacitor.2. The image sensing device according to claim 1 , further comprising:a reset transistor coupled to the first conversion gain transistor and configured to include an impurity region coupled to the first and second floating ...

IMAGE SENSOR PIXEL CELL WITH NON-DESTRUCTIVE READOUT

A pixel cell includes a photodiode coupled to photogenerate image charge in response to incident light. A deep trench isolation structure is disposed proximate to the photodiode to provide a capacitive coupling to the photodiode through the deep trench isolation structure. An amplifier transistor is coupled to the deep trench isolation structure to generate amplified image data in response to the image charge read out from the photodiode through the capacitive coupling provided by the deep trench isolation structure. A row select transistor is coupled to an output of the amplifier transistor to selectively output the amplified image data to a column bitline coupled to the row select transistor. 1. A pixel cell , comprising:a photodiode coupled to photogenerate image charge in response to incident light;a deep trench isolation structure disposed proximate to the photodiode to provide a capacitive coupling to the photodiode through the deep trench isolation structure;an amplifier transistor coupled to the deep trench isolation structure to generate amplified image data in response to the image charge read out from the photodiode through the capacitive coupling provided by the deep trench isolation structure; anda row select transistor coupled to an output of the amplifier transistor to selectively output the amplified image data to a column bitline coupled to the row select transistor.2. The pixel cell of further comprising:a floating diffusion coupled to the amplifier transistor;a transfer transistor coupled between the photodiode and the floating diffusion to selectively couple the floating diffusion to the photodiode; anda reset transistor coupled to the floating diffusion to selectively reset charge in the floating diffusion and the photodiode.3. The pixel cell of further comprising a switch transistor coupled between the deep trench isolation structure and the floating diffusion claim 2 , wherein the amplifier transistor and the reset transistor are selectively ...

Image processing method and filter array

The disclosure relates to a filter array and to a method for processing image data in a camera. The camera is configured to receive light and generate image data using an image sensor having an associated filter array. The image sensor includes an array of pixels, each of which corresponds to a filter element in the filter array, so that each pixel has a spectral response at least partly defined by a corresponding filter element. The filter array includes a pattern of wideband filter elements and at least two types of narrowband filter elements. The method includes the step of generating a luminance image comprising a wideband filter element value that is calculated for each pixel of the image sensor.

SOLID-STATE IMAGING DEVICE, DRIVING METHOD THEREOF, AND ELECTRONIC DEVICE

A solid-state imaging device including a pixel region in which a plurality of pixels are arranged. The pixels each includes a photoelectric conversion section, a transfer transistor, a plurality of floating diffusion sections receiving a charge from the photoelectric conversion section through the transfer transistor, a reset transistor resetting the floating diffusion sections, a separating transistor performing on-off control of a connection between the plurality of floating diffusion sections, and an amplifying transistor outputting a signal corresponding to a potential of the floating diffusion sections. 1. A solid-state imaging device comprising a pixel region in which a plurality of pixels are arranged , the pixels each including:(a) a photoelectric conversion section;(b) a transfer transistor;(c) a plurality of floating diffusion sections that receive a charge from the photoelectric conversion section through the transfer transistor;(d) a reset transistor that resets the floating diffusion sections;(e) between each floating diffusion section and a subsequent floating diffusion section as viewed from the photoelectric conversion section, a separating transistor that makes or breaks a connection between them; and(f) an amplifying transistor that outputs a signal corresponding to a potential of at least one of the floating diffusion sections.2. The solid-state imaging device according to claim 1 , wherein the floating diffusion section in a first stage as viewed from the photoelectric conversion section is reset via the reset transistor claim 1 , and an output of the floating diffusion section in the first stage is taken in by a subsequent stage circuit.3. The solid-state imaging device according to claim 2 , wherein a charge transferred from the photoelectric conversion section through the transfer transistor to the floating diffusion section in the first stage claim 2 , and an output of the floating diffusion section in the first stage claim 2 , with the ...

SOLID-STATE IMAGE SENSOR

A solid-state image sensor includes: a pixel array that includes first pixels, each having first and second photoelectric conversion units, and second pixels, each having third and fourth photoelectric conversion units; first to fourth transfer gates via which a signal charge respectively generated in the first to fourth photoelectric conversion units is respectively transferred to first to fourth charge voltage conversion units. At least one of a gate width, a gate length and an installation position of at least one transfer gate among the first to fourth transfer gates is altered to achieve uniformity in voltage conversion efficiency at the first to fourth charge voltage conversion units. 1. A solid-state image sensor , comprising:a pixel array that includes first pixels, each having a first photoelectric conversion unit and a second photoelectric conversion unit arranged along a first direction, and second pixels, each having a third photoelectric conversion unit and a fourth photoelectric conversion unit arranged along a second direction;a first transfer gate via which a signal charge generated in the first photoelectric conversion unit is transferred to a first charge voltage conversion unit;a second transfer gate via which a signal charge generated in the second photoelectric conversion unit is transferred to a second charge voltage conversion unit;a third transfer gate via which a signal charge generated in the third photoelectric conversion unit is transferred to a third charge voltage conversion unit; anda fourth transfer gate via which a signal charge generated in the fourth photoelectric conversion unit is transferred to a fourth charge voltage conversion unit, wherein:at least one of a gate width, a gate length and an installation position of at least one transfer gate among the first transfer gate, the second transfer gate, the third transfer gate and the fourth transfer gate is altered so as to achieve uniformity in voltage conversion efficiency at the ...

ACCUMULATING OPTICAL DETECTOR WITH SHUTTER EMULATION

An optical detector is disclosed, having a plurality of detector cells, each detector cell comprising a light sensor, a charge accumulator, and a switch interposed between the light sensor and the charge accumulator; wherein the light sensor produces electrical current when illuminated by electromagnetic radiation, the charge accumulator accumulate electric charge when receiving the electrical current generated by the light sensor, and the switch is configured to controllably electrically isolate or connect the charge accumulator to light sensor, such that the charge accumulator accumulates charge only when electrically connected by the switch to the light sensor. 1. An optical detector , comprising:a plurality of detector cells, each detector cell comprising a light sensor, a charge accumulator, and a switch interposed between the light sensor and the charge accumulator;wherein the light sensor produces electrical current when illuminated by electromagnetic radiation, the charge accumulator accumulate electric charge when receiving the electrical current generated by the light sensor, and the switch is configured to controllably electrically isolate or connect the charge accumulator to light sensor, such that the charge accumulator accumulates charge only when electrically connected by the switch to the light sensor.2. The optical detector of claim 1 , wherein said light sensor is a MOS device.3. The optical detector of claim 1 , wherein said light sensor is a InGaAs device.4. The optical detector of claim 1 , wherein said light sensor is an HgCdTe device.5. The optical detector of claim 1 , wherein said light sensor is sensitive to electromagnetic spectrum at wavelengths between 1 um and 3 um.6. The optical detector of claim 1 , wherein said light sensor is sensitive to electromagnetic spectrum at infrared wavelengths.7. The optical detector of claim 1 , further comprising a controller coupled to the switch and providing an on/off signals to control the switch.8. ...

IMAGE SENSORS WITH MULTIPLE OUTPUT STRUCTURES

In various embodiments, image sensors incorporate multiple output structures by including multiple sub-arrays, at least one of which includes a region of active pixels, a dark pixel region that is fanned and/or slanted, a dark pixel region that is unfanned and unslanted, a horizontal CCD, and an output structure for conversion of charge to voltage. 1. An image sensor comprising: a region of active pixels each comprising (i) a photo-sensitive region (PSR) for converting light into electrical charge and (ii) a vertical channel for transferring charge from the PSR,', 'electrically connected to the region of active pixels, a slanted region of dark pixels each (i) comprising a vertical channel for transferring charge and (ii) shielded from incident light,', 'electrically connected to the slanted region of dark pixels, an unslanted region of dark pixels each (i) comprising a vertical channel for transferring charge and (ii) shielded from incident light,', 'electrically connected to the unslanted region of dark pixels, a horizontal CCD (HCCD), and', 'electrically connected to the HCCD, an output structure for conversion of charge to voltage,, 'two or more pixel sub-arrays each comprising at least one output structure for conversion of charge to voltage, at least one of the sub-arrays comprisingwherein (i) a direction of charge transfer in the vertical channels within the dark pixels of the slanted region is not parallel to a direction of charge transfer in the vertical channels within the active pixels, and (ii) a direction of charge transfer in the vertical channels within the dark pixels of the unslanted region is substantially parallel to the direction of charge transfer in the vertical channels within the active pixels.2. The image sensor of claim 1 , wherein the direction of charge transfer in the vertical channels within dark pixels of the slanted region of a first sub-array is different from the direction of charge transfer in the vertical channels within dark ...

BIG-SMALL PIXEL SCHEME FOR IMAGE SENSORS

An image sensor pixel for use in a high dynamic range image sensor includes a first photodiode, a plurality of photodiodes, a shared floating diffusion region, a first transfer gate, and a second transfer gate. The first photodiode is disposed in a semiconductor material. The first photodiode has a first light exposure area and a first doping concentration. The plurality of photodiodes is also disposed in the semiconductor material. Each photodiode in the plurality of photodiodes has the first light exposure area and the first doping concentration. The first transfer gate is coupled to transfer first image charge from the first photodiode to the shared floating diffusion region. The second transfer gate is coupled to transfer distributed image charge from each photodiode in the plurality of photodiodes to the shared floating diffusion region. 1. An image sensor pixel for use in a high dynamic range image sensor , the image sensor pixel comprising:a first photodiode disposed in a semiconductor material, wherein the first photodiode has a first light exposure area and a first doping concentration;a plurality of photodiodes disposed in the semiconductor material, wherein each photodiode in the plurality of photodiodes has the first light exposure area and the first doping concentration;a shared floating diffusion region;a first transfer gate coupled to transfer first image charge from the first photodiode to the shared floating diffusion region; anda second transfer gate coupled to transfer distributed image charge from each photodiode in the plurality of photodiodes to the shared floating diffusion region.2. The image sensor pixel of claim 1 , wherein the second transfer gate includes sub-gates coupled between the shared floating diffusion region and each photodiode in the plurality of photodiodes claim 1 , wherein each of the sub-gates is electrically connected to receive a common transfer signal.3. The image sensor pixel of claim 1 , wherein the first transfer gate ...

3D STACKED IMAGE SENSOR WITH PMOS COMPONENTS

An active pixel sensor comprises a sensor die and a circuit die. The sensor die comprises a plurality of pixels, wherein each pixel includes a light sensitive element and a transfer gate, a floating diffusion region, wherein the plurality of pixels include at least one reset gate. The circuit die comprises a plurality of processing and amplification circuits associated with the reset gates of the sensor die. The sensor die is interconnected with the circuit die utilizing a plurality of inter-die interconnects each coupled to a source node of a reset gate on the sensor die and a node of a processing and amplification circuit on the circuit die. The plurality of processing and amplification circuits each comprises a source follower transistor, wherein the source follower transistor uses a PMOS. 1. An active pixel sensor comprising: 'a plurality of pixels, wherein each pixel includes a light sensitive element and a transfer gate, a floating diffusion region, wherein the plurality of pixels include at least one reset gate; and', 'a sensor die comprising'}a circuit die comprising a plurality of processing and amplification circuits associated with the reset gates of the sensor die;wherein the sensor die is interconnected with the circuit die utilizing a plurality of inter-die interconnects each coupled to a source node of a reset gate on the sensor die and a node of a processing and amplification circuit on the circuit die; the plurality of processing and amplification circuits each comprises a source follower transistor, wherein the source follower transistor uses a PMOS.2. The active pixel sensor of claim 1 , wherein the plurality of processing and amplification circuits each further comprises a row selector transistor claim 1 , wherein the row selector transistor uses a PMOS claim 1 , and a drain of the row selector transistor is connected to a source of the source follower transistor.3. The active pixel sensor of claim 1 , wherein the circuit die does not include a ...

MATRIX IMAGE SENSOR PROVIDING BIDIRECTIONAL CHARGE TRANSFER WITH ASYMMETRIC GATES

In the field of image sensors, more particularly time-delay integration linear sensors or TDI sensors, a sensor comprises rows of photodiodes alternating with rows of gates adjacent to the photodiodes. The gates are asymmetric, adjacent on one side to a photodiode and having, on the other side, narrow gate fingers extending toward another photodiode. Owing to their very narrow width, the fingers endow the transfer of charges with a directionality. Between two successive photodiodes there are two gates, the two being adjacent to the two photodiodes, the first having its narrow fingers turned toward the first photodiode, the second having its narrow fingers turned toward the second photodiode. The direction of transfer of the charges in the sensor may be chosen by neutralizing either the first gate or the second gate, the other gate receiving alternating potentials allowing the transfer of charges from one photodiode to the other. 1. An image sensor using charge transfer , the sensor comprising rows of photodiodes alternating with rows of gates adjacent to the photodiodes , the gates covering a semiconductor active layer region of a first type of conductivity and the photodiodes being formed in the semiconductor active layer by individual regions of a second type of conductivity , themselves covered by individual superficial regions of the first type connected to a reference potential for the semiconductor active layer , wherein the image sensor comprises at least two independent gates exhibiting an asymmetry between an upstream side and a downstream side , each independent gate being adjacent on one side to a photodiode and having , on another side , narrow gate fingers extending toward another photodiode , the narrow fingers being separated from one another by insulating regions doped with the first type of conductivity , more doped than said individual superficial regions and also connected to the reference potential of the active layer , a first gate among the two ...

IMAGE SENSOR WITH IMAGE RECEIVER AND AUTOMATIC IMAGE SWITCHING

Provided are an image sensor with one or more image receivers for image switching, and an imaging system and method therefor. The image sensor includes an image sensor array to generate first image data for a first image; a receiver to receive, into the image sensor, second image data for a second image; an image selection circuit coupled to the image sensor array and the receiver to receive the first image data and the second image data and select one of the first image data and the second image data according to one or more image selection criteria and at least one of the first image data and the second image data; and a transmitter coupled to the image selection circuit to transmit the selected one of the first image data and the second image data from the image sensor. 1. An imaging system comprising: a first image sensor array to sense light in a first spectrum, and to generate first image data based on the sensed light in the first spectrum,', 'a receiver to receive, into the image sensor, second image data,', 'an image selection circuit to receive the first image data from first image sensor array, to receive the second image data from the receiver, and to select one of the first image data or the second image data according to one or more image selection criteria, and', 'a transmitter to transmit the selected one of the first image data or the second image data from the image sensor; and, 'an image sensor comprisinga second image sensor array to sense light in a second spectrum, and to generate the second image data based on the sensed light in the second spectrum, wherein the first spectrum and the second spectrum are different, and wherein the second image sensor array is external to the image sensor.2. The imaging system of claim 1 , further comprising:an image signal processor to process the selected one of the first image data or the second image data into a processed image.3. The imaging system of claim 2 , further comprising:a display to display the ...

Trench Isolation for Image Sensors

An image sensor includes a plurality of photodiodes disposed in a semiconductor material to convert image light into image charge. A floating diffusion is disposed proximate to the plurality of photodiodes to receive the image charge from the plurality of photodiodes. A plurality of transfer transistors is coupled to transfer the image charge from the plurality of photodiodes into the floating diffusion in response to a voltage applied to the gate terminal of the plurality of transfer transistors. A first trench isolation structure extends from a frontside of the semiconductor material into the semiconductor material and surrounds the plurality of photodiodes. A second trench isolation structure extends from a backside of the semiconductor material into the semiconductor material. The second trench isolation structure is disposed between individual photodiodes in the plurality of photodiodes. 1. An image sensor , comprising:a plurality of photodiodes disposed in a semiconductor material to convert image light into image charge;a floating diffusion disposed proximate to the plurality of photodiodes to receive the image charge from the plurality of photodiodes;a plurality of transfer transistors coupled to transfer the image charge from the plurality of photodiodes into the floating diffusion in response to a voltage applied to the gate terminal of the plurality of transfer transistors;a first trench isolation structure extending from a frontside of the semiconductor material into the semiconductor material, and surrounding the plurality of photodiodes; anda second trench isolation structure extending from a backside, opposite the frontside, of the semiconductor material into the semiconductor material, wherein the second trench isolation structure is disposed between individual photodiodes in the plurality of photodiodes.2. The image sensor of claim 1 , wherein the plurality of photodiodes includes at least four individual photodiodes and at least four individual ...

FLAT PANEL DETECTOR AND MANUFACTURING METHOD THEREOF, CAMERA DEVICE

A flat panel detector comprises a photoelectric conversion layer and a pixel detecting element disposed under the photoelectric conversion layer. The pixel detecting element comprises: a pixel electrode for receiving charges, a storage capacitor for storing the received charges, and a thin film transistor for controlling outputting of the stored charges. The storage capacitor comprises a first electrode and a second electrode. The first electrode comprises an upper electrode and a bottom electrode that are disposed opposite to each other and electrically connected. A second electrode is sandwiched between the upper electrode and the bottom electrode. It is insulated between the upper electrode and the second electrode and between the second electrode and the bottom electrode. 1. A flat panel detector comprising:a substrate; anda photoelectric conversion layer disposed on the substrate and a pixel detecting element disposed under the photoelectric conversion layer;wherein the pixel detecting element comprises a pixel electrode for receiving charges, a storage capacitor for storing the received charges, and a thin film transistor for controlling outputting of the stored charges;wherein the storage capacitor comprises:a first electrode comprising an upper electrode and a bottom electrode that are disposed opposite to each other and electrically connected;a second electrode sandwiched between the upper electrode and the bottom electrode;wherein the upper electrode and the second electrode are insulated therebetween, and the second electrode and the bottom electrode are insulated therebetween.2. The flat panel detector of claim 1 , wherein the upper electrode and the bottom electrode have a same pattern.3. The flat panel detector of claim 2 , wherein the bottom electrode is disposed on the substrate and connected with a source of the thin film transistor through a via hole.4. The flat panel detector of claim 3 , further comprising: a first passivation layer covering the ...

DISTANCE SENSOR AND IMAGE PROCESSING SYSTEM INCLUDING THE SAME

A pixel of a distance sensor includes a photosensor that generates photocharges corresponding to light incident in a first direction. The photosensor includes a plurality of first layers having a cross-sectional area increasing along the first direction after a first depth and at least one transfer gate which receives a transfer control signal for transferring the photocharges to a floating diffusion node. A strong electric field is formed in the direction in which the photocharges move horizontally or vertically in the pixel, thereby accelerating the photocharges, allowing for increased sensitivity and demodulation contrast. 1. A pixel of a distance sensor , the pixel comprising:a photosensor arranged to generate photocharges corresponding to light incident in a first direction and to have a cross-sectional area increasing along the first direction after a first depth; andat least one transfer gate arranged to receive a transfer control signal for transferring the photocharges to a floating diffusion node.2. The pixel of claim 1 , wherein the photosensor comprises a plurality of first layers having a pinning voltage that increases along the first direction.3. The pixel of claim 2 , wherein a doping density is arranged to determine the pinning voltage of the first layers.4. The pixel of claim 1 , wherein the cross-sectional area of the photosensor decreases along the first direction up to the first depth.5. The pixel of claim 1 , wherein the photosensor comprises a plurality of second layers having a cross-sectional area that increases along a second direction and the second direction gets towards the floating diffusion node in perpendicular to the first direction.6. The pixel of claim 5 , wherein the second layers have a pinning voltage that increases along the second direction.7. The pixel of claim 6 , wherein the pinning voltage of the second layers is determined by one of a doping density and a junction depth.8. The pixel of claim 1 , wherein the at least one ...

IMAGE SENSOR INCLUDING ACTIVE REGIONS

An image sensor is provided to include an active region which comprises: a floating diffusion region; a transfer transistor gate region; transistor active regions; and a well-tap region. The transfer transistor gate region may have a diagonal bar shape to isolate the floating diffusion region in a first corner of the active region. The well-tap region may be positioned between the transfer transistor gate region and the transistor active regions, and isolate the transfer transistor gate region from the transistor active regions. 1. An image sensor comprising an active region ,wherein the active region comprises:a floating diffusion region positioned around a first corner of the active region and operable to store photocharges generated in response to an incident light to the image censor;a transfer transistor gate region positioned adjacent to the floating diffusion region and operable to transfer the photocharges to the floating diffusion region;transistor active regions positioned adjacent to the transfer transistor gate region; anda well-tap region positioned between the transfer transistor gate region and the transistor active regions to separate the transfer transistor gate region from the transistor active regions.2. The image sensor of claim 1 , wherein the well-tap region is positioned at the center of the active region.3. The image sensor of claim 1 , wherein the transfer transistor gate region has a bar shape across the active region.4. The image sensor of claim 1 , wherein the transfer transistor gate region has a bar shape extending along a diagonal direction between the floating diffusion region and the well-tap region.5. The image sensor of claim 1 , wherein the well-tap region is extended to contact two neighboring sides of the active region.6. The image sensor of claim 1 , wherein the transfer transistor gate region contacts two neighboring sides of the active region.7. The image sensor of claim 1 , wherein the transistor active regions comprise a ...

IMAGE SENSOR

An image sensor includes a substrate including a photodiode and first and second floating diffusion nodes which are disposed to be spaced apart from left and right of the photodiode, respectively, by a predetermined distance; a first transfer gate disposed on the substrate to overlap at least partially with the photodiode and the first floating diffusion node; and a second transfer gate disposed on the substrate to overlap at least partially with the photodiode and the second floating diffusion node, wherein each of the first transfer gate and the second transfer gate includes a first gate dielectric layer which overlaps at least partially with the photodiode and a second gate dielectric layer which overlaps at least partially with the first or second floating diffusion node, and wherein a thickness of the first gate dielectric layer is larger than a thickness of the second gate dielectric layer. 1. An image sensing device comprising:a substrate;a photoelectric conversion element disposed in the substrate and configured to generate photocharges in response to an incident light;first and second floating diffusion nodes that are disposed in the substrate to be spaced apart from the photoelectric conversion element at opposite sides of the photoelectric conversion element respectively;a first transfer gate disposed on the substrate to overlap at least partially with the photoelectric conversion element and the first floating diffusion node; anda second transfer gate disposed on the substrate to overlap at least partially with the photoelectric conversion element and the second floating diffusion node,wherein each of the first transfer gate and the second transfer gate includes a first gate dielectric layer which overlaps at least partially with the photoelectric conversion element and a second gate dielectric layer which overlaps at least partially with the first or second floating diffusion node, andwherein a thickness of the first gate dielectric layer is greater ...

SOLID-STATE IMAGE SENSOR AND CAMERA

An image sensor includes a semiconductor substrate having first and second faces. The sensor includes a plurality of pixel groups each including pixels, each pixel having a photoelectric converter and a wiring pattern, the converter including a region whose major carriers are the same with charges to be accumulated in the photoelectric converter. The sensor also includes a microlenses which are located so that one microlens is arranged for each pixel group. The wiring patterns are located at a side of the first face, and the plurality of microlenses are located at a side of the second face. Light-incidence faces of the regions of the photoelectric converters of each pixel group are arranged along the second face such that the light-incidence faces are apart from each other in a direction along the second face. 1. A solid-state image sensor , which includes a semiconductor substrate having a first face and a second face opposite to the first face , the sensor comprising:a plurality of pixel groups each including a plurality of pixels, each pixel having a photoelectric converter formed in the semiconductor substrate and a wiring pattern which configures a part of a circuit in the pixel, the photoelectric converter including a region whose major carriers are the same with charges to be accumulated in the photoelectric converter as a signal; anda plurality of microlenses which are located so that one microlens is arranged for each pixel group,wherein the wiring patterns are located at a side of the first face of the semiconductor substrate, and the plurality of microlenses are located at a side of the second face of the semiconductor substrate, andlight-incidence faces of the regions of the photoelectric converters of each pixel group are arranged along the second face such that the light-incidence faces are apart from each other in a direction along the second face.2. The sensor according to claim 1 , wherein each pixel includes a circuit element claim 1 , and at least ...

INTEGRATED DEVICE FOR TEMPORAL BINNING OF RECEIVED PHOTONS

An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit also includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced. 1. An integrated circuit , comprising:a photodetection region configured to receive incident photons, the photodetection region being configured to produce a plurality of charge carriers in response to the incident photons;at least one charge carrier storage region; anda charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced.2. The integrated circuit of claim 1 , wherein the at least one charge carrier storage region comprises a plurality of charge carrier storage regions claim 1 , and wherein the charge carrier segregation structure is configured to direct charge carriers into respective charge carrier storage regions of the plurality of charge carrier storage regions.3. The integrated circuit of claim 2 , wherein the charge carrier segregation structure is configured to direct the charge carriers into the respective charge carrier storage regions based upon times at which the charge carriers arrive at charge carrier capture regions of the charge carrier segregation structure.4. The integrated circuit of claim 1 , wherein the charge carrier segregation structure comprises:a charge carrier travel region configured to receive the plurality of charge carriers from the photodetection region, the charge carrier travel region comprising a ...

UNIT PIXEL OF IMAGE SENSOR AND IMAGE SENSOR INCLUDING THE SAME

A unit pixel of an image sensor includes a photoelectric conversion region, a floating diffusion region, and a transfer gate. The photoelectric conversion region is in an active region defined by an isolation region of a semiconductor substrate. The photoelectric conversion region generates electric charges corresponding to incident light. The transfer gate transfers the electric charges to the floating diffusion region, which is located in the active region. The transfer gate includes first and second portions divided relative to a reference line, and at least one of the first or second portions does not overlap the isolation region 1. A unit pixel of an image sensor , the unit pixel comprising:a photoelectric conversion region in an active region defined by an isolation region of a semiconductor substrate, the photoelectric conversion region configured to generate electric charges corresponding to incident light;a floating diffusion region in the active region; anda transfer gate configured to transfer the electric charges to the floating diffusion region, the transfer gate adjacent to the photoelectric conversion region and the floating diffusion region, the transfer gate including first and second portions divided relative to a reference line in a second direction crossing a first direction, wherein at least one of the first or second portions does not overlap the isolation region.2. The unit pixel as claimed in claim 1 , wherein the active region comprises:a first section having a corner-cut foursquare or rectangular shape; anda second section having a rectangular shape that extends in the second direction from a corner-cut edge of the first section.3. The unit pixel as claimed in claim 2 , wherein the line divides the first and second sections equally in the second direction claim 2 , and wherein the transfer gate is symmetrically arranged with respect to the line.4. The unit pixel as claimed in claim 3 , wherein the first and second portions of the transfer ...

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

A semiconductor device in which a first chip and a second chip are stacked including a first wiring line and a second wiring line by which the first chip and the second chip are electrically connected. The first wiring line and the second wiring line each include a bonding portion for bonding one of a plurality of conductive patterns placed in the first chip and one of a plurality of conductive patterns placed in the second chip. The number of bonding portions included in the first wiring line is larger than the number of bonding portions included in the second wiring line. 1. A semiconductor device comprising:a first chip and a second chip, the first chip and the second chip being stacked on top of each other, the first chip having a first area, in which a plurality of first cells are arranged in matrix, the second chip having a second area, in which an electric circuit is arranged,wherein a plurality of wiring lines electrically connect the first chip and the second chip, each of the plurality of wiring lines includes a bonding portion for bonding one of a plurality of conductive patterns placed in the first chip and one of a plurality of conductive patterns placed in the second chip,wherein a ratio of the number of contacts between a first wiring line, which is one of the plurality of wiring lines, and a semiconductor layer of the first chip to the number of bonding portions included in the first wiring line is higher than a ratio of the number of contacts between a second wiring line, which is one of the plurality of wiring lines, and a semiconductor layer of the second chip to the number of bonding portions included in the second wiring line,wherein at least one of the bonding portions included in the first wiring line and the bonding portions included in the second wiring line is arranged in an overlap area, in which the first area and the second area overlap.2. The semiconductor device according to claim 1 , wherein a ratio of a number of transistors of the ...

IMAGING DEVICE AND METHOD OF MANUFACTURING IMAGING DEVICE

To increase the capacity of a charge holding section of a pixel in an imaging device that performs imaging using a global shutter method. An imaging device includes a photoelectric converter, a first charge holding section, an auxiliary charge holding section, a transfer route, and an image signal generator. The first charge holding section is formed near a front surface of a semiconductor substrate. A first charge transfer section transfers charge from the photoelectric converter to the first charge holding section. The auxiliary charge holding section underlies the first charge holding section, and holds a portion of the charges held in the first charge holding section. The transfer route transfers the charge between the first charge holding section and the auxiliary charge holding section. The image signal generator generates an image signal based on the charges held in the first charge holding section and the auxiliary charge holding section. 1. An imaging device , comprising:a photoelectric converter that generates a charge depending on incident light;a first charge holding section that is formed near a front surface of a semiconductor substrate, and holds the charge;a first charge transfer section that transfers the charge from the photoelectric converter to the first charge holding section;an auxiliary charge holding section that is formed to underlie the first charge holding section in the semiconductor substrate, and holds a portion of the charges held in the first charge holding section;a transfer route that is a route used to transfer the charge between the first charge holding section and the auxiliary charge holding section; andan image signal generator that generates an image signal on a basis of the charges held in the first charge holding section and the auxiliary charge holding section.2. The imaging device according to claim 1 , whereinthe auxiliary charge holding section has the same conductivity type as the first charge holding section, anda ...

IMAGING SENSOR

An imaging sensor of the charge transfer type that limits the transmission of radiation from high intensity light sources. The invention addresses potential saturation levels during exposure or stare time and so saturation is never achieved, this provides for a wider dynamic range. 1. An imaging sensor comprising:a pixel electrode;a layer of photo sensitive material;a layer of semi conductor material; a second electrode;means to apply a potential difference across the semi conductor material and the photo sensitive material during operation;wherein the layer of photosensitive material is positioned between the pixel electrode and the layer of semi conductor material, the photoresitivity of the photo sensitive material decreasing on exposure to light such as to increase the sensor's dynamic range.2. An imaging sensor according to wherein the layer of photo-sensitive material is comprised of doped Poly Vinyl Carbazole (PVK).3. An imaging sensor according to wherein the layer of photo-sensitive material is comprised of doped Gallium Arsenide (GaAs).4. An imaging sensor according to wherein the layer of photo-sensitive material is comprised of doped Silicon Carbide.5. An imaging sensor according to wherein the layer of photo-sensitive material is comprised of doped Gallium Phosphide (GaP).6. An imaging sensor according to wherein the layer of photo-sensitive material is comprised of doped Bismuth Silicon Oxide (BSO).7. An imaging sensor according to wherein the layer of photo-sensitive material is comprised of undoped Bismuth Silicon Oxide (BSO).89. An imaging sensor substantially as herein described with reference to to of the accompanying drawings. This invention relates to an imaging sensor of the charge transfer type and more particularly to an imaging sensor of the charge transfer type that limits the transmission of radiation from high intensity light sources.Saturation and blooming effects caused by high intensity light sources such as sunlight, welding arc, car ...

DEPLETED CHARGE-MULTIPLYING CCD IMAGE SENSOR

In various embodiments, a charge-coupled device includes channel stops laterally spaced away from the channel by fully depleted regions. 1. A charge-coupled device (CCD) comprising:a channel for transfer of charge carriers therein, the channel having a first conductivity type;disposed over the channel, a plurality of gate electrodes for controlling transfer of charge carriers within the channel;laterally spaced away from opposite sides of the gate electrodes, first and second channel stops having a second conductivity type opposite the first conductivity type; anddisposed between the channel and each of the first and second channel stops, a fully depleted region.2. The CCD of claim 1 , wherein at least one of the fully depleted regions extends beneath the channel.3. The CCD of claim 1 , wherein (i) the CCD transfers charge carriers in multiple phases claim 1 , and (ii) the plurality of gate electrodes comprises only one independently controllable gate electrode for each phase.4. The CCD of claim 1 , wherein at least one of the plurality of gate electrodes is configured to multiply charge within the channel via application of a voltage larger than a voltage applied by at least one other gate electrode.5. The CCD of claim 1 , wherein at least one of the first or second channel stops is a continuous doped region extending substantially along an entire length of the channel.6. The CCD of claim 1 , wherein at least one of the first or second channel stops comprises a plurality of discrete and separated doped regions.7. The CCD of claim 1 , further comprising a plurality of control wires each electrically connected to a gate electrode claim 1 , wherein a lateral distance between the channel and the second channel stop is less than a lateral distance between the channel and at least one of the control wires.8. The CCD of claim 1 , further comprising a plurality of control wires each electrically connected to a gate electrode claim 1 , wherein a lateral distance between the ...