ELEKTRISCHE VERBINDUNGEN MIT NACHGIEBIGEN KONTAKTEN

MEHRSCHICHTIGE LEITERPLATTE

VERDRAHTUNGSTRAEGER FUER MIKROELEKTRONISCHE BAUGRUPPEN

Leiterplatten mit selbsttragender Verbindung zwischen den Seiten.

Elektronische Vorrichtung mit einem elektrisch leitenden Klebstoff.

Leiterplatte mit primären und sekundären Durchgangslöchern

Leiterplatte mit primären und sekundären Durchgangslöchern

Anordnung aus einer Reihe uebereinander gestapelter flexibler mit Leitungsbahnen versehener Isolierstoffolien

CIRCUIT BOARD

Substrate for integrated circuit devices including multi-layer glass core and methods of making the same

An improved circuit board

A printed circuit board which is of such a construction that patterns of electrically conductive strips and/or pads of either standard or non-standard form can be readily provided comprises a rigid board 1 of which at least the major surfaces are of electrically insulating material, which has extending through the board a multiplicity of holes 2 arranged in a pattern of rows and columns and which carries on one or each of its major surfaces a multiplicity of annular metal islands 3 each bounding a hole in the board and discrete with respect to the other annular islands. The rigid board 1 may also carry on said one or each of its major surfaces supplementary metal islands 4 and 5 each positioned between and discrete with respect to annular islands bounding adjacent holes in the rigid board. A circuit of either a standard or non-standard pattern can be formed by electrically interconnecting selected adjacent metal islands 3, 4 and 5 with local deposits of material of high electrical conductivity ...

CONNECTOR MEANS

MULTI-LAYERED ELECTRICAL CIRCUIT ASSEMBLIES AND TO METHODS OF MAKING MULTI-LAYERED ELECTRICAL CIRCUIT ASSEMBLIES

... 1497644 Terminal eyelet MOLEX Inc 18 May 1976 [2 June 1975] 20385/76 Heading H2E [Also in Division H1] A multilayer circuit assembly comprises a plurality of flat circuit elements each having at least one connecting station 16 the elements being stacked on top of each other with their stations coaxial and interconnected by eyelets 14, having a frusto-conical portion 44. In use, the circuits are stacked up with openings 26, defined by solder 28 connected to the conductive means 20 of the circuits, aligned and the eyelet 14 is inserted in the openings and cold welded (Fig. 3). In a modification the terminal (38, Figs. 4 and 5, not shown) has a solid top portion (40) and in another (Fig. 6, not shown) a male pin (58) extends from the centre of the circular flange (62). In a method of producing a circuit assembly (Fig. 7A-I, not shown) using an eyelet, the conductive means 20 are first formed on an insulating base layer (18) and a first opening (68) punched through the base layer and conductive ...

PROCEDURE FOR THE AENDERN OF AN ELECTRICAL GROUP OF LOW RISE BUILDINGS

FLEXIBLE CONFORMAL ANTENNA

MULTILEVEL STRIP LINE RADIO FREQUENCY CIRCUITS AND PROCEDURES FOR THE INTERMEDIATE CONNECTION

VERFAHREN ZUM AENDERN EINER ELEKTRISCHEN FLACHBAUGRUPPE

TRAEGERPLATTE

PROCEDURE FOR THE AENDERN OF AN ELECTRICAL GROUP OF LOW RISE BUILDINGS

PROCEDURE FOR THE CONSTRUCTION OF MULTILEVEL CIRCUITS, STRUCTURES WITH PERSONALISIERUNGSMERKMALEN AND THEREIN USED COMPONENTS

MULTI-POSITION CIRCUIT PRODUCTION AND STUKTUR WITH POSSIBILITY OF ADAPTATION AND COMPONENTS FOR IT

ELECTRICAL CONNECTIONS WITH FLEXIBLE CONTACTS

ELECTRONIC PACKAGE ASSEMBLY AND ACCESSORY

Molded polymer comprising silicone and at least one metal trace and a process of manufacturing the same

The present invention provides a flexible electrode array, comprising a silicone containing body, at least one metal trace layer and at least one electrode pad. on the surface. The present invention further provides a process of manufacturing a flexible electrode array, comprising: a) irradiating a surface area of a molded silicone containing layer yielding traces with a light beam emitted by a pulsed UV laser source, b) immersing said irradiated molded silicone layer for inducing the deposit of metal ions to form metal traces, c) applying a silicone containing layer on said silicone containing layer and said metal traces, d) irradiating the surface for drilling holes into the surface of the molded silicone containing layer, and e) immersing said irradiated molded silicone layer for inducing the deposit of metal ions to form metal electrode pads.

JUNCTION BOXES

... - CANADA A junction box comprising a rigid insulating housing with spaced opposed faces having pairs of aligned terminal-receiving apertures, a stack of terminal boards sandwiched between the faces of the housing, each terminal board comprising a metal sheet laminated with an insulating sheet, the metal sheet being divided into areas defining discrete current paths and being perforated at locations in alignment with the terminal-receiving apertures where contact with the metal sheet is not required. Terminals having contact portions and post portions are staked through the aligned housing apertures and stacked terminal boards, the post portions piercing the metal sheets at unperforated locations at various levels in the stack to effect contact therewith.

ELECTRICAL CONNECTOR FOR INTERCONNECTING PRINTED CIRCUIT BOARDS

An electrical connector in the form of a pin having spaced compliant sections for electrical connection with plated through holes in printed circuit boards. The orientation of each compliant section is such that is engages a virgin area of each plated through hole when coming to rest therein thereby forming excellent electrical and mechanical connections between the compliant sections and respective plated through holes.

METALLIZED CERAMIC AND PRINTED CIRCUIT MODULE

METHOD EMPLOYING PRECISION STAMPING FOR FABRICATING THE WAFERS OF A MULTIWAFER ELECTRICAL CIRCUIT STRUCTURE

INTEGRATED CIRCUIT PACKAGING STRUCTURE

A package structure for an integrated circuit according to the present invention comprises tape carriers 1a - 1e, and a pin 22 vertically mounted on a wiring board 2. LSIs 12 are mounted on the tape carriers 1a - 1e respectively. The tape carriers 1a - 1e comprise base films 13 respectively. External connection terminals 11 are provided on the base film 13 in a lattice. The external connection terminal 11 comprises a through hole 18 and a conductive pattern 17 provided on the inner surface of the through hole 18. The pins 22 vertically mounted on the wiring board 2 are inserted into the external connection terminals 11 of the tape carriers 1a - 1e. The external connection terminals 11a - 11e are electrically connected by the pins 22.

LAMINAR STACKABLE CIRCUIT BOARD STRUCTURE AND MANUFACTURE

Method and apparatus for fabricating fine pitch pattern multilayer printed circuit boards involving laminar stackable board layers providing power distribution, signal distribution and capacitive decoupling. In one respect, the invention relates to the fabrication of board layers by beginning with a metallic core, patterning the core, selectively enclosing the core in a dielectric, selectively depositing metal to form vias, plugs and signal lines, and forming dendrites with joining metallurgy on the vias and plugs to provide stackable connection from above or below the plane of the board layer. In another aspect, the invention is directed to the use of a sol-gel process to form a thin high dielectric constant crystalline film onto a metallic sheet followed with a deposition of a metallic layer onto the high dielectric constant film. The film serves as the dielectric of a capacitor layer which is thereafter in succession patterned, covered by a dielectric, and has selectively deposited a ...

Verfahren zum Zusammenbau und zum elektrischen Verbinden von mit einer gedruckten Schaltung versehenen Leiterplatten

Assembly for radio-frequency circuits with a high power loss, especially for broadband amplifiers

PROCEDURE FOR CHANGING AN ELECTRICAL GROUP OF LOW RISE BUILDINGS.

Method of producing multilayer printed circuit boards

The fabrication of multilayer pcbs with their connections via through contacts (9) is tricky. The contacting cross-section (10) is small. Testing can only be done at the end, and corrections, e.g. breaking links, are by then almost never possible. A method which offers more reliability was therefore sought. For this purpose, the ultra-sound metal welding method is used. The layers are joined to each other so that they conduct, using a preform (3, 4, 5, 12). If another through contact is necessary, the sounded intermediate ring (4) provides a reliable contacting surface. The sound points or assembly steps can be continuously tested, and steps taken. ...

МНОГОСЛОЙНАЯ КОММУТАЦИОННАЯ ПЛАТА

Изобретение относится к разработке и производству аппаратуры на основе изделий микроэлектроники и полупроводниковых приборов и может быть широко использовано в производстве многослойных печатных плат, а также коммутационных структур для многокристальных модулей. Многослойная коммутационная структура содержит слои из диэлектрического материала с токоведущими дорожками на их поверхностях, представляющие собой коммутационные слои (1), (2), (3), контактные узлы (4), (5) в виде металлизированных контактов, совмещенных друг с другом и соединенных между собой электрически и механически электропроводящим связующим материалом (11), (14), при этом контактные узлы выполнены в виде стыков между контактами, одни из которых представляет собой металлизированные площадки (6), (12), связанные с токоведущими дорожками (7), (15) нижележащего коммутационного слоя, а другие - совмещенные с ними ответные контакты, выполненные в виде металлизированных отверстий в форме усеченных конусов (8), (13) в вышележащем ...

MUCH SLOINAYa SWITCHING BOARD

Multilayered printed-wiring board and inter-layer connecting method thereof

Printed wiring board

The invention discloses a printed wiring board. Large-sized through holes are formed in a core layer of a printed wiring board. Large-sized through holes are formed in the shape of a cylinder along the inward wall surfaces of the large-sized through holes. A filling material fills the inner space of the large-sized via. A small-sized through hole penetrates through the corresponding filling material along the longitudinal axis of the small-sized through hole. A small-sized via is formed in the shape of a cylinder along the inward wall surface of the small-sized through hole. The filling material and the core layer are uniformly distributed within the specific area in the in-plane direction of the core substrate. This results in suppression of uneven distribution of thermal stress in the core layer in the in-plane direction of the core layer.

Printed circuit board

The present invention provides a printed wiring board. In a multilayer printed wiring board, a contact area (side area of a hole (41b) in a lower electrode) of a lower electrode (41) of a thin film capacitor (40) and a lower via hole conductor (45) is larger than a contact area (bottom area of the hole (41b)) when the via hole conductor is formed to abut to the lower electrode (41), and the lowerelectrode (41) is thicker than a BU conductor layer (32) of a build up section (30). Furthermore, the lower via hole conductor (45) is bent at a connecting section (J) of the hole (41b) in the lower electrode and a hole (26b) in an insulating layer. Thus, peeling is not easily generated between the lower via hole conductor (45) and the lower electrode (41) after heat cycle test.

HIGH-FREQUENCY SIGNAL LINE AND MANUFACTURING METHOD THEREFOR

The present invention reduces the cost of manufacturing a high-frequency signal line having a bent structure. A signal wire (20-2) extends along a dielectric element (12-2). A reference ground conductor (22-2) extends along the signal wire (20-2). A signal wire (20-1) is provided to a dielectric element (12-1), and extends along the dielectric element (12-1). A reference ground conductor (22-1) is provided to the dielectric element (12-1), and extends along the signal wire (20-1). A back surface (S4) at an end portion of the dielectric element (12-2) and a principal surface (S1) at an end portion of the dielectric element (12-1) are joined so as to form an angle at the section where the dielectric elements (12-1, 12-2) are in contact. The signal wire (20-1) and the signal wire (20-2) are electrically connected. The reference ground conductors (22-1, 22-2) are electrically connected.

Multilayer wiring board and method of manufacturing the same

A multilayer wiring board is manufactured by preparing a first wiring board, a second wiring board, and a joint sheet. The first wiring board is provided with a via having a first through-hole in which a conductive film is formed. The second wiring board is provided with a second through-hole at a position substantially matching the position of the first through-hole. The joint sheet is provided with a third through-hole at a position substantially matching the positions of the first and the second through-holes. the first wiring board and the second wiring board are stacked and bonded together by heat and pressure with the joint sheet interposed therebetween.

Wiring board and manufacturing method thereof

Improved integrated circuit structure

Device being used to assemble printed circuits with other electric bodies

ELECTRICAL INTERCONNECTION STRUCTURE

PLAQUETTE MOULEE POUR CIRCUIT ELECTRIQUE

... a. Plaquette moulée pour circuit électrique. b. Plaquette caractérisée en ce qu'elle comporte une surface principale avec des parties de support et de réception pour les composants électriques choisis, et qui sont en saillie, au moins l'une des parties étant moulée intégralement pour former une douille munie d'ouvertures, prédéterminées pour recevoir directement les conducteurs du composant électrique, la plaquette recevant un matériau conducteur suivant un schéma, pour relier électriquement les composants du circuit.

METHOD OF MAKING CONNECTIONS AND CONDUCTIVE PATHS

FLEXIBLE PRINTED CIRCUIT CARD, PROCESS FOR THE MODIFICATION OF A PRINTED CIRCUIT CARD, AND PRINTED CIRCUIT CARD

MEAN SUBSTRATE OF WIRING

METHOD FOR REALIZATION Of a PRINTED CHART AND CORRESPONDING PRINTED CHART

FLEXIBLE PRINTED CIRCUIT CARD, PROCESS FOR THE MODIFICATION OF A PRINTED CIRCUIT CARD, AND PRINTED CIRCUIT CARD

PLATE OF CONNECTION FOR ELECTRICAL CIRCUIT

LSI electronic circuit support assembly

Assemblage de dispositifs électroniques comprenant un boîtier de support de bande (1) supportant un circuit LSI (2) et ayant des trous traversants (8) disposés bidimensionnellement dans un film et connectés électriquement au circuit LSI par un motif de câblage, et un substrat isolant (3) ayant des broches d'entrée/sortie (4) connectées à des pastilles (9) fournies sur un substrat de montage (6), s'étendant dans et en contact avec les trous (8). Le boîtier de support de bande peut être fabriqué de façon aussi peu coûteuse que le boîtier TBGA de l'état de l'art, à un coût inférieur à celui d'un câblage similaire utilisant un substrat stratifié céramique. La constante diélectrique et d'autres facteurs du matériau du substrat isolant (3) n'ont pas à être pris en compte, et on peut utiliser le matériau le moins coûteux.

STRUCTURE OF CASE FOR INTEGRATED CIRCUIT

METHOD FOR PRODUCING A PRINTED CIRCUIT AND PRINTED CIRCUIT OBTAINED BY CARRYING OUT SAID METHOD

Membrane keyboard which the flexible membrane control at least one passive component

Un clavier comprend au moins une membrane souple de commande sur laquelle sont disposés au moins un composant passif et au moins une piste conductive. Les composants passifs (1) sont des composants sous boîtier pourvus de fils de connexion (2, 3). Chaque fil (2, 3) est passé à travers au moins une ouverture (6, 7, 8, 9) de la membrane (4) et un tronçon de chaque fil de connexion (2, 3) est appliqué à fleur, par pression, sur au moins une piste conductive (5) et relié électriquement à celle-ci. Applicable à divers appareils électriques et électroniques.

PRINTED CIRCUIT BOARD ASSEMBLY AND METHOD OF MANUFACTURING THE SAME

PRINTED WIRING BOARD

MULTILAYER PRINTED WIRING BOARD AND PRODUCTION METHOD THEREOF

SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT, MULTI-LAYER PRINTED CIRCUIT BOARD, AND METHOD OF MANUFACTURING MULTI- LAYER PRINTED CIRCUIT BOARD

A semiconductor element, wherein copper transition layers (38) disposed on die pads (22) of an IC chip (20) are incorporated in a multi-layer printed circuit board (10), whereby the IC chip (20) can be connected electrically to the multi-layer printed circuit board (10) without using lead parts and sealing resin, the resin is prevented from remaining on an aluminum pad (24) by providing the copper transition layers (38) on the aluminum pad (24), and the connectability between the die pads (22) and via holes (60) and the reliability thereof can be increased. © KIPO & WIPO 2007 ...

MULTILAYER PRINTED WIRING BOARD

A multilayer printed wiring board (100) which is excellent in reliability because of the short wiring distance of a conductor circuit, high freedom of conductor circuit design, and little possibility of cracks developing in an interlayer resin insulation layer in the vicinity of a via hole, and which comprises conductor circuits (105) and interlayer resin insulation layers (102) sequentially laminated on a substrate (101), conductor circuits sandwiching an interlayer resin insulation layer being connected via a via hole (107), characterized in that via holes in different hierarchies out of all the via holes are formed to be in a stack via structure, and at least one via hole (1072) out of the above via holes in different hierarchies has a land diameter different from those of other via holes (1071, 1073). © KIPO & WIPO 2009 ...

CIRCUIT BOARD, CIRCUIT BOARD MANUFACTURING METHOD, AND ELECTRONIC DEVICE THEREOF

The present invention provides a circuit board having short manufacturing processes and obtaining a uniform thickness. A method for manufacturing the circuit board of the present invention comprises the steps of: adhering a plastic-deformative insulation material on a surface on which a first metal layer is formed, of a second metal layer and on the first metal layer, in a laminate having the second metal layer formed with a second metal and the first metal layer formed in a pattern shape on the second metal layer and having a metal at least different from the second metal; hardening the insulation material; forming a plate-shape structure on which the first metal layer in a pattern shape is formed, by removing the second metal layer; making a hole reaching the first metal layer on the hardened insulation material from the surface having the first metal layer formed thereon and the opposite surface of the plate-shape structure; charging the hole with conductive paste and forming the plate-shape ...

The printed circuit board and the method for manufacturing the same

Disclosed are a printed circuit board and a method for manufacturing the same. The printed circuit board includes a first insulating layer, a second insulating layer on the first insulating layer, and at least one via formed through the first and second insulating layers and having a layer structure. The via includes a first via layer formed through the first insulating layer, a second via layer formed on the first via layer while passing through the second insulating layer, and an adhesive layer between the first and second via layers. The first via layer has a section different from a section of the second via layer. The adhesive property between the copper layer and the insulating layer is improved. The vias used to connect interlayer circuits to each other are formed between a plurality of insulating layers through an etching process instead of a laser process or a polishing process, so that the process ability is improved, and the manufacturing cost is reduced.

Stacked chip electronic package having laminate carrier and method of making same

A multi-chip electronic package which utilizes an organic, laminate chip carrier and a pair of semiconductor chips positioned on an upper surface of the carrier in a stacked orientation The organic, laminate chip carrier is comprised of a plurality of conductive planes and dielectric layers and couples one or both of the chips to underlying conductors on the bottom surface thereof. The carrier may include a high-speed portion to assure high-frequency connection between the semiconductor chips and may also include an internal capacitor and/or thermally conductive member for enhanced operational capabilities. The first chip, e.g., an ASIC chip, is solder bonded to the carrier while the second chip, e.g., a memory chip, is secured to the first chip's upper surface and coupled to the carrier using a plurality of wirebond connections.

TERMINATION APPARATUS AND METHOD FOR PLANAR COMPONENTS ON PRINTED CIRCUIT BOARDS

The disclosure involves the efficient termination of a winding PCB of a planar inductive component to a main PCB, using relatively little space and providing a low-resistance connection. The disclosed methods are especially suitable for planar structures where several winding PCBs, and/or winding PCBs and a main PCB, are all enclosed by the magnetic path components. The methods allow for a winding PCB to simply rest on the main PCB, or other winding PCBs, without any clearance. The disclosure employs mating sets of conductive annular rings with an optional interlocking terminal pin that allows two PCBs to be fixedly coupled together, while preserving a minimum distance between the solder-mask layers of the two PCBs in order to prevent the formation of unwanted electrical connections between the two PCBs. Solder is used to ensure effective coupling in each assembly of mating annular rings and optional terminal pin.

MULTI-LAYER PRINTED CIRCUIT BOARD

... [PROBLEMS] To provide a multi-layer printed circuit board capable of assuring via hole connection reliability. [MEANS FOR SOLVING PROBLEMS] At the connection portion between the bottom of the filled via (60) and the cover plated layer (36a), the connection boundary plane is shifted downward from the upper surface of the cover plated layer (36a) by depth d1. Thus, the connection boundary plane where a crack is caused most easily is at a lower position than the upper surface position of the cover plated layer (36a) where the stress upon heat shrinkage becomes maximum. Accordingly, a crack is not caused easily and resistance against thermal stress can be enhanced.

CIRCUIT BOARD INCORPORATING FUNCTIONAL ELEMENT, METHOD FOR MANUFACTURING THE CIRCUIT BOARD, AND ELECTRONIC DEVICE

A circuit board is provided with a functional element; a wiring board incorporating the functional element; and first and second wiring layers. The first and second wiring layers are formed on front and rear surface sections on the circuit board by sandwiching the functional element, and each of the first and second wiring layers includes at least one conductive layer. The surface of each pattern wiring of the outermost layer of the first wiring layer is exposed, and the surface of a first insulating layer, which insulates the pattern wirings of the outermost layer one from another, is protruded from the surface of each pattern wiring of the outermost layer. Each pattern wiring of the second wiring layer and an electrode terminal of the functional element are connected, and the surface of the second insulating layer insulating electrode terminals one from another and the surface of the electrode terminal adjacent to the surface of the second insulating layer are substantially within a same ...

Multilayer wiring circuit board

An inexpensive multilayer wiring circuit board capable of conducting high frequency switching operation on the circuit while the generation of high frequency noise is being suppressed by reducing the inductance of the circuit in provided. A multilayer wiring circuit board comprising: an uppermost layer designated as a first layer on which parts are mounted; a second layer on which one of a ground layer and an electric power source layer is arranged; a third layer on which the other is arranged; and an insulating layer arranged between the ground layer and the electric power source layer. A resin layer having a thermoplastic adhesion property on both faces is used as material of the insulating layer arranged between the electric power source layer and the ground layer.

Wiring board, semiconductor device, and method of manufacturing wiring board

A wiring board includes a first via hole in a first insulating layer to expose a first wiring layer. A first via in the first via hole includes an end surface. A second wiring layer is arranged on the first insulating layer and the end surface of the first via. A second insulating layer covers the second wiring layer. A second via hole in the second insulating layer exposes the second wiring layer. A second via in the second via hole is arranged above the first via through the second wiring layer. The outer surface of the first insulating layer is lower in surface roughness than an inner surface of the first via hole.

Microelectronic device and method of manufacturing same

A microelectronic device comprises a first substrate (110) having a first electrically conductive path (111) therein and a second substrate (120) above the first substrate and having a second electrically conductive path (121) therein, wherein the first electrically conductive path and the second electrically conductive path are electrically connected to each other and form a portion of a current loop (131) of an inductor (130).

Printed circuit board and the method for manufacturing the same

A printed circuit board includes: a core insulating layer including a glass fiber; a first insulating layer on an upper portion or a lower portion of the core insulating layer, the first insulating layer including a first circuit pattern groove; a first circuit pattern filling the first circuit pattern groove of the first insulating layer; a second insulating layer covering the first circuit pattern and including a second circuit pattern groove at a top surface thereof; and a second circuit pattern filling the second circuit pattern groove of the second insulating layer, wherein the first insulating layer includes a resin material and a filler distributed in the resin material. Accordingly, a total thickness of the PCB can be thinly formed while maintaining the stiffness by separately forming a thin insulating layer without a glass fiber for the buried pattern on the core insulating layer.

Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board

A multi-layer printed circuit board including a first insulating layer, a first conductor layer having conductor circuits on one surface of the first insulating layer, a second conductor layer having conductor circuits on the opposite surface of the first insulating layer, a second insulating layer on the second conductor and first insulating layers, and a third conductor layer having conductor circuits on the second insulating layer on the opposite side of the second conductor layer. The first and second insulating layers have first and second via holes which are formed in openings of the first and second insulating layers and made of conductive materials filled to the top of the openings such that conductor circuits in the first and third conductor layers are connected to one or more conductor circuits in the second conductor layer, and the first and second via holes are tapering toward the second conductor layer.

MULTI-LAYER PRINTED WIRING BOARD AND MANUFACTURING METHOD THEREOF

A multi-layer printed wiring board has a core substrate, a throughhole structure, a first interlayer insulation layer, a first via, a second interlayer insulation layer and a second via. The core substrate has a throughhole opening, and the throughhole structure is formed in the throughhole opening. The first interlayer insulation layer is formed over the core substrate. The first via is formed in the first interlayer insulation layer and has a bottom portion having a first radius. The second interlayer insulation layer is formed over the first interlayer insulation layer and the first via. The second via is formed in the second interlayer insulation layer and has a bottom portion having a second radius greater than the first radius. The first via is positioned inside a circle having a radius (D1) from a gravity center of the throughhole opening, and the radius (D1) of the circle satisfies a formula, (D1)=(R)+(r)/3, where (R) represents a radius of the throughhole opening and (r) represents ...

Substrate with stacked vias and fine circuits thereon, and method for fabricating the same

A substrate with stacked vias and fine circuits and a method for fabricating the substrate are proposed. A core layer is formed with a metal layer respectively on upper and lower surfaces thereof, and at least one through hole. A first insulating layer is applied over the metal layer on the upper surface of the core layer and selectively formed with at least one first opening for exposing the metal layer. A metal layer is formed within the first opening, and a second insulating layer is applied over the first insulating layer and formed with a plurality of second openings, wherein the metal layer within the first opening is exposed via at least one second opening. After a conductive layer is applied over the second insulating layer and within the second openings, a metal layer is formed within the second openings. Finally, the conductive layer is removed by micro-etching.

Contactor and test method using contactor

A contact terminal formed of an electrically conductive material is arranged in each of a plurality of holed of a contactor substrate. An electrically conductive part is formed on an inner surface of each hole. The contact terminal has a first contact part that contacts a terminal of an electronic part and a second contact part that contacts the electrically conductive part in a middle portion. When the contact terminal bends by the first contact part being pressed, the second contact part contacts the electrically conductive part of the contactor substrate and an appropriate degree of contact pressure is obtained.

PRINTED CIRCUIT BOARD ASSEMBLY AND METHOD OF MANUFACTURING THE SAME

A printed circuit board assembly has plural printed circuit boards that are mechanically and electrically connected to each other with them being stacked, and a connection layer that connects the adjacent two printed circuit boards to each other is provided. The connection layer includes an insulation portion and an electric conduction portion. The insulation portion contains an insulating member and is adhered to each of the adjacent two printed circuit boards. The electric conduction portion passes through the insulation portion and connects electrode terminals of the adjacent two printed circuit boards.

Method for manufacturing wiring board

A method for manufacturing a wiring board, comprising the steps of: forming a first electrode layer having first and second opening portions, forming a dielectric layer formed on the first electrode layer and having third and fourth opening portions, forming a second electrode layer formed on the dielectric layer and having fifth and sixth opening portions, wherein the first electrode layer, the dielectric layer, and the second electrode layer form a capacitor; forming an insulating layer inside a first opening defined by the first, third, and fifth opening portions, and a second opening defined by the second, fourth, and sixth opening portions; using a laser beam having a processing diameter to form first and second via holes extending through the insulating layer formed inside the first and second openings, respectively; and forming first and second via wiring portions in the first and second via holes, respectively.

Coordinate data input device and method of fabricating the same

A coordinate data input device is fabricated by stacking a sensing board having a film provided with a plurality of parallel x-electrodes on its front surface, a plurality of parallel y-electrodes extending perpendicularly to the first electrodes on its back surface, and through holes formed at one end of each electrodes, and a printed wiring board provided with a plurality of through holes at positions corresponding to the through holes formed in the film of the sensing board at the ends of the first and the second electrodes, and a circuitry formed on its back surface, for driving and controlling the first and the second electrodes of the sensing board. Conductive films are formed on the side surfaces of the through holes of the sensing board and those of the printed wiring board so as to electrically connect the first and the second electrodes of the sensing board to the circuitry of the printed wiring board.

Multilayer interconnect system for an area array interconnection using solid state diffusion

A method and apparatus for manufacturing large area multilayer interconnects for electronic substrates and circuit boards uses high density area array interconnections that are created by solid state diffusion. Two or more pretested subsections are electrically and mechanically joined together to simultaneously form a multilayer substrate without employing a flow-type connection where the conductive interconnect material is entirely in a liquid phase at some point during the joining process. Each substrate is comprised of a planar dielectric substrate having a plurality of conductive layers. On at least one surface of the substrate a conductive pad lay is formed having a plurality of interconnect pads. The interconnect pads are positioned at a uniform height above the surface of the dielectric substrate and include a base metal layer, a top metal layer with at least one of the conductive pad layers have a donor metal disposed on top of the top metal layer. When the conductive pad layers ...

Wiring board and fabricating method thereof, semiconductor device and fabricating method thereof, circuit board and electronic instrument

A conductive material is provided to an open end of a penetrating hole penetrating through at least a semiconductor element, on the side of a first surface of the semiconductor element. The conductive material is melted to flow into the penetrating hole. The conductive material is made to flow into the penetrating hole in a state that an atmospheric pressure on the side of a second surface of the semiconductor element opposite to the first surface is lower than an atmospheric pressure on the side of the first surface.

Method and structure for small pitch z-axis electrical interconnections

A method for producing small pitch z-axis electrical interconnections in layers of dielectric materials which are applied to printed wiring boards and diverse electronic packages. A method for parallel fabrication of intermediate structures which are subsequently jointed to form a final structure. In addition there is provided a z-interconnected electrical structure, employing dielectric materials such as resin coated copper, employable in the manufacture of diverse type of electronic packages, including printed wiring boards (PWBs), substrates, multi-chip modules and the like.

Cardlike electronic device

An electronic device (100) comprises a first substrate (102) having a first circuit pattern disposed thereon which is selectively processed to provide pretinned connection pads (108, 116, 124, 132, 140) for connection to at least one electronic component (142) and a second circuit pattern disposed on a second substrate (104). The second circuit pattern disposed on the second substrate (104) is selectively processed to further provide pretinned connection pads (110, 118, 126) for connection to the first circuit pattern, and the second substrate (104) further has relief provided within a portion thereof to position the at least one electronic component (142) with respect to the pretinned connection pads (108, 116, 124, 132, 140) on the first circuit pattern. The pretinned connection pads (108, 116, 124, 132, 140, 110, 118, 126) are processed using a low residue fluxing agent to enable processing of the first (102) and second (104) substrates and the at least one electronic component (142) ...

Alignment-enhancing feed-through conductors for stackable silicon-on-sapphire wafers

Alignment-enhancing electrically conductive feed-through paths are provided for the high-speed low-loss transfer of electrical signals between integrated circuits of a plurality of silicon-on-sapphire bodies arrayed in a stack. The alignment-enhancing feed-throughs are made by a process involving the drilling of holes through the body, double-sided sputtering, electroplating, and the filling of the holes with solder by capillary action. The alignment-enhancing feed-throughs are activated by forming a stack of wafers and remelting the solder whereupon the wafers, and the feed-through paths, are pulled into alignment by surface tension forces.

MULTILAYER WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME

The multilayer wiring substrate includes: a first insulating layer comprising a first surface and a second surface opposite to the first surface; a second insulating layer on the first surface of the first insulating layer; a first wiring pattern on the second surface of the first insulating layer; a second wiring pattern on a surface of the second insulating layer; a first via formed through the first insulating layer; a second via formed through the second insulating layer; and a third wiring pattern formed on the first surface of the first insulating layer and embedded in the second insulating layer, the third wiring pattern having a hole therethrough. A diameter of the hole is smaller than each diameter of the first and second vias. The first via and the second via are connected to each other through a metal filled in the hole of the third wiring pattern.

FLEX-RIGID WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

A flex-rigid wiring board having a flexible wiring board, a first insulation layer positioned adjacent to a side of the flexible board and having a first hole which penetrates through the first layer, a second insulation layer laminated over the flexible board and the first layer and having a second hole which penetrates through the second layer, the second hole of the second layer being formed along the axis of the first hole of the first layer, a first conductor structure formed in the first hole and including a filled conductor formed by filling plating in the first hole, and a second conductor structure formed in the second hole and including a filled conductor formed by filling plating in the second hole, the second conductor structure being formed along the axis of the first conductor structure and electrically connected to the first conductor structure.

Printed circuit laminate, printed circuit board produced therefrom, and printed circuit process therefor

A novel printed circuit laminate product and process are provided for use in connection with a printed circuit board. The laminate is composed of a polyimide support stratum, a copper electrical conductor stratum, and an intermediate adhesive stratum. In one form, the opposite faces of the laminate are separately etched to provide different circuit related features and the laminate as an entirety has through holes, which have particular cross sectional geometry and which are produced by particular process steps. In another form, the copper stratum is laminated to the adhesive face of the adhesive and support strata and is etched after through holes have been drilled in the adhesive and support strata. The geometry is such that the diameter of a through hole in a conducting portion of the conducting stratum is smaller than the diameter of the through hole in the adhesive and support strata, so as to provide a conducting rim or flange for ease and security of mechanical and electrical connection ...

Electronic component built-in substrate and method of manufacturing the same

In an electronic component built-in substrate of the present invention, an electronic component is mounted on a mounted body having a first wiring layer, the electronic component is embedded in an insulating layer, a conductive ball is arranged to pass through the insulating layer and connected electrically to the first wiring layer, a second wiring layer connected electrically to the conductive ball is formed on the insulating layer, and the first wiring layer and the second wiring layer are interlayer-connected via the conductive ball.

Formation of multisegmented plated through holes

A method and structure relating to multisegmented plated through holes. A substrate includes a dielectric layer sandwiched between a first laminate layer and a second laminate layer. A through hole is formed through the substrate. The through hole passes through nonplatable dielectric material within the dielectric layer. As a result, subsequent seeding and electroplating of the through hole results in a conductive metal plating forming at a wall of the through hole on a segment of the first laminate layer and on a segment of the second laminate layer, but not on the nonplatable dielectric material of the dielectric layer. Thus, the conductive metal plating is not continuous from the first laminate layer to the second laminate layer.

FLEX-RIGID WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

A flex-rigid wiring board including a rigid wiring board including a rigid base material and having a conductive layer over the rigid base material, and a flexible wiring board including a flexible base material and having a conductive layer over the flexible base material. The conductive layer of the flexible wiring board is electrically connected to the conductive layer of the rigid wiring board. The flexible wiring board has a cut portion and one or more folding portions formed by using the cut portion and folding one or more portions of the flexible wiring board such that the flexible wiring board is extended in length.

Component-incorporating wiring board

An objective is to provide a component-incorporated wiring substrate capable of solving a problem caused by an increase in length of wiring lines that connect a component and a capacitor. A component-incorporated wiring substrate 10 includes a core substrate 11, a first capacitor 301, a wiring laminate portion 31, and a second capacitor 101. An accommodation hole portion 90 of the core substrate 11 accommodates the first capacitor 101 therein, and a component-mounting region 20 is set on a surface 39 of the wiring laminate portion 31. The second capacitor 101 has electrode layers 102, 103 and a dielectric layer 104. The second capacitor 101 is embedded in the wiring laminate portion 31 in such a state that first main surfaces 105, 107 and second main surfaces 106, 108 are in parallel with the surface 39 of the wiring laminate portion 31, and is disposed between the first capacitor 301 and the component-mounting region 20.

FLEX-RIGID WIRING BOARD

In a flex-rigid wiring board in which a rigid substrate formed from a rigid base material and a flexible substrate formed from a flexible base material are stack-joined and electrically connected to each other, the flexible substrate including a conductive layer having interconnecting electrode pads provided on at least one surface thereof, and the rigid substrate including a conductive layer having interconnecting electrode pads provided on at least one surface thereof in a position opposite to the interconnecting electrode pads on the rigid substrate, are locally connected electrically to each other with an anisotropic conductive adhesive layer interposed between conductive layers of substrate portions each including at least the interconnecting electrode pads. In this flex-rigid wiring board, transmission of high-frequency signals can be prevented from being delayed, noises can be suppressed, and an excellent electrical connection and connection reliability be assured.

CIRCUIT BOARD AND METHOD OF MAKING CIRCUIT BOARD

A circuit board includes a first conductive circuit layer, a cover layer, and a second conductive circuit layer. The cover layer includes an adhesive layer and a base film. The first conductive circuit layer is embedded within the adhesive layer. One side of the first conductive circuit layer is revealed from the adhesive layer. The second conductive circuit layer is located on a side of the base film facing away from the adhesive layer. The cover layer defines a first through hole and a second through hole passing through the cover layer. A diameter of the first through hole is greater than a diameter of the second through hole. The first through hole is filled with a copper post adjacent to the first conductive circuit layer and an electroplating layer adjacent to the second conductive circuit layer. The second through hole is filled with the electroplating layer.

Multilayer build-up wiring board

Mesh holes 35a and 59a of upper solid layers 35 and upper solid layers 59 are formed to overlie on one another, so that the insulating properties of interlayer resin insulating layers 50 are not lowered. Here, the diameter of each mesh hole is preferably 75 to 300 mum. The reason is as follows. If the diameter of the mesh hole is less than 75 mum, it is difficult to overlay the upper and lower mesh holes on one another. If the diameter exceeds 300 mum, the insulating properties of the interlayer resin insulating layers deteriorate. In addition, the distance between the mesh holes is preferably 100 to 2000 mum. The reason is as follows. If the distance is less than 100 mum, the solid layer cannot function. If the distance exceeds 2000 mum, the deterioration of the insulating properties of the interlayer resin insulating film occurs.

Multi-layer printed circuit board, and method for fabricating the same

To provide an interlayer-connected, multi-layer flexible printed circuit board having high bonding reliability and most suitable for micropatterning the circuit layers in the device; and to provide a high-productivity method for fabricating the device. A multi-layer flexible printed circuit board, wherein a conductor is filled in the through-holes formed in the insulating layer in the direction of the thickness thereof so as to electrically interconnect the circuit layers formed on both faces of the insulating layer, and wherein the conductor contains inside it, a copper-core solder ball having a copper ball as a core thereof.

PRINTED WIRING BOARD

A printed wiring board has a packaging substrate having multiple pads, and a transmission substrate mounted on the multiple pads of the packaging substrate. The packaging substrate has a pad group constituted of pads which mount an electronic component, the multiple pads mounting the transmission substrate includes a first pad positioned in a peripheral portion of the packaging substrate and a second pad positioned between the first pad and the pad group, the second pad is electrically connected to a signal pad of the pads in the pad group, and the transmission substrate includes a horizontal wiring which electrically connects the second pad and the first pad and which transmits a signal between the second pad and the first pad.

Circuit board preparation method

The main technical problem solved by the present disclosure is to provide a circuit board preparation method. The method includes: obtaining a to-be-processed plate comprising an insulating layer, a first copper layer, a second copper layer opposite to the first copper layer, a blind metalized hole, and a first tab facing the blind metalized hole; obtaining a white insulating material; laminating the white insulating material to a surface of the insulating layer, a surface of the first copper layer, a surface of the first tab, and a surface of the second copper layer to form a first white insulating medium layer and a second white insulating medium layer opposite to the first while insulating medium layer; and performing surface polishing for the first white insulating medium layer and grinding the first white insulating medium layer until the first tab is exposed to form a first white reflective layer.

Flex-rigid wiring board and method of manufacturing the same

A flexible substrate 13 having conductor patterns 132 and 133, and a non-flexible substrate 111 with rigidity are disposed adjacent to each other in the horizontal direction. The flexible substrate. 13 and the non-flexible substrate 111. are covered with insulating layers 111 and 113 so that at least a portion of the flexible substrate is exposed. Vias 116 and 141 are formed in the insulating layers 111 and 116 so as to reach the conductor patterns 132 and 133 of the flexible substrate 13, and wirings 117 and 142 are formed by plating to reach the conductor patterns 132 and 133 through the vias 116 and 141. The insulating layers 114, 115, 144, and 145 are laminated on the insulating layers 111 and 113, and circuits 123 and 150 are formed for connection of wiring.

Method of manufacturing a flex-rigid wiring board

Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies

Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies. An embodiment of the invention provides a method of manufacturing a printed circuit including attaching a plurality of metal layer carriers to form a first subassembly including at least one copper foil pad on a first surface, applying an encapsulation material onto the first surface of the first subassembly, curing the encapsulation material and the first subassembly; applying a lamination adhesive to a surface of the cured encapsulation material, forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad, attaching a plurality of metal layer carriers to form a second subassembly, and attaching the first subassembly and the second subassembly.

Multi-Layer Circuit Assembly And Process For Preparing The Same

A process for fabricating a multi-layer circuit assembly is provided. The process includes (a) providing a substrate at least one area of which comprises a plurality of vias area(s) having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the substrate to form a conformal coating thereon; (c) removing the dielectric coating in a predetermined pattern to expose sections of the substrate; (d) applying a layer of metal to all surfaces to form metallized vias through and/or to the electrically conductive core; (e) applying a resist to the metal layer to form a photosensitive layer thereon; (f) imaging resist in predetermined locations; (g) developing resist to uncover selected areas of the metal layer; and (h) etching uncovered areas of metal to form an electrical circuit pattern connected by the metallized vias.

Method and apparatus for determining disposition of via hole on printed circuit board

A method for determining disposition of via hole on printed circuit board (PCB), said method comprising the steps of: providing a PCB on which is disposed with a geometric layout and a via hole; providing a line on said PCB for intersecting said geometric layout to form a plurality of points of intersection; defining line segments by segmenting said line at each of said points of intersection to form a plurality of line segments; deleting some of said line segments having one end not being point of intersection for said geometric layout to form a plurality of segmented regions; searching a closed region by repeatedly searching region from any one of the points in said plurality of segmented regions; determining whether a closed region is a smallest closed region; determining whether a via hole is located within said smallest closed region.

Signal transmission line and circuit board

A signal line and a circuit board that can be easily bent in a U shape and prevent unwanted emission include a line portion includes a plurality of laminated line portion sheets made of a flexible material. Signal lines extend within the line portion in an x-axis direction. Ground lines are provided within the line portion on a positive direction side in a z-axis direction with respect to the signal lines and have line widths equal to or smaller than the line widths of the signal lines. Ground lines are provided within the line portion on a negative direction side in the z-axis direction with respect to the signal lines. The signal lines overlap the ground lines when seen in a planar view from the z-axis direction.

Split wave compensation for open stubs

In accordance with a first embodiment, the present invention provides a circuit substrate comprising a first surface; a second surface; a first via having a first end near said first surface and a second end near said second surface; a second via having a first end near said first surface and a second end near said second surface; a first conductive element electrically coupling said first end of said first via and said first end of said second via; a second conductive element electrically coupling said second end of said first via and said second end of said second via; an input signal line coupled to said first via; and an output signal line coupled to said second via.

Defected ground structure with shielding effect

A defected ground structure with shielding effect is provided. The structure includes a dielectric layer, a defected metal layer, a grounded metal layer and at least a conductive mushroom-like structure. The defected metal layer has a line-shaped opening and is disposed in the dielectric layer. The conductive mushroom-like structure is disposed between the defected metal layer and the grounded metal layer and is arranged along an extending direction of the line-shaped opening periodically. The conductive mushroom-like structure includes a fungating part and a stipe part. The fungating part is parallel to the defected metal layer and a distance is maintained away from the defected metal layer. The projection area of the fungating part on the defected metal layer covers a length of the line-shaped opening corresponding to the fungating part. The stipe part connects the fungating part and the grounded metal layer.

Integrated circuit packaging system with a shield and method of manufacture thereof

A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a first integrated circuit over the substrate; forming an encapsulant around the first integrated circuit and over the substrate; and forming a shield structure within and over the encapsulant while simultaneously forming a vertical interconnect structure.

Wiring structure and joint box including the same

A wiring structure includes a board assembly and pin terminals. In each of pin terminal insertion holes formed in the board assembly, a terminal connection portion electrically connected to a metal foil wire and fitted onto the pin terminal so as to hold the pin terminal is provided in a through-hole of at least one of a plurality of circuit boards forming the board assembly, which forms a part of the pin terminal insertion hole, whereas an insulating sleeve blocking contact between the pin terminal and each of the remaining circuit boards is fitted into through-holes of the remaining circuit boards, which form the remaining part of the pin terminal insertion hole.

Z-directed pass-through components for printed circuit boards

A Z-directed signal pass-through component for insertion into a printed circuit board while allowing electrical connection from external surface conductors to internal conductive planes or between internal conductive planes. The Z-directed pass-through component is mounted within the thickness of the PCB allowing other components to be mounted over it. The body may contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body.

Bendable Luminous Modules and Method for Producing Bendable Luminous Modules

A light module ( 1; 14 ), comprising a carrier ( 8, 10 ) for mounting at least one semiconductor source ( 5 ), in particular a light emitting diode, wherein: the carrier ( 8, 10 ) has a flexible printed circuit board ( 10 ), the flexible printed circuit board ( 10 ) is bonded face-to face to at least one base plate, ( 8 ) and the carrier ( 8, 10 ) can be bent along at least one predetermined bending line ( 3; 3 a - 3 e ), the base plate ( 8 ) can be bent along the at least one bending line, ( 3; 3 a - 3 e ), the base plate ( 8 ) has at least one cutout ( 9 ) along the bending line ( 3; 3 a - 3 e ) and the flexible printed circuit board ( 10 ) has at least one strip ( 11; 15 ) which crosses at least one of the cutouts ( 9 ).

Multistage capacitive crosstalk compensation arrangement

Methods and systems for providing crosstalk compensation in a jack are disclosed. According to one method, the crosstalk compensation is adapted to compensate for undesired crosstalk generated at a capacitive coupling located at a plug inserted within the jack. The method includes positioning a first capacitive coupling a first time delay away from the capacitive coupling of the plug, the first capacitive coupling having a greater magnitude and an opposite polarity as compared to the capacitive coupling of the plug. The method also includes positioning a second capacitive coupling at a second time delay from the first capacitive coupling, the second time delay corresponding to an average time delay that optimizes near end crosstalk. The second capacitive coupling has generally the same overall magnitude but an opposite polarity as compared to the first capacitive coupling, and includes two capacitive elements spaced at different time delays from the first capacitive coupling.

Method of manufacturing substrate for capacitor-embedded printed circuit board and capacitor-embedded printed circuit board

A method of manufacturing a capacitor-embedded printed circuit board, the method including providing a substrate on which a first metal layer, a dielectric layer and an adhesive resin layer are stacked on the order thereof; etching a part of the first metal layer to form a first electrode and a first circuit pattern; compressing a surface of the substrate, on which the first electrode is formed, onto a core board by interposing an insulation resin layer; forming a second electrode and a second circuit pattern on the adhesive resin layer; stacking an insulation board on the substrate such that the second electrode and the second circuit pattern are covered; and forming a third circuit pattern on the insulation board.

Wiring board and method of producing the same

A wiring board includes: wiring layers; insulating layers disposed between the wiring layers; and external connection pads respectively including surface plated layers, for connecting to an external circuit. In each of the external connection pads in one face of the wiring board, an outer peripheral edge of the external connection pad is retracted from an outer peripheral edge of the surface plated layer toward a center of the external connection pad.

Microwave filter

A filter unit and a corresponding printed circuit board. The filter unit and the printed circuit board have been equipped with modified end portions being matched such that a number of filter units can be used on the printed circuit board without changing the printed circuit board.

Filter Having Electrical Circuit Arrangement with Concentrated Elements in Multi-layer Substrates

An electrical circuit arrangement provides a substrate and at least two conductive surfaces. The substrate comprises at least one layer disposed between the conductive surfaces. The conductive surfaces form a capacitor and overlap in part and form an overlapping area. In the event of a displacement of the conductive surfaces relative to one another, the resulting overlapping area is largely constant up to a threshold value of the displacement.

Multi-plate board embedded capacitor and methods for fabricating the same

A printed wiring board (PWB) including one or more embedded capacitors. The PWB defines a planar area and includes a plurality of first conductive plates that are substantially parallel to the planar area and extend from a first normal axis towards a second normal axis. The first normal axis and the second normal axis extend substantially perpendicularly through the planar area. The PWB also includes one or more second conductive plates that are substantially parallel to the planar area and extend from the second normal axis towards the first normal axis. The second conductive plates are positioned between the first conductive plates. A non-conductive material is positioned between the first and second conductive plates. At least one first conductive via extends substantially collinear with the first normal axis in contact with the first conductive plates. A plurality of second conductive vias extends substantially collinear with the second normal axis in contact with the second conductive plate.

Printed wiring board and method for manufacturing the same

A printed wiring board comprises ground layers stacked via insulator(s); a first through hole; second through holes; and signal wirings each extending from the first through hole through the clearance between predetermined ones of the ground layers, disposed between predetermined second through holes of the second through holes. Each of first clearances in the ground layers neighboring layer in which the signal wiring is disposed has an outline that a distance between the first through hole and outline of the first clearance is minimum of the signal wiring. Each of second clearances in the ground layers not adjacent to the signal wiring has an outline formed outside a circle connecting each center of second through holes centering the first signal through hole, such that outline of second clearance does not contact with the second through holes.

High-frequency switch module

In a high-frequency switch module, a switch IC is mounted on a multilayer board to define a high-frequency switch module. The multilayer board includes two internal wirings and two internal ground electrodes. The internal ground electrodes are spaced apart from each other at an interval when viewed from a lamination direction of the multilayer board. The first internal wiring is located on the upper surface side of the first internal ground electrode, and is entirely separated from an RF wiring, and the first internal wiring includes a power supply wiring for supplying power to the switch IC. The second internal wiring is located on the upper surface side of the second internal ground electrode, and is entirely separated from the power supply wiring, and the second internal wiring includes a signal wiring through which an RF signal propagates.

Coreless layer laminated chip carrier having system in package structure

A substrate for use in a laminated chip carrier (LCC) and a system in package (SiP) device having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can include thermoset and thermoplastic resin.

Packaging substrate and method of fabricating the same

A packaging substrate includes a core board having a first surface and an opposite second surface; at least a conic through hole formed in the core board and penetrating the first and second surfaces; a plurality of conductive paths formed on a wall of the conic through hole, free from being electrically connected to one another in the conic through hole; and a plurality of first circuits and second circuits disposed on the first and second surfaces of the core board, respectively, and being in contact with peripheries of two ends of the conic through hole, wherein each of the first circuits is electrically connected through each of the conductive paths to each of the second circuits. Compared to the prior art, the packaging substrate has a reduced number of through holes or vias and an increased overall layout density.

Circuit Layout of Image Capturing Device

A circuit layout of an image capturing device comprises a circuit board, an image capturing circuit, a flashlight circuit and a groove. The circuit board is a multilayered structure. The image capturing circuit is built on the circuit board. The flashlight circuit is built on the circuit board. The groove is formed on the multilayered structure of the circuit board and divides the circuit board into two areas where the image capturing circuit and the flashlight circuit are respectively disposed. The image capturing circuit is located at a first area, and the flash circuit is located at a second area. Therefore, the groove can prevent the interference between the image capturing circuit and the flashlight circuit.

Printed circuit board used in server

A printed circuit board used in server, which has a golden finger interface at one side thereof. The golden finger interface includes a plurality of parallelly arranged metal sheets which conform to the USB standard. The golden finger interface is used to be engaged with a USB socket for transmitting the electrical signal.

High-frequency signal transmission line

A flexible high-frequency signal transmission line includes a dielectric body including laminated flexible dielectric layers. A signal line is provided in the dielectric body. A grounding conductor is arranged in the dielectric body to be opposed to the signal line via one of the dielectric layers. The grounding conductor is of a ladder structure including a plurality of openings and a plurality of bridges arranged alternately along the signal line. A characteristic impedance of the signal line changes between two adjacent ones of the plurality of bridges such that the characteristic impedance of the signal line rises from a minimum value to an intermediate value and to a maximum value and falls from the maximum value to the intermediate value and to the minimum value in this order.

Manufacturing method of circuit substrate

A manufacturing method of a circuit substrate includes the following steps. The peripheries of two metal layers are bonded to form a sealed area. At least a through hole passing through the sealed area is formed. Two insulating layers are formed on the two metal layers. Two conductive layers are formed on the two insulating layers. The two insulating layers and the two conductive layers are laminated to the two metal layers bonded to each other, wherein the metal layers are embedded between the two insulating layers, and the two insulating layers fill into the through hole. The sealed area of the two metal layers is separated to form two separated circuit substrates. Therefore, the thinner substrate can be operated in the following steps, such as patterning process or plating process. In addition, the method may be extended to manufacture the circuit substrate with odd-numbered layer or even-numbered layer.

Printed circuit board

A printed circuit board (PCB) comprising a first circuit area, a second circuit area, a plurality of connecting elements, and a plurality of connecting terminals placed on the first circuit area, wherein the first circuit area are electrically connected to the second circuit area through the plurality of connecting elements, the plurality of connecting elements are arranged in sequence to extend toward the plurality of connecting terminals, to form shortest current paths from the second circuit area via corresponding one of the connecting elements to the connecting terminals, respectively, and each shortest current path between the corresponding one of the connecting elements and the corresponding one of the connecting terminals is uncoated with conductive material.

Construction of reliable stacked via in electronic substrates - vertical stiffness control method

A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing with a thickness of substantially 3 μm. The platted through hole landing includes an etched pattern and a copper top surface.

Resonant via structures in multilayer substrates and filters based on these via structures

A resonant via structure is provided with a multilayer substrate, a signal via conductor and ground vias. The multilayer substrate includes conductor layers and a dielectric. The dielectric isolates each of the conductor layers. The signal via conductor is disposed through the multilayer substrate. The ground vias are disposed through the multilayer substrate and around the signal via conductor. The dielectric comprises two sections disposed between the signal via and ground vias, in the plane of conductor layers. The first section is disposed between the first layer and other layer of the conductor layers. The second section is disposed between the other layer and the last layer of the conductor layers.

Circuit board and method for making the same

A circuit board includes a base board defining a number of via holes, a power supply connection unit, a load connection unit, and at least one capacitor connection unit(s). Each of the at least one capacitor connection unit(s) includes two capacitor connectors, and one of the two capacitor connectors is positioned nearer to the power supply connection unit and farther away from the load connection unit than the other. The via holes are divided into at least one group(s) corresponding to each of the capacitor connection unit(s), and all of the via holes in each of the group(s) are equidistantly positioned along a semicircle arc surrounding the capacitor connector of the capacitor connection unit corresponding to the group that is positioned nearer to the power supply connection unit.

Footprint on pcb for leadframe-based packages

A footprint of a printed circuit board (PCB) for a leadframe-based package includes a plurality of pads arranged within a central region on a main surface of the PCB; and an array of signal pads disposed within a peripheral region surrounding the central region.

Laminated and sintered ceramic circuit board, and semiconductor package including the circuit board

A circuit board that can decrease thermal stress acting between a semiconductor element and a board in association with temperature alteration and has high mechanical strength (rigidity) as a whole board (including a multilayer wiring layer) is provided. Ceramic base material having a coefficient of thermal expansion close to that of a semiconductor element and inner layer wiring are integrally sintered, and the circuit board is configured so that fine-lined conductor structure corresponding to a multilayer wiring layer in the inner layer wiring has predetermined width, intralayer interval and interlayer interval. Thereby, thermal stress acting between a semiconductor element and the board when the board is exposed to temperature alteration in a condition where it is joined with the semiconductor element is suppressed, rigidity of the board is maintained, and its reliability against temperature cycle is increased.

Apparatus for detecting pattern alignment error

An apparatus for detecting pattern alignment error includes a first conductive pattern disposed over a first insulation member with a power source applied of the first conductive pattern; a second insulation member for covering the first conductive pattern; a second conductive pattern disposed on the second insulation member; a conductive via connected to the second conductive pattern and passing through the second insulation member; and an insulation pattern disposed in the first to conductive pattern for detecting an alignment error in response to a position of the conductive via. The apparatus for detecting pattern alignment error can detect the alignment of lower wiring in a device with multi-layer wiring

Base member

A base member includes: a core layer including: a plate-like body, made of aluminum oxide; and plural linear conductors, which penetrate through the plate-like body in a thickness direction of the plate-like body; a bonding layer, formed on at least one of a first surface and a second surface of the core layer; and a silicon layer or a glass layer, formed on the bonding layer.

Screening Process for Manufacturing a Z-directed Component for a Printed Circuit Board

A method for manufacturing a z-directed component for insertion into a mounting hole in a printed circuit board according to one example embodiment includes adding a substrate material to a mold defining the shape of a layer of the z-directed component. A top surface of the substrate material in the mold is leveled. The substrate material in the mold is treated and the layer of the z-directed component is formed. A conductive material is applied to at least one surface of the formed layer. The z-directed component is formed that includes a stack of component layers that includes the formed layer.

Coiled magnetic ring

This magnetic ring is formed by an upper U-shaped part and a lower U-shaped part, each upper and lower part comprising two vertical arms each introduced into a respective hole of the printed circuit board, each arm of the upper part being superimposed, within the respective hole and in a horizontal direction, on the corresponding arm of the lower part to set up magnetic continuity between these two parts of the magnetic ring.

Circuit board with air hole

A circuit board includes a first and second ground layer and a plurality of signal vias extending between the ground layers but not electrical contact therewith. Ground vias coupled to the first and second ground layers can be positioned adjacent signal vias and can include ground traces that extend between adjacent ground vias. Air holes can be positioned between signal vias and/or adjacent signal vias to modify the electrical performance of the circuit board. Ground wings can be used to help tune common-mode and/or differential-mode impedances.

Via structures and compact three-dimensional filters with the extended low noise out-of-band area

A filter of the present invention includes a plurality of via structures with a multilayer substrate. Each of the plurality of via structures includes first, second and third functional sections. One end of a signal via of the first functional section is connected to one end of a signal via of the second functional section and another end of the signal via of the second functional section is connected to two signal vias of the third functional section. Those signal vias are surrounded by a plurality of ground vias. Input and output ports of the filter are connected to another end of the signal via of each first functional section.

Driving printed circuit board and liquid crystal display device including the same

The present disclosure discloses a driving printed circuit board (PCB) for use in a display device. More particularly, a driving printed circuit board improving the bonding by preventing PCB warpage is provided. The rear surface stiffener plate includes polygonal patterns to prevent a PCB warpage of the driving printed circuit board due to different heat shrinkage from that of the board during the surface mounting technology (SMT) process.

Printed circuit board and method for manufacturing the same

Disclosed herein is a printed circuit board, including: a core layer; and a plurality of circuit layers stacked on the core layer, wherein one of the circuit layers includes a mesh pattern and a solid pattern, and another of the circuit layers include a first signal pattern opposite to the mesh pattern and a second signal pattern opposite to the solid pattern, the second signal pattern having a high-speed signal line with a higher speed, as compared with the second signal pattern.

Method of manufacturing coreless substrate having filled via pad

A method of manufacturing a coreless substrate having filled via pads, including: forming a first insulating layer on one side of a carrier forming a build-up layer including a build-up insulating layer and a build-up circuit layer having a build-up via on the first insulating layer, and forming a second insulating layer on the build-up layer; removing the carrier, and forming via-holes in the first and second insulating layers; and conducting a filled plating process in the via-holes of the first and second insulating layers thus forming first and second filled via pads therein.

Interchip communication using a dielectric waveguide

An apparatus is provided. There is a circuit assembly with a package substrate and an integrated circuit (IC). The package substrate has a microstrip line, and the IC is secured to the package substrate and is electrically coupled to the microstrip line. A circuit board is also secured to the package substrate. A dielectric waveguide is secured to the circuit board. The dielectric waveguide has a dielectric core that extends into a transition region located between the dielectric waveguide and the microstrip line, and the microstrip line is configured to form a communication link with the dielectric waveguide.

Interchip communication using an embedded dielectric waveguide

An apparatus is provided. There is a circuit assembly with a package substrate and an integrated circuit (IC). The package substrate has a microstrip line, and the IC is secured to the package substrate and is electrically coupled to the microstrip line. A circuit board is also secured to the package substrate. A dielectric waveguide is secured to the circuit board. The dielectric waveguide has a dielectric core that extends into a transition region located between the dielectric waveguide and the microstrip line, and the microstrip line is configured to form a communication link with the dielectric waveguide.

Thermal Management Of LED-Based Lighting Systems

An LED lighting element for use in a fluorescent lighting fixture includes first and second end caps formed as printed circuit boards for connecting with and obtaining physical support from respective first and second sockets of the fluorescent lighting fixture, and a blade supporting one or more LEDs between the first and second end caps. The blade includes a first compartment that contains high voltage circuitry, a second compartment, separated from the first compartment, that contains a low voltage assembly including the one or more LEDs, and a third compartment forming an optical cavity. The element also includes a power converter, located in one or both of the first and second end caps, that converts power from the fluorescent light socket into power for operating the LEDs.

Printed circuit boards

A printed circuit board comprises at least one microstrip transmission line with a conductive solid reference plane and at least one conductive trace embedded in a dielectric substrate, and further comprises at least one conductive shielding layer having a lattice structure, wherein the conductive trace is arranged between the solid reference plane and the shielding layer.

Touch panel

Disclosed herein is a touch panel, including: mesh conductor lines, wherein a pitch of the mesh conductor line has a value selected from p m =2×p d (f m =f d /2, p m ≦260 μm), wherein p m is a pitch of the mesh conductor line, p d is a pixel pitch of a display, f m is a frequency 1/p m of the mesh conductor line, and f d is a pixel frequency 1/p d of the display.

Package substrate and die spacer layers having a ceramic backbone

A layer or layers for use in package substrates and die spacers are described. The layer or layers include a plurality of ceramic wells lying within a plane and separated by metallic vias. Recesses within the ceramic wells are occupied by a dielectric filler material.

Display apparatus

A display apparatus including a display panel including a pixel electrode and a plurality of first signal lines transmitting a driving signal to the pixel electrode, a conductive member on the first signal lines, the conductive member having a resin, and a second signal line on the conductive member, the second signal line having an opening through which the resin travels to couple the second signal line with one of the first signal lines.

Capacitor and multilayer circuit board using same

A capacitor includes a first patterned conductive layer, a second patterned conductive layer and a patterned dielectric layer. The first patterned conductive layer is interlaced with the second patterned conductive layer in one plane so as to present, within the smallest overall volume, the greatest surface area of one conductive layer in the closest proximity to the parts of the second conductive layer. The patterned dielectric layer is within a same plane as the first and second patterned conductive layers and in fills all gaps between the first and second patterned conductive layers to form a capacitor between the first and second conductive layers. The first and second patterned conductive layer and the patterned dielectric layer are stacked within and contained by a multilayer circuit board.

Touch-sensing substrate, display panel, and patterned light-shielding layer

A touch-sensing substrate including a substrate, a patterned conductive layer and a patterned insulating layer is provided. The substrate has a plurality of first striped regions and a plurality of second striped regions. The first striped regions are intersected with the second striped regions to define a plurality of sensing-pad disposition regions. The patterned conductive layer includes a plurality of sensing pads disposed in the sensing-pad disposition regions. The patterned insulating layer is disposed on the first striped regions and the second striped regions. The patterned insulating layer and the patterned conductive layer are spliced to form a patterned light-shielding layer. The patterned light-shielding layer has a plurality of enclosed notches arranged in array, wherein parts of the enclosed notches are surrounded by the patterned conductive layer, and other parts of the enclosed notches are surrounded by the patterned conductive layer and the patterned insulating layer.

Flexible multilayer substrate

A flexible multilayer substrate includes a multilayer body including a plurality of laminated resin layers. The multilayer body includes an innermost surface, which is a surface on an inner side when the substrate is bent, and an outermost surface, which is a surface on an outer side when the substrate is bent. Each of the plurality of resin layers includes a skin layer on one surface. Lamination of the multilayer body includes a skin layer joint plane at one location at a central portion in the thickness direction, and the skin layer and other surface come in contact with each other at another location along the central portion in the thickness direction. A skin layer joint plane is arranged on a side closer to the innermost surface than a central plane in the thickness direction of the multilayer body.

Making transparent touch-responsive device with micro-wire electrodes

A method of making a touch-responsive capacitive device includes providing a transparent substrate and forming anisotropically conductive first and second electrodes extending in corresponding first and second orthogonal length directions over the substrate. Anisotropically conductive first and second electrodes each with electrically connected micro-wires are formed on opposing sides of the transparent substrate. The anisotropically conductive first and second electrodes extend in corresponding first and second length directions. The first and second micro-wires are formed with substantially parallel straight micro-wires extending substantially in the corresponding first and second length directions and a plurality of angled micro-wires are formed at a non-orthogonal angle to the straight micro-wires and electrically connect the straight micro-wires so that the anisotropically conductive first and second electrodes have a greater electrical conductivity in the corresponding first and second length directions than in another anisotropically conductive electrode direction.

Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies

Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies. An embodiment of the invention provides a method of manufacturing a printed circuit including attaching a plurality of metal layer carriers to form a first subassembly including at least one copper foil pad on a first surface, applying an encapsulation material onto the first surface of the first subassembly, curing the encapsulation material and the first subassembly; applying a lamination adhesive to a surface of the cured encapsulation material, forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad, attaching a plurality of metal layer carriers to form a second subassembly, and attaching the first subassembly and the second subassembly.

Conductive component and preparation method thereof

A conductive component is disclosed in the present invention, which includes an insulating layer and a metal mesh arranged on the insulating layer, the metal mesh defines a plurality of voids arranged in array, the aperture ratio K of the voids of the metal mesh and the optical transmittance T 1 of the conductive component and the optical transmittance T 2 of the insulating layer being described as formula: T 1 =T 2 *K. The metal mesh is arranged on the insulating layer in the conductive component, a patterned sensing layer on the insulating layer by the metal mesh treated by exposure and development as needed when in use, and then applied to touch screen, the use of indium tin oxide is avoided in the conductive component, thus the cost of the conductive component is low. A method of preparing the conductive component is also provided.

Printed circuit board

A printed circuit board is designed to meet the following requirements. A front-back copper foil residual rate difference a−b falls within a range of −10% to 10%, where the insulative board is divided into a plurality of divisions, in which front and back surface copper foil residual rates of each division are a % and b %, respectively. A difference (a−b)−(c−d) between front-back copper foil residual rate differences of adjacent divisions falls within a range of −10% to 10%, where the front and back surface copper foil residual rates of a division adjacent to the each division are c % and d %, respectively. There are not three or more consecutive divisions for which the difference between the front-back copper foil residual rate differences goes beyond a range of −5% to 5%.

Bonding structure of touch panel and flexible circuit board

A bonding structure of a touch panel and a flexible circuit board includes a touch panel, a flexible circuit board and a conductive adhesive film. The touch panel includes a shielding layer and multiple transmission wires disposed on the shielding layer. The flexible circuit board is under the touch panel and includes a substrate and multiple connection wires on the substrate. Each the connection wire includes a first connection portion and a second connection portion, and the two connection portions are separated from each other by an interval and electrically insulated from each other. The conductive adhesive film is between the transmission wires of the touch panel and the connection wires of the flexible circuit board, in which the first connection portions and the second connection portions of the connection wires are electrically connected to the transmission wires via the conductive adhesive film so as to form an electric loop.

Fine pitch interposer structure

A fine pitch interposer structure includes a Multi-core base substrate and a plurality of buildup laminates. A surface of each Multi-core base substrate has a first circuit layer, and a second circuit layer which is electrically connected to the first circuit layer. The buildup laminates are stacked on the surface of the Multi-core base substrate. Each buildup laminate includes a photosensitive dielectric layer, and a plurality of blind vias with a pre-determined interval therebetween which are correspondingly arranged on each of the plurality of vias formed on the photosensitive dielectric layer. The blind vias are electrically connected to the first circuit layer. At least one blind via of one buildup laminate is superimposed on another blind via of another buildup laminate.

Flexible printed circuit board and circuit-board connection structure

A terminal portion configured to obtain electrical connection with a printed circuit board includes a first signal pad that is formed in a first conductor layer and is electrically separated from a ground layer, a pair of first ground pads that is formed in the first conductor layer to sandwich the first signal pad and is connected to the ground layer, a second signal pad that is formed in a second conductor layer and is connected to a signal line, a pair of second ground pads that is formed in the second conductor layer to sandwich the second signal pad and is electrically separated from the signal line, a third signal pad formed in a third conductor layer, and a pair of third ground pads formed in the third conductor layer to sandwich the third signal pad. The second signal pad is wider than the third signal pad.

Method of manufacturing wiring substrate

A method of manufacturing a wiring substrate, includes, forming an etching stop layer and a first wiring layer on a supporting member, forming a first insulating layer on the first wiring layer, forming a via hole reaching the first wiring layer, and forming the wiring layers of an n-layer and the insulating layers of an n-layer, removing the supporting member and the etching stop layer, thereby forming a build-up intermediate body, forming a second insulating layer on the wiring layer of an n-th layer, and forming a third insulating layer on first wiring layer, forming a via hole reaching the wiring layer of the n-th layer, and forming a via hole reaching the first wiring layer, forming a roughened face to the third insulating layer, and forming a second wiring layer connected to the wiring layer, and forming a third wiring layer connected to the first wiring layer.

Wiring board, semiconductor device, and method of manufacturing wiring board

A wiring board includes a first via hole in a first insulating layer to expose a first wiring layer. A first via in the first via hole includes an end surface. A second wiring layer is arranged on the first insulating layer and the end surface of the first via. A second insulating layer covers the second wiring layer. A second via hole in the second insulating layer exposes the second wiring layer. A second via in the second via hole is arranged above the first via through the second wiring layer. The outer surface of the first insulating layer is lower in surface roughness than an inner surface of the first via hole.

Solder column grid array capacitors

A grid array capacitor can be used to physically and electrically couple an integrated circuit (IC) package to a printed circuit board (PCB). The grid array capacitor includes an inner conductor and an inner dielectric coaxially surrounding the inner conductor. A secondary conductor can be located to surround, in a coaxial orientation, the inner dielectric. Both the inner conductor and the secondary conductor can be electrically connected to the IC package and to the PCB. In certain applications, the structure of the inner conductor, inner dielectric, and secondary conductor can provide capacitance used to decouple electronic circuits.

Multistage capacitive crosstalk compensation arrangement

Methods and systems for providing crosstalk compensation in a jack are disclosed. According to one method, the crosstalk compensation is adapted to compensate for undesired crosstalk generated at a capacitive coupling located at a plug inserted within the jack. The method includes positioning a first capacitive coupling a first time delay away from the capacitive coupling of the plug, the first capacitive coupling having a greater magnitude and an opposite polarity as compared to the capacitive coupling of the plug. The method also includes positioning a second capacitive coupling at a second time delay from the first capacitive coupling, the second time delay corresponding to an average time delay that optimizes near end crosstalk. The second capacitive coupling has generally the same overall magnitude but an opposite polarity as compared to the first capacitive coupling, and includes two capacitive elements spaced at different time delays from the first capacitive coupling.

Circuit board and method of manufacturing the same

A circuit board includes a substrate and a through via. The substrate has a first surface and a second surface opposite to the first surface. The substrate includes circuit layers and insulation layers. The insulation layers are sandwiched between the circuit layers. The through via goes through the substrate and has portions defining a first portion and a second portion. The first portion of the through via is coated with a first metal layer and electrically connected to at least one of the circuit layer by the first metal layer. The second portion of the through via is coated with a second metal layer and electrically connected to at least one of the circuit layer by the second metal layer. The first and second portions are electrically insulted, and the diameter of the second portion is larger than that of the first portion.

Method for Producing a Printed Circuit Board with MultiLayer Sub-Areas in Sections

A method for producing a printed circuit board () with multilayer subareas in sections, characterized by the following steps: a) providing at least one conducting foil (′) and application of a dielectric insulating foil (′) to at least one subarea of the conducting foil; b) applying a structure of conducting paths (′) to the insulating layer (′); c) providing one further printed circuit board structure; d) joining of the further printed circuit board structure with the conducting foil (′) plus insulating layer (′) and conducting paths (′) by interposing a prepreg layer (′), and e) laminating the parts joined in step d) under pressing pressure and heat; and a printed circuit board produced according to this method. 1. A method for producing a printed circuit board with multilayer subareas in sections , characterized by:a) providing at least one conducting foil and application of a dielectric insulating foil to at least one subarea of the conducting foil;b) applying a structure of conducting paths to the insulating layer;c) providing one further printed circuit board structure;d) joining of the further printed circuit board structure with the conducting foil plus insulating layer and conducting paths by interposing a prepreg layer, ande) laminating the parts joined in step d) under pressing force and heat.2. A method according to claim 1 , characterized by:a′) providing a first conducting foil and applying a dielectric insulating layer to at least one subarea of the first conducting foil;b′) applying a structure of conducting paths to the insulating layer of the at least one subarea;c′) providing a second conducting foil;d′) providing a prepreg layer and joining of the at least one subassembly as produced in steps a′) and b′) and the at least the second conducting foil, wherein the third prepreg layer is provided between the conducting foils, and the conducting foils are disposed on the outside;e′) laminating the structure assembled in step d′) under pressing force ...

PRINTED CIRCUIT BOARD

A printed circuit board includes a first semiconductor package on a first surface layer of a printed wiring board and a second semiconductor package on a second surface layer where a bus signal is transmitted from the first to the second semiconductor package. A first bus wiring path from a signal terminal on an inner circumference side of the first semiconductor package via a via hole and the second surface layer to a signal terminal on an outer circumference side of the second semiconductor package and a second bus wiring path from a signal terminal on an outer circumference side of the first semiconductor package via the second surface layer and a via hole to a signal terminal on an inner circumference side of the second semiconductor package are provided, thus securing a return current path for a signal current and realizing a high density wiring while suppressing radiation noise. 1. A printed circuit board comprising:a first semiconductor package including a first signal terminal group and a second signal terminal group arranged on an outer circumference side with respect to the first signal terminal group;a second semiconductor package including a third signal terminal group and a fourth signal terminal group arranged on an inner circumference side with respect to the third signal terminal group and transmitting a bus signal with the first semiconductor package; anda printed wiring board in which the first semiconductor package is mounted on a first surface layer, the second semiconductor package is mounted on a second surface layer, and a first signal layer and a second signal layer are arranged on an inner layer which is different from the first surface layer and the second surface layer,wherein the first signal layer is provided to be closer to the second surface layer than the second signal layer,wherein a first bus wiring formed on the first signal layer is connected to the first signal terminal group provided in the first semiconductor package and the ...

INTERCONNECT STRUCTURE

An interconnect structure includes a substrate, a dielectric block, and a conductor. The dielectric block is in the substrate. A dielectric constant of the dielectric block is smaller than a dielectric constant of the substrate, and the dielectric block and the substrate have substantially the same thickness. The conductor includes a first portion extending from a top surface to a bottom surface of the dielectric block and a second portion extending along and contacting the top surface of the dielectric block. 1. An interconnect structure , comprising:a substrate;a dielectric block in the substrate, wherein a dielectric constant of the dielectric block is smaller than a dielectric constant of the substrate, and the dielectric block and the substrate have substantially the same thickness; anda conductor comprising a first portion extending from a top surface to a bottom surface of the dielectric block and a second portion extending along and contacting the top surface of the dielectric block.2. The interconnect structure of claim 1 , wherein the conductor further comprises a third portion extending along and contacting the bottom surface of the dielectric block.3. The interconnect structure of claim 2 , wherein the third portion of the conductor is spaced apart from the substrate.4. The interconnect structure of claim 1 , further comprising a plug laterally surrounded by the conductor.5. The interconnect structure of claim 4 , wherein the plug is electrically conductive.6. The interconnect structure of claim 4 , wherein the plug is electrically non-conductive.7. The interconnect structure of claim 1 , wherein the dielectric block contacts the substrate.8. An interconnect structure claim 1 , comprising:a substrate;a dielectric block in the substrate;a shielding element laterally surrounding the dielectric block; anda conductor extending from a top surface to a bottom surface of the dielectric block, wherein the shielding element and the conductor have substantially ...

POWER SUPPLIES INCLUDING SHIELDED MULTILAYER POWER TRANSMISSION BOARDS

A power supply comprises a main circuit board and a multilayer power transmission board electrically coupled to the main circuit board. The multilayer board includes a conductive neutral layer having an inner side, a conductive line layer having an inner side facing the inner side of the conductive neutral layer, and a dielectric medium positioned between the conductive neutral layer and the conductive line layer. The power supply also comprises a first conductive outer layer positioned adjacently to an outer side of the conductive neutral layer, a second conductive outer layer positioned adjacently to an outer side of the conductive line layer, and a conductive plating material positioned within a slot formed in the multilayer power transmission board and covering an interior portion of the multilayer power transmission board facing the slot. The conductive plating material electrically couples the first and second conductive outer layers. 1. A power supply comprising:a main circuit board; and a conductive neutral layer having an inner side;', 'a conductive line layer having an inner side facing the inner side of the conductive neutral layer;', 'a dielectric medium positioned between the conductive neutral layer and the conductive line layer;', 'a first conductive outer layer positioned adjacently to an outer side of the conductive neutral layer;', 'a second conductive outer layer positioned adjacently to an outer side of the conductive line layer;', 'a conductive plating material positioned within a slot formed in the multilayer power transmission board and covering an interior portion of the multilayer power transmission board facing the slot; and', 'wherein the conductive plating material electrically couples the first and second conductive outer layers., 'a multilayer power transmission board electrically coupled to the main circuit board, the multilayer board including2. The power supply of claim 1 , wherein the multilayer power transmission board extends in a ...

Circuit board

A circuit board includes a baseboard, a first conductive circuit layer, a second conductive circuit layer, at least one through hole, and a number of conductive lines. The first conductive circuit layer includes a number of first conductive circuit lines formed on a first side of the baseboard. The second conductive circuit layer includes a number of second conductive circuit lines formed on a second side of the baseboard. The through hole is defined through the first conductive circuit layer, the baseboard, and the second conductive circuit layer. The number of conductive lines are formed in an inner wall of the through hole and spaced apart around the through hole. Each conductive line electrically couples one of the first conductive circuit lines to a corresponding one of the second conductive circuit lines.

Wiring substrate and semiconductor package

A wiring substrate includes an insulating layer that is an outermost layer of the wiring substrate and includes an external exposed surface, a pad forming part formed on a side of the external exposed surface, and a pad that projects from the external exposed surface. The pad forming part includes a recess part recessed from the external exposed surface, and a weir part that projects from the external exposed surface and encompasses the recess part from a plan view. The pad includes a pad body formed within the recess part and the weir part, and an eave part formed on the weir part. The pad body includes an end part that projects to the weir part. The eave part projects in a horizontal direction from the end part of the pad body. The end part of the pad body includes a flat surface.

PRINTED CIRCUIT BOARD HAVING EMI SHIELDING FUNCTION, METHOD FOR MANUFACTURING THE SAME, AND FLAT CABLE USING THE SAME

The present disclosure relates a printed circuit board having an EMI shielding function. In an example embodiment, the printed circuit board includes a substrate, a signal unit disposed on the substrate, a ground unit disposed in parallel with the signal unit, an insulation layer disposed above the substrate and covering the signal unit and the ground unit, an EMI shielding layer disposed on the insulation layer and under the substrate, respectively, and a shielding bridge passing through the substrate and the insulation layer at opposite sides of the signal unit and electrically connecting the EMI shielding layer disposed on the insulation layer to the EMI shielding layer disposed under the substrate. 1. A printed circuit board having an EMI shielding function , the printed circuit board comprising:a substrate;a signal unit disposed on the substrate;a ground unit disposed in parallel with the signal unit;an insulation layer disposed on the substrate and covering the signal unit and the ground unit;an EMI shielding layer disposed above the insulation layer and under the substrate, respectively; anda shielding bridge passing through the substrate and the insulation layer at opposite sides of the signal unit and electrically connecting the EMI shielding layer disposed on the insulation layer to the EMI shielding layer disposed under the substrate.2. The printed circuit board according to claim 1 , further comprising a ground bridge electrically connecting the EMI shielding layer and the ground unit to each other.3. The printed circuit board according to claim 2 , wherein the ground bridge is formed at at least one of the insulation layer and the substrate.4. The printed circuit board according to claim 2 , wherein the ground bridge is formed at connectors provided at opposite ends of the printed circuit board and connected to the signal unit and the ground unit claim 2 , respectively.5. The printed circuit board according to claim 2 , wherein the ground bridge is ...

TOUCH PANEL

A conductive component includes: a first electrode pattern which is made of metal thin wires, the first electrode pattern including a plurality of first conductive patterns that extend in a first direction. Each first conductive pattern includes, at least, inside thereof, a sub-nonconduction pattern that is electrically separated from the first conductive pattern. An area A of each first conductive pattern and an area B of each sub-nonconduction patterns satisfy a relation of 5% Подробнее