Noise-reduction-based automatic layout method for positions of TSVs in 3D integrated circuit

26-03-2014 дата публикации
Номер:
CN103678770A
Принадлежит: BEIJING UNIVERSITY OF TECHNOLOGY
Контакты:
Номер заявки: 56-10-20132603
Дата заявки: 13-11-2013



[1]

The invention relates to a noise-reduction-based automatic layout method for the positions of TSVs in a 3D integrated circuit. An input unit, a moving unit, an adjusting unit, a storage unit, a judging unit and a bouncing-off unit are adopted in the method, wherein the input unit is used for establishing a rectangular coordinate system of the 3D integrated circuit and initially determining the coordinates where the TSVs are located, the moving unit is used for moving signal TSVs to integer coordinate points, the adjusting unit is used for adjusting the positions of surplus TSVs, the storage unit is used for finding TSV pairs with the intervals equal to the scale standard through a circle drawing method, the judging unit is used for judging whether optimizing needs to be conducted, and the bouncing-off unit is used for bouncing off the TSV pairs with the intervals equal to the scale standard. According to the noise-reduction-based automatic layout method for the positions of the TSVs in the 3D integrated circuit, an original circuit structure is not damaged, simple relayout is conducted on the TSV layout on which initial layout is conducted, the positions of the TSVs in the 3D integrated circuit layout are standardized, the length of an interconnecting line is reduced, the intervals of the TSVs are reasonably increased, the aim of capacitive noise reduction is achieved, and automatic layout of the TSVs is optimized.

[1]



1. Based on noise reduction purposes a 3D in the integrated circuit layout method for automatic position TSV, characterized in that in the invention the 3D integrated circuit is a three-dimensional chip structure, including the whole chip TSV (1), calibration standard (2), the top layer chip (5), the bottom layer chip (6), the standard unit (7), the metal line each other (8), the substrate (9), coordinate points (10); the invention including six unit, are the input unit, the mobile unit, adjusting unit, memory unit, judging unit, spring unit, the six unit to form the overall chip, 3D chip in each layer are both 2D chip, and the TSV (1) are connected in the vertical direction, the main by the top chip (5) and a bottom layer chip (6) of two parts; the standard unit (7) in the integrated circuit is an essential component of the signal interconnection, standard unit (7) by the interconnection of the metal line each other (8) complete the; top chip (5) and a bottom layer chip (6) through the TSV is connected with (1), this kind of TSV (1) pass through the two layers of adjacent chip silicon via hole; layout method of this invention through the establishment of a right-angled coordinate system (3), coordinate system (3) is the scale of the unit length of the standard (2), the dashed line to the coordinate marking (11), and by the sitting landmarker intersection of a coordinate point of (10), the TSV (1) mobile to the nearest integer coordinate point (10), there may be found on the TSV capacitive noise of the end of the optimization process is complete TSV (1) layout process;

Input unit includes TSV (1) and the coordinate system (3), for determining the TSV (1) position, step to establish the 1st 3D integrated circuit right-angled coordinate system (3), each initially determined TSV (1) the coordinate; cross, along the shaft are respectively longitudinal horizontal domain, generating the vertical direction; the establishment of calibration standard (2), and standard with scales (2) shareout cross axis of ordinates, the integer coordinate point (10) is expressed as (nR, nR), preliminary calculate each TSV (1) coordinate; the scale of the coordinate axes on the basis of standard (2) is calculated for each TSV (1) the position of the distance of the transverse the longitudinal distance, is determined for each TSV (1) coordinate;

TSV mobile unit includes (1), calibration standard (2) coordinate system and (3), it is used for the TSV1 mobile to integer coordinates, preliminary to TSV in the domain (1) layout; mobile TSV 2nd step (1) to the integer coordinate points (10); the TSV (1) the coordinates of where the horizontal ordinate-rounding, determine a from its recent integer coordinate point (10), is moved to the coordinate points (10) position, the TSV (1) to the coordinates of the coordinate with it (10) distance coordinate recent (10) of the coordinate;

Adjustment unit comprises TSV (1), calibration standard (2), coordinate system (3), coordinate points (10), sitting landmarker (11), with the position of the TSV for adjusting (1) the position of the; all the TSV 3rd step (1) is moved to the most recent coordinates (10) will exist after the plurality of TSV (1) is moved to the same coordinate point (10) the problem of; adjustment of layout in this situation, a first TSV (1) is larger than "the 1 [...] close to the point of coordinate of one week (10) is numbered clockwise; then the redundant TSV (1) move to adjacent already been numbered coordinate points (10) is, if the point there are already other TSV (1) time, then the skip the point, the TSV (1) clockwise moving to the next coordinate points (10); if the primitive TSV (1) close to the position of the already been numbered one week the whole is taken up, on the periphery of the fiducial marks a week (10) according to the above-mentioned way processing; finally the process is repeated, until each coordinate point (10) on the TSV (1) number to" the 1 [...] , after adjustment is completed of the layout;

Storage unit comprises a TSV (1), calibration standard (2), coordinate system (3), using the same find method of drawn circle is equal to the distance between the scale standard TSV and stored; judging unit comprises a TSV (1), calibration standard (2), coordinate system (3), which is used for judging whether to spring open processing; 4th step of using the geometric method to find the interval scale standard TSV is equal to (1) the; when the layout coordinate system (3) in, each TSV in order to sequentially (1) an integer coordinate point of (10) as the center, and in order to scale the standard (2) as the radius makes the circle , coordinate system (3) on the circumference in the TSV (1) the capacitive noise may be produced, on the circumference of the of each TSV (1) record number;

5th step, if the coordinate system (3) on all the circumference of the no TSV (1) exist, the the TSV (1) layout does not needs to be optimized, finishing process directly terminated; and when in the domain exists on any one of the circumference of the TSV (1) time, 6th step to continue the implementation;

TSV spring unit includes (1), calibration standard (2), coordinate system (3), the moving direction (4), coordinates (10), sitting landmarker (11), this unit is used for reducing the distance the TSV (1) the capacitive noise between; 6th step is equal to the distance scale standard one by one (2) of the TSV (1) the spring processing; the on the circumference of each of the TSV (1) that the number of the TSV found in (1) the greatest number of circumferential, on the circumference in the TSV (1) there may be a risk of noise of the TSV (1) to, in order to reduce the influence of a noise, to the treatment of the spring a certain distance; on the circumference of the TSV (1) close to the periphery of the spacer (1) with a standard (2) of the coordinate points (11) are sequentially numbered clockwise, then all the TSV on the circumference (1) moving the round an external distance circumferential a calibration standard (2) idle closer to the coordinate point of (10), if the round outer close to the coordinate point (11) is taken up, will the TSV (1) moves to the distance between two scale circumference of the standard (2) idle point in a secondary outer layer.

2. Based on noise reduction purposes a 3D in the integrated circuit layout method for automatic position TSV according to Claim 1, characterized in that if there is a plurality of circumference has the most number of TSV is the same as (1) the number of, the circumference of one of the optional spring processing; 4th cycle implementation, five, six-step, until all are not on the circumference of the TSV (1) exist, jump out of the circulation, the entire optimization process is completed.

3. Based on noise reduction purposes a 3D in the integrated circuit layout method for automatic position TSV according to Claim 1, characterized in that wherein the mobile a certain distance exists from the layout to TSV found in (1) the circumference of the the maximum number, of the round on the TSV (1) move one by one the round an external distance a calibration standard approaching idle fiducial mark.

4. Based on noise reduction purposes a 3D in the integrated circuit layout method for automatic position TSV according to Claim 1, characterized in that wherein the manner of the layout that is, after moving the TSV for reducing noise (1) after the layout optimization of the layout.

5. Based on noise reduction purposes a 3D in the integrated circuit layout method for automatic position TSV according to Claim 1, characterized in that the stated TSV (1) finger 3D-IC different in the same network the drive bevel gear for inter-layer interconnection silicon perforated.

6. Based on noise reduction purposes a 3D in the integrated circuit layout method for automatic position TSV according to Claim 1, characterized in that wherein the noise is through the establishment of a certain TSV (1) the interval in the interconnect line lowering of the capacitance of the capacitive the influence of the noise.