VERFAHREN ZUM HERSTELLEN EINES WELLENLEITER-STRAHLUMSETZERS

HERSTELLUNG EINER SILICON WELLENLEITERSTRUKTUR

OPTISCHES SILIZIUMBAUELEMENT

Integrated optical components on a silicon-on-insulator chip

A method of fabricating an integrated optical component on a silicon-on-insulator chip comprising a silicon layer 1 separated from a substrate 2 by an insulating layer 3. The component has a first set of features, eg a rib waveguide 5 at a first level in the silicon layer 1 adjacent the insulating layer 3 and a second set of features, eg a triangular section 6B at a second lever in the silicon layer 1 further from the insulating layer 3. The method involves selecting a silicon-on-insulator chip having a silicon layer of sufficient thickness for the first set of features, then fabricating the first set of features in the silicon layer at a first level, increasing the thickness of the silicon layer in selected areas to form a second level of the silicon layer over part of the first level and then fabricating the second set of features at the second level in the silicon layer.

Optical waveguide spatial filter

A guided wave spatial filter (300) for receiving input radiation and outputting corresponding filtered output radiation, comprises first and second waveguide sections (30, L3-L5) connected in series, the sections:

Method of fabricating planar optical waveguides in one chamber

Fabricating a planar optical waveguide in a single plasma etching chamber

A method of fabricating a planar optical waveguide in one chamber, comprising the steps of depositing a cladding layer 102 and a core layer 104 on a substrate 100, depositing a etch mask layer 106 on the core layer, and forming a photoresist pattern 108 on the etch mask layer, forming an etch mask pattern (110,Fig 1 B) by etching the etch mask layer according to the photoresist pattem using a first gas (eg a chlorine or fluorine-containing gas) which reacts with the material of the etch mask layer, and removing the first gas, forming an optical waveguide (112,Fig 1C) by etching the core layer 104 according to the etch mask pattern using a second gas (eg an oxygen-containing gas) which reacts with the material of the core layer in the same chamber as the chamber where the above steps were performed, and removing the photoresist pattern 108 and the second gas, removing the etch mask pattern (110, Fig 1C) using the first gas which reacts with the material of the etch mask pattern in the same ...

Waveguide for an optical circuit and method of fabrication thereof

A waveguide for an optical circuit comprises a substrate; a buffer layer formed on the substrate; a doped lower cladding layer formed on the buffer layer; a doped waveguide core formed on the lower cladding layer; and a doped upper cladding layer embedding the waveguide core. The waveguide core includes mobile dopant ions which have diffused into the upper cladding layer and the lower cladding layer to form an ion diffusion region around said waveguide core such that the waveguide core boundary walls are substantially smooth. A waveguide core may be formed which is substantially symmetric about its core axis. Methods of fabricating the waveguide are also described.

Method of manufacturing optical waveguide device using inductively coupled plasma system

Photonic and/or optoelectronic packaging assembly

A photonic and/or optoelectronic packaging assembly P has a photonic and/or optoelectronic device C, such as a photonic and/or optoelectronic chip, an optical interposer OI coupled to the device C on a first side and an optical transmission element L, such as a lens or microlens, on a second side. A deflector M, such as a mirror, and a waveguide W are positioned on the first side, with the waveguide W coupled at one end to the photonic and/or optoelectronic device C and at another end to the deflector M. The deflector M enables optical transmission between the waveguide W and the optical transmission element L through the optical interposer OI. The optical interposer OI is formed from a material allowing optical transmission.

Waveguide for an optical circuit and method of fabrication thereof

Mode converter and method of fabricating thereof

Manufacture of optical components

Optical components such as integrated optical components or components used for coupling or splicing optical fibres frequently have grooves formed in a substrate during one stage of manufacture. These are used either for depositing glass in the grooves to form waveguides or for aligning fibres. By using a laser beam to vaporise the substrate in accurately controlled patterns, such grooves may be formed easily and may be computer controlled for mass production and high speed.

Optoelectronic device and method of manufacturing thereof

An optoelectronic device that comprises a multi-layered optically active stack 110; a silicon nitride input waveguide 102, arranged to guide light into the stack; a silicon nitride output waveguide 103, arranged to guide light out of the stack; and anti-reflective coatings (ARC) 104a and 104b, located between both the input waveguide and the stack and the stack and the output waveguide. A method of forming the optoelectronic device is also disclosed that comprises (a) growing a multi-layered optically active region (OAR) on a silicon-on-insulator layer; (b) patterning and etching the multi-layered OAR so as to provide a multi-layered optically active stack; (c) depositing an ARC around at least a part of the stack; and (d) depositing a silicon nitride input waveguide and output waveguide adjacent to the stack, arranged so as to guide light into and out of the stack respectively. The multi-layered optically active stack may be a multiple quantum well (MQW) waveguide.

Manufacture of surface relief structures

A blazed surface relief structure is etched in a substrate by moving the substrate from a first position P1 to a second position P2. In the first position only a first part of the area to be etched is exposed to an anisotropic etchant 704. In the second position the whole area to be etched is exposed to the etchant so that the first part is exposed for a longer time period and the movement is defined according to the etching profile required. A variable depth etching profile is created upon completion of the etch and removal of the substrate. An etch resistant mask may be used in this process, and the movement may take place along an axis 706 perpendicular to the surface of the etchant. The etch profile may be non-linear. The movement between first and second positions may be continuous or take discrete steps. The steps may be of the same size or varying size. The time between each step may be variable. The movement may be continuous and at a constant speed. The surface relief structure ...

Optoelectronic device

III-V / SILICON OPTOELECTRONIC DEVICE AND METHOD OF MANUFACTURE THEREOF

Optoelectronic device

Optoelectric device and method of manufacturing thereof

PROCEDURE FOR THE PRODUCTION OPTICAL TRANSVERSE ELECTROMAGNETIC WAVE

PROCEDURE FOR THE PRODUCTION OF PHOTO NICHES CRYSTALS

OPTICAL COMPONENT WITH OPTICAL COUPLER FOR SPLITTING UP OR BROUGHT TOGETHER FROM LIGHT AND PROCEDURE TO ITS PRODUCTION

MORE POLYIMIDWELLENLEITER THAN OPTICAL SENSORS.

OPTICAL TRANSVERSE ELECTROMAGNETIC WAVE ELEMENT AND PROCEDURE FOR MANUFACTURING AN OPTICAL TRANSVERSE ELECTROMAGNETIC WAVE ELEMENT.

PLANAR OPTICAL TRANSVERSE ELECTROMAGNETIC WAVE WITH TWO SLOTS

PROCESS FOR FABRICATION OF OPTICAL WAVEGUIDES

Silica-based optical device fabrication

SELF-ALIGNED V-GROOVES AND WAVEGUIDES

Optical switch with moveable holographic optical element

Optical waveguide and method of fabricating the same

PHOTONIC CRYSTAL SENSOR

This invention relates to an optical sensor element comprising a photonic crystal constituted by a membrane of a chosen transparent material, the membrane being provided with a number of defined openings in a chosen pattern, the pattern being adapted to provide resonance at a chosen wavelength or range of wavelengths, wherein said openings are provided with a reactive material acting as a receptor for a chosen type of molecules, e.g. proteins, the presence of which alters the resonance and/or scattering conditions in the sensor element thus altering the amount of light propagating out of the membrane plane.

METHOD OF FABRICATING AN INTEGRATED OPTICAL COMPONENT

A method of fabricating an integrated optical component on a silicon-on- insulator chip comprising a silicon layer (1) separated from a substrate (2) by an insulating layer (3), the component having a first set of features, eg a rib waveguide (5) at a first level in the silicon layer (1) adjacent the insulating layer (3) and a second set of features, eg a triangular section (6B) at a second level in the silicon layer (1) further from the insulating layer (3), the method comprising the steps of: selecting a silicon-on- insulator chip having a silicon layer (1) of sufficient thickness for the first set of features; fabricating the first set of features in the silicon layer (1) at a first level in the silicon layer; increasing the thickness of the silicon layer (1) in selected areas to form a second level of the silicon layer (1) over part of the first level; and then fabricating the second set of features at the second level in the silicon layer (1).

OPTICAL WAVEGUIDE

The invention relates to an optical waveguide, which is part of an integrated optical circuit. The optical waveguide is arranged onto a planar support, and it has a core section conveying light to a certain direction, the direction of propagation. Accord~ing to the invention, the optical waveguide is a modified optical waveguide (60) be~tween a ridge-type optical waveguide (61) and a rectangular optical waveguide (62). In the modified optical waveguide, the core section is made of the one and same ma~terial so that the cross-section of the core section transverse to the direction of propagation of light is two- step (6; 61a, 62a; 61b, 62b) from both edges (60a, 60b). The modified optical waveguide has two layers (601, 602) of different widths (160a, 1660b) so that the height (h60a) of the first layer (601) is equal to the height of the ridge (611) of the ridge-type optical waveguide (61), and the height (h60b) of the second layer (602) is equal to the height of the base part (612) of the ...

OPTICAL WAVEGUIDES WITH TRENCH STRUCTURES

Arrangements using air trench cladding enables minimization of the evanescent tail to suppress light coupling to radiation modes, resulting in low-loss bends and splitters. Structures including sharp dends and T-splitters without transmission loss, crossings without crosstalk, and couplers from/to fibers and without-of-plane waveguides without substantial loss are provided with such air trench claddings. Air trench sidewall cladding of waveguides pushes evanescent tails toward top and bottom claddings to enhance coupling between vertically positioned waveguides. Fabrication processes using wafer bonding technology are also provided.

MAKING GROOVES IN PLANAR SILICA OPTICAL WAVEGUIDES

A method of producing a planar waveguiding device having a core (10) and a cladding (21, 22, 23). The cladding has grooves (11, 12) directly interfacing (15, 16) with the core (10). A layer of core glass (10) is deposited on the surface of a substrate (24). This layer is etched to produce a shaped layer which includes a first core portion (10) having the same configuration as the intended core (10) and an expanded core portion (30) wherein the core glass extends beyond the intended core boundary. A glass covering layer (21) is deposited over the etched core glass and grooves (11, 12) are produced by etching through the covering layer (21) and into said expanded core portion (30). This removes the core glass (30) extending beyond the intended core (10) boundary to produce interfaces (15, 16) between the core (10) and the grooves (11, 12). All of the glasses are silica with additives to adjust the refractive index and/or the melting point.

GYPSUM PANEL HAVING UV-CURED MOISTURE RESISTANT COATING AND METHOD FOR MAKING THE SAME

A fibrous mat faced gypsum panel having on at least one of the facing sheets a moisture resistant, cured coating of a radiation curable, e.g., UV curable, polymer.

LITHIUM NIOBATE WAVEGUIDE STRUCTURES

TRANSMITTER PHOTONIC INTEGRATED CIRCUITS (TXPIC) AND OPTICAL TRANSPORT NETWORKS EMPLOYING TXPICS

... ²²²A photonic integrated circuit (PIC) chip comprising an array of modulated ²sources, each providing a modulated signal output at a channel wavelength ²different from the channel wavelength of other modulated sources and a ²wavelength selective combiner having an input optically coupled to received ²all the signal outputs from the modulated sources and provide a combined ²output signal on an output waveguide from the chip. The modulated sources, ²combiner and output waveguide are all integrated on the same chip.² ...

A SENSOR DEVICE AND A METHOD OF DETECTING A COMPONENT IN GAS

The invention relates to a sensor device (1) comprising a planar substrate (3) defining a substrate plane (4) and a waveguide (2) for guiding an electromagnetic wave. The waveguide (2) extends in a length direction in a waveguide plane (4´) parallel to the substrate plane (4) and has a width (W, w) and a height (h) wherein the width (W, w) to height (h) ratio is more than 5. The height (h) of the waveguide (2) is less than the wavelength of the electromagnetic wave. The waveguide (2) is supported on the substrate (3) by a support structure (5) extending from the substrate (3) to the waveguide (2), along the length direction of the waveguide (2), having a width (Ws) which is smaller than the width (W, w) of the waveguide (2). The invention further relates to a method of detecting a component in gas and a method of fabricating a sensor device (1).

MULTI-SECTION COUPLER TO MITIGATE GUIDE-GUIDE ASYMMETRY

A wavelength independent multi-section optical coupler having at least three optical couplers, and at least two differential phase cells. Each optical coupler has two waveguides forming a coupling region having a net coupling value. The coupling value for each coupling region of the at least three optical couplers is different than the coupling values of the other two coupling regions. Each differential phase cell connects adjacent ones of said optical couplers. Each differential phase cell causes a differential phase shift in light signals traversing between the optical couplers, wherein the differential phase shifts of the differential phase cells, and the coupling value for each coupling region are chosen so as to minimize wavelength, and fabrication sensitivity of said wavelength independent multi-section optical coupler for a designed power splitting ratio.

FLEXIBLE WAVEGUIDES FOR OPTICAL COHERENCE TOMOGRAPHY

A system and method for depth-resolved imaging of a sample are presented. The system for depth-resolved imaging of a sample includes a substrate of substantially flexible material, a plurality of waveguides disposed on the substrate, an optical element disposed at a distal end of the plurality of waveguides, and one or more interferometers. Light is collected from the sample through the optical element and plurality of waveguides on the flexible substrate on its path to the one or more interferometers. The interferometers are configured to combine a reference light with the light received by at least a portion of the plurality of waveguides to resolve contributions from one or more depths of the sample. The system further includes a light guiding element coupled between the plurality of waveguides and the one or more interferometers.

A METHOD OF MAKING AN OPTICAL WAVEGUIDE TO FIBRE CONVECTOR USING A FREE-STANDING, FLEXIBLE WAVEGUIDE SHEET

The invention relates to a pigtailing method, i.e., the invention provides an optical device comprising a substrate on which are integrated a layered optical waveguide component (3) and optical fibre ends (13). The optical fibre ends are positioned in grooves (10). The method involves providing a substrate (7) comprising grooves (10), notably V-shaped grooves, with a separately made optical waveguide component (3). The component (3) is made on a separate flat substrate (1) and released by virtue of a releasable layer (2) present on the flat substrate (1). An advantageous releasable layer is made of a watersoluble salt. The invention also pertains to flexible waveguide sheets (3) such as can be used in the above method or, if provided with waveguide channels (12), as flexible waveguide components themselves.

INTEGRATED OPTICAL CIRCUIT MANUFACTURING PROCESS

L'invention concerne un procédé de fabrication d'un circuit optique intégré comportant au moins un guide d'onde gravé et enterré, de type BRS, couplé à au moins un guide d'onde gravé et non enterré, de type ridge. Ce procédé consiste particulièrement à définir au préalable l'empreinte des deux types de guide, au moyen d'un masque commun, puis à définir les deux types de guide par gravures successives.

Electro-optical conductor plate manufacturing method for e.g. mirror module, involves applying and structuring mantle layer such that mantle layer does not cover non-transparent surface, and removing material from surface to form mark

The method involves forming a non-transparent surface on a substrate (1) e.g. polyimide. An underlayer (2) is applied on the substrate, and the underlayer is structured such that the underlayer does not cover the non-transparent surface. A core layer (4) is applied, where the core layer and the underlayer cover the non-transparent surface. A mantle layer (5) is applied and structured such that the mantle layer does not cover the non-transparent surface. Material is removed from the non-transparent surface within a structured area to form a reference mark (30).

Procedure for the production of an electrooptical printed circuit board with fibre optics structures.

Eine elektro-optische Leiterplatte enthält einerseits elektrische Leiterbahnen und andererseits Lichtwellenleiterstrukturen. Die Lichtwellenleiterstrukturen umfassen eine Unterschicht (2), eine Kernschicht (4) und eine Mantelschicht (5). Auf der Leiterplatte werden sichtbare Flächen (3) aufgebracht und später die Kernschicht (4) sowohl auf die Unterschicht als auch auf die Flächen (3) aufgetragen und sowohl auf der Unterschicht (2) als auch auf den Flächen (3) strukturiert. Anschliessend wird diese Struktur in die Flächen übertragen, beispielsweise durch Ätzen. Auf diese Weise entstehen Referenzmarken (30), die die Information über die tatsächliche Lage der Lichtwellenleiterstrukturen enthalten.

Procedure for the production of an electrooptical printed circuit board with fibre optics structures.

Die Erfindung betrifft ein Verfahren zur Herstellung einer elektro-optischen Leiterplatte, welche einerseits elektrische Leiterbahnen und andererseits Lichtwellenleiterstrukturen enthält. Die Lichtwellenleiterstrukturen umfassen eine Unterschicht (2), eine Kernschicht (4) und eine Mantelschicht (5). Auf der Leiterplatte werden sichtbare Flächen aufgebracht und später die Kernschicht (4) sowohl auf die Unterschicht als auch auf die Flächen aufgetragen und sowohl auf der Unterschicht (2) als auch auf den Flächen strukturiert. Anschliessend wird diese Struktur in die Flächen übertragen, beispielsweise durch Ätzen. Auf diese Weise entstehen Referenzmarken (30), die die Information über die tatsächliche Lage der Lichtwellenleiterstrukturen enthalten.

Fabricating optical fiber preform using MCVD

集成透明衬底及衍射光学组件

... 示出了在衬底上形成的衍射光学组件(DOE)。一个实施例中所述DOE的特征在于：在所述衬底的顶表面每个都单独产生多个元件。所述元件可以通过将多晶硅材料沉积在所述衬底或者通过在所述衬底形成硅晶体并进行蚀刻步骤而形成。可以使用所述DOE反射在所述衬底中以全内反射的方式行进的入射光。可以将形成所述DOE的所述条带的所述宽度、两者之间间隔和所述条带的高度设计得便于在所述衬底中以和所述入射光成锐角的传播方向反射所述入射光。 ...

Transparent optical insert

REFLECTORS OF BRAGG IN SEMICONDUCTOR AND MANUFACTORING PROCESS

PHOTONIC CHIP WITH FOLDING OF OPTICAL PATH AND INTEGRATED COLLIMATING STRUCTURE

OPTICAL DEVICE

OPTICAL COUPLING DEVICE FOR A PHOTONIC CIRCUIT.

Integrated optical circuit production comprises using a common waveguide mask and defining a buried ridge stripe type waveguide and a non-buried ridge type waveguide by successive etching

L'invention concerne un procédé de fabrication d'un circuit optique intégré comportant au moins un guide d'onde gravé et enterré, de type BRS, couplé à au moins un guide d'onde gravé et non enterré, de type ridge. Ce procédé consiste particulièrement à définir au préalable l'empreinte des deux types de guide, au moyen d'un masque commun, puis à définir les deux types de guide par gravures successives.

Guide slot forming method for e.g. intra-optical connections of silicon chip, involves filling trenches with silicon, and carrying out annealing of silicon oxide layer after performing formation, graving or filling steps

L'invention concerne un procédé de réalisation d'un guide à fente, dans lequel : - a) on forme une couche de SiOx (26) non stoechiométrique (x<2) sur une couche d'arrêt de gravure (22), - b) on grave deux tranchées parallèles dans la couche de SiOx, avec arrêt de la gravure sur ladite couche d'arrêt de gravure, ces deux tranchées étant séparées par une paroi (36) en SiOx, - c) on remplit les tranchées ainsi réalisées par du silicium (42, 44), - d) on effectue une étape de recuit du SiOx (26) non stoechiométrique (x<2), après l'une quelconque des étapes précédentes a), b) ou c).

OPTICAL COUPLING DEVICE FOR A PHOTONIC CIRCUIT.

MANUFACTORING PROCESS OF MICROGUIDES OF LIGHT HAS WEAK LOSSES OF OPTICAL PROPAGATION BY DEPOSIT THE MULTI-LAYER ONES

METHOD OF MAKING A WAVEGUIDE

L'invention concerne un procédé de fabrication d'un miroir optique dans une plaque de verre (80), comprenant les étapes successives suivantes : balayer une surface de la plaque (80) par un faisceau laser (84) dirigé de façon oblique par rapport à ladite surface, pour former une tranchée (86) selon le dessin du miroir à former, la durée des impulsions de ce laser étant comprise entre 1 et 500 femtosecondes ; traiter à l'acide fluorhydrique ; et remplir la tranchée (86) d'un métal.

Optical path switching device for high-speed broadband optical communication system, comprises core whose end surfaces are arranged in matrix form at respective end surfaces of cladding

Ce dispositif comprend un revêtement (12) ayant une surface formant miroir (13) et au moins trois noyaux (11) enserrés dans le revêtement et formant des trajets optiques continus, des première et seconde surfaces d'extrémité de noyau (11a, 11b) étant exposées dans des première et seconde surfaces (12a, l2b) d'extrémité du revêtement, chacun des trajets optiques s'étendant de la première surface d'extrémité (lia) jusqu'à la surface formant miroir (13), changeant de direction à ce niveau et s'étendant jusqu'à la seconde surface d'extrémité (11b), les première et seconde surfaces d'extrémité (11a, 11b) étant disposées de façon bidimensionnelle dans les première et seconde surfaces d'extrémité (12a, 12b). Application notamment à des composants optoélectroniques et/ ou des guides d'ondes optiques.

GUIDED LIGHT SOURCE, ITS MANUFACTURING METHOD AND ITS USE FOR THE DELIVERY OF SINGLE PHOTONS

L'invention porte sur une source de lumière guidée (1) qui comprend : - au moins une boîte quantique (2) associée à un guide d'onde discoïde (3) de manière à assurer une propagation cylindrique d'un front d'onde émis par l'au moins une boite quantique dans le guide d'onde discoïde ; - un guide d'onde annulaire (5) entoure le guide d'onde discoïde et qui présente un réseau de couplage (T) formé sur sa périphérie intérieure pour recevoir ledit front d'onde en incidence normale ; - un guide d'onde de sortie (6) optiquement couplé au guide d'onde annulaire, dans lequel est guidé ledit front d'onde. L'invention s'étend au procédé de fabrication d'une telle source, et à son utilisation pour l'émission d'une séquence de photons uniques.

LIGHT GUIDE ARRAY, FABRICATION METHODS AND OPTICAL SYSTEM EMPLOYING SAME

A light guide array (30) for outputting light with improved uniformity and collimation includes a supporting material (35) and a plurality of light guides (32) formed in the supporting material. Each of the light guides (32) has an entrance aperture for receiving light and an exit aperture for outputting light. The light guides (32) can be solid pipes or hollow tunnels passing through the supporting material (35). The supporting material (35) can be a metal, such as Al, Au, Ni, a semiconductor material, such as silicon, poly-silicon, SiC, GaAs, or an optically transparent material. Semiconductor fabrication techniques can be used to build the array. The array can be incorporated into an optical projection system (125) to improve performance. © KIPO & WIPO 2007 ...

Raman scattering light amplification device, method for producing raman scattering light amplification device, and raman laser light source using the raman scattering light amplification device

Guided-mode resonator and the method for manufacturing the same

A PROCESS FOR MANUFACTURING A PHOTONIC CIRCUIT WITH ACTIVE AND PASSIVE STRUCTURES

A process for manufacturing a photonic circuit (400) comprises: manufacturing on a first wafer (101) a first layer stack comprising an underclad oxide layer (102) and a high refractive index waveguide layer (103); - patterning the high refractive index waveguide layer (103') to generate a passive photonic structures; planarizing the first layer stack with a planarizing oxide layer (104) having a thickness below 300 nanometers above the high refractive index waveguide layer (103); annealing the patterned high refractive indemanufacturing on a first wafer (101) a first layer stack comprising an underclad oxide layer (102) and a high refractive index waveguide layer (103); patterning the high refractive index waveguide layer (103') to generate a passive photonic structures; planarizing the first layer stack with a planarizing oxide layer (104) having a thickness below (300) nanometers above the high refractive index waveguide layer (103); annealing the patterned high refractive index waveguide ...

INTEGRATED PHOTONICS INCLUDING WAVEGUIDING MATERIAL

A photonic structure can include in one aspect one or more waveguides formed by patterning of waveguiding material adapted to propagate light energy. Such waveguiding material may include one or more of silicon (single-, poly-, or non-crystalline) and silicon nitride.

WAVEGUIDE ARRANGEMENT

The invention relates to a waveguide arrangement (10) comprising a substrate (20) and at least one strip-shaped waveguide made of a wave-guiding layer material (30). The strip waveguide extends strip-like in a longitudinal direction and can guide waves in its longitudinal direction so that the wave propagation direction corresponds to the longitudinal direction of the strip waveguide. The refractive index of the substrate (20) is greater than the refractive index of the layer material (30). In order to guide waves vertically, the strip waveguide forms a waveguide bridge (60) which is located above a recess (100) in the substrate (20) and which is at least partially spatially separated from the substrate (20) there.

LIGHT GUIDE ARRAY, FABRICATION METHODS AND OPTICAL SYSTEM EMPLOYING SAME

A light guide array (30) for outputting light with improved uniformity and collimation includes a supporting material (35) and a plurality of light guides (32) formed in the supporting material. Each of the light guides (32) has an entrance aperture for receiving light and an exit aperture for outputting light. The light guides (32) can be solid pipes or hollow tunnels passing through the supporting material (35). The supporting material (35) can be a metal, such as Al, Au, Ni, a semiconductor material, such as silicon, poly-silicon, SiC, GaAs, or an optically transparent material. Semiconductor fabrication techniques can be used to build the array. The array can be incorporated into an optical projection system (125) to improve performance.

CHANNEL-SWITCHED TUNABLE LASER FOR DWDM COMMUNICATIONS

Source laser (100) qui comprend des matières (122, 124) à dépendance négative de l'indice de réfraction par rapport à la température et à coïncidence indépendante de la température entre les modes de la cavité, et une série de fréquences spécifiées telles que des voies à multiplexage en longueur d'onde dense dans des applications de télécommunications. La gamme spectrale libre peut être réglée pour être égale à une fraction rationnelle de l'intervalle des fréquences spécifiées. La fréquence de fonctionnement peut être définie par un élément de rétroaction (130, 132) à sélectivité de fréquence qui est accordé de manière thermo-optique par application de chaleur provenant d'un actionneur sans accordage substantiel des modes de la cavité. La fréquence de fonctionnement peut être induite de manière à effectuer des sauts numériques entre les fréquences spécifiées. Dans un mode de réalisation particulier, un amplificateur (110) à semi-conducteur et des segments (122, 124) de guide d'ondes polymère ...

TUNING THE INDEX OF A WAVEGUIDE STRUCTURE

The index of refraction of waveguide structures can be varied by altering carrier concentration. The waveguides (100, 102) preferably comprise semiconductors (106) like silicon that are substantially optically transmissive at certain wavelengths. Variation of the carrier density in these semiconductors may be effectuated by inducing an electric field within the semiconductor. For example, by applying a voltage (114) to electrodes (110) associated with the semiconductor. Variable control of the index of refraction may be used to implement a variety of functionalites including, but not limited to, tunable waveguide gratings and resonant cavities, switchable couplers, modulators, and optical switches.

CONNECTOR-TYPE OPTICAL TRANSCEIVER USING SOI OPTICAL WAVEGUIDE

La présente invention concerne un émetteur-récepteur optique à connecteur comprenant des dispositifs optiques (8,9,10), un guide d'onde optique à silicium sur isolant (SOI) (7), et un banc en silicium (6) dont la surface supérieure est dotée de cavités en forme de U (7a,8a,9a,10a) destinées à recevoir les dispositifs optiques (8,9,10) et le guide d'onde optique SOI (7), et à les aligner afin de constituer des chemins optiques. Le guide d'onde optique SOI (7) est constitué d'un substrat de silicium (71), d'une couche de silicium monocristal (73) dont la surface supérieure comporte des portions de guide d'onde (75), et d'une couche mince de silice (72) interposée entre le substrat de silicium (71) et la couche de silicium monocristal (73) afin d'empêcher la diffusion de rayonnement lumineux passant à travers les portions de guide d'onde. Le banc de silicium (6) comporte, sur sa longueur, des rainures en forme de V (61) qui reçoivent des broches guides (17) conçues afin de guider la connexion ...

DIELECTRIC-IN-DIELECTRIC DAMASCENE PROCESS FOR MANUFACTURING PLANAR WAVEGUIDES

Photonic light circuits including one or more optical waveguides and one or more waveguide features and methods for manufacturing photonic light circuits including one or more optical waveguides. One aspect of this invention includes methods for manufacturing planar waveguide based devices including the steps of removing a portion of an exposed surface of a substrate (10) to form a first cavity (12), depositing a layer (14) of first optical material on the exposed substrate surface in an amount sufficient to fill the first cavity (12) with the first optical material and to cover at least a portion of the exposed substrate surface; and removing at least a portion of the first optical material layer to form at least one planar waveguide. In another aspect, this invention is a method for manufacturing a planar waveguide including at least one feature by the further steps including removing at least a portion of the first optical material (14) located in the first cavity to form a second cavity ...

COINTEGRATION OF OPTICAL WAVEGUIDES, MICROFLUIDICS, AND ELECTRONICS ON SAPPHIRE SUBSTRATES

A method of forming a semiconductor structure includes forming a first optical waveguide and a second optical waveguide on a sapphire substrate. The first optical waveguide and the second optical waveguide each include a core portion of gallium nitride (GaN), and a cladding layer laterally surrounding the core portion. The cladding layer includes a material having a refractive index less than a refractive index of the sapphire substrate. The method further includes etching a portion of the cladding layer to form a microfluidic channel therein and forming a capping layer on a top surface of the first optical waveguide, the second optical waveguide and the microfluidic channel.

Optical device and manufacturing method thereof

An optical device for receiving a light and changing a transmission direction of the received light is disclosed. The optical device includes a substrate having a surface with which the received light is transmitted in parallel; a layer formed on the surface of the substrate; and a reflecting face formed in the layer, the reflecting face being inclined and reflecting the received light to change the transmission direction of the received light.

Etching process for micromachining crystalline materials and devices fabricated thereby

The present invention provides an optical microbench having intersecting structures etched into a substrate. In particular, microbenches in accordance with the present invention include structures having a planar surfaces formed along selected crystallographic planes of a single crystal substrate. Two of the structures provided are an etch-stop pit and an anisotropically etched feature disposed adjacent the etch-stop pit. At the point of intersection between the etch-stop pit and the anisotropically etched feature the orientation of the crystallographic planes is maintained. The present invention also provides a method for micromachining a substrate to form an optical microbench. The method comprises the steps of forming an etch-stop pit and forming an anisotropically etched feature adjacent the etch-stop pit. The method may also comprise coating the surfaces of the etch-stop pit with an etch-stop layer.

Waveguide etch method for multi-layer optical devices

An optical device and a method of manufacturing an optical device, including a ridge waveguide second, and a strip-loaded ridge waveguide section, comprises applying two different protective layers and two separate etches at two different depths. The protective layers overlap to protect the same section of the optical device, and to limit the surfaces of optical device to exposure to multiple etches, except at edges where the protective layers overlap.

Waveguide mode expander having an amorphous-silicon shoulder

A waveguide mode expander couples a smaller optical mode in a semiconductor waveguide to a larger optical mode in an optical fiber. The waveguide mode expander comprises a shoulder and a ridge. In some embodiments, the ridge of the waveguide mode expander has a plurality of stages, the plurality of stages having different widths at a given cross section.

Efficient Thermo-Optic Phase Shifters Using Multi-Pass Heaters

Techniques for increasing efficiency of thermo-optic phase shifters using multi-pass heaters and thermal bridges are provided. In one aspect, a thermo-optic phase shifter device includes: a plurality of optical waveguides formed in an SOI layer over a buried insulator; at least one heating element adjacent to the optical waveguides; and thermal bridges connecting at least one of the optical waveguides directly to the heating element. A method for forming a thermo-optic phase shifter device is also provided.

Integrated structure and manufacturing method thereof

A method for fabricating an integrated structure, using a fabrication system having a CMOS line and a photonics line, includes the steps of: in the photonics line, fabricating a first photonics component in a silicon wafer; transferring the wafer from the photonics line to the CMOS line; and in the CMOS line, fabricating a CMOS component in the silicon wafer. Additionally, a monolithic integrated structure includes a silicon wafer with a waveguide and a CMOS component formed therein, wherein the waveguide structure includes a ridge extending away from the upper surface of the silicon wafer. A monolithic integrated structure is also provided which has a photonics component and a CMOS component formed therein, the photonics component including a waveguide having a width of 0.5 μm to 13 μm.

Planar layer with optical path

A channel is created within a planar layer. At least a portion of an optical path is formed within the channel. An optical core medium may be deposited into the channel. In various embodiments, reflective layers are deposited within and over the channel to form the optical path. In another embodiment, a photosensitive sheet is exposed to an optical path mask in the presence of an optical source to define an optical path lying within the plane of the sheet.

Method of manufacturing microstructure pattern of molecular material high orientation aggregate with the aid of difference of growth rate by substrate material

The present invention aims to provide a method of manufacturing a microstructure pattern of a high orientation aggregate of organic molecular material by forming a fine pattern made by single crystal growing ionic material of another property on an ionic substrate by lithography and epitaxial growth, and forming a pattern made by organic molecular material having functionability to light on the fine pattern by utilizing dependence of substrate material of crystal growth rate in epitaxial growth, and is applied to the formation of a microstructure pattern of organic molecular material which can be utilized for optical waveguide, optical integrated circuit, non-linear optical element and laser resonator.

Silicon etching process using polymeric mask, for example, to form V-groove for an optical fiber coupling

A process for etching a silicon substrate to form a feature such as a V-groove, utilizes a coating formed of an alkaline resistance polymer. A preferred polymer is poly(benzocyclobutene) resin. The coating is applied to the substrate and removed form a selected region whereupon the underlying silicon is etched with an alkaline solution. In one aspect, an optical fiber is inserted in the etched groove and coupled to an optical waveguide embedded within the coating.

Procedure for fabrication of microstructures over large areas using physical replication

The present invention is an improved replication process which copies a master pattern onto an intermediate transfer mask which is then used to form a lithographic mask on the surface of a substrate. A pattern derived from the original master pattern is then produced in the substrate by an etching process.

Integrated waveguide having an internal optical grating

A method for forming an optical grating within a waveguide integrated on a substrate includes the step of depositing on a substrate successive layers of material constituting a waveguide such that the waveguide has a periodically varying width along a portion of its longitudinal axis. The deposition may be accomplished by depositing by selective area epitaxy at least some of the successive layers through a mask having a periodically varying width along at least one edge. The successive layers deposited through the mask may constitute a plurality of quantum well layers separated from each other by barrier layers which collectively form a multiple quantum well stack.

Method for separating silica waveguides

A method is provided for separating silica waveguides made in multiple units on a wafer at the end of fabrication. Streets are formed between adjacent waveguides by etching the IC material to a substrate. The substrate is then sawed along the streets.

OPTICAL DEVICE WITH AN OPTICAL COUPLER FOR EFFECTING LIGHT BRANCHING/COMBINING AND A METHOD FOR PRODUCING THE SAME

Fabrication of stacked photonic lightwave circuits

We propose a technique for fabricating stacked photonic lightwave circuits (PLCs), with both high and low refractive index steps, comprising the use of etched PECVD dielectric layers for the light guiding structures and which are surrounded and separated by an interlayer PLC cladding (IPC) comprising a non-conformal layer of sol-gel, whose composition, refractive index and thickness can be tailored to the requirements of the device.

Method for fabricating a hybrid optical integrated circuit employing SOI optical waveguide

The present invention relates to an optical integrated circuit; and, more particularly, to a method for preparing an improved hybrid optical integrated circuit which is capable of accommodating optical waveguides, optical devices, such as light emitting devices and light receiving devices, and optical fibers in an effective manner. The present invention has the advantages of minimizing horizontal misalignment error between the SOI waveguide rib area, the V-groove etch window and the alignment marks, decreasing the manufacturing cost by passively aligning the waveguides, the optical devices and the optical fibers on a single substrate. Also, the present invention has an effect of reducing fresnel reflection loss by providing the LPCVD silicon nitride layer capable of being used as an anti-reflection coating layer at both ends of the waveguide.

POLYIMIDE WAVEGUIDES AS OPTICAL SENSORS

The invention relates to a polyimide waveguide which is used as an optical sensor for the quantitative determination of liquids in the vapor phase, as well as for the determination of NH3, "NH4OH", NO2 and N2O5. The polyimide waveguide is composed of a cover layer, one or two layers of a polyamide-imide or a perfluorinated polyimide and a substrate.

LIGHT GUIDES HAVING ENHANCED LIGHT EXTRACTION

Lightguides, devices incorporating lightguides, processes for making lightguides, and tools used to make lightguides are described. A lightguide includes light extractors arranged in a plurality of regions on a surface of the lightguide. The orientation of light extractors in each region is arranged to enhance uniformity and brightness across a surface of the lightguide and to provide enhanced defect hiding. The efficiency of the light extractors is controlled by the angle of a given light extractor face with respect to a light source illuminating the light guide.

Enabling Thermal Efficiency on a Silicon-On-Insulator (SOI) Platform

A method for fabricating a photonic integrated circuit (PIC) comprises providing a silicon-on-insulator (SOI) wafer comprising an insulator layer disposed between a base semiconductor layer and a SOI layer, wherein the SOI layer comprises a waveguide, providing at least one slot within the SOI layer, wherein the at least one slot is positioned on the same or opposite sides of the waveguide, and wherein the at least one slot is positioned at a predetermined distance away from the waveguide, and removing a portion of the insulator layer to form an etched-out portion of the insulator layer, wherein the etched-out portion is positioned directly beneath the waveguide, and wherein a width of the etched-out portion is at least the width of the waveguide ...

SEMI-FINISHED PRODUCT, METHOD FOR THE PRODUCTION THEREOF AND COMPONENT PRODUCED THEREWITH

A semi-finished product having a substrate with a first side and an opposite second side is provided, wherein at least one diamond layer is arranged on the first side, wherein the diamond layer comprises monocrystalline diamond and the substrate comprises a material different from the diamond layer. A method for producing such a semi-finished product is provided and an integrated optical component may be produced from the semi-finished product.

Method of fabricating a patterned device using sacrificial spacer layer

A method of creating a patterned device by selecting a substrate; depositing a mask layer on the substrate; forming a first step on the mask layer; depositing a sacrificial layer along the first step and the mask layer; depositing a blocking layer on the sacrificial layer; removing a portion of the blocking layer, where a portion of the blocking layer remains such that no gap exists between the blocking layer and the sacrificial layer and the remaining blocking layer is adhered to the mask layer; removing a portion of the sacrificial layer such that a gap is created between the blocking layer and the first step, where a portion of the sacrificial layer remains such that the blocking layer adhered to the mask layer remains; etching the mask layer beneath the gap; and processing the substrate through the gap in the mask layer.

Complementary metal oxide semiconductor device with III-V optical interconnect having III-V epitaxial semiconductor material formed using lateral overgrowth

An electrical device that includes a first semiconductor device positioned on a first portion of a substrate and a second semiconductor device positioned on a third portion of the substrate, wherein the first and third portions of the substrate are separated by a second portion of the substrate. An interlevel dielectric layer is present on the first, second and third portions of the substrate. The interlevel dielectric layer is present over the first and second semiconductor devices. An optical interconnect is positioned over the second portion of the semiconductor substrate. At least one material layer of the optical interconnect includes an epitaxial material that is in direct contact with a seed surface within the second portion of the substrate through a via extending through the least one interlevel dielectric layer.

Electro-optically active device

A silicon based electro-optically active device and method of producing the same, the device comprising: a silicon-on-insulator (SOI) waveguide; an electro-optically active stack within a cavity of the SOI waveguide; and a channel between the electro-optically active stack and the SOI waveguide; wherein the channel is filled with a filling material with a refractive index greater than that of a material forming a sidewall of the cavity to form a bridge-waveguide in the channel between the SOI waveguide and the electro-optically active stack.

Method and apparatus for providing an antireflection coating on the output facet of a photonic integrated circuit (PIC) chip

An on-chip photodiode is provided in a photonic integrated circuit (PIC) on a semiconductor chip to monitor or check for antireflection qualities of an AR coating applied to the front facet of the semiconductor chip.

Photonic integrated device with dielectric structure

A photonic integrated device (PID) for generating single and multiple wavelength optical signals is provided. The PID includes first and second reflective structures having first and second predetermined reflectivities, respectively. A common waveguide is optically coupled to the first reflective structure, and at least one semiconductor waveguide is optically coupled to the second reflective structure. The PID further includes at least one active gain region that is disposed between the first and second reflective structures. In various embodiments, the PID includes at least one of a dielectric waveguide based wavelength dependent element and a dielectric Bragg stack.

Process flow for fabricating integrated photonics optical gyroscopes

Aspects of the present disclosure are directed to configurations of compact ultra-low loss integrated photonics-based waveguides for optical gyroscope applications, and the methods of fabricating those waveguides for ease of large scale manufacturing. Four main process flows are described: (1) process flow based on a repeated sequence of oxide deposition and anneal; (2) chemical-mechanical polishing (CMP)-based process flow followed by wafer bonding; (3) Damascene process flow followed by oxide deposition and anneal, or wafer bonding; and (4) CMP-based process flows followed by oxide deposition. Any combination of these process flows may be adopted to meet the end goal of fabricating optical gyroscope waveguides in one or more layers on a silicon substrate using standard silicon fabrication technologies.

Semiconductor structure and manufacturing method of the same

A semiconductor structure is disclosed. The semiconductor structure includes: a substrate and a gate element over the substrate. The gate element includes: a gate dielectric layer over the substrate; a gate electrode over the gate dielectric layer; and a waveguide passing through the gate electrode from a top surface of the gate electrode to a bottom surface of the gate electrode. A manufacturing method of the same is also disclosed.

TEMPERATURE CONTROL OF COMPONENTS ON AN OPTICAL DEVICE

A method of forming an optical device includes using a photomask to form a first mask on a device precursor. The method also includes using the photomask to form a second mask on the device precursor. The second mask is formed after the first mask. In some instances, the optical device includes a waveguide positioned on a base. The waveguide is configured to guide a light signal through a ridge. A heater is positioned on the ridge such that the ridge is between the heater and the base.

Semiconductor device and manufacturing method of the same

A rectangular optical waveguide, an optical phase shifter and an optical modulator each formed of a semiconductor layer are formed on an insulating film constituting an SOI wafer, and then a rear insulating film formed on a rear surface of the SOI wafer is removed. Moreover, a plurality of trenches each having a first depth from an upper surface of the insulating film are formed at a position not overlapping with the rectangular optical waveguide, the optical phase shifter and the optical modulator when seen in a plan view in the insulating film. As a result, since an electric charge can be easily released from the SOI wafer even when the SOI wafer is later mounted on the electrostatic chuck included in the semiconductor manufacturing apparatus, the electric charge is less likely to be accumulated on the rear surface of the SOI wafer.

Photodetector structure and method of manufacturing the same

A method of manufacturing a photodetector structure is provided. The method includes forming a structural layer by making a trench in a bulk silicon substrate and filling the trench with a cladding material, forming a single-crystallized silicon layer on the structural layer, and forming a germanium layer on the single-crystallized silicon layer.

Optical coupler module having optical waveguide structure

An optical coupler module includes a semiconductor substrate disposed on the print circuit board; a reflecting trench structure formed on the semiconductor substrate; a reflector formed on a slant surface of the reflecting trench structure; a strip trench structure formed on the semiconductor substrate and connecting with the reflecting trench structure; a thin film disposed on the above-mentioned structure. The optical coupler module further includes a signal conversion unit disposed on the semiconductor substrate and the position of the signal conversion unit corresponds to the reflector; and an optical waveguide structure formed in the trench structures. The optical signal from the signal conversion unit is reflected by the reflector and then transmitted in the optical waveguide structure, or in a reverse direction to reach the signal conversion unit.

Method for forming light guide layer in semiconductor substrate

A method for forming a light guide layer with improved transmission reliability in a semiconductor substrate, the method including forming a trench in the semiconductor substrate, forming a cladding layer and a preliminary light guide layer in the trench such that only one of opposite side end portions of the preliminary light guide layer is in contact with an inner sidewall of the trench, and performing a thermal treatment on the substrate to change the preliminary light guide layer into the light guide layer.

Waveguide photo-detector

Provided is a waveguide photodetector that may improve an operation speed and increase or maximize productivity. The waveguide photodetector includes a waveguide layer extending in a first direction, an absorption layer disposed on the waveguide layer, a first electrode disposed on the absorption layer, a second electrode disposed on the waveguide layer, the second electrode being spaced from the first electrode and the absorption layer in a second direction crossing the first direction, and at least one bridge electrically connecting the absorption layer to the second electrode.

Optical waveguide fabrication method

The present invention relates to a method of manufacturing optical waveguide devices. The order of patterning/etch in the method is first a deeper etching then shallow etching. In some embodiments, the first etching forms a mesa and the second etching removes a portion of material that comprises the mesa. In addition, there can be a planarization step. The deeper trenches are desirably conducive to filling. The method may use a cross-lithography method to reduce alignment errors between multiple patterning/etching steps. The method may use an oxidation and stripping off process to smooth a surface of the waveguide and/or reduce an initial dimension of the waveguide.

Area array waveguide power splitter

A method for constructing an area array waveguide power splitter includes preparing a reflective layer on a substrate and forming a core of an area array waveguide layer and alignment features for an optical fiber input and a plurality of optical fiber outputs atop the reflective layer, wherein the core of the area array waveguide layer and the alignment features are formed concurrently. The method also includes applying a reflective layer to the top and side surfaces of the core of the area array waveguide layer and exposing an input and exposing a plurality of outputs in the reflective layer.

Method for producing silicon waveguides on non-soi substrate

The present invention relates to a method for producing silicon waveguides on non-SOI substrate (non-silicon-on-insulator substrate), and particularly relates to a method for producing silicon waveguides on silicon substrate with a laser. This method includes the following steps: (1) forming a ridge structure with high aspect ratio on a non-SOI substrate; (2) melting and reshaping the ridge structure by laser illumination for forming a structure having broad upper part and narrow lower part; and (3) oxidizing the structure having broad upper part and narrow lower part to form a silicon waveguide.

INTEGRATED CIRCUIT COUPLING SYSTEM WITH WAVEGUIDE CIRCUITRY AND METHOD OF MANUFACTURE THEREOF

A method of manufacture of an integrated circuit coupling system includes: forming a waveguide assembly, having a top clad over an open end of an optical core; forming a first photoresist having a base photoresist pattern shape with sloped photoresist sidewalls tapered down to expose a portion of the top clad; forming a recess having clad sidewalls from the portion of the top clad exposed by the base photoresist pattern shape, the clad sidewalls having a shape replicating a shape of the base photo resist pattern shape; and forming an optical vertical insertion area, from the clad sidewalls forming the recess, having a pocket trench, a horizontal step, and a mirror with a reflective material selectively applied to a section of the clad sidewalls and exposing the open end opposite to the mirror, the horizontal step between the mirror and the pocket trench. 1. A method of manufacture of an integrated circuit coupling system comprising:forming a waveguide assembly, having a top clad over an open end of an optical core;forming a first photoresist having a base photoresist pattern shape with sloped photoresist sidewalls tapered down to expose a portion of the top clad;forming a recess having clad sidewalls from the portion of the top clad exposed by the base photoresist pattern shape, the clad sidewalls having a shape replicating a shape of the base photoresist pattern shape; andforming an optical vertical insertion area, from the clad sidewalls forming the recess, having a pocket trench, a horizontal step, and a mirror with a reflective material selectively applied to a section of the clad sidewalls and exposing the open end opposite to the mirror, the horizontal step between the mirror and the pocket trench.2. The method as claimed in wherein forming the first photoresist includes baking the first photoresist to form the sloped photoresist sidewalls.3. The method as claimed in further comprising etching the horizontal step between the pocket trench and the mirror.4. The ...

Spot size converter, optical transmitter, optical receiver, optical transceiver, and method of manufacturing spot size converter

The spot size converter includes a first cladding layer, a first core layer and a second core layer arranged side by side on the first cladding layer so as to extend from a first end which receives/outputs light along a direction from the first end toward a second end, a third core layer which is disposed on the first cladding layer between the first and second core layers, is a member different from the first and second core layers, and extends to the second end along the direction from the first end toward the second end, and a second cladding layer disposed on the first, second, and third core layers.

Optical Waveguide Arrangements Comprising An Auxiliary Waveguide - Like Structure

An optical waveguide arrangement is provided which comprises an active ridge waveguide structure formed by etching of a semiconductor substrate . There is also provided an auxiliary waveguide-like structure formed on the substrate adjacent the active ridge waveguide structure to control the etched profile of the active waveguide structure. The arrangement of the auxiliary structure on the substrate controls the etched profile over the cross-section of the active waveguide structure and along the length of the active waveguide structure . Advantageously, this arrangement reduces or eliminates the disadvantages associated with etch-process induced asymmetries in the shape of closely spaced waveguides. 1. An optical waveguide arrangement comprising:an active ridge waveguide structure formed by etching of a substrate, andan auxiliary waveguide-like structure formed on the substrate adjacent to the active waveguide structure to control the etched profile over the cross-section of the active waveguide structure.2. The optical waveguide arrangement of claim 1 , wherein the auxiliary structure is arranged on the substrate to impart a symmetric active waveguide profile.3. The optical waveguide arrangement of claim 1 , wherein the active waveguide structure comprises one or more ridges and the auxiliary structure is arranged on the substrate so that each ridge in the active waveguide structure is symmetrical.4. The optical waveguide arrangement of claim 1 , wherein the active waveguide structure comprises two or more ridges and the auxiliary structure is arranged on the substrate so that each ridge in the active waveguide structure is substantially the same shape.5. The optical waveguide arrangement of claim 1 , wherein the active waveguide structure comprises an optical coupler having an input active waveguide and/or an output active waveguide claim 1 , the auxiliary structure being arranged adjacent at least one of the input and output active waveguides.6. The optical ...

Opto-electric hybrid board and method of manufacturing same

An opto-electric hybrid board which is capable of suppressing the increase in light propagation losses and which is excellent in flexibility, and a method of manufacturing the same are provided. The opto-electric hybrid board includes an electric circuit board, an optical waveguide, and a metal layer. The electric circuit board includes an insulative layer having front and back surfaces, and electrical interconnect lines formed on the front surface of the insulative layer. The optical waveguide is formed on the back surface of the insulative layer of the electric circuit board. The metal layer is formed between the optical waveguide and the back surface of the insulative layer of the electric circuit board. The metal layer is patterned to have a plurality of strips. Cores of the optical waveguide are disposed in a position corresponding to a site where the metal layer is removed by the patterning.

OPTO-ELECTRIC HYBRID BOARD AND METHOD OF MANUFACTURING SAME

An opto-electric hybrid board includes an electric circuit board, an optical waveguide, and a metal layer. The electric circuit board includes an insulative layer having front and back surfaces, and electrical interconnect lines formed on the front surface of the insulative layer. The optical waveguide includes a first cladding layer and cores, and the optical waveguide is formed on the back surface of the insulative layer of the electric circuit board. The metal layer is formed between the first cladding layer of the optical waveguide and the back surface of the insulative layer of the electric circuit board. Part of the opto-electric hybrid board is formed as a to-be-bent portion. The metal layer is partially removed in a portion corresponding to the to-be-bent portion. A first cladding layer of the optical waveguide fills a site where the metal layer is removed. 1. An opto-electric hybrid board , comprising:an electric circuit board including an insulative layer having front and back surfaces, and electrical interconnect lines formed on the front surface of the insulative layer;an optical waveguide including a cladding layer and cores, the optical waveguide being formed on the back surface of the insulative layer of the electric circuit board; anda metal layer formed between the cladding layer of the optical waveguide and the back surface of the insulative layer of the electric circuit board,wherein part of the opto-electric hybrid board is formed as a to-be-bent portion,wherein the metal layer is partially removed in a position corresponding to the to-be-bent portion, andwherein the cladding layer of the optical waveguide fills a site where the metal layer is removed.2. The opto-electric hybrid board according to claim 1 ,wherein the metal layer is patterned in a position corresponding to the pattern of the cores of the optical waveguide in portions other than the to-be-bent portion, andwherein the cladding layer of the optical waveguide fills a site where the ...

EFFICIENT BACKSIDE-EMITTING/COLLECTING GRATING COUPLER

Photonic integrated circuit (PIC) chips with backside vertical optical coupler and packaging into an optical transmitter/receiver. A grating-based backside vertical optical coupler functions to couple light to/from a plane in the PIC chip defined by thin film layers through a bulk thickness of the PIC chip substrate to emit/collect via a backside surface of the PIC chip where it is to be coupled by an off-chip component, such as an optical fiber. Embodiments of a grating-based backside vertical optical coupler include a grating coupler with a grating formed in a topside surface of the thin film A reflector is disposed over the grating coupler to reflect light emitted from the grating coupler through the substrate to emit from the backside of the PIC chip or to reflect light collected from the backside of the PIC chip through the substrate and to the grating coupler. 1. An integrated optical transmitter , comprising:a package substrate;a photonic integrated circuit (PIC) chip flip-chip bonded to the package substrate with a optical waveguide and an optical grating-based vertical coupler disposed in thin film layers on a frontside of the PIC facing the package substrate; andan optical lens to couple light to the vertical coupler through a backside of the PIC chip.2. The optical transmitter of claim 1 , further comprising a second integrated circuit (IC) chip flip-chip bonded to the PIC chip and disposed between the PIC chip and the package substrate.3. The optical transmitter of claim 2 , wherein the PIC further comprises a laser coupled to the optical waveguide and wherein the second IC comprises a driver electrically coupled to the laser.4. The optical transmitter of claim 1 , wherein the vertical coupler further comprises:an optical grating coupler to receive light from the optical waveguide; anda reflector disposed between the optical grating coupler and the package substrate to reflect light emitted from the optical grating coupler toward the backside of the PIC ...

OPTO-ELECTRIC HYBRID BOARD AND METHOD OF MANUFACTURING SAME

An opto-electric hybrid board capable of suppressing the increase in light propagation losses and excellent in flexibility, and a method of manufacturing the same, are provided. The opto-electric hybrid board includes an electric circuit board, an optical waveguide, and a metal layer. The electric circuit board includes an insulative layer having front and back surfaces, and electrical interconnect lines formed on the front surface of the insulative layer. The optical waveguide is formed on the back surface of the insulative layer. The metal layer is formed between the cladding layer and the insulative layer. At least part of the metal layer is formed in one of first and second patterns. The first pattern includes a distribution of dot-shaped protrusions, and the second pattern includes a distribution of dot-shaped recesses. A first cladding layer fills a site where the metal layer is removed by the patterning. 1. An opto-electric hybrid board , comprising:an electric circuit board including an insulative layer having front and back surfaces, and electrical interconnect lines formed on the front surface of the insulative layer;an optical waveguide including a cladding layer, the optical wavequide being formed on the back surface of the insulative layer of the electric circuit board; anda metal layer formed between the cladding layer of the optical waveguide and the insulative layer of the electric circuit board,wherein at least part of the metal layer is formed in one of first and second patterns,wherein the first pattern includes a distribution of dot-shaped protrusions,wherein the second pattern includes a distribution of dot-shaped recesses, andwherein the cladding layer of the optical waveguide fills a site where the metal layer is removed by patterning.2. The opto-electric hybrid board according to claim 1 ,wherein part of the opto-electric hybrid board is formed as a to-be-bent portion;wherein parts if the metal layer corresponding to the to-be-bent portion ...

OPTICAL COMPONENTS HAVING A COMMON ETCH DEPTH

An optical device is described. This optical device includes multiple components, such as a ring resonator, an optical waveguide and a grating coupler, having a common etch depth (which is associated with a single etch step or operation during fabrication). Moreover, these components may be implemented in a semiconductor layer in a silicon-on-insulator technology. By using a common etch depth, the optical device may provide: compact active devices, multimode ultralow-loss optical waveguides, high-speed ring resonator modulators with ultralow power consumption, and compact low-loss interlayer couplers for multilayer-routed optical links. Furthermore, the single etch step may help reduce or eliminate optical transition loss, and thus may facilitate high yield and low manufacturing costs. 1. An optical device , comprising:a substrate;a buried-oxide layer disposed on the substrate; anda semiconductor layer disposed on the buried-oxide layer, wherein the semiconductor layer includes a ring resonator, an optical waveguide and a grating coupler, andwherein the ring resonator, the optical waveguide and the grating coupler are defined in the semiconductor layer using a common etch depth.2. The optical device of claim 1 , wherein the ring resonator has a radius less than 10 μm and is single mode.3. The optical device of claim 1 , wherein an optical loss of the optical waveguide at a wavelength and a data rate is less than 1 dB/cm.4. The optical device of claim 1 , wherein the semiconductor layer has a thickness and the etch depth is more than 50% of the thickness.5. The optical device of claim 4 , wherein the thickness is substantially 300 nm and the etch depth is greater than 200 nm.6. The optical device of claim 1 , wherein the substrate claim 1 , the buried-oxide layer and the semiconductor layer constitute a silicon-on-insulator technology.7. The optical device of claim 1 , wherein claim 1 , at bends claim 1 , the optical waveguide has a width between 400 and 500 nm.8. ...

METHOD FOR FABRICATING SILICON PHOTONIC WAVEGUIDES

A method for fabricating electronic and photonic devices on a semiconductor substrate using complementary-metal oxide semiconductor (CMOS) technology is disclosed. A substrate is initially patterned to form a first region for accommodating electronic devices and a second region for accommodating photonic devices. The substrate within the first region is thicker than the substrate within the second region. Next, an oxide layer is formed on the substrate. The oxide layer within the first region is thinner than the oxide layer within the second region. A donor wafer is subsequently placed on top of the oxide layer. The donor substrate includes a bulk silicon substrate, a sacrificial layer and a silicon layer. Finally, the bulk silicon substrate and the sacrificial layer are removed from the silicon layer such that the silicon layer remains on the oxide layer. 1. An integrated circuit comprising:a substrate having a first region for accommodating electronic devices and a second region for accommodating photonic devices, wherein said substrate within said first region is thicker than said substrate within said second region;an oxide layer on said substrate, wherein said oxide layer within said first region is thinner than said oxide layer within said second region; anda silicon layer on said oxide layer.2. The integrated circuit of claim 1 , wherein said substrate within said first region is epitaxially grown from said substrate.3. The integrated circuit of claim 1 , wherein an electronic device is fabricated on said first region and a photonic device is fabricated on said second region.4. The integrated circuit of claim 1 , wherein a photonic device is fabricated on said first region and an electronic device is fabricated on said second region.5. The integrated circuit of claim 1 , wherein one of said electronic devices is a transistor claim 1 , and one of said photonic devices is a waveguide claim 1 , a modulator or a demodulator.6. The integrated circuit of claim 1 , ...

HYBRID INTEGRATED OPTICAL DEVICE AND FABRICATION METHOD THEREOF

Disclosed are a hybrid integrated optical device capable of more easily implementing impedance matching of a transmission line by using a polymer material on which a low-temperature process may be performed when an optical waveguide platform is fabricated, and a fabrication method thereof. The hybrid integrated optical device according to an exemplary embodiment of the present disclosure includes: a substrate divided into a waveguide region and a line region; a lower clad layer formed of silica and formed on the substrate; a transmission line part formed on the lower clad layer of the line region; and a height adjustment layer, a core layer, and an upper clad layer formed of a polymer and sequentially formed on the lower clad layer of the waveguide region, in which an optical waveguide is formed on the core layer. 1. A hybrid integrated optical device , comprising:a substrate divided into a waveguide region and a line region;a lower clad layer formed of silica material and formed on the substrate;a transmission line part formed on the lower clad layer of the line region; anda height adjustment layer, a core layer, and an upper clad layer formed of a polymer and sequentially formed on the lower clad layer of the waveguide region,wherein an optical waveguide is formed on the core layer.2. The hybrid integrated optical device of claim 1 , wherein the transmission line part comprises an impedance matching resistor claim 1 , a transmission line including a signal line and a ground line claim 1 , a solder for mounting an active optical device claim 1 , and a flip chip alignment mark.3. The hybrid integrated optical device of claim 2 , wherein the transmission line is a coplanar waveguide (CPW) type or a microstip type.4. The hybrid integrated optical device of claim 1 , further comprising:an active optical device mounted on the transmission line part,wherein a core layer of the active optical device and the core layer of the waveguide region are positioned on the same ...

Lightwave Circuit and Method for Manufacturing Same

Provided are a lightwave circuit and a method of manufacturing the same. The lightwave circuit includes a first substrate having an engraved core formation groove which is formed on an upper portion of the first substrate, a core layer which is formed inside the engraved core formation groove, a BPSG bonding layer which is formed on the first substrate including the core layer, and a second substrate which is formed on the BPSG bonding layer. Accordingly, light loss and branching uniformity of the lightwave circuit are effectively improved, and the lightwave circuit is manufactured simply and inexpensively while also further improving light loss and branching uniformity of the lightwave circuit.

Optical and thermal interface for photonic integrated circuits

Described herein are photonic systems and devices including a optical interface unit disposed on a bottom side of a photonic integrated circuit (PIC) to receive light from an emitter of the PIC. A top side of the PIC includes a flip-chip interface for electrically coupling the PIC to an organic substrate via the top side. An alignment feature corresponding to the emitter is formed with the emitter to be offset by a predetermined distance value; because the emitter and the alignment feature are formed using a shared processing operation, the offset (i.e., predetermined distance value) may be precise and consistent across similarly produced PICs. The PIC comprises a processing feature to image the alignment feature from the bottom side (e.g., a hole). A heat spreader layer surrounds the optical interface unit and is disposed on the bottom side of the PIC to spread heat from the PIC.

Junction region between two waveguides and associated method of production

A photonic integrated device includes a first waveguide and a second waveguide. The first and second waveguides are mutually coupled at a junction region the includes a bulge region.

SACRIFICIAL GRATING COUPLER FOR TESTING V-GROOVED INTEGRATED CIRCUITS

Embodiments are directed to a method of forming an optical coupler system. The method includes forming at least one waveguide over a substrate, and forming a sacrificial optical coupler in a first region over the substrate. The method further includes configuring the sacrificial optical coupler to couple optical signals to or from the at least one waveguide, and forming a v-groove in the first region over the substrate, wherein forming the v-groove includes removing the sacrificial optical coupler from the first region. 1. A method of forming an optical coupler system , the method comprising:forming at least one waveguide over a substrate;forming a sacrificial optical coupler in a first region over the substrate;configuring the sacrificial optical coupler to couple optical signals to or from the at least one waveguide; andforming a v-groove in the first region over the substrate;wherein forming the v-groove includes removing the sacrificial optical coupler from the first region.2. The method of further comprising configuring the sacrificial optical coupler to couple optical signals to or from an optical fiber.3. The method of further comprising performing a test operation comprising coupling optical signals through the sacrificial optical coupler to or from the at least one waveguide.4. The method of further comprising:forming at least one optoelectronic component over the substrate; andcoupling the at least one waveguide to the at least one optoelectronic component;wherein performing the test operation further comprises coupling optical signals through the at least one waveguide to or from the at least one optoelectronic component.5. The method of claim 1 , wherein removing the sacrificial optical coupler from the first region comprises one or more etch operations.6. The method of further comprising configuring the v-groove to couple optical signals to or from the at least one waveguide.7. The method of further comprising coupling an optical fiber to the v-groove.8 ...

SACRIFICIAL COUPLER FOR TESTING V-GROOVED INTEGRATED CIRCUITS

Embodiments are directed to a method of forming an optical coupler system. The method includes forming at least one waveguide over a substrate, and forming gratings in a first region over the substrate. The method further includes configuring the gratings to couple optical signals to or from the at least one waveguide, and forming a v-groove in the first region over the substrate, wherein forming the v-groove includes removing the gratings from the first region. 1. A method of forming an optical coupler system , the method comprising:forming a first optoelectronic component over a substrate;forming a sacrificial optical coupler in a first region over the substrate;configuring the sacrificial optical coupler to couple optical signals to or from the first optoelectronic component; andforming a v-groove in the first region over the substrate;wherein forming the v-groove includes removing the sacrificial optical coupler from the first region.2. The method of claim 1 , wherein the sacrificial optical coupler comprises a sacrificial waveguide system.3. The method of claim 1 , wherein removing the sacrificial optical coupler from the first region comprises one or more etch operations.4. The method of further comprising performing a test operation comprising coupling optical signals through the sacrificial optical coupler to or from the first optoelectronic component.5. The method of further comprising:forming a second optoelectronic component over the substrate; andconfiguring the sacrificial optical coupler to couple optical signals to or from the second optoelectronic component.6. The method of further comprising performing a test operation comprising:coupling optical signals through the sacrificial optical coupler to or from the first optoelectronic component; andcoupling optical signals through the sacrificial optical coupler to or from the second optoelectronic component.7. The method of further comprising:forming a built-in-self-test (BIST) circuit over the substrate ...

PHOTONIC SEMICONDUCTOR DEVICE AND METHOD

A method includes forming silicon waveguide sections in a first oxide layer over a substrate, the first oxide layer disposed on the substrate, forming a routing structure over the first oxide layer, the routing structure including one or more insulating layers and one or more conductive features in the one or more insulating layers, recessing regions of the routing structure, forming nitride waveguide sections in the recessed regions of the routing structure, wherein the nitride waveguide sections extend over the silicon waveguide sections, forming a second oxide layer over the nitride waveguide sections, and attaching semiconductor dies to the routing structure, the dies electrically connected to the conductive features. 1. A method , comprising:forming silicon waveguide sections in a first oxide layer over a substrate, the first oxide layer disposed on the substrate;forming a routing structure over the first oxide layer, the routing structure comprising one or more insulating layers and one or more conductive features in the one or more insulating layers;recessing regions of the routing structure;forming nitride waveguide sections in the recessed regions of the routing structure, wherein the nitride waveguide sections extend over the silicon waveguide sections;forming a second oxide layer over the nitride waveguide sections; andattaching semiconductor dies to the routing structure, the dies electrically connected to the conductive features.2. The method of claim 1 , further comprising patterning the first oxide layer and the second oxide layer to form a cladding structure surrounding the silicon waveguide sections and the nitride waveguide sections claim 1 , the cladding structure having exposed sidewalls.3. The method of claim 1 , wherein the nitride waveguide sections are straight.4. The method of claim 1 , further comprising forming a photonic device over the first oxide layer claim 1 , wherein the photonic device comprises silicon claim 1 , and wherein the ...

Method of Fabrication Polymer Waveguide

A method of fabricating a waveguide device is disclosed. The method includes providing a substrate having an elector-interconnection region and a waveguide region and forming a patterned dielectric layer and a patterned redistribution layer (RDL) over the substrate in the electro-interconnection region. The method also includes bonding the patterned RDL to a vertical-cavity surface-emitting laser (VCSEL) through a bonding stack. A reflecting-mirror trench is formed in the substrate in the waveguide region, and a reflecting layer is formed over a reflecting-mirror region inside the waveguide region. The method further includes forming and patterning a bottom cladding layer in a wave-tunnel region inside the waveguide region and forming and patterning a core layer and a top cladding layer in the waveguide region.

Single edge coupling of chips with integrated waveguides

Techniques are provided for single edge coupling of chips with integrated waveguides. For example, a package structure includes a first chip with a first critical edge, and a second chip with a second critical edge. The first and second chips include integrated waveguides with end portions that terminate on the first and second critical edges. The second chip includes a signal reflection structure that is configured to reflect an optical signal propagating in one or more of the integrated waveguides of the second chip. The first and second chips are edge-coupled at the first and second critical edges such that the end portions of the integrated waveguides of the first and second chips are aligned to each other, and wherein all signal input/output between the first and second chips occurs at the single edge-coupled interface.

Photonic Integrated Package and Method Forming Same

A method includes placing an electronic die and a photonic die over a carrier, with a back surface of the electronic die and a front surface of the photonic die facing the carrier. The method further includes encapsulating the electronic die and the photonic die in an encapsulant, planarizing the encapsulant until an electrical connector of the electronic die and a conductive feature of the photonic die are revealed, and forming redistribution lines over the encapsulant. The redistribution lines electrically connect the electronic die to the photonic die. An optical coupler is attached to the photonic die. An optical fiber attached to the optical coupler is configured to optically couple to the photonic die. 1. A method comprising:placing an electronic die and a photonic die over a carrier;encapsulating the electronic die and the photonic die in an encapsulant;planarizing the encapsulant until the electronic die and the photonic die are revealed;forming redistribution lines over the encapsulant, the electronic die and the photonic die, wherein the redistribution lines electrically connect at least the electronic die; andattaching an optical coupler to the photonic die, wherein an optical fiber attached to the optical coupler is configured to optically couple to the photonic die.2. The method of further comprising:removing a sacrificial material of the photonic die to reveal an opening extending from a front surface and an edge of the photonic die into the photonic die, wherein a waveguide in the photonic die is revealed to the opening, and the optical coupler comprises an edge coupler having a portion extending into the opening, and the optical fiber has a portion extending into a groove in the photonic die, with the groove being a part of the opening.3. The method of further comprising claim 2 , before placing the photonic die over the carrier:forming the opening in the photonic die; andfilling the sacrificial material into the opening.4. The method of claim 1 , ...

Light guides having enhanced light extraction

Lightguides, devices incorporating lightguides, processes for making lightguides, and tools used to make lightguides are described. A lightguide includes light extractors arranged in a plurality of regions on a surface of the lightguide. The orientation of light extractors in each region is arranged to enhance uniformity and brightness across a surface of the lightguide and to provide enhanced defect hiding. The efficiency of the light extractors is controlled by the angle of a given light extractor face with respect to a light source illuminating the light guide.

Optical Switches with Surface Grating Couplers and Edge Couplers

A photonic integrated circuit (PIC) comprises an optical switch, a plurality of input edge couplers comprising a first input edge coupler and coupled to the optical switch, a plurality of input surface grating couplers (SGCs) comprising a first input SGC and coupled to the optical switch, a plurality of output edge couplers comprising a first output edge coupler and coupled to the optical switch, and a plurality of output SGCs comprising a first output SGC and coupled to the optical switch. A method of fabricating a PIC comprises patterning and etching a silicon substrate to produce a first optical switch, a first surface grating coupler (SGC) coupled to the first optical switch, and a first edge coupler coupled to the first optical switch. 1. A photonic integrated circuit (PIC) comprising:an optical switch;a plurality of input edge couplers comprising a first input edge coupler and coupled to the optical switch;a plurality of input surface grating couplers (SGCs) comprising a first input SGC and coupled to the optical switch;a plurality of output edge couplers comprising a first output edge coupler and coupled to the optical switch; anda plurality of output SGCs comprising a first output SGC and coupled to the optical switch.2. The PIC of claim 1 , further comprising a chip claim 1 , wherein the chip comprises the optical switch claim 1 , the input edge couplers claim 1 , the input SGCs claim 1 , the output edge couplers claim 1 , and the output SGCs.3. The PIC of claim 2 , wherein the chip primarily comprises silicon.4. The PIC of claim 2 , wherein the chip is a silicon-on-insulator (SOI) chip.5. The PIC of claim 1 , wherein the optical switch is a dilated optical switch.6. The PIC of claim 5 , wherein the optical switch comprises a Benes network.7. The PIC of claim 1 , wherein the optical switch comprises an input cell and an output cell claim 1 , wherein the input cell comprises a first input and a second input claim 1 , and wherein the output cell comprises a ...

LOW-LOSS WAVEGUIDE TRANSITION

A waveguide device that includes a first waveguide, a second waveguide and a transition region. The first waveguide has a first height and the second waveguide has a second height different from the first height. The transition region is between the first waveguide and the second waveguide and includes an asymmetrical taper of the first waveguide. 1. A waveguide device comprising:a first waveguide with a first height;a second waveguide with a second height different from the first height;a transition region between the first waveguide and the second waveguide, the transition region comprising an asymmetrical taper of the first waveguide.2. The waveguide device of claim 1 , wherein the first height and the second height is along a first direction claim 1 , and the asymmetrical taper is asymmetric about an imaginary plane that bisects a width of the first waveguide claim 1 , wherein the width of the first waveguide is along a second direction perpendicular to the first direction.3. The waveguide device of claim 1 , wherein the asymmetrical taper begins at a first side of the first waveguide claim 1 , but not a second side of the first waveguide claim 1 , wherein the first side and the second side are opposing sides of the first waveguide.4. The waveguide device of claim 1 , wherein the transition region comprises a transition tip with a width less than 50 nm.5. The waveguide device of claim 1 , wherein the second waveguide has a first width at the transition region and a second width a first distance from the transition region claim 1 , wherein the first width is greater than the second width.6. The waveguide device of claim 1 , wherein the second waveguide includes a tapered region.7. The waveguide device of claim 6 , wherein the tapered region of the second waveguide begins at the transition region.8. The waveguide device of claim 6 , wherein the tapered region of the second waveguide is a symmetric taper.9. The waveguide device of claim 6 , wherein the tapered ...

Waveguide resonator component and method for the production thereof

The invention pertains to the field of electrical engineering/electronics and relates to a waveguide resonator component, which can be used, for example, in integrated circuits. The problem addressed by the invention is that of producing a waveguide resonator component simply and economically. The problem is solved by a waveguide resonator component in which a substrate ( 1 ) having two waveguides ( 3 ) is present and a microtube ( 2 ) is present as resonator, wherein the resonator has a respective recess ( 4 ) in the region of each waveguide in order to form an intermediate space between the waveguide and the resonator. The aim is additionally achieved by a method in which a sacrificial layer is applied to a substrate having two waveguides and at least a second layer is applied to the sacrificial layer, and thereafter the sacrificial layer is at least partially removed and the resonator is produced in the form of a microtube by rolling up the second layer and possible additional layers.

On-chip optical polarization controller

An example optical polarization controller can include a substantially planar substrate and a waveguide unit cell formed on the substantially planar substrate. The waveguide unit cell can include a first out-of-plane waveguide portion and a second out-of-plane waveguide portion coupled to the first out-of-plane waveguide portion. Each of the first and second out-of-plane waveguide portions can respectively include a core material layer arranged between a first optical cladding layer having a first stress-response property and a second optical cladding layer having a second stress-response property. The first and second stress-response properties can be different such that each of the first and second out-of-plane waveguide portions is deflected by a deflection angle.

Optical component with angled-facet waveguide

A system comprises a first optical component comprising a component body; at least a first waveguide formed in the component body, wherein the first waveguide is substantially mirror-symmetrical in shape relative to a line at or near the center of the first waveguide; and a self-alignment feature configured to assist in optically-coupling the first waveguide with a second waveguide located outside of the component body.

NON-PLANAR WAVEGUIDE STRUCTURES

The present disclosure relates to semiconductor structures and, more particularly, to non-planar waveguide structures and methods of manufacture. The structure includes: a first waveguide structure; and a non-planar waveguide structure spatially shifted from the first waveguide structure and separated from the first waveguide structure by an insulator material. 1. A structure comprising:a first non-planar waveguide structure comprising semiconductor material; anda second non-planar waveguide structure comprising the semiconductor material and spatially shifted in a vertical orientation from the first non-planar waveguide structure such that lower horizontal sections of the first non-planar waveguide and the second non-planar waveguide are in a different plane and separated from one another in both the vertical orientation and a horizontal orientation by an insulator material.2. The structure of claim 1 , wherein the first non-planar waveguide structure crosses the second non-planar waveguide structure.3. The structure of claim 2 , wherein the crossing occurs at a non-planar portion of the second non-planar waveguide structure.4. (canceled)5. (canceled)6. The structure of claim 1 , wherein the first non-planar waveguide structure is vertically shifted and crosses over the second non-planar waveguide structure.7. The structure of claim 6 , wherein the first non-planar waveguide structure is vertically shifted by 180 degrees from the non-planar waveguide structure.820.-. (canceled)21. The structure of claim 1 , wherein the second non-planar waveguide structure includes rounded corners transitioning between vertical sections and the horizontal sections.22. The structure of claim 21 , wherein the first non-planar waveguide structure and the second non-planar waveguide structure cross between vertical sections of the second non-planar waveguide structure and the lower horizontal sections of the second non-planar waveguide are on a same plane as upper horizontal sections ...

OPTOELECTRONIC DEVICE

An optoelectronic device and method of making the same. The device comprising: a substrate; a regrown cladding layer, on top of the substrate; and an optically active region, above the regrown cladding layer; wherein the regrown cladding layer has a refractive index which is less than a refractive index of the optically active region, such that an optical mode of the optoelectronic device is confined to the optically active region, and wherein the optically active region is formed of: SiGeSn, GeSn, InGaNAs, or InGaNAsSb. 1. An optoelectronic device , comprising:a substrate;a regrown cladding layer, on the substrate;an insulating layer;an optically active region, above the regrown cladding layer;a first waveguide; anda second waveguide,wherein:the regrown cladding layer has a refractive index which is less than a refractive index of the optically active region, such that an optical mode of the optoelectronic device is confined to the optically active region,the optically active region is formed of: SiGeSn, GeSn, InGaNAs, or InGaNAsSb,the insulating layer is directly on the substrate, over a first region of the substrate,the regrown cladding layer is on the substrate, over a second region of the substrate, different from the first region of the substrate,the first waveguide is on the insulating layer,the second waveguide is in the optically active region,the substrate is a silicon substrate,the insulating layer is an oxide layer,the first waveguide is over the first region of the substrate and extends to a boundary between the first region of the substrate and the second region of the substrate,the second waveguide is over the second region of the substrate and extends to the boundary between the first region of the substrate and the second region of the substrate,the first waveguide is configured to support a first optical mode, andthe second waveguide is configured to support a second optical mode, coupled to the first optical mode.2. The optoelectronic device of ...

GAS DETECTION APPARATUS

A gas detection apparatus () includes a first layer () and a second layer () disposed opposite the first layer () in a predetermined direction (z-axis direction). The first layer () includes a light emitter that emits light and a light receiver that receives the light after the light passes through a waveguide. The second layer () includes a light input unit of the waveguide opposite the light emitter in the predetermined direction (z-axis direction) and a light output unit of the waveguide opposite the light receiver in the predetermined direction (z-axis direction). The gas detection apparatus () can be miniaturized. 1. A gas detection apparatus comprising:a first layer; anda second layer disposed opposite the first layer in a predetermined direction; a light emitter configured to emit light; and', 'a light receiver configured to receive the light after the light passes through a waveguide;, 'wherein the first layer comprises'} a light input unit of the waveguide opposite the light emitter in the predetermined direction; and', 'a light output unit of the waveguide opposite the light receiver in the predetermined direction., 'wherein the second layer comprises'}2. The gas detection apparatus of claim 1 , wherein the second layer comprises all of the waveguide.3. The gas detection apparatus of claim 1 , wherein the first layer is connected to the second layer by an attachment portion so as to form a vent communicating with the waveguide.4. The gas detection apparatus of claim 3 , wherein the attachment portion comprises adhesive claim 3 , and the adhesive comprises particles having a size of a predetermined value or greater.5. The gas detection apparatus of claim 3 , wherein the first layer comprises a terminal claim 3 , and the attachment portion is provided in a line on the terminal.6. The gas detection apparatus of claim 3 ,wherein the vent is provided in a diagonal direction relative to the attachment portion; andwherein a length of the vent is at least √2 times ...

WAVEGUIDE BENDS WITH MODE-CONFINING STRUCTURES

Waveguide bends and methods of fabricating waveguide bends. A first waveguide bend is contiguous with a waveguide. A second waveguide bend is spaced from a surface at an inner radius of the first waveguide bend by a gap. The second waveguide bend may have a substantially concentric arrangement with the first waveguide bend. 1. A structure comprising:a substrate;a dielectric cladding layer over the substrate;a waveguide on the dielectric cladding layer;a first waveguide bend on the dielectric cladding layer, the first waveguide bend contiguous with the waveguide, and the first waveguide bend having a surface arranged in a first arc defining an inner radius; anda second waveguide bend on the dielectric cladding layer, the second waveguide bend having a surface arranged in a second arc spaced from the surface at the inner radius of the first waveguide bend by a first gap, and the second waveguide bend having a first end and a second end,wherein the second waveguide bend curves in the second arc from the first end of the second waveguide bend to the second end of the second waveguide bend, the surface of the second waveguide bend is arranged in its entirety inside of the surface arranged in the first arc at the inner radius of the first waveguide bend, and the surface of the second waveguide bend is concentric with the surface at the inner radius of the first waveguide bend.2. The structure of wherein the waveguide claim 1 , the first waveguide bend claim 1 , and the second waveguide bend are coplanar claim 1 , and the waveguide claim 1 , the first waveguide bend claim 1 , and the second waveguide bend are comprised of silicon nitride.3. The structure of wherein the first waveguide bend is comprised of silicon nitride and the second waveguide bend is comprised of polysilicon.4. The structure of wherein the first waveguide bend and the second waveguide bend are comprised of a single-crystal semiconductor material.5. The structure of wherein the first waveguide bend and ...

SEMICONDUCTOR DEVICES INCLUDING PHOTODETECTORS INTEGRATED ON WAVEGUIDES AND METHODS FOR FABRICATING THE SAME

Semiconductor devices and methods for fabricating semiconductor devices are provided. In one example, a method for fabricating a semiconductor device includes etching a waveguide layer in a detector region of a semiconductor substrate to form a recessed waveguide layer section. A ridge structure germanium (Ge) photodetector is formed overlying a portion of the recessed waveguide layer section. 1. A method for fabricating a semiconductor device , the method comprising:etching a waveguide layer in a detector region of a semiconductor substrate to form a recessed waveguide layer section; andforming a ridge structure germanium (Ge) photodetector overlying a portion of the recessed waveguide layer section.2. The method of claim 1 , wherein etching the waveguide layer comprises removing material from the waveguide layer for a depth of from about 1.25 to about 2.75 μm to form the recessed waveguide layer section.3. The method of claim 1 , wherein etching the waveguide layer comprises forming the recessed waveguide layer section having a thickness of from about 0.25 to about 0.75 μm.4. The method of claim 1 , wherein forming the ridge structure Ge photodetector comprises:forming a Ge fill overlying the recessed waveguide layer section;selectively etching the Ge fill to form a first recessed Ge layer section, a second recessed Ge layer section, and a Ge ridge structure disposed between the first and second recessed Ge layer sections;P+ doping the first recessed Ge layer section and a first sidewall portion of the Ge ridge structure that are adjacent to each other to form a P+ electrode; andN+ doping the second recessed Ge layer section and a second sidewall portion of the Ge ridge structure that are adjacent to each other to form an N+ electrode.5. The method of claim 4 , wherein P+ doping and N+ doping comprise forming the P+ and N+ electrodes such that the P+ and N+ electrodes are separated from each other by a Ge core ridge portion of the Ge ridge structure claim 4 , ...

Apparatus and method for passive alignment of optical devices

An apparatus for passive alignment of optical devices comprises a substrate including a trench in a top surface thereof, where the trench has a first end positioned at an edge of the substrate and a second end positioned at an interior region of the substrate, and a lens disposed on the top surface of the substrate adjacent to the second end of the trench. The apparatus further includes a top holder having a longitudinal indentation in a bottom surface thereof for mounting an optical fiber. The longitudinal indentation is sized to fit a top portion of the optical fiber such that a bottom portion of the optical fiber extends below the bottom surface of the top holder when the optical fiber is mounted therein. One or both of the substrate and the top holder include one or more spacer features configured for three-dimensional (3D) alignment of the lens with the optical fiber when the top holder is brought into contact with the substrate.

OPTICAL DEVICE USING ECHELLE GRATING THAT PROVIDES TOTAL INTERNAL REFLECTION OF LIGHT

Embodiments of the present disclosure are directed toward techniques and configurations for an optical device having a semiconductor layer to propagate light and a mirror disposed inside the semiconductor layer and having echelle grating reflective surface to substantially totally internally reflect the propagating light inputted by one or more input waveguides, to be received by one or more output waveguides. The waveguides may be disposed in the semiconductor layer under a determined angle relative to the mirror reflective surface. The determined angle may be equal to or greater than a total internal reflection angle corresponding to the interface, to provide substantially total internal reflection of light by the mirror. The mirror may be formed by an interface of the semiconductor layer comprising the mirror reflective surface and another medium filling the mirror, such as a dielectric. Other embodiments may be described and/or claimed. 1. An optical apparatus comprising:a semiconductor layer to propagate light from at least one light source;a mirror disposed inside the semiconductor layer, and having echelle grating reflective surface to reflect and refocus the propagating light;at least one input optical waveguide disposed inside the semiconductor layer to spatially disperse the propagating light onto the mirror; andat least one output optical waveguide disposed inside the semiconductor layer to receive at least a portion of light reflected by the mirror,wherein the input and output optical waveguides are disposed under a determined angle relative to the mirror reflective surface, to provide substantially total internal reflection of light by the mirror.2. The optical apparatus of claim 1 , wherein the mirror is formed in a trench disposed in the semiconductor layer.3. The optical apparatus of claim 2 , wherein the mirror reflective surface is etched on at least one facet of the trench.4. The optical apparatus of claim 3 , wherein the trench is filled with a ...

SEMICONDUCTOR DEVICE

A semiconductor device for use in an optical application and a method for fabricating the device. The device includes: an optically passive aspect that is operable in a substantially optically passive mode; and an optically active material having a material that is operable in a substantially optically active mode, wherein the optically passive aspect is patterned to include a photonic structure with a predefined structure, and the optically active material is formed in the predefined structure so as to be substantially self-aligned in a lateral plane with the optically passive aspect. 1. A method for fabricating a semiconductor device for use in an optical application , the method comprising:providing an optically passive aspect that is operable in a substantially optically passive mode;providing an optically active material having a material that is operable in a substantially optically active mode;wherein the optically passive aspect is patterned to include a photonic structure with a predefined structure; andwherein the optically active material is formed in the predefined structure so as to be substantially self-aligned in a lateral plane with the optically passive aspect.2. The method according to claim 1 , wherein the optically active material is substantially selectively formed in the predefined structure.3. The method according to claim 1 , wherein the optically active material is formed relative to the optically passive aspect so as to exceed an area of the predefined structure.4. The method according to claim 3 , wherein excess optically active material is removed so that the optically active material is provided in the predefined structure.5. The method according to claim 4 , wherein the excess optically active material is removed by wet-chemical etching or chemical mechanical polishing.6. The method according to claim 1 , wherein a structural characteristic of the predefined structure is chosen to facilitate the optically active material to be ...

OPTICAL WAVEGUIDE DIRECTIONAL COUPLER AND METHOD FOR MAKING SAME

An optical waveguide directional coupler includes a base having a planar member and a ridge member and an optical waveguide in the base. The ridge member extends from the planar member and has an upper surface where the optical waveguide exposed. The optical waveguide includes a first flat side surface, a second flat side surface parallel to the first flat side surface, a third flat side surface, a fourth flat side surface parallel to the third flat side surface, and a first flat connection side surface. An included angle θ1 between the first and third flat side surfaces is an obtuse angle, an included acute angle α1 is formed between the first flat connection side surface and the second flat side surface, and θ1 and α1 satisfy α1<(180°−θ1).

Integrated ldmos devices for silicon photonics

A device includes a laterally diffused metal-oxide-semiconductor (LDMOS) device integrated with an optical modulator. An optical waveguide of the optical modulator includes a silicon-containing structure in a drift region of the LDMOS device.

METHOD FOR CREATING A HIGH REFRACTIVE INDEX WAVE GUIDE

Embodiments described herein generally relate to a wave guide and a method of creating a wave guide. In one embodiment, a method of forming a wave guide is disclosed herein. An inverse master substrate having a plurality of projections extending therefrom is formed. A high refractive index material is formed on a top surface of the inverse master substrate. A glass layer is positioned on a top surface of the high refractive index material. The inverse master substrate is removed from the high refractive index material. 1. A method of forming a wave guide , comprising:forming an inverse substrate having a plurality of projections and trenches extending therefrom;forming a high refractive index material on a top surface of the inverse substrate, wherein the high refractive index material has a refractive index of at least 1.4; thenpositioning a glass layer on a top surface of the high refractive index material; andremoving the inverse substrate from the high refractive index material.2. The method of claim 1 , wherein forming the inverse substrate claim 1 , comprises:etching a silicon layer.3. The method of claim 1 , wherein the high refractive index material has a refractive index of at least 1.55 to about 1.8.4. The method of claim 1 , wherein the high refractive index material and the glass layer have substantially the same refractive index.5. The method of claim 1 , wherein removing the inverse substrate from the high refractive index material claim 1 , comprises:performing a wet etch process on the inverse master substrate.6. The method of claim 1 , where removing the inverse substrate from the high refractive index material claim 1 , comprises:performing a dry etch process on the inverse master substrate.7. The method of claim 1 , wherein forming the high refractive index material on a top surface of the inverse substrate claim 1 , comprises:conformally depositing the high refractive index material on the top surface of the inverse substrate.8. The method of ...

Gradient-index waveguide lateral coupler

A waveguide having a gradient-index (GRIN) waveguide lateral coupler is provided. In an example embodiment, the waveguide comprises an active region. The refractive index profile of the active region is non-constant.

Arrays of integrated analytical devices

Arrays of integrated analytical devices and their methods for production are provided. The arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The devices allow the highly sensitive discrimination of optical signals using features such as spectra, amplitude, and time resolution, or combinations thereof. The devices include an integrated diffractive beam shaping element that provides for the spatial separation of light emitted from the optical reactions.

Optical Waveguide

A waveguide and methods for manufacture can include a silicon wafer and a silicon substrate on the wafer that can be patterned into a silicon waveguide. A cladding can be deposited on the wafer and that waveguide using a plasma enhanced chemical vapor deposition (PECVD) process. When a PECVD process is used, the cladding portions that are in contact with that waveguide and in the immediate vicinity can have a lower density, and a lower refractive index n of less than (n<1.3). The lower uniform cladding refractive index can be uniform from the waveguide surfaces out to approximately one micrometer from the waveguide. This can further in result in an increased difference between the refractive index of the silicon waveguide and the adjacent lower refractive index cladding portions, which can further result in greater light confinement within the waveguide (i.e. reduced losses during transmission). 1. A method comprising the steps of:A) providing a wafer;B) depositing a waveguide substrate on said wafer;C) patterning said waveguide substrate to result in a waveguide; and,D) depositing a cladding on said waveguide so that the cladding portions in contact with said waveguide have a uniform refractive index n of less than (n<1.3).2. The method of claim 1 , wherein said step A) is accomplished using a wafer selected from the group consisting of silicon claim 1 , silicon on insulator (SOI) claim 1 , or silicon on sapphire (SOS).3. The method of claim claim 1 , wherein said waveguide substrate is silicon.4. The method of claim 1 , wherein said step D) is accomplished using a plasma enhanced chemical vapor deposition (PECVD) process.5. The method of claim 4 , wherein said waveguide from said has surfaces when viewed in cross-section claim 4 , and further wherein said step D) results in a uniform said refractive index out to a distance of one micrometer (1 μm) in a direction from and normal to said surfaces.6. The method of claim 5 , wherein said PECVD process results in a ...

Photonic Semiconductor Device and Method

A method includes forming silicon waveguide sections in a first oxide layer over a substrate, the first oxide layer disposed on the substrate, forming a routing structure over the first oxide layer, the routing structure including one or more insulating layers and one or more conductive features in the one or more insulating layers, recessing regions of the routing structure, forming nitride waveguide sections in the recessed regions of the routing structure, wherein the nitride waveguide sections extend over the silicon waveguide sections, forming a second oxide layer over the nitride waveguide sections, and attaching semiconductor dies to the routing structure, the dies electrically connected to the conductive features. 1. A structure comprising:an optical routing structure over a substrate, the optical routing structure comprising a plurality of silicon waveguides and a plurality of silicon nitride waveguides, wherein the silicon nitride waveguides are optically coupled to the silicon waveguides;an electrical routing structure over the optical routing structure, the electrical routing structure comprising a plurality of conductive features; and a first semiconductor die over the electrical routing structure, wherein the first semiconductor die is electrically connected to a conductive feature of the electrical routing structure; and', 'a photonic device, wherein the photonic device is electrically connected to the first semiconductor die through the electrical routing structure, and wherein the photonic device is optically coupled to at least one silicon waveguide of the optical routing structure., 'a plurality of computing sites over the substrate, wherein each computing site comprises2. The structure of claim 1 , wherein the plurality of silicon nitride waveguides are closer to the substrate than the plurality of silicon waveguides.3. The structure of claim 1 , wherein the plurality of silicon nitride waveguides comprises an edge coupler.4. The structure of ...

DISSIPATING HEAT FROM AN ACTIVE REGION OF AN OPTICAL DEVICE

A device, such as an electroabsorption modulator, can modulate a light intensity by controllably absorbing a selectable fraction of the light. The device can include a substrate. A waveguide positioned on the substrate can guide light. An active region positioned on the waveguide can receive guided light from the waveguide, absorb a fraction of the received light, and return a complementary fraction of the received light to the waveguide. Such absorption produces heat, mostly at an input portion of the active region. The input portion of the active region can be thermally coupled to the substrate, which can dissipate heat from the input portion, and can help avoid thermal runaway of the device. The active region can be thermally isolated from the substrate away from the input portion, which can maintain a relatively low thermal mass for the active region, and can increase efficiency when heating the active region. 1. An optical device , comprising:a substrate layer;a waveguide layer on the substrate layer, the waveguide layer including a waveguide to guide light; andan active region on the waveguide layer and including an input portion to receive guided light from the waveguide, the active region being thermally coupled to the substrate layer at the input portion and thermally isolated from the substrate layer distal from the input portion.2. The optical device of claim 1 , wherein the optical device comprises an oxide layer between the waveguide layer and the substrate layer.3. The optical device of claim 1 , wherein the substrate layer is etched to form an etched portion.4. The optical device of claim 3 , wherein the etched portion extends under the waveguide from the input portion of the active region to an output end of the active region such that the etched portion thermally isolates the active region from the substrate layer.5. The optical device of claim 4 , wherein the etched portion of the substrate layer does not extend under the input portion of the ...

SILICON WAVEGUIDE INTEGRATED WITH GERMANIUM PIN PHOTODETECTOR

A method for manufacturing an integrated photodetector may include steps of providing a silicon-insulator substrate including a top layer, an insulator layer, and a base layer; partially removing the top layer to form an optical waveguide over the insulator layer; forming an opening at least through the cladding layer and the insulator layer extending to a first portion of the base layer; and epitaxially growing a lattice-mismatched semiconductor layer over the first portion of the base layer at least in the opening, at least a portion of the semiconductor layer extending above the insulator layer to form a photodetector including an intrinsic region optically coupled to the waveguide. In one embodiment, the intrinsic region of the photodetector is butt-coupled to the optical waveguide. In another embodiment, the intrinsic region of the photodetector is evanescently coupled to the optical waveguide. 1. An integrated photodetector comprising: a substrate comprising a first insulator layer disposed over a base layer , the base layer comprising a first semiconductor material , the first cladding layer defining an opening extending to the base layer; an optical waveguide comprising the first semiconductor material and disposed over the substrate; and a photodetector comprising a second semiconductor material epitaxially grown over the base layer at least in the opening , the photodetector comprising an intrinsic region optically coupled to the waveguide , at least a portion of the intrinsic region extending above the first cladding layer and aligned with the waveguide.2. The integrated photodetector of claim 1 , wherein the intrinsic region of the photodetector is butt-coupled to the optical waveguide.3. The integrated photodetector of claim 1 , wherein the intrinsic region of the photodetector is evanescently coupled to the optical waveguide.4. The integrated photodetector of claim 1 , wherein the second semiconductor material is germanium.5. The integrated ...

SILICON WAVEGUIDE INTEGRATED WITH SILICON-GERMANIUM (Si-Ge) AVALANCHE PHOTODIODE DETECTOR

A method for manufacturing an integrated avalanche photodetector comprising steps of providing a silicon-insulator substrate including a top layer, an insulator layer and a base layer; partially removing the top layer to form an optical waveguide over the insulator layer; forming an opening at least through the cladding layer and the insulator layer extending to a first portion of the base layer; and forming an avalanche photodetector over the first portion of the base layer at least in the opening and optically coupled to the waveguide. In one embodiment, the avalanche photodetector is butt-coupled to the optical waveguide. In another embodiment, the avalanche photodetector is evanescently coupled to the optical waveguide. 1. An integrated photodetector comprising: a substrate comprising a first insulator layer disposed over a base layer , the base layer comprising a first semiconductor material , the first cladding layer defining an opening extending to the base layer; an optical waveguide comprising the first semiconductor material and disposed over the substrate; and an avalanche photodetector optically coupled to the waveguide , at least a portion of the avalanche photodetector extending above the first cladding layer and aligned with the waveguide.2. The integrated photodetector of claim 1 , wherein the avalanche photodetector is butt-coupled to the optical waveguide.3. The integrated photodetector of claim 1 , wherein the avalanche photodetector is evanescently coupled to the optical waveguide.4. The integrated photodetector of claim 1 , wherein the avalanche photodetector includes a silicon layer doped with an n-type metal to form an n conductive layer; an intrinsic silicon layer grown on top of the n conductive layer to form a multiplication layer; a charge layer formed on top of the multiplication layer; a germanium layer grown on the charge layer and a p-type metal layer formed on top of the germanium layer.5. The integrated photodetector of claim 4 , ...

METHOD FOR PREPARING SOLID STATE NANOPORES

The application relates to methods of forming arrays of solid state nanopores. A substrate is provided having an array of apertures extending through the substrate. The substrate is oxidized so that an oxide layer is formed on the substrate. The formation of the oxide layer reduces the cross-sectional dimensions of the apertures. This method is useful for producing arrays of nanopores having controlled dimensions. 1. A method for forming an array of nanopores comprising:a) providing a substrate comprising an array of apertures extending therethrough, each of the apertures having one or more cross-sectional dimension; andb) oxidizing the substrate whereby an oxide layer is formed on the substrate and whereby the formed oxide lowers one or more cross sectional dimensions of the apertures to 20 nm or less.2. The method of wherein in step (b) the formed oxide lowers the aperture dimensions to 10 nm or less.3. The method of wherein in step (b) the formed oxide lowers the aperture dimensions to 5 nm or less.4. The method of wherein in step (b) the formed oxide lowers the aperture dimensions to 1 nm or less.5. The method of wherein the substrate comprises a metal.6. The method of wherein the substrate comprises silicon.7. The method of wherein the substrate comprises aluminum.8. The method of wherein the oxidizing comprises thermal claim 1 , plasma claim 1 , or electrochemical oxidation.9. The method of wherein thermal oxidation is carried out with agents comprising chromates claim 8 , cerates claim 8 , permanganates claim 8 , titanium or zirconium oxides claim 8 , lithium salts claim 8 , or molybdates.10. The method of wherein plasma oxidation is carried out with an oxygen or ozone plasma.11. The method of wherein the cross-sectional dimension after the oxidizing step is from about 1% to about 75% of the original cross-sectional dimension.12. The method of wherein the cross-sectional dimension after the oxidizing step is from about 5% to about 50% of the original cross- ...

COMPOUND SEMICONDUCTOR PHOTONIC INTEGRATED CIRCUIT WITH DIELECTRIC WAVEGUIDE

A photonic integrated circuit (PIC) is grown by epitaxy on a substrate. The PIC includes at least one active element, at least one passive element, and a dielectric waveguide. The at least one active and passive elements are formed over the substrate and are in optical contact with each other. The dielectric waveguide is formed over the substrate, and is in optical contact with the at least one active and passive elements. The at least one active and passive elements each are formed using a III-V compound semiconductor material. 1. A photonic integrated circuit (PIC) grown by epitaxy on a substrate , the PIC comprising:at least one active element formed over the substrate;at least one passive element formed over the substrate, and in optical contact with the at least one active element, wherein the at least one active element and the at least one passive element each are formed using a III-V compound semiconductor material; anda dielectric waveguide, formed over the substrate, and in optical contact with at least one of the active and passive elements.2. The PIC of claim 1 , further comprising an anti-reflection layer deposited within the dielectric waveguide.3. The PIC of claim 2 , wherein the dielectric waveguide is formed using a material comprising at least one of silicon nitride claim 2 , silicon oxynitride claim 2 , silicon dioxide claim 2 , and aluminum nitride claim 2 , and wherein a predetermined portion of the dielectric waveguide includes a material having a negative thermal coefficient of refractive index.4. The PIC of claim 1 , wherein the at least one passive element comprises a III-V compound semiconductor waveguide formed over a first region of the substrate and coupled to the dielectric waveguide claim 1 , and wherein Eand Efield profiles of a mode in the dielectric waveguide matches Eand Efield profiles of a mode in the III-V compound semiconductor waveguide.5. The PIC of claim 4 , further comprising:a spot-size converter formed over a second ...

OPTICAL WAVEGUIDE STRUCTURE AND MANUFACTURING METHOD THEREOF

An optical waveguide structure and a manufacturing method thereof are disclosed. The optical waveguide structure has a first waveguide layer, a binding layer, and a second waveguide layer. The first waveguide layer has a taper portion, a connecting portion, and a strip portion. The manufacturing method of the optical waveguide structure has steps of etching to form the first waveguide layer, and then etching to form the second waveguide layer under the first waveguide layer. 1. An optical waveguide structure , comprising:a first waveguide layer having a taper portion, a connecting portion, and a strip portion, wherein the connecting portion is disposed between the taper portion and the strip portion;a second waveguide layer; anda binding layer disposed between the first waveguide layer and the second waveguide layer;wherein the first waveguide layer is configured to couple a light beam through the taper portion and the connecting portion to the strip portion;and the taper portion has a length ranged from 20 to 30 microns and a width gradually broadened from 0.3 microns to 0.5 microns.2. The optical waveguide structure according to claim 1 , wherein the first waveguide layer is formed of a III-V compound.3. The optical waveguide structure according to claim 2 , wherein the III-V compound is InGaAsP or InGaAsAl.4. The optical waveguide structure according to claim 1 , wherein the second waveguide layer is formed of silicon.5. The optical waveguide structure according to claim 1 , wherein the binding layer is formed of divinylsiloxane-bis-benzocyclobutene (DVS-BCB) claim 1 , spin on glass (SOG) claim 1 , or a thermal curing polymer.6. The optical waveguide structure according to claim 1 , wherein the second waveguide layer has a distance ranged from 0 to 15 μm claim 1 , exceeding the taper portion of the first waveguide layer in a longitudinal direction from a top view.7. A manufacturing method of an optical waveguide structure claim 1 , comprising steps of:(1) ...

PHASE TUNING IN WAVEGUIDE ARRAYS

The wavelength response of an arrayed waveguide grating can be tuned, in accordance with various embodiments, using a beam sweeper including one or more heaters to shift a lateral position of light focused by the beam sweeper at an interface of the beam sweeper with an input free propagation region of the arrayed waveguide grating. 1. A system comprising:an arrayed waveguide grating (AWG) comprising a plurality of waveguides connected between a first input free propagation region (FPR) and a first output FPR; and a second input FPR,', 'a second output FPR adjoining and optically coupled to the first input FPR of the AWG,', 'at least three waveguides connected between the second input FPR and the second output FPR, the at least three waveguides and the second output FPR being configured to focus light propagating in the at least three waveguides from the second input FPR to the second output FPR at a focus at an interface between the second output FPR and the first input FPR, and', 'at least one pair of forward and backward heaters laterally overlapping with the at least three waveguides, each of the heaters configured to impart an incremental phase shift between the light propagating in the at least three waveguides to thereby shift a lateral position of the focus, the phase shift imparted by the forward heater being of an opposite sign than the phase shift imparted by the backward heater, whereby the forward heater and the backward heater shift the lateral position of the focus in mutually opposite directions., 'a beam sweeper for tuning a wavelength response of the AWG, the beam sweeper comprising'}2. The system of claim 1 , wherein the at least three waveguides of the beam sweeper are fewer in number than the waveguides of the AWG.3. The system of claim 1 , wherein the at least three waveguides of the beam sweeper are arranged claim 1 , in a region immediately preceding the second output FPR claim 1 , along rays emanating from a common center at the interface of ...

METHOD AND APPARATUS FOR MODIFYING DIMENSIONS OF A WAVEGUIDE

Embodiments herein provide method and apparatus for modifying dimensions of a waveguide. The method includes positioning a shadow mask, with an aperture, above the waveguide, fabricated on a substrate. Further, the method includes spatially filtering, a substance through the aperture in the shadow mask on a portion of the waveguide. Furthermore, the method includes obtaining an adiabatic spot size converter at least at one end of the waveguide by adjusting a distance between the shadow mask and a surface of the waveguide to modify the dimensions of the waveguide. 1. A method for modifying dimensions of a waveguide , the method comprising:positioning a shadow mask, with an aperture, above the waveguide, fabricated on a substrate;spatially filtering a substance through the aperture in the shadow mask on a portion of the waveguide; andobtaining an adiabatic spot size converter at least at one end of the waveguide, by adjusting a distance between the shadow mask and a surface of the waveguide, to modify the dimensions of the waveguide.2. The method of claim 1 , further comprising adjusting length of the aperture to control length of the portion of the waveguide to be modified.3. The method of claim 1 , wherein the dimensions of the waveguide are length of the waveguide claim 1 , width of the waveguide claim 1 , height of the waveguide claim 1 , and cross-section of the waveguide.4. The method of claim 1 , wherein the substance penetrates through a gap between the shadow mask and the surface of the waveguide to obtain the adiabatic spot size converter at least at one end of the waveguide.5. The method of claim 1 , wherein the portion of the waveguide is trimmed by spatially filtering a reactive plasma through the aperture of the shadow mask to reduce the dimensions of a core of the waveguide.6. The method of claim 5 , wherein the portion of the waveguide is trimmed along an axis of the waveguide.7. The method of claim 5 , wherein the portion of the waveguide is trimmed ...

Optical Sensor Element for Analyte Assay in a Biological Fluid, as Method and Manufacture Thereof

Beginning with a sheet of optically transparent material, one may fabricate a great many shaped optical wafers, each in the form of a thin and essentially flat piece of optical material having a narrow cross-sectional width relative to length, and a sharply narrowed tip at one end. The fabrication process involves passing a sheet of optically transparent material through one or more operational steps wherein cutting, shearing, embossing, microperforating, or a combination thereof is performed. The fabrication process may further include a cladding operation, a tip texturing operation, and an analyte-reactive reagent deposition operation. The completed optical wafers are separated and each may be mounted into a user-operated device along with systems for educing a fluid sample to be expressed from a living organism, for bringing the tip of the optical wafer into contact with the fluid sample, and for illuminating and assaying the fluid sample. 1. A method of fabricating optical wafers for biological fluid sensors , comprising:establishing a plurality of cutout apertures in a sheet of optically transparent polymer material to define respective tapered portions of the optical wafers and expose edges thereof;establishing a plurality of transverse lines in the sheet to define respective main portions of the optical wafers and partially expose edges thereof, the main portions being respectively merged with the tapered portions;separating the sheet along a plurality of longitudinal lines into a plurality of strips to expose respective tips in the tapered portions of the optical wafers;applying a texturing treatment to the tips exposed in the separating step to form a field of elongated projections in the tips;depositing a fluid slurry mixture of analyte-reactive reagent and light scattering particles within the field of elongated projections; andfollowing the texturing treatment applying step and the fluid slurry mixture depositing step, separating the optical wafers from ...

PHOTONIC CHIP AND METHOD OF MANUFACTURE

A silicon photonic chip is provided comprising a top silicon device layer; an insulating layer beneath the top silicon device layer; an intermediate silicon device layer beneath the insulating layer; a further insulating layer beneath the intermediate silicon device layer; a silicon substrate beneath the further insulating layer; and a first silicon waveguide, the first silicon waveguide being partially formed by a portion of the intermediate silicon device layer. 1. A silicon photonic chip comprising:a top silicon device layer;an insulating layer beneath the top silicon device layer;an intermediate silicon device layer beneath the top silicon device layer and beneath and/or laterally offset from the insulating layer;a further insulating layer beneath the insulating layer and the intermediate silicon device layer;a silicon substrate beneath the further insulating layer; anda first silicon waveguide, the first silicon waveguide being partially formed by a portion of the intermediate silicon device layer.2. A silicon photonic chip according to claim 1 , further comprising a second waveguide within the top silicon device layer claim 1 , the first silicon waveguide having a first height and the second waveguide having a second height claim 1 , the second height being smaller than the first height.3. A silicon photonic chip according to wherein the second waveguide is a silicon waveguide.4. A silicon photonic chip according to claim 2 , wherein a top surface of the first silicon waveguide is co planar with a top surface of the second waveguide.5. A silicon photonic chip according to claim 2 , wherein a centre height of the first silicon waveguide is coplanar with a centre height of the second waveguide claim 2 ,wherein the centre height of the first silicon waveguide is equidistant from a top surface of the first silicon waveguide and a bottom surface of the first silicon waveguide and the centre height of the second waveguide is equidistant from a top surface of the ...

AN ULTRA-THIN INTEGRATED AND MANUFACTURE OF THE SAME

A method of fabricating a semiconductor device, the method comprising: forming a substrate; forming a support layer from a first type of material which is not susceptible to an etch process having a predetermined thickness that is related to a required thickness of the semiconductor device; forming a device on the support layer; forming at least one layer of cladding material on the device; forming a plurality of trenches in the layers that extend at least down to the substrate; applying a film over the cladding material; removing the substrate at least in part using an etching process to separate the device from others on a wafer. 1. A semiconductor device comprising a buffer layer and an etch stop layer , wherein the buffer layer comprises at least one of SiO , SiON and SiN and is of predetermined thickness , wherein the etch stop layer has been deposited over the buffer layer , wherein the device is less than 50 μm in thickness.2. The semiconductor device according to claim 1 , wherein the buffer layer has a thickness of 3 to 30 μm.3. The semiconductor device according to claim 1 , wherein the device is a photonic chip.4. A method of fabricating a plurality of semiconductor devices claim 1 , the method comprising:forming a substrate;{'sub': '2', 'forming a buffer layer over the substrate from at least one of SiO, SiON and SiN having a predetermined thickness that is related to a required thickness of the semiconductor device;'}forming an etch stop layer over the buffer layer:forming a plurality of devices on the etch stop layer;forming at least one layer of cladding material on the device;forming a plurality of trenches in the layers that extend at least down to the substrate;applying a film over the cladding material;removing the substrate at least in part using an etching process to separate each device from others on a wafer, wherein the device is less than 50 μm in thickness.5. The method according to claim 4 , further comprising removing the substrate using ...

Edge couplers with a partially-etched inverse taper

Structures including an edge coupler and methods of fabricating a structure including an edge coupler. The edge coupler includes a waveguide core having an end surface and a tapered section that terminates at the end surface. The tapered section of the waveguide core includes a slab layer and a ridge layer on the slab layer. The slab layer and the ridge layer each terminate at the end surface. The slab layer has a first width dimension with a first width at a given location along a longitudinal axis of the waveguide core, the ridge layer has a second width dimension with a second width at the given location along the longitudinal axis of the waveguide core, and the first width is greater than the second width.

Photonic semiconductor device and method of manufacture

A method includes forming a first photonic package, wherein forming the first photonic package includes patterning a silicon layer to form a first waveguide, wherein the silicon layer is on an oxide layer, and wherein the oxide layer is on a substrate; forming vias extending into the substrate; forming a first redistribution structure over the first waveguide and the vias, wherein the first redistribution structure is electrically connected to the vias; connecting a first semiconductor device to the first redistribution structure; removing a first portion of the substrate to form a first recess, wherein the first recess exposes the oxide layer; and filling the first recess with a first dielectric material to form a first dielectric region.

Co-Manufacturing of Silicon-on-Insulator Waveguides and Silicon Nitride Waveguides for Hybrid Photonic Integrated Circuits

A method of co-manufacturing silicon waveguides, SiN waveguides, and semiconductor structures in a photonic integrated circuit. A silicon waveguide structure can be formed using a suitable process, after which it is buried in a cladding. The cladding is polished, and a silicon nitride layer is disposed to define a silicon nitride waveguide. The silicon nitride waveguide is buried in a cladding, and annealed. Thereafter, cladding above the silicon waveguide structure can be trenched through, and low-temperature operations can be performed to or with an exposed surface of the silicon waveguide structure. 1. A method of manufacturing a hybrid photonic system , the method comprising:receiving a starting substrate comprising a layer of silicon formed on an insulating layer; a silicon waveguide; and', 'a top surface;, 'forming a silicon structure from the layer of silicon, the silicon structure definingburying the silicon structure in a first oxide layer;forming a silicon nitride (“SiN”) layer on the first oxide layer;defining a SiN waveguide from the SiN layer;burying the SiN waveguide in a second oxide layer;trenching through at least the first oxide layer to expose the top surface of the silicon structure;implanting the top surface with an implant;activating the implant;disposing a third oxide layer over at least the top surface;defining a via through the third oxide layer; andconductively coupling through the via to the top surface of the silicon structure.2. The method of claim 1 , comprising polishing the first oxide layer to define a polished surface claim 1 , the SiN layer formed on the polished surface.3. The method of claim 2 , wherein the polished surface is planar.4. The method of claim 3 , comprising annealing the first oxide layer prior to polishing.5. The method of claim 4 , comprising annealing the SiN waveguide prior to burying the SiN waveguide in the second oxide layer.6. The method of claim 5 , comprising annealing the second oxide layer prior to ...

WAVEGUIDE TRANSITION STRUCTURE AND FABRICATION METHOD

Some embodiments of the present disclosure describe a tapered waveguide and a method of making the tapered waveguide, wherein the tapered waveguide comprises a first and a second waveguide, wherein the first and second waveguides overlap in a waveguide overlap area. The first and second waveguides have a different size in at least one dimension perpendicular to an intended direction of propagation of electromagnetic radiation through the tapered waveguide. Across the waveguide overlap area, one of the waveguides gradually transitions or tapers into the other. 125-. (canceled)26. A waveguide transition structure , comprising:a first waveguide with a first thickness extending along the waveguide transition structure from a first end of the waveguide transition structure, wherein the first waveguide has a first width;a second waveguide with a second thickness different from the first thickness extending from a second end of the waveguide transition structure opposite the first end;wherein the first waveguide is in a first plane and the second waveguide is in a second plane parallel to the first plane;wherein the first waveguide and the second waveguide are adjacent and overlap in a transition area; andwherein the first waveguide's first width tapers in the transition area, or the first waveguide's first thickness transitions to the second thickness in the transition area.27. The structure according to claim 26 , wherein the first and second waveguides are formed in one continuous epitaxial silicon film.28. The structure according to claim 27 , wherein the one continuous epitaxial silicon film is on a silicon dioxide substrate.29. The structure according to claim 27 , wherein the epitaxial silicon film comprises a crystalline lattice claim 27 , wherein the crystalline lattice comprises at least one crystalline lattice axis perpendicular to an axis of propagation of electromagnetic radiation through the first and second waveguides.30. The structure according to claim 26 ...

INTEGRATED PHOTONICS INCLUDING GERMANIUM

A photonic structure can include in one aspect one or more waveguides formed by patterning of waveguiding material adapted to propagate light energy. Such waveguiding material may include one or more of silicon (single-, poly-, or non-crystalline) and silicon nitride. 1. A photonic structure comprising:dielectric material formed over silicon;a trench formed in the dielectric material extending to the silicon;a germanium formation formed in the trench;a top doping region formed in an area of the germanium formation so that the top doping region is spaced from the trench by a spacing distance equal to or greater than a threshold distance;a top contact formed on the top doping region, wherein the top contact is formed of a semiconductor compatible metallization material that is reflective to wavelengths in the range of from about 900 nm to about 1600 nm.2. The photonic structure of claim 1 , wherein an entire perimeter of the top doping region is spaced from the trench by a spacing distance equal to or greater than a threshold distance.3. (canceled)4. The photonic structure of claim 1 , wherein the threshold distance is in the range of 200 nm to 1000 nm.5. (canceled)6. The photonic structure of claim 1 , wherein the threshold distance is 750 nm.7. (canceled)8. The photonic structure of claim 1 , wherein the top contact formed on the doping region is formed in an area of the doping region so that an entire perimeter of the contact is spaced from a perimeter of the doping region by a spacing distance that is equal to or greater than a threshold distance.9. A photonic structure comprising:silicon having a doping region;a germanium formation adapted to receive light transmitted by the silicon;an oppositely doped doping region formed on the germanium formation;a silicide formation formed on the doping region of the silicon;a conductive material formation formed on the silicide formation; anda conductive material formation formed on the germanium formation.10. The photonic ...

Adhesion Promoter Apparatus and Method

An apparatus comprises a substrate having a plateau region and a trench region, a metal layer over the plateau region, a semiconductor component over the trench region, wherein a gap is between the plateau region and the semiconductor component, an adhesion promoter layer over the plateau region, the semiconductor component and the gap, a dielectric layer over the adhesion promoter layer and a bonding interface formed between the adhesion promoter layer and the dielectric layer, wherein the bonding interface comprises a chemical structure comprising a first dielectric material of the adhesion promoter layer and a second dielectric material of the dielectric layer. 1. An apparatus comprising:a substrate having a plateau region and a trench region;a metal layer over the plateau region;an adhesion promoter layer over the plateau region;a dielectric layer over the adhesion promoter layer; anda bonding interface formed between the adhesion promoter layer and the dielectric layer, wherein the bonding interface comprises a chemical structure comprising a first dielectric material of the adhesion promoter layer and a second dielectric material of the dielectric layer.2. The apparatus of claim 1 , wherein:opposite sides of the adhesion promoter layer contact one of hydrophilic surface and one of hydrophobic surface.3. The apparatus of claim 1 , further comprising:a semiconductor component in the trench region, the semiconductor component being formed of non-conductive materials.4. The apparatus of claim 3 , wherein:a gap between the semiconductor component and a sidewall of the trench region has a high aspect ratio.5. The apparatus of claim 1 , wherein:the metal layer is in contact with the substrate and the adhesion promoter layer, and wherein at least one sidewall of the metal layer is covered by the adhesion promoter layer.6. The apparatus of claim 1 , wherein:the dielectric layer is a polymer layer.7. The apparatus of claim 1 , further comprising:the adhesion promoter ...

STACKED WAVEGUIDE ARRANGEMENTS PROVIDING FIELD CONFINEMENT

Structures including a waveguide arrangement and methods of fabricating a structure that includes a waveguide arrangement. A second waveguide spaced in a lateral direction from a first waveguide, a third waveguide spaced in a vertical direction from the first waveguide, and a fourth waveguide spaced in the vertical direction from the second waveguide. The third waveguide is arranged in the lateral direction to provide a first overlapping relationship with the first waveguide. The fourth waveguide is arranged in the lateral direction to provide a second overlapping relationship with the second waveguide. 1. A structure for a photonic chip , the structure comprising:a first waveguide;a second waveguide spaced in a lateral direction from the first waveguide;a third waveguide spaced in a vertical direction from the first waveguide, the third waveguide arranged in the lateral direction to provide a first overlapping relationship with the first waveguide;a fourth waveguide spaced in the vertical direction from the second waveguide, the fourth waveguide arranged in the lateral direction to provide a second overlapping relationship with the second waveguide; anda multilayer stack arranged between the first waveguide and the third waveguide, the multilayer stack including a first dielectric layer comprised of a first dielectric material and a second dielectric layer comprised of a second dielectric material having a different composition than the first dielectric material,wherein the first waveguide, the second waveguide, the third waveguide, the fourth waveguide, and the multilayer stack are located on the photonic chip.2. The structure of wherein the first waveguide and the second waveguide are comprised of a dielectric material claim 1 , and the third waveguide and the fourth waveguide are comprised of a single-crystal semiconductor material.3. The structure of wherein the first waveguide and the second waveguide are connected by a partially-etched layer comprised of the ...

Integrated Micro-Lens Waveguide And Methods Of Making And Using Same

A probe structure includes a monolithically integrated waveguide and lens. The probe is based on SU-8 as a guiding material. A waveguide mold is defined using wet etching of silicon using a silicon dioxide mask patterned with 45° angle with respect to the silicon substrate edge and an aluminum layer acting as a mirror is deposited on the silicon substrate. A lens mold is made using isotropic etching of the fused silica substrate and then aligned to the silicon substrate. A waveguide polymer such as SU-8 2025 is flowed into the waveguide mask+lens mold (both on the same substrate) by decreasing its viscosity and using capillary forces via careful temperature control of the substrate. 1. A method of fabricating a monolithically integrated structure , comprising:forming a mirror by depositing a reflective material on an angled portion of a substrate;aligning a lens mold having at least one semispherical pattern to the substrate;causing, using capillary forces, a polymer to flow between the lens mold and the substrate; andcausing, by applying a developer to the polymer, the polymer to form a monolithically integrated structure comprising a waveguide and a lens extending from the waveguide.2. The method of claim 1 , further comprising forming the angled portion by etching the substrate with a rectangular pattern mask having a 45° angle at a proximal end with respect to an edge of the substrate.3. The method of claim 2 , wherein the etching comprises exposing an area of the substrate to be etched to a solution of 25% Tetramethylammonium hydroxide (TMAH) mixed with 10-50 ppm Trionx100 at about 90° C.4. The method of claim 1 , wherein the substrate comprises silicon.5. The method of claim 1 , wherein forming the mirror by depositing the reflective material comprises depositing a layer of the reflective material on a proximal end of the substrate.6. The method of claim 1 , wherein the reflective material is aluminum.7. The method of claim 1 , further comprising using a ...

Concentrating Thin Film Absorber Device and Method of Manufacture

An absorber device comprises a substrate; one or more thin film radiation absorbers arranged on the substrate; an integrated optical system, comprising at least one first optical element; a cover medium arranged above the substrate and the one or more radiation absorbers. The at least one first optical element and at least one corresponding one of the one or more radiation absorbers are aligned with respect to their optical axis, such that an incoming radiation is directed onto the one or more radiation absorbers by the optical system. A method of manufacturing an absorber device is also provided. 1. An absorber device comprising:a substrate;one or more thin film radiation absorbers arranged on the substrate;an integrated optical system, comprising a first optical element;a cover medium arranged above the substrate and the one or more radiation absorbers;wherein the first optical element and a corresponding one of the one or more radiation absorbers are aligned with respect to their optical axes, such that an incoming radiation is directed by the integrated optical system onto the corresponding one of the one or more radiation absorbers.2. The absorber device according to claim 1 , wherein the integrated optical system comprises a second optical element claim 1 , the second optical element being arranged between the first optical element and the one or more radiation absorbers and wherein the first optical element claim 1 , the second optical element and the corresponding one of the one or more radiation absorbers are aligned with respect to their optical axes.3. The absorber device according to claim 1 , wherein the first optical element comprises at least one lens array.4. The absorber device according to claim 1 , wherein the first optical element is integrated at a top surface of the cover medium.5. The absorber device according to claim 1 , wherein the second optical element comprises a light guide.6. The absorber device according to claim 1 , wherein the ...

MODULATION OF ROLLING K VECTORS OF ANGLED GRATINGS

Embodiments described herein relate to methods and apparatus for forming gratings having a plurality of fins with different slant angles on a substrate and forming fins with different slant angles on successive substrates using angled etch systems and/or an optical device. The methods include positioning portions of substrates retained on a platen in a path of an ion beam. The substrates have a grating material disposed thereon. The ion beam is configured to contact the grating material at an ion beam angle ϑ relative to a surface normal of the substrates and form gratings in the grating material. 1. A device , comprising: 'a slant angle relative to the surface of the substrate, wherein the slant angle of the optical device fins of adjacent portions increases or decreases with a rolling k-vector across the surface of the substrate.', 'at least two portions, the optical device fins of each portion having, 'one or more regions, each of the regions having a plurality of optical device fins disposed on a substrate, the plurality of optical device fins of at least one region of the one or more regions comprising2. The device of claim 1 , wherein the one or more regions include at least one of an input coupling region claim 1 , an intermediate coupling region claim 1 , or an output coupling region.3. The device of claim 2 , wherein one of the optical device fins of the input coupling region has a different slant angle than one of the optical device fins of the intermediate coupling region.4. The device of claim 2 , wherein one of the optical device fins of the input coupling region has a different slant angle than one of the optical device fins of the output coupling region.5. The device of claim 2 , wherein one of the optical device fins of the intermediate coupling region has a different slant angle than one of the optical device fins of the output coupling region.6. The device of claim 2 , wherein one of the optical device fins of the input coupling region has the same ...

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

A semiconductor device including an optical waveguide and a p-type semiconductor portion is configured as follows. The optical waveguide includes: a first semiconductor layer formed on an insulating layer; an insulating layer formed on the first semiconductor layer; and a second semiconductor layer formed on the insulating layer. The p-type semiconductor portion includes the first semiconductor layer. The film thickness of the p-type semiconductor portion is smaller than that of the optical waveguide. By forming the insulating layer between the first semiconductor layer and the second semiconductor layer, control of the film thicknesses of the optical waveguide and the p-type semiconductor portion is facilitated. Specifically, when the unnecessary second semiconductor layer is removed by etching in a step of forming the p-type semiconductor portion, the insulating layer which is the lower layer functions as an etching stopper, and the film thickness of the p-type semiconductor portion can be easily adjusted. 1. A semiconductor device comprising:a basic body;an insulating layer formed on the basic body;an element forming layer formed on the insulating layer;an optical waveguide formed in the element forming layer; anda first semiconductor portion connected to the optical waveguide, a first portion made of a semiconductor formed on the insulating layer;', 'a second portion made of an insulator formed on the first portion; and', 'a third portion made of a semiconductor formed on the second portion,, 'wherein the optical waveguide includesthe first semiconductor portion includes a fourth portion in the same layer as that of the first portion, anda thickness of the first semiconductor portion is smaller than a thickness of the optical waveguide.2. The semiconductor device according to claim 1 , comprisinga fifth portion formed on the fourth portion, the fifth portion being in the same layer as that of the second portion.3. The semiconductor device according to claim 1 , ...

PRODUCTION METHOD FOR MOUNTING STRUCTURE FOR GRATING ELEMENTS

A plurality of Bragg gratings are formed at predetermined locations of a laminate including a mounting substrate, a clad layer provided on the mounting substrate and an optical material layer provided on the clad layer. Optical waveguides are formed each including at least each of the Bragg gratings. Masks are formed each covering a region corresponding to each of the grating elements on the optical material layer. The optical material layer and clad layer are etched to shape an end face of each of the grating elements. 1. A method for producing a mounting structure comprising a mounting substrate and a plurality of grating elements provided over said mounting substrate , the method comprising the steps of:forming a plurality of Bragg gratings at predetermined locations of a laminate comprising said mounting substrate, a clad layer provided on said mounting substrate and an optical material layer provided on said clad layer;forming optical waveguides each including at least each of said Bragg gratings;forming masks each covering a region corresponding to each of said grating elements on said optical material layer; andetching said optical material layer and said clad layer to shape an end face of each of said grating elements.2. The method of claim 1 , further comprising the step of forming an upper side clad layer on said optical material layer and a single layer film on said end face of said grating element claim 1 , after shaping said end face of each of said grating elements.3. The method of claim 1 , wherein said optical waveguide comprises a ridge type optical waveguide claim 1 , said method further comprising the step of etching said optical material layer to form ridge grooves for shaping said ridge optical waveguide.4. The method of claim 1 , further comprising the step of forming said Bragg gratings by a nanoimprinting method.5. The method of claim 1 , wherein a clearance is provided between said grating elements adjacent to each other on said mounting ...

OPTICAL AND THERMAL INTERFACE FOR PHOTONIC INTEGRATED CIRCUITS

Described herein are photonic systems and devices including a optical interface unit disposed on a bottom side of a photonic integrated circuit (PIC) to receive light from an emitter of the PIC. A top side of the PIC includes a flip-chip interface for electrically coupling the PIC to an organic substrate via the top side. An alignment feature corresponding to the emitter is formed with the emitter to be offset by a predetermined distance value; because the emitter and the alignment feature are formed using a shared processing operation, the offset (i.e., predetermined distance value) may be precise and consistent across similarly produced PICs. The PIC comprises a processing feature to image the alignment feature from the bottom side (e.g., a hole). A heat spreader layer surrounds the optical interface unit and is disposed on the bottom side of the PIC to spread heat from the PIC. 1an optical interface unit; a bottom side, wherein the optical interface unit is disposed on the bottom side;', 'a top side including a flip-chip interface for electrically coupling the PIC to an organic substrate via the top side;', 'an emitter to emit light through the PIC out of the bottom side to the optical interface unit; and', 'an alignment feature corresponding to the emitter and formed with the emitter to be offset by a predetermined distance value, wherein the PIC comprises a processing feature to image the alignment feature from the bottom side; and, 'a photonic integrated circuit (PIC), includinga heat spreader layer surrounding the optical interface unit and disposed on the bottom side of the PIC to spread heat from the PIC.. An apparatus comprising: This application is a continuation of U.S. application Ser. No. 14/611,392, filed Feb. 2, 2015, which application claims the benefit of priority to U.S. Provisional Patent Application entitled “Optical and Thermal Interface for Photonic Integrated Circuits,” Ser. No. 61/943,108, filed Feb. 21, 2014, which is hereby incorporated ...

OPTICAL TRANSMISSION MODULE AND MANUFACTURING METHOD THEREOF

An optical transmission module in which optical axis adjustment is possible in a wide range and with a high accuracy, and a method of manufacturing the optical transmission module are provided. An optical transmission module includes a light source that outputs light, a mirror that reflects the light output by the light source, a lever on which the mirror is arranged and that has a fulcrum, a lens that converges the light reflected by the mirror, and a waveguide that transfers the light converged by the lens, with a core having a section width smaller than a wavelength in vacuum of the light. 1. An optical transmission module , comprising:a light source that outputs light;a mirror that reflects the light output by the light source;{'sub': '—', 'a lever on which the mirror is arranged and that has a fulcrum'}2. The optical transmission module according to claim 1 , further comprising:a lens that converges the light reflected by the mirror.3. The optical transmission module according to claim 2 , further comprising:a waveguide that transfers the light converged by the lens.4. The optical transmission module according to claim 1 ,wherein the lever is fixed by a fixing body.5. The optical transmission module according to claim 1 ,wherein when the lever is not fixed, the lever is bent in a direction perpendicular to an extending direction due to an external force.6. The optical transmission module according to claim 1 ,wherein when the lever is not fixed, the lever expands and contracts in an extending direction due to an external force.7. The optical transmission module according to claim 1 ,wherein the lever is a second-class lever including the fulcrum, a handle portion that is a force point to which an external force is applied, and an action point at which the mirror is arranged, when the lever is not fixed.8. The optical transmission module according to claim 1 ,wherein the lever is formed by etching an SOI layer.9. The optical transmission module according to ...

SEMICONDUCTOR OPTICAL APPARATUS

A semiconductor optical apparatus is disclosed, wherein the semiconductor optical apparatus comprises a first waveguide region defining a first mode size and a second active waveguide region defining a second mode size being smaller than the first mode size. The second active waveguide region is optically coupled to the first waveguide region and the second active waveguide region comprises a lower multiple quantum well layer and an upper multiple quantum well layer located above the lower multiple quantum well layer. The lower multiple quantum well layer is physically separated from the upper multiple quantum well layer by a spacer layer. The upper multiple quantum well layer comprises a mode transformation region configured to reduce the size of an optical mode from the first mode size to the second mode size. 1. A semiconductor optical apparatus , comprising:a first waveguide region defining a first mode size; anda second active waveguide region defining a second mode size smaller than the first mode size, wherein the second active waveguide region is optically coupled to the first waveguide region and wherein the second active waveguide region comprises a lower multiple quantum well layer and an upper multiple quantum well layer located above the lower multiple quantum well layer,wherein the lower multiple quantum well layer is physically separated from the upper multiple quantum well layer by a spacer layer, andwherein the upper multiple quantum well layer comprises a mode transformation region configured to reduce a size of an optical mode from the first mode size to the second mode size.2. The semiconductor optical apparatus of claim 1 , wherein the first waveguide region is a first waveguide active region comprising a further multiple quantum well layer and wherein a modal index defined by the further multiple quantum well layer is substantially equal to a modal index defined by the lower multiple quantum well layer.3. The semiconductor optical apparatus of ...

ELECTRO-OPTICAL INTERCONNECT PLATFORM

An electro-optical interconnection platform is provided. The platform includes an interface medium; a plurality of optical pads; a plurality of electrical pads; and at least one beam coupler adapted to optically couple at least one pair of optical pads of the plurality of optical pads, wherein the at least one pair of optical pads are placed on opposite sides of the interface medium. 1. An electro-optical interconnection platform , comprising:an interface medium;a plurality of optical pads;a plurality of electrical pads; andat least one beam coupler adapted to optically couple at least one pair of optical pads of the plurality of optical pads, wherein the at least one pair of optical pads are placed on opposite sides of the interface medium.2. The electro-optical interconnection platform of claim 1 , wherein an electrical pad of the plurality of electrical pads is connected to an electrical component.3. The electro-optical interconnection platform of claim 2 , wherein the electrical component includes any one of: an analog circuit claim 2 , a digital circuit claim 2 , and an analog-digital circuit.4. The electro-optical interconnection platform of claim 2 , wherein two or more electrical pads of the plurality of electrical pads are connected to each other through vias.5. The electro-optical interconnection platform of claim 1 , wherein an optical pad of the plurality of optical pads is connected to an optical component.6. The electro-optical interconnection platform of claim 5 , wherein the optical component includes any one of: a passive optical component claim 5 , an active optical component claim 5 , and a passive-active optical component.7. The electro-optical interconnection platform of claim 1 , wherein optical components and electrical components are connected to the platform using a die stacking process.8. The electro-optical interconnection platform of claim 1 , wherein each of the plurality of optical pads is structured as any one of: a curved mirror claim ...

ON-CHIP OPTICAL POLARIZATION CONTROLLER

An example optical polarization controller can include a substantially planar substrate and a waveguide unit cell formed on the substantially planar substrate. The waveguide unit cell can include a first out-of-plane waveguide portion and a second out-of-plane waveguide portion coupled to the first out-of-plane waveguide portion. Each of the first and second out-of-plane waveguide portions can respectively include a core material layer arranged between a first optical cladding layer having a first stress-response property and a second optical cladding layer having a second stress-response property. The first and second stress-response properties can be different such that each of the first and second out-of-plane waveguide portions is deflected by a deflection angle. 1. An optical polarization controller , comprising:a substantially planar substrate; anda waveguide unit cell formed on the substantially planar substrate, the waveguide unit cell comprising:a first out-of-plane waveguide portion, anda second out-of-plane waveguide portion coupled to the first out-of-plane waveguide portion, wherein each of the first and second out-of-plane waveguide portions respectively includes a core material layer arranged between a first optical cladding layer having a first stress-response property and a second optical cladding layer having a second stress-response property that is different than the first stress-response property such that each of the first and second out-of-plane waveguide portions is deflected by a deflection angle, and wherein the first out-of-plane waveguide portion or the second out-of-plane waveguide portion forms a bend in a direction that is different than a direction of deflection.2. The optical polarization controller of claim 1 , wherein at least one of the first out-of-plane waveguide portion or the second out-of-plane waveguide portion is deflected toward or away from the substantially planar substrate.3. The optical polarization controller of claim ...

DEVICE SUPPORT STRUCTURES FROM BULK SUBSTRATES

A substrate is composed of a first material. A photonic structure is composed of the first material connected to one or more support structures composed of the first material between the photonic structure and a surface of the substrate, with at least one of the support structures supporting a first section of a strip of the photonic structure. The first section has a width that is wider than a width of a second section of the strip and has a length that is at least about twice the width of the second section of the strip. 1. A method comprising:forming an etch mask on a first surface of a substrate, the etch mask including a strip that has at least a first section having a width that is wider than a width of a second section of the strip and having a length that is at least about twice the width of the second section of the strip; andetching the substrate through the etch mask, including removing a portion of the substrate to form at least a portion of a photonic structure suspended over an etched surface of the substrate by one or more support structures, including a first support structure that has a shape determined by the first section of the strip of the etch mask.2. The method of claim 1 , wherein the first section has a width that is wider than a third section of the strip.3. The method of claim 2 , wherein the first section includes a first tapered section between the first section and the second section claim 2 , and a second tapered section between the first section and the third section.4. The method of claim 1 , wherein etching the substrate includes removing portions of the substrate under the strip.5. The method of claim 4 , wherein the portions of the substrate under the strip that are removed include: a first portion of the substrate under the second section of the strip leaving a gap between a portion of the photonic structure and the etched surface of the substrate claim 4 , and a second portion of the substrate under the first section of the ...

On-wafer testing of photonic chips

A method for on-wafer testing of optical structures of photonic chips that include edge couplers as input/out ports includes defining, in test a test area of the wafer, an edge coupler pair formed of two edge couplers separated by a test gap, which may have a width that is close to the width of a chip-fiber gap during normal operation of the photonic chips. Test areas may include chains of different numbers of the edge coupler pairs for determining coupling loss per edge coupler.

Integrated optical devices and methos of forming the same

Integrated optical devices and methods of forming the same are disclosed. A method of forming an integrated optical device includes the following steps. A substrate is provided. The substrate includes, from bottom to top, a first semiconductor layer, an insulating layer and a second semiconductor layer. The second semiconductor layer is patterned to form a waveguide pattern. A surface smoothing treatment is performed to the waveguide pattern until a surface roughness Rz of the waveguide pattern is equal to or less than a desired value. A cladding layer is formed over the waveguide pattern.

GRAPHINE COUPLED MIM RECTIFIER ESPECIALLY FOR USE IN MONOLITHIC BROADBAND INFRARED ENERGY COLLECTOR

A rectifier comprising a metal-insulator-metal (MIM) structure. The insulator may be a native oxide with an adjacent layer of graphene. In one implementation, the rectifier is used in an electromagnetic energy collector consisting of a planar waveguide formed of multiple material layers having at least two different dielectric constants. MIM rectifiers are aligned with mirrors are formed within the waveguide core. In some arrangements, a plurality of MIM rectifiers are disposed in a column or 3D array beneath each mirror. 1. An electromagnetic energy collector apparatus comprising:a planar waveguide having a top surface, a bottom surface, and a core layer, the core providing a coherent propagation mode via internal reflection along a propagation axis parallel to the top surface and bottom surface, the waveguide further including multiple material layers having at least two different dielectric constants;a prism disposed on the top surface of the waveguide and coextensive with the propagation axis of the planar waveguide, for providing electromagnetic energy to the waveguide;two or more mirrors formed within the waveguide core, each of the mirrors having a surface disposed at a critical angle to the propagation axis, and the mirror surface extending from at least a top surface to a bottom surface of the waveguide core, and each of the mirrors disposed in parallel with at least one another mirror; andat least one metal-insulator-metal (MIM) rectifier aligned with each mirror and disposed beneath the bottom surface of the waveguide, further comprising an insulator consisting of a native oxide and a graphic layer.2. The apparatus of where the graphic layer is doped.3. The apparatus of wherein a dielectric constant of a material used to form each of the mirror surfaces differs from a dielectric constant of an area adjacent each respective one of the mirror surfaces to provide Total Internal Reflection (TIR) of energy reflected by the mirrors.4. The apparatus of wherein ...

Optical waveguide manufacturing method

A method of manufacturing an optical waveguide with a vertical slot including the steps of a) providing a substrate successively including an electric insulator layer and a crystalline semiconductor layer, b) forming a trench on the semiconductor layer to expose the electric insulator layer and defining first and second semiconductor areas on either side, step b) being executed so that the first semiconductor area has a lateral edge extending across the entire thickness of the semiconductor layer, c) forming the dielectric layer having the predetermined width across the entire thickness of the lateral edge, the method being remarkable in that the trench formed at step b) is configured so that the second semiconductor area forms a seed layer.

Optical Coupler Having Anchored Cantilever Structure With Multi-Stage Inverse Taper Core Waveguide And Fabrication Method Thereof

An optical coupler structure may include a substrate, a waveguide section and an anchored cantilever section. The substrate may include a main body and a sub-pillar structure formed on the main body. The waveguide section may be disposed on the substrate, and may include a core waveguide of a first material surrounded by a cladding layer of a second material. The anchored cantilever section may be disposed on the sub-pillar structure on the substrate, which may be configured to support the cantilever section and separate the cantilever section from the main body of the substrate. The anchored cantilever section may include a multi-stage inverse taper core waveguide and a cladding layer, of the second material, which surrounds the multi-stage inverse taper core waveguide. 1. An optical coupler structure , comprising:a substrate, the substrate comprising a main body and a sub-pillar structure formed on the main body;a waveguide section disposed on the substrate, the waveguide section comprising a core waveguide of a first material surrounded by a cladding layer of a second material; and a multi-stage inverse taper core waveguide; and', 'a cladding layer of the second material surrounding the multi-stage inverse taper core waveguide., 'an anchored cantilever section disposed on the sub-pillar structure on the substrate, the sub-pillar structure configured to support the cantilever section and separate the cantilever section from the main body of the substrate, the anchored cantilever section comprising2. The optical coupler structure of claim 1 , wherein the multi-stage inverse taper core waveguide has a gradually increasing effective refractive index along a propagation axis from the anchored cantilever section to the waveguide section.3. The optical coupler structure of claim 1 , wherein a material of the multi-stage inverse taper core waveguide comprises silicon dioxide claim 1 , silicon nitride claim 1 , silicon oxynitride claim 1 , silicon claim 1 , polysilicon ...

Optical waveguide element and method for manufacturing optical waveguide element

There is provided an optical waveguide element and a method for manufacturing an optical waveguide element that make it possible, while reducing the cost of manufacturing the optical waveguide element, to reliably eliminate stray light that affects primary signal light. The optical waveguide element of the present invention includes a silicon layer and silicon-dioxide layers placed above and below the silicon layer, in which the silicon layer includes a ridge optical waveguide and an impurity-implanted region placed at not less than a predetermined distance from the ridge optical waveguide.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

First, half etching is performed to a semiconductor layer formed on an insulating layer to form trenches at positions of slab-portion regions in which slab portions are to be formed. After filling the trenches with an insulating film, a resist mask which covers the semiconductor layer at a projecting-portion region in which a projecting portion is to be formed and whose pattern ends are located on upper surfaces of the insulating films is formed on upper surfaces of the semiconductor layer and the insulating film, and full etching is performed to the semiconductor layer with using the resist mask and the insulating film as an etching mask, thereby forming an optical waveguide constituted of the projecting portion and the slab portions. Thereafter, a first interlayer insulating film is formed to cover the optical waveguide. 1. A semiconductor device comprising:a first insulating film formed on a main surface of a semiconductor substrate;an optical waveguide which is formed on an upper surface of the first insulating film and includes a first plate portion made of a semiconductor layer and having a first thickness and second plate portions made of the semiconductor layer disposed on both sides of the first plate portion and having a second thickness smaller than the first thickness;a second insulating film formed on each of upper surfaces of the second plate portions and on an outer side of side surfaces of a protruding portion of the first plate; anda third insulating film formed on the upper surface of the first insulating film so as to cover the optical waveguide and the second insulating film.2. The semiconductor device according to claim 1 ,wherein the first plate portion and the second plate portions are integrally formed.3. The semiconductor device according to claim 1 ,wherein a height from the upper surface of the first insulating film to an upper surface of the first plate portion is the same as a height from the upper surface of the first insulating film to ...

OPTICAL ATTENUATOR AND FABRICATION METHOD THEREOF

An optical attenuator and/or optical terminator is provided. The device includes an optical channel having two regions with different optical properties, such as an undoped silicon region which is less optically absorptive and a doped silicon region which is more optically absorptive. Other materials may also be used. A facet at the interface between the two regions is oriented at a non-perpendicular angle relative to a longitudinal axis of the channel. The angle can be configured to mitigate back reflection. Multiple facets may be included between different pairs of regions. The device may further include curved and/or tapers to further facilitate attenuation and/or optical termination. 1. An optical attenuator comprising:a channel having a longitudinal axis, the channel comprising a first portion in contact with a second portion to define a facet therebetween, the second portion and the first portion both aligned along the longitudinal axis in a vicinity of the facet, wherein the facet extends across the channel and the longitudinal axis thereof and is at least partially oriented at a non-perpendicular angle relative to the longitudinal axis, and wherein the first portion and the second portion have equal cross-sectional areas in the vicinity of the facet.2. The optical attenuator of claim 1 , wherein the facet comprises a plane oriented at a non-perpendicular angle relative to the longitudinal axis.3. The optical attenuator of claim 1 , wherein the second portion comprises a doped semiconductor material.4. The optical attenuator of wherein the first portion comprises a doped semiconductor material having a lower dopant concentration than the second portion.5. The optical attenuator of claim 3 , wherein the doped semiconductor material comprises a dopant selected from the group consisting of boron claim 3 , arsenic claim 3 , phosphorus and gallium.6. (canceled)7. The optical attenuator of claim 3 , wherein the doped semiconductor material comprises a dopant ...

Techniques for Reducing Polarization, Wavelength and Temperature Dependent Loss, and Wavelength Passband Width in Fiberoptic Components

A pin hole or aperture is located or formed adjacent to the end surface of one or more of the input ports or fibers, or adjacent to one or more of the output ports or fibers, of a fiberoptic component. The aperture allows light to enter (or exit) the core of the associated fiber, and the non-transparent layer that surrounds the aperture blocks light from entering or exiting the cladding layer of the associated fiber. This blocking of the evanescent field in the cladding layer serves to reduce the polarization, wavelength, and temperature dependencies of the light coupling to the output port(s) or fiber(s) of the optical component. It can also reduce the passband width of the selected wavelength in tunable optical filter applications. The non-transparent layer surrounding the aperture can be made reflective, and light that is reflected by the non-transparent layer can be used for optical power monitoring. 1. An optical component , comprising:one or more optical waveguides, including a first optical waveguide having an inner core extending in a first direction that is radially surrounded by an outer cladding along the first direction, the first optical waveguide terminating in a first end and wherein the inner core has a higher index of refraction than the index of refraction of the outer cladding; anda non-transparent end structure covering the first end of the first optical waveguide and having a transparent aperture for at least a portion of inner core,wherein the non-transparent end structure is reflective and the optical component is configured to monitor at least a portion of incident light reflected from the non-transparent end structure.2. The optical component of claim 1 , wherein the first optical waveguide is an optical fiber.3. The optical component of claim 2 , further comprising:a ferrule in which the optical fiber is embedded.4. The optical component of claim 1 , wherein the optical component includes a substrate upon or within which the first optical ...

Optical Waveguide Interferometer

An optical waveguide interferometer that includes a first optical section, a second optical section, and a set of optical waveguides configured to connect the first and second optical sections, such that light propagating between the first optical section and the second optical section passes through each optical waveguide in the set, wherein the set of optical waveguides includes a first optical waveguide having a first length and a first width and a second optical waveguide having a second length and a second width, wherein the second length is greater than the first length, and the second width is greater than the first width.

FIBER COUPLER FOR SILICON PHOTONICS

An apparatus for converting fiber mode to waveguide mode. The apparatus includes a silicon substrate member and a dielectric member having an elongated body. Part of the elongated body from a back end overlies the silicon substrate member and remaining part of the elongated body up to a front end is separated from the silicon substrate member by a second dielectric material at an under region. The apparatus also includes a waveguide including a segment from the back end to a tail end formed on the dielectric member at least partially overlying the remaining part of the elongated body. The segment is buried in a cladding overlying entirely the dielectric member. The cladding has a refractive index that is less than the waveguide but includes an index-graded section with decreasing index that is formed at least over the segment from the tail end toward the back end. 1. A fiber-to-waveguide mode converter comprising:a silicon substrate member;a first dielectric material having an elongated body laid in a lengthwise direction from a back end to a front end with a portion proximate to the back end being supported by the silicon substrate member and remaining portion proximate to the front end being suspended from the silicon substrate member or supported by a second dielectric material thereof;a first waveguide segment formed from the back end along the lengthwise direction to a tail end on the first dielectric member, the tail end being a distance short to reach the front end of the first dielectric material; anda first cladding material overlying both the first waveguide segment and the first dielectric material, the first cladding material having a refractive index smaller than the first waveguide segment and including includes an index-graded structure formed at least over the first waveguide segment with decreasing index from the tail end toward the back end, wherein the index-graded structure comprises a plurality of patterned slots having a depth partially into ...

Semiconductor optical device and method for manufacturing semiconductor optical device

A method for manufacturing a semiconductor optical device includes the steps of growing a stacked layer including lower and upper core layers, a first upper region including a non-doped layer, a second upper region including a p-type layer, and a cap layer; forming an upper mesa by etching the stacked layer; selectively etching the cap layer in the upper mesa on the first and second regions; forming a mask on the upper mesa in the second and third regions; and etching the upper mesa using the mask so as to form first to fourth mesa portions. The first and fourth mesa portions are formed by etching the first and second upper regions, and the second upper region and the cap layer, respectively. The second and third mesa portions are formed by etching the first and second upper regions, and the second upper region and the cap layer, respectively.

TE TO TM MODE CONVERTER AND METHOD OF MANUFACTURE

An apparatus includes an input coupler configured to receive light excited by a light source. A near-field transducer (NFT) is positioned at a media-facing surface of a write head. A layered waveguide is positioned between the input coupler and the NFT and configured to receive the light output from the input coupler in a transverse electric (TE) mode and deliver the light to the NFT in a transverse magnetic (TM) mode. The layered waveguide comprises a first layer extending along a light-propagation direction. The first layer is configured to receive light from the input coupler. The first layer tapers from a first cross track width to a second cross track width where the second cross track width is narrower than the first cross track width. The layered waveguide includes a second layer that is disposed on the first layer. The second layer has a cross sectional area in a plane perpendicular to the light propagation direction that increases along the light propagation direction. The cross sectional area of the second layer is smaller proximate to the input coupler and larger proximate to the NFT. 1. A method for forming a write head , comprising:depositing a first waveguide layer;depositing a second waveguide layer adjacent to the first waveguide layer;applying a first mask to a substrate parallel surface of the second waveguide layer creating a masked portion and an exposed portion of the second waveguide layer;etching the exposed portion of the second waveguide layer;applying a second mask to the substrate parallel surface of the second waveguide layer creating masked sections and exposed sections of the first and second waveguide layers; andmilling the exposed sections of both the first and the second waveguide layers, wherein the second layer has a cross sectional area in a plane perpendicular to the light propagation direction that increases along the light propagation direction, the cross sectional area being smaller proximate to an input coupler and larger ...

FABRICATION METHOD FOR DIGITAL ETCHING OF NANOMETER-SCALE LEVEL STRUCTURES

A device includes a surface profile optical element, including a substrate and a plurality of bi-layer stacks on the substrate. Each bi-layer stack of the plurality of bi-layer stacks includes a plurality of bi-layers. Each bi-layer of the plurality of bi-layers includes an etch-stop layer and a bulk layer. The etch stop layer includes an etch stop layer index of refraction. The bulk layer includes a bulk layer index of refraction. A ratio of the etch stop layer index of retraction and the bulk layer index of refraction is between 0.75 and 1.25. 1. A device comprising;a surface profile optical element comprising a substrate and a plurality of bi-layer stacks on said substrate, each bi-layer stack of said plurality of bi-layer stacks comprising a plurality of bi-layers, each bi-layer of said plurality of bi-layers comprising an etch-stop layer and a bulk layer, said etch stop layer comprising an etch stop layer index of refraction, said bulk layer comprising a bulk layer index of refraction, a ratio of said etch stop layer index of refraction and said bulk layer index of refraction being between 0.75 and 1.25.2. The device according to claim 1 , wherein said substrate comprises one of a focal plane array claim 1 , a CMOS imager claim 1 , a CCD array claim 1 , and a semiconductor device claim 1 ,wherein said surface profile optical element comprises one of a wavefront coding element, an aspheric optical element, and a diffractive optical element.3. The device according to claim 1 , wherein said substrate is transparent.4. The device according to claim 1 , wherein said plurality of bi-layer stacks comprise a top surface roughness less than 10 nm root mean squared.5. The device according to claim 1 , wherein said etch stop layer comprises alumina claim 1 , and said bulk layer comprises a silicon-based dielectric.6. The device according to claim 1 , wherein at least one bi-layer stack of said plurality of bi-layer stacks comprises a thickness greater than 200 nm.7. The ...

METHOD FOR MANUFACTURING OPTICAL DEVICE

A diffraction grating pattern is formed in the first insulating film on the active layer by electron beam lithography, and at the same time an end facet formation pattern whose end portion corresponds to a position of an emission end facet of the optical modulator is formed in the first insulating film on the optical absorption layer by electron beam lithography. A second insulating film is formed on the end facet formation pattern. The diffraction grating formation layer is etched using the first and second insulating films as masks to form a diffraction grating, and is embedded with an embedded layer. The second insulating film is removed. A third insulating film is formed on the diffraction grating and the embedded layer not to cover the end facet formation pattern. The optical absorption layer is etched using the first and third insulating films as masks to form the emission end facet. 1. A method for manufacturing an optical device comprising:forming an active layer and a diffraction grating formation layer which become a DFB laser in order on a substrate;removing part of the active layer and the diffraction grating formation layer and forming an optical absorption layer which becomes an optical modulator butt-jointed to the active layer on the substrate;forming a first insulating film on the diffraction grating formation layer and the optical absorption layer;forming a diffraction grating pattern in the first insulating film on the active layer by electron beam lithography, and at the same time forming an end facet formation pattern whose end portion corresponds to a position of an emission end facet of the optical modulator in the first insulating film on the optical absorption layer by electron beam lithography;forming a second insulating film on the end facet formation pattern of the first insulating film;etching the diffraction grating formation layer using the first and second insulating films as masks to form a diffraction grating;removing the first ...

Method and apparatus for reducing signal loss in a photo detector

Photonic structures and methods of formation are disclosed in which a photo detector interface having crystalline misfit dislocations is displaced with respect to a waveguide core to reduce effects of dark current on a detected optical signal.

PHOTONIC STRUCTURE AND METHOD FOR FORMING THE SAME

A photonic structure is provided. The photonic structure includes a first oxide layer in a semiconductor substrate, a second oxide layer over an upper surface of the semiconductor substrate and an upper surface of the first oxide layer, and an optical coupling region over an upper surface of the second oxide layer. The optical coupling region is made of silicon, and an area of the optical coupling region is confined within an area of the first oxide layer in a plan view. 1. A photonic structure , comprising:a first oxide layer in a semiconductor substrate;a second oxide layer over an upper surface of the semiconductor substrate and an upper surface of the first oxide layer; andan optical coupling region over an upper surface of the second oxide layer, wherein the optical coupling region is made of silicon, and an area of the optical coupling region is confined within an area of the first oxide layer in a plan view.2. The photonic structure as claimed in claim 1 , wherein a width of the optical coupling region progressively decreases along a lengthwise direction of the optical coupling region.3. The photonic structure as claimed in claim 1 , further comprising:a dielectric layer over the second oxide layer, wherein the dielectric layer covers an upper surface and sidewalls of the optical coupling region.4. The photonic structure as claimed in claim 3 , wherein a terminus of the optical coupling region is exposed from the dielectric layer at an edge of the semiconductor substrate.5. The photonic structure as claimed in claim 1 , wherein a bottom surface of the first oxide layer is exposed from the semiconductor substrate.6. The photonic structure as claimed in claim 1 , wherein a ratio of a thickness of the first oxide layer to a thickness of the second oxide layer is in a range from about 10 to about 1250.7. The photonic structure as claimed in claim 1 , further comprising:a lining layer sandwiched between the first oxide layer and the semiconductor substrate.8. The ...

METHOD FOR III-V/SILICON HYBRID INTEGRATION

A method of transfer printing. The method comprising: providing a precursor photonic device, comprising a substrate and a bonding region, wherein the precursor photonic device includes one or more alignment marks located in or adjacent to the bonding region; providing a transfer die, said transfer die including one or more alignment marks; aligning the one or more alignment marks of the precursor photonic device with the one or more alignment marks of the transfer die; and bonding at least a part of the transfer die to the bonding region. 1. A method of transfer printing , comprising:providing a precursor photonic device, comprising a substrate and a bonding region, wherein the precursor photonic device includes one or more alignment marks located in or adjacent to the bonding region;providing a transfer die, said transfer die including one or more alignment marks;aligning the one or more alignment marks of the precursor photonic device with the one or more alignment marks of the transfer die; andbonding at least a part of the transfer die to the bonding region.2. The method of claim 1 , further comprising a step of filling a facet between the precursor photonic device and the transfer die.3. The method of claim 2 , wherein the filling material used to fill the facet is either of silicon nitride or amorphous silicon.4. The method of claim 1 , further comprising one or more steps of:plasma treating the precursor photonic device and/or the transfer die;dipping the precursor photonic device in water;drying the precursor photonic device; andannealing the transfer die and precursor photonic device.5. The method of claim 4 , wherein the annealing is performed at a temperature of at least 250° C. and no more than 350° C. for a time of at least 20 minutes and no more than 40 minutes.6. The method of claim 5 , wherein the annealing is performed in an inert gas atmosphere claim 5 , such as nitrogen atmosphere or argon atmosphere.7. An optoelectronic device claim 5 , ...

METHOD OF MANUFACTURING A PHOTONIC INTEGRATED CIRCUIT OPTICALLY COUPLED TO A LASER OF III-V MATERIAL

A method of manufacturing an integrated circuit including photonic components on a silicon layer and a laser made of a III-V group material includes providing the silicon layer positioned on a first insulating layer that is positioned on a support. First trenches are etched through the silicon layer and stop on the first insulating layer, and the first trenches are covered with a silicon nitride layer. Second trenches are etched through a portion of the silicon layer, and the first and second trenches are filled with silicon oxide, which are planarized. The method further includes removing the support and the first insulating layer, and bonding a wafer including a III-V group heterostructure on the rear surface of the silicon layer. 110-. (canceled)11. A method of manufacturing an integrated circuit comprising photonic components on a silicon layer and a laser comprising a III-V group material , the method comprising:a) providing the silicon layer having a front surface and a rear surface, with the rear surface on a first insulating layer that is on a support;b) etching the front surface to form first trenches through the silicon layer and stopping on the first insulating layer, and covering walls and a bottom of the first trenches with a silicon nitride layer;c) etching the front surface to form second trenches through a portion of the silicon layer, the second trenches being formed at a location of at least some of the photonic components;d) filling the first and second trenches with silicon oxide and planarizing the silicon oxide to the front surface of the silicon layer;e) removing the support and the first insulating layer, and stopping on the rear surface of the silicon layer and the silicon nitride layer; andf) bonding, on the rear surface of the silicon layer, a wafer comprising a III-V group heterostructure, and etching the wafer to delimit the laser.12. The method of claim 11 , further comprising between steps d) and e):g) covering the front surface of the ...

Etchant and Etching Process

A system and method for manufacturing semiconductor devices is provided. An embodiment comprises using an etchant to remove a portion of a substrate to form an opening with a 45° angle with a major surface of the substrate. The etchant comprises a base, a surfactant, and an oxidant. The oxidant may be hydrogen peroxide. 1. A semiconductor material etchant comprising:a base for removing material from a waveguide substrate covered with a patterned hardmask, the base having a concentration of between 25%-wt and about 35%-wt;a surfactant for modifying an angle of etching to about 45% from a major surface of the waveguide substrate, the surfactant reactable on the waveguide substrate to form an oil by-product, the surfactant having a concentration of between about 0.01%-wt and about 0.4%-wt; andan oxidant for oxidizing the waveguide substrate beneath the oil by-product, the oxidant having a concentration of between about 0.1%-wt and about 0.2%-wt.2. The semiconductor material etchant of claim 1 , wherein the oxidant is HO.3. The semiconductor material etchant of claim 1 , wherein the oxidant is ozone.4. The semiconductor material etchant of claim 1 , wherein the oxidant is KMnO.5. The semiconductor material etchant of claim 1 , wherein the base comprises KOH and the oxidant comprises HO.6. The semiconductor material etchant of claim 1 , wherein the base comprises KOH and the oxidant comprises HO.7. The semiconductor material etchant of claim 6 , wherein the surfactant comprises a sulfonate base.8. The semiconductor material etchant of claim 6 , wherein the surfactant comprises alkyl polysaccharide.9. A semiconductor device comprising:an optical bench substrate;an opening in the optical bench substrate, the opening having an angle of about 45%-wt from a major surface of the optical bench substrate and having a bottom surface free from etching hillocks; anda reflective material covering the opening from a first side of the opening to a second side of the opening opposite ...

CAVITY SUBSTRATE HAVING DIRECTIONAL OPTOELECTRONIC TRANSMISSION CHANNEL AND MANUFACTURING METHOD THEREOF

A cavity substrate may have a directional optoelectronic transmission channel. The cavity substrate includes a support frame, a first dielectric layer on a first surface of the support frame, and a second dielectric layer on a second surface of the support frame. The support frame, the first dielectric layer and the second dielectric layer constitute a closed cavity having an opening on one side in the length direction of the substrate, a first circuit layer is arranged on the inner surface of the first dielectric layer facing the cavity, an electrode connected with an optical communication device is arranged on the first circuit layer, the electrode is electrically conducted with the first circuit layer, a second circuit layer is arranged on the outer surfaces of the first dielectric layer and the second dielectric layer, and the first circuit layer and the second circuit layer are communicated through a via column. 1. A cavity substrate having a directional optoelectronic transmission channel , the cavity substrate comprising:a support frame;a first dielectric layer located on a first surface of the support frame; anda second dielectric layer located on a second surface of the support frame,wherein the support frame, the first dielectric layer and the second dielectric layer constitute a closed cavity having an opening on one side in a length direction of the substrate, a first circuit layer is arranged on an inner surface of the first dielectric layer facing the cavity, at least one electrode connected with an optical communication device is arranged on the first circuit layer, the electrode is electrically conducted with the first circuit layer, a second circuit layer is arranged on outer surfaces of the first dielectric layer and the second dielectric layer, and the first circuit layer and the second circuit layer are communicated through a via column.2. The cavity substrate having a directional optoelectronic transmission channel according to claim 1 , wherein ...

Structures and methods for high speed interconnection in photonic systems

Structures and methods for high speed interconnection in photonic systems are described herein. In one embodiment, a photonic device is disclosed. The photonic device includes: a substrate; a plurality of metal layers on the substrate; a photonic material layer comprising graphene over the plurality of metal layers; and an optical routing layer comprising a waveguide on the photonic material layer.

PROCESS FOR MAKING HIGH MULTIPLEX ARRAYS

Processes for making high multiplex arrays for use in analyzing discrete reactions at ultra high multiplex with reduced optical noise, and increased system flexibility. The high multiplex arrays include substrates having integrated optical components that increase multiplex capability by one or more of increasing density of reaction regions, improving transmission of light to or collection of light from discrete reactions regions. Integrated optical components include reflective optical elements which re-direct illumination light and light emitted from the discrete regions to more efficiently collect emitted light. Particularly preferred applications include single molecule reaction analysis, such as polymerase mediated template dependent nucleic acid synthesis and sequence determination. 1. A method for producing a substrate comprising an array of micromirrors wherein each micromirror is associated with a zero-mode waveguide comprising:a) providing a transparent substrate having a top surface;b) patterning and etching the transparent substrate to form an array of protrusions having tops and sides;c) depositing a cladding material such that the tops of the protrusions comprise a cladding;d) forming an array of apertures through the cladding such that the top of each protrusion comprises an aperture; ande) depositing a reflective deposition material such that the sides of the each protrusions comprise a reflective layer; whereby the array of protrusions comprise an array of micromirrors, and the aperture at the top of each protrusion comprises a zero-mode waveguide.2. The method of wherein step b) of patterning and etching the transparent substrate is carried out after steps c) and d) of depositing the cladding material and forming the array of apertures.3. The method of wherein steps c) and d) of depositing the cladding material and forming the array of apertures are carried out after step b) of patterning and etching the transparent substrate.4. The method of ...

Low Insertion Loss High Temperature Stable Fiber Bragg Grating Sensor and Method for Producing Same

Provided is an optical waveguide with an inscribed Bragg grating, where the Bragg grating is stable at high temperature, has low scattering loss and high reflectivity. Also provided is a method for inscribing a Bragg grating in an optical waveguide, the method comprising irradiating the optical waveguide with electromagnetic radiation from an ultrashort pulse duration laser of sufficient intensity to cause a permanent change in an index of refraction within a core of the optical waveguide, where the irradiating step is terminated prior to erasure of a Bragg resonance, and heating the optical waveguide to a temperature and for a duration sufficient to substantially remove a non-permanent grating formed in the optical waveguide by the irradiating step. 1. A method for inscribing a Bragg grating in an optical waveguide , comprising the steps of:providing the optical waveguide;providing electromagnetic radiation from an ultrashort pulse duration laser, wherein the electromagnetic radiation has a pulse duration of less than or equal to 5 picoseconds, and wherein the wavelength of the electromagnetic radiation has a characteristic wavelength in the wavelength range from 150 nm to 2.0 microns;irradiating the optical waveguide with the electromagnetic radiation to form a Bragg grating, the electromagnetic radiation incident on the optical waveguide being sufficiently intense to cause a permanent change in an index of refraction within a core of the optical waveguide when exposed to a succession of laser pulses, wherein the irradiating step is carried out for at least a number of pulses sufficient to form the permanent index of refraction change in the core of the optical waveguide, and wherein the irradiating step is terminated prior to erasure of a Bragg resonance by the irradiating; andheating the optical waveguide to a temperature and for a duration sufficient to substantially remove a non-permanent grating formed in the optical waveguide by the irradiating step.2. The ...